]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/e1000e/e1000.h
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'master' of git://dev.medozas.de/linux
[net-next-2.6.git] / drivers / net / e1000e / e1000.h
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* Linux PRO/1000 Ethernet Driver main header file */
30
31#ifndef _E1000_H_
32#define _E1000_H_
33
34#include <linux/types.h>
35#include <linux/timer.h>
36#include <linux/workqueue.h>
37#include <linux/io.h>
38#include <linux/netdevice.h>
d8014dbc 39#include <linux/pci.h>
6f461f6c 40#include <linux/pci-aspm.h>
bc7f75fa
AK		 41
42#include "hw.h"
43
44struct e1000_info;
45
44defeb3 46#define e_dbg(format, arg...) \
8544b9f7 47 netdev_dbg(hw->adapter->netdev, format, ## arg)
44defeb3 48#define e_err(format, arg...) \
8544b9f7 49 netdev_err(adapter->netdev, format, ## arg)
44defeb3 50#define e_info(format, arg...) \
8544b9f7 51 netdev_info(adapter->netdev, format, ## arg)
44defeb3 52#define e_warn(format, arg...) \
8544b9f7 53 netdev_warn(adapter->netdev, format, ## arg)
44defeb3 54#define e_notice(format, arg...) \
8544b9f7 55 netdev_notice(adapter->netdev, format, ## arg)
bc7f75fa
AK		 56
57
98a1708d 58/* Interrupt modes, as used by the IntMode parameter */
4662e82b
BA		 59#define E1000E_INT_MODE_LEGACY 0
60#define E1000E_INT_MODE_MSI 1
61#define E1000E_INT_MODE_MSIX 2
62
ad68076e 63/* Tx/Rx descriptor defines */
bc7f75fa
AK		 64#define E1000_DEFAULT_TXD 256
65#define E1000_MAX_TXD 4096
7b1be198 66#define E1000_MIN_TXD 64
bc7f75fa
AK		 67
68#define E1000_DEFAULT_RXD 256
69#define E1000_MAX_RXD 4096
7b1be198 70#define E1000_MIN_RXD 64
bc7f75fa 71
de5b3077
AK		 72#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
73#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
74
bc7f75fa
AK		 75/* Early Receive defines */
76#define E1000_ERT_2048 0x100
77
78#define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
79
80/* How many Tx Descriptors do we need to call netif_wake_queue ? */
81/* How many Rx Buffers do we bundle into one write to the hardware ? */
82#define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
83
84#define AUTO_ALL_MODES 0
85#define E1000_EEPROM_APME 0x0400
86
87#define E1000_MNG_VLAN_NONE (-1)
88
89/* Number of packet split data buffers (not including the header buffer) */
90#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
91
2adc55c9
BA		 92#define DEFAULT_JUMBO 9234
93
a4f58f54
BA		 94/* BM/HV Specific Registers */
95#define BM_PORT_CTRL_PAGE 769
96
97#define PHY_UPPER_SHIFT 21
98#define BM_PHY_REG(page, reg) \
99 (((reg) & MAX_PHY_REG_ADDRESS) |\
100 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
101 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
102
103/* PHY Wakeup Registers and defines */
104#define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
105#define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
106#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
107#define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
108#define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
109#define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
110#define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
111#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
112#define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
113
114#define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
115#define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
116#define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
117#define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
118#define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
119#define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
120#define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */
121
122#define HV_SCC_UPPER PHY_REG(778, 16) /* Single Collision Count */
123#define HV_SCC_LOWER PHY_REG(778, 17)
124#define HV_ECOL_UPPER PHY_REG(778, 18) /* Excessive Collision Count */
125#define HV_ECOL_LOWER PHY_REG(778, 19)
126#define HV_MCC_UPPER PHY_REG(778, 20) /* Multiple Collision Count */
127#define HV_MCC_LOWER PHY_REG(778, 21)
128#define HV_LATECOL_UPPER PHY_REG(778, 23) /* Late Collision Count */
129#define HV_LATECOL_LOWER PHY_REG(778, 24)
130#define HV_COLC_UPPER PHY_REG(778, 25) /* Collision Count */
131#define HV_COLC_LOWER PHY_REG(778, 26)
132#define HV_DC_UPPER PHY_REG(778, 27) /* Defer Count */
133#define HV_DC_LOWER PHY_REG(778, 28)
134#define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */
135#define HV_TNCRS_LOWER PHY_REG(778, 30)
136
38eb394e
BA		 137#define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */
138
1d5846b9
BA		 139/* BM PHY Copper Specific Status */
140#define BM_CS_STATUS 17
141#define BM_CS_STATUS_LINK_UP 0x0400
142#define BM_CS_STATUS_RESOLVED 0x0800
143#define BM_CS_STATUS_SPEED_MASK 0xC000
144#define BM_CS_STATUS_SPEED_1000 0x8000
145
146/* 82577 Mobile Phy Status Register */
147#define HV_M_STATUS 26
148#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
149#define HV_M_STATUS_SPEED_MASK 0x0300
150#define HV_M_STATUS_SPEED_1000 0x0200
151#define HV_M_STATUS_LINK_UP 0x0040
152
23606cf5
RW		 153/* Time to wait before putting the device into D3 if there's no link (in ms). */
154#define LINK_TIMEOUT 100
155
bc7f75fa
AK		 156enum e1000_boards {
157 board_82571,
158 board_82572,
159 board_82573,
4662e82b 160 board_82574,
8c81c9c3 161 board_82583,
bc7f75fa
AK		 162 board_80003es2lan,
163 board_ich8lan,
164 board_ich9lan,
f4187b56 165 board_ich10lan,
a4f58f54 166 board_pchlan,
bc7f75fa
AK		 167};
168
169struct e1000_queue_stats {
170 u64 packets;
171 u64 bytes;
172};
173
174struct e1000_ps_page {
175 struct page *page;
176 u64 dma; /* must be u64 - written to hw */
177};
178
179/*
180 * wrappers around a pointer to a socket buffer,
181 * so a DMA handle can be stored along with the buffer
182 */
183struct e1000_buffer {
184 dma_addr_t dma;
185 struct sk_buff *skb;
186 union {
ad68076e 187 /* Tx */
bc7f75fa
AK		 188 struct {
189 unsigned long time_stamp;
190 u16 length;
191 u16 next_to_watch;
9ed318d5
TH		 192 unsigned int segs;
193 unsigned int bytecount;
03b1320d 194 u16 mapped_as_page;
bc7f75fa 195 };
ad68076e 196 /* Rx */
03b1320d
AD		 197 struct {
198 /* arrays of page information for packet split */
199 struct e1000_ps_page *ps_pages;
200 struct page *page;
201 };
bc7f75fa 202 };
bc7f75fa
AK		 203};
204
205struct e1000_ring {
206 void *desc; /* pointer to ring memory */
207 dma_addr_t dma; /* phys address of ring */
208 unsigned int size; /* length of ring in bytes */
209 unsigned int count; /* number of desc. in ring */
210
211 u16 next_to_use;
212 u16 next_to_clean;
213
214 u16 head;
215 u16 tail;
216
217 /* array of buffer information structs */
218 struct e1000_buffer *buffer_info;
219
4662e82b
BA		 220 char name[IFNAMSIZ + 5];
221 u32 ims_val;
222 u32 itr_val;
223 u16 itr_register;
224 int set_itr;
225
bc7f75fa
AK		 226 struct sk_buff *rx_skb_top;
227
228 struct e1000_queue_stats stats;
229};
230
7c25769f
BA		 231/* PHY register snapshot values */
232struct e1000_phy_regs {
233 u16 bmcr; /* basic mode control register */
234 u16 bmsr; /* basic mode status register */
235 u16 advertise; /* auto-negotiation advertisement */
236 u16 lpa; /* link partner ability register */
237 u16 expansion; /* auto-negotiation expansion reg */
238 u16 ctrl1000; /* 1000BASE-T control register */
239 u16 stat1000; /* 1000BASE-T status register */
240 u16 estatus; /* extended status register */
241};
242
bc7f75fa
AK		 243/* board specific private data structure */
244struct e1000_adapter {
245 struct timer_list watchdog_timer;
246 struct timer_list phy_info_timer;
247 struct timer_list blink_timer;
248
249 struct work_struct reset_task;
250 struct work_struct watchdog_task;
251
252 const struct e1000_info *ei;
253
254 struct vlan_group *vlgrp;
255 u32 bd_number;
256 u32 rx_buffer_len;
257 u16 mng_vlan_id;
258 u16 link_speed;
259 u16 link_duplex;
84527590 260 u16 eeprom_vers;
bc7f75fa 261
bc7f75fa
AK		 262 /* track device up/down/testing state */
263 unsigned long state;
264
265 /* Interrupt Throttle Rate */
266 u32 itr;
267 u32 itr_setting;
268 u16 tx_itr;
269 u16 rx_itr;
270
271 /*
ad68076e 272 * Tx
bc7f75fa
AK		 273 */
274 struct e1000_ring *tx_ring /* One per active queue */
275 ____cacheline_aligned_in_smp;
276
277 struct napi_struct napi;
278
bc7f75fa
AK		 279 unsigned int restart_queue;
280 u32 txd_cmd;
281
282 bool detect_tx_hung;
283 u8 tx_timeout_factor;
284
285 u32 tx_int_delay;
286 u32 tx_abs_int_delay;
287
288 unsigned int total_tx_bytes;
289 unsigned int total_tx_packets;
290 unsigned int total_rx_bytes;
291 unsigned int total_rx_packets;
292
ad68076e 293 /* Tx stats */
bc7f75fa
AK		 294 u64 tpt_old;
295 u64 colc_old;
7c25769f
BA		 296 u32 gotc;
297 u64 gotc_old;
bc7f75fa
AK		 298 u32 tx_timeout_count;
299 u32 tx_fifo_head;
300 u32 tx_head_addr;
301 u32 tx_fifo_size;
302 u32 tx_dma_failed;
303
304 /*
ad68076e 305 * Rx
bc7f75fa
AK		 306 */
307 bool (*clean_rx) (struct e1000_adapter *adapter,
308 int *work_done, int work_to_do)
309 ____cacheline_aligned_in_smp;
310 void (*alloc_rx_buf) (struct e1000_adapter *adapter,
311 int cleaned_count);
312 struct e1000_ring *rx_ring;
313
314 u32 rx_int_delay;
315 u32 rx_abs_int_delay;
316
ad68076e 317 /* Rx stats */
bc7f75fa
AK		 318 u64 hw_csum_err;
319 u64 hw_csum_good;
320 u64 rx_hdr_split;
7c25769f
BA		 321 u32 gorc;
322 u64 gorc_old;
bc7f75fa
AK		 323 u32 alloc_rx_buff_failed;
324 u32 rx_dma_failed;
325
326 unsigned int rx_ps_pages;
327 u16 rx_ps_bsize0;
318a94d6
JK		 328 u32 max_frame_size;
329 u32 min_frame_size;
bc7f75fa
AK		 330
331 /* OS defined structs */
332 struct net_device *netdev;
333 struct pci_dev *pdev;
bc7f75fa
AK		 334
335 /* structs defined in e1000_hw.h */
336 struct e1000_hw hw;
337
338 struct e1000_hw_stats stats;
339 struct e1000_phy_info phy_info;
340 struct e1000_phy_stats phy_stats;
341
7c25769f
BA		 342 /* Snapshot of PHY registers */
343 struct e1000_phy_regs phy_regs;
344
bc7f75fa
AK		 345 struct e1000_ring test_tx_ring;
346 struct e1000_ring test_rx_ring;
347 u32 test_icr;
348
349 u32 msg_enable;
4662e82b
BA		 350 struct msix_entry *msix_entries;
351 int int_mode;
352 u32 eiac_mask;
bc7f75fa
AK		 353
354 u32 eeprom_wol;
355 u32 wol;
356 u32 pba;
2adc55c9 357 u32 max_hw_frame_size;
bc7f75fa 358
318a94d6 359 bool fc_autoneg;
bc7f75fa
AK		 360
361 unsigned long led_status;
362
363 unsigned int flags;
eb7c3adb 364 unsigned int flags2;
a8f88ff5
JB		 365 struct work_struct downshift_task;
366 struct work_struct update_phy_task;
a4f58f54 367 struct work_struct led_blink_task;
41cec6f1 368 struct work_struct print_hang_task;
23606cf5
RW		 369
370 bool idle_check;
bc7f75fa
AK		 371};
372
373struct e1000_info {
374 enum e1000_mac_type mac;
375 unsigned int flags;
6f461f6c 376 unsigned int flags2;
bc7f75fa 377 u32 pba;
2adc55c9 378 u32 max_hw_frame_size;
69e3fd8c 379 s32 (*get_variants)(struct e1000_adapter *);
bc7f75fa
AK		 380 struct e1000_mac_operations *mac_ops;
381 struct e1000_phy_operations *phy_ops;
382 struct e1000_nvm_operations *nvm_ops;
383};
384
385/* hardware capability, feature, and workaround flags */
386#define FLAG_HAS_AMT (1 << 0)
387#define FLAG_HAS_FLASH (1 << 1)
388#define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
389#define FLAG_HAS_WOL (1 << 3)
390#define FLAG_HAS_ERT (1 << 4)
391#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
392#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
393#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
4a770358 394#define FLAG_READ_ONLY_NVM (1 << 8)
97ac8cae 395#define FLAG_IS_ICH (1 << 9)
4662e82b 396#define FLAG_HAS_MSIX (1 << 10)
bc7f75fa
AK		 397#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
398#define FLAG_IS_QUAD_PORT_A (1 << 12)
399#define FLAG_IS_QUAD_PORT (1 << 13)
400#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
401#define FLAG_APME_IN_WUC (1 << 15)
402#define FLAG_APME_IN_CTRL3 (1 << 16)
403#define FLAG_APME_CHECK_PORT_B (1 << 17)
404#define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
405#define FLAG_NO_WAKE_UCAST (1 << 19)
406#define FLAG_MNG_PT_ENABLED (1 << 20)
407#define FLAG_RESET_OVERWRITES_LAA (1 << 21)
408#define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
409#define FLAG_TARC_SET_BIT_ZERO (1 << 23)
410#define FLAG_RX_NEEDS_RESTART (1 << 24)
411#define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
412#define FLAG_SMART_POWER_DOWN (1 << 26)
413#define FLAG_MSI_ENABLED (1 << 27)
414#define FLAG_RX_CSUM_ENABLED (1 << 28)
415#define FLAG_TSO_FORCE (1 << 29)
318a94d6 416#define FLAG_RX_RESTART_NOW (1 << 30)
f8d59f78 417#define FLAG_MSI_TEST_FAILED (1 << 31)
bc7f75fa 418
eb7c3adb
JK		 419/* CRC Stripping defines */
420#define FLAG2_CRC_STRIPPING (1 << 0)
a4f58f54 421#define FLAG2_HAS_PHY_WAKEUP (1 << 1)
b94b5028 422#define FLAG2_IS_DISCARDING (1 << 2)
6f461f6c 423#define FLAG2_DISABLE_ASPM_L1 (1 << 3)
eb7c3adb 424
bc7f75fa
AK		 425#define E1000_RX_DESC_PS(R, i) \
426 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
427#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
428#define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
429#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
430#define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
431
432enum e1000_state_t {
433 __E1000_TESTING,
434 __E1000_RESETTING,
435 __E1000_DOWN
436};
437
438enum latency_range {
439 lowest_latency = 0,
440 low_latency = 1,
441 bulk_latency = 2,
442 latency_invalid = 255
443};
444
445extern char e1000e_driver_name[];
446extern const char e1000e_driver_version[];
447
448extern void e1000e_check_options(struct e1000_adapter *adapter);
449extern void e1000e_set_ethtool_ops(struct net_device *netdev);
450
451extern int e1000e_up(struct e1000_adapter *adapter);
452extern void e1000e_down(struct e1000_adapter *adapter);
453extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
454extern void e1000e_reset(struct e1000_adapter *adapter);
455extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
456extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
457extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
458extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
459extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
460extern void e1000e_update_stats(struct e1000_adapter *adapter);
b405e8df 461extern bool e1000e_has_link(struct e1000_adapter *adapter);
4662e82b
BA		 462extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
463extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
6f461f6c 464extern void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
bc7f75fa
AK		 465
466extern unsigned int copybreak;
467
468extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
469
470extern struct e1000_info e1000_82571_info;
471extern struct e1000_info e1000_82572_info;
472extern struct e1000_info e1000_82573_info;
4662e82b 473extern struct e1000_info e1000_82574_info;
8c81c9c3 474extern struct e1000_info e1000_82583_info;
bc7f75fa
AK		 475extern struct e1000_info e1000_ich8_info;
476extern struct e1000_info e1000_ich9_info;
f4187b56 477extern struct e1000_info e1000_ich10_info;
a4f58f54 478extern struct e1000_info e1000_pch_info;
bc7f75fa
AK		 479extern struct e1000_info e1000_es2_info;
480
69e3fd8c 481extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
bc7f75fa
AK		 482
483extern s32 e1000e_commit_phy(struct e1000_hw *hw);
484
485extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
486
487extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
488extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
489
4a770358 490extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
bc7f75fa
AK		 491extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
492 bool state);
493extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
494extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
97ac8cae 495extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
bb436b20 496extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
bc7f75fa
AK		 497
498extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
499extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
500extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
a4f58f54 501extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
bc7f75fa
AK		 502extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
503extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
504extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
505extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
f4d2dd4c
BA		 506extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
507extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
bc7f75fa
AK		 508extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
509extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
510extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
511extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
512extern s32 e1000e_id_led_init(struct e1000_hw *hw);
513extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
514extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
515extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
516extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
517extern s32 e1000e_setup_link(struct e1000_hw *hw);
caaddaf8 518extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
bc7f75fa 519extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
e2de3eb6
JK		 520extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
521 u8 *mc_addr_list,
ab8932f3 522 u32 mc_addr_count);
bc7f75fa
AK		 523extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
524extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
525extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
526extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
527extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
528extern void e1000e_config_collision_dist(struct e1000_hw *hw);
529extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
530extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
531extern s32 e1000e_blink_led(struct e1000_hw *hw);
caaddaf8 532extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
608f8a0d 533extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
bc7f75fa
AK		 534extern void e1000e_reset_adaptive(struct e1000_hw *hw);
535extern void e1000e_update_adaptive(struct e1000_hw *hw);
536
537extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
538extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
539extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
540extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
541extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
542extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
543extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
544extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
5ccdcecb
BA		 545extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
546 u16 *data);
bc7f75fa
AK		 547extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
548extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
549extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
5ccdcecb
BA		 550extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
551 u16 data);
bc7f75fa
AK		 552extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
553extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
554extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
555extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
556extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
557extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
558extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
f4187b56 559extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
bc7f75fa 560extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
97ac8cae
BA		 561extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
562extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
563extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
4662e82b
BA		 564extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
565extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
bc7f75fa
AK		 566extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
567extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
5ccdcecb
BA		 568extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
569 u16 data);
bc7f75fa 570extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
5ccdcecb
BA		 571extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
572 u16 *data);
bc7f75fa
AK		 573extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
574 u32 usec_interval, bool *success);
575extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
17f208de
BA		 576extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
577extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
2d9498f3
DG		 578extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
579extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
bc7f75fa 580extern s32 e1000e_check_downshift(struct e1000_hw *hw);
a4f58f54 581extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
5ccdcecb
BA		 582extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
583 u16 *data);
a4f58f54 584extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
5ccdcecb
BA		 585extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
586 u16 data);
a4f58f54
BA		 587extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
588extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
589extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
590extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
591extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
592extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
bc7f75fa 593
0be84010
BA		 594extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
595extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
596extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
597extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
598extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
599
bc7f75fa
AK		 600static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
601{
94d8186a 602 return hw->phy.ops.reset(hw);
bc7f75fa
AK		 603}
604
605static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
606{
607 return hw->phy.ops.check_reset_block(hw);
608}
609
610static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
611{
94d8186a 612 return hw->phy.ops.read_reg(hw, offset, data);
bc7f75fa
AK		 613}
614
615static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
616{
94d8186a 617 return hw->phy.ops.write_reg(hw, offset, data);
bc7f75fa
AK		 618}
619
620static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
621{
622 return hw->phy.ops.get_cable_length(hw);
623}
624
625extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
626extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
627extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
628extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
bc7f75fa
AK		 629extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
630extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
631extern void e1000e_release_nvm(struct e1000_hw *hw);
632extern void e1000e_reload_nvm(struct e1000_hw *hw);
608f8a0d
BA		 633extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
634
635static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
636{
637 if (hw->mac.ops.read_mac_addr)
638 return hw->mac.ops.read_mac_addr(hw);
639
640 return e1000_read_mac_addr_generic(hw);
641}
bc7f75fa
AK		 642
643static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
644{
94d8186a 645 return hw->nvm.ops.validate(hw);
bc7f75fa
AK		 646}
647
648static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
649{
94d8186a 650 return hw->nvm.ops.update(hw);
bc7f75fa
AK		 651}
652
653static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
654{
94d8186a 655 return hw->nvm.ops.read(hw, offset, words, data);
bc7f75fa
AK		 656}
657
658static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
659{
94d8186a 660 return hw->nvm.ops.write(hw, offset, words, data);
bc7f75fa
AK		 661}
662
663static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
664{
94d8186a 665 return hw->phy.ops.get_info(hw);
bc7f75fa
AK		 666}
667
4662e82b
BA		 668static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
669{
670 return hw->mac.ops.check_mng_mode(hw);
671}
672
673extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
bc7f75fa
AK		 674extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
675extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
676
677static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
678{
679 return readl(hw->hw_addr + reg);
680}
681
682static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
683{
684 writel(val, hw->hw_addr + reg);
685}
686
687#endif /* _E1000_H_ */
Clone of davem's net-next-2.6 tree