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1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1532ecea 34#define DRV_VERSION "7.3.21-k5-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH		 128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT		 130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
edbbb3ca
JB		 140static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
581d708e 143static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 144 struct e1000_rx_ring *rx_ring,
72d64a43 145 int cleaned_count);
edbbb3ca
JB		 146static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count);
1da177e4
LT		 149static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
150static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
151 int cmd);
1da177e4
LT		 152static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
153static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
154static void e1000_tx_timeout(struct net_device *dev);
65f27f38 155static void e1000_reset_task(struct work_struct *work);
1da177e4 156static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 157static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
158 struct sk_buff *skb);
1da177e4
LT		 159
160static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 161static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164
6fdfef16 165#ifdef CONFIG_PM
b43fcd7d 166static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 167static int e1000_resume(struct pci_dev *pdev);
168#endif
c653e635 169static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 170
171#ifdef CONFIG_NET_POLL_CONTROLLER
172/* for netdump / net console */
173static void e1000_netpoll (struct net_device *netdev);
174#endif
175
1f753861
JB		 176#define COPYBREAK_DEFAULT 256
177static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
178module_param(copybreak, uint, 0644);
179MODULE_PARM_DESC(copybreak,
180 "Maximum size of packet that is copied to a new buffer on receive");
181
9026729b
AK		 182static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
183 pci_channel_state_t state);
184static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
185static void e1000_io_resume(struct pci_dev *pdev);
186
187static struct pci_error_handlers e1000_err_handler = {
188 .error_detected = e1000_io_error_detected,
189 .slot_reset = e1000_io_slot_reset,
190 .resume = e1000_io_resume,
191};
24025e4e 192
1da177e4
LT		 193static struct pci_driver e1000_driver = {
194 .name = e1000_driver_name,
195 .id_table = e1000_pci_tbl,
196 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove),
c4e24f01 198#ifdef CONFIG_PM
1da177e4 199 /* Power Managment Hooks */
1da177e4 200 .suspend = e1000_suspend,
c653e635 201 .resume = e1000_resume,
1da177e4 202#endif
9026729b
AK		 203 .shutdown = e1000_shutdown,
204 .err_handler = &e1000_err_handler
1da177e4
LT		 205};
206
207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
209MODULE_LICENSE("GPL");
210MODULE_VERSION(DRV_VERSION);
211
212static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
215
216/**
217 * e1000_init_module - Driver Registration Routine
218 *
219 * e1000_init_module is the first routine called when the driver is
220 * loaded. All it does is register with the PCI subsystem.
221 **/
222
64798845 223static int __init e1000_init_module(void)
1da177e4
LT		 224{
225 int ret;
226 printk(KERN_INFO "%s - version %s\n",
227 e1000_driver_string, e1000_driver_version);
228
229 printk(KERN_INFO "%s\n", e1000_copyright);
230
29917620 231 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 232 if (copybreak != COPYBREAK_DEFAULT) {
233 if (copybreak == 0)
234 printk(KERN_INFO "e1000: copybreak disabled\n");
235 else
236 printk(KERN_INFO "e1000: copybreak enabled for "
237 "packets <= %u bytes\n", copybreak);
238 }
1da177e4
LT		 239 return ret;
240}
241
242module_init(e1000_init_module);
243
244/**
245 * e1000_exit_module - Driver Exit Cleanup Routine
246 *
247 * e1000_exit_module is called just before the driver is removed
248 * from memory.
249 **/
250
64798845 251static void __exit e1000_exit_module(void)
1da177e4 252{
1da177e4
LT		 253 pci_unregister_driver(&e1000_driver);
254}
255
256module_exit(e1000_exit_module);
257
2db10a08
AK		 258static int e1000_request_irq(struct e1000_adapter *adapter)
259{
260 struct net_device *netdev = adapter->netdev;
3e18826c 261 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 262 int irq_flags = IRQF_SHARED;
263 int err;
2db10a08 264
e94bd23f
AK		 265 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
266 netdev);
267 if (err) {
2db10a08
AK		 268 DPRINTK(PROBE, ERR,
269 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 270 }
2db10a08
AK		 271
272 return err;
273}
274
275static void e1000_free_irq(struct e1000_adapter *adapter)
276{
277 struct net_device *netdev = adapter->netdev;
278
279 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 280}
281
1da177e4
LT		 282/**
283 * e1000_irq_disable - Mask off interrupt generation on the NIC
284 * @adapter: board private structure
285 **/
286
64798845 287static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 288{
1dc32918
JP		 289 struct e1000_hw *hw = &adapter->hw;
290
291 ew32(IMC, ~0);
292 E1000_WRITE_FLUSH();
1da177e4
LT		 293 synchronize_irq(adapter->pdev->irq);
294}
295
296/**
297 * e1000_irq_enable - Enable default interrupt generation settings
298 * @adapter: board private structure
299 **/
300
64798845 301static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 302{
1dc32918
JP		 303 struct e1000_hw *hw = &adapter->hw;
304
305 ew32(IMS, IMS_ENABLE_MASK);
306 E1000_WRITE_FLUSH();
1da177e4 307}
3ad2cc67 308
64798845 309static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 310{
1dc32918 311 struct e1000_hw *hw = &adapter->hw;
2d7edb92 312 struct net_device *netdev = adapter->netdev;
1dc32918 313 u16 vid = hw->mng_cookie.vlan_id;
406874a7 314 u16 old_vid = adapter->mng_vlan_id;
96838a40 315 if (adapter->vlgrp) {
5c15bdec 316 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 317 if (hw->mng_cookie.status &
2d7edb92
MC		 318 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
319 e1000_vlan_rx_add_vid(netdev, vid);
320 adapter->mng_vlan_id = vid;
321 } else
322 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 323
406874a7 324 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 325 (vid != old_vid) &&
5c15bdec 326 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 327 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 328 } else
329 adapter->mng_vlan_id = vid;
2d7edb92
MC		 330 }
331}
b55ccb35 332
64798845 333static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 334{
1dc32918
JP		 335 struct e1000_hw *hw = &adapter->hw;
336
0fccd0e9 337 if (adapter->en_mng_pt) {
1dc32918 338 u32 manc = er32(MANC);
0fccd0e9
JG		 339
340 /* disable hardware interception of ARP */
341 manc &= ~(E1000_MANC_ARP_EN);
342
1dc32918 343 ew32(MANC, manc);
0fccd0e9
JG		 344 }
345}
346
64798845 347static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 348{
1dc32918
JP		 349 struct e1000_hw *hw = &adapter->hw;
350
0fccd0e9 351 if (adapter->en_mng_pt) {
1dc32918 352 u32 manc = er32(MANC);
0fccd0e9
JG		 353
354 /* re-enable hardware interception of ARP */
355 manc |= E1000_MANC_ARP_EN;
356
1dc32918 357 ew32(MANC, manc);
0fccd0e9
JG		 358 }
359}
360
e0aac5a2
AK		 361/**
362 * e1000_configure - configure the hardware for RX and TX
363 * @adapter = private board structure
364 **/
365static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 366{
367 struct net_device *netdev = adapter->netdev;
2db10a08 368 int i;
1da177e4 369
db0ce50d 370 e1000_set_rx_mode(netdev);
1da177e4
LT		 371
372 e1000_restore_vlan(adapter);
0fccd0e9 373 e1000_init_manageability(adapter);
1da177e4
LT		 374
375 e1000_configure_tx(adapter);
376 e1000_setup_rctl(adapter);
377 e1000_configure_rx(adapter);
72d64a43
JK		 378 /* call E1000_DESC_UNUSED which always leaves
379 * at least 1 descriptor unused to make sure
380 * next_to_use != next_to_clean */
f56799ea 381 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 382 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 383 adapter->alloc_rx_buf(adapter, ring,
384 E1000_DESC_UNUSED(ring));
f56799ea 385 }
1da177e4 386
7bfa4816 387 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 388}
389
390int e1000_up(struct e1000_adapter *adapter)
391{
1dc32918
JP		 392 struct e1000_hw *hw = &adapter->hw;
393
e0aac5a2
AK		 394 /* hardware has been reset, we need to reload some things */
395 e1000_configure(adapter);
396
397 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 398
bea3348e 399 napi_enable(&adapter->napi);
c3570acb 400
5de55624
MC		 401 e1000_irq_enable(adapter);
402
4cb9be7a
JB		 403 netif_wake_queue(adapter->netdev);
404
79f3d399 405 /* fire a link change interrupt to start the watchdog */
1dc32918 406 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 407 return 0;
408}
409
79f05bf0
AK		 410/**
411 * e1000_power_up_phy - restore link in case the phy was powered down
412 * @adapter: address of board private structure
413 *
414 * The phy may be powered down to save power and turn off link when the
415 * driver is unloaded and wake on lan is not enabled (among others)
416 * *** this routine MUST be followed by a call to e1000_reset ***
417 *
418 **/
419
d658266e 420void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 421{
1dc32918 422 struct e1000_hw *hw = &adapter->hw;
406874a7 423 u16 mii_reg = 0;
79f05bf0
AK		 424
425 /* Just clear the power down bit to wake the phy back up */
1dc32918 426 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 427 /* according to the manual, the phy will retain its
428 * settings across a power-down/up cycle */
1dc32918 429 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 430 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 431 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 432 }
433}
434
435static void e1000_power_down_phy(struct e1000_adapter *adapter)
436{
1dc32918
JP		 437 struct e1000_hw *hw = &adapter->hw;
438
61c2505f 439 /* Power down the PHY so no link is implied when interface is down *
c3033b01 440 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 441 * (a) WoL is enabled
442 * (b) AMT is active
443 * (c) SoL/IDER session is active */
1dc32918
JP		 444 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
445 hw->media_type == e1000_media_type_copper) {
406874a7 446 u16 mii_reg = 0;
61c2505f 447
1dc32918 448 switch (hw->mac_type) {
61c2505f
BA		 449 case e1000_82540:
450 case e1000_82545:
451 case e1000_82545_rev_3:
452 case e1000_82546:
453 case e1000_82546_rev_3:
454 case e1000_82541:
455 case e1000_82541_rev_2:
456 case e1000_82547:
457 case e1000_82547_rev_2:
1dc32918 458 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 459 goto out;
460 break;
61c2505f
BA		 461 default:
462 goto out;
463 }
1dc32918 464 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 465 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 466 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 467 mdelay(1);
468 }
61c2505f
BA		 469out:
470 return;
79f05bf0
AK		 471}
472
64798845 473void e1000_down(struct e1000_adapter *adapter)
1da177e4 474{
a6c42322 475 struct e1000_hw *hw = &adapter->hw;
1da177e4 476 struct net_device *netdev = adapter->netdev;
a6c42322 477 u32 rctl, tctl;
1da177e4 478
1314bbf3
AK		 479 /* signal that we're down so the interrupt handler does not
480 * reschedule our watchdog timer */
481 set_bit(__E1000_DOWN, &adapter->flags);
482
a6c42322
JB		 483 /* disable receives in the hardware */
484 rctl = er32(RCTL);
485 ew32(RCTL, rctl & ~E1000_RCTL_EN);
486 /* flush and sleep below */
487
51851073 488 netif_tx_disable(netdev);
a6c42322
JB		 489
490 /* disable transmits in the hardware */
491 tctl = er32(TCTL);
492 tctl &= ~E1000_TCTL_EN;
493 ew32(TCTL, tctl);
494 /* flush both disables and wait for them to finish */
495 E1000_WRITE_FLUSH();
496 msleep(10);
497
bea3348e 498 napi_disable(&adapter->napi);
c3570acb 499
1da177e4 500 e1000_irq_disable(adapter);
c1605eb3 501
1da177e4
LT		 502 del_timer_sync(&adapter->tx_fifo_stall_timer);
503 del_timer_sync(&adapter->watchdog_timer);
504 del_timer_sync(&adapter->phy_info_timer);
505
7bfa4816 506 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 507 adapter->link_speed = 0;
508 adapter->link_duplex = 0;
509 netif_carrier_off(netdev);
1da177e4
LT		 510
511 e1000_reset(adapter);
581d708e
MC		 512 e1000_clean_all_tx_rings(adapter);
513 e1000_clean_all_rx_rings(adapter);
1da177e4 514}
1da177e4 515
64798845 516void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 517{
518 WARN_ON(in_interrupt());
519 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
520 msleep(1);
521 e1000_down(adapter);
522 e1000_up(adapter);
523 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 524}
525
64798845 526void e1000_reset(struct e1000_adapter *adapter)
1da177e4 527{
1dc32918 528 struct e1000_hw *hw = &adapter->hw;
406874a7 529 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 530 bool legacy_pba_adjust = false;
b7cb8c2c 531 u16 hwm;
1da177e4
LT		 532
533 /* Repartition Pba for greater than 9k mtu
534 * To take effect CTRL.RST is required.
535 */
536
1dc32918 537 switch (hw->mac_type) {
018ea44e
BA		 538 case e1000_82542_rev2_0:
539 case e1000_82542_rev2_1:
540 case e1000_82543:
541 case e1000_82544:
542 case e1000_82540:
543 case e1000_82541:
544 case e1000_82541_rev_2:
c3033b01 545 legacy_pba_adjust = true;
018ea44e
BA		 546 pba = E1000_PBA_48K;
547 break;
548 case e1000_82545:
549 case e1000_82545_rev_3:
550 case e1000_82546:
551 case e1000_82546_rev_3:
552 pba = E1000_PBA_48K;
553 break;
2d7edb92 554 case e1000_82547:
0e6ef3e0 555 case e1000_82547_rev_2:
c3033b01 556 legacy_pba_adjust = true;
2d7edb92
MC		 557 pba = E1000_PBA_30K;
558 break;
018ea44e
BA		 559 case e1000_undefined:
560 case e1000_num_macs:
2d7edb92
MC		 561 break;
562 }
563
c3033b01 564 if (legacy_pba_adjust) {
b7cb8c2c 565 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 566 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 567
1dc32918 568 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 569 adapter->tx_fifo_head = 0;
570 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
571 adapter->tx_fifo_size =
572 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
573 atomic_set(&adapter->tx_fifo_stall, 0);
574 }
b7cb8c2c 575 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 576 /* adjust PBA for jumbo frames */
1dc32918 577 ew32(PBA, pba);
018ea44e
BA		 578
579 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 580 * large enough to accommodate two full transmit packets,
018ea44e 581 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 582 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 583 * one full receive packet and is similarly rounded up and
584 * expressed in KB. */
1dc32918 585 pba = er32(PBA);
018ea44e
BA		 586 /* upper 16 bits has Tx packet buffer allocation size in KB */
587 tx_space = pba >> 16;
588 /* lower 16 bits has Rx packet buffer allocation size in KB */
589 pba &= 0xffff;
b7cb8c2c
JB		 590 /*
591 * the tx fifo also stores 16 bytes of information about the tx
592 * but don't include ethernet FCS because hardware appends it
593 */
594 min_tx_space = (hw->max_frame_size +
595 sizeof(struct e1000_tx_desc) -
596 ETH_FCS_LEN) * 2;
9099cfb9 597 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 598 min_tx_space >>= 10;
b7cb8c2c
JB		 599 /* software strips receive CRC, so leave room for it */
600 min_rx_space = hw->max_frame_size;
9099cfb9 601 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 602 min_rx_space >>= 10;
603
604 /* If current Tx allocation is less than the min Tx FIFO size,
605 * and the min Tx FIFO size is less than the current Rx FIFO
606 * allocation, take space away from current Rx allocation */
607 if (tx_space < min_tx_space &&
608 ((min_tx_space - tx_space) < pba)) {
609 pba = pba - (min_tx_space - tx_space);
610
611 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 612 switch (hw->mac_type) {
018ea44e
BA		 613 case e1000_82545 ... e1000_82546_rev_3:
614 pba &= ~(E1000_PBA_8K - 1);
615 break;
616 default:
617 break;
618 }
619
620 /* if short on rx space, rx wins and must trump tx
621 * adjustment or use Early Receive if available */
1532ecea
JB		 622 if (pba < min_rx_space)
623 pba = min_rx_space;
018ea44e 624 }
1da177e4 625 }
2d7edb92 626
1dc32918 627 ew32(PBA, pba);
1da177e4 628
b7cb8c2c
JB		 629 /*
630 * flow control settings:
631 * The high water mark must be low enough to fit one full frame
632 * (or the size used for early receive) above it in the Rx FIFO.
633 * Set it to the lower of:
634 * - 90% of the Rx FIFO size, and
635 * - the full Rx FIFO size minus the early receive size (for parts
636 * with ERT support assuming ERT set to E1000_ERT_2048), or
637 * - the full Rx FIFO size minus one full frame
638 */
639 hwm = min(((pba << 10) * 9 / 10),
640 ((pba << 10) - hw->max_frame_size));
641
642 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
643 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 644 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 645 hw->fc_send_xon = 1;
646 hw->fc = hw->original_fc;
1da177e4 647
2d7edb92 648 /* Allow time for pending master requests to run */
1dc32918
JP		 649 e1000_reset_hw(hw);
650 if (hw->mac_type >= e1000_82544)
651 ew32(WUC, 0);
09ae3e88 652
1dc32918 653 if (e1000_init_hw(hw))
1da177e4 654 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 655 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 656
657 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 658 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 659 hw->autoneg == 1 &&
660 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
661 u32 ctrl = er32(CTRL);
3d5460a0
JB		 662 /* clear phy power management bit if we are in gig only mode,
663 * which if enabled will attempt negotiation to 100Mb, which
664 * can cause a loss of link at power off or driver unload */
665 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 666 ew32(CTRL, ctrl);
3d5460a0
JB		 667 }
668
1da177e4 669 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 670 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 671
1dc32918
JP		 672 e1000_reset_adaptive(hw);
673 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 674
0fccd0e9 675 e1000_release_manageability(adapter);
1da177e4
LT		 676}
677
67b3c27c
AK		 678/**
679 * Dump the eeprom for users having checksum issues
680 **/
b4ea895d 681static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 682{
683 struct net_device *netdev = adapter->netdev;
684 struct ethtool_eeprom eeprom;
685 const struct ethtool_ops *ops = netdev->ethtool_ops;
686 u8 *data;
687 int i;
688 u16 csum_old, csum_new = 0;
689
690 eeprom.len = ops->get_eeprom_len(netdev);
691 eeprom.offset = 0;
692
693 data = kmalloc(eeprom.len, GFP_KERNEL);
694 if (!data) {
695 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
696 " data\n");
697 return;
698 }
699
700 ops->get_eeprom(netdev, &eeprom, data);
701
702 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
703 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
704 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
705 csum_new += data[i] + (data[i + 1] << 8);
706 csum_new = EEPROM_SUM - csum_new;
707
708 printk(KERN_ERR "/*********************/\n");
709 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
710 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
711
712 printk(KERN_ERR "Offset Values\n");
713 printk(KERN_ERR "======== ======\n");
714 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
715
716 printk(KERN_ERR "Include this output when contacting your support "
717 "provider.\n");
718 printk(KERN_ERR "This is not a software error! Something bad "
719 "happened to your hardware or\n");
720 printk(KERN_ERR "EEPROM image. Ignoring this "
721 "problem could result in further problems,\n");
722 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
723 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
724 "which is invalid\n");
725 printk(KERN_ERR "and requires you to set the proper MAC "
726 "address manually before continuing\n");
727 printk(KERN_ERR "to enable this network device.\n");
728 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
729 "to your hardware vendor\n");
63cd31f6 730 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 731 printk(KERN_ERR "/*********************/\n");
732
733 kfree(data);
734}
735
81250297
TI		 736/**
737 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
738 * @pdev: PCI device information struct
739 *
740 * Return true if an adapter needs ioport resources
741 **/
742static int e1000_is_need_ioport(struct pci_dev *pdev)
743{
744 switch (pdev->device) {
745 case E1000_DEV_ID_82540EM:
746 case E1000_DEV_ID_82540EM_LOM:
747 case E1000_DEV_ID_82540EP:
748 case E1000_DEV_ID_82540EP_LOM:
749 case E1000_DEV_ID_82540EP_LP:
750 case E1000_DEV_ID_82541EI:
751 case E1000_DEV_ID_82541EI_MOBILE:
752 case E1000_DEV_ID_82541ER:
753 case E1000_DEV_ID_82541ER_LOM:
754 case E1000_DEV_ID_82541GI:
755 case E1000_DEV_ID_82541GI_LF:
756 case E1000_DEV_ID_82541GI_MOBILE:
757 case E1000_DEV_ID_82544EI_COPPER:
758 case E1000_DEV_ID_82544EI_FIBER:
759 case E1000_DEV_ID_82544GC_COPPER:
760 case E1000_DEV_ID_82544GC_LOM:
761 case E1000_DEV_ID_82545EM_COPPER:
762 case E1000_DEV_ID_82545EM_FIBER:
763 case E1000_DEV_ID_82546EB_COPPER:
764 case E1000_DEV_ID_82546EB_FIBER:
765 case E1000_DEV_ID_82546EB_QUAD_COPPER:
766 return true;
767 default:
768 return false;
769 }
770}
771
0e7614bc
SH		 772static const struct net_device_ops e1000_netdev_ops = {
773 .ndo_open = e1000_open,
774 .ndo_stop = e1000_close,
00829823 775 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 776 .ndo_get_stats = e1000_get_stats,
777 .ndo_set_rx_mode = e1000_set_rx_mode,
778 .ndo_set_mac_address = e1000_set_mac,
779 .ndo_tx_timeout = e1000_tx_timeout,
780 .ndo_change_mtu = e1000_change_mtu,
781 .ndo_do_ioctl = e1000_ioctl,
782 .ndo_validate_addr = eth_validate_addr,
783
784 .ndo_vlan_rx_register = e1000_vlan_rx_register,
785 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
786 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
787#ifdef CONFIG_NET_POLL_CONTROLLER
788 .ndo_poll_controller = e1000_netpoll,
789#endif
790};
791
1da177e4
LT		 792/**
793 * e1000_probe - Device Initialization Routine
794 * @pdev: PCI device information struct
795 * @ent: entry in e1000_pci_tbl
796 *
797 * Returns 0 on success, negative on failure
798 *
799 * e1000_probe initializes an adapter identified by a pci_dev structure.
800 * The OS initialization, configuring of the adapter private structure,
801 * and a hardware reset occur.
802 **/
1dc32918
JP		 803static int __devinit e1000_probe(struct pci_dev *pdev,
804 const struct pci_device_id *ent)
1da177e4
LT		 805{
806 struct net_device *netdev;
807 struct e1000_adapter *adapter;
1dc32918 808 struct e1000_hw *hw;
2d7edb92 809
1da177e4 810 static int cards_found = 0;
120cd576 811 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 812 int i, err, pci_using_dac;
406874a7
JP		 813 u16 eeprom_data = 0;
814 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 815 int bars, need_ioport;
0795af57 816
81250297
TI		 817 /* do not allocate ioport bars when not needed */
818 need_ioport = e1000_is_need_ioport(pdev);
819 if (need_ioport) {
820 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
821 err = pci_enable_device(pdev);
822 } else {
823 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 824 err = pci_enable_device_mem(pdev);
81250297 825 }
c7be73bc 826 if (err)
1da177e4
LT		 827 return err;
828
6a35528a
YH		 829 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
830 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 831 pci_using_dac = 1;
832 } else {
284901a9 833 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 834 if (err) {
284901a9 835 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 836 if (err) {
837 E1000_ERR("No usable DMA configuration, "
838 "aborting\n");
839 goto err_dma;
840 }
1da177e4
LT		 841 }
842 pci_using_dac = 0;
843 }
844
81250297 845 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 846 if (err)
6dd62ab0 847 goto err_pci_reg;
1da177e4
LT		 848
849 pci_set_master(pdev);
850
6dd62ab0 851 err = -ENOMEM;
1da177e4 852 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 853 if (!netdev)
1da177e4 854 goto err_alloc_etherdev;
1da177e4 855
1da177e4
LT		 856 SET_NETDEV_DEV(netdev, &pdev->dev);
857
858 pci_set_drvdata(pdev, netdev);
60490fe0 859 adapter = netdev_priv(netdev);
1da177e4
LT		 860 adapter->netdev = netdev;
861 adapter->pdev = pdev;
1da177e4 862 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 863 adapter->bars = bars;
864 adapter->need_ioport = need_ioport;
1da177e4 865
1dc32918
JP		 866 hw = &adapter->hw;
867 hw->back = adapter;
868
6dd62ab0 869 err = -EIO;
275f165f 870 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 871 if (!hw->hw_addr)
1da177e4 872 goto err_ioremap;
1da177e4 873
81250297
TI		 874 if (adapter->need_ioport) {
875 for (i = BAR_1; i <= BAR_5; i++) {
876 if (pci_resource_len(pdev, i) == 0)
877 continue;
878 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
879 hw->io_base = pci_resource_start(pdev, i);
880 break;
881 }
1da177e4
LT		 882 }
883 }
884
0e7614bc 885 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 886 e1000_set_ethtool_ops(netdev);
1da177e4 887 netdev->watchdog_timeo = 5 * HZ;
bea3348e 888 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 889
0eb5a34c 890 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 891
1da177e4
LT		 892 adapter->bd_number = cards_found;
893
894 /* setup the private structure */
895
c7be73bc
JP		 896 err = e1000_sw_init(adapter);
897 if (err)
1da177e4
LT		 898 goto err_sw_init;
899
6dd62ab0 900 err = -EIO;
2d7edb92 901
1dc32918 902 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 903 netdev->features = NETIF_F_SG |
904 NETIF_F_HW_CSUM |
905 NETIF_F_HW_VLAN_TX |
906 NETIF_F_HW_VLAN_RX |
907 NETIF_F_HW_VLAN_FILTER;
908 }
909
1dc32918
JP		 910 if ((hw->mac_type >= e1000_82544) &&
911 (hw->mac_type != e1000_82547))
1da177e4 912 netdev->features |= NETIF_F_TSO;
2d7edb92 913
96838a40 914 if (pci_using_dac)
1da177e4
LT		 915 netdev->features |= NETIF_F_HIGHDMA;
916
20501a69 917 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 918 netdev->vlan_features |= NETIF_F_HW_CSUM;
919 netdev->vlan_features |= NETIF_F_SG;
920
1dc32918 921 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 922
cd94dd0b 923 /* initialize eeprom parameters */
1dc32918 924 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 925 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 926 goto err_eeprom;
cd94dd0b
AK		 927 }
928
96838a40 929 /* before reading the EEPROM, reset the controller to
1da177e4 930 * put the device in a known good starting state */
96838a40 931
1dc32918 932 e1000_reset_hw(hw);
1da177e4
LT		 933
934 /* make sure the EEPROM is good */
1dc32918 935 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 936 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 937 e1000_dump_eeprom(adapter);
938 /*
939 * set MAC address to all zeroes to invalidate and temporary
940 * disable this device for the user. This blocks regular
941 * traffic while still permitting ethtool ioctls from reaching
942 * the hardware as well as allowing the user to run the
943 * interface after manually setting a hw addr using
944 * `ip set address`
945 */
1dc32918 946 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 947 } else {
948 /* copy the MAC address out of the EEPROM */
1dc32918 949 if (e1000_read_mac_addr(hw))
67b3c27c 950 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 951 }
67b3c27c 952 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 953 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
954 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 955
67b3c27c 956 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 957 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 958
1dc32918 959 e1000_get_bus_info(hw);
1da177e4
LT		 960
961 init_timer(&adapter->tx_fifo_stall_timer);
962 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 963 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 964
965 init_timer(&adapter->watchdog_timer);
966 adapter->watchdog_timer.function = &e1000_watchdog;
967 adapter->watchdog_timer.data = (unsigned long) adapter;
968
1da177e4
LT		 969 init_timer(&adapter->phy_info_timer);
970 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 971 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 972
65f27f38 973 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 974
1da177e4
LT		 975 e1000_check_options(adapter);
976
977 /* Initial Wake on LAN setting
978 * If APM wake is enabled in the EEPROM,
979 * enable the ACPI Magic Packet filter
980 */
981
1dc32918 982 switch (hw->mac_type) {
1da177e4
LT		 983 case e1000_82542_rev2_0:
984 case e1000_82542_rev2_1:
985 case e1000_82543:
986 break;
987 case e1000_82544:
1dc32918 988 e1000_read_eeprom(hw,
1da177e4
LT		 989 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
990 eeprom_apme_mask = E1000_EEPROM_82544_APM;
991 break;
992 case e1000_82546:
993 case e1000_82546_rev_3:
1dc32918
JP		 994 if (er32(STATUS) & E1000_STATUS_FUNC_1){
995 e1000_read_eeprom(hw,
1da177e4
LT		 996 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
997 break;
998 }
999 /* Fall Through */
1000 default:
1dc32918 1001 e1000_read_eeprom(hw,
1da177e4
LT		 1002 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1003 break;
1004 }
96838a40 1005 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1006 adapter->eeprom_wol |= E1000_WUFC_MAG;
1007
1008 /* now that we have the eeprom settings, apply the special cases
1009 * where the eeprom may be wrong or the board simply won't support
1010 * wake on lan on a particular port */
1011 switch (pdev->device) {
1012 case E1000_DEV_ID_82546GB_PCIE:
1013 adapter->eeprom_wol = 0;
1014 break;
1015 case E1000_DEV_ID_82546EB_FIBER:
1016 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1017 /* Wake events only supported on port A for dual fiber
1018 * regardless of eeprom setting */
1dc32918 1019 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1020 adapter->eeprom_wol = 0;
1021 break;
1022 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1023 /* if quad port adapter, disable WoL on all but port A */
1024 if (global_quad_port_a != 0)
1025 adapter->eeprom_wol = 0;
1026 else
1027 adapter->quad_port_a = 1;
1028 /* Reset for multiple quad port adapters */
1029 if (++global_quad_port_a == 4)
1030 global_quad_port_a = 0;
1031 break;
1032 }
1033
1034 /* initialize the wol settings based on the eeprom settings */
1035 adapter->wol = adapter->eeprom_wol;
de126489 1036 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1037
fb3d47d4 1038 /* print bus type/speed/width info */
fb3d47d4 1039 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1532ecea
JB		 1040 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1041 ((hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
fb3d47d4
JK		 1042 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1043 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1044 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1532ecea 1045 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : "32-bit"));
fb3d47d4 1046
e174961c 1047 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1048
1da177e4
LT		 1049 /* reset the hardware with the new settings */
1050 e1000_reset(adapter);
1051
416b5d10 1052 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1053 err = register_netdev(netdev);
1054 if (err)
416b5d10 1055 goto err_register;
1314bbf3 1056
eb62efd2
JB		 1057 /* carrier off reporting is important to ethtool even BEFORE open */
1058 netif_carrier_off(netdev);
1059
1da177e4
LT		 1060 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1061
1062 cards_found++;
1063 return 0;
1064
1065err_register:
6dd62ab0 1066err_eeprom:
1532ecea 1067 e1000_phy_hw_reset(hw);
6dd62ab0 1068
1dc32918
JP		 1069 if (hw->flash_address)
1070 iounmap(hw->flash_address);
6dd62ab0
VA		 1071 kfree(adapter->tx_ring);
1072 kfree(adapter->rx_ring);
1da177e4 1073err_sw_init:
1dc32918 1074 iounmap(hw->hw_addr);
1da177e4
LT		 1075err_ioremap:
1076 free_netdev(netdev);
1077err_alloc_etherdev:
81250297 1078 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1079err_pci_reg:
1080err_dma:
1081 pci_disable_device(pdev);
1da177e4
LT		 1082 return err;
1083}
1084
1085/**
1086 * e1000_remove - Device Removal Routine
1087 * @pdev: PCI device information struct
1088 *
1089 * e1000_remove is called by the PCI subsystem to alert the driver
1090 * that it should release a PCI device. The could be caused by a
1091 * Hot-Plug event, or because the driver is going to be removed from
1092 * memory.
1093 **/
1094
64798845 1095static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1096{
1097 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1098 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1099 struct e1000_hw *hw = &adapter->hw;
1da177e4 1100
baa34745
JB		 1101 set_bit(__E1000_DOWN, &adapter->flags);
1102 del_timer_sync(&adapter->tx_fifo_stall_timer);
1103 del_timer_sync(&adapter->watchdog_timer);
1104 del_timer_sync(&adapter->phy_info_timer);
1105
28e53bdd 1106 cancel_work_sync(&adapter->reset_task);
be2b28ed 1107
0fccd0e9 1108 e1000_release_manageability(adapter);
1da177e4 1109
bea3348e
SH		 1110 unregister_netdev(netdev);
1111
1532ecea 1112 e1000_phy_hw_reset(hw);
1da177e4 1113
24025e4e
MC		 1114 kfree(adapter->tx_ring);
1115 kfree(adapter->rx_ring);
24025e4e 1116
1dc32918
JP		 1117 iounmap(hw->hw_addr);
1118 if (hw->flash_address)
1119 iounmap(hw->flash_address);
81250297 1120 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1121
1122 free_netdev(netdev);
1123
1124 pci_disable_device(pdev);
1125}
1126
1127/**
1128 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1129 * @adapter: board private structure to initialize
1130 *
1131 * e1000_sw_init initializes the Adapter private data structure.
1132 * Fields are initialized based on PCI device information and
1133 * OS network device settings (MTU size).
1134 **/
1135
64798845 1136static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1137{
1138 struct e1000_hw *hw = &adapter->hw;
1139 struct net_device *netdev = adapter->netdev;
1140 struct pci_dev *pdev = adapter->pdev;
1141
1142 /* PCI config space info */
1143
1144 hw->vendor_id = pdev->vendor;
1145 hw->device_id = pdev->device;
1146 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1147 hw->subsystem_id = pdev->subsystem_device;
44c10138 1148 hw->revision_id = pdev->revision;
1da177e4
LT		 1149
1150 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1151
eb0f8054 1152 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1153 hw->max_frame_size = netdev->mtu +
1154 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1155 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1156
1157 /* identify the MAC */
1158
96838a40 1159 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1160 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1161 return -EIO;
1162 }
1163
96838a40 1164 switch (hw->mac_type) {
1da177e4
LT		 1165 default:
1166 break;
1167 case e1000_82541:
1168 case e1000_82547:
1169 case e1000_82541_rev_2:
1170 case e1000_82547_rev_2:
1171 hw->phy_init_script = 1;
1172 break;
1173 }
1174
1175 e1000_set_media_type(hw);
1176
c3033b01
JP		 1177 hw->wait_autoneg_complete = false;
1178 hw->tbi_compatibility_en = true;
1179 hw->adaptive_ifs = true;
1da177e4
LT		 1180
1181 /* Copper options */
1182
96838a40 1183 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1184 hw->mdix = AUTO_ALL_MODES;
c3033b01 1185 hw->disable_polarity_correction = false;
1da177e4
LT		 1186 hw->master_slave = E1000_MASTER_SLAVE;
1187 }
1188
f56799ea
JK		 1189 adapter->num_tx_queues = 1;
1190 adapter->num_rx_queues = 1;
581d708e
MC		 1191
1192 if (e1000_alloc_queues(adapter)) {
1193 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1194 return -ENOMEM;
1195 }
1196
47313054 1197 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1198 e1000_irq_disable(adapter);
1199
1da177e4 1200 spin_lock_init(&adapter->stats_lock);
1da177e4 1201
1314bbf3
AK		 1202 set_bit(__E1000_DOWN, &adapter->flags);
1203
1da177e4
LT		 1204 return 0;
1205}
1206
581d708e
MC		 1207/**
1208 * e1000_alloc_queues - Allocate memory for all rings
1209 * @adapter: board private structure to initialize
1210 *
1211 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1212 * number of queues at compile-time.
581d708e
MC		 1213 **/
1214
64798845 1215static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1216{
1c7e5b12
YB		 1217 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1218 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1219 if (!adapter->tx_ring)
1220 return -ENOMEM;
581d708e 1221
1c7e5b12
YB		 1222 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1223 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1224 if (!adapter->rx_ring) {
1225 kfree(adapter->tx_ring);
1226 return -ENOMEM;
1227 }
581d708e 1228
581d708e
MC		 1229 return E1000_SUCCESS;
1230}
1231
1da177e4
LT		 1232/**
1233 * e1000_open - Called when a network interface is made active
1234 * @netdev: network interface device structure
1235 *
1236 * Returns 0 on success, negative value on failure
1237 *
1238 * The open entry point is called when a network interface is made
1239 * active by the system (IFF_UP). At this point all resources needed
1240 * for transmit and receive operations are allocated, the interrupt
1241 * handler is registered with the OS, the watchdog timer is started,
1242 * and the stack is notified that the interface is ready.
1243 **/
1244
64798845 1245static int e1000_open(struct net_device *netdev)
1da177e4 1246{
60490fe0 1247 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1248 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1249 int err;
1250
2db10a08 1251 /* disallow open during test */
1314bbf3 1252 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1253 return -EBUSY;
1254
eb62efd2
JB		 1255 netif_carrier_off(netdev);
1256
1da177e4 1257 /* allocate transmit descriptors */
e0aac5a2
AK		 1258 err = e1000_setup_all_tx_resources(adapter);
1259 if (err)
1da177e4
LT		 1260 goto err_setup_tx;
1261
1262 /* allocate receive descriptors */
e0aac5a2 1263 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1264 if (err)
e0aac5a2 1265 goto err_setup_rx;
b5bf28cd 1266
79f05bf0
AK		 1267 e1000_power_up_phy(adapter);
1268
2d7edb92 1269 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1270 if ((hw->mng_cookie.status &
2d7edb92
MC		 1271 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1272 e1000_update_mng_vlan(adapter);
1273 }
1da177e4 1274
e0aac5a2
AK		 1275 /* before we allocate an interrupt, we must be ready to handle it.
1276 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1277 * as soon as we call pci_request_irq, so we have to setup our
1278 * clean_rx handler before we do so. */
1279 e1000_configure(adapter);
1280
1281 err = e1000_request_irq(adapter);
1282 if (err)
1283 goto err_req_irq;
1284
1285 /* From here on the code is the same as e1000_up() */
1286 clear_bit(__E1000_DOWN, &adapter->flags);
1287
bea3348e 1288 napi_enable(&adapter->napi);
47313054 1289
e0aac5a2
AK		 1290 e1000_irq_enable(adapter);
1291
076152d5
BH		 1292 netif_start_queue(netdev);
1293
e0aac5a2 1294 /* fire a link status change interrupt to start the watchdog */
1dc32918 1295 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1296
1da177e4
LT		 1297 return E1000_SUCCESS;
1298
b5bf28cd 1299err_req_irq:
e0aac5a2 1300 e1000_power_down_phy(adapter);
581d708e 1301 e1000_free_all_rx_resources(adapter);
1da177e4 1302err_setup_rx:
581d708e 1303 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1304err_setup_tx:
1305 e1000_reset(adapter);
1306
1307 return err;
1308}
1309
1310/**
1311 * e1000_close - Disables a network interface
1312 * @netdev: network interface device structure
1313 *
1314 * Returns 0, this is not allowed to fail
1315 *
1316 * The close entry point is called when an interface is de-activated
1317 * by the OS. The hardware is still under the drivers control, but
1318 * needs to be disabled. A global MAC reset is issued to stop the
1319 * hardware, and all transmit and receive resources are freed.
1320 **/
1321
64798845 1322static int e1000_close(struct net_device *netdev)
1da177e4 1323{
60490fe0 1324 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1325 struct e1000_hw *hw = &adapter->hw;
1da177e4 1326
2db10a08 1327 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1328 e1000_down(adapter);
79f05bf0 1329 e1000_power_down_phy(adapter);
2db10a08 1330 e1000_free_irq(adapter);
1da177e4 1331
581d708e
MC		 1332 e1000_free_all_tx_resources(adapter);
1333 e1000_free_all_rx_resources(adapter);
1da177e4 1334
4666560a
BA		 1335 /* kill manageability vlan ID if supported, but not if a vlan with
1336 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1337 if ((hw->mng_cookie.status &
4666560a
BA		 1338 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1339 !(adapter->vlgrp &&
5c15bdec 1340 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1341 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1342 }
b55ccb35 1343
1da177e4
LT		 1344 return 0;
1345}
1346
1347/**
1348 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1349 * @adapter: address of board private structure
2d7edb92
MC		 1350 * @start: address of beginning of memory
1351 * @len: length of memory
1da177e4 1352 **/
64798845
JP		 1353static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1354 unsigned long len)
1da177e4 1355{
1dc32918 1356 struct e1000_hw *hw = &adapter->hw;
e982f17c 1357 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1358 unsigned long end = begin + len;
1359
2648345f
MC		 1360 /* First rev 82545 and 82546 need to not allow any memory
1361 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1362 if (hw->mac_type == e1000_82545 ||
1363 hw->mac_type == e1000_82546) {
c3033b01 1364 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1365 }
1366
c3033b01 1367 return true;
1da177e4
LT		 1368}
1369
1370/**
1371 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1372 * @adapter: board private structure
581d708e 1373 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1374 *
1375 * Return 0 on success, negative on failure
1376 **/
1377
64798845
JP		 1378static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1379 struct e1000_tx_ring *txdr)
1da177e4 1380{
1da177e4
LT		 1381 struct pci_dev *pdev = adapter->pdev;
1382 int size;
1383
1384 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1385 txdr->buffer_info = vmalloc(size);
96838a40 1386 if (!txdr->buffer_info) {
2648345f
MC		 1387 DPRINTK(PROBE, ERR,
1388 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1389 return -ENOMEM;
1390 }
1391 memset(txdr->buffer_info, 0, size);
1392
1393 /* round up to nearest 4K */
1394
1395 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1396 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1397
1398 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1399 if (!txdr->desc) {
1da177e4 1400setup_tx_desc_die:
1da177e4 1401 vfree(txdr->buffer_info);
2648345f
MC		 1402 DPRINTK(PROBE, ERR,
1403 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1404 return -ENOMEM;
1405 }
1406
2648345f 1407 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1408 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1409 void *olddesc = txdr->desc;
1410 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1411 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1412 "at %p\n", txdr->size, txdr->desc);
1413 /* Try again, without freeing the previous */
1da177e4 1414 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1415 /* Failed allocation, critical failure */
96838a40 1416 if (!txdr->desc) {
1da177e4
LT		 1417 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1418 goto setup_tx_desc_die;
1419 }
1420
1421 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1422 /* give up */
2648345f
MC		 1423 pci_free_consistent(pdev, txdr->size, txdr->desc,
1424 txdr->dma);
1da177e4
LT		 1425 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1426 DPRINTK(PROBE, ERR,
2648345f
MC		 1427 "Unable to allocate aligned memory "
1428 "for the transmit descriptor ring\n");
1da177e4
LT		 1429 vfree(txdr->buffer_info);
1430 return -ENOMEM;
1431 } else {
2648345f 1432 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1433 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1434 }
1435 }
1436 memset(txdr->desc, 0, txdr->size);
1437
1438 txdr->next_to_use = 0;
1439 txdr->next_to_clean = 0;
1440
1441 return 0;
1442}
1443
581d708e
MC		 1444/**
1445 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1446 * (Descriptors) for all queues
1447 * @adapter: board private structure
1448 *
581d708e
MC		 1449 * Return 0 on success, negative on failure
1450 **/
1451
64798845 1452int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1453{
1454 int i, err = 0;
1455
f56799ea 1456 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1457 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1458 if (err) {
1459 DPRINTK(PROBE, ERR,
1460 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1461 for (i-- ; i >= 0; i--)
1462 e1000_free_tx_resources(adapter,
1463 &adapter->tx_ring[i]);
581d708e
MC		 1464 break;
1465 }
1466 }
1467
1468 return err;
1469}
1470
1da177e4
LT		 1471/**
1472 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1473 * @adapter: board private structure
1474 *
1475 * Configure the Tx unit of the MAC after a reset.
1476 **/
1477
64798845 1478static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1479{
406874a7 1480 u64 tdba;
581d708e 1481 struct e1000_hw *hw = &adapter->hw;
1532ecea 1482 u32 tdlen, tctl, tipg;
406874a7 1483 u32 ipgr1, ipgr2;
1da177e4
LT		 1484
1485 /* Setup the HW Tx Head and Tail descriptor pointers */
1486
f56799ea 1487 switch (adapter->num_tx_queues) {
24025e4e
MC		 1488 case 1:
1489 default:
581d708e
MC		 1490 tdba = adapter->tx_ring[0].dma;
1491 tdlen = adapter->tx_ring[0].count *
1492 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1493 ew32(TDLEN, tdlen);
1494 ew32(TDBAH, (tdba >> 32));
1495 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1496 ew32(TDT, 0);
1497 ew32(TDH, 0);
6a951698
AK		 1498 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1499 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1500 break;
1501 }
1da177e4
LT		 1502
1503 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1504 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1505 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1506 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1507 else
1508 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1509
581d708e 1510 switch (hw->mac_type) {
1da177e4
LT		 1511 case e1000_82542_rev2_0:
1512 case e1000_82542_rev2_1:
1513 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1514 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1515 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1516 break;
1517 default:
0fadb059
JK		 1518 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1519 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1520 break;
1da177e4 1521 }
0fadb059
JK		 1522 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1523 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1524 ew32(TIPG, tipg);
1da177e4
LT		 1525
1526 /* Set the Tx Interrupt Delay register */
1527
1dc32918 1528 ew32(TIDV, adapter->tx_int_delay);
581d708e 1529 if (hw->mac_type >= e1000_82540)
1dc32918 1530 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1531
1532 /* Program the Transmit Control Register */
1533
1dc32918 1534 tctl = er32(TCTL);
1da177e4 1535 tctl &= ~E1000_TCTL_CT;
7e6c9861 1536 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1537 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1538
581d708e 1539 e1000_config_collision_dist(hw);
1da177e4
LT		 1540
1541 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1542 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1543
1544 /* only set IDE if we are delaying interrupts using the timers */
1545 if (adapter->tx_int_delay)
1546 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1547
581d708e 1548 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1549 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1550 else
1551 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1552
1553 /* Cache if we're 82544 running in PCI-X because we'll
1554 * need this to apply a workaround later in the send path. */
581d708e
MC		 1555 if (hw->mac_type == e1000_82544 &&
1556 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1557 adapter->pcix_82544 = 1;
7e6c9861 1558
1dc32918 1559 ew32(TCTL, tctl);
7e6c9861 1560
1da177e4
LT		 1561}
1562
1563/**
1564 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1565 * @adapter: board private structure
581d708e 1566 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1567 *
1568 * Returns 0 on success, negative on failure
1569 **/
1570
64798845
JP		 1571static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1572 struct e1000_rx_ring *rxdr)
1da177e4 1573{
1da177e4 1574 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1575 int size, desc_len;
1da177e4
LT		 1576
1577 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1578 rxdr->buffer_info = vmalloc(size);
581d708e 1579 if (!rxdr->buffer_info) {
2648345f
MC		 1580 DPRINTK(PROBE, ERR,
1581 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1582 return -ENOMEM;
1583 }
1584 memset(rxdr->buffer_info, 0, size);
1585
1532ecea 1586 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1587
1da177e4
LT		 1588 /* Round up to nearest 4K */
1589
2d7edb92 1590 rxdr->size = rxdr->count * desc_len;
9099cfb9 1591 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1592
1593 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1594
581d708e
MC		 1595 if (!rxdr->desc) {
1596 DPRINTK(PROBE, ERR,
1597 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1598setup_rx_desc_die:
1da177e4
LT		 1599 vfree(rxdr->buffer_info);
1600 return -ENOMEM;
1601 }
1602
2648345f 1603 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1604 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1605 void *olddesc = rxdr->desc;
1606 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1607 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1608 "at %p\n", rxdr->size, rxdr->desc);
1609 /* Try again, without freeing the previous */
1da177e4 1610 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1611 /* Failed allocation, critical failure */
581d708e 1612 if (!rxdr->desc) {
1da177e4 1613 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1614 DPRINTK(PROBE, ERR,
1615 "Unable to allocate memory "
1616 "for the receive descriptor ring\n");
1da177e4
LT		 1617 goto setup_rx_desc_die;
1618 }
1619
1620 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1621 /* give up */
2648345f
MC		 1622 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1623 rxdr->dma);
1da177e4 1624 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1625 DPRINTK(PROBE, ERR,
1626 "Unable to allocate aligned memory "
1627 "for the receive descriptor ring\n");
581d708e 1628 goto setup_rx_desc_die;
1da177e4 1629 } else {
2648345f 1630 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1631 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1632 }
1633 }
1634 memset(rxdr->desc, 0, rxdr->size);
1635
1636 rxdr->next_to_clean = 0;
1637 rxdr->next_to_use = 0;
edbbb3ca 1638 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1639
1640 return 0;
1641}
1642
581d708e
MC		 1643/**
1644 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1645 * (Descriptors) for all queues
1646 * @adapter: board private structure
1647 *
581d708e
MC		 1648 * Return 0 on success, negative on failure
1649 **/
1650
64798845 1651int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1652{
1653 int i, err = 0;
1654
f56799ea 1655 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1656 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1657 if (err) {
1658 DPRINTK(PROBE, ERR,
1659 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1660 for (i-- ; i >= 0; i--)
1661 e1000_free_rx_resources(adapter,
1662 &adapter->rx_ring[i]);
581d708e
MC		 1663 break;
1664 }
1665 }
1666
1667 return err;
1668}
1669
1da177e4 1670/**
2648345f 1671 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1672 * @adapter: Board private structure
1673 **/
64798845 1674static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1675{
1dc32918 1676 struct e1000_hw *hw = &adapter->hw;
630b25cd 1677 u32 rctl;
1da177e4 1678
1dc32918 1679 rctl = er32(RCTL);
1da177e4
LT		 1680
1681 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1682
1683 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1684 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1685 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1686
1dc32918 1687 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1688 rctl |= E1000_RCTL_SBP;
1689 else
1690 rctl &= ~E1000_RCTL_SBP;
1691
2d7edb92
MC		 1692 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1693 rctl &= ~E1000_RCTL_LPE;
1694 else
1695 rctl |= E1000_RCTL_LPE;
1696
1da177e4 1697 /* Setup buffer sizes */
9e2feace
AK		 1698 rctl &= ~E1000_RCTL_SZ_4096;
1699 rctl |= E1000_RCTL_BSEX;
1700 switch (adapter->rx_buffer_len) {
1701 case E1000_RXBUFFER_256:
1702 rctl |= E1000_RCTL_SZ_256;
1703 rctl &= ~E1000_RCTL_BSEX;
1704 break;
1705 case E1000_RXBUFFER_512:
1706 rctl |= E1000_RCTL_SZ_512;
1707 rctl &= ~E1000_RCTL_BSEX;
1708 break;
1709 case E1000_RXBUFFER_1024:
1710 rctl |= E1000_RCTL_SZ_1024;
1711 rctl &= ~E1000_RCTL_BSEX;
1712 break;
a1415ee6
JK		 1713 case E1000_RXBUFFER_2048:
1714 default:
1715 rctl |= E1000_RCTL_SZ_2048;
1716 rctl &= ~E1000_RCTL_BSEX;
1717 break;
1718 case E1000_RXBUFFER_4096:
1719 rctl |= E1000_RCTL_SZ_4096;
1720 break;
1721 case E1000_RXBUFFER_8192:
1722 rctl |= E1000_RCTL_SZ_8192;
1723 break;
1724 case E1000_RXBUFFER_16384:
1725 rctl |= E1000_RCTL_SZ_16384;
1726 break;
2d7edb92
MC		 1727 }
1728
1dc32918 1729 ew32(RCTL, rctl);
1da177e4
LT		 1730}
1731
1732/**
1733 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1734 * @adapter: board private structure
1735 *
1736 * Configure the Rx unit of the MAC after a reset.
1737 **/
1738
64798845 1739static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1740{
406874a7 1741 u64 rdba;
581d708e 1742 struct e1000_hw *hw = &adapter->hw;
1532ecea 1743 u32 rdlen, rctl, rxcsum;
2d7edb92 1744
edbbb3ca
JB		 1745 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1746 rdlen = adapter->rx_ring[0].count *
1747 sizeof(struct e1000_rx_desc);
1748 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1749 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1750 } else {
1751 rdlen = adapter->rx_ring[0].count *
1752 sizeof(struct e1000_rx_desc);
1753 adapter->clean_rx = e1000_clean_rx_irq;
1754 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1755 }
1da177e4
LT		 1756
1757 /* disable receives while setting up the descriptors */
1dc32918
JP		 1758 rctl = er32(RCTL);
1759 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1760
1761 /* set the Receive Delay Timer Register */
1dc32918 1762 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1763
581d708e 1764 if (hw->mac_type >= e1000_82540) {
1dc32918 1765 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1766 if (adapter->itr_setting != 0)
1dc32918 1767 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1768 }
1769
581d708e
MC		 1770 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1771 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1772 switch (adapter->num_rx_queues) {
24025e4e
MC		 1773 case 1:
1774 default:
581d708e 1775 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1776 ew32(RDLEN, rdlen);
1777 ew32(RDBAH, (rdba >> 32));
1778 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1779 ew32(RDT, 0);
1780 ew32(RDH, 0);
6a951698
AK		 1781 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1782 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1783 break;
24025e4e
MC		 1784 }
1785
1da177e4 1786 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1787 if (hw->mac_type >= e1000_82543) {
1dc32918 1788 rxcsum = er32(RXCSUM);
630b25cd 1789 if (adapter->rx_csum)
2d7edb92 1790 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1791 else
2d7edb92 1792 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1793 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1794 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1795 }
1796
1797 /* Enable Receives */
1dc32918 1798 ew32(RCTL, rctl);
1da177e4
LT		 1799}
1800
1801/**
581d708e 1802 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1803 * @adapter: board private structure
581d708e 1804 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1805 *
1806 * Free all transmit software resources
1807 **/
1808
64798845
JP		 1809static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1810 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1811{
1812 struct pci_dev *pdev = adapter->pdev;
1813
581d708e 1814 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1815
581d708e
MC		 1816 vfree(tx_ring->buffer_info);
1817 tx_ring->buffer_info = NULL;
1da177e4 1818
581d708e 1819 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1820
581d708e
MC		 1821 tx_ring->desc = NULL;
1822}
1823
1824/**
1825 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1826 * @adapter: board private structure
1827 *
1828 * Free all transmit software resources
1829 **/
1830
64798845 1831void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1832{
1833 int i;
1834
f56799ea 1835 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1836 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1837}
1838
64798845
JP		 1839static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1840 struct e1000_buffer *buffer_info)
1da177e4 1841{
602c0554
AD		 1842 if (buffer_info->dma) {
1843 if (buffer_info->mapped_as_page)
1844 pci_unmap_page(adapter->pdev, buffer_info->dma,
1845 buffer_info->length, PCI_DMA_TODEVICE);
1846 else
1847 pci_unmap_single(adapter->pdev, buffer_info->dma,
1848 buffer_info->length,
1849 PCI_DMA_TODEVICE);
1850 buffer_info->dma = 0;
1851 }
a9ebadd6 1852 if (buffer_info->skb) {
1da177e4 1853 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1854 buffer_info->skb = NULL;
1855 }
37e73df8 1856 buffer_info->time_stamp = 0;
a9ebadd6 1857 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1858}
1859
1860/**
1861 * e1000_clean_tx_ring - Free Tx Buffers
1862 * @adapter: board private structure
581d708e 1863 * @tx_ring: ring to be cleaned
1da177e4
LT		 1864 **/
1865
64798845
JP		 1866static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1867 struct e1000_tx_ring *tx_ring)
1da177e4 1868{
1dc32918 1869 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1870 struct e1000_buffer *buffer_info;
1871 unsigned long size;
1872 unsigned int i;
1873
1874 /* Free all the Tx ring sk_buffs */
1875
96838a40 1876 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1877 buffer_info = &tx_ring->buffer_info[i];
1878 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1879 }
1880
1881 size = sizeof(struct e1000_buffer) * tx_ring->count;
1882 memset(tx_ring->buffer_info, 0, size);
1883
1884 /* Zero out the descriptor ring */
1885
1886 memset(tx_ring->desc, 0, tx_ring->size);
1887
1888 tx_ring->next_to_use = 0;
1889 tx_ring->next_to_clean = 0;
fd803241 1890 tx_ring->last_tx_tso = 0;
1da177e4 1891
1dc32918
JP		 1892 writel(0, hw->hw_addr + tx_ring->tdh);
1893 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 1894}
1895
1896/**
1897 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1898 * @adapter: board private structure
1899 **/
1900
64798845 1901static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 1902{
1903 int i;
1904
f56799ea 1905 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1906 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1907}
1908
1909/**
1910 * e1000_free_rx_resources - Free Rx Resources
1911 * @adapter: board private structure
581d708e 1912 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1913 *
1914 * Free all receive software resources
1915 **/
1916
64798845
JP		 1917static void e1000_free_rx_resources(struct e1000_adapter *adapter,
1918 struct e1000_rx_ring *rx_ring)
1da177e4 1919{
1da177e4
LT		 1920 struct pci_dev *pdev = adapter->pdev;
1921
581d708e 1922 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1923
1924 vfree(rx_ring->buffer_info);
1925 rx_ring->buffer_info = NULL;
1926
1927 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1928
1929 rx_ring->desc = NULL;
1930}
1931
1932/**
581d708e 1933 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1934 * @adapter: board private structure
581d708e
MC		 1935 *
1936 * Free all receive software resources
1937 **/
1938
64798845 1939void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1940{
1941 int i;
1942
f56799ea 1943 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1944 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1945}
1946
1947/**
1948 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1949 * @adapter: board private structure
1950 * @rx_ring: ring to free buffers from
1da177e4
LT		 1951 **/
1952
64798845
JP		 1953static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
1954 struct e1000_rx_ring *rx_ring)
1da177e4 1955{
1dc32918 1956 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1957 struct e1000_buffer *buffer_info;
1958 struct pci_dev *pdev = adapter->pdev;
1959 unsigned long size;
630b25cd 1960 unsigned int i;
1da177e4
LT		 1961
1962 /* Free all the Rx ring sk_buffs */
96838a40 1963 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1964 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 1965 if (buffer_info->dma &&
1966 adapter->clean_rx == e1000_clean_rx_irq) {
1967 pci_unmap_single(pdev, buffer_info->dma,
1968 buffer_info->length,
1969 PCI_DMA_FROMDEVICE);
1970 } else if (buffer_info->dma &&
1971 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
1972 pci_unmap_page(pdev, buffer_info->dma,
1973 buffer_info->length,
1974 PCI_DMA_FROMDEVICE);
679be3ba 1975 }
1da177e4 1976
679be3ba 1977 buffer_info->dma = 0;
edbbb3ca
JB		 1978 if (buffer_info->page) {
1979 put_page(buffer_info->page);
1980 buffer_info->page = NULL;
1981 }
679be3ba 1982 if (buffer_info->skb) {
1da177e4
LT		 1983 dev_kfree_skb(buffer_info->skb);
1984 buffer_info->skb = NULL;
997f5cbd 1985 }
1da177e4
LT		 1986 }
1987
edbbb3ca
JB		 1988 /* there also may be some cached data from a chained receive */
1989 if (rx_ring->rx_skb_top) {
1990 dev_kfree_skb(rx_ring->rx_skb_top);
1991 rx_ring->rx_skb_top = NULL;
1992 }
1993
1da177e4
LT		 1994 size = sizeof(struct e1000_buffer) * rx_ring->count;
1995 memset(rx_ring->buffer_info, 0, size);
1996
1997 /* Zero out the descriptor ring */
1da177e4
LT		 1998 memset(rx_ring->desc, 0, rx_ring->size);
1999
2000 rx_ring->next_to_clean = 0;
2001 rx_ring->next_to_use = 0;
2002
1dc32918
JP		 2003 writel(0, hw->hw_addr + rx_ring->rdh);
2004 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2005}
2006
2007/**
2008 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2009 * @adapter: board private structure
2010 **/
2011
64798845 2012static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2013{
2014 int i;
2015
f56799ea 2016 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2017 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2018}
2019
2020/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2021 * and memory write and invalidate disabled for certain operations
2022 */
64798845 2023static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2024{
1dc32918 2025 struct e1000_hw *hw = &adapter->hw;
1da177e4 2026 struct net_device *netdev = adapter->netdev;
406874a7 2027 u32 rctl;
1da177e4 2028
1dc32918 2029 e1000_pci_clear_mwi(hw);
1da177e4 2030
1dc32918 2031 rctl = er32(RCTL);
1da177e4 2032 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2033 ew32(RCTL, rctl);
2034 E1000_WRITE_FLUSH();
1da177e4
LT		 2035 mdelay(5);
2036
96838a40 2037 if (netif_running(netdev))
581d708e 2038 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2039}
2040
64798845 2041static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2042{
1dc32918 2043 struct e1000_hw *hw = &adapter->hw;
1da177e4 2044 struct net_device *netdev = adapter->netdev;
406874a7 2045 u32 rctl;
1da177e4 2046
1dc32918 2047 rctl = er32(RCTL);
1da177e4 2048 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2049 ew32(RCTL, rctl);
2050 E1000_WRITE_FLUSH();
1da177e4
LT		 2051 mdelay(5);
2052
1dc32918
JP		 2053 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2054 e1000_pci_set_mwi(hw);
1da177e4 2055
96838a40 2056 if (netif_running(netdev)) {
72d64a43
JK		 2057 /* No need to loop, because 82542 supports only 1 queue */
2058 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2059 e1000_configure_rx(adapter);
72d64a43 2060 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2061 }
2062}
2063
2064/**
2065 * e1000_set_mac - Change the Ethernet Address of the NIC
2066 * @netdev: network interface device structure
2067 * @p: pointer to an address structure
2068 *
2069 * Returns 0 on success, negative on failure
2070 **/
2071
64798845 2072static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2073{
60490fe0 2074 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2075 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2076 struct sockaddr *addr = p;
2077
96838a40 2078 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2079 return -EADDRNOTAVAIL;
2080
2081 /* 82542 2.0 needs to be in reset to write receive address registers */
2082
1dc32918 2083 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2084 e1000_enter_82542_rst(adapter);
2085
2086 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2087 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2088
1dc32918 2089 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2090
1dc32918 2091 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2092 e1000_leave_82542_rst(adapter);
2093
2094 return 0;
2095}
2096
2097/**
db0ce50d 2098 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2099 * @netdev: network interface device structure
2100 *
db0ce50d
PM		 2101 * The set_rx_mode entry point is called whenever the unicast or multicast
2102 * address lists or the network interface flags are updated. This routine is
2103 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2104 * promiscuous mode, and all-multi behavior.
2105 **/
2106
64798845 2107static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2108{
60490fe0 2109 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2110 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2111 struct netdev_hw_addr *ha;
2112 bool use_uc = false;
db0ce50d 2113 struct dev_addr_list *mc_ptr;
406874a7
JP		 2114 u32 rctl;
2115 u32 hash_value;
868d5309 2116 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2117 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2118 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2119
2120 if (!mcarray) {
2121 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2122 return;
2123 }
cd94dd0b 2124
2648345f
MC		 2125 /* Check for Promiscuous and All Multicast modes */
2126
1dc32918 2127 rctl = er32(RCTL);
1da177e4 2128
96838a40 2129 if (netdev->flags & IFF_PROMISC) {
1da177e4 2130 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2131 rctl &= ~E1000_RCTL_VFE;
1da177e4 2132 } else {
1532ecea 2133 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2134 rctl |= E1000_RCTL_MPE;
1532ecea 2135 else
746b9f02 2136 rctl &= ~E1000_RCTL_MPE;
1532ecea
JB		 2137 /* Enable VLAN filter if there is a VLAN */
2138 if (adapter->vlgrp)
2139 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2140 }
2141
31278e71 2142 if (netdev->uc.count > rar_entries - 1) {
db0ce50d
PM		 2143 rctl |= E1000_RCTL_UPE;
2144 } else if (!(netdev->flags & IFF_PROMISC)) {
2145 rctl &= ~E1000_RCTL_UPE;
ccffad25 2146 use_uc = true;
1da177e4
LT		 2147 }
2148
1dc32918 2149 ew32(RCTL, rctl);
1da177e4
LT		 2150
2151 /* 82542 2.0 needs to be in reset to write receive address registers */
2152
96838a40 2153 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2154 e1000_enter_82542_rst(adapter);
2155
db0ce50d
PM		 2156 /* load the first 14 addresses into the exact filters 1-14. Unicast
2157 * addresses take precedence to avoid disabling unicast filtering
2158 * when possible.
2159 *
1da177e4
LT		 2160 * RAR 0 is used for the station MAC adddress
2161 * if there are not 14 addresses, go ahead and clear the filters
2162 */
ccffad25
JP		 2163 i = 1;
2164 if (use_uc)
31278e71 2165 list_for_each_entry(ha, &netdev->uc.list, list) {
ccffad25
JP		 2166 if (i == rar_entries)
2167 break;
2168 e1000_rar_set(hw, ha->addr, i++);
2169 }
2170
2171 WARN_ON(i == rar_entries);
2172
1da177e4
LT		 2173 mc_ptr = netdev->mc_list;
2174
ccffad25
JP		 2175 for (; i < rar_entries; i++) {
2176 if (mc_ptr) {
db0ce50d 2177 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2178 mc_ptr = mc_ptr->next;
2179 } else {
2180 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2181 E1000_WRITE_FLUSH();
1da177e4 2182 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2183 E1000_WRITE_FLUSH();
1da177e4
LT		 2184 }
2185 }
2186
1da177e4
LT		 2187 /* load any remaining addresses into the hash table */
2188
96838a40 2189 for (; mc_ptr; mc_ptr = mc_ptr->next) {
81c52285 2190 u32 hash_reg, hash_bit, mta;
db0ce50d 2191 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
81c52285
JB		 2192 hash_reg = (hash_value >> 5) & 0x7F;
2193 hash_bit = hash_value & 0x1F;
2194 mta = (1 << hash_bit);
2195 mcarray[hash_reg] |= mta;
1da177e4
LT		 2196 }
2197
81c52285
JB		 2198 /* write the hash table completely, write from bottom to avoid
2199 * both stupid write combining chipsets, and flushing each write */
2200 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2201 /*
2202 * If we are on an 82544 has an errata where writing odd
2203 * offsets overwrites the previous even offset, but writing
2204 * backwards over the range solves the issue by always
2205 * writing the odd offset first
2206 */
2207 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2208 }
2209 E1000_WRITE_FLUSH();
2210
96838a40 2211 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2212 e1000_leave_82542_rst(adapter);
81c52285
JB		 2213
2214 kfree(mcarray);
1da177e4
LT		 2215}
2216
2217/* Need to wait a few seconds after link up to get diagnostic information from
2218 * the phy */
2219
64798845 2220static void e1000_update_phy_info(unsigned long data)
1da177e4 2221{
e982f17c 2222 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2223 struct e1000_hw *hw = &adapter->hw;
2224 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2225}
2226
2227/**
2228 * e1000_82547_tx_fifo_stall - Timer Call-back
2229 * @data: pointer to adapter cast into an unsigned long
2230 **/
2231
64798845 2232static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2233{
e982f17c 2234 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2235 struct e1000_hw *hw = &adapter->hw;
1da177e4 2236 struct net_device *netdev = adapter->netdev;
406874a7 2237 u32 tctl;
1da177e4 2238
96838a40 2239 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2240 if ((er32(TDT) == er32(TDH)) &&
2241 (er32(TDFT) == er32(TDFH)) &&
2242 (er32(TDFTS) == er32(TDFHS))) {
2243 tctl = er32(TCTL);
2244 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2245 ew32(TDFT, adapter->tx_head_addr);
2246 ew32(TDFH, adapter->tx_head_addr);
2247 ew32(TDFTS, adapter->tx_head_addr);
2248 ew32(TDFHS, adapter->tx_head_addr);
2249 ew32(TCTL, tctl);
2250 E1000_WRITE_FLUSH();
1da177e4
LT		 2251
2252 adapter->tx_fifo_head = 0;
2253 atomic_set(&adapter->tx_fifo_stall, 0);
2254 netif_wake_queue(netdev);
baa34745 2255 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT		 2256 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2257 }
2258 }
2259}
2260
be0f0719
JB		 2261static bool e1000_has_link(struct e1000_adapter *adapter)
2262{
2263 struct e1000_hw *hw = &adapter->hw;
2264 bool link_active = false;
be0f0719
JB		 2265
2266 /* get_link_status is set on LSC (link status) interrupt or
2267 * rx sequence error interrupt. get_link_status will stay
2268 * false until the e1000_check_for_link establishes link
2269 * for copper adapters ONLY
2270 */
2271 switch (hw->media_type) {
2272 case e1000_media_type_copper:
2273 if (hw->get_link_status) {
120a5d0d 2274 e1000_check_for_link(hw);
be0f0719
JB		 2275 link_active = !hw->get_link_status;
2276 } else {
2277 link_active = true;
2278 }
2279 break;
2280 case e1000_media_type_fiber:
120a5d0d 2281 e1000_check_for_link(hw);
be0f0719
JB		 2282 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2283 break;
2284 case e1000_media_type_internal_serdes:
120a5d0d 2285 e1000_check_for_link(hw);
be0f0719
JB		 2286 link_active = hw->serdes_has_link;
2287 break;
2288 default:
2289 break;
2290 }
2291
2292 return link_active;
2293}
2294
1da177e4
LT		 2295/**
2296 * e1000_watchdog - Timer Call-back
2297 * @data: pointer to adapter cast into an unsigned long
2298 **/
64798845 2299static void e1000_watchdog(unsigned long data)
1da177e4 2300{
e982f17c 2301 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2302 struct e1000_hw *hw = &adapter->hw;
1da177e4 2303 struct net_device *netdev = adapter->netdev;
545c67c0 2304 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2305 u32 link, tctl;
90fb5135 2306
be0f0719
JB		 2307 link = e1000_has_link(adapter);
2308 if ((netif_carrier_ok(netdev)) && link)
2309 goto link_up;
1da177e4 2310
96838a40
JB		 2311 if (link) {
2312 if (!netif_carrier_ok(netdev)) {
406874a7 2313 u32 ctrl;
c3033b01 2314 bool txb2b = true;
be0f0719 2315 /* update snapshot of PHY registers on LSC */
1dc32918 2316 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2317 &adapter->link_speed,
2318 &adapter->link_duplex);
2319
1dc32918 2320 ctrl = er32(CTRL);
b30c4d8f
JK		 2321 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2322 "Flow Control: %s\n",
2323 netdev->name,
2324 adapter->link_speed,
2325 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2326 "Full Duplex" : "Half Duplex",
2327 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2328 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2329 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2330 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2331
7e6c9861
JK		 2332 /* tweak tx_queue_len according to speed/duplex
2333 * and adjust the timeout factor */
66a2b0a3
JK		 2334 netdev->tx_queue_len = adapter->tx_queue_len;
2335 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2336 switch (adapter->link_speed) {
2337 case SPEED_10:
c3033b01 2338 txb2b = false;
7e6c9861 2339 netdev->tx_queue_len = 10;
be0f0719 2340 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2341 break;
2342 case SPEED_100:
c3033b01 2343 txb2b = false;
7e6c9861
JK		 2344 netdev->tx_queue_len = 100;
2345 /* maybe add some timeout factor ? */
2346 break;
2347 }
2348
1532ecea 2349 /* enable transmits in the hardware */
1dc32918 2350 tctl = er32(TCTL);
7e6c9861 2351 tctl |= E1000_TCTL_EN;
1dc32918 2352 ew32(TCTL, tctl);
66a2b0a3 2353
1da177e4 2354 netif_carrier_on(netdev);
baa34745
JB		 2355 if (!test_bit(__E1000_DOWN, &adapter->flags))
2356 mod_timer(&adapter->phy_info_timer,
2357 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2358 adapter->smartspeed = 0;
2359 }
2360 } else {
96838a40 2361 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2362 adapter->link_speed = 0;
2363 adapter->link_duplex = 0;
b30c4d8f
JK		 2364 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2365 netdev->name);
1da177e4 2366 netif_carrier_off(netdev);
baa34745
JB		 2367
2368 if (!test_bit(__E1000_DOWN, &adapter->flags))
2369 mod_timer(&adapter->phy_info_timer,
2370 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2371 }
2372
2373 e1000_smartspeed(adapter);
2374 }
2375
be0f0719 2376link_up:
1da177e4
LT		 2377 e1000_update_stats(adapter);
2378
1dc32918 2379 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2380 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2381 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2382 adapter->colc_old = adapter->stats.colc;
2383
2384 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2385 adapter->gorcl_old = adapter->stats.gorcl;
2386 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2387 adapter->gotcl_old = adapter->stats.gotcl;
2388
1dc32918 2389 e1000_update_adaptive(hw);
1da177e4 2390
f56799ea 2391 if (!netif_carrier_ok(netdev)) {
581d708e 2392 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2393 /* We've lost link, so the controller stops DMA,
2394 * but we've got queued Tx work that's never going
2395 * to get done, so reset controller to flush Tx.
2396 * (Do the reset outside of interrupt context). */
87041639
JK		 2397 adapter->tx_timeout_count++;
2398 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2399 /* return immediately since reset is imminent */
2400 return;
1da177e4
LT		 2401 }
2402 }
2403
1da177e4 2404 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2405 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2406
2648345f 2407 /* Force detection of hung controller every watchdog period */
c3033b01 2408 adapter->detect_tx_hung = true;
1da177e4
LT		 2409
2410 /* Reset the timer */
baa34745
JB		 2411 if (!test_bit(__E1000_DOWN, &adapter->flags))
2412 mod_timer(&adapter->watchdog_timer,
2413 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2414}
2415
835bb129
JB		 2416enum latency_range {
2417 lowest_latency = 0,
2418 low_latency = 1,
2419 bulk_latency = 2,
2420 latency_invalid = 255
2421};
2422
2423/**
2424 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2425 * @adapter: pointer to adapter
2426 * @itr_setting: current adapter->itr
2427 * @packets: the number of packets during this measurement interval
2428 * @bytes: the number of bytes during this measurement interval
2429 *
835bb129
JB		 2430 * Stores a new ITR value based on packets and byte
2431 * counts during the last interrupt. The advantage of per interrupt
2432 * computation is faster updates and more accurate ITR for the current
2433 * traffic pattern. Constants in this function were computed
2434 * based on theoretical maximum wire speed and thresholds were set based
2435 * on testing data as well as attempting to minimize response time
2436 * while increasing bulk throughput.
2437 * this functionality is controlled by the InterruptThrottleRate module
2438 * parameter (see e1000_param.c)
835bb129
JB		 2439 **/
2440static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2441 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2442{
2443 unsigned int retval = itr_setting;
2444 struct e1000_hw *hw = &adapter->hw;
2445
2446 if (unlikely(hw->mac_type < e1000_82540))
2447 goto update_itr_done;
2448
2449 if (packets == 0)
2450 goto update_itr_done;
2451
835bb129
JB		 2452 switch (itr_setting) {
2453 case lowest_latency:
2b65326e
JB		 2454 /* jumbo frames get bulk treatment*/
2455 if (bytes/packets > 8000)
2456 retval = bulk_latency;
2457 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2458 retval = low_latency;
2459 break;
2460 case low_latency: /* 50 usec aka 20000 ints/s */
2461 if (bytes > 10000) {
2b65326e
JB		 2462 /* jumbo frames need bulk latency setting */
2463 if (bytes/packets > 8000)
2464 retval = bulk_latency;
2465 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2466 retval = bulk_latency;
2467 else if ((packets > 35))
2468 retval = lowest_latency;
2b65326e
JB		 2469 } else if (bytes/packets > 2000)
2470 retval = bulk_latency;
2471 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2472 retval = lowest_latency;
2473 break;
2474 case bulk_latency: /* 250 usec aka 4000 ints/s */
2475 if (bytes > 25000) {
2476 if (packets > 35)
2477 retval = low_latency;
2b65326e
JB		 2478 } else if (bytes < 6000) {
2479 retval = low_latency;
835bb129
JB		 2480 }
2481 break;
2482 }
2483
2484update_itr_done:
2485 return retval;
2486}
2487
2488static void e1000_set_itr(struct e1000_adapter *adapter)
2489{
2490 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2491 u16 current_itr;
2492 u32 new_itr = adapter->itr;
835bb129
JB		 2493
2494 if (unlikely(hw->mac_type < e1000_82540))
2495 return;
2496
2497 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2498 if (unlikely(adapter->link_speed != SPEED_1000)) {
2499 current_itr = 0;
2500 new_itr = 4000;
2501 goto set_itr_now;
2502 }
2503
2504 adapter->tx_itr = e1000_update_itr(adapter,
2505 adapter->tx_itr,
2506 adapter->total_tx_packets,
2507 adapter->total_tx_bytes);
2b65326e
JB		 2508 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2509 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2510 adapter->tx_itr = low_latency;
2511
835bb129
JB		 2512 adapter->rx_itr = e1000_update_itr(adapter,
2513 adapter->rx_itr,
2514 adapter->total_rx_packets,
2515 adapter->total_rx_bytes);
2b65326e
JB		 2516 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2517 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2518 adapter->rx_itr = low_latency;
835bb129
JB		 2519
2520 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2521
835bb129
JB		 2522 switch (current_itr) {
2523 /* counts and packets in update_itr are dependent on these numbers */
2524 case lowest_latency:
2525 new_itr = 70000;
2526 break;
2527 case low_latency:
2528 new_itr = 20000; /* aka hwitr = ~200 */
2529 break;
2530 case bulk_latency:
2531 new_itr = 4000;
2532 break;
2533 default:
2534 break;
2535 }
2536
2537set_itr_now:
2538 if (new_itr != adapter->itr) {
2539 /* this attempts to bias the interrupt rate towards Bulk
2540 * by adding intermediate steps when interrupt rate is
2541 * increasing */
2542 new_itr = new_itr > adapter->itr ?
2543 min(adapter->itr + (new_itr >> 2), new_itr) :
2544 new_itr;
2545 adapter->itr = new_itr;
1dc32918 2546 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2547 }
2548
2549 return;
2550}
2551
1da177e4
LT		 2552#define E1000_TX_FLAGS_CSUM 0x00000001
2553#define E1000_TX_FLAGS_VLAN 0x00000002
2554#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2555#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2556#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2557#define E1000_TX_FLAGS_VLAN_SHIFT 16
2558
64798845
JP		 2559static int e1000_tso(struct e1000_adapter *adapter,
2560 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2561{
1da177e4 2562 struct e1000_context_desc *context_desc;
545c67c0 2563 struct e1000_buffer *buffer_info;
1da177e4 2564 unsigned int i;
406874a7
JP		 2565 u32 cmd_length = 0;
2566 u16 ipcse = 0, tucse, mss;
2567 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2568 int err;
2569
89114afd 2570 if (skb_is_gso(skb)) {
1da177e4
LT		 2571 if (skb_header_cloned(skb)) {
2572 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2573 if (err)
2574 return err;
2575 }
2576
ab6a5bb6 2577 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2578 mss = skb_shinfo(skb)->gso_size;
60828236 2579 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2580 struct iphdr *iph = ip_hdr(skb);
2581 iph->tot_len = 0;
2582 iph->check = 0;
aa8223c7
ACM		 2583 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2584 iph->daddr, 0,
2585 IPPROTO_TCP,
2586 0);
2d7edb92 2587 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2588 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2589 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2590 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2591 tcp_hdr(skb)->check =
0660e03f
ACM		 2592 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2593 &ipv6_hdr(skb)->daddr,
2594 0, IPPROTO_TCP, 0);
2d7edb92 2595 ipcse = 0;
2d7edb92 2596 }
bbe735e4 2597 ipcss = skb_network_offset(skb);
eddc9ec5 2598 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2599 tucss = skb_transport_offset(skb);
aa8223c7 2600 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2601 tucse = 0;
2602
2603 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2604 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2605
581d708e
MC		 2606 i = tx_ring->next_to_use;
2607 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2608 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2609
2610 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2611 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2612 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2613 context_desc->upper_setup.tcp_fields.tucss = tucss;
2614 context_desc->upper_setup.tcp_fields.tucso = tucso;
2615 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2616 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2617 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2618 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2619
545c67c0 2620 buffer_info->time_stamp = jiffies;
a9ebadd6 2621 buffer_info->next_to_watch = i;
545c67c0 2622
581d708e
MC		 2623 if (++i == tx_ring->count) i = 0;
2624 tx_ring->next_to_use = i;
1da177e4 2625
c3033b01 2626 return true;
1da177e4 2627 }
c3033b01 2628 return false;
1da177e4
LT		 2629}
2630
64798845
JP		 2631static bool e1000_tx_csum(struct e1000_adapter *adapter,
2632 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2633{
2634 struct e1000_context_desc *context_desc;
545c67c0 2635 struct e1000_buffer *buffer_info;
1da177e4 2636 unsigned int i;
406874a7 2637 u8 css;
3ed30676 2638 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2639
3ed30676
DG		 2640 if (skb->ip_summed != CHECKSUM_PARTIAL)
2641 return false;
1da177e4 2642
3ed30676 2643 switch (skb->protocol) {
09640e63 2644 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2645 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2646 cmd_len |= E1000_TXD_CMD_TCP;
2647 break;
09640e63 2648 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2649 /* XXX not handling all IPV6 headers */
2650 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2651 cmd_len |= E1000_TXD_CMD_TCP;
2652 break;
2653 default:
2654 if (unlikely(net_ratelimit()))
2655 DPRINTK(DRV, WARNING,
2656 "checksum_partial proto=%x!\n", skb->protocol);
2657 break;
2658 }
1da177e4 2659
3ed30676 2660 css = skb_transport_offset(skb);
1da177e4 2661
3ed30676
DG		 2662 i = tx_ring->next_to_use;
2663 buffer_info = &tx_ring->buffer_info[i];
2664 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2665
3ed30676
DG		 2666 context_desc->lower_setup.ip_config = 0;
2667 context_desc->upper_setup.tcp_fields.tucss = css;
2668 context_desc->upper_setup.tcp_fields.tucso =
2669 css + skb->csum_offset;
2670 context_desc->upper_setup.tcp_fields.tucse = 0;
2671 context_desc->tcp_seg_setup.data = 0;
2672 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2673
3ed30676
DG		 2674 buffer_info->time_stamp = jiffies;
2675 buffer_info->next_to_watch = i;
1da177e4 2676
3ed30676
DG		 2677 if (unlikely(++i == tx_ring->count)) i = 0;
2678 tx_ring->next_to_use = i;
2679
2680 return true;
1da177e4
LT		 2681}
2682
2683#define E1000_MAX_TXD_PWR 12
2684#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2685
64798845
JP		 2686static int e1000_tx_map(struct e1000_adapter *adapter,
2687 struct e1000_tx_ring *tx_ring,
2688 struct sk_buff *skb, unsigned int first,
2689 unsigned int max_per_txd, unsigned int nr_frags,
2690 unsigned int mss)
1da177e4 2691{
1dc32918 2692 struct e1000_hw *hw = &adapter->hw;
602c0554 2693 struct pci_dev *pdev = adapter->pdev;
37e73df8 2694 struct e1000_buffer *buffer_info;
d20b606c 2695 unsigned int len = skb_headlen(skb);
602c0554 2696 unsigned int offset = 0, size, count = 0, i;
1da177e4 2697 unsigned int f;
1da177e4
LT		 2698
2699 i = tx_ring->next_to_use;
2700
96838a40 2701 while (len) {
37e73df8 2702 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2703 size = min(len, max_per_txd);
fd803241
JK		 2704 /* Workaround for Controller erratum --
2705 * descriptor for non-tso packet in a linear SKB that follows a
2706 * tso gets written back prematurely before the data is fully
0f15a8fa 2707 * DMA'd to the controller */
fd803241 2708 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2709 !skb_is_gso(skb)) {
fd803241
JK		 2710 tx_ring->last_tx_tso = 0;
2711 size -= 4;
2712 }
2713
1da177e4
LT		 2714 /* Workaround for premature desc write-backs
2715 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2716 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2717 size -= 4;
97338bde
MC		 2718 /* work-around for errata 10 and it applies
2719 * to all controllers in PCI-X mode
2720 * The fix is to make sure that the first descriptor of a
2721 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2722 */
1dc32918 2723 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2724 (size > 2015) && count == 0))
2725 size = 2015;
96838a40 2726
1da177e4
LT		 2727 /* Workaround for potential 82544 hang in PCI-X. Avoid
2728 * terminating buffers within evenly-aligned dwords. */
96838a40 2729 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2730 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2731 size > 4))
2732 size -= 4;
2733
2734 buffer_info->length = size;
cdd7549e 2735 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2736 buffer_info->time_stamp = jiffies;
602c0554
AD		 2737 buffer_info->mapped_as_page = false;
2738 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
2739 size, PCI_DMA_TODEVICE);
2740 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2741 goto dma_error;
a9ebadd6 2742 buffer_info->next_to_watch = i;
1da177e4
LT		 2743
2744 len -= size;
2745 offset += size;
2746 count++;
37e73df8
AD		 2747 if (len) {
2748 i++;
2749 if (unlikely(i == tx_ring->count))
2750 i = 0;
2751 }
1da177e4
LT		 2752 }
2753
96838a40 2754 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2755 struct skb_frag_struct *frag;
2756
2757 frag = &skb_shinfo(skb)->frags[f];
2758 len = frag->size;
602c0554 2759 offset = frag->page_offset;
1da177e4 2760
96838a40 2761 while (len) {
37e73df8
AD		 2762 i++;
2763 if (unlikely(i == tx_ring->count))
2764 i = 0;
2765
1da177e4
LT		 2766 buffer_info = &tx_ring->buffer_info[i];
2767 size = min(len, max_per_txd);
1da177e4
LT		 2768 /* Workaround for premature desc write-backs
2769 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2770 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2771 size -= 4;
1da177e4
LT		 2772 /* Workaround for potential 82544 hang in PCI-X.
2773 * Avoid terminating buffers within evenly-aligned
2774 * dwords. */
96838a40 2775 if (unlikely(adapter->pcix_82544 &&
8fce4731
JB		 2776 !((unsigned long)(page_to_phys(frag->page) + offset
2777 + size - 1) & 4) &&
2778 size > 4))
1da177e4
LT		 2779 size -= 4;
2780
2781 buffer_info->length = size;
1da177e4 2782 buffer_info->time_stamp = jiffies;
602c0554
AD		 2783 buffer_info->mapped_as_page = true;
2784 buffer_info->dma = pci_map_page(pdev, frag->page,
2785 offset, size,
2786 PCI_DMA_TODEVICE);
2787 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2788 goto dma_error;
a9ebadd6 2789 buffer_info->next_to_watch = i;
1da177e4
LT		 2790
2791 len -= size;
2792 offset += size;
2793 count++;
1da177e4
LT		 2794 }
2795 }
2796
1da177e4
LT		 2797 tx_ring->buffer_info[i].skb = skb;
2798 tx_ring->buffer_info[first].next_to_watch = i;
2799
2800 return count;
602c0554
AD		 2801
2802dma_error:
2803 dev_err(&pdev->dev, "TX DMA map failed\n");
2804 buffer_info->dma = 0;
2805 count--;
2806
2807 while (count >= 0) {
2808 count--;
2809 i--;
2810 if (i < 0)
2811 i += tx_ring->count;
2812 buffer_info = &tx_ring->buffer_info[i];
2813 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2814 }
2815
2816 return 0;
1da177e4
LT		 2817}
2818
64798845
JP		 2819static void e1000_tx_queue(struct e1000_adapter *adapter,
2820 struct e1000_tx_ring *tx_ring, int tx_flags,
2821 int count)
1da177e4 2822{
1dc32918 2823 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2824 struct e1000_tx_desc *tx_desc = NULL;
2825 struct e1000_buffer *buffer_info;
406874a7 2826 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2827 unsigned int i;
2828
96838a40 2829 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2830 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2831 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2832 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2833
96838a40 2834 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2835 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2836 }
2837
96838a40 2838 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2839 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2840 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2841 }
2842
96838a40 2843 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2844 txd_lower |= E1000_TXD_CMD_VLE;
2845 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2846 }
2847
2848 i = tx_ring->next_to_use;
2849
96838a40 2850 while (count--) {
1da177e4
LT		 2851 buffer_info = &tx_ring->buffer_info[i];
2852 tx_desc = E1000_TX_DESC(*tx_ring, i);
2853 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2854 tx_desc->lower.data =
2855 cpu_to_le32(txd_lower | buffer_info->length);
2856 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2857 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2858 }
2859
2860 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2861
2862 /* Force memory writes to complete before letting h/w
2863 * know there are new descriptors to fetch. (Only
2864 * applicable for weak-ordered memory model archs,
2865 * such as IA-64). */
2866 wmb();
2867
2868 tx_ring->next_to_use = i;
1dc32918 2869 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 2870 /* we need this if more than one processor can write to our tail
2871 * at a time, it syncronizes IO on IA64/Altix systems */
2872 mmiowb();
1da177e4
LT		 2873}
2874
2875/**
2876 * 82547 workaround to avoid controller hang in half-duplex environment.
2877 * The workaround is to avoid queuing a large packet that would span
2878 * the internal Tx FIFO ring boundary by notifying the stack to resend
2879 * the packet at a later time. This gives the Tx FIFO an opportunity to
2880 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2881 * to the beginning of the Tx FIFO.
2882 **/
2883
2884#define E1000_FIFO_HDR 0x10
2885#define E1000_82547_PAD_LEN 0x3E0
2886
64798845
JP		 2887static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
2888 struct sk_buff *skb)
1da177e4 2889{
406874a7
JP		 2890 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2891 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 2892
9099cfb9 2893 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 2894
96838a40 2895 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2896 goto no_fifo_stall_required;
2897
96838a40 2898 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2899 return 1;
2900
96838a40 2901 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2902 atomic_set(&adapter->tx_fifo_stall, 1);
2903 return 1;
2904 }
2905
2906no_fifo_stall_required:
2907 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2908 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2909 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2910 return 0;
2911}
2912
65c7973f
JB		 2913static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2914{
2915 struct e1000_adapter *adapter = netdev_priv(netdev);
2916 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2917
2918 netif_stop_queue(netdev);
2919 /* Herbert's original patch had:
2920 * smp_mb__after_netif_stop_queue();
2921 * but since that doesn't exist yet, just open code it. */
2922 smp_mb();
2923
2924 /* We need to check again in a case another CPU has just
2925 * made room available. */
2926 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2927 return -EBUSY;
2928
2929 /* A reprieve! */
2930 netif_start_queue(netdev);
fcfb1224 2931 ++adapter->restart_queue;
65c7973f
JB		 2932 return 0;
2933}
2934
2935static int e1000_maybe_stop_tx(struct net_device *netdev,
2936 struct e1000_tx_ring *tx_ring, int size)
2937{
2938 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2939 return 0;
2940 return __e1000_maybe_stop_tx(netdev, size);
2941}
2942
1da177e4 2943#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 2944static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
2945 struct net_device *netdev)
1da177e4 2946{
60490fe0 2947 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2948 struct e1000_hw *hw = &adapter->hw;
581d708e 2949 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2950 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2951 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2952 unsigned int tx_flags = 0;
6d1e3aa7 2953 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 2954 unsigned int nr_frags;
2955 unsigned int mss;
1da177e4 2956 int count = 0;
76c224bc 2957 int tso;
1da177e4 2958 unsigned int f;
1da177e4 2959
65c7973f
JB		 2960 /* This goes back to the question of how to logically map a tx queue
2961 * to a flow. Right now, performance is impacted slightly negatively
2962 * if using multiple tx queues. If the stack breaks away from a
2963 * single qdisc implementation, we can look at this again. */
581d708e 2964 tx_ring = adapter->tx_ring;
24025e4e 2965
581d708e 2966 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2967 dev_kfree_skb_any(skb);
2968 return NETDEV_TX_OK;
2969 }
2970
7967168c 2971 mss = skb_shinfo(skb)->gso_size;
76c224bc 2972 /* The controller does a simple calculation to
1da177e4
LT		 2973 * make sure there is enough room in the FIFO before
2974 * initiating the DMA for each buffer. The calc is:
2975 * 4 = ceil(buffer len/mss). To make sure we don't
2976 * overrun the FIFO, adjust the max buffer len if mss
2977 * drops. */
96838a40 2978 if (mss) {
406874a7 2979 u8 hdr_len;
1da177e4
LT		 2980 max_per_txd = min(mss << 2, max_per_txd);
2981 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2982
ab6a5bb6 2983 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 2984 if (skb->data_len && hdr_len == len) {
1dc32918 2985 switch (hw->mac_type) {
9f687888 2986 unsigned int pull_size;
683a2aa3
HX		 2987 case e1000_82544:
2988 /* Make sure we have room to chop off 4 bytes,
2989 * and that the end alignment will work out to
2990 * this hardware's requirements
2991 * NOTE: this is a TSO only workaround
2992 * if end byte alignment not correct move us
2993 * into the next dword */
27a884dc 2994 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 2995 break;
2996 /* fall through */
9f687888
JK		 2997 pull_size = min((unsigned int)4, skb->data_len);
2998 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2999 DPRINTK(DRV, ERR,
9f687888
JK		 3000 "__pskb_pull_tail failed.\n");
3001 dev_kfree_skb_any(skb);
749dfc70 3002 return NETDEV_TX_OK;
9f687888
JK		 3003 }
3004 len = skb->len - skb->data_len;
3005 break;
3006 default:
3007 /* do nothing */
3008 break;
d74bbd3b 3009 }
9a3056da 3010 }
1da177e4
LT		 3011 }
3012
9a3056da 3013 /* reserve a descriptor for the offload context */
84fa7933 3014 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3015 count++;
2648345f 3016 count++;
fd803241 3017
fd803241 3018 /* Controller Erratum workaround */
89114afd 3019 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3020 count++;
fd803241 3021
1da177e4
LT		 3022 count += TXD_USE_COUNT(len, max_txd_pwr);
3023
96838a40 3024 if (adapter->pcix_82544)
1da177e4
LT		 3025 count++;
3026
96838a40 3027 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3028 * in PCI-X mode, so add one more descriptor to the count
3029 */
1dc32918 3030 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3031 (len > 2015)))
3032 count++;
3033
1da177e4 3034 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3035 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3036 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3037 max_txd_pwr);
96838a40 3038 if (adapter->pcix_82544)
1da177e4
LT		 3039 count += nr_frags;
3040
1da177e4
LT		 3041 /* need: count + 2 desc gap to keep tail from touching
3042 * head, otherwise try next time */
8017943e 3043 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3044 return NETDEV_TX_BUSY;
1da177e4 3045
1dc32918 3046 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3047 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3048 netif_stop_queue(netdev);
baa34745
JB		 3049 if (!test_bit(__E1000_DOWN, &adapter->flags))
3050 mod_timer(&adapter->tx_fifo_stall_timer,
3051 jiffies + 1);
1da177e4
LT		 3052 return NETDEV_TX_BUSY;
3053 }
3054 }
3055
96838a40 3056 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3057 tx_flags |= E1000_TX_FLAGS_VLAN;
3058 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3059 }
3060
581d708e 3061 first = tx_ring->next_to_use;
96838a40 3062
581d708e 3063 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3064 if (tso < 0) {
3065 dev_kfree_skb_any(skb);
3066 return NETDEV_TX_OK;
3067 }
3068
fd803241 3069 if (likely(tso)) {
8fce4731
JB		 3070 if (likely(hw->mac_type != e1000_82544))
3071 tx_ring->last_tx_tso = 1;
1da177e4 3072 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3073 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3074 tx_flags |= E1000_TX_FLAGS_CSUM;
3075
60828236 3076 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3077 tx_flags |= E1000_TX_FLAGS_IPV4;
3078
37e73df8
AD		 3079 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3080 nr_frags, mss);
1da177e4 3081
37e73df8
AD		 3082 if (count) {
3083 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3084 /* Make sure there is space in the ring for the next send. */
3085 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3086
37e73df8
AD		 3087 } else {
3088 dev_kfree_skb_any(skb);
3089 tx_ring->buffer_info[first].time_stamp = 0;
3090 tx_ring->next_to_use = first;
3091 }
1da177e4 3092
1da177e4
LT		 3093 return NETDEV_TX_OK;
3094}
3095
3096/**
3097 * e1000_tx_timeout - Respond to a Tx Hang
3098 * @netdev: network interface device structure
3099 **/
3100
64798845 3101static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3102{
60490fe0 3103 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3104
3105 /* Do the reset outside of interrupt context */
87041639
JK		 3106 adapter->tx_timeout_count++;
3107 schedule_work(&adapter->reset_task);
1da177e4
LT		 3108}
3109
64798845 3110static void e1000_reset_task(struct work_struct *work)
1da177e4 3111{
65f27f38
DH		 3112 struct e1000_adapter *adapter =
3113 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3114
2db10a08 3115 e1000_reinit_locked(adapter);
1da177e4
LT		 3116}
3117
3118/**
3119 * e1000_get_stats - Get System Network Statistics
3120 * @netdev: network interface device structure
3121 *
3122 * Returns the address of the device statistics structure.
3123 * The statistics are actually updated from the timer callback.
3124 **/
3125
64798845 3126static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3127{
6b7660cd 3128 /* only return the current stats */
5fe31def 3129 return &netdev->stats;
1da177e4
LT		 3130}
3131
3132/**
3133 * e1000_change_mtu - Change the Maximum Transfer Unit
3134 * @netdev: network interface device structure
3135 * @new_mtu: new value for maximum frame size
3136 *
3137 * Returns 0 on success, negative on failure
3138 **/
3139
64798845 3140static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3141{
60490fe0 3142 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3143 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3144 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3145
96838a40
JB		 3146 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3147 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3148 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3149 return -EINVAL;
2d7edb92 3150 }
1da177e4 3151
997f5cbd 3152 /* Adapter-specific max frame size limits. */
1dc32918 3153 switch (hw->mac_type) {
9e2feace 3154 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3155 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
997f5cbd 3156 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3157 return -EINVAL;
2d7edb92 3158 }
997f5cbd 3159 break;
997f5cbd
JK		 3160 default:
3161 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3162 break;
1da177e4
LT		 3163 }
3164
3d6114e7
JB		 3165 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3166 msleep(1);
3167 /* e1000_down has a dependency on max_frame_size */
3168 hw->max_frame_size = max_frame;
3169 if (netif_running(netdev))
3170 e1000_down(adapter);
3171
87f5032e 3172 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3173 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3174 * larger slab size.
3175 * i.e. RXBUFFER_2048 --> size-4096 slab
3176 * however with the new *_jumbo_rx* routines, jumbo receives will use
3177 * fragmented skbs */
9e2feace
AK		 3178
3179 if (max_frame <= E1000_RXBUFFER_256)
3180 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3181 else if (max_frame <= E1000_RXBUFFER_512)
3182 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3183 else if (max_frame <= E1000_RXBUFFER_1024)
3184 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3185 else if (max_frame <= E1000_RXBUFFER_2048)
3186 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3187 else
3188#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3189 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3190#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3191 adapter->rx_buffer_len = PAGE_SIZE;
3192#endif
9e2feace
AK		 3193
3194 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3195 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3196 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3197 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3198 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3199
3d6114e7
JB		 3200 printk(KERN_INFO "e1000: %s changing MTU from %d to %d\n",
3201 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3202 netdev->mtu = new_mtu;
3203
2db10a08 3204 if (netif_running(netdev))
3d6114e7
JB		 3205 e1000_up(adapter);
3206 else
3207 e1000_reset(adapter);
3208
3209 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3210
1da177e4
LT		 3211 return 0;
3212}
3213
3214/**
3215 * e1000_update_stats - Update the board statistics counters
3216 * @adapter: board private structure
3217 **/
3218
64798845 3219void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3220{
5fe31def 3221 struct net_device *netdev = adapter->netdev;
1da177e4 3222 struct e1000_hw *hw = &adapter->hw;
282f33c9 3223 struct pci_dev *pdev = adapter->pdev;
1da177e4 3224 unsigned long flags;
406874a7 3225 u16 phy_tmp;
1da177e4
LT		 3226
3227#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3228
282f33c9
LV		 3229 /*
3230 * Prevent stats update while adapter is being reset, or if the pci
3231 * connection is down.
3232 */
9026729b 3233 if (adapter->link_speed == 0)
282f33c9 3234 return;
81b1955e 3235 if (pci_channel_offline(pdev))
9026729b
AK		 3236 return;
3237
1da177e4
LT		 3238 spin_lock_irqsave(&adapter->stats_lock, flags);
3239
828d055f 3240 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3241 * called from the interrupt context, so they must only
3242 * be written while holding adapter->stats_lock
3243 */
3244
1dc32918
JP		 3245 adapter->stats.crcerrs += er32(CRCERRS);
3246 adapter->stats.gprc += er32(GPRC);
3247 adapter->stats.gorcl += er32(GORCL);
3248 adapter->stats.gorch += er32(GORCH);
3249 adapter->stats.bprc += er32(BPRC);
3250 adapter->stats.mprc += er32(MPRC);
3251 adapter->stats.roc += er32(ROC);
3252
1532ecea
JB		 3253 adapter->stats.prc64 += er32(PRC64);
3254 adapter->stats.prc127 += er32(PRC127);
3255 adapter->stats.prc255 += er32(PRC255);
3256 adapter->stats.prc511 += er32(PRC511);
3257 adapter->stats.prc1023 += er32(PRC1023);
3258 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3259
3260 adapter->stats.symerrs += er32(SYMERRS);
3261 adapter->stats.mpc += er32(MPC);
3262 adapter->stats.scc += er32(SCC);
3263 adapter->stats.ecol += er32(ECOL);
3264 adapter->stats.mcc += er32(MCC);
3265 adapter->stats.latecol += er32(LATECOL);
3266 adapter->stats.dc += er32(DC);
3267 adapter->stats.sec += er32(SEC);
3268 adapter->stats.rlec += er32(RLEC);
3269 adapter->stats.xonrxc += er32(XONRXC);
3270 adapter->stats.xontxc += er32(XONTXC);
3271 adapter->stats.xoffrxc += er32(XOFFRXC);
3272 adapter->stats.xofftxc += er32(XOFFTXC);
3273 adapter->stats.fcruc += er32(FCRUC);
3274 adapter->stats.gptc += er32(GPTC);
3275 adapter->stats.gotcl += er32(GOTCL);
3276 adapter->stats.gotch += er32(GOTCH);
3277 adapter->stats.rnbc += er32(RNBC);
3278 adapter->stats.ruc += er32(RUC);
3279 adapter->stats.rfc += er32(RFC);
3280 adapter->stats.rjc += er32(RJC);
3281 adapter->stats.torl += er32(TORL);
3282 adapter->stats.torh += er32(TORH);
3283 adapter->stats.totl += er32(TOTL);
3284 adapter->stats.toth += er32(TOTH);
3285 adapter->stats.tpr += er32(TPR);
3286
1532ecea
JB		 3287 adapter->stats.ptc64 += er32(PTC64);
3288 adapter->stats.ptc127 += er32(PTC127);
3289 adapter->stats.ptc255 += er32(PTC255);
3290 adapter->stats.ptc511 += er32(PTC511);
3291 adapter->stats.ptc1023 += er32(PTC1023);
3292 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3293
3294 adapter->stats.mptc += er32(MPTC);
3295 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3296
3297 /* used for adaptive IFS */
3298
1dc32918 3299 hw->tx_packet_delta = er32(TPT);
1da177e4 3300 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3301 hw->collision_delta = er32(COLC);
1da177e4
LT		 3302 adapter->stats.colc += hw->collision_delta;
3303
96838a40 3304 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3305 adapter->stats.algnerrc += er32(ALGNERRC);
3306 adapter->stats.rxerrc += er32(RXERRC);
3307 adapter->stats.tncrs += er32(TNCRS);
3308 adapter->stats.cexterr += er32(CEXTERR);
3309 adapter->stats.tsctc += er32(TSCTC);
3310 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3311 }
3312
3313 /* Fill out the OS statistics structure */
5fe31def
AK		 3314 netdev->stats.multicast = adapter->stats.mprc;
3315 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3316
3317 /* Rx Errors */
3318
87041639
JK		 3319 /* RLEC on some newer hardware can be incorrect so build
3320 * our own version based on RUC and ROC */
5fe31def 3321 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3322 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3323 adapter->stats.ruc + adapter->stats.roc +
3324 adapter->stats.cexterr;
49559854 3325 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3326 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3327 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3328 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3329 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3330
3331 /* Tx Errors */
49559854 3332 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3333 netdev->stats.tx_errors = adapter->stats.txerrc;
3334 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3335 netdev->stats.tx_window_errors = adapter->stats.latecol;
3336 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3337 if (hw->bad_tx_carr_stats_fd &&
167fb284 3338 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3339 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3340 adapter->stats.tncrs = 0;
3341 }
1da177e4
LT		 3342
3343 /* Tx Dropped needs to be maintained elsewhere */
3344
3345 /* Phy Stats */
96838a40
JB		 3346 if (hw->media_type == e1000_media_type_copper) {
3347 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3348 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3349 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3350 adapter->phy_stats.idle_errors += phy_tmp;
3351 }
3352
96838a40 3353 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3354 (hw->phy_type == e1000_phy_m88) &&
3355 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3356 adapter->phy_stats.receive_errors += phy_tmp;
3357 }
3358
15e376b4 3359 /* Management Stats */
1dc32918
JP		 3360 if (hw->has_smbus) {
3361 adapter->stats.mgptc += er32(MGTPTC);
3362 adapter->stats.mgprc += er32(MGTPRC);
3363 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3364 }
3365
1da177e4
LT		 3366 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3367}
9ac98284 3368
1da177e4
LT		 3369/**
3370 * e1000_intr - Interrupt Handler
3371 * @irq: interrupt number
3372 * @data: pointer to a network interface device structure
1da177e4
LT		 3373 **/
3374
64798845 3375static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3376{
3377 struct net_device *netdev = data;
60490fe0 3378 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3379 struct e1000_hw *hw = &adapter->hw;
1532ecea 3380 u32 icr = er32(ICR);
c3570acb 3381
e151a60a 3382 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3383 return IRQ_NONE; /* Not our interrupt */
3384
96838a40 3385 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3386 hw->get_link_status = 1;
1314bbf3
AK		 3387 /* guard against interrupt when we're going down */
3388 if (!test_bit(__E1000_DOWN, &adapter->flags))
3389 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3390 }
3391
1532ecea
JB		 3392 /* disable interrupts, without the synchronize_irq bit */
3393 ew32(IMC, ~0);
3394 E1000_WRITE_FLUSH();
3395
288379f0 3396 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3397 adapter->total_tx_bytes = 0;
3398 adapter->total_tx_packets = 0;
3399 adapter->total_rx_bytes = 0;
3400 adapter->total_rx_packets = 0;
288379f0 3401 __napi_schedule(&adapter->napi);
a6c42322 3402 } else {
90fb5135
AK		 3403 /* this really should not happen! if it does it is basically a
3404 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3405 if (!test_bit(__E1000_DOWN, &adapter->flags))
3406 e1000_irq_enable(adapter);
3407 }
1da177e4 3408
1da177e4
LT		 3409 return IRQ_HANDLED;
3410}
3411
1da177e4
LT		 3412/**
3413 * e1000_clean - NAPI Rx polling callback
3414 * @adapter: board private structure
3415 **/
64798845 3416static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3417{
bea3348e 3418 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3419 int tx_clean_complete = 0, work_done = 0;
581d708e 3420
650b5a5c 3421 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3422
650b5a5c 3423 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3424
650b5a5c 3425 if (!tx_clean_complete)
d2c7ddd6
DM		 3426 work_done = budget;
3427
53e52c72
DM		 3428 /* If budget not fully consumed, exit the polling mode */
3429 if (work_done < budget) {
835bb129
JB		 3430 if (likely(adapter->itr_setting & 3))
3431 e1000_set_itr(adapter);
288379f0 3432 napi_complete(napi);
a6c42322
JB		 3433 if (!test_bit(__E1000_DOWN, &adapter->flags))
3434 e1000_irq_enable(adapter);
1da177e4
LT		 3435 }
3436
bea3348e 3437 return work_done;
1da177e4
LT		 3438}
3439
1da177e4
LT		 3440/**
3441 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3442 * @adapter: board private structure
3443 **/
64798845
JP		 3444static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3445 struct e1000_tx_ring *tx_ring)
1da177e4 3446{
1dc32918 3447 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3448 struct net_device *netdev = adapter->netdev;
3449 struct e1000_tx_desc *tx_desc, *eop_desc;
3450 struct e1000_buffer *buffer_info;
3451 unsigned int i, eop;
2a1af5d7 3452 unsigned int count = 0;
835bb129 3453 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3454
3455 i = tx_ring->next_to_clean;
3456 eop = tx_ring->buffer_info[i].next_to_watch;
3457 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3458
ccfb342c
AD		 3459 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3460 (count < tx_ring->count)) {
843f4267
JB		 3461 bool cleaned = false;
3462 for ( ; !cleaned; count++) {
1da177e4
LT		 3463 tx_desc = E1000_TX_DESC(*tx_ring, i);
3464 buffer_info = &tx_ring->buffer_info[i];
3465 cleaned = (i == eop);
3466
835bb129 3467 if (cleaned) {
2b65326e 3468 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3469 unsigned int segs, bytecount;
3470 segs = skb_shinfo(skb)->gso_segs ?: 1;
3471 /* multiply data chunks by size of headers */
3472 bytecount = ((segs - 1) * skb_headlen(skb)) +
3473 skb->len;
2b65326e 3474 total_tx_packets += segs;
7753b171 3475 total_tx_bytes += bytecount;
835bb129 3476 }
fd803241 3477 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3478 tx_desc->upper.data = 0;
1da177e4 3479
96838a40 3480 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3481 }
581d708e 3482
1da177e4
LT		 3483 eop = tx_ring->buffer_info[i].next_to_watch;
3484 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3485 }
3486
3487 tx_ring->next_to_clean = i;
3488
77b2aad5 3489#define TX_WAKE_THRESHOLD 32
843f4267 3490 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3491 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3492 /* Make sure that anybody stopping the queue after this
3493 * sees the new next_to_clean.
3494 */
3495 smp_mb();
cdd7549e
JB		 3496
3497 if (netif_queue_stopped(netdev) &&
3498 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3499 netif_wake_queue(netdev);
fcfb1224
JB		 3500 ++adapter->restart_queue;
3501 }
77b2aad5 3502 }
2648345f 3503
581d708e 3504 if (adapter->detect_tx_hung) {
2648345f 3505 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3506 * check with the clearing of time_stamp and movement of i */
c3033b01 3507 adapter->detect_tx_hung = false;
cdd7549e
JB		 3508 if (tx_ring->buffer_info[eop].time_stamp &&
3509 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP		 3510 (adapter->tx_timeout_factor * HZ)) &&
3511 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3512
3513 /* detected Tx unit hang */
c6963ef5 3514 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3515 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3516 " TDH <%x>\n"
3517 " TDT <%x>\n"
3518 " next_to_use <%x>\n"
3519 " next_to_clean <%x>\n"
3520 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3521 " time_stamp <%lx>\n"
3522 " next_to_watch <%x>\n"
3523 " jiffies <%lx>\n"
3524 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3525 (unsigned long)((tx_ring - adapter->tx_ring) /
3526 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3527 readl(hw->hw_addr + tx_ring->tdh),
3528 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3529 tx_ring->next_to_use,
392137fa 3530 tx_ring->next_to_clean,
cdd7549e 3531 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3532 eop,
3533 jiffies,
3534 eop_desc->upper.fields.status);
1da177e4 3535 netif_stop_queue(netdev);
70b8f1e1 3536 }
1da177e4 3537 }
835bb129
JB		 3538 adapter->total_tx_bytes += total_tx_bytes;
3539 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3540 netdev->stats.tx_bytes += total_tx_bytes;
3541 netdev->stats.tx_packets += total_tx_packets;
ccfb342c 3542 return (count < tx_ring->count);
1da177e4
LT		 3543}
3544
3545/**
3546 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3547 * @adapter: board private structure
3548 * @status_err: receive descriptor status and error fields
3549 * @csum: receive descriptor csum field
3550 * @sk_buff: socket buffer with received data
1da177e4
LT		 3551 **/
3552
64798845
JP		 3553static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3554 u32 csum, struct sk_buff *skb)
1da177e4 3555{
1dc32918 3556 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3557 u16 status = (u16)status_err;
3558 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3559 skb->ip_summed = CHECKSUM_NONE;
3560
1da177e4 3561 /* 82543 or newer only */
1dc32918 3562 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3563 /* Ignore Checksum bit is set */
96838a40 3564 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3565 /* TCP/UDP checksum error bit is set */
96838a40 3566 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3567 /* let the stack verify checksum errors */
1da177e4 3568 adapter->hw_csum_err++;
2d7edb92
MC		 3569 return;
3570 }
3571 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3572 if (!(status & E1000_RXD_STAT_TCPCS))
3573 return;
3574
2d7edb92
MC		 3575 /* It must be a TCP or UDP packet with a valid checksum */
3576 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3577 /* TCP checksum is good */
3578 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3579 }
2d7edb92 3580 adapter->hw_csum_good++;
1da177e4
LT		 3581}
3582
edbbb3ca
JB		 3583/**
3584 * e1000_consume_page - helper function
3585 **/
3586static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3587 u16 length)
3588{
3589 bi->page = NULL;
3590 skb->len += length;
3591 skb->data_len += length;
3592 skb->truesize += length;
3593}
3594
3595/**
3596 * e1000_receive_skb - helper function to handle rx indications
3597 * @adapter: board private structure
3598 * @status: descriptor status field as written by hardware
3599 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3600 * @skb: pointer to sk_buff to be indicated to stack
3601 */
3602static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3603 __le16 vlan, struct sk_buff *skb)
3604{
3605 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
3606 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3607 le16_to_cpu(vlan) &
3608 E1000_RXD_SPC_VLAN_MASK);
3609 } else {
3610 netif_receive_skb(skb);
3611 }
3612}
3613
3614/**
3615 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3616 * @adapter: board private structure
3617 * @rx_ring: ring to clean
3618 * @work_done: amount of napi work completed this call
3619 * @work_to_do: max amount of work allowed for this call to do
3620 *
3621 * the return value indicates whether actual cleaning was done, there
3622 * is no guarantee that everything was cleaned
3623 */
3624static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3625 struct e1000_rx_ring *rx_ring,
3626 int *work_done, int work_to_do)
3627{
3628 struct e1000_hw *hw = &adapter->hw;
3629 struct net_device *netdev = adapter->netdev;
3630 struct pci_dev *pdev = adapter->pdev;
3631 struct e1000_rx_desc *rx_desc, *next_rxd;
3632 struct e1000_buffer *buffer_info, *next_buffer;
3633 unsigned long irq_flags;
3634 u32 length;
3635 unsigned int i;
3636 int cleaned_count = 0;
3637 bool cleaned = false;
3638 unsigned int total_rx_bytes=0, total_rx_packets=0;
3639
3640 i = rx_ring->next_to_clean;
3641 rx_desc = E1000_RX_DESC(*rx_ring, i);
3642 buffer_info = &rx_ring->buffer_info[i];
3643
3644 while (rx_desc->status & E1000_RXD_STAT_DD) {
3645 struct sk_buff *skb;
3646 u8 status;
3647
3648 if (*work_done >= work_to_do)
3649 break;
3650 (*work_done)++;
3651
3652 status = rx_desc->status;
3653 skb = buffer_info->skb;
3654 buffer_info->skb = NULL;
3655
3656 if (++i == rx_ring->count) i = 0;
3657 next_rxd = E1000_RX_DESC(*rx_ring, i);
3658 prefetch(next_rxd);
3659
3660 next_buffer = &rx_ring->buffer_info[i];
3661
3662 cleaned = true;
3663 cleaned_count++;
3664 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
3665 PCI_DMA_FROMDEVICE);
3666 buffer_info->dma = 0;
3667
3668 length = le16_to_cpu(rx_desc->length);
3669
3670 /* errors is only valid for DD + EOP descriptors */
3671 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3672 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3673 u8 last_byte = *(skb->data + length - 1);
3674 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3675 last_byte)) {
3676 spin_lock_irqsave(&adapter->stats_lock,
3677 irq_flags);
3678 e1000_tbi_adjust_stats(hw, &adapter->stats,
3679 length, skb->data);
3680 spin_unlock_irqrestore(&adapter->stats_lock,
3681 irq_flags);
3682 length--;
3683 } else {
3684 /* recycle both page and skb */
3685 buffer_info->skb = skb;
3686 /* an error means any chain goes out the window
3687 * too */
3688 if (rx_ring->rx_skb_top)
3689 dev_kfree_skb(rx_ring->rx_skb_top);
3690 rx_ring->rx_skb_top = NULL;
3691 goto next_desc;
3692 }
3693 }
3694
3695#define rxtop rx_ring->rx_skb_top
3696 if (!(status & E1000_RXD_STAT_EOP)) {
3697 /* this descriptor is only the beginning (or middle) */
3698 if (!rxtop) {
3699 /* this is the beginning of a chain */
3700 rxtop = skb;
3701 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3702 0, length);
3703 } else {
3704 /* this is the middle of a chain */
3705 skb_fill_page_desc(rxtop,
3706 skb_shinfo(rxtop)->nr_frags,
3707 buffer_info->page, 0, length);
3708 /* re-use the skb, only consumed the page */
3709 buffer_info->skb = skb;
3710 }
3711 e1000_consume_page(buffer_info, rxtop, length);
3712 goto next_desc;
3713 } else {
3714 if (rxtop) {
3715 /* end of the chain */
3716 skb_fill_page_desc(rxtop,
3717 skb_shinfo(rxtop)->nr_frags,
3718 buffer_info->page, 0, length);
3719 /* re-use the current skb, we only consumed the
3720 * page */
3721 buffer_info->skb = skb;
3722 skb = rxtop;
3723 rxtop = NULL;
3724 e1000_consume_page(buffer_info, skb, length);
3725 } else {
3726 /* no chain, got EOP, this buf is the packet
3727 * copybreak to save the put_page/alloc_page */
3728 if (length <= copybreak &&
3729 skb_tailroom(skb) >= length) {
3730 u8 *vaddr;
3731 vaddr = kmap_atomic(buffer_info->page,
3732 KM_SKB_DATA_SOFTIRQ);
3733 memcpy(skb_tail_pointer(skb), vaddr, length);
3734 kunmap_atomic(vaddr,
3735 KM_SKB_DATA_SOFTIRQ);
3736 /* re-use the page, so don't erase
3737 * buffer_info->page */
3738 skb_put(skb, length);
3739 } else {
3740 skb_fill_page_desc(skb, 0,
3741 buffer_info->page, 0,
3742 length);
3743 e1000_consume_page(buffer_info, skb,
3744 length);
3745 }
3746 }
3747 }
3748
3749 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3750 e1000_rx_checksum(adapter,
3751 (u32)(status) |
3752 ((u32)(rx_desc->errors) << 24),
3753 le16_to_cpu(rx_desc->csum), skb);
3754
3755 pskb_trim(skb, skb->len - 4);
3756
3757 /* probably a little skewed due to removing CRC */
3758 total_rx_bytes += skb->len;
3759 total_rx_packets++;
3760
3761 /* eth type trans needs skb->data to point to something */
3762 if (!pskb_may_pull(skb, ETH_HLEN)) {
3763 DPRINTK(DRV, ERR, "pskb_may_pull failed.\n");
3764 dev_kfree_skb(skb);
3765 goto next_desc;
3766 }
3767
3768 skb->protocol = eth_type_trans(skb, netdev);
3769
3770 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3771
3772next_desc:
3773 rx_desc->status = 0;
3774
3775 /* return some buffers to hardware, one at a time is too slow */
3776 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3777 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3778 cleaned_count = 0;
3779 }
3780
3781 /* use prefetched values */
3782 rx_desc = next_rxd;
3783 buffer_info = next_buffer;
3784 }
3785 rx_ring->next_to_clean = i;
3786
3787 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3788 if (cleaned_count)
3789 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3790
3791 adapter->total_rx_packets += total_rx_packets;
3792 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3793 netdev->stats.rx_bytes += total_rx_bytes;
3794 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 3795 return cleaned;
3796}
3797
1da177e4 3798/**
2d7edb92 3799 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3800 * @adapter: board private structure
edbbb3ca
JB		 3801 * @rx_ring: ring to clean
3802 * @work_done: amount of napi work completed this call
3803 * @work_to_do: max amount of work allowed for this call to do
3804 */
64798845
JP		 3805static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3806 struct e1000_rx_ring *rx_ring,
3807 int *work_done, int work_to_do)
1da177e4 3808{
1dc32918 3809 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3810 struct net_device *netdev = adapter->netdev;
3811 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3812 struct e1000_rx_desc *rx_desc, *next_rxd;
3813 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3814 unsigned long flags;
406874a7 3815 u32 length;
1da177e4 3816 unsigned int i;
72d64a43 3817 int cleaned_count = 0;
c3033b01 3818 bool cleaned = false;
835bb129 3819 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3820
3821 i = rx_ring->next_to_clean;
3822 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3823 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3824
b92ff8ee 3825 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3826 struct sk_buff *skb;
a292ca6e 3827 u8 status;
90fb5135 3828
96838a40 3829 if (*work_done >= work_to_do)
1da177e4
LT		 3830 break;
3831 (*work_done)++;
c3570acb 3832
a292ca6e 3833 status = rx_desc->status;
b92ff8ee 3834 skb = buffer_info->skb;
86c3d59f
JB		 3835 buffer_info->skb = NULL;
3836
30320be8
JK		 3837 prefetch(skb->data - NET_IP_ALIGN);
3838
86c3d59f
JB		 3839 if (++i == rx_ring->count) i = 0;
3840 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3841 prefetch(next_rxd);
3842
86c3d59f 3843 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3844
c3033b01 3845 cleaned = true;
72d64a43 3846 cleaned_count++;
edbbb3ca 3847 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
1da177e4 3848 PCI_DMA_FROMDEVICE);
679be3ba 3849 buffer_info->dma = 0;
1da177e4 3850
1da177e4 3851 length = le16_to_cpu(rx_desc->length);
ea30e119
NH		 3852 /* !EOP means multiple descriptors were used to store a single
3853 * packet, also make sure the frame isn't just CRC only */
3854 if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) {
a1415ee6
JK		 3855 /* All receives must fit into a single buffer */
3856 E1000_DBG("%s: Receive packet consumed multiple"
3857 " buffers\n", netdev->name);
864c4e45 3858 /* recycle */
8fc897b0 3859 buffer_info->skb = skb;
1da177e4
LT		 3860 goto next_desc;
3861 }
3862
96838a40 3863 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 3864 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 3865 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3866 last_byte)) {
1da177e4 3867 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 3868 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 3869 length, skb->data);
3870 spin_unlock_irqrestore(&adapter->stats_lock,
3871 flags);
3872 length--;
3873 } else {
9e2feace
AK		 3874 /* recycle */
3875 buffer_info->skb = skb;
1da177e4
LT		 3876 goto next_desc;
3877 }
1cb5821f 3878 }
1da177e4 3879
d2a1e213
JB		 3880 /* adjust length to remove Ethernet CRC, this must be
3881 * done after the TBI_ACCEPT workaround above */
3882 length -= 4;
3883
835bb129
JB		 3884 /* probably a little skewed due to removing CRC */
3885 total_rx_bytes += length;
3886 total_rx_packets++;
3887
a292ca6e
JK		 3888 /* code added for copybreak, this should improve
3889 * performance for small packets with large amounts
3890 * of reassembly being done in the stack */
1f753861 3891 if (length < copybreak) {
a292ca6e 3892 struct sk_buff *new_skb =
89d71a66 3893 netdev_alloc_skb_ip_align(netdev, length);
a292ca6e 3894 if (new_skb) {
27d7ff46
ACM		 3895 skb_copy_to_linear_data_offset(new_skb,
3896 -NET_IP_ALIGN,
3897 (skb->data -
3898 NET_IP_ALIGN),
3899 (length +
3900 NET_IP_ALIGN));
a292ca6e
JK		 3901 /* save the skb in buffer_info as good */
3902 buffer_info->skb = skb;
3903 skb = new_skb;
a292ca6e 3904 }
996695de
AK		 3905 /* else just continue with the old one */
3906 }
a292ca6e 3907 /* end copybreak code */
996695de 3908 skb_put(skb, length);
1da177e4
LT		 3909
3910 /* Receive Checksum Offload */
a292ca6e 3911 e1000_rx_checksum(adapter,
406874a7
JP		 3912 (u32)(status) |
3913 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 3914 le16_to_cpu(rx_desc->csum), skb);
96838a40 3915
1da177e4 3916 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 3917
edbbb3ca 3918 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 3919
1da177e4
LT		 3920next_desc:
3921 rx_desc->status = 0;
1da177e4 3922
72d64a43
JK		 3923 /* return some buffers to hardware, one at a time is too slow */
3924 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3925 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3926 cleaned_count = 0;
3927 }
3928
30320be8 3929 /* use prefetched values */
86c3d59f
JB		 3930 rx_desc = next_rxd;
3931 buffer_info = next_buffer;
1da177e4 3932 }
1da177e4 3933 rx_ring->next_to_clean = i;
72d64a43
JK		 3934
3935 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3936 if (cleaned_count)
3937 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 3938
835bb129
JB		 3939 adapter->total_rx_packets += total_rx_packets;
3940 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3941 netdev->stats.rx_bytes += total_rx_bytes;
3942 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 3943 return cleaned;
3944}
3945
edbbb3ca
JB		 3946/**
3947 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
3948 * @adapter: address of board private structure
3949 * @rx_ring: pointer to receive ring structure
3950 * @cleaned_count: number of buffers to allocate this pass
3951 **/
3952
3953static void
3954e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
3955 struct e1000_rx_ring *rx_ring, int cleaned_count)
3956{
3957 struct net_device *netdev = adapter->netdev;
3958 struct pci_dev *pdev = adapter->pdev;
3959 struct e1000_rx_desc *rx_desc;
3960 struct e1000_buffer *buffer_info;
3961 struct sk_buff *skb;
3962 unsigned int i;
89d71a66 3963 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 3964
3965 i = rx_ring->next_to_use;
3966 buffer_info = &rx_ring->buffer_info[i];
3967
3968 while (cleaned_count--) {
3969 skb = buffer_info->skb;
3970 if (skb) {
3971 skb_trim(skb, 0);
3972 goto check_page;
3973 }
3974
89d71a66 3975 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3976 if (unlikely(!skb)) {
3977 /* Better luck next round */
3978 adapter->alloc_rx_buff_failed++;
3979 break;
3980 }
3981
3982 /* Fix for errata 23, can't cross 64kB boundary */
3983 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3984 struct sk_buff *oldskb = skb;
3985 DPRINTK(PROBE, ERR, "skb align check failed: %u bytes "
3986 "at %p\n", bufsz, skb->data);
3987 /* Try again, without freeing the previous */
89d71a66 3988 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3989 /* Failed allocation, critical failure */
3990 if (!skb) {
3991 dev_kfree_skb(oldskb);
3992 adapter->alloc_rx_buff_failed++;
3993 break;
3994 }
3995
3996 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3997 /* give up */
3998 dev_kfree_skb(skb);
3999 dev_kfree_skb(oldskb);
4000 break; /* while (cleaned_count--) */
4001 }
4002
4003 /* Use new allocation */
4004 dev_kfree_skb(oldskb);
4005 }
edbbb3ca
JB		 4006 buffer_info->skb = skb;
4007 buffer_info->length = adapter->rx_buffer_len;
4008check_page:
4009 /* allocate a new page if necessary */
4010 if (!buffer_info->page) {
4011 buffer_info->page = alloc_page(GFP_ATOMIC);
4012 if (unlikely(!buffer_info->page)) {
4013 adapter->alloc_rx_buff_failed++;
4014 break;
4015 }
4016 }
4017
4018 if (!buffer_info->dma)
4019 buffer_info->dma = pci_map_page(pdev,
4020 buffer_info->page, 0,
4021 buffer_info->length,
4022 PCI_DMA_FROMDEVICE);
4023
4024 rx_desc = E1000_RX_DESC(*rx_ring, i);
4025 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4026
4027 if (unlikely(++i == rx_ring->count))
4028 i = 0;
4029 buffer_info = &rx_ring->buffer_info[i];
4030 }
4031
4032 if (likely(rx_ring->next_to_use != i)) {
4033 rx_ring->next_to_use = i;
4034 if (unlikely(i-- == 0))
4035 i = (rx_ring->count - 1);
4036
4037 /* Force memory writes to complete before letting h/w
4038 * know there are new descriptors to fetch. (Only
4039 * applicable for weak-ordered memory model archs,
4040 * such as IA-64). */
4041 wmb();
4042 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4043 }
4044}
4045
1da177e4 4046/**
2d7edb92 4047 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4048 * @adapter: address of board private structure
4049 **/
4050
64798845
JP		 4051static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4052 struct e1000_rx_ring *rx_ring,
4053 int cleaned_count)
1da177e4 4054{
1dc32918 4055 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4056 struct net_device *netdev = adapter->netdev;
4057 struct pci_dev *pdev = adapter->pdev;
4058 struct e1000_rx_desc *rx_desc;
4059 struct e1000_buffer *buffer_info;
4060 struct sk_buff *skb;
2648345f 4061 unsigned int i;
89d71a66 4062 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4063
4064 i = rx_ring->next_to_use;
4065 buffer_info = &rx_ring->buffer_info[i];
4066
a292ca6e 4067 while (cleaned_count--) {
ca6f7224
CH		 4068 skb = buffer_info->skb;
4069 if (skb) {
a292ca6e
JK		 4070 skb_trim(skb, 0);
4071 goto map_skb;
4072 }
4073
89d71a66 4074 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4075 if (unlikely(!skb)) {
1da177e4 4076 /* Better luck next round */
72d64a43 4077 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4078 break;
4079 }
4080
2648345f 4081 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4082 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4083 struct sk_buff *oldskb = skb;
2648345f
MC		 4084 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4085 "at %p\n", bufsz, skb->data);
4086 /* Try again, without freeing the previous */
89d71a66 4087 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4088 /* Failed allocation, critical failure */
1da177e4
LT		 4089 if (!skb) {
4090 dev_kfree_skb(oldskb);
edbbb3ca 4091 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4092 break;
4093 }
2648345f 4094
1da177e4
LT		 4095 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4096 /* give up */
4097 dev_kfree_skb(skb);
4098 dev_kfree_skb(oldskb);
edbbb3ca 4099 adapter->alloc_rx_buff_failed++;
1da177e4 4100 break; /* while !buffer_info->skb */
1da177e4 4101 }
ca6f7224
CH		 4102
4103 /* Use new allocation */
4104 dev_kfree_skb(oldskb);
1da177e4 4105 }
1da177e4
LT		 4106 buffer_info->skb = skb;
4107 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4108map_skb:
1da177e4
LT		 4109 buffer_info->dma = pci_map_single(pdev,
4110 skb->data,
edbbb3ca 4111 buffer_info->length,
1da177e4
LT		 4112 PCI_DMA_FROMDEVICE);
4113
edbbb3ca
JB		 4114 /*
4115 * XXX if it was allocated cleanly it will never map to a
4116 * boundary crossing
4117 */
4118
2648345f
MC		 4119 /* Fix for errata 23, can't cross 64kB boundary */
4120 if (!e1000_check_64k_bound(adapter,
4121 (void *)(unsigned long)buffer_info->dma,
4122 adapter->rx_buffer_len)) {
4123 DPRINTK(RX_ERR, ERR,
4124 "dma align check failed: %u bytes at %p\n",
4125 adapter->rx_buffer_len,
4126 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4127 dev_kfree_skb(skb);
4128 buffer_info->skb = NULL;
4129
2648345f 4130 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4131 adapter->rx_buffer_len,
4132 PCI_DMA_FROMDEVICE);
679be3ba 4133 buffer_info->dma = 0;
1da177e4 4134
edbbb3ca 4135 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4136 break; /* while !buffer_info->skb */
4137 }
1da177e4
LT		 4138 rx_desc = E1000_RX_DESC(*rx_ring, i);
4139 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4140
96838a40
JB		 4141 if (unlikely(++i == rx_ring->count))
4142 i = 0;
1da177e4
LT		 4143 buffer_info = &rx_ring->buffer_info[i];
4144 }
4145
b92ff8ee
JB		 4146 if (likely(rx_ring->next_to_use != i)) {
4147 rx_ring->next_to_use = i;
4148 if (unlikely(i-- == 0))
4149 i = (rx_ring->count - 1);
4150
4151 /* Force memory writes to complete before letting h/w
4152 * know there are new descriptors to fetch. (Only
4153 * applicable for weak-ordered memory model archs,
4154 * such as IA-64). */
4155 wmb();
1dc32918 4156 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4157 }
1da177e4
LT		 4158}
4159
4160/**
4161 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4162 * @adapter:
4163 **/
4164
64798845 4165static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4166{
1dc32918 4167 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4168 u16 phy_status;
4169 u16 phy_ctrl;
1da177e4 4170
1dc32918
JP		 4171 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4172 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4173 return;
4174
96838a40 4175 if (adapter->smartspeed == 0) {
1da177e4
LT		 4176 /* If Master/Slave config fault is asserted twice,
4177 * we assume back-to-back */
1dc32918 4178 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4179 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4180 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4181 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4182 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4183 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4184 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4185 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4186 phy_ctrl);
4187 adapter->smartspeed++;
1dc32918
JP		 4188 if (!e1000_phy_setup_autoneg(hw) &&
4189 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4190 &phy_ctrl)) {
4191 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4192 MII_CR_RESTART_AUTO_NEG);
1dc32918 4193 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4194 phy_ctrl);
4195 }
4196 }
4197 return;
96838a40 4198 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4199 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4200 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4201 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4202 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4203 if (!e1000_phy_setup_autoneg(hw) &&
4204 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4205 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4206 MII_CR_RESTART_AUTO_NEG);
1dc32918 4207 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4208 }
4209 }
4210 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4211 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4212 adapter->smartspeed = 0;
4213}
4214
4215/**
4216 * e1000_ioctl -
4217 * @netdev:
4218 * @ifreq:
4219 * @cmd:
4220 **/
4221
64798845 4222static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4223{
4224 switch (cmd) {
4225 case SIOCGMIIPHY:
4226 case SIOCGMIIREG:
4227 case SIOCSMIIREG:
4228 return e1000_mii_ioctl(netdev, ifr, cmd);
4229 default:
4230 return -EOPNOTSUPP;
4231 }
4232}
4233
4234/**
4235 * e1000_mii_ioctl -
4236 * @netdev:
4237 * @ifreq:
4238 * @cmd:
4239 **/
4240
64798845
JP		 4241static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4242 int cmd)
1da177e4 4243{
60490fe0 4244 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4245 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4246 struct mii_ioctl_data *data = if_mii(ifr);
4247 int retval;
406874a7
JP		 4248 u16 mii_reg;
4249 u16 spddplx;
97876fc6 4250 unsigned long flags;
1da177e4 4251
1dc32918 4252 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4253 return -EOPNOTSUPP;
4254
4255 switch (cmd) {
4256 case SIOCGMIIPHY:
1dc32918 4257 data->phy_id = hw->phy_addr;
1da177e4
LT		 4258 break;
4259 case SIOCGMIIREG:
97876fc6 4260 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4261 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4262 &data->val_out)) {
4263 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4264 return -EIO;
97876fc6
MC		 4265 }
4266 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4267 break;
4268 case SIOCSMIIREG:
96838a40 4269 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4270 return -EFAULT;
4271 mii_reg = data->val_in;
97876fc6 4272 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4273 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4274 mii_reg)) {
4275 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4276 return -EIO;
97876fc6 4277 }
f0163ac4 4278 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4279 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4280 switch (data->reg_num) {
4281 case PHY_CTRL:
96838a40 4282 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4283 break;
96838a40 4284 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4285 hw->autoneg = 1;
4286 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4287 } else {
4288 if (mii_reg & 0x40)
4289 spddplx = SPEED_1000;
4290 else if (mii_reg & 0x2000)
4291 spddplx = SPEED_100;
4292 else
4293 spddplx = SPEED_10;
4294 spddplx += (mii_reg & 0x100)
cb764326
JK		 4295 ? DUPLEX_FULL :
4296 DUPLEX_HALF;
1da177e4
LT		 4297 retval = e1000_set_spd_dplx(adapter,
4298 spddplx);
f0163ac4 4299 if (retval)
1da177e4
LT		 4300 return retval;
4301 }
2db10a08
AK		 4302 if (netif_running(adapter->netdev))
4303 e1000_reinit_locked(adapter);
4304 else
1da177e4
LT		 4305 e1000_reset(adapter);
4306 break;
4307 case M88E1000_PHY_SPEC_CTRL:
4308 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4309 if (e1000_phy_reset(hw))
1da177e4
LT		 4310 return -EIO;
4311 break;
4312 }
4313 } else {
4314 switch (data->reg_num) {
4315 case PHY_CTRL:
96838a40 4316 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4317 break;
2db10a08
AK		 4318 if (netif_running(adapter->netdev))
4319 e1000_reinit_locked(adapter);
4320 else
1da177e4
LT		 4321 e1000_reset(adapter);
4322 break;
4323 }
4324 }
4325 break;
4326 default:
4327 return -EOPNOTSUPP;
4328 }
4329 return E1000_SUCCESS;
4330}
4331
64798845 4332void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4333{
4334 struct e1000_adapter *adapter = hw->back;
2648345f 4335 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4336
96838a40 4337 if (ret_val)
2648345f 4338 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4339}
4340
64798845 4341void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4342{
4343 struct e1000_adapter *adapter = hw->back;
4344
4345 pci_clear_mwi(adapter->pdev);
4346}
4347
64798845 4348int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4349{
4350 struct e1000_adapter *adapter = hw->back;
4351 return pcix_get_mmrbc(adapter->pdev);
4352}
4353
64798845 4354void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4355{
4356 struct e1000_adapter *adapter = hw->back;
4357 pcix_set_mmrbc(adapter->pdev, mmrbc);
4358}
4359
64798845 4360void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4361{
4362 outl(value, port);
4363}
4364
64798845
JP		 4365static void e1000_vlan_rx_register(struct net_device *netdev,
4366 struct vlan_group *grp)
1da177e4 4367{
60490fe0 4368 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4369 struct e1000_hw *hw = &adapter->hw;
406874a7 4370 u32 ctrl, rctl;
1da177e4 4371
9150b76a
JB		 4372 if (!test_bit(__E1000_DOWN, &adapter->flags))
4373 e1000_irq_disable(adapter);
1da177e4
LT		 4374 adapter->vlgrp = grp;
4375
96838a40 4376 if (grp) {
1da177e4 4377 /* enable VLAN tag insert/strip */
1dc32918 4378 ctrl = er32(CTRL);
1da177e4 4379 ctrl |= E1000_CTRL_VME;
1dc32918 4380 ew32(CTRL, ctrl);
1da177e4 4381
1532ecea
JB		 4382 /* enable VLAN receive filtering */
4383 rctl = er32(RCTL);
4384 rctl &= ~E1000_RCTL_CFIEN;
4385 if (!(netdev->flags & IFF_PROMISC))
4386 rctl |= E1000_RCTL_VFE;
4387 ew32(RCTL, rctl);
4388 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4389 } else {
4390 /* disable VLAN tag insert/strip */
1dc32918 4391 ctrl = er32(CTRL);
1da177e4 4392 ctrl &= ~E1000_CTRL_VME;
1dc32918 4393 ew32(CTRL, ctrl);
1da177e4 4394
1532ecea
JB		 4395 /* disable VLAN receive filtering */
4396 rctl = er32(RCTL);
4397 rctl &= ~E1000_RCTL_VFE;
4398 ew32(RCTL, rctl);
fd38d7a0 4399
1532ecea 4400 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
120a5d0d 4401 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1532ecea 4402 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
cd94dd0b 4403 }
1da177e4
LT		 4404 }
4405
9150b76a
JB		 4406 if (!test_bit(__E1000_DOWN, &adapter->flags))
4407 e1000_irq_enable(adapter);
1da177e4
LT		 4408}
4409
64798845 4410static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4411{
60490fe0 4412 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4413 struct e1000_hw *hw = &adapter->hw;
406874a7 4414 u32 vfta, index;
96838a40 4415
1dc32918 4416 if ((hw->mng_cookie.status &
96838a40
JB		 4417 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4418 (vid == adapter->mng_vlan_id))
2d7edb92 4419 return;
1da177e4
LT		 4420 /* add VID to filter table */
4421 index = (vid >> 5) & 0x7F;
1dc32918 4422 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4423 vfta |= (1 << (vid & 0x1F));
1dc32918 4424 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4425}
4426
64798845 4427static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4428{
60490fe0 4429 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4430 struct e1000_hw *hw = &adapter->hw;
406874a7 4431 u32 vfta, index;
1da177e4 4432
9150b76a
JB		 4433 if (!test_bit(__E1000_DOWN, &adapter->flags))
4434 e1000_irq_disable(adapter);
5c15bdec 4435 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4436 if (!test_bit(__E1000_DOWN, &adapter->flags))
4437 e1000_irq_enable(adapter);
1da177e4
LT		 4438
4439 /* remove VID from filter table */
4440 index = (vid >> 5) & 0x7F;
1dc32918 4441 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4442 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4443 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4444}
4445
64798845 4446static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4447{
4448 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4449
96838a40 4450 if (adapter->vlgrp) {
406874a7 4451 u16 vid;
96838a40 4452 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4453 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4454 continue;
4455 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4456 }
4457 }
4458}
4459
64798845 4460int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4461{
1dc32918
JP		 4462 struct e1000_hw *hw = &adapter->hw;
4463
4464 hw->autoneg = 0;
1da177e4 4465
6921368f 4466 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4467 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4468 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4469 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4470 return -EINVAL;
4471 }
4472
96838a40 4473 switch (spddplx) {
1da177e4 4474 case SPEED_10 + DUPLEX_HALF:
1dc32918 4475 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4476 break;
4477 case SPEED_10 + DUPLEX_FULL:
1dc32918 4478 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4479 break;
4480 case SPEED_100 + DUPLEX_HALF:
1dc32918 4481 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4482 break;
4483 case SPEED_100 + DUPLEX_FULL:
1dc32918 4484 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4485 break;
4486 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4487 hw->autoneg = 1;
4488 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4489 break;
4490 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4491 default:
2648345f 4492 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4493 return -EINVAL;
4494 }
4495 return 0;
4496}
4497
b43fcd7d 4498static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4499{
4500 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4501 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4502 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4503 u32 ctrl, ctrl_ext, rctl, status;
4504 u32 wufc = adapter->wol;
6fdfef16 4505#ifdef CONFIG_PM
240b1710 4506 int retval = 0;
6fdfef16 4507#endif
1da177e4
LT		 4508
4509 netif_device_detach(netdev);
4510
2db10a08
AK		 4511 if (netif_running(netdev)) {
4512 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4513 e1000_down(adapter);
2db10a08 4514 }
1da177e4 4515
2f82665f 4516#ifdef CONFIG_PM
1d33e9c6 4517 retval = pci_save_state(pdev);
2f82665f
JB		 4518 if (retval)
4519 return retval;
4520#endif
4521
1dc32918 4522 status = er32(STATUS);
96838a40 4523 if (status & E1000_STATUS_LU)
1da177e4
LT		 4524 wufc &= ~E1000_WUFC_LNKC;
4525
96838a40 4526 if (wufc) {
1da177e4 4527 e1000_setup_rctl(adapter);
db0ce50d 4528 e1000_set_rx_mode(netdev);
1da177e4
LT		 4529
4530 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4531 if (wufc & E1000_WUFC_MC) {
1dc32918 4532 rctl = er32(RCTL);
1da177e4 4533 rctl |= E1000_RCTL_MPE;
1dc32918 4534 ew32(RCTL, rctl);
1da177e4
LT		 4535 }
4536
1dc32918
JP		 4537 if (hw->mac_type >= e1000_82540) {
4538 ctrl = er32(CTRL);
1da177e4
LT		 4539 /* advertise wake from D3Cold */
4540 #define E1000_CTRL_ADVD3WUC 0x00100000
4541 /* phy power management enable */
4542 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4543 ctrl |= E1000_CTRL_ADVD3WUC |
4544 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4545 ew32(CTRL, ctrl);
1da177e4
LT		 4546 }
4547
1dc32918 4548 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4549 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4550 /* keep the laser running in D3 */
1dc32918 4551 ctrl_ext = er32(CTRL_EXT);
1da177e4 4552 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4553 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4554 }
4555
1dc32918
JP		 4556 ew32(WUC, E1000_WUC_PME_EN);
4557 ew32(WUFC, wufc);
1da177e4 4558 } else {
1dc32918
JP		 4559 ew32(WUC, 0);
4560 ew32(WUFC, 0);
1da177e4
LT		 4561 }
4562
0fccd0e9
JG		 4563 e1000_release_manageability(adapter);
4564
b43fcd7d
RW		 4565 *enable_wake = !!wufc;
4566
0fccd0e9 4567 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4568 if (adapter->en_mng_pt)
4569 *enable_wake = true;
1da177e4 4570
edd106fc
AK		 4571 if (netif_running(netdev))
4572 e1000_free_irq(adapter);
4573
1da177e4 4574 pci_disable_device(pdev);
240b1710 4575
1da177e4
LT		 4576 return 0;
4577}
4578
2f82665f 4579#ifdef CONFIG_PM
b43fcd7d
RW		 4580static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4581{
4582 int retval;
4583 bool wake;
4584
4585 retval = __e1000_shutdown(pdev, &wake);
4586 if (retval)
4587 return retval;
4588
4589 if (wake) {
4590 pci_prepare_to_sleep(pdev);
4591 } else {
4592 pci_wake_from_d3(pdev, false);
4593 pci_set_power_state(pdev, PCI_D3hot);
4594 }
4595
4596 return 0;
4597}
4598
64798845 4599static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4600{
4601 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4602 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4603 struct e1000_hw *hw = &adapter->hw;
406874a7 4604 u32 err;
1da177e4 4605
d0e027db 4606 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4607 pci_restore_state(pdev);
81250297
TI		 4608
4609 if (adapter->need_ioport)
4610 err = pci_enable_device(pdev);
4611 else
4612 err = pci_enable_device_mem(pdev);
c7be73bc 4613 if (err) {
3d1dd8cb
AK		 4614 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4615 return err;
4616 }
a4cb847d 4617 pci_set_master(pdev);
1da177e4 4618
d0e027db
AK		 4619 pci_enable_wake(pdev, PCI_D3hot, 0);
4620 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4621
c7be73bc
JP		 4622 if (netif_running(netdev)) {
4623 err = e1000_request_irq(adapter);
4624 if (err)
4625 return err;
4626 }
edd106fc
AK		 4627
4628 e1000_power_up_phy(adapter);
1da177e4 4629 e1000_reset(adapter);
1dc32918 4630 ew32(WUS, ~0);
1da177e4 4631
0fccd0e9
JG		 4632 e1000_init_manageability(adapter);
4633
96838a40 4634 if (netif_running(netdev))
1da177e4
LT		 4635 e1000_up(adapter);
4636
4637 netif_device_attach(netdev);
4638
1da177e4
LT		 4639 return 0;
4640}
4641#endif
c653e635
AK		 4642
4643static void e1000_shutdown(struct pci_dev *pdev)
4644{
b43fcd7d
RW		 4645 bool wake;
4646
4647 __e1000_shutdown(pdev, &wake);
4648
4649 if (system_state == SYSTEM_POWER_OFF) {
4650 pci_wake_from_d3(pdev, wake);
4651 pci_set_power_state(pdev, PCI_D3hot);
4652 }
c653e635
AK		 4653}
4654
1da177e4
LT		 4655#ifdef CONFIG_NET_POLL_CONTROLLER
4656/*
4657 * Polling 'interrupt' - used by things like netconsole to send skbs
4658 * without having to re-enable interrupts. It's not called while
4659 * the interrupt routine is executing.
4660 */
64798845 4661static void e1000_netpoll(struct net_device *netdev)
1da177e4 4662{
60490fe0 4663 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4664
1da177e4 4665 disable_irq(adapter->pdev->irq);
7d12e780 4666 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4667 enable_irq(adapter->pdev->irq);
4668}
4669#endif
4670
9026729b
AK		 4671/**
4672 * e1000_io_error_detected - called when PCI error is detected
4673 * @pdev: Pointer to PCI device
120a5d0d 4674 * @state: The current pci connection state
9026729b
AK		 4675 *
4676 * This function is called after a PCI bus error affecting
4677 * this device has been detected.
4678 */
64798845
JP		 4679static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4680 pci_channel_state_t state)
9026729b
AK		 4681{
4682 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4683 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4684
4685 netif_device_detach(netdev);
4686
eab63302
AD		 4687 if (state == pci_channel_io_perm_failure)
4688 return PCI_ERS_RESULT_DISCONNECT;
4689
9026729b
AK		 4690 if (netif_running(netdev))
4691 e1000_down(adapter);
72e8d6bb 4692 pci_disable_device(pdev);
9026729b
AK		 4693
4694 /* Request a slot slot reset. */
4695 return PCI_ERS_RESULT_NEED_RESET;
4696}
4697
4698/**
4699 * e1000_io_slot_reset - called after the pci bus has been reset.
4700 * @pdev: Pointer to PCI device
4701 *
4702 * Restart the card from scratch, as if from a cold-boot. Implementation
4703 * resembles the first-half of the e1000_resume routine.
4704 */
4705static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4706{
4707 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4708 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4709 struct e1000_hw *hw = &adapter->hw;
81250297 4710 int err;
9026729b 4711
81250297
TI		 4712 if (adapter->need_ioport)
4713 err = pci_enable_device(pdev);
4714 else
4715 err = pci_enable_device_mem(pdev);
4716 if (err) {
9026729b
AK		 4717 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4718 return PCI_ERS_RESULT_DISCONNECT;
4719 }
4720 pci_set_master(pdev);
4721
dbf38c94
LV		 4722 pci_enable_wake(pdev, PCI_D3hot, 0);
4723 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4724
9026729b 4725 e1000_reset(adapter);
1dc32918 4726 ew32(WUS, ~0);
9026729b
AK		 4727
4728 return PCI_ERS_RESULT_RECOVERED;
4729}
4730
4731/**
4732 * e1000_io_resume - called when traffic can start flowing again.
4733 * @pdev: Pointer to PCI device
4734 *
4735 * This callback is called when the error recovery driver tells us that
4736 * its OK to resume normal operation. Implementation resembles the
4737 * second-half of the e1000_resume routine.
4738 */
4739static void e1000_io_resume(struct pci_dev *pdev)
4740{
4741 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4742 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4743
4744 e1000_init_manageability(adapter);
9026729b
AK		 4745
4746 if (netif_running(netdev)) {
4747 if (e1000_up(adapter)) {
4748 printk("e1000: can't bring device back up after reset\n");
4749 return;
4750 }
4751 }
4752
4753 netif_device_attach(netdev);
9026729b
AK		 4754}
4755
1da177e4 4756/* e1000_main.c */
Clone of davem's net-next-2.6 tree