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[PATCH] e1000: Added driver comments
[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
73629bbc
JB		 32 * 6.3.9 12/16/2005
33 * o incorporate fix for recycled skbs from IBM LTC
34 * 6.3.7 11/18/2005
35 * o Honor eeprom setting for enabling/disabling Wake On Lan
36 * 6.3.5 11/17/2005
37 * o Fix memory leak in rx ring handling for PCI Express adapters
38 * 6.3.4 11/8/05
39 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
40 * 6.3.2 9/20/05
41 * o Render logic that sets/resets DRV_LOAD as inline functions to
42 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
43 * network interface is open.
44 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
45 * o Adjust PBA partioning for Jumbo frames using MTU size and not
46 * rx_buffer_len
47 * 6.3.1 9/19/05
48 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
49 (e1000_clean_tx_irq)
50 * o Support for 8086:10B5 device (Quad Port)
51 * 6.2.14 9/15/05
52 * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
53 * open/close
54 * 6.2.13 9/14/05
55 * o Invoke e1000_check_mng_mode only for 8257x controllers since it
56 * accesses the FWSM that is not supported in other controllers
57 * 6.2.12 9/9/05
58 * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
59 * o set RCTL:SECRC only for controllers newer than 82543.
60 * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
61 * This code was moved from e1000_remove to e1000_close
62 * 6.2.10 9/6/05
63 * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
64 * o Enable fc by default on 82573 controllers (do not read eeprom)
65 * o Fix rx_errors statistic not to include missed_packet_count
66 * o Fix rx_dropped statistic not to include missed_packet_count
67 (Padraig Brady)
68 * 6.2.9 8/30/05
69 * o Remove call to update statistics from the controller ib e1000_get_stats
70 * 6.2.8 8/30/05
71 * o Improved algorithm for rx buffer allocation/rdt update
72 * o Flow control watermarks relative to rx PBA size
73 * o Simplified 'Tx Hung' detect logic
74 * 6.2.7 8/17/05
75 * o Report rx buffer allocation failures and tx timeout counts in stats
76 * 6.2.6 8/16/05
77 * o Implement workaround for controller erratum -- linear non-tso packet
78 * following a TSO gets written back prematurely
79 * 6.2.5 8/15/05
80 * o Set netdev->tx_queue_len based on link speed/duplex settings.
81 * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
82 * o Do not power off PHY if SoL/IDER session is active
83 * 6.2.4 8/10/05
84 * o Fix loopback test setup/cleanup for 82571/3 controllers
85 * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
86 * all packets as raw
87 * o Prevent operations that will cause the PHY to be reset if SoL/IDER
88 * sessions are active and log a message
89 * 6.2.2 7/21/05
90 * o used fixed size descriptors for all MTU sizes, reduces memory load
91 * 6.2.1 7/21/05
92 * o Performance tweaks, including copybreak and prefetch
93 * 6.1.2 4/13/05
94 * o Fixed ethtool diagnostics
95 * o Enabled flow control to take default eeprom settings
96 * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
97 * calls, one from mii_ioctl and other from within update_stats while
98 * processing MIIREG ioctl.
1da177e4
LT		 99 */
100
101char e1000_driver_name[] = "e1000";
3ad2cc67 102static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 103#ifndef CONFIG_E1000_NAPI
104#define DRIVERNAPI
105#else
106#define DRIVERNAPI "-NAPI"
107#endif
4ee9c020 108#define DRV_VERSION "6.3.9-k2"DRIVERNAPI
1da177e4 109char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 110static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 111
112/* e1000_pci_tbl - PCI Device ID Table
113 *
114 * Last entry must be all 0s
115 *
116 * Macro expands to...
117 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
118 */
119static struct pci_device_id e1000_pci_tbl[] = {
120 INTEL_E1000_ETHERNET_DEVICE(0x1000),
121 INTEL_E1000_ETHERNET_DEVICE(0x1001),
122 INTEL_E1000_ETHERNET_DEVICE(0x1004),
123 INTEL_E1000_ETHERNET_DEVICE(0x1008),
124 INTEL_E1000_ETHERNET_DEVICE(0x1009),
125 INTEL_E1000_ETHERNET_DEVICE(0x100C),
126 INTEL_E1000_ETHERNET_DEVICE(0x100D),
127 INTEL_E1000_ETHERNET_DEVICE(0x100E),
128 INTEL_E1000_ETHERNET_DEVICE(0x100F),
129 INTEL_E1000_ETHERNET_DEVICE(0x1010),
130 INTEL_E1000_ETHERNET_DEVICE(0x1011),
131 INTEL_E1000_ETHERNET_DEVICE(0x1012),
132 INTEL_E1000_ETHERNET_DEVICE(0x1013),
133 INTEL_E1000_ETHERNET_DEVICE(0x1014),
134 INTEL_E1000_ETHERNET_DEVICE(0x1015),
135 INTEL_E1000_ETHERNET_DEVICE(0x1016),
136 INTEL_E1000_ETHERNET_DEVICE(0x1017),
137 INTEL_E1000_ETHERNET_DEVICE(0x1018),
138 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 139 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 140 INTEL_E1000_ETHERNET_DEVICE(0x101D),
141 INTEL_E1000_ETHERNET_DEVICE(0x101E),
142 INTEL_E1000_ETHERNET_DEVICE(0x1026),
143 INTEL_E1000_ETHERNET_DEVICE(0x1027),
144 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 145 INTEL_E1000_ETHERNET_DEVICE(0x105E),
146 INTEL_E1000_ETHERNET_DEVICE(0x105F),
147 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 148 INTEL_E1000_ETHERNET_DEVICE(0x1075),
149 INTEL_E1000_ETHERNET_DEVICE(0x1076),
150 INTEL_E1000_ETHERNET_DEVICE(0x1077),
151 INTEL_E1000_ETHERNET_DEVICE(0x1078),
152 INTEL_E1000_ETHERNET_DEVICE(0x1079),
153 INTEL_E1000_ETHERNET_DEVICE(0x107A),
154 INTEL_E1000_ETHERNET_DEVICE(0x107B),
155 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 156 INTEL_E1000_ETHERNET_DEVICE(0x107D),
157 INTEL_E1000_ETHERNET_DEVICE(0x107E),
158 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 159 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 160 INTEL_E1000_ETHERNET_DEVICE(0x108B),
161 INTEL_E1000_ETHERNET_DEVICE(0x108C),
b7ee49db 162 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 163 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 164 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 165 /* required last entry */
166 {0,}
167};
168
169MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
170
171int e1000_up(struct e1000_adapter *adapter);
172void e1000_down(struct e1000_adapter *adapter);
173void e1000_reset(struct e1000_adapter *adapter);
174int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 175int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
176int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
177void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
178void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67
AB		 179static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
180 struct e1000_tx_ring *txdr);
181static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
182 struct e1000_rx_ring *rxdr);
183static void e1000_free_tx_resources(struct e1000_adapter *adapter,
184 struct e1000_tx_ring *tx_ring);
185static void e1000_free_rx_resources(struct e1000_adapter *adapter,
186 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 187void e1000_update_stats(struct e1000_adapter *adapter);
188
189/* Local Function Prototypes */
190
191static int e1000_init_module(void);
192static void e1000_exit_module(void);
193static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
194static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e
MC		 195static int e1000_alloc_queues(struct e1000_adapter *adapter);
196#ifdef CONFIG_E1000_MQ
197static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
198#endif
1da177e4
LT		 199static int e1000_sw_init(struct e1000_adapter *adapter);
200static int e1000_open(struct net_device *netdev);
201static int e1000_close(struct net_device *netdev);
202static void e1000_configure_tx(struct e1000_adapter *adapter);
203static void e1000_configure_rx(struct e1000_adapter *adapter);
204static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 205static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
206static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
207static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
208 struct e1000_tx_ring *tx_ring);
209static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
210 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 211static void e1000_set_multi(struct net_device *netdev);
212static void e1000_update_phy_info(unsigned long data);
213static void e1000_watchdog(unsigned long data);
214static void e1000_watchdog_task(struct e1000_adapter *adapter);
215static void e1000_82547_tx_fifo_stall(unsigned long data);
216static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
217static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
218static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
219static int e1000_set_mac(struct net_device *netdev, void *p);
220static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 221static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
222 struct e1000_tx_ring *tx_ring);
1da177e4 223#ifdef CONFIG_E1000_NAPI
581d708e 224static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 225static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 226 struct e1000_rx_ring *rx_ring,
1da177e4 227 int *work_done, int work_to_do);
2d7edb92 228static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 229 struct e1000_rx_ring *rx_ring,
2d7edb92 230 int *work_done, int work_to_do);
1da177e4 231#else
581d708e
MC		 232static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
233 struct e1000_rx_ring *rx_ring);
234static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
235 struct e1000_rx_ring *rx_ring);
1da177e4 236#endif
581d708e 237static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 238 struct e1000_rx_ring *rx_ring,
239 int cleaned_count);
581d708e 240static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 241 struct e1000_rx_ring *rx_ring,
242 int cleaned_count);
1da177e4
LT		 243static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
244static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
245 int cmd);
246void e1000_set_ethtool_ops(struct net_device *netdev);
247static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
248static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
249static void e1000_tx_timeout(struct net_device *dev);
250static void e1000_tx_timeout_task(struct net_device *dev);
251static void e1000_smartspeed(struct e1000_adapter *adapter);
252static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
253 struct sk_buff *skb);
254
255static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
256static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
257static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
258static void e1000_restore_vlan(struct e1000_adapter *adapter);
259
1da177e4 260#ifdef CONFIG_PM
977e74b5 261static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 262static int e1000_resume(struct pci_dev *pdev);
263#endif
264
265#ifdef CONFIG_NET_POLL_CONTROLLER
266/* for netdump / net console */
267static void e1000_netpoll (struct net_device *netdev);
268#endif
269
24025e4e
MC		 270#ifdef CONFIG_E1000_MQ
271/* for multiple Rx queues */
272void e1000_rx_schedule(void *data);
273#endif
274
1da177e4
LT		 275/* Exported from other modules */
276
277extern void e1000_check_options(struct e1000_adapter *adapter);
278
279static struct pci_driver e1000_driver = {
280 .name = e1000_driver_name,
281 .id_table = e1000_pci_tbl,
282 .probe = e1000_probe,
283 .remove = __devexit_p(e1000_remove),
284 /* Power Managment Hooks */
285#ifdef CONFIG_PM
286 .suspend = e1000_suspend,
287 .resume = e1000_resume
288#endif
289};
290
291MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
292MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
293MODULE_LICENSE("GPL");
294MODULE_VERSION(DRV_VERSION);
295
296static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
297module_param(debug, int, 0);
298MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
299
300/**
301 * e1000_init_module - Driver Registration Routine
302 *
303 * e1000_init_module is the first routine called when the driver is
304 * loaded. All it does is register with the PCI subsystem.
305 **/
306
307static int __init
308e1000_init_module(void)
309{
310 int ret;
311 printk(KERN_INFO "%s - version %s\n",
312 e1000_driver_string, e1000_driver_version);
313
314 printk(KERN_INFO "%s\n", e1000_copyright);
315
316 ret = pci_module_init(&e1000_driver);
8b378def 317
1da177e4
LT		 318 return ret;
319}
320
321module_init(e1000_init_module);
322
323/**
324 * e1000_exit_module - Driver Exit Cleanup Routine
325 *
326 * e1000_exit_module is called just before the driver is removed
327 * from memory.
328 **/
329
330static void __exit
331e1000_exit_module(void)
332{
1da177e4
LT		 333 pci_unregister_driver(&e1000_driver);
334}
335
336module_exit(e1000_exit_module);
337
338/**
339 * e1000_irq_disable - Mask off interrupt generation on the NIC
340 * @adapter: board private structure
341 **/
342
343static inline void
344e1000_irq_disable(struct e1000_adapter *adapter)
345{
346 atomic_inc(&adapter->irq_sem);
347 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
348 E1000_WRITE_FLUSH(&adapter->hw);
349 synchronize_irq(adapter->pdev->irq);
350}
351
352/**
353 * e1000_irq_enable - Enable default interrupt generation settings
354 * @adapter: board private structure
355 **/
356
357static inline void
358e1000_irq_enable(struct e1000_adapter *adapter)
359{
96838a40 360 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 361 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
362 E1000_WRITE_FLUSH(&adapter->hw);
363 }
364}
3ad2cc67
AB		 365
366static void
2d7edb92
MC		 367e1000_update_mng_vlan(struct e1000_adapter *adapter)
368{
369 struct net_device *netdev = adapter->netdev;
370 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
371 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 372 if (adapter->vlgrp) {
373 if (!adapter->vlgrp->vlan_devices[vid]) {
374 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 375 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
376 e1000_vlan_rx_add_vid(netdev, vid);
377 adapter->mng_vlan_id = vid;
378 } else
379 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 380
381 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
382 (vid != old_vid) &&
2d7edb92
MC		 383 !adapter->vlgrp->vlan_devices[old_vid])
384 e1000_vlan_rx_kill_vid(netdev, old_vid);
385 }
386 }
387}
b55ccb35
JK		 388
389/**
390 * e1000_release_hw_control - release control of the h/w to f/w
391 * @adapter: address of board private structure
392 *
393 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
394 * For ASF and Pass Through versions of f/w this means that the
395 * driver is no longer loaded. For AMT version (only with 82573) i
396 * of the f/w this means that the netowrk i/f is closed.
397 *
398 **/
399
400static inline void
401e1000_release_hw_control(struct e1000_adapter *adapter)
402{
403 uint32_t ctrl_ext;
404 uint32_t swsm;
405
406 /* Let firmware taken over control of h/w */
407 switch (adapter->hw.mac_type) {
408 case e1000_82571:
409 case e1000_82572:
410 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
411 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
412 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
413 break;
414 case e1000_82573:
415 swsm = E1000_READ_REG(&adapter->hw, SWSM);
416 E1000_WRITE_REG(&adapter->hw, SWSM,
417 swsm & ~E1000_SWSM_DRV_LOAD);
418 default:
419 break;
420 }
421}
422
423/**
424 * e1000_get_hw_control - get control of the h/w from f/w
425 * @adapter: address of board private structure
426 *
427 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
428 * For ASF and Pass Through versions of f/w this means that
429 * the driver is loaded. For AMT version (only with 82573)
430 * of the f/w this means that the netowrk i/f is open.
431 *
432 **/
433
434static inline void
435e1000_get_hw_control(struct e1000_adapter *adapter)
436{
437 uint32_t ctrl_ext;
438 uint32_t swsm;
439 /* Let firmware know the driver has taken over */
440 switch (adapter->hw.mac_type) {
441 case e1000_82571:
442 case e1000_82572:
443 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
444 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
445 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
446 break;
447 case e1000_82573:
448 swsm = E1000_READ_REG(&adapter->hw, SWSM);
449 E1000_WRITE_REG(&adapter->hw, SWSM,
450 swsm | E1000_SWSM_DRV_LOAD);
451 break;
452 default:
453 break;
454 }
455}
456
1da177e4
LT		 457int
458e1000_up(struct e1000_adapter *adapter)
459{
460 struct net_device *netdev = adapter->netdev;
581d708e 461 int i, err;
1da177e4
LT		 462
463 /* hardware has been reset, we need to reload some things */
464
465 /* Reset the PHY if it was previously powered down */
96838a40 466 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 467 uint16_t mii_reg;
468 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
96838a40 469 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4
LT		 470 e1000_phy_reset(&adapter->hw);
471 }
472
473 e1000_set_multi(netdev);
474
475 e1000_restore_vlan(adapter);
476
477 e1000_configure_tx(adapter);
478 e1000_setup_rctl(adapter);
479 e1000_configure_rx(adapter);
72d64a43
JK		 480 /* call E1000_DESC_UNUSED which always leaves
481 * at least 1 descriptor unused to make sure
482 * next_to_use != next_to_clean */
f56799ea 483 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 484 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 485 adapter->alloc_rx_buf(adapter, ring,
486 E1000_DESC_UNUSED(ring));
f56799ea 487 }
1da177e4 488
fa4f7ef3 489#ifdef CONFIG_PCI_MSI
96838a40 490 if (adapter->hw.mac_type > e1000_82547_rev_2) {
fa4f7ef3 491 adapter->have_msi = TRUE;
96838a40 492 if ((err = pci_enable_msi(adapter->pdev))) {
fa4f7ef3
MC		 493 DPRINTK(PROBE, ERR,
494 "Unable to allocate MSI interrupt Error: %d\n", err);
495 adapter->have_msi = FALSE;
496 }
497 }
498#endif
96838a40 499 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
1da177e4 500 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 501 netdev->name, netdev))) {
502 DPRINTK(PROBE, ERR,
503 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 504 return err;
2648345f 505 }
1da177e4 506
7bfa4816
JK		 507#ifdef CONFIG_E1000_MQ
508 e1000_setup_queue_mapping(adapter);
509#endif
510
511 adapter->tx_queue_len = netdev->tx_queue_len;
512
1da177e4 513 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 514
515#ifdef CONFIG_E1000_NAPI
516 netif_poll_enable(netdev);
517#endif
5de55624
MC		 518 e1000_irq_enable(adapter);
519
1da177e4
LT		 520 return 0;
521}
522
523void
524e1000_down(struct e1000_adapter *adapter)
525{
526 struct net_device *netdev = adapter->netdev;
57128197
JK		 527 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
528 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 529
530 e1000_irq_disable(adapter);
24025e4e
MC		 531#ifdef CONFIG_E1000_MQ
532 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
533#endif
1da177e4 534 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3 535#ifdef CONFIG_PCI_MSI
96838a40 536 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
fa4f7ef3
MC		 537 adapter->have_msi == TRUE)
538 pci_disable_msi(adapter->pdev);
539#endif
1da177e4
LT		 540 del_timer_sync(&adapter->tx_fifo_stall_timer);
541 del_timer_sync(&adapter->watchdog_timer);
542 del_timer_sync(&adapter->phy_info_timer);
543
544#ifdef CONFIG_E1000_NAPI
545 netif_poll_disable(netdev);
546#endif
7bfa4816 547 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 548 adapter->link_speed = 0;
549 adapter->link_duplex = 0;
550 netif_carrier_off(netdev);
551 netif_stop_queue(netdev);
552
553 e1000_reset(adapter);
581d708e
MC		 554 e1000_clean_all_tx_rings(adapter);
555 e1000_clean_all_rx_rings(adapter);
1da177e4 556
57128197
JK		 557 /* Power down the PHY so no link is implied when interface is down *
558 * The PHY cannot be powered down if any of the following is TRUE *
559 * (a) WoL is enabled
560 * (b) AMT is active
561 * (c) SoL/IDER session is active */
562 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 563 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 564 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
565 !mng_mode_enabled &&
566 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 567 uint16_t mii_reg;
568 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
569 mii_reg |= MII_CR_POWER_DOWN;
570 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 571 mdelay(1);
1da177e4
LT		 572 }
573}
574
575void
576e1000_reset(struct e1000_adapter *adapter)
577{
2d7edb92 578 uint32_t pba, manc;
1125ecbc 579 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 580
581 /* Repartition Pba for greater than 9k mtu
582 * To take effect CTRL.RST is required.
583 */
584
2d7edb92
MC		 585 switch (adapter->hw.mac_type) {
586 case e1000_82547:
0e6ef3e0 587 case e1000_82547_rev_2:
2d7edb92
MC		 588 pba = E1000_PBA_30K;
589 break;
868d5309
MC		 590 case e1000_82571:
591 case e1000_82572:
592 pba = E1000_PBA_38K;
593 break;
2d7edb92
MC		 594 case e1000_82573:
595 pba = E1000_PBA_12K;
596 break;
597 default:
598 pba = E1000_PBA_48K;
599 break;
600 }
601
96838a40 602 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 603 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 604 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 605
606
96838a40 607 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 608 adapter->tx_fifo_head = 0;
609 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
610 adapter->tx_fifo_size =
611 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
612 atomic_set(&adapter->tx_fifo_stall, 0);
613 }
2d7edb92 614
1da177e4
LT		 615 E1000_WRITE_REG(&adapter->hw, PBA, pba);
616
617 /* flow control settings */
f11b7f85
JK		 618 /* Set the FC high water mark to 90% of the FIFO size.
619 * Required to clear last 3 LSB */
620 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
621
622 adapter->hw.fc_high_water = fc_high_water_mark;
623 adapter->hw.fc_low_water = fc_high_water_mark - 8;
1da177e4
LT		 624 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
625 adapter->hw.fc_send_xon = 1;
626 adapter->hw.fc = adapter->hw.original_fc;
627
2d7edb92 628 /* Allow time for pending master requests to run */
1da177e4 629 e1000_reset_hw(&adapter->hw);
96838a40 630 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 631 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 632 if (e1000_init_hw(&adapter->hw))
1da177e4 633 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 634 e1000_update_mng_vlan(adapter);
1da177e4
LT		 635 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
636 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
637
638 e1000_reset_adaptive(&adapter->hw);
639 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 640 if (adapter->en_mng_pt) {
641 manc = E1000_READ_REG(&adapter->hw, MANC);
642 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
643 E1000_WRITE_REG(&adapter->hw, MANC, manc);
644 }
1da177e4
LT		 645}
646
647/**
648 * e1000_probe - Device Initialization Routine
649 * @pdev: PCI device information struct
650 * @ent: entry in e1000_pci_tbl
651 *
652 * Returns 0 on success, negative on failure
653 *
654 * e1000_probe initializes an adapter identified by a pci_dev structure.
655 * The OS initialization, configuring of the adapter private structure,
656 * and a hardware reset occur.
657 **/
658
659static int __devinit
660e1000_probe(struct pci_dev *pdev,
661 const struct pci_device_id *ent)
662{
663 struct net_device *netdev;
664 struct e1000_adapter *adapter;
2d7edb92 665 unsigned long mmio_start, mmio_len;
2d7edb92 666
1da177e4 667 static int cards_found = 0;
2d7edb92 668 int i, err, pci_using_dac;
1da177e4
LT		 669 uint16_t eeprom_data;
670 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 671 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 672 return err;
673
96838a40 674 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 675 pci_using_dac = 1;
676 } else {
96838a40 677 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 678 E1000_ERR("No usable DMA configuration, aborting\n");
679 return err;
680 }
681 pci_using_dac = 0;
682 }
683
96838a40 684 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 685 return err;
686
687 pci_set_master(pdev);
688
689 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 690 if (!netdev) {
1da177e4
LT		 691 err = -ENOMEM;
692 goto err_alloc_etherdev;
693 }
694
695 SET_MODULE_OWNER(netdev);
696 SET_NETDEV_DEV(netdev, &pdev->dev);
697
698 pci_set_drvdata(pdev, netdev);
60490fe0 699 adapter = netdev_priv(netdev);
1da177e4
LT		 700 adapter->netdev = netdev;
701 adapter->pdev = pdev;
702 adapter->hw.back = adapter;
703 adapter->msg_enable = (1 << debug) - 1;
704
705 mmio_start = pci_resource_start(pdev, BAR_0);
706 mmio_len = pci_resource_len(pdev, BAR_0);
707
708 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 709 if (!adapter->hw.hw_addr) {
1da177e4
LT		 710 err = -EIO;
711 goto err_ioremap;
712 }
713
96838a40
JB		 714 for (i = BAR_1; i <= BAR_5; i++) {
715 if (pci_resource_len(pdev, i) == 0)
1da177e4 716 continue;
96838a40 717 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 718 adapter->hw.io_base = pci_resource_start(pdev, i);
719 break;
720 }
721 }
722
723 netdev->open = &e1000_open;
724 netdev->stop = &e1000_close;
725 netdev->hard_start_xmit = &e1000_xmit_frame;
726 netdev->get_stats = &e1000_get_stats;
727 netdev->set_multicast_list = &e1000_set_multi;
728 netdev->set_mac_address = &e1000_set_mac;
729 netdev->change_mtu = &e1000_change_mtu;
730 netdev->do_ioctl = &e1000_ioctl;
731 e1000_set_ethtool_ops(netdev);
732 netdev->tx_timeout = &e1000_tx_timeout;
733 netdev->watchdog_timeo = 5 * HZ;
734#ifdef CONFIG_E1000_NAPI
735 netdev->poll = &e1000_clean;
736 netdev->weight = 64;
737#endif
738 netdev->vlan_rx_register = e1000_vlan_rx_register;
739 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
740 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
741#ifdef CONFIG_NET_POLL_CONTROLLER
742 netdev->poll_controller = e1000_netpoll;
743#endif
744 strcpy(netdev->name, pci_name(pdev));
745
746 netdev->mem_start = mmio_start;
747 netdev->mem_end = mmio_start + mmio_len;
748 netdev->base_addr = adapter->hw.io_base;
749
750 adapter->bd_number = cards_found;
751
752 /* setup the private structure */
753
96838a40 754 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 755 goto err_sw_init;
756
96838a40 757 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 758 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
759
96838a40 760 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 761 netdev->features = NETIF_F_SG |
762 NETIF_F_HW_CSUM |
763 NETIF_F_HW_VLAN_TX |
764 NETIF_F_HW_VLAN_RX |
765 NETIF_F_HW_VLAN_FILTER;
766 }
767
768#ifdef NETIF_F_TSO
96838a40 769 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 770 (adapter->hw.mac_type != e1000_82547))
771 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 772
773#ifdef NETIF_F_TSO_IPV6
96838a40 774 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 775 netdev->features |= NETIF_F_TSO_IPV6;
776#endif
1da177e4 777#endif
96838a40 778 if (pci_using_dac)
1da177e4
LT		 779 netdev->features |= NETIF_F_HIGHDMA;
780
781 /* hard_start_xmit is safe against parallel locking */
782 netdev->features |= NETIF_F_LLTX;
783
2d7edb92
MC		 784 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
785
96838a40 786 /* before reading the EEPROM, reset the controller to
1da177e4 787 * put the device in a known good starting state */
96838a40 788
1da177e4
LT		 789 e1000_reset_hw(&adapter->hw);
790
791 /* make sure the EEPROM is good */
792
96838a40 793 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 794 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
795 err = -EIO;
796 goto err_eeprom;
797 }
798
799 /* copy the MAC address out of the EEPROM */
800
96838a40 801 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 802 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
803 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 804 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 805
96838a40 806 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 807 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
808 err = -EIO;
809 goto err_eeprom;
810 }
811
812 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
813
814 e1000_get_bus_info(&adapter->hw);
815
816 init_timer(&adapter->tx_fifo_stall_timer);
817 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
818 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
819
820 init_timer(&adapter->watchdog_timer);
821 adapter->watchdog_timer.function = &e1000_watchdog;
822 adapter->watchdog_timer.data = (unsigned long) adapter;
823
824 INIT_WORK(&adapter->watchdog_task,
825 (void (*)(void *))e1000_watchdog_task, adapter);
826
827 init_timer(&adapter->phy_info_timer);
828 adapter->phy_info_timer.function = &e1000_update_phy_info;
829 adapter->phy_info_timer.data = (unsigned long) adapter;
830
831 INIT_WORK(&adapter->tx_timeout_task,
832 (void (*)(void *))e1000_tx_timeout_task, netdev);
833
834 /* we're going to reset, so assume we have no link for now */
835
836 netif_carrier_off(netdev);
837 netif_stop_queue(netdev);
838
839 e1000_check_options(adapter);
840
841 /* Initial Wake on LAN setting
842 * If APM wake is enabled in the EEPROM,
843 * enable the ACPI Magic Packet filter
844 */
845
96838a40 846 switch (adapter->hw.mac_type) {
1da177e4
LT		 847 case e1000_82542_rev2_0:
848 case e1000_82542_rev2_1:
849 case e1000_82543:
850 break;
851 case e1000_82544:
852 e1000_read_eeprom(&adapter->hw,
853 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
854 eeprom_apme_mask = E1000_EEPROM_82544_APM;
855 break;
856 case e1000_82546:
857 case e1000_82546_rev_3:
fd803241 858 case e1000_82571:
96838a40 859 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 860 e1000_read_eeprom(&adapter->hw,
861 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
862 break;
863 }
864 /* Fall Through */
865 default:
866 e1000_read_eeprom(&adapter->hw,
867 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
868 break;
869 }
96838a40 870 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 871 adapter->wol |= E1000_WUFC_MAG;
872
fb3d47d4
JK		 873 /* print bus type/speed/width info */
874 {
875 struct e1000_hw *hw = &adapter->hw;
876 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
877 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
878 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
879 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
880 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
881 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
882 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
883 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
884 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
885 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
886 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
887 "32-bit"));
888 }
889
890 for (i = 0; i < 6; i++)
891 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
892
1da177e4
LT		 893 /* reset the hardware with the new settings */
894 e1000_reset(adapter);
895
b55ccb35
JK		 896 /* If the controller is 82573 and f/w is AMT, do not set
897 * DRV_LOAD until the interface is up. For all other cases,
898 * let the f/w know that the h/w is now under the control
899 * of the driver. */
900 if (adapter->hw.mac_type != e1000_82573 ||
901 !e1000_check_mng_mode(&adapter->hw))
902 e1000_get_hw_control(adapter);
2d7edb92 903
1da177e4 904 strcpy(netdev->name, "eth%d");
96838a40 905 if ((err = register_netdev(netdev)))
1da177e4
LT		 906 goto err_register;
907
908 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
909
910 cards_found++;
911 return 0;
912
913err_register:
914err_sw_init:
915err_eeprom:
916 iounmap(adapter->hw.hw_addr);
917err_ioremap:
918 free_netdev(netdev);
919err_alloc_etherdev:
920 pci_release_regions(pdev);
921 return err;
922}
923
924/**
925 * e1000_remove - Device Removal Routine
926 * @pdev: PCI device information struct
927 *
928 * e1000_remove is called by the PCI subsystem to alert the driver
929 * that it should release a PCI device. The could be caused by a
930 * Hot-Plug event, or because the driver is going to be removed from
931 * memory.
932 **/
933
934static void __devexit
935e1000_remove(struct pci_dev *pdev)
936{
937 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 938 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 939 uint32_t manc;
581d708e
MC		 940#ifdef CONFIG_E1000_NAPI
941 int i;
942#endif
1da177e4 943
be2b28ed
JG		 944 flush_scheduled_work();
945
96838a40 946 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 947 adapter->hw.media_type == e1000_media_type_copper) {
948 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 949 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 950 manc |= E1000_MANC_ARP_EN;
951 E1000_WRITE_REG(&adapter->hw, MANC, manc);
952 }
953 }
954
b55ccb35
JK		 955 /* Release control of h/w to f/w. If f/w is AMT enabled, this
956 * would have already happened in close and is redundant. */
957 e1000_release_hw_control(adapter);
2d7edb92 958
1da177e4 959 unregister_netdev(netdev);
581d708e 960#ifdef CONFIG_E1000_NAPI
f56799ea 961 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 962 __dev_put(&adapter->polling_netdev[i]);
963#endif
1da177e4 964
96838a40 965 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 966 e1000_phy_hw_reset(&adapter->hw);
1da177e4 967
24025e4e
MC		 968 kfree(adapter->tx_ring);
969 kfree(adapter->rx_ring);
970#ifdef CONFIG_E1000_NAPI
971 kfree(adapter->polling_netdev);
972#endif
973
1da177e4
LT		 974 iounmap(adapter->hw.hw_addr);
975 pci_release_regions(pdev);
976
24025e4e
MC		 977#ifdef CONFIG_E1000_MQ
978 free_percpu(adapter->cpu_netdev);
979 free_percpu(adapter->cpu_tx_ring);
980#endif
1da177e4
LT		 981 free_netdev(netdev);
982
983 pci_disable_device(pdev);
984}
985
986/**
987 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
988 * @adapter: board private structure to initialize
989 *
990 * e1000_sw_init initializes the Adapter private data structure.
991 * Fields are initialized based on PCI device information and
992 * OS network device settings (MTU size).
993 **/
994
995static int __devinit
996e1000_sw_init(struct e1000_adapter *adapter)
997{
998 struct e1000_hw *hw = &adapter->hw;
999 struct net_device *netdev = adapter->netdev;
1000 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1001#ifdef CONFIG_E1000_NAPI
1002 int i;
1003#endif
1da177e4
LT		 1004
1005 /* PCI config space info */
1006
1007 hw->vendor_id = pdev->vendor;
1008 hw->device_id = pdev->device;
1009 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1010 hw->subsystem_id = pdev->subsystem_device;
1011
1012 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1013
1014 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1015
1016 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 1017 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 1018 hw->max_frame_size = netdev->mtu +
1019 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1020 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1021
1022 /* identify the MAC */
1023
96838a40 1024 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1025 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1026 return -EIO;
1027 }
1028
1029 /* initialize eeprom parameters */
1030
96838a40 1031 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1032 E1000_ERR("EEPROM initialization failed\n");
1033 return -EIO;
1034 }
1da177e4 1035
96838a40 1036 switch (hw->mac_type) {
1da177e4
LT		 1037 default:
1038 break;
1039 case e1000_82541:
1040 case e1000_82547:
1041 case e1000_82541_rev_2:
1042 case e1000_82547_rev_2:
1043 hw->phy_init_script = 1;
1044 break;
1045 }
1046
1047 e1000_set_media_type(hw);
1048
1049 hw->wait_autoneg_complete = FALSE;
1050 hw->tbi_compatibility_en = TRUE;
1051 hw->adaptive_ifs = TRUE;
1052
1053 /* Copper options */
1054
96838a40 1055 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1056 hw->mdix = AUTO_ALL_MODES;
1057 hw->disable_polarity_correction = FALSE;
1058 hw->master_slave = E1000_MASTER_SLAVE;
1059 }
1060
24025e4e
MC		 1061#ifdef CONFIG_E1000_MQ
1062 /* Number of supported queues */
1063 switch (hw->mac_type) {
1064 case e1000_82571:
1065 case e1000_82572:
f56799ea
JK		 1066 /* These controllers support 2 tx queues, but with a single
1067 * qdisc implementation, multiple tx queues aren't quite as
1068 * interesting. If we can find a logical way of mapping
1069 * flows to a queue, then perhaps we can up the num_tx_queue
1070 * count back to its default. Until then, we run the risk of
1071 * terrible performance due to SACK overload. */
1072 adapter->num_tx_queues = 1;
1073 adapter->num_rx_queues = 2;
24025e4e
MC		 1074 break;
1075 default:
f56799ea
JK		 1076 adapter->num_tx_queues = 1;
1077 adapter->num_rx_queues = 1;
24025e4e
MC		 1078 break;
1079 }
f56799ea
JK		 1080 adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
1081 adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
7bfa4816
JK		 1082 DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
1083 adapter->num_rx_queues,
1084 ((adapter->num_rx_queues == 1)
1085 ? ((num_online_cpus() > 1)
1086 ? "(due to unsupported feature in current adapter)"
1087 : "(due to unsupported system configuration)")
1088 : ""));
1089 DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1090 adapter->num_tx_queues);
24025e4e 1091#else
f56799ea
JK		 1092 adapter->num_tx_queues = 1;
1093 adapter->num_rx_queues = 1;
24025e4e 1094#endif
581d708e
MC		 1095
1096 if (e1000_alloc_queues(adapter)) {
1097 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1098 return -ENOMEM;
1099 }
1100
1101#ifdef CONFIG_E1000_NAPI
f56799ea 1102 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1103 adapter->polling_netdev[i].priv = adapter;
1104 adapter->polling_netdev[i].poll = &e1000_clean;
1105 adapter->polling_netdev[i].weight = 64;
1106 dev_hold(&adapter->polling_netdev[i]);
1107 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1108 }
7bfa4816 1109 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1110#endif
1111
1da177e4
LT		 1112 atomic_set(&adapter->irq_sem, 1);
1113 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1114
1115 return 0;
1116}
1117
581d708e
MC		 1118/**
1119 * e1000_alloc_queues - Allocate memory for all rings
1120 * @adapter: board private structure to initialize
1121 *
1122 * We allocate one ring per queue at run-time since we don't know the
1123 * number of queues at compile-time. The polling_netdev array is
1124 * intended for Multiqueue, but should work fine with a single queue.
1125 **/
1126
1127static int __devinit
1128e1000_alloc_queues(struct e1000_adapter *adapter)
1129{
1130 int size;
1131
f56799ea 1132 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1133 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1134 if (!adapter->tx_ring)
1135 return -ENOMEM;
1136 memset(adapter->tx_ring, 0, size);
1137
f56799ea 1138 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1139 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1140 if (!adapter->rx_ring) {
1141 kfree(adapter->tx_ring);
1142 return -ENOMEM;
1143 }
1144 memset(adapter->rx_ring, 0, size);
1145
1146#ifdef CONFIG_E1000_NAPI
f56799ea 1147 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1148 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1149 if (!adapter->polling_netdev) {
1150 kfree(adapter->tx_ring);
1151 kfree(adapter->rx_ring);
1152 return -ENOMEM;
1153 }
1154 memset(adapter->polling_netdev, 0, size);
1155#endif
1156
7bfa4816
JK		 1157#ifdef CONFIG_E1000_MQ
1158 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1159 adapter->rx_sched_call_data.info = adapter->netdev;
1160
1161 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1162 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1163#endif
1164
581d708e
MC		 1165 return E1000_SUCCESS;
1166}
1167
24025e4e
MC		 1168#ifdef CONFIG_E1000_MQ
1169static void __devinit
1170e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1171{
1172 int i, cpu;
1173
1174 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1175 adapter->rx_sched_call_data.info = adapter->netdev;
1176 cpus_clear(adapter->rx_sched_call_data.cpumask);
1177
1178 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1179 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1180
1181 lock_cpu_hotplug();
1182 i = 0;
1183 for_each_online_cpu(cpu) {
f56799ea 1184 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
24025e4e
MC		 1185 /* This is incomplete because we'd like to assign separate
1186 * physical cpus to these netdev polling structures and
1187 * avoid saturating a subset of cpus.
1188 */
f56799ea 1189 if (i < adapter->num_rx_queues) {
24025e4e 1190 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
7bfa4816
JK		 1191 adapter->rx_ring[i].cpu = cpu;
1192 cpu_set(cpu, adapter->cpumask);
24025e4e
MC		 1193 } else
1194 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1195
1196 i++;
1197 }
1198 unlock_cpu_hotplug();
1199}
1200#endif
1201
1da177e4
LT		 1202/**
1203 * e1000_open - Called when a network interface is made active
1204 * @netdev: network interface device structure
1205 *
1206 * Returns 0 on success, negative value on failure
1207 *
1208 * The open entry point is called when a network interface is made
1209 * active by the system (IFF_UP). At this point all resources needed
1210 * for transmit and receive operations are allocated, the interrupt
1211 * handler is registered with the OS, the watchdog timer is started,
1212 * and the stack is notified that the interface is ready.
1213 **/
1214
1215static int
1216e1000_open(struct net_device *netdev)
1217{
60490fe0 1218 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1219 int err;
1220
1221 /* allocate transmit descriptors */
1222
581d708e 1223 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1224 goto err_setup_tx;
1225
1226 /* allocate receive descriptors */
1227
581d708e 1228 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1229 goto err_setup_rx;
1230
96838a40 1231 if ((err = e1000_up(adapter)))
1da177e4 1232 goto err_up;
2d7edb92 1233 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1234 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1235 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1236 e1000_update_mng_vlan(adapter);
1237 }
1da177e4 1238
b55ccb35
JK		 1239 /* If AMT is enabled, let the firmware know that the network
1240 * interface is now open */
1241 if (adapter->hw.mac_type == e1000_82573 &&
1242 e1000_check_mng_mode(&adapter->hw))
1243 e1000_get_hw_control(adapter);
1244
1da177e4
LT		 1245 return E1000_SUCCESS;
1246
1247err_up:
581d708e 1248 e1000_free_all_rx_resources(adapter);
1da177e4 1249err_setup_rx:
581d708e 1250 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1251err_setup_tx:
1252 e1000_reset(adapter);
1253
1254 return err;
1255}
1256
1257/**
1258 * e1000_close - Disables a network interface
1259 * @netdev: network interface device structure
1260 *
1261 * Returns 0, this is not allowed to fail
1262 *
1263 * The close entry point is called when an interface is de-activated
1264 * by the OS. The hardware is still under the drivers control, but
1265 * needs to be disabled. A global MAC reset is issued to stop the
1266 * hardware, and all transmit and receive resources are freed.
1267 **/
1268
1269static int
1270e1000_close(struct net_device *netdev)
1271{
60490fe0 1272 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1273
1274 e1000_down(adapter);
1275
581d708e
MC		 1276 e1000_free_all_tx_resources(adapter);
1277 e1000_free_all_rx_resources(adapter);
1da177e4 1278
96838a40 1279 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1280 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1281 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1282 }
b55ccb35
JK		 1283
1284 /* If AMT is enabled, let the firmware know that the network
1285 * interface is now closed */
1286 if (adapter->hw.mac_type == e1000_82573 &&
1287 e1000_check_mng_mode(&adapter->hw))
1288 e1000_release_hw_control(adapter);
1289
1da177e4
LT		 1290 return 0;
1291}
1292
1293/**
1294 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1295 * @adapter: address of board private structure
2d7edb92
MC		 1296 * @start: address of beginning of memory
1297 * @len: length of memory
1da177e4
LT		 1298 **/
1299static inline boolean_t
1300e1000_check_64k_bound(struct e1000_adapter *adapter,
1301 void *start, unsigned long len)
1302{
1303 unsigned long begin = (unsigned long) start;
1304 unsigned long end = begin + len;
1305
2648345f
MC		 1306 /* First rev 82545 and 82546 need to not allow any memory
1307 * write location to cross 64k boundary due to errata 23 */
1da177e4 1308 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1309 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1310 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1311 }
1312
1313 return TRUE;
1314}
1315
1316/**
1317 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1318 * @adapter: board private structure
581d708e 1319 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1320 *
1321 * Return 0 on success, negative on failure
1322 **/
1323
3ad2cc67 1324static int
581d708e
MC		 1325e1000_setup_tx_resources(struct e1000_adapter *adapter,
1326 struct e1000_tx_ring *txdr)
1da177e4 1327{
1da177e4
LT		 1328 struct pci_dev *pdev = adapter->pdev;
1329 int size;
1330
1331 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1332
1333 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1334 if (!txdr->buffer_info) {
2648345f
MC		 1335 DPRINTK(PROBE, ERR,
1336 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1337 return -ENOMEM;
1338 }
1339 memset(txdr->buffer_info, 0, size);
1340
1341 /* round up to nearest 4K */
1342
1343 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1344 E1000_ROUNDUP(txdr->size, 4096);
1345
1346 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1347 if (!txdr->desc) {
1da177e4 1348setup_tx_desc_die:
1da177e4 1349 vfree(txdr->buffer_info);
2648345f
MC		 1350 DPRINTK(PROBE, ERR,
1351 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1352 return -ENOMEM;
1353 }
1354
2648345f 1355 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1356 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1357 void *olddesc = txdr->desc;
1358 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1359 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1360 "at %p\n", txdr->size, txdr->desc);
1361 /* Try again, without freeing the previous */
1da177e4 1362 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1363 /* Failed allocation, critical failure */
96838a40 1364 if (!txdr->desc) {
1da177e4
LT		 1365 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1366 goto setup_tx_desc_die;
1367 }
1368
1369 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1370 /* give up */
2648345f
MC		 1371 pci_free_consistent(pdev, txdr->size, txdr->desc,
1372 txdr->dma);
1da177e4
LT		 1373 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1374 DPRINTK(PROBE, ERR,
2648345f
MC		 1375 "Unable to allocate aligned memory "
1376 "for the transmit descriptor ring\n");
1da177e4
LT		 1377 vfree(txdr->buffer_info);
1378 return -ENOMEM;
1379 } else {
2648345f 1380 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1381 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1382 }
1383 }
1384 memset(txdr->desc, 0, txdr->size);
1385
1386 txdr->next_to_use = 0;
1387 txdr->next_to_clean = 0;
2ae76d98 1388 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1389
1390 return 0;
1391}
1392
581d708e
MC		 1393/**
1394 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1395 * (Descriptors) for all queues
1396 * @adapter: board private structure
1397 *
1398 * If this function returns with an error, then it's possible one or
1399 * more of the rings is populated (while the rest are not). It is the
1400 * callers duty to clean those orphaned rings.
1401 *
1402 * Return 0 on success, negative on failure
1403 **/
1404
1405int
1406e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1407{
1408 int i, err = 0;
1409
f56799ea 1410 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1411 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1412 if (err) {
1413 DPRINTK(PROBE, ERR,
1414 "Allocation for Tx Queue %u failed\n", i);
1415 break;
1416 }
1417 }
1418
1419 return err;
1420}
1421
1da177e4
LT		 1422/**
1423 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1424 * @adapter: board private structure
1425 *
1426 * Configure the Tx unit of the MAC after a reset.
1427 **/
1428
1429static void
1430e1000_configure_tx(struct e1000_adapter *adapter)
1431{
581d708e
MC		 1432 uint64_t tdba;
1433 struct e1000_hw *hw = &adapter->hw;
1434 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1435 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1436
1437 /* Setup the HW Tx Head and Tail descriptor pointers */
1438
f56799ea 1439 switch (adapter->num_tx_queues) {
24025e4e
MC		 1440 case 2:
1441 tdba = adapter->tx_ring[1].dma;
1442 tdlen = adapter->tx_ring[1].count *
1443 sizeof(struct e1000_tx_desc);
1444 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1445 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1446 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1447 E1000_WRITE_REG(hw, TDH1, 0);
1448 E1000_WRITE_REG(hw, TDT1, 0);
1449 adapter->tx_ring[1].tdh = E1000_TDH1;
1450 adapter->tx_ring[1].tdt = E1000_TDT1;
1451 /* Fall Through */
1452 case 1:
1453 default:
581d708e
MC		 1454 tdba = adapter->tx_ring[0].dma;
1455 tdlen = adapter->tx_ring[0].count *
1456 sizeof(struct e1000_tx_desc);
1457 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1458 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1459 E1000_WRITE_REG(hw, TDLEN, tdlen);
1460 E1000_WRITE_REG(hw, TDH, 0);
1461 E1000_WRITE_REG(hw, TDT, 0);
1462 adapter->tx_ring[0].tdh = E1000_TDH;
1463 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1464 break;
1465 }
1da177e4
LT		 1466
1467 /* Set the default values for the Tx Inter Packet Gap timer */
1468
0fadb059
JK		 1469 if (hw->media_type == e1000_media_type_fiber ||
1470 hw->media_type == e1000_media_type_internal_serdes)
1471 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1472 else
1473 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1474
581d708e 1475 switch (hw->mac_type) {
1da177e4
LT		 1476 case e1000_82542_rev2_0:
1477 case e1000_82542_rev2_1:
1478 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1479 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1480 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1481 break;
1482 default:
0fadb059
JK		 1483 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1484 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1485 break;
1da177e4 1486 }
0fadb059
JK		 1487 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1488 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1489 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1490
1491 /* Set the Tx Interrupt Delay register */
1492
581d708e
MC		 1493 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1494 if (hw->mac_type >= e1000_82540)
1495 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1496
1497 /* Program the Transmit Control Register */
1498
581d708e 1499 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1500
1501 tctl &= ~E1000_TCTL_CT;
24025e4e 1502 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1503 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1504
581d708e 1505 E1000_WRITE_REG(hw, TCTL, tctl);
1da177e4 1506
2ae76d98
MC		 1507 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1508 tarc = E1000_READ_REG(hw, TARC0);
1509 tarc |= ((1 << 25) | (1 << 21));
1510 E1000_WRITE_REG(hw, TARC0, tarc);
1511 tarc = E1000_READ_REG(hw, TARC1);
1512 tarc |= (1 << 25);
1513 if (tctl & E1000_TCTL_MULR)
1514 tarc &= ~(1 << 28);
1515 else
1516 tarc |= (1 << 28);
1517 E1000_WRITE_REG(hw, TARC1, tarc);
1518 }
1519
581d708e 1520 e1000_config_collision_dist(hw);
1da177e4
LT		 1521
1522 /* Setup Transmit Descriptor Settings for eop descriptor */
1523 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1524 E1000_TXD_CMD_IFCS;
1525
581d708e 1526 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1527 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1528 else
1529 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1530
1531 /* Cache if we're 82544 running in PCI-X because we'll
1532 * need this to apply a workaround later in the send path. */
581d708e
MC		 1533 if (hw->mac_type == e1000_82544 &&
1534 hw->bus_type == e1000_bus_type_pcix)
1da177e4
LT		 1535 adapter->pcix_82544 = 1;
1536}
1537
1538/**
1539 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1540 * @adapter: board private structure
581d708e 1541 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1542 *
1543 * Returns 0 on success, negative on failure
1544 **/
1545
3ad2cc67 1546static int
581d708e
MC		 1547e1000_setup_rx_resources(struct e1000_adapter *adapter,
1548 struct e1000_rx_ring *rxdr)
1da177e4 1549{
1da177e4 1550 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1551 int size, desc_len;
1da177e4
LT		 1552
1553 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1554 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1555 if (!rxdr->buffer_info) {
2648345f
MC		 1556 DPRINTK(PROBE, ERR,
1557 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1558 return -ENOMEM;
1559 }
1560 memset(rxdr->buffer_info, 0, size);
1561
2d7edb92
MC		 1562 size = sizeof(struct e1000_ps_page) * rxdr->count;
1563 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1564 if (!rxdr->ps_page) {
2d7edb92
MC		 1565 vfree(rxdr->buffer_info);
1566 DPRINTK(PROBE, ERR,
1567 "Unable to allocate memory for the receive descriptor ring\n");
1568 return -ENOMEM;
1569 }
1570 memset(rxdr->ps_page, 0, size);
1571
1572 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1573 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1574 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1575 vfree(rxdr->buffer_info);
1576 kfree(rxdr->ps_page);
1577 DPRINTK(PROBE, ERR,
1578 "Unable to allocate memory for the receive descriptor ring\n");
1579 return -ENOMEM;
1580 }
1581 memset(rxdr->ps_page_dma, 0, size);
1582
96838a40 1583 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1584 desc_len = sizeof(struct e1000_rx_desc);
1585 else
1586 desc_len = sizeof(union e1000_rx_desc_packet_split);
1587
1da177e4
LT		 1588 /* Round up to nearest 4K */
1589
2d7edb92 1590 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1591 E1000_ROUNDUP(rxdr->size, 4096);
1592
1593 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1594
581d708e
MC		 1595 if (!rxdr->desc) {
1596 DPRINTK(PROBE, ERR,
1597 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1598setup_rx_desc_die:
1da177e4 1599 vfree(rxdr->buffer_info);
2d7edb92
MC		 1600 kfree(rxdr->ps_page);
1601 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1602 return -ENOMEM;
1603 }
1604
2648345f 1605 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1606 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1607 void *olddesc = rxdr->desc;
1608 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1609 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1610 "at %p\n", rxdr->size, rxdr->desc);
1611 /* Try again, without freeing the previous */
1da177e4 1612 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1613 /* Failed allocation, critical failure */
581d708e 1614 if (!rxdr->desc) {
1da177e4 1615 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1616 DPRINTK(PROBE, ERR,
1617 "Unable to allocate memory "
1618 "for the receive descriptor ring\n");
1da177e4
LT		 1619 goto setup_rx_desc_die;
1620 }
1621
1622 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1623 /* give up */
2648345f
MC		 1624 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1625 rxdr->dma);
1da177e4 1626 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1627 DPRINTK(PROBE, ERR,
1628 "Unable to allocate aligned memory "
1629 "for the receive descriptor ring\n");
581d708e 1630 goto setup_rx_desc_die;
1da177e4 1631 } else {
2648345f 1632 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1633 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1634 }
1635 }
1636 memset(rxdr->desc, 0, rxdr->size);
1637
1638 rxdr->next_to_clean = 0;
1639 rxdr->next_to_use = 0;
997f5cbd
JK		 1640 rxdr->rx_skb_top = NULL;
1641 rxdr->rx_skb_prev = NULL;
1da177e4
LT		 1642
1643 return 0;
1644}
1645
581d708e
MC		 1646/**
1647 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1648 * (Descriptors) for all queues
1649 * @adapter: board private structure
1650 *
1651 * If this function returns with an error, then it's possible one or
1652 * more of the rings is populated (while the rest are not). It is the
1653 * callers duty to clean those orphaned rings.
1654 *
1655 * Return 0 on success, negative on failure
1656 **/
1657
1658int
1659e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1660{
1661 int i, err = 0;
1662
f56799ea 1663 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1664 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1665 if (err) {
1666 DPRINTK(PROBE, ERR,
1667 "Allocation for Rx Queue %u failed\n", i);
1668 break;
1669 }
1670 }
1671
1672 return err;
1673}
1674
1da177e4 1675/**
2648345f 1676 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1677 * @adapter: Board private structure
1678 **/
e4c811c9
MC		 1679#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1680 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1681static void
1682e1000_setup_rctl(struct e1000_adapter *adapter)
1683{
2d7edb92
MC		 1684 uint32_t rctl, rfctl;
1685 uint32_t psrctl = 0;
35ec56bb 1686#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1687 uint32_t pages = 0;
1688#endif
1da177e4
LT		 1689
1690 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1691
1692 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1693
1694 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1695 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1696 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1697
0fadb059
JK		 1698 if (adapter->hw.mac_type > e1000_82543)
1699 rctl |= E1000_RCTL_SECRC;
1700
1701 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1702 rctl |= E1000_RCTL_SBP;
1703 else
1704 rctl &= ~E1000_RCTL_SBP;
1705
2d7edb92
MC		 1706 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1707 rctl &= ~E1000_RCTL_LPE;
1708 else
1709 rctl |= E1000_RCTL_LPE;
1710
1da177e4 1711 /* Setup buffer sizes */
96838a40 1712 if (adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1713 /* We can now specify buffers in 1K increments.
1714 * BSIZE and BSEX are ignored in this case. */
1715 rctl |= adapter->rx_buffer_len << 0x11;
1716 } else {
1717 rctl &= ~E1000_RCTL_SZ_4096;
b92ff8ee
JB		 1718 rctl &= ~E1000_RCTL_BSEX;
1719 rctl |= E1000_RCTL_SZ_2048;
2d7edb92
MC		 1720 }
1721
35ec56bb 1722#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1723 /* 82571 and greater support packet-split where the protocol
1724 * header is placed in skb->data and the packet data is
1725 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1726 * In the case of a non-split, skb->data is linearly filled,
1727 * followed by the page buffers. Therefore, skb->data is
1728 * sized to hold the largest protocol header.
1729 */
e4c811c9
MC		 1730 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1731 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1732 PAGE_SIZE <= 16384)
1733 adapter->rx_ps_pages = pages;
1734 else
1735 adapter->rx_ps_pages = 0;
2d7edb92 1736#endif
e4c811c9 1737 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1738 /* Configure extra packet-split registers */
1739 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1740 rfctl |= E1000_RFCTL_EXTEN;
1741 /* disable IPv6 packet split support */
1742 rfctl |= E1000_RFCTL_IPV6_DIS;
1743 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1744
1745 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1746
2d7edb92
MC		 1747 psrctl |= adapter->rx_ps_bsize0 >>
1748 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1749
1750 switch (adapter->rx_ps_pages) {
1751 case 3:
1752 psrctl |= PAGE_SIZE <<
1753 E1000_PSRCTL_BSIZE3_SHIFT;
1754 case 2:
1755 psrctl |= PAGE_SIZE <<
1756 E1000_PSRCTL_BSIZE2_SHIFT;
1757 case 1:
1758 psrctl |= PAGE_SIZE >>
1759 E1000_PSRCTL_BSIZE1_SHIFT;
1760 break;
1761 }
2d7edb92
MC		 1762
1763 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1764 }
1765
1766 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1767}
1768
1769/**
1770 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1771 * @adapter: board private structure
1772 *
1773 * Configure the Rx unit of the MAC after a reset.
1774 **/
1775
1776static void
1777e1000_configure_rx(struct e1000_adapter *adapter)
1778{
581d708e
MC		 1779 uint64_t rdba;
1780 struct e1000_hw *hw = &adapter->hw;
1781 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1782#ifdef CONFIG_E1000_MQ
1783 uint32_t reta, mrqc;
1784 int i;
1785#endif
2d7edb92 1786
e4c811c9 1787 if (adapter->rx_ps_pages) {
581d708e 1788 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1789 sizeof(union e1000_rx_desc_packet_split);
1790 adapter->clean_rx = e1000_clean_rx_irq_ps;
1791 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1792 } else {
581d708e
MC		 1793 rdlen = adapter->rx_ring[0].count *
1794 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1795 adapter->clean_rx = e1000_clean_rx_irq;
1796 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1797 }
1da177e4
LT		 1798
1799 /* disable receives while setting up the descriptors */
581d708e
MC		 1800 rctl = E1000_READ_REG(hw, RCTL);
1801 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1802
1803 /* set the Receive Delay Timer Register */
581d708e 1804 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1805
581d708e
MC		 1806 if (hw->mac_type >= e1000_82540) {
1807 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1808 if (adapter->itr > 1)
581d708e 1809 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1810 1000000000 / (adapter->itr * 256));
1811 }
1812
2ae76d98 1813 if (hw->mac_type >= e1000_82571) {
2ae76d98 1814 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1815 /* Reset delay timers after every interrupt */
2ae76d98 1816 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1817#ifdef CONFIG_E1000_NAPI
1818 /* Auto-Mask interrupts upon ICR read. */
1819 ctrl_ext |= E1000_CTRL_EXT_IAME;
1820#endif
2ae76d98 1821 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1822 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1823 E1000_WRITE_FLUSH(hw);
1824 }
1825
581d708e
MC		 1826 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1827 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1828 switch (adapter->num_rx_queues) {
24025e4e
MC		 1829#ifdef CONFIG_E1000_MQ
1830 case 2:
1831 rdba = adapter->rx_ring[1].dma;
1832 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1833 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1834 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1835 E1000_WRITE_REG(hw, RDH1, 0);
1836 E1000_WRITE_REG(hw, RDT1, 0);
1837 adapter->rx_ring[1].rdh = E1000_RDH1;
1838 adapter->rx_ring[1].rdt = E1000_RDT1;
1839 /* Fall Through */
1840#endif
1841 case 1:
1842 default:
581d708e
MC		 1843 rdba = adapter->rx_ring[0].dma;
1844 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1845 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1846 E1000_WRITE_REG(hw, RDLEN, rdlen);
1847 E1000_WRITE_REG(hw, RDH, 0);
1848 E1000_WRITE_REG(hw, RDT, 0);
1849 adapter->rx_ring[0].rdh = E1000_RDH;
1850 adapter->rx_ring[0].rdt = E1000_RDT;
1851 break;
24025e4e
MC		 1852 }
1853
1854#ifdef CONFIG_E1000_MQ
f56799ea 1855 if (adapter->num_rx_queues > 1) {
24025e4e
MC		 1856 uint32_t random[10];
1857
1858 get_random_bytes(&random[0], 40);
1859
1860 if (hw->mac_type <= e1000_82572) {
1861 E1000_WRITE_REG(hw, RSSIR, 0);
1862 E1000_WRITE_REG(hw, RSSIM, 0);
1863 }
1864
f56799ea 1865 switch (adapter->num_rx_queues) {
24025e4e
MC		 1866 case 2:
1867 default:
1868 reta = 0x00800080;
1869 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1870 break;
1871 }
1872
1873 /* Fill out redirection table */
1874 for (i = 0; i < 32; i++)
1875 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1876 /* Fill out hash function seeds */
1877 for (i = 0; i < 10; i++)
1878 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1879
1880 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1881 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1882 E1000_WRITE_REG(hw, MRQC, mrqc);
1883 }
1884
1885 /* Multiqueue and packet checksumming are mutually exclusive. */
1886 if (hw->mac_type >= e1000_82571) {
1887 rxcsum = E1000_READ_REG(hw, RXCSUM);
1888 rxcsum |= E1000_RXCSUM_PCSD;
1889 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1890 }
1891
1892#else
1da177e4
LT		 1893
1894 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1895 if (hw->mac_type >= e1000_82543) {
1896 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1897 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1898 rxcsum |= E1000_RXCSUM_TUOFL;
1899
868d5309 1900 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1901 * Must be used in conjunction with packet-split. */
96838a40
JB		 1902 if ((hw->mac_type >= e1000_82571) &&
1903 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1904 rxcsum |= E1000_RXCSUM_IPPCSE;
1905 }
1906 } else {
1907 rxcsum &= ~E1000_RXCSUM_TUOFL;
1908 /* don't need to clear IPPCSE as it defaults to 0 */
1909 }
581d708e 1910 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4 1911 }
24025e4e 1912#endif /* CONFIG_E1000_MQ */
1da177e4 1913
581d708e
MC		 1914 if (hw->mac_type == e1000_82573)
1915 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1916
1da177e4 1917 /* Enable Receives */
581d708e 1918 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1919}
1920
1921/**
581d708e 1922 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1923 * @adapter: board private structure
581d708e 1924 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1925 *
1926 * Free all transmit software resources
1927 **/
1928
3ad2cc67 1929static void
581d708e
MC		 1930e1000_free_tx_resources(struct e1000_adapter *adapter,
1931 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1932{
1933 struct pci_dev *pdev = adapter->pdev;
1934
581d708e 1935 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1936
581d708e
MC		 1937 vfree(tx_ring->buffer_info);
1938 tx_ring->buffer_info = NULL;
1da177e4 1939
581d708e 1940 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1941
581d708e
MC		 1942 tx_ring->desc = NULL;
1943}
1944
1945/**
1946 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1947 * @adapter: board private structure
1948 *
1949 * Free all transmit software resources
1950 **/
1951
1952void
1953e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1954{
1955 int i;
1956
f56799ea 1957 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1958 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1959}
1960
1961static inline void
1962e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1963 struct e1000_buffer *buffer_info)
1964{
96838a40 1965 if (buffer_info->dma) {
2648345f
MC		 1966 pci_unmap_page(adapter->pdev,
1967 buffer_info->dma,
1968 buffer_info->length,
1969 PCI_DMA_TODEVICE);
1da177e4 1970 }
8241e35e 1971 if (buffer_info->skb)
1da177e4 1972 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1973 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1974}
1975
1976/**
1977 * e1000_clean_tx_ring - Free Tx Buffers
1978 * @adapter: board private structure
581d708e 1979 * @tx_ring: ring to be cleaned
1da177e4
LT		 1980 **/
1981
1982static void
581d708e
MC		 1983e1000_clean_tx_ring(struct e1000_adapter *adapter,
1984 struct e1000_tx_ring *tx_ring)
1da177e4 1985{
1da177e4
LT		 1986 struct e1000_buffer *buffer_info;
1987 unsigned long size;
1988 unsigned int i;
1989
1990 /* Free all the Tx ring sk_buffs */
1991
96838a40 1992 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1993 buffer_info = &tx_ring->buffer_info[i];
1994 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1995 }
1996
1997 size = sizeof(struct e1000_buffer) * tx_ring->count;
1998 memset(tx_ring->buffer_info, 0, size);
1999
2000 /* Zero out the descriptor ring */
2001
2002 memset(tx_ring->desc, 0, tx_ring->size);
2003
2004 tx_ring->next_to_use = 0;
2005 tx_ring->next_to_clean = 0;
fd803241 2006 tx_ring->last_tx_tso = 0;
1da177e4 2007
581d708e
MC		 2008 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2009 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2010}
2011
2012/**
2013 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2014 * @adapter: board private structure
2015 **/
2016
2017static void
2018e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2019{
2020 int i;
2021
f56799ea 2022 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2023 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2024}
2025
2026/**
2027 * e1000_free_rx_resources - Free Rx Resources
2028 * @adapter: board private structure
581d708e 2029 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2030 *
2031 * Free all receive software resources
2032 **/
2033
3ad2cc67 2034static void
581d708e
MC		 2035e1000_free_rx_resources(struct e1000_adapter *adapter,
2036 struct e1000_rx_ring *rx_ring)
1da177e4 2037{
1da177e4
LT		 2038 struct pci_dev *pdev = adapter->pdev;
2039
581d708e 2040 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2041
2042 vfree(rx_ring->buffer_info);
2043 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2044 kfree(rx_ring->ps_page);
2045 rx_ring->ps_page = NULL;
2046 kfree(rx_ring->ps_page_dma);
2047 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2048
2049 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2050
2051 rx_ring->desc = NULL;
2052}
2053
2054/**
581d708e 2055 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2056 * @adapter: board private structure
581d708e
MC		 2057 *
2058 * Free all receive software resources
2059 **/
2060
2061void
2062e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2063{
2064 int i;
2065
f56799ea 2066 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2067 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2068}
2069
2070/**
2071 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2072 * @adapter: board private structure
2073 * @rx_ring: ring to free buffers from
1da177e4
LT		 2074 **/
2075
2076static void
581d708e
MC		 2077e1000_clean_rx_ring(struct e1000_adapter *adapter,
2078 struct e1000_rx_ring *rx_ring)
1da177e4 2079{
1da177e4 2080 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2081 struct e1000_ps_page *ps_page;
2082 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2083 struct pci_dev *pdev = adapter->pdev;
2084 unsigned long size;
2d7edb92 2085 unsigned int i, j;
1da177e4
LT		 2086
2087 /* Free all the Rx ring sk_buffs */
96838a40 2088 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2089 buffer_info = &rx_ring->buffer_info[i];
96838a40 2090 if (buffer_info->skb) {
1da177e4
LT		 2091 pci_unmap_single(pdev,
2092 buffer_info->dma,
2093 buffer_info->length,
2094 PCI_DMA_FROMDEVICE);
2095
2096 dev_kfree_skb(buffer_info->skb);
2097 buffer_info->skb = NULL;
997f5cbd
JK		 2098 }
2099 ps_page = &rx_ring->ps_page[i];
2100 ps_page_dma = &rx_ring->ps_page_dma[i];
2101 for (j = 0; j < adapter->rx_ps_pages; j++) {
2102 if (!ps_page->ps_page[j]) break;
2103 pci_unmap_page(pdev,
2104 ps_page_dma->ps_page_dma[j],
2105 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2106 ps_page_dma->ps_page_dma[j] = 0;
2107 put_page(ps_page->ps_page[j]);
2108 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2109 }
2110 }
2111
997f5cbd
JK		 2112 /* there also may be some cached data in our adapter */
2113 if (rx_ring->rx_skb_top) {
2114 dev_kfree_skb(rx_ring->rx_skb_top);
2115
2116 /* rx_skb_prev will be wiped out by rx_skb_top */
2117 rx_ring->rx_skb_top = NULL;
2118 rx_ring->rx_skb_prev = NULL;
2119 }
2120
2121
1da177e4
LT		 2122 size = sizeof(struct e1000_buffer) * rx_ring->count;
2123 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2124 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2125 memset(rx_ring->ps_page, 0, size);
2126 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2127 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2128
2129 /* Zero out the descriptor ring */
2130
2131 memset(rx_ring->desc, 0, rx_ring->size);
2132
2133 rx_ring->next_to_clean = 0;
2134 rx_ring->next_to_use = 0;
2135
581d708e
MC		 2136 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2137 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2138}
2139
2140/**
2141 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2142 * @adapter: board private structure
2143 **/
2144
2145static void
2146e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2147{
2148 int i;
2149
f56799ea 2150 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2151 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2152}
2153
2154/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2155 * and memory write and invalidate disabled for certain operations
2156 */
2157static void
2158e1000_enter_82542_rst(struct e1000_adapter *adapter)
2159{
2160 struct net_device *netdev = adapter->netdev;
2161 uint32_t rctl;
2162
2163 e1000_pci_clear_mwi(&adapter->hw);
2164
2165 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2166 rctl |= E1000_RCTL_RST;
2167 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2168 E1000_WRITE_FLUSH(&adapter->hw);
2169 mdelay(5);
2170
96838a40 2171 if (netif_running(netdev))
581d708e 2172 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2173}
2174
2175static void
2176e1000_leave_82542_rst(struct e1000_adapter *adapter)
2177{
2178 struct net_device *netdev = adapter->netdev;
2179 uint32_t rctl;
2180
2181 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2182 rctl &= ~E1000_RCTL_RST;
2183 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2184 E1000_WRITE_FLUSH(&adapter->hw);
2185 mdelay(5);
2186
96838a40 2187 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2188 e1000_pci_set_mwi(&adapter->hw);
2189
96838a40 2190 if (netif_running(netdev)) {
1da177e4 2191 e1000_configure_rx(adapter);
72d64a43
JK		 2192 /* No need to loop, because 82542 supports only 1 queue */
2193 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2194 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2195 }
2196}
2197
2198/**
2199 * e1000_set_mac - Change the Ethernet Address of the NIC
2200 * @netdev: network interface device structure
2201 * @p: pointer to an address structure
2202 *
2203 * Returns 0 on success, negative on failure
2204 **/
2205
2206static int
2207e1000_set_mac(struct net_device *netdev, void *p)
2208{
60490fe0 2209 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2210 struct sockaddr *addr = p;
2211
96838a40 2212 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2213 return -EADDRNOTAVAIL;
2214
2215 /* 82542 2.0 needs to be in reset to write receive address registers */
2216
96838a40 2217 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2218 e1000_enter_82542_rst(adapter);
2219
2220 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2221 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2222
2223 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2224
868d5309
MC		 2225 /* With 82571 controllers, LAA may be overwritten (with the default)
2226 * due to controller reset from the other port. */
2227 if (adapter->hw.mac_type == e1000_82571) {
2228 /* activate the work around */
2229 adapter->hw.laa_is_present = 1;
2230
96838a40
JB		 2231 /* Hold a copy of the LAA in RAR[14] This is done so that
2232 * between the time RAR[0] gets clobbered and the time it
2233 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2234 * of the RARs and no incoming packets directed to this port
96838a40 2235 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2236 * RAR[14] */
96838a40 2237 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2238 E1000_RAR_ENTRIES - 1);
2239 }
2240
96838a40 2241 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2242 e1000_leave_82542_rst(adapter);
2243
2244 return 0;
2245}
2246
2247/**
2248 * e1000_set_multi - Multicast and Promiscuous mode set
2249 * @netdev: network interface device structure
2250 *
2251 * The set_multi entry point is called whenever the multicast address
2252 * list or the network interface flags are updated. This routine is
2253 * responsible for configuring the hardware for proper multicast,
2254 * promiscuous mode, and all-multi behavior.
2255 **/
2256
2257static void
2258e1000_set_multi(struct net_device *netdev)
2259{
60490fe0 2260 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2261 struct e1000_hw *hw = &adapter->hw;
2262 struct dev_mc_list *mc_ptr;
2263 uint32_t rctl;
2264 uint32_t hash_value;
868d5309 2265 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2266
868d5309
MC		 2267 /* reserve RAR[14] for LAA over-write work-around */
2268 if (adapter->hw.mac_type == e1000_82571)
2269 rar_entries--;
1da177e4 2270
2648345f
MC		 2271 /* Check for Promiscuous and All Multicast modes */
2272
1da177e4
LT		 2273 rctl = E1000_READ_REG(hw, RCTL);
2274
96838a40 2275 if (netdev->flags & IFF_PROMISC) {
1da177e4 2276 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2277 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2278 rctl |= E1000_RCTL_MPE;
2279 rctl &= ~E1000_RCTL_UPE;
2280 } else {
2281 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2282 }
2283
2284 E1000_WRITE_REG(hw, RCTL, rctl);
2285
2286 /* 82542 2.0 needs to be in reset to write receive address registers */
2287
96838a40 2288 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2289 e1000_enter_82542_rst(adapter);
2290
2291 /* load the first 14 multicast address into the exact filters 1-14
2292 * RAR 0 is used for the station MAC adddress
2293 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2294 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2295 */
2296 mc_ptr = netdev->mc_list;
2297
96838a40 2298 for (i = 1; i < rar_entries; i++) {
868d5309 2299 if (mc_ptr) {
1da177e4
LT		 2300 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2301 mc_ptr = mc_ptr->next;
2302 } else {
2303 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2304 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2305 }
2306 }
2307
2308 /* clear the old settings from the multicast hash table */
2309
96838a40 2310 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2311 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2312
2313 /* load any remaining addresses into the hash table */
2314
96838a40 2315 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2316 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2317 e1000_mta_set(hw, hash_value);
2318 }
2319
96838a40 2320 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2321 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2322}
2323
2324/* Need to wait a few seconds after link up to get diagnostic information from
2325 * the phy */
2326
2327static void
2328e1000_update_phy_info(unsigned long data)
2329{
2330 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2331 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2332}
2333
2334/**
2335 * e1000_82547_tx_fifo_stall - Timer Call-back
2336 * @data: pointer to adapter cast into an unsigned long
2337 **/
2338
2339static void
2340e1000_82547_tx_fifo_stall(unsigned long data)
2341{
2342 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2343 struct net_device *netdev = adapter->netdev;
2344 uint32_t tctl;
2345
96838a40
JB		 2346 if (atomic_read(&adapter->tx_fifo_stall)) {
2347 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2348 E1000_READ_REG(&adapter->hw, TDH)) &&
2349 (E1000_READ_REG(&adapter->hw, TDFT) ==
2350 E1000_READ_REG(&adapter->hw, TDFH)) &&
2351 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2352 E1000_READ_REG(&adapter->hw, TDFHS))) {
2353 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2354 E1000_WRITE_REG(&adapter->hw, TCTL,
2355 tctl & ~E1000_TCTL_EN);
2356 E1000_WRITE_REG(&adapter->hw, TDFT,
2357 adapter->tx_head_addr);
2358 E1000_WRITE_REG(&adapter->hw, TDFH,
2359 adapter->tx_head_addr);
2360 E1000_WRITE_REG(&adapter->hw, TDFTS,
2361 adapter->tx_head_addr);
2362 E1000_WRITE_REG(&adapter->hw, TDFHS,
2363 adapter->tx_head_addr);
2364 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2365 E1000_WRITE_FLUSH(&adapter->hw);
2366
2367 adapter->tx_fifo_head = 0;
2368 atomic_set(&adapter->tx_fifo_stall, 0);
2369 netif_wake_queue(netdev);
2370 } else {
2371 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2372 }
2373 }
2374}
2375
2376/**
2377 * e1000_watchdog - Timer Call-back
2378 * @data: pointer to adapter cast into an unsigned long
2379 **/
2380static void
2381e1000_watchdog(unsigned long data)
2382{
2383 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2384
2385 /* Do the rest outside of interrupt context */
2386 schedule_work(&adapter->watchdog_task);
2387}
2388
2389static void
2390e1000_watchdog_task(struct e1000_adapter *adapter)
2391{
2392 struct net_device *netdev = adapter->netdev;
545c67c0 2393 struct e1000_tx_ring *txdr = adapter->tx_ring;
1da177e4
LT		 2394 uint32_t link;
2395
2396 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2397 if (adapter->hw.mac_type == e1000_82573) {
2398 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2399 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2400 e1000_update_mng_vlan(adapter);
96838a40 2401 }
1da177e4 2402
96838a40 2403 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2404 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2405 link = !adapter->hw.serdes_link_down;
2406 else
2407 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2408
96838a40
JB		 2409 if (link) {
2410 if (!netif_carrier_ok(netdev)) {
1da177e4
LT		 2411 e1000_get_speed_and_duplex(&adapter->hw,
2412 &adapter->link_speed,
2413 &adapter->link_duplex);
2414
2415 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2416 adapter->link_speed,
2417 adapter->link_duplex == FULL_DUPLEX ?
2418 "Full Duplex" : "Half Duplex");
2419
66a2b0a3
JK		 2420 /* tweak tx_queue_len according to speed/duplex */
2421 netdev->tx_queue_len = adapter->tx_queue_len;
2422 adapter->tx_timeout_factor = 1;
2423 if (adapter->link_duplex == HALF_DUPLEX) {
2424 switch (adapter->link_speed) {
2425 case SPEED_10:
2426 netdev->tx_queue_len = 10;
2427 adapter->tx_timeout_factor = 8;
2428 break;
2429 case SPEED_100:
2430 netdev->tx_queue_len = 100;
2431 break;
2432 }
2433 }
2434
1da177e4
LT		 2435 netif_carrier_on(netdev);
2436 netif_wake_queue(netdev);
2437 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2438 adapter->smartspeed = 0;
2439 }
2440 } else {
96838a40 2441 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2442 adapter->link_speed = 0;
2443 adapter->link_duplex = 0;
2444 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2445 netif_carrier_off(netdev);
2446 netif_stop_queue(netdev);
2447 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2448 }
2449
2450 e1000_smartspeed(adapter);
2451 }
2452
2453 e1000_update_stats(adapter);
2454
2455 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2456 adapter->tpt_old = adapter->stats.tpt;
2457 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2458 adapter->colc_old = adapter->stats.colc;
2459
2460 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2461 adapter->gorcl_old = adapter->stats.gorcl;
2462 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2463 adapter->gotcl_old = adapter->stats.gotcl;
2464
2465 e1000_update_adaptive(&adapter->hw);
2466
f56799ea
JK		 2467#ifdef CONFIG_E1000_MQ
2468 txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2469#endif
2470 if (!netif_carrier_ok(netdev)) {
581d708e 2471 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2472 /* We've lost link, so the controller stops DMA,
2473 * but we've got queued Tx work that's never going
2474 * to get done, so reset controller to flush Tx.
2475 * (Do the reset outside of interrupt context). */
2476 schedule_work(&adapter->tx_timeout_task);
2477 }
2478 }
2479
2480 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2481 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2482 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2483 * asymmetrical Tx or Rx gets ITR=8000; everyone
2484 * else is between 2000-8000. */
2485 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2486 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2487 adapter->gotcl - adapter->gorcl :
2488 adapter->gorcl - adapter->gotcl) / 10000;
2489 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2490 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2491 }
2492
2493 /* Cause software interrupt to ensure rx ring is cleaned */
2494 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2495
2648345f 2496 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2497 adapter->detect_tx_hung = TRUE;
2498
96838a40 2499 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2500 * reset from the other port. Set the appropriate LAA in RAR[0] */
2501 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2502 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2503
1da177e4
LT		 2504 /* Reset the timer */
2505 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2506}
2507
2508#define E1000_TX_FLAGS_CSUM 0x00000001
2509#define E1000_TX_FLAGS_VLAN 0x00000002
2510#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2511#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2512#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2513#define E1000_TX_FLAGS_VLAN_SHIFT 16
2514
2515static inline int
581d708e
MC		 2516e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2517 struct sk_buff *skb)
1da177e4
LT		 2518{
2519#ifdef NETIF_F_TSO
2520 struct e1000_context_desc *context_desc;
545c67c0 2521 struct e1000_buffer *buffer_info;
1da177e4
LT		 2522 unsigned int i;
2523 uint32_t cmd_length = 0;
2d7edb92 2524 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2525 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2526 int err;
2527
96838a40 2528 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2529 if (skb_header_cloned(skb)) {
2530 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2531 if (err)
2532 return err;
2533 }
2534
2535 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2536 mss = skb_shinfo(skb)->tso_size;
96838a40 2537 if (skb->protocol == ntohs(ETH_P_IP)) {
2d7edb92
MC		 2538 skb->nh.iph->tot_len = 0;
2539 skb->nh.iph->check = 0;
2540 skb->h.th->check =
2541 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2542 skb->nh.iph->daddr,
2543 0,
2544 IPPROTO_TCP,
2545 0);
2546 cmd_length = E1000_TXD_CMD_IP;
2547 ipcse = skb->h.raw - skb->data - 1;
2548#ifdef NETIF_F_TSO_IPV6
96838a40 2549 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2550 skb->nh.ipv6h->payload_len = 0;
2551 skb->h.th->check =
2552 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2553 &skb->nh.ipv6h->daddr,
2554 0,
2555 IPPROTO_TCP,
2556 0);
2557 ipcse = 0;
2558#endif
2559 }
1da177e4
LT		 2560 ipcss = skb->nh.raw - skb->data;
2561 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2562 tucss = skb->h.raw - skb->data;
2563 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2564 tucse = 0;
2565
2566 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2567 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2568
581d708e
MC		 2569 i = tx_ring->next_to_use;
2570 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2571 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2572
2573 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2574 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2575 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2576 context_desc->upper_setup.tcp_fields.tucss = tucss;
2577 context_desc->upper_setup.tcp_fields.tucso = tucso;
2578 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2579 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2580 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2581 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2582
545c67c0
JK		 2583 buffer_info->time_stamp = jiffies;
2584
581d708e
MC		 2585 if (++i == tx_ring->count) i = 0;
2586 tx_ring->next_to_use = i;
1da177e4 2587
8241e35e 2588 return TRUE;
1da177e4
LT		 2589 }
2590#endif
2591
8241e35e 2592 return FALSE;
1da177e4
LT		 2593}
2594
2595static inline boolean_t
581d708e
MC		 2596e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2597 struct sk_buff *skb)
1da177e4
LT		 2598{
2599 struct e1000_context_desc *context_desc;
545c67c0 2600 struct e1000_buffer *buffer_info;
1da177e4
LT		 2601 unsigned int i;
2602 uint8_t css;
2603
96838a40 2604 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2605 css = skb->h.raw - skb->data;
2606
581d708e 2607 i = tx_ring->next_to_use;
545c67c0 2608 buffer_info = &tx_ring->buffer_info[i];
581d708e 2609 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2610
2611 context_desc->upper_setup.tcp_fields.tucss = css;
2612 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2613 context_desc->upper_setup.tcp_fields.tucse = 0;
2614 context_desc->tcp_seg_setup.data = 0;
2615 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2616
545c67c0
JK		 2617 buffer_info->time_stamp = jiffies;
2618
581d708e
MC		 2619 if (unlikely(++i == tx_ring->count)) i = 0;
2620 tx_ring->next_to_use = i;
1da177e4
LT		 2621
2622 return TRUE;
2623 }
2624
2625 return FALSE;
2626}
2627
2628#define E1000_MAX_TXD_PWR 12
2629#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2630
2631static inline int
581d708e
MC		 2632e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2633 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2634 unsigned int nr_frags, unsigned int mss)
1da177e4 2635{
1da177e4
LT		 2636 struct e1000_buffer *buffer_info;
2637 unsigned int len = skb->len;
2638 unsigned int offset = 0, size, count = 0, i;
2639 unsigned int f;
2640 len -= skb->data_len;
2641
2642 i = tx_ring->next_to_use;
2643
96838a40 2644 while (len) {
1da177e4
LT		 2645 buffer_info = &tx_ring->buffer_info[i];
2646 size = min(len, max_per_txd);
2647#ifdef NETIF_F_TSO
fd803241
JK		 2648 /* Workaround for Controller erratum --
2649 * descriptor for non-tso packet in a linear SKB that follows a
2650 * tso gets written back prematurely before the data is fully
2651 * DMAd to the controller */
2652 if (!skb->data_len && tx_ring->last_tx_tso &&
2653 !skb_shinfo(skb)->tso_size) {
2654 tx_ring->last_tx_tso = 0;
2655 size -= 4;
2656 }
2657
1da177e4
LT		 2658 /* Workaround for premature desc write-backs
2659 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2660 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2661 size -= 4;
2662#endif
97338bde
MC		 2663 /* work-around for errata 10 and it applies
2664 * to all controllers in PCI-X mode
2665 * The fix is to make sure that the first descriptor of a
2666 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2667 */
96838a40 2668 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2669 (size > 2015) && count == 0))
2670 size = 2015;
96838a40 2671
1da177e4
LT		 2672 /* Workaround for potential 82544 hang in PCI-X. Avoid
2673 * terminating buffers within evenly-aligned dwords. */
96838a40 2674 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2675 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2676 size > 4))
2677 size -= 4;
2678
2679 buffer_info->length = size;
2680 buffer_info->dma =
2681 pci_map_single(adapter->pdev,
2682 skb->data + offset,
2683 size,
2684 PCI_DMA_TODEVICE);
2685 buffer_info->time_stamp = jiffies;
2686
2687 len -= size;
2688 offset += size;
2689 count++;
96838a40 2690 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2691 }
2692
96838a40 2693 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2694 struct skb_frag_struct *frag;
2695
2696 frag = &skb_shinfo(skb)->frags[f];
2697 len = frag->size;
2698 offset = frag->page_offset;
2699
96838a40 2700 while (len) {
1da177e4
LT		 2701 buffer_info = &tx_ring->buffer_info[i];
2702 size = min(len, max_per_txd);
2703#ifdef NETIF_F_TSO
2704 /* Workaround for premature desc write-backs
2705 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2706 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2707 size -= 4;
2708#endif
2709 /* Workaround for potential 82544 hang in PCI-X.
2710 * Avoid terminating buffers within evenly-aligned
2711 * dwords. */
96838a40 2712 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2713 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2714 size > 4))
2715 size -= 4;
2716
2717 buffer_info->length = size;
2718 buffer_info->dma =
2719 pci_map_page(adapter->pdev,
2720 frag->page,
2721 offset,
2722 size,
2723 PCI_DMA_TODEVICE);
2724 buffer_info->time_stamp = jiffies;
2725
2726 len -= size;
2727 offset += size;
2728 count++;
96838a40 2729 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2730 }
2731 }
2732
2733 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2734 tx_ring->buffer_info[i].skb = skb;
2735 tx_ring->buffer_info[first].next_to_watch = i;
2736
2737 return count;
2738}
2739
2740static inline void
581d708e
MC		 2741e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2742 int tx_flags, int count)
1da177e4 2743{
1da177e4
LT		 2744 struct e1000_tx_desc *tx_desc = NULL;
2745 struct e1000_buffer *buffer_info;
2746 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2747 unsigned int i;
2748
96838a40 2749 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2750 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2751 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2752 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2753
96838a40 2754 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2755 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2756 }
2757
96838a40 2758 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2759 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2760 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2761 }
2762
96838a40 2763 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2764 txd_lower |= E1000_TXD_CMD_VLE;
2765 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2766 }
2767
2768 i = tx_ring->next_to_use;
2769
96838a40 2770 while (count--) {
1da177e4
LT		 2771 buffer_info = &tx_ring->buffer_info[i];
2772 tx_desc = E1000_TX_DESC(*tx_ring, i);
2773 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2774 tx_desc->lower.data =
2775 cpu_to_le32(txd_lower | buffer_info->length);
2776 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2777 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2778 }
2779
2780 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2781
2782 /* Force memory writes to complete before letting h/w
2783 * know there are new descriptors to fetch. (Only
2784 * applicable for weak-ordered memory model archs,
2785 * such as IA-64). */
2786 wmb();
2787
2788 tx_ring->next_to_use = i;
581d708e 2789 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2790}
2791
2792/**
2793 * 82547 workaround to avoid controller hang in half-duplex environment.
2794 * The workaround is to avoid queuing a large packet that would span
2795 * the internal Tx FIFO ring boundary by notifying the stack to resend
2796 * the packet at a later time. This gives the Tx FIFO an opportunity to
2797 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2798 * to the beginning of the Tx FIFO.
2799 **/
2800
2801#define E1000_FIFO_HDR 0x10
2802#define E1000_82547_PAD_LEN 0x3E0
2803
2804static inline int
2805e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2806{
2807 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2808 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2809
2810 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2811
96838a40 2812 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2813 goto no_fifo_stall_required;
2814
96838a40 2815 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2816 return 1;
2817
96838a40 2818 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2819 atomic_set(&adapter->tx_fifo_stall, 1);
2820 return 1;
2821 }
2822
2823no_fifo_stall_required:
2824 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2825 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2826 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2827 return 0;
2828}
2829
2d7edb92
MC		 2830#define MINIMUM_DHCP_PACKET_SIZE 282
2831static inline int
2832e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2833{
2834 struct e1000_hw *hw = &adapter->hw;
2835 uint16_t length, offset;
96838a40
JB		 2836 if (vlan_tx_tag_present(skb)) {
2837 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2838 ( adapter->hw.mng_cookie.status &
2839 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2840 return 0;
2841 }
96838a40 2842 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2d7edb92 2843 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2844 if ((htons(ETH_P_IP) == eth->h_proto)) {
2845 const struct iphdr *ip =
2d7edb92 2846 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2847 if (IPPROTO_UDP == ip->protocol) {
2848 struct udphdr *udp =
2849 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2850 (ip->ihl << 2));
96838a40 2851 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2852 offset = (uint8_t *)udp + 8 - skb->data;
2853 length = skb->len - offset;
2854
2855 return e1000_mng_write_dhcp_info(hw,
96838a40 2856 (uint8_t *)udp + 8,
2d7edb92
MC		 2857 length);
2858 }
2859 }
2860 }
2861 }
2862 return 0;
2863}
2864
1da177e4
LT		 2865#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2866static int
2867e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2868{
60490fe0 2869 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2870 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2871 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2872 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2873 unsigned int tx_flags = 0;
2874 unsigned int len = skb->len;
2875 unsigned long flags;
2876 unsigned int nr_frags = 0;
2877 unsigned int mss = 0;
2878 int count = 0;
96838a40 2879 int tso;
1da177e4
LT		 2880 unsigned int f;
2881 len -= skb->data_len;
2882
24025e4e
MC		 2883#ifdef CONFIG_E1000_MQ
2884 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2885#else
581d708e 2886 tx_ring = adapter->tx_ring;
24025e4e
MC		 2887#endif
2888
581d708e 2889 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2890 dev_kfree_skb_any(skb);
2891 return NETDEV_TX_OK;
2892 }
2893
2894#ifdef NETIF_F_TSO
2895 mss = skb_shinfo(skb)->tso_size;
2648345f 2896 /* The controller does a simple calculation to
1da177e4
LT		 2897 * make sure there is enough room in the FIFO before
2898 * initiating the DMA for each buffer. The calc is:
2899 * 4 = ceil(buffer len/mss). To make sure we don't
2900 * overrun the FIFO, adjust the max buffer len if mss
2901 * drops. */
96838a40 2902 if (mss) {
9a3056da 2903 uint8_t hdr_len;
1da177e4
LT		 2904 max_per_txd = min(mss << 2, max_per_txd);
2905 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da
JK		 2906
2907 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2908 * points to just header, pull a few bytes of payload from
2909 * frags into skb->data */
2910 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2911 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2912 (adapter->hw.mac_type == e1000_82571 ||
2913 adapter->hw.mac_type == e1000_82572)) {
d74bbd3b
JK		 2914 unsigned int pull_size;
2915 pull_size = min((unsigned int)4, skb->data_len);
2916 if (!__pskb_pull_tail(skb, pull_size)) {
2917 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2918 dev_kfree_skb_any(skb);
2919 return -EFAULT;
2920 }
9a3056da
JK		 2921 len = skb->len - skb->data_len;
2922 }
1da177e4
LT		 2923 }
2924
9a3056da 2925 /* reserve a descriptor for the offload context */
96838a40 2926 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2927 count++;
2648345f 2928 count++;
1da177e4 2929#else
96838a40 2930 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2931 count++;
2932#endif
fd803241
JK		 2933
2934#ifdef NETIF_F_TSO
2935 /* Controller Erratum workaround */
2936 if (!skb->data_len && tx_ring->last_tx_tso &&
2937 !skb_shinfo(skb)->tso_size)
2938 count++;
2939#endif
2940
1da177e4
LT		 2941 count += TXD_USE_COUNT(len, max_txd_pwr);
2942
96838a40 2943 if (adapter->pcix_82544)
1da177e4
LT		 2944 count++;
2945
96838a40 2946 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2947 * in PCI-X mode, so add one more descriptor to the count
2948 */
96838a40 2949 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2950 (len > 2015)))
2951 count++;
2952
1da177e4 2953 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2954 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2955 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2956 max_txd_pwr);
96838a40 2957 if (adapter->pcix_82544)
1da177e4
LT		 2958 count += nr_frags;
2959
96838a40 2960 if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2d7edb92
MC		 2961 e1000_transfer_dhcp_info(adapter, skb);
2962
581d708e
MC		 2963 local_irq_save(flags);
2964 if (!spin_trylock(&tx_ring->tx_lock)) {
2965 /* Collision - tell upper layer to requeue */
2966 local_irq_restore(flags);
2967 return NETDEV_TX_LOCKED;
2968 }
1da177e4
LT		 2969
2970 /* need: count + 2 desc gap to keep tail from touching
2971 * head, otherwise try next time */
581d708e 2972 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2973 netif_stop_queue(netdev);
581d708e 2974 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2975 return NETDEV_TX_BUSY;
2976 }
2977
96838a40
JB		 2978 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2979 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2980 netif_stop_queue(netdev);
2981 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2982 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2983 return NETDEV_TX_BUSY;
2984 }
2985 }
2986
96838a40 2987 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2988 tx_flags |= E1000_TX_FLAGS_VLAN;
2989 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2990 }
2991
581d708e 2992 first = tx_ring->next_to_use;
96838a40 2993
581d708e 2994 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2995 if (tso < 0) {
2996 dev_kfree_skb_any(skb);
581d708e 2997 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2998 return NETDEV_TX_OK;
2999 }
3000
fd803241
JK		 3001 if (likely(tso)) {
3002 tx_ring->last_tx_tso = 1;
1da177e4 3003 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3004 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3005 tx_flags |= E1000_TX_FLAGS_CSUM;
3006
2d7edb92 3007 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3008 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3009 * no longer assume, we must. */
581d708e 3010 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 3011 tx_flags |= E1000_TX_FLAGS_IPV4;
3012
581d708e
MC		 3013 e1000_tx_queue(adapter, tx_ring, tx_flags,
3014 e1000_tx_map(adapter, tx_ring, skb, first,
3015 max_per_txd, nr_frags, mss));
1da177e4
LT		 3016
3017 netdev->trans_start = jiffies;
3018
3019 /* Make sure there is space in the ring for the next send. */
581d708e 3020 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 3021 netif_stop_queue(netdev);
3022
581d708e 3023 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3024 return NETDEV_TX_OK;
3025}
3026
3027/**
3028 * e1000_tx_timeout - Respond to a Tx Hang
3029 * @netdev: network interface device structure
3030 **/
3031
3032static void
3033e1000_tx_timeout(struct net_device *netdev)
3034{
60490fe0 3035 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3036
3037 /* Do the reset outside of interrupt context */
3038 schedule_work(&adapter->tx_timeout_task);
3039}
3040
3041static void
3042e1000_tx_timeout_task(struct net_device *netdev)
3043{
60490fe0 3044 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3045
6b7660cd 3046 adapter->tx_timeout_count++;
1da177e4
LT		 3047 e1000_down(adapter);
3048 e1000_up(adapter);
3049}
3050
3051/**
3052 * e1000_get_stats - Get System Network Statistics
3053 * @netdev: network interface device structure
3054 *
3055 * Returns the address of the device statistics structure.
3056 * The statistics are actually updated from the timer callback.
3057 **/
3058
3059static struct net_device_stats *
3060e1000_get_stats(struct net_device *netdev)
3061{
60490fe0 3062 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3063
6b7660cd 3064 /* only return the current stats */
1da177e4
LT		 3065 return &adapter->net_stats;
3066}
3067
3068/**
3069 * e1000_change_mtu - Change the Maximum Transfer Unit
3070 * @netdev: network interface device structure
3071 * @new_mtu: new value for maximum frame size
3072 *
3073 * Returns 0 on success, negative on failure
3074 **/
3075
3076static int
3077e1000_change_mtu(struct net_device *netdev, int new_mtu)
3078{
60490fe0 3079 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3080 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3081
96838a40
JB		 3082 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3083 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3084 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3085 return -EINVAL;
2d7edb92 3086 }
1da177e4 3087
997f5cbd
JK		 3088 /* Adapter-specific max frame size limits. */
3089 switch (adapter->hw.mac_type) {
3090 case e1000_82542_rev2_0:
3091 case e1000_82542_rev2_1:
3092 case e1000_82573:
3093 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3094 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3095 return -EINVAL;
2d7edb92 3096 }
997f5cbd
JK		 3097 break;
3098 case e1000_82571:
3099 case e1000_82572:
3100#define MAX_STD_JUMBO_FRAME_SIZE 9234
3101 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3102 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3103 return -EINVAL;
3104 }
3105 break;
3106 default:
3107 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3108 break;
1da177e4
LT		 3109 }
3110
997f5cbd
JK		 3111 /* since the driver code now supports splitting a packet across
3112 * multiple descriptors, most of the fifo related limitations on
3113 * jumbo frame traffic have gone away.
3114 * simply use 2k descriptors for everything.
3115 *
3116 * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3117 * means we reserve 2 more, this pushes us to allocate from the next
3118 * larger slab size
3119 * i.e. RXBUFFER_2048 --> size-4096 slab */
3120
3121 /* recent hardware supports 1KB granularity */
3122 if (adapter->hw.mac_type > e1000_82547_rev_2) {
3123 adapter->rx_buffer_len =
3124 ((max_frame < E1000_RXBUFFER_2048) ?
3125 max_frame : E1000_RXBUFFER_2048);
3126 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3127 } else
3128 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3129
2d7edb92
MC		 3130 netdev->mtu = new_mtu;
3131
96838a40 3132 if (netif_running(netdev)) {
1da177e4
LT		 3133 e1000_down(adapter);
3134 e1000_up(adapter);
3135 }
3136
1da177e4
LT		 3137 adapter->hw.max_frame_size = max_frame;
3138
3139 return 0;
3140}
3141
3142/**
3143 * e1000_update_stats - Update the board statistics counters
3144 * @adapter: board private structure
3145 **/
3146
3147void
3148e1000_update_stats(struct e1000_adapter *adapter)
3149{
3150 struct e1000_hw *hw = &adapter->hw;
3151 unsigned long flags;
3152 uint16_t phy_tmp;
3153
3154#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3155
3156 spin_lock_irqsave(&adapter->stats_lock, flags);
3157
3158 /* these counters are modified from e1000_adjust_tbi_stats,
3159 * called from the interrupt context, so they must only
3160 * be written while holding adapter->stats_lock
3161 */
3162
3163 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3164 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3165 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3166 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3167 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3168 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3169 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3170 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3171 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3172 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3173 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3174 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3175 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3176
3177 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3178 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3179 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3180 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3181 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3182 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3183 adapter->stats.dc += E1000_READ_REG(hw, DC);
3184 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3185 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3186 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3187 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3188 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3189 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3190 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3191 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3192 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3193 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3194 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3195 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3196 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3197 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3198 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3199 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3200 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3201 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3202 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3203 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3204 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3205 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3206 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3207 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3208 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3209 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3210 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3211
3212 /* used for adaptive IFS */
3213
3214 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3215 adapter->stats.tpt += hw->tx_packet_delta;
3216 hw->collision_delta = E1000_READ_REG(hw, COLC);
3217 adapter->stats.colc += hw->collision_delta;
3218
96838a40 3219 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3220 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3221 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3222 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3223 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3224 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3225 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3226 }
96838a40 3227 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3228 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3229 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3230 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3231 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3232 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3233 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3234 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3235 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3236 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3237 }
1da177e4
LT		 3238
3239 /* Fill out the OS statistics structure */
3240
3241 adapter->net_stats.rx_packets = adapter->stats.gprc;
3242 adapter->net_stats.tx_packets = adapter->stats.gptc;
3243 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3244 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3245 adapter->net_stats.multicast = adapter->stats.mprc;
3246 adapter->net_stats.collisions = adapter->stats.colc;
3247
3248 /* Rx Errors */
3249
3250 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3251 adapter->stats.crcerrs + adapter->stats.algnerrc +
6b7660cd
JK		 3252 adapter->stats.rlec + adapter->stats.cexterr;
3253 adapter->net_stats.rx_dropped = 0;
1da177e4
LT		 3254 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3255 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3256 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3257 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3258
3259 /* Tx Errors */
3260
3261 adapter->net_stats.tx_errors = adapter->stats.ecol +
3262 adapter->stats.latecol;
3263 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3264 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3265 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3266
3267 /* Tx Dropped needs to be maintained elsewhere */
3268
3269 /* Phy Stats */
3270
96838a40
JB		 3271 if (hw->media_type == e1000_media_type_copper) {
3272 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3273 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3274 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3275 adapter->phy_stats.idle_errors += phy_tmp;
3276 }
3277
96838a40 3278 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3279 (hw->phy_type == e1000_phy_m88) &&
3280 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3281 adapter->phy_stats.receive_errors += phy_tmp;
3282 }
3283
3284 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3285}
3286
24025e4e
MC		 3287#ifdef CONFIG_E1000_MQ
3288void
3289e1000_rx_schedule(void *data)
3290{
3291 struct net_device *poll_dev, *netdev = data;
3292 struct e1000_adapter *adapter = netdev->priv;
3293 int this_cpu = get_cpu();
3294
3295 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3296 if (poll_dev == NULL) {
3297 put_cpu();
3298 return;
3299 }
3300
3301 if (likely(netif_rx_schedule_prep(poll_dev)))
3302 __netif_rx_schedule(poll_dev);
3303 else
3304 e1000_irq_enable(adapter);
3305
3306 put_cpu();
3307}
3308#endif
3309
1da177e4
LT		 3310/**
3311 * e1000_intr - Interrupt Handler
3312 * @irq: interrupt number
3313 * @data: pointer to a network interface device structure
3314 * @pt_regs: CPU registers structure
3315 **/
3316
3317static irqreturn_t
3318e1000_intr(int irq, void *data, struct pt_regs *regs)
3319{
3320 struct net_device *netdev = data;
60490fe0 3321 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3322 struct e1000_hw *hw = &adapter->hw;
3323 uint32_t icr = E1000_READ_REG(hw, ICR);
1e613fd9 3324#ifndef CONFIG_E1000_NAPI
581d708e 3325 int i;
1e613fd9
JK		 3326#else
3327 /* Interrupt Auto-Mask...upon reading ICR,
3328 * interrupts are masked. No need for the
3329 * IMC write, but it does mean we should
3330 * account for it ASAP. */
3331 if (likely(hw->mac_type >= e1000_82571))
3332 atomic_inc(&adapter->irq_sem);
be2b28ed 3333#endif
1da177e4 3334
1e613fd9
JK		 3335 if (unlikely(!icr)) {
3336#ifdef CONFIG_E1000_NAPI
3337 if (hw->mac_type >= e1000_82571)
3338 e1000_irq_enable(adapter);
3339#endif
1da177e4 3340 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3341 }
1da177e4 3342
96838a40 3343 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4
LT		 3344 hw->get_link_status = 1;
3345 mod_timer(&adapter->watchdog_timer, jiffies);
3346 }
3347
3348#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3349 if (unlikely(hw->mac_type < e1000_82571)) {
3350 atomic_inc(&adapter->irq_sem);
3351 E1000_WRITE_REG(hw, IMC, ~0);
3352 E1000_WRITE_FLUSH(hw);
3353 }
24025e4e
MC		 3354#ifdef CONFIG_E1000_MQ
3355 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
f56799ea
JK		 3356 /* We must setup the cpumask once count == 0 since
3357 * each cpu bit is cleared when the work is done. */
3358 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3359 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3360 atomic_set(&adapter->rx_sched_call_data.count,
3361 adapter->num_rx_queues);
24025e4e
MC		 3362 smp_call_async_mask(&adapter->rx_sched_call_data);
3363 } else {
3364 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
1da177e4 3365 }
be2b28ed 3366#else /* if !CONFIG_E1000_MQ */
581d708e
MC		 3367 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3368 __netif_rx_schedule(&adapter->polling_netdev[0]);
3369 else
3370 e1000_irq_enable(adapter);
be2b28ed
JG		 3371#endif /* CONFIG_E1000_MQ */
3372
3373#else /* if !CONFIG_E1000_NAPI */
1da177e4 3374 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3375 * Due to Hub Link bus being occupied, an interrupt
3376 * de-assertion message is not able to be sent.
3377 * When an interrupt assertion message is generated later,
3378 * two messages are re-ordered and sent out.
3379 * That causes APIC to think 82547 is in de-assertion
3380 * state, while 82547 is in assertion state, resulting
3381 * in dead lock. Writing IMC forces 82547 into
3382 * de-assertion state.
3383 */
3384 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3385 atomic_inc(&adapter->irq_sem);
2648345f 3386 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3387 }
3388
96838a40
JB		 3389 for (i = 0; i < E1000_MAX_INTR; i++)
3390 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3391 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3392 break;
3393
96838a40 3394 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3395 e1000_irq_enable(adapter);
581d708e 3396
be2b28ed 3397#endif /* CONFIG_E1000_NAPI */
1da177e4
LT		 3398
3399 return IRQ_HANDLED;
3400}
3401
3402#ifdef CONFIG_E1000_NAPI
3403/**
3404 * e1000_clean - NAPI Rx polling callback
3405 * @adapter: board private structure
3406 **/
3407
3408static int
581d708e 3409e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3410{
581d708e
MC		 3411 struct e1000_adapter *adapter;
3412 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3413 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3414
3415 /* Must NOT use netdev_priv macro here. */
3416 adapter = poll_dev->priv;
3417
3418 /* Keep link state information with original netdev */
3419 if (!netif_carrier_ok(adapter->netdev))
3420 goto quit_polling;
2648345f 3421
581d708e
MC		 3422 while (poll_dev != &adapter->polling_netdev[i]) {
3423 i++;
f56799ea 3424 if (unlikely(i == adapter->num_rx_queues))
581d708e
MC		 3425 BUG();
3426 }
3427
8241e35e
JK		 3428 if (likely(adapter->num_tx_queues == 1)) {
3429 /* e1000_clean is called per-cpu. This lock protects
3430 * tx_ring[0] from being cleaned by multiple cpus
3431 * simultaneously. A failure obtaining the lock means
3432 * tx_ring[0] is currently being cleaned anyway. */
3433 if (spin_trylock(&adapter->tx_queue_lock)) {
3434 tx_cleaned = e1000_clean_tx_irq(adapter,
3435 &adapter->tx_ring[0]);
3436 spin_unlock(&adapter->tx_queue_lock);
3437 }
3438 } else
3439 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3440
581d708e
MC		 3441 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3442 &work_done, work_to_do);
1da177e4
LT		 3443
3444 *budget -= work_done;
581d708e 3445 poll_dev->quota -= work_done;
96838a40 3446
2b02893e 3447 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3448 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3449 !netif_running(adapter->netdev)) {
3450quit_polling:
3451 netif_rx_complete(poll_dev);
1da177e4
LT		 3452 e1000_irq_enable(adapter);
3453 return 0;
3454 }
3455
3456 return 1;
3457}
3458
3459#endif
3460/**
3461 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3462 * @adapter: board private structure
3463 **/
3464
3465static boolean_t
581d708e
MC		 3466e1000_clean_tx_irq(struct e1000_adapter *adapter,
3467 struct e1000_tx_ring *tx_ring)
1da177e4 3468{
1da177e4
LT		 3469 struct net_device *netdev = adapter->netdev;
3470 struct e1000_tx_desc *tx_desc, *eop_desc;
3471 struct e1000_buffer *buffer_info;
3472 unsigned int i, eop;
3473 boolean_t cleaned = FALSE;
3474
3475 i = tx_ring->next_to_clean;
3476 eop = tx_ring->buffer_info[i].next_to_watch;
3477 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3478
581d708e 3479 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3480 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3481 tx_desc = E1000_TX_DESC(*tx_ring, i);
3482 buffer_info = &tx_ring->buffer_info[i];
3483 cleaned = (i == eop);
3484
8241e35e
JK		 3485#ifdef CONFIG_E1000_MQ
3486 tx_ring->tx_stats.bytes += buffer_info->length;
3487#endif
fd803241 3488 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3489 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3490
96838a40 3491 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3492 }
581d708e 3493
7bfa4816
JK		 3494#ifdef CONFIG_E1000_MQ
3495 tx_ring->tx_stats.packets++;
3496#endif
3497
1da177e4
LT		 3498 eop = tx_ring->buffer_info[i].next_to_watch;
3499 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3500 }
3501
3502 tx_ring->next_to_clean = i;
3503
581d708e 3504 spin_lock(&tx_ring->tx_lock);
1da177e4 3505
96838a40 3506 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
1da177e4
LT		 3507 netif_carrier_ok(netdev)))
3508 netif_wake_queue(netdev);
3509
581d708e 3510 spin_unlock(&tx_ring->tx_lock);
2648345f 3511
581d708e 3512 if (adapter->detect_tx_hung) {
2648345f 3513 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3514 * check with the clearing of time_stamp and movement of i */
3515 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3516 if (tx_ring->buffer_info[eop].dma &&
3517 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3518 adapter->tx_timeout_factor * HZ)
70b8f1e1 3519 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3520 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3521
3522 /* detected Tx unit hang */
c6963ef5 3523 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3524 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3525 " TDH <%x>\n"
3526 " TDT <%x>\n"
3527 " next_to_use <%x>\n"
3528 " next_to_clean <%x>\n"
3529 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3530 " time_stamp <%lx>\n"
3531 " next_to_watch <%x>\n"
3532 " jiffies <%lx>\n"
3533 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3534 (unsigned long)((tx_ring - adapter->tx_ring) /
3535 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3536 readl(adapter->hw.hw_addr + tx_ring->tdh),
3537 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3538 tx_ring->next_to_use,
392137fa
JK		 3539 tx_ring->next_to_clean,
3540 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3541 eop,
3542 jiffies,
3543 eop_desc->upper.fields.status);
1da177e4 3544 netif_stop_queue(netdev);
70b8f1e1 3545 }
1da177e4 3546 }
1da177e4
LT		 3547 return cleaned;
3548}
3549
3550/**
3551 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3552 * @adapter: board private structure
3553 * @status_err: receive descriptor status and error fields
3554 * @csum: receive descriptor csum field
3555 * @sk_buff: socket buffer with received data
1da177e4
LT		 3556 **/
3557
3558static inline void
3559e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3560 uint32_t status_err, uint32_t csum,
3561 struct sk_buff *skb)
1da177e4 3562{
2d7edb92
MC		 3563 uint16_t status = (uint16_t)status_err;
3564 uint8_t errors = (uint8_t)(status_err >> 24);
3565 skb->ip_summed = CHECKSUM_NONE;
3566
1da177e4 3567 /* 82543 or newer only */
96838a40 3568 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3569 /* Ignore Checksum bit is set */
96838a40 3570 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3571 /* TCP/UDP checksum error bit is set */
96838a40 3572 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3573 /* let the stack verify checksum errors */
1da177e4 3574 adapter->hw_csum_err++;
2d7edb92
MC		 3575 return;
3576 }
3577 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3578 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3579 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3580 return;
1da177e4 3581 } else {
96838a40 3582 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3583 return;
3584 }
3585 /* It must be a TCP or UDP packet with a valid checksum */
3586 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3587 /* TCP checksum is good */
3588 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3589 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3590 /* IP fragment with UDP payload */
3591 /* Hardware complements the payload checksum, so we undo it
3592 * and then put the value in host order for further stack use.
3593 */
3594 csum = ntohl(csum ^ 0xFFFF);
3595 skb->csum = csum;
3596 skb->ip_summed = CHECKSUM_HW;
1da177e4 3597 }
2d7edb92 3598 adapter->hw_csum_good++;
1da177e4
LT		 3599}
3600
3601/**
2d7edb92 3602 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3603 * @adapter: board private structure
3604 **/
3605
3606static boolean_t
3607#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3608e1000_clean_rx_irq(struct e1000_adapter *adapter,
3609 struct e1000_rx_ring *rx_ring,
3610 int *work_done, int work_to_do)
1da177e4 3611#else
581d708e
MC		 3612e1000_clean_rx_irq(struct e1000_adapter *adapter,
3613 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3614#endif
3615{
1da177e4
LT		 3616 struct net_device *netdev = adapter->netdev;
3617 struct pci_dev *pdev = adapter->pdev;
3618 struct e1000_rx_desc *rx_desc;
3619 struct e1000_buffer *buffer_info;
1da177e4
LT		 3620 unsigned long flags;
3621 uint32_t length;
3622 uint8_t last_byte;
3623 unsigned int i;
72d64a43 3624 int cleaned_count = 0;
a292ca6e 3625 boolean_t cleaned = FALSE, multi_descriptor = FALSE;
1da177e4
LT		 3626
3627 i = rx_ring->next_to_clean;
3628 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3629 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3630
b92ff8ee
JB		 3631 while (rx_desc->status & E1000_RXD_STAT_DD) {
3632 struct sk_buff *skb;
a292ca6e 3633 u8 status;
1da177e4 3634#ifdef CONFIG_E1000_NAPI
96838a40 3635 if (*work_done >= work_to_do)
1da177e4
LT		 3636 break;
3637 (*work_done)++;
3638#endif
a292ca6e 3639 status = rx_desc->status;
b92ff8ee 3640 skb = buffer_info->skb;
72d64a43
JK		 3641 cleaned = TRUE;
3642 cleaned_count++;
a292ca6e
JK		 3643 pci_unmap_single(pdev,
3644 buffer_info->dma,
3645 buffer_info->length,
1da177e4
LT		 3646 PCI_DMA_FROMDEVICE);
3647
1da177e4
LT		 3648 length = le16_to_cpu(rx_desc->length);
3649
b92ff8ee
JB		 3650 skb_put(skb, length);
3651
3652 if (!(status & E1000_RXD_STAT_EOP)) {
3653 if (!rx_ring->rx_skb_top) {
3654 rx_ring->rx_skb_top = skb;
3655 rx_ring->rx_skb_top->len = length;
3656 rx_ring->rx_skb_prev = skb;
3657 } else {
3658 if (skb_shinfo(rx_ring->rx_skb_top)->frag_list) {
3659 rx_ring->rx_skb_prev->next = skb;
3660 skb->prev = rx_ring->rx_skb_prev;
3661 } else {
3662 skb_shinfo(rx_ring->rx_skb_top)->frag_list = skb;
3663 }
3664 rx_ring->rx_skb_prev = skb;
3665 rx_ring->rx_skb_top->data_len += length;
3666 }
1da177e4 3667 goto next_desc;
b92ff8ee
JB		 3668 } else {
3669 if (rx_ring->rx_skb_top) {
3670 if (skb_shinfo(rx_ring->rx_skb_top)
3671 ->frag_list) {
3672 rx_ring->rx_skb_prev->next = skb;
3673 skb->prev = rx_ring->rx_skb_prev;
3674 } else
3675 skb_shinfo(rx_ring->rx_skb_top)
3676 ->frag_list = skb;
3677
3678 rx_ring->rx_skb_top->data_len += length;
3679 rx_ring->rx_skb_top->len +=
3680 rx_ring->rx_skb_top->data_len;
3681
3682 skb = rx_ring->rx_skb_top;
3683 multi_descriptor = TRUE;
3684 rx_ring->rx_skb_top = NULL;
3685 rx_ring->rx_skb_prev = NULL;
3686 }
1da177e4
LT		 3687 }
3688
96838a40 3689 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3690 last_byte = *(skb->data + length - 1);
b92ff8ee 3691 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3692 rx_desc->errors, length, last_byte)) {
3693 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3694 e1000_tbi_adjust_stats(&adapter->hw,
3695 &adapter->stats,
1da177e4
LT		 3696 length, skb->data);
3697 spin_unlock_irqrestore(&adapter->stats_lock,
3698 flags);
3699 length--;
3700 } else {
3701 dev_kfree_skb_irq(skb);
3702 goto next_desc;
3703 }
3704 }
3705
a292ca6e
JK		 3706 /* code added for copybreak, this should improve
3707 * performance for small packets with large amounts
3708 * of reassembly being done in the stack */
3709#define E1000_CB_LENGTH 256
3710 if ((length < E1000_CB_LENGTH) &&
3711 !rx_ring->rx_skb_top &&
3712 /* or maybe (status & E1000_RXD_STAT_EOP) && */
3713 !multi_descriptor) {
3714 struct sk_buff *new_skb =
3715 dev_alloc_skb(length + NET_IP_ALIGN);
3716 if (new_skb) {
3717 skb_reserve(new_skb, NET_IP_ALIGN);
3718 new_skb->dev = netdev;
3719 memcpy(new_skb->data - NET_IP_ALIGN,
3720 skb->data - NET_IP_ALIGN,
3721 length + NET_IP_ALIGN);
3722 /* save the skb in buffer_info as good */
3723 buffer_info->skb = skb;
3724 skb = new_skb;
3725 skb_put(skb, length);
3726 }
3727 }
3728
3729 /* end copybreak code */
1da177e4
LT		 3730
3731 /* Receive Checksum Offload */
a292ca6e
JK		 3732 e1000_rx_checksum(adapter,
3733 (uint32_t)(status) |
2d7edb92
MC		 3734 ((uint32_t)(rx_desc->errors) << 24),
3735 rx_desc->csum, skb);
96838a40 3736
1da177e4
LT		 3737 skb->protocol = eth_type_trans(skb, netdev);
3738#ifdef CONFIG_E1000_NAPI
96838a40 3739 if (unlikely(adapter->vlgrp &&
a292ca6e 3740 (status & E1000_RXD_STAT_VP))) {
1da177e4 3741 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3742 le16_to_cpu(rx_desc->special) &
3743 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3744 } else {
3745 netif_receive_skb(skb);
3746 }
3747#else /* CONFIG_E1000_NAPI */
96838a40 3748 if (unlikely(adapter->vlgrp &&
b92ff8ee 3749 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3750 vlan_hwaccel_rx(skb, adapter->vlgrp,
3751 le16_to_cpu(rx_desc->special) &
3752 E1000_RXD_SPC_VLAN_MASK);
3753 } else {
3754 netif_rx(skb);
3755 }
3756#endif /* CONFIG_E1000_NAPI */
3757 netdev->last_rx = jiffies;
7bfa4816
JK		 3758#ifdef CONFIG_E1000_MQ
3759 rx_ring->rx_stats.packets++;
3760 rx_ring->rx_stats.bytes += length;
3761#endif
1da177e4
LT		 3762
3763next_desc:
3764 rx_desc->status = 0;
1da177e4 3765
72d64a43
JK		 3766 /* return some buffers to hardware, one at a time is too slow */
3767 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3768 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3769 cleaned_count = 0;
3770 }
3771
1da177e4 3772 }
1da177e4 3773 rx_ring->next_to_clean = i;
72d64a43
JK		 3774
3775 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3776 if (cleaned_count)
3777 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3778
3779 return cleaned;
3780}
3781
3782/**
3783 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3784 * @adapter: board private structure
3785 **/
3786
3787static boolean_t
3788#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3789e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3790 struct e1000_rx_ring *rx_ring,
3791 int *work_done, int work_to_do)
2d7edb92 3792#else
581d708e
MC		 3793e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3794 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3795#endif
3796{
2d7edb92
MC		 3797 union e1000_rx_desc_packet_split *rx_desc;
3798 struct net_device *netdev = adapter->netdev;
3799 struct pci_dev *pdev = adapter->pdev;
3800 struct e1000_buffer *buffer_info;
3801 struct e1000_ps_page *ps_page;
3802 struct e1000_ps_page_dma *ps_page_dma;
3803 struct sk_buff *skb;
3804 unsigned int i, j;
3805 uint32_t length, staterr;
72d64a43 3806 int cleaned_count = 0;
2d7edb92
MC		 3807 boolean_t cleaned = FALSE;
3808
3809 i = rx_ring->next_to_clean;
3810 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3811 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92 3812
96838a40 3813 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3814 buffer_info = &rx_ring->buffer_info[i];
3815 ps_page = &rx_ring->ps_page[i];
3816 ps_page_dma = &rx_ring->ps_page_dma[i];
3817#ifdef CONFIG_E1000_NAPI
96838a40 3818 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3819 break;
3820 (*work_done)++;
3821#endif
3822 cleaned = TRUE;
72d64a43 3823 cleaned_count++;
2d7edb92
MC		 3824 pci_unmap_single(pdev, buffer_info->dma,
3825 buffer_info->length,
3826 PCI_DMA_FROMDEVICE);
3827
3828 skb = buffer_info->skb;
3829
96838a40 3830 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3831 E1000_DBG("%s: Packet Split buffers didn't pick up"
3832 " the full packet\n", netdev->name);
3833 dev_kfree_skb_irq(skb);
3834 goto next_desc;
3835 }
1da177e4 3836
96838a40 3837 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3838 dev_kfree_skb_irq(skb);
3839 goto next_desc;
3840 }
3841
3842 length = le16_to_cpu(rx_desc->wb.middle.length0);
3843
96838a40 3844 if (unlikely(!length)) {
2d7edb92
MC		 3845 E1000_DBG("%s: Last part of the packet spanning"
3846 " multiple descriptors\n", netdev->name);
3847 dev_kfree_skb_irq(skb);
3848 goto next_desc;
3849 }
3850
3851 /* Good Receive */
3852 skb_put(skb, length);
3853
96838a40
JB		 3854 for (j = 0; j < adapter->rx_ps_pages; j++) {
3855 if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92
MC		 3856 break;
3857
3858 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3859 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3860 ps_page_dma->ps_page_dma[j] = 0;
3861 skb_shinfo(skb)->frags[j].page =
3862 ps_page->ps_page[j];
3863 ps_page->ps_page[j] = NULL;
3864 skb_shinfo(skb)->frags[j].page_offset = 0;
3865 skb_shinfo(skb)->frags[j].size = length;
3866 skb_shinfo(skb)->nr_frags++;
3867 skb->len += length;
3868 skb->data_len += length;
3869 }
3870
3871 e1000_rx_checksum(adapter, staterr,
3872 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3873 skb->protocol = eth_type_trans(skb, netdev);
3874
96838a40 3875 if (likely(rx_desc->wb.upper.header_status &
b92ff8ee 3876 E1000_RXDPS_HDRSTAT_HDRSP))
e4c811c9 3877 adapter->rx_hdr_split++;
2d7edb92 3878#ifdef CONFIG_E1000_NAPI
96838a40 3879 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3880 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3881 le16_to_cpu(rx_desc->wb.middle.vlan) &
3882 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3883 } else {
3884 netif_receive_skb(skb);
3885 }
3886#else /* CONFIG_E1000_NAPI */
96838a40 3887 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3888 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3889 le16_to_cpu(rx_desc->wb.middle.vlan) &
3890 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3891 } else {
3892 netif_rx(skb);
3893 }
3894#endif /* CONFIG_E1000_NAPI */
3895 netdev->last_rx = jiffies;
7bfa4816
JK		 3896#ifdef CONFIG_E1000_MQ
3897 rx_ring->rx_stats.packets++;
3898 rx_ring->rx_stats.bytes += length;
3899#endif
2d7edb92
MC		 3900
3901next_desc:
3902 rx_desc->wb.middle.status_error &= ~0xFF;
3903 buffer_info->skb = NULL;
2d7edb92 3904
72d64a43
JK		 3905 /* return some buffers to hardware, one at a time is too slow */
3906 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3907 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3908 cleaned_count = 0;
3909 }
3910
683a38f3 3911 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3912 }
3913 rx_ring->next_to_clean = i;
72d64a43
JK		 3914
3915 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3916 if (cleaned_count)
3917 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3918
3919 return cleaned;
3920}
3921
3922/**
2d7edb92 3923 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3924 * @adapter: address of board private structure
3925 **/
3926
3927static void
581d708e 3928e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3929 struct e1000_rx_ring *rx_ring,
a292ca6e 3930 int cleaned_count)
1da177e4 3931{
1da177e4
LT		 3932 struct net_device *netdev = adapter->netdev;
3933 struct pci_dev *pdev = adapter->pdev;
3934 struct e1000_rx_desc *rx_desc;
3935 struct e1000_buffer *buffer_info;
3936 struct sk_buff *skb;
2648345f
MC		 3937 unsigned int i;
3938 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3939
3940 i = rx_ring->next_to_use;
3941 buffer_info = &rx_ring->buffer_info[i];
3942
a292ca6e
JK		 3943 while (cleaned_count--) {
3944 if (!(skb = buffer_info->skb))
3945 skb = dev_alloc_skb(bufsz);
3946 else {
3947 skb_trim(skb, 0);
3948 goto map_skb;
3949 }
3950
2648345f 3951
96838a40 3952 if (unlikely(!skb)) {
1da177e4 3953 /* Better luck next round */
72d64a43 3954 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3955 break;
3956 }
3957
2648345f 3958 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3959 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3960 struct sk_buff *oldskb = skb;
2648345f
MC		 3961 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3962 "at %p\n", bufsz, skb->data);
3963 /* Try again, without freeing the previous */
1da177e4 3964 skb = dev_alloc_skb(bufsz);
2648345f 3965 /* Failed allocation, critical failure */
1da177e4
LT		 3966 if (!skb) {
3967 dev_kfree_skb(oldskb);
3968 break;
3969 }
2648345f 3970
1da177e4
LT		 3971 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3972 /* give up */
3973 dev_kfree_skb(skb);
3974 dev_kfree_skb(oldskb);
3975 break; /* while !buffer_info->skb */
3976 } else {
2648345f 3977 /* Use new allocation */
1da177e4
LT		 3978 dev_kfree_skb(oldskb);
3979 }
3980 }
1da177e4
LT		 3981 /* Make buffer alignment 2 beyond a 16 byte boundary
3982 * this will result in a 16 byte aligned IP header after
3983 * the 14 byte MAC header is removed
3984 */
3985 skb_reserve(skb, NET_IP_ALIGN);
3986
3987 skb->dev = netdev;
3988
3989 buffer_info->skb = skb;
3990 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3991map_skb:
1da177e4
LT		 3992 buffer_info->dma = pci_map_single(pdev,
3993 skb->data,
3994 adapter->rx_buffer_len,
3995 PCI_DMA_FROMDEVICE);
3996
2648345f
MC		 3997 /* Fix for errata 23, can't cross 64kB boundary */
3998 if (!e1000_check_64k_bound(adapter,
3999 (void *)(unsigned long)buffer_info->dma,
4000 adapter->rx_buffer_len)) {
4001 DPRINTK(RX_ERR, ERR,
4002 "dma align check failed: %u bytes at %p\n",
4003 adapter->rx_buffer_len,
4004 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4005 dev_kfree_skb(skb);
4006 buffer_info->skb = NULL;
4007
2648345f 4008 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4009 adapter->rx_buffer_len,
4010 PCI_DMA_FROMDEVICE);
4011
4012 break; /* while !buffer_info->skb */
4013 }
1da177e4
LT		 4014 rx_desc = E1000_RX_DESC(*rx_ring, i);
4015 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4016
96838a40
JB		 4017 if (unlikely(++i == rx_ring->count))
4018 i = 0;
1da177e4
LT		 4019 buffer_info = &rx_ring->buffer_info[i];
4020 }
4021
b92ff8ee
JB		 4022 if (likely(rx_ring->next_to_use != i)) {
4023 rx_ring->next_to_use = i;
4024 if (unlikely(i-- == 0))
4025 i = (rx_ring->count - 1);
4026
4027 /* Force memory writes to complete before letting h/w
4028 * know there are new descriptors to fetch. (Only
4029 * applicable for weak-ordered memory model archs,
4030 * such as IA-64). */
4031 wmb();
4032 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4033 }
1da177e4
LT		 4034}
4035
2d7edb92
MC		 4036/**
4037 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4038 * @adapter: address of board private structure
4039 **/
4040
4041static void
581d708e 4042e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4043 struct e1000_rx_ring *rx_ring,
4044 int cleaned_count)
2d7edb92 4045{
2d7edb92
MC		 4046 struct net_device *netdev = adapter->netdev;
4047 struct pci_dev *pdev = adapter->pdev;
4048 union e1000_rx_desc_packet_split *rx_desc;
4049 struct e1000_buffer *buffer_info;
4050 struct e1000_ps_page *ps_page;
4051 struct e1000_ps_page_dma *ps_page_dma;
4052 struct sk_buff *skb;
4053 unsigned int i, j;
4054
4055 i = rx_ring->next_to_use;
4056 buffer_info = &rx_ring->buffer_info[i];
4057 ps_page = &rx_ring->ps_page[i];
4058 ps_page_dma = &rx_ring->ps_page_dma[i];
4059
72d64a43 4060 while (cleaned_count--) {
2d7edb92
MC		 4061 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4062
96838a40 4063 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4064 if (j < adapter->rx_ps_pages) {
4065 if (likely(!ps_page->ps_page[j])) {
4066 ps_page->ps_page[j] =
4067 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4068 if (unlikely(!ps_page->ps_page[j])) {
4069 adapter->alloc_rx_buff_failed++;
e4c811c9 4070 goto no_buffers;
b92ff8ee 4071 }
e4c811c9
MC		 4072 ps_page_dma->ps_page_dma[j] =
4073 pci_map_page(pdev,
4074 ps_page->ps_page[j],
4075 0, PAGE_SIZE,
4076 PCI_DMA_FROMDEVICE);
4077 }
4078 /* Refresh the desc even if buffer_addrs didn't
96838a40 4079 * change because each write-back erases
e4c811c9
MC		 4080 * this info.
4081 */
4082 rx_desc->read.buffer_addr[j+1] =
4083 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4084 } else
4085 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4086 }
4087
4088 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4089
b92ff8ee
JB		 4090 if (unlikely(!skb)) {
4091 adapter->alloc_rx_buff_failed++;
2d7edb92 4092 break;
b92ff8ee 4093 }
2d7edb92
MC		 4094
4095 /* Make buffer alignment 2 beyond a 16 byte boundary
4096 * this will result in a 16 byte aligned IP header after
4097 * the 14 byte MAC header is removed
4098 */
4099 skb_reserve(skb, NET_IP_ALIGN);
4100
4101 skb->dev = netdev;
4102
4103 buffer_info->skb = skb;
4104 buffer_info->length = adapter->rx_ps_bsize0;
4105 buffer_info->dma = pci_map_single(pdev, skb->data,
4106 adapter->rx_ps_bsize0,
4107 PCI_DMA_FROMDEVICE);
4108
4109 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4110
96838a40 4111 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4112 buffer_info = &rx_ring->buffer_info[i];
4113 ps_page = &rx_ring->ps_page[i];
4114 ps_page_dma = &rx_ring->ps_page_dma[i];
4115 }
4116
4117no_buffers:
b92ff8ee
JB		 4118 if (likely(rx_ring->next_to_use != i)) {
4119 rx_ring->next_to_use = i;
4120 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4121
4122 /* Force memory writes to complete before letting h/w
4123 * know there are new descriptors to fetch. (Only
4124 * applicable for weak-ordered memory model archs,
4125 * such as IA-64). */
4126 wmb();
4127 /* Hardware increments by 16 bytes, but packet split
4128 * descriptors are 32 bytes...so we increment tail
4129 * twice as much.
4130 */
4131 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4132 }
2d7edb92
MC		 4133}
4134
1da177e4
LT		 4135/**
4136 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4137 * @adapter:
4138 **/
4139
4140static void
4141e1000_smartspeed(struct e1000_adapter *adapter)
4142{
4143 uint16_t phy_status;
4144 uint16_t phy_ctrl;
4145
96838a40 4146 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4147 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4148 return;
4149
96838a40 4150 if (adapter->smartspeed == 0) {
1da177e4
LT		 4151 /* If Master/Slave config fault is asserted twice,
4152 * we assume back-to-back */
4153 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4154 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4155 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4156 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4157 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4158 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4159 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4160 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4161 phy_ctrl);
4162 adapter->smartspeed++;
96838a40 4163 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4164 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4165 &phy_ctrl)) {
4166 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4167 MII_CR_RESTART_AUTO_NEG);
4168 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4169 phy_ctrl);
4170 }
4171 }
4172 return;
96838a40 4173 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4174 /* If still no link, perhaps using 2/3 pair cable */
4175 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4176 phy_ctrl |= CR_1000T_MS_ENABLE;
4177 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4178 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4179 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4180 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4181 MII_CR_RESTART_AUTO_NEG);
4182 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4183 }
4184 }
4185 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4186 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4187 adapter->smartspeed = 0;
4188}
4189
4190/**
4191 * e1000_ioctl -
4192 * @netdev:
4193 * @ifreq:
4194 * @cmd:
4195 **/
4196
4197static int
4198e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4199{
4200 switch (cmd) {
4201 case SIOCGMIIPHY:
4202 case SIOCGMIIREG:
4203 case SIOCSMIIREG:
4204 return e1000_mii_ioctl(netdev, ifr, cmd);
4205 default:
4206 return -EOPNOTSUPP;
4207 }
4208}
4209
4210/**
4211 * e1000_mii_ioctl -
4212 * @netdev:
4213 * @ifreq:
4214 * @cmd:
4215 **/
4216
4217static int
4218e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4219{
60490fe0 4220 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4221 struct mii_ioctl_data *data = if_mii(ifr);
4222 int retval;
4223 uint16_t mii_reg;
4224 uint16_t spddplx;
97876fc6 4225 unsigned long flags;
1da177e4 4226
96838a40 4227 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4228 return -EOPNOTSUPP;
4229
4230 switch (cmd) {
4231 case SIOCGMIIPHY:
4232 data->phy_id = adapter->hw.phy_addr;
4233 break;
4234 case SIOCGMIIREG:
96838a40 4235 if (!capable(CAP_NET_ADMIN))
1da177e4 4236 return -EPERM;
97876fc6 4237 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4238 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4239 &data->val_out)) {
4240 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4241 return -EIO;
97876fc6
MC		 4242 }
4243 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4244 break;
4245 case SIOCSMIIREG:
96838a40 4246 if (!capable(CAP_NET_ADMIN))
1da177e4 4247 return -EPERM;
96838a40 4248 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4249 return -EFAULT;
4250 mii_reg = data->val_in;
97876fc6 4251 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4252 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4253 mii_reg)) {
4254 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4255 return -EIO;
97876fc6 4256 }
96838a40 4257 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 4258 switch (data->reg_num) {
4259 case PHY_CTRL:
96838a40 4260 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4261 break;
96838a40 4262 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4263 adapter->hw.autoneg = 1;
4264 adapter->hw.autoneg_advertised = 0x2F;
4265 } else {
4266 if (mii_reg & 0x40)
4267 spddplx = SPEED_1000;
4268 else if (mii_reg & 0x2000)
4269 spddplx = SPEED_100;
4270 else
4271 spddplx = SPEED_10;
4272 spddplx += (mii_reg & 0x100)
4273 ? FULL_DUPLEX :
4274 HALF_DUPLEX;
4275 retval = e1000_set_spd_dplx(adapter,
4276 spddplx);
96838a40 4277 if (retval) {
97876fc6 4278 spin_unlock_irqrestore(
96838a40 4279 &adapter->stats_lock,
97876fc6 4280 flags);
1da177e4 4281 return retval;
97876fc6 4282 }
1da177e4 4283 }
96838a40 4284 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4285 e1000_down(adapter);
4286 e1000_up(adapter);
4287 } else
4288 e1000_reset(adapter);
4289 break;
4290 case M88E1000_PHY_SPEC_CTRL:
4291 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4292 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4293 spin_unlock_irqrestore(
4294 &adapter->stats_lock, flags);
1da177e4 4295 return -EIO;
97876fc6 4296 }
1da177e4
LT		 4297 break;
4298 }
4299 } else {
4300 switch (data->reg_num) {
4301 case PHY_CTRL:
96838a40 4302 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4303 break;
96838a40 4304 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4305 e1000_down(adapter);
4306 e1000_up(adapter);
4307 } else
4308 e1000_reset(adapter);
4309 break;
4310 }
4311 }
97876fc6 4312 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4313 break;
4314 default:
4315 return -EOPNOTSUPP;
4316 }
4317 return E1000_SUCCESS;
4318}
4319
4320void
4321e1000_pci_set_mwi(struct e1000_hw *hw)
4322{
4323 struct e1000_adapter *adapter = hw->back;
2648345f 4324 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4325
96838a40 4326 if (ret_val)
2648345f 4327 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4328}
4329
4330void
4331e1000_pci_clear_mwi(struct e1000_hw *hw)
4332{
4333 struct e1000_adapter *adapter = hw->back;
4334
4335 pci_clear_mwi(adapter->pdev);
4336}
4337
4338void
4339e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4340{
4341 struct e1000_adapter *adapter = hw->back;
4342
4343 pci_read_config_word(adapter->pdev, reg, value);
4344}
4345
4346void
4347e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4348{
4349 struct e1000_adapter *adapter = hw->back;
4350
4351 pci_write_config_word(adapter->pdev, reg, *value);
4352}
4353
4354uint32_t
4355e1000_io_read(struct e1000_hw *hw, unsigned long port)
4356{
4357 return inl(port);
4358}
4359
4360void
4361e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4362{
4363 outl(value, port);
4364}
4365
4366static void
4367e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4368{
60490fe0 4369 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4370 uint32_t ctrl, rctl;
4371
4372 e1000_irq_disable(adapter);
4373 adapter->vlgrp = grp;
4374
96838a40 4375 if (grp) {
1da177e4
LT		 4376 /* enable VLAN tag insert/strip */
4377 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4378 ctrl |= E1000_CTRL_VME;
4379 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4380
4381 /* enable VLAN receive filtering */
4382 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4383 rctl |= E1000_RCTL_VFE;
4384 rctl &= ~E1000_RCTL_CFIEN;
4385 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4386 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4387 } else {
4388 /* disable VLAN tag insert/strip */
4389 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4390 ctrl &= ~E1000_CTRL_VME;
4391 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4392
4393 /* disable VLAN filtering */
4394 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4395 rctl &= ~E1000_RCTL_VFE;
4396 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4397 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4398 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4399 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4400 }
1da177e4
LT		 4401 }
4402
4403 e1000_irq_enable(adapter);
4404}
4405
4406static void
4407e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4408{
60490fe0 4409 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4410 uint32_t vfta, index;
96838a40
JB		 4411
4412 if ((adapter->hw.mng_cookie.status &
4413 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4414 (vid == adapter->mng_vlan_id))
2d7edb92 4415 return;
1da177e4
LT		 4416 /* add VID to filter table */
4417 index = (vid >> 5) & 0x7F;
4418 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4419 vfta |= (1 << (vid & 0x1F));
4420 e1000_write_vfta(&adapter->hw, index, vfta);
4421}
4422
4423static void
4424e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4425{
60490fe0 4426 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4427 uint32_t vfta, index;
4428
4429 e1000_irq_disable(adapter);
4430
96838a40 4431 if (adapter->vlgrp)
1da177e4
LT		 4432 adapter->vlgrp->vlan_devices[vid] = NULL;
4433
4434 e1000_irq_enable(adapter);
4435
96838a40
JB		 4436 if ((adapter->hw.mng_cookie.status &
4437 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4438 (vid == adapter->mng_vlan_id)) {
4439 /* release control to f/w */
4440 e1000_release_hw_control(adapter);
2d7edb92 4441 return;
ff147013
JK		 4442 }
4443
1da177e4
LT		 4444 /* remove VID from filter table */
4445 index = (vid >> 5) & 0x7F;
4446 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4447 vfta &= ~(1 << (vid & 0x1F));
4448 e1000_write_vfta(&adapter->hw, index, vfta);
4449}
4450
4451static void
4452e1000_restore_vlan(struct e1000_adapter *adapter)
4453{
4454 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4455
96838a40 4456 if (adapter->vlgrp) {
1da177e4 4457 uint16_t vid;
96838a40
JB		 4458 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4459 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4460 continue;
4461 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4462 }
4463 }
4464}
4465
4466int
4467e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4468{
4469 adapter->hw.autoneg = 0;
4470
6921368f 4471 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4472 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4473 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4474 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4475 return -EINVAL;
4476 }
4477
96838a40 4478 switch (spddplx) {
1da177e4
LT		 4479 case SPEED_10 + DUPLEX_HALF:
4480 adapter->hw.forced_speed_duplex = e1000_10_half;
4481 break;
4482 case SPEED_10 + DUPLEX_FULL:
4483 adapter->hw.forced_speed_duplex = e1000_10_full;
4484 break;
4485 case SPEED_100 + DUPLEX_HALF:
4486 adapter->hw.forced_speed_duplex = e1000_100_half;
4487 break;
4488 case SPEED_100 + DUPLEX_FULL:
4489 adapter->hw.forced_speed_duplex = e1000_100_full;
4490 break;
4491 case SPEED_1000 + DUPLEX_FULL:
4492 adapter->hw.autoneg = 1;
4493 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4494 break;
4495 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4496 default:
2648345f 4497 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4498 return -EINVAL;
4499 }
4500 return 0;
4501}
4502
b6a1d5f8 4503#ifdef CONFIG_PM
2f82665f
JB		 4504/* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
4505 * space versus the 64 bytes that pci_[save|restore]_state handle
4506 */
4507#define PCIE_CONFIG_SPACE_LEN 256
4508#define PCI_CONFIG_SPACE_LEN 64
4509static int
4510e1000_pci_save_state(struct e1000_adapter *adapter)
4511{
4512 struct pci_dev *dev = adapter->pdev;
4513 int size;
4514 int i;
4515 if (adapter->hw.mac_type >= e1000_82571)
4516 size = PCIE_CONFIG_SPACE_LEN;
4517 else
4518 size = PCI_CONFIG_SPACE_LEN;
4519
4520 WARN_ON(adapter->config_space != NULL);
4521
4522 adapter->config_space = kmalloc(size, GFP_KERNEL);
4523 if (!adapter->config_space) {
4524 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4525 return -ENOMEM;
4526 }
4527 for (i = 0; i < (size / 4); i++)
4528 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4529 return 0;
4530}
4531
4532static void
4533e1000_pci_restore_state(struct e1000_adapter *adapter)
4534{
4535 struct pci_dev *dev = adapter->pdev;
4536 int size;
4537 int i;
4538 if (adapter->config_space == NULL)
4539 return;
4540 if (adapter->hw.mac_type >= e1000_82571)
4541 size = PCIE_CONFIG_SPACE_LEN;
4542 else
4543 size = PCI_CONFIG_SPACE_LEN;
4544 for (i = 0; i < (size / 4); i++)
4545 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4546 kfree(adapter->config_space);
4547 adapter->config_space = NULL;
4548 return;
4549}
4550#endif /* CONFIG_PM */
4551
1da177e4 4552static int
829ca9a3 4553e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4554{
4555 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4556 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4557 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4558 uint32_t wufc = adapter->wol;
240b1710 4559 int retval = 0;
1da177e4
LT		 4560
4561 netif_device_detach(netdev);
4562
96838a40 4563 if (netif_running(netdev))
1da177e4
LT		 4564 e1000_down(adapter);
4565
2f82665f
JB		 4566#ifdef CONFIG_PM
4567 /* implement our own version of pci_save_state(pdev) because pci
4568 * express adapters have larger 256 byte config spaces */
4569 retval = e1000_pci_save_state(adapter);
4570 if (retval)
4571 return retval;
4572#endif
4573
1da177e4 4574 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4575 if (status & E1000_STATUS_LU)
1da177e4
LT		 4576 wufc &= ~E1000_WUFC_LNKC;
4577
96838a40 4578 if (wufc) {
1da177e4
LT		 4579 e1000_setup_rctl(adapter);
4580 e1000_set_multi(netdev);
4581
4582 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4583 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4584 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4585 rctl |= E1000_RCTL_MPE;
4586 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4587 }
4588
96838a40 4589 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4590 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4591 /* advertise wake from D3Cold */
4592 #define E1000_CTRL_ADVD3WUC 0x00100000
4593 /* phy power management enable */
4594 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4595 ctrl |= E1000_CTRL_ADVD3WUC |
4596 E1000_CTRL_EN_PHY_PWR_MGMT;
4597 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4598 }
4599
96838a40 4600 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4601 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4602 /* keep the laser running in D3 */
4603 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4604 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4605 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4606 }
4607
2d7edb92
MC		 4608 /* Allow time for pending master requests to run */
4609 e1000_disable_pciex_master(&adapter->hw);
4610
1da177e4
LT		 4611 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4612 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
240b1710
JK		 4613 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4614 if (retval)
4615 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4616 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4617 if (retval)
4618 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4619 } else {
4620 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4621 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
240b1710
JK		 4622 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4623 if (retval)
4624 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4625 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4626 if (retval)
4627 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4628 }
4629
96838a40 4630 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4631 adapter->hw.media_type == e1000_media_type_copper) {
4632 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4633 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4634 manc |= E1000_MANC_ARP_EN;
4635 E1000_WRITE_REG(&adapter->hw, MANC, manc);
240b1710
JK		 4636 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4637 if (retval)
4638 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4639 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4640 if (retval)
4641 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4642 }
4643 }
4644
b55ccb35
JK		 4645 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4646 * would have already happened in close and is redundant. */
4647 e1000_release_hw_control(adapter);
2d7edb92 4648
1da177e4 4649 pci_disable_device(pdev);
240b1710
JK		 4650
4651 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4652 if (retval)
4653 DPRINTK(PROBE, ERR, "Error in setting power state\n");
1da177e4
LT		 4654
4655 return 0;
4656}
4657
2f82665f 4658#ifdef CONFIG_PM
1da177e4
LT		 4659static int
4660e1000_resume(struct pci_dev *pdev)
4661{
4662 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4663 struct e1000_adapter *adapter = netdev_priv(netdev);
240b1710 4664 int retval;
b55ccb35 4665 uint32_t manc, ret_val;
1da177e4 4666
240b1710
JK		 4667 retval = pci_set_power_state(pdev, PCI_D0);
4668 if (retval)
4669 DPRINTK(PROBE, ERR, "Error in setting power state\n");
2f82665f 4670 e1000_pci_restore_state(adapter);
2b02893e 4671 ret_val = pci_enable_device(pdev);
a4cb847d 4672 pci_set_master(pdev);
1da177e4 4673
240b1710
JK		 4674 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4675 if (retval)
4676 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4677 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4678 if (retval)
4679 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4680
4681 e1000_reset(adapter);
4682 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4683
96838a40 4684 if (netif_running(netdev))
1da177e4
LT		 4685 e1000_up(adapter);
4686
4687 netif_device_attach(netdev);
4688
96838a40 4689 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4690 adapter->hw.media_type == e1000_media_type_copper) {
4691 manc = E1000_READ_REG(&adapter->hw, MANC);
4692 manc &= ~(E1000_MANC_ARP_EN);
4693 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4694 }
4695
b55ccb35
JK		 4696 /* If the controller is 82573 and f/w is AMT, do not set
4697 * DRV_LOAD until the interface is up. For all other cases,
4698 * let the f/w know that the h/w is now under the control
4699 * of the driver. */
4700 if (adapter->hw.mac_type != e1000_82573 ||
4701 !e1000_check_mng_mode(&adapter->hw))
4702 e1000_get_hw_control(adapter);
2d7edb92 4703
1da177e4
LT		 4704 return 0;
4705}
4706#endif
1da177e4
LT		 4707#ifdef CONFIG_NET_POLL_CONTROLLER
4708/*
4709 * Polling 'interrupt' - used by things like netconsole to send skbs
4710 * without having to re-enable interrupts. It's not called while
4711 * the interrupt routine is executing.
4712 */
4713static void
2648345f 4714e1000_netpoll(struct net_device *netdev)
1da177e4 4715{
60490fe0 4716 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4717 disable_irq(adapter->pdev->irq);
4718 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4719 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4720#ifndef CONFIG_E1000_NAPI
4721 adapter->clean_rx(adapter, adapter->rx_ring);
4722#endif
1da177e4
LT		 4723 enable_irq(adapter->pdev->irq);
4724}
4725#endif
4726
4727/* e1000_main.c */
Clone of davem's net-next-2.6 tree