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Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
eab2abf5 34#define DRV_VERSION "7.3.21-k6-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH		 128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT		 130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
edbbb3ca
JB		 140static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
581d708e 143static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 144 struct e1000_rx_ring *rx_ring,
72d64a43 145 int cleaned_count);
edbbb3ca
JB		 146static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count);
1da177e4
LT		 149static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
150static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
151 int cmd);
1da177e4
LT		 152static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
153static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
154static void e1000_tx_timeout(struct net_device *dev);
65f27f38 155static void e1000_reset_task(struct work_struct *work);
1da177e4 156static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 157static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
158 struct sk_buff *skb);
1da177e4
LT		 159
160static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 161static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164
6fdfef16 165#ifdef CONFIG_PM
b43fcd7d 166static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 167static int e1000_resume(struct pci_dev *pdev);
168#endif
c653e635 169static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 170
171#ifdef CONFIG_NET_POLL_CONTROLLER
172/* for netdump / net console */
173static void e1000_netpoll (struct net_device *netdev);
174#endif
175
1f753861
JB		 176#define COPYBREAK_DEFAULT 256
177static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
178module_param(copybreak, uint, 0644);
179MODULE_PARM_DESC(copybreak,
180 "Maximum size of packet that is copied to a new buffer on receive");
181
9026729b
AK		 182static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
183 pci_channel_state_t state);
184static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
185static void e1000_io_resume(struct pci_dev *pdev);
186
187static struct pci_error_handlers e1000_err_handler = {
188 .error_detected = e1000_io_error_detected,
189 .slot_reset = e1000_io_slot_reset,
190 .resume = e1000_io_resume,
191};
24025e4e 192
1da177e4
LT		 193static struct pci_driver e1000_driver = {
194 .name = e1000_driver_name,
195 .id_table = e1000_pci_tbl,
196 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove),
c4e24f01 198#ifdef CONFIG_PM
1da177e4 199 /* Power Managment Hooks */
1da177e4 200 .suspend = e1000_suspend,
c653e635 201 .resume = e1000_resume,
1da177e4 202#endif
9026729b
AK		 203 .shutdown = e1000_shutdown,
204 .err_handler = &e1000_err_handler
1da177e4
LT		 205};
206
207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
209MODULE_LICENSE("GPL");
210MODULE_VERSION(DRV_VERSION);
211
212static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
215
675ad473
ET		 216/**
217 * e1000_get_hw_dev - return device
218 * used by hardware layer to print debugging information
219 *
220 **/
221struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
222{
223 struct e1000_adapter *adapter = hw->back;
224 return adapter->netdev;
225}
226
1da177e4
LT		 227/**
228 * e1000_init_module - Driver Registration Routine
229 *
230 * e1000_init_module is the first routine called when the driver is
231 * loaded. All it does is register with the PCI subsystem.
232 **/
233
64798845 234static int __init e1000_init_module(void)
1da177e4
LT		 235{
236 int ret;
675ad473 237 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 238
675ad473 239 pr_info("%s\n", e1000_copyright);
1da177e4 240
29917620 241 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 242 if (copybreak != COPYBREAK_DEFAULT) {
243 if (copybreak == 0)
675ad473 244 pr_info("copybreak disabled\n");
1f753861 245 else
675ad473
ET		 246 pr_info("copybreak enabled for "
247 "packets <= %u bytes\n", copybreak);
1f753861 248 }
1da177e4
LT		 249 return ret;
250}
251
252module_init(e1000_init_module);
253
254/**
255 * e1000_exit_module - Driver Exit Cleanup Routine
256 *
257 * e1000_exit_module is called just before the driver is removed
258 * from memory.
259 **/
260
64798845 261static void __exit e1000_exit_module(void)
1da177e4 262{
1da177e4
LT		 263 pci_unregister_driver(&e1000_driver);
264}
265
266module_exit(e1000_exit_module);
267
2db10a08
AK		 268static int e1000_request_irq(struct e1000_adapter *adapter)
269{
270 struct net_device *netdev = adapter->netdev;
3e18826c 271 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 272 int irq_flags = IRQF_SHARED;
273 int err;
2db10a08 274
e94bd23f
AK		 275 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
276 netdev);
277 if (err) {
675ad473 278 e_err("Unable to allocate interrupt Error: %d\n", err);
e94bd23f 279 }
2db10a08
AK		 280
281 return err;
282}
283
284static void e1000_free_irq(struct e1000_adapter *adapter)
285{
286 struct net_device *netdev = adapter->netdev;
287
288 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 289}
290
1da177e4
LT		 291/**
292 * e1000_irq_disable - Mask off interrupt generation on the NIC
293 * @adapter: board private structure
294 **/
295
64798845 296static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 297{
1dc32918
JP		 298 struct e1000_hw *hw = &adapter->hw;
299
300 ew32(IMC, ~0);
301 E1000_WRITE_FLUSH();
1da177e4
LT		 302 synchronize_irq(adapter->pdev->irq);
303}
304
305/**
306 * e1000_irq_enable - Enable default interrupt generation settings
307 * @adapter: board private structure
308 **/
309
64798845 310static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 311{
1dc32918
JP		 312 struct e1000_hw *hw = &adapter->hw;
313
314 ew32(IMS, IMS_ENABLE_MASK);
315 E1000_WRITE_FLUSH();
1da177e4 316}
3ad2cc67 317
64798845 318static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 319{
1dc32918 320 struct e1000_hw *hw = &adapter->hw;
2d7edb92 321 struct net_device *netdev = adapter->netdev;
1dc32918 322 u16 vid = hw->mng_cookie.vlan_id;
406874a7 323 u16 old_vid = adapter->mng_vlan_id;
96838a40 324 if (adapter->vlgrp) {
5c15bdec 325 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 326 if (hw->mng_cookie.status &
2d7edb92
MC		 327 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
328 e1000_vlan_rx_add_vid(netdev, vid);
329 adapter->mng_vlan_id = vid;
330 } else
331 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 332
406874a7 333 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 334 (vid != old_vid) &&
5c15bdec 335 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 336 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 337 } else
338 adapter->mng_vlan_id = vid;
2d7edb92
MC		 339 }
340}
b55ccb35 341
64798845 342static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 343{
1dc32918
JP		 344 struct e1000_hw *hw = &adapter->hw;
345
0fccd0e9 346 if (adapter->en_mng_pt) {
1dc32918 347 u32 manc = er32(MANC);
0fccd0e9
JG		 348
349 /* disable hardware interception of ARP */
350 manc &= ~(E1000_MANC_ARP_EN);
351
1dc32918 352 ew32(MANC, manc);
0fccd0e9
JG		 353 }
354}
355
64798845 356static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 357{
1dc32918
JP		 358 struct e1000_hw *hw = &adapter->hw;
359
0fccd0e9 360 if (adapter->en_mng_pt) {
1dc32918 361 u32 manc = er32(MANC);
0fccd0e9
JG		 362
363 /* re-enable hardware interception of ARP */
364 manc |= E1000_MANC_ARP_EN;
365
1dc32918 366 ew32(MANC, manc);
0fccd0e9
JG		 367 }
368}
369
e0aac5a2
AK		 370/**
371 * e1000_configure - configure the hardware for RX and TX
372 * @adapter = private board structure
373 **/
374static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 375{
376 struct net_device *netdev = adapter->netdev;
2db10a08 377 int i;
1da177e4 378
db0ce50d 379 e1000_set_rx_mode(netdev);
1da177e4
LT		 380
381 e1000_restore_vlan(adapter);
0fccd0e9 382 e1000_init_manageability(adapter);
1da177e4
LT		 383
384 e1000_configure_tx(adapter);
385 e1000_setup_rctl(adapter);
386 e1000_configure_rx(adapter);
72d64a43
JK		 387 /* call E1000_DESC_UNUSED which always leaves
388 * at least 1 descriptor unused to make sure
389 * next_to_use != next_to_clean */
f56799ea 390 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 391 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 392 adapter->alloc_rx_buf(adapter, ring,
393 E1000_DESC_UNUSED(ring));
f56799ea 394 }
e0aac5a2
AK		 395}
396
397int e1000_up(struct e1000_adapter *adapter)
398{
1dc32918
JP		 399 struct e1000_hw *hw = &adapter->hw;
400
e0aac5a2
AK		 401 /* hardware has been reset, we need to reload some things */
402 e1000_configure(adapter);
403
404 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 405
bea3348e 406 napi_enable(&adapter->napi);
c3570acb 407
5de55624
MC		 408 e1000_irq_enable(adapter);
409
4cb9be7a
JB		 410 netif_wake_queue(adapter->netdev);
411
79f3d399 412 /* fire a link change interrupt to start the watchdog */
1dc32918 413 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 414 return 0;
415}
416
79f05bf0
AK		 417/**
418 * e1000_power_up_phy - restore link in case the phy was powered down
419 * @adapter: address of board private structure
420 *
421 * The phy may be powered down to save power and turn off link when the
422 * driver is unloaded and wake on lan is not enabled (among others)
423 * *** this routine MUST be followed by a call to e1000_reset ***
424 *
425 **/
426
d658266e 427void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 428{
1dc32918 429 struct e1000_hw *hw = &adapter->hw;
406874a7 430 u16 mii_reg = 0;
79f05bf0
AK		 431
432 /* Just clear the power down bit to wake the phy back up */
1dc32918 433 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 434 /* according to the manual, the phy will retain its
435 * settings across a power-down/up cycle */
1dc32918 436 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 437 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 438 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 439 }
440}
441
442static void e1000_power_down_phy(struct e1000_adapter *adapter)
443{
1dc32918
JP		 444 struct e1000_hw *hw = &adapter->hw;
445
61c2505f 446 /* Power down the PHY so no link is implied when interface is down *
c3033b01 447 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 448 * (a) WoL is enabled
449 * (b) AMT is active
450 * (c) SoL/IDER session is active */
1dc32918
JP		 451 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
452 hw->media_type == e1000_media_type_copper) {
406874a7 453 u16 mii_reg = 0;
61c2505f 454
1dc32918 455 switch (hw->mac_type) {
61c2505f
BA		 456 case e1000_82540:
457 case e1000_82545:
458 case e1000_82545_rev_3:
459 case e1000_82546:
460 case e1000_82546_rev_3:
461 case e1000_82541:
462 case e1000_82541_rev_2:
463 case e1000_82547:
464 case e1000_82547_rev_2:
1dc32918 465 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 466 goto out;
467 break;
61c2505f
BA		 468 default:
469 goto out;
470 }
1dc32918 471 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 472 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 473 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 474 mdelay(1);
475 }
61c2505f
BA		 476out:
477 return;
79f05bf0
AK		 478}
479
64798845 480void e1000_down(struct e1000_adapter *adapter)
1da177e4 481{
a6c42322 482 struct e1000_hw *hw = &adapter->hw;
1da177e4 483 struct net_device *netdev = adapter->netdev;
a6c42322 484 u32 rctl, tctl;
1da177e4 485
1314bbf3
AK		 486 /* signal that we're down so the interrupt handler does not
487 * reschedule our watchdog timer */
488 set_bit(__E1000_DOWN, &adapter->flags);
489
a6c42322
JB		 490 /* disable receives in the hardware */
491 rctl = er32(RCTL);
492 ew32(RCTL, rctl & ~E1000_RCTL_EN);
493 /* flush and sleep below */
494
51851073 495 netif_tx_disable(netdev);
a6c42322
JB		 496
497 /* disable transmits in the hardware */
498 tctl = er32(TCTL);
499 tctl &= ~E1000_TCTL_EN;
500 ew32(TCTL, tctl);
501 /* flush both disables and wait for them to finish */
502 E1000_WRITE_FLUSH();
503 msleep(10);
504
bea3348e 505 napi_disable(&adapter->napi);
c3570acb 506
1da177e4 507 e1000_irq_disable(adapter);
c1605eb3 508
1da177e4
LT		 509 del_timer_sync(&adapter->tx_fifo_stall_timer);
510 del_timer_sync(&adapter->watchdog_timer);
511 del_timer_sync(&adapter->phy_info_timer);
512
1da177e4
LT		 513 adapter->link_speed = 0;
514 adapter->link_duplex = 0;
515 netif_carrier_off(netdev);
1da177e4
LT		 516
517 e1000_reset(adapter);
581d708e
MC		 518 e1000_clean_all_tx_rings(adapter);
519 e1000_clean_all_rx_rings(adapter);
1da177e4 520}
1da177e4 521
64798845 522void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 523{
524 WARN_ON(in_interrupt());
525 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
526 msleep(1);
527 e1000_down(adapter);
528 e1000_up(adapter);
529 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 530}
531
64798845 532void e1000_reset(struct e1000_adapter *adapter)
1da177e4 533{
1dc32918 534 struct e1000_hw *hw = &adapter->hw;
406874a7 535 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 536 bool legacy_pba_adjust = false;
b7cb8c2c 537 u16 hwm;
1da177e4
LT		 538
539 /* Repartition Pba for greater than 9k mtu
540 * To take effect CTRL.RST is required.
541 */
542
1dc32918 543 switch (hw->mac_type) {
018ea44e
BA		 544 case e1000_82542_rev2_0:
545 case e1000_82542_rev2_1:
546 case e1000_82543:
547 case e1000_82544:
548 case e1000_82540:
549 case e1000_82541:
550 case e1000_82541_rev_2:
c3033b01 551 legacy_pba_adjust = true;
018ea44e
BA		 552 pba = E1000_PBA_48K;
553 break;
554 case e1000_82545:
555 case e1000_82545_rev_3:
556 case e1000_82546:
557 case e1000_82546_rev_3:
558 pba = E1000_PBA_48K;
559 break;
2d7edb92 560 case e1000_82547:
0e6ef3e0 561 case e1000_82547_rev_2:
c3033b01 562 legacy_pba_adjust = true;
2d7edb92
MC		 563 pba = E1000_PBA_30K;
564 break;
018ea44e
BA		 565 case e1000_undefined:
566 case e1000_num_macs:
2d7edb92
MC		 567 break;
568 }
569
c3033b01 570 if (legacy_pba_adjust) {
b7cb8c2c 571 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 572 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 573
1dc32918 574 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 575 adapter->tx_fifo_head = 0;
576 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
577 adapter->tx_fifo_size =
578 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
579 atomic_set(&adapter->tx_fifo_stall, 0);
580 }
b7cb8c2c 581 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 582 /* adjust PBA for jumbo frames */
1dc32918 583 ew32(PBA, pba);
018ea44e
BA		 584
585 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 586 * large enough to accommodate two full transmit packets,
018ea44e 587 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 588 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 589 * one full receive packet and is similarly rounded up and
590 * expressed in KB. */
1dc32918 591 pba = er32(PBA);
018ea44e
BA		 592 /* upper 16 bits has Tx packet buffer allocation size in KB */
593 tx_space = pba >> 16;
594 /* lower 16 bits has Rx packet buffer allocation size in KB */
595 pba &= 0xffff;
b7cb8c2c
JB		 596 /*
597 * the tx fifo also stores 16 bytes of information about the tx
598 * but don't include ethernet FCS because hardware appends it
599 */
600 min_tx_space = (hw->max_frame_size +
601 sizeof(struct e1000_tx_desc) -
602 ETH_FCS_LEN) * 2;
9099cfb9 603 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 604 min_tx_space >>= 10;
b7cb8c2c
JB		 605 /* software strips receive CRC, so leave room for it */
606 min_rx_space = hw->max_frame_size;
9099cfb9 607 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 608 min_rx_space >>= 10;
609
610 /* If current Tx allocation is less than the min Tx FIFO size,
611 * and the min Tx FIFO size is less than the current Rx FIFO
612 * allocation, take space away from current Rx allocation */
613 if (tx_space < min_tx_space &&
614 ((min_tx_space - tx_space) < pba)) {
615 pba = pba - (min_tx_space - tx_space);
616
617 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 618 switch (hw->mac_type) {
018ea44e
BA		 619 case e1000_82545 ... e1000_82546_rev_3:
620 pba &= ~(E1000_PBA_8K - 1);
621 break;
622 default:
623 break;
624 }
625
626 /* if short on rx space, rx wins and must trump tx
627 * adjustment or use Early Receive if available */
1532ecea
JB		 628 if (pba < min_rx_space)
629 pba = min_rx_space;
018ea44e 630 }
1da177e4 631 }
2d7edb92 632
1dc32918 633 ew32(PBA, pba);
1da177e4 634
b7cb8c2c
JB		 635 /*
636 * flow control settings:
637 * The high water mark must be low enough to fit one full frame
638 * (or the size used for early receive) above it in the Rx FIFO.
639 * Set it to the lower of:
640 * - 90% of the Rx FIFO size, and
641 * - the full Rx FIFO size minus the early receive size (for parts
642 * with ERT support assuming ERT set to E1000_ERT_2048), or
643 * - the full Rx FIFO size minus one full frame
644 */
645 hwm = min(((pba << 10) * 9 / 10),
646 ((pba << 10) - hw->max_frame_size));
647
648 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
649 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 650 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 651 hw->fc_send_xon = 1;
652 hw->fc = hw->original_fc;
1da177e4 653
2d7edb92 654 /* Allow time for pending master requests to run */
1dc32918
JP		 655 e1000_reset_hw(hw);
656 if (hw->mac_type >= e1000_82544)
657 ew32(WUC, 0);
09ae3e88 658
1dc32918 659 if (e1000_init_hw(hw))
675ad473 660 e_err("Hardware Error\n");
2d7edb92 661 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 662
663 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 664 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 665 hw->autoneg == 1 &&
666 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
667 u32 ctrl = er32(CTRL);
3d5460a0
JB		 668 /* clear phy power management bit if we are in gig only mode,
669 * which if enabled will attempt negotiation to 100Mb, which
670 * can cause a loss of link at power off or driver unload */
671 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 672 ew32(CTRL, ctrl);
3d5460a0
JB		 673 }
674
1da177e4 675 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 676 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 677
1dc32918
JP		 678 e1000_reset_adaptive(hw);
679 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 680
0fccd0e9 681 e1000_release_manageability(adapter);
1da177e4
LT		 682}
683
67b3c27c
AK		 684/**
685 * Dump the eeprom for users having checksum issues
686 **/
b4ea895d 687static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 688{
689 struct net_device *netdev = adapter->netdev;
690 struct ethtool_eeprom eeprom;
691 const struct ethtool_ops *ops = netdev->ethtool_ops;
692 u8 *data;
693 int i;
694 u16 csum_old, csum_new = 0;
695
696 eeprom.len = ops->get_eeprom_len(netdev);
697 eeprom.offset = 0;
698
699 data = kmalloc(eeprom.len, GFP_KERNEL);
700 if (!data) {
675ad473 701 pr_err("Unable to allocate memory to dump EEPROM data\n");
67b3c27c
AK		 702 return;
703 }
704
705 ops->get_eeprom(netdev, &eeprom, data);
706
707 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
708 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
709 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
710 csum_new += data[i] + (data[i + 1] << 8);
711 csum_new = EEPROM_SUM - csum_new;
712
675ad473
ET		 713 pr_err("/*********************/\n");
714 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
715 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 716
675ad473
ET		 717 pr_err("Offset Values\n");
718 pr_err("======== ======\n");
67b3c27c
AK		 719 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
720
675ad473
ET		 721 pr_err("Include this output when contacting your support provider.\n");
722 pr_err("This is not a software error! Something bad happened to\n");
723 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
724 pr_err("result in further problems, possibly loss of data,\n");
725 pr_err("corruption or system hangs!\n");
726 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
727 pr_err("which is invalid and requires you to set the proper MAC\n");
728 pr_err("address manually before continuing to enable this network\n");
729 pr_err("device. Please inspect the EEPROM dump and report the\n");
730 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
731 pr_err("/*********************/\n");
67b3c27c
AK		 732
733 kfree(data);
734}
735
81250297
TI		 736/**
737 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
738 * @pdev: PCI device information struct
739 *
740 * Return true if an adapter needs ioport resources
741 **/
742static int e1000_is_need_ioport(struct pci_dev *pdev)
743{
744 switch (pdev->device) {
745 case E1000_DEV_ID_82540EM:
746 case E1000_DEV_ID_82540EM_LOM:
747 case E1000_DEV_ID_82540EP:
748 case E1000_DEV_ID_82540EP_LOM:
749 case E1000_DEV_ID_82540EP_LP:
750 case E1000_DEV_ID_82541EI:
751 case E1000_DEV_ID_82541EI_MOBILE:
752 case E1000_DEV_ID_82541ER:
753 case E1000_DEV_ID_82541ER_LOM:
754 case E1000_DEV_ID_82541GI:
755 case E1000_DEV_ID_82541GI_LF:
756 case E1000_DEV_ID_82541GI_MOBILE:
757 case E1000_DEV_ID_82544EI_COPPER:
758 case E1000_DEV_ID_82544EI_FIBER:
759 case E1000_DEV_ID_82544GC_COPPER:
760 case E1000_DEV_ID_82544GC_LOM:
761 case E1000_DEV_ID_82545EM_COPPER:
762 case E1000_DEV_ID_82545EM_FIBER:
763 case E1000_DEV_ID_82546EB_COPPER:
764 case E1000_DEV_ID_82546EB_FIBER:
765 case E1000_DEV_ID_82546EB_QUAD_COPPER:
766 return true;
767 default:
768 return false;
769 }
770}
771
0e7614bc
SH		 772static const struct net_device_ops e1000_netdev_ops = {
773 .ndo_open = e1000_open,
774 .ndo_stop = e1000_close,
00829823 775 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 776 .ndo_get_stats = e1000_get_stats,
777 .ndo_set_rx_mode = e1000_set_rx_mode,
778 .ndo_set_mac_address = e1000_set_mac,
779 .ndo_tx_timeout = e1000_tx_timeout,
780 .ndo_change_mtu = e1000_change_mtu,
781 .ndo_do_ioctl = e1000_ioctl,
782 .ndo_validate_addr = eth_validate_addr,
783
784 .ndo_vlan_rx_register = e1000_vlan_rx_register,
785 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
786 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
787#ifdef CONFIG_NET_POLL_CONTROLLER
788 .ndo_poll_controller = e1000_netpoll,
789#endif
790};
791
1da177e4
LT		 792/**
793 * e1000_probe - Device Initialization Routine
794 * @pdev: PCI device information struct
795 * @ent: entry in e1000_pci_tbl
796 *
797 * Returns 0 on success, negative on failure
798 *
799 * e1000_probe initializes an adapter identified by a pci_dev structure.
800 * The OS initialization, configuring of the adapter private structure,
801 * and a hardware reset occur.
802 **/
1dc32918
JP		 803static int __devinit e1000_probe(struct pci_dev *pdev,
804 const struct pci_device_id *ent)
1da177e4
LT		 805{
806 struct net_device *netdev;
807 struct e1000_adapter *adapter;
1dc32918 808 struct e1000_hw *hw;
2d7edb92 809
1da177e4 810 static int cards_found = 0;
120cd576 811 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 812 int i, err, pci_using_dac;
406874a7
JP		 813 u16 eeprom_data = 0;
814 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 815 int bars, need_ioport;
0795af57 816
81250297
TI		 817 /* do not allocate ioport bars when not needed */
818 need_ioport = e1000_is_need_ioport(pdev);
819 if (need_ioport) {
820 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
821 err = pci_enable_device(pdev);
822 } else {
823 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 824 err = pci_enable_device_mem(pdev);
81250297 825 }
c7be73bc 826 if (err)
1da177e4
LT		 827 return err;
828
b16f53be
NN		 829 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
830 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1da177e4
LT		 831 pci_using_dac = 1;
832 } else {
b16f53be 833 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
c7be73bc 834 if (err) {
b16f53be
NN		 835 err = dma_set_coherent_mask(&pdev->dev,
836 DMA_BIT_MASK(32));
c7be73bc 837 if (err) {
675ad473 838 pr_err("No usable DMA config, aborting\n");
c7be73bc
JP		 839 goto err_dma;
840 }
1da177e4
LT		 841 }
842 pci_using_dac = 0;
843 }
844
81250297 845 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 846 if (err)
6dd62ab0 847 goto err_pci_reg;
1da177e4
LT		 848
849 pci_set_master(pdev);
dbb5aaeb
NN		 850 err = pci_save_state(pdev);
851 if (err)
852 goto err_alloc_etherdev;
1da177e4 853
6dd62ab0 854 err = -ENOMEM;
1da177e4 855 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 856 if (!netdev)
1da177e4 857 goto err_alloc_etherdev;
1da177e4 858
1da177e4
LT		 859 SET_NETDEV_DEV(netdev, &pdev->dev);
860
861 pci_set_drvdata(pdev, netdev);
60490fe0 862 adapter = netdev_priv(netdev);
1da177e4
LT		 863 adapter->netdev = netdev;
864 adapter->pdev = pdev;
1da177e4 865 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 866 adapter->bars = bars;
867 adapter->need_ioport = need_ioport;
1da177e4 868
1dc32918
JP		 869 hw = &adapter->hw;
870 hw->back = adapter;
871
6dd62ab0 872 err = -EIO;
275f165f 873 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 874 if (!hw->hw_addr)
1da177e4 875 goto err_ioremap;
1da177e4 876
81250297
TI		 877 if (adapter->need_ioport) {
878 for (i = BAR_1; i <= BAR_5; i++) {
879 if (pci_resource_len(pdev, i) == 0)
880 continue;
881 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
882 hw->io_base = pci_resource_start(pdev, i);
883 break;
884 }
1da177e4
LT		 885 }
886 }
887
0e7614bc 888 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 889 e1000_set_ethtool_ops(netdev);
1da177e4 890 netdev->watchdog_timeo = 5 * HZ;
bea3348e 891 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 892
0eb5a34c 893 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 894
1da177e4
LT		 895 adapter->bd_number = cards_found;
896
897 /* setup the private structure */
898
c7be73bc
JP		 899 err = e1000_sw_init(adapter);
900 if (err)
1da177e4
LT		 901 goto err_sw_init;
902
6dd62ab0 903 err = -EIO;
2d7edb92 904
1dc32918 905 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 906 netdev->features = NETIF_F_SG |
907 NETIF_F_HW_CSUM |
908 NETIF_F_HW_VLAN_TX |
909 NETIF_F_HW_VLAN_RX |
910 NETIF_F_HW_VLAN_FILTER;
911 }
912
1dc32918
JP		 913 if ((hw->mac_type >= e1000_82544) &&
914 (hw->mac_type != e1000_82547))
1da177e4 915 netdev->features |= NETIF_F_TSO;
2d7edb92 916
96838a40 917 if (pci_using_dac)
1da177e4
LT		 918 netdev->features |= NETIF_F_HIGHDMA;
919
20501a69 920 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 921 netdev->vlan_features |= NETIF_F_HW_CSUM;
922 netdev->vlan_features |= NETIF_F_SG;
923
1dc32918 924 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 925
cd94dd0b 926 /* initialize eeprom parameters */
1dc32918 927 if (e1000_init_eeprom_params(hw)) {
675ad473 928 e_err("EEPROM initialization failed\n");
6dd62ab0 929 goto err_eeprom;
cd94dd0b
AK		 930 }
931
96838a40 932 /* before reading the EEPROM, reset the controller to
1da177e4 933 * put the device in a known good starting state */
96838a40 934
1dc32918 935 e1000_reset_hw(hw);
1da177e4
LT		 936
937 /* make sure the EEPROM is good */
1dc32918 938 if (e1000_validate_eeprom_checksum(hw) < 0) {
675ad473 939 e_err("The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 940 e1000_dump_eeprom(adapter);
941 /*
942 * set MAC address to all zeroes to invalidate and temporary
943 * disable this device for the user. This blocks regular
944 * traffic while still permitting ethtool ioctls from reaching
945 * the hardware as well as allowing the user to run the
946 * interface after manually setting a hw addr using
947 * `ip set address`
948 */
1dc32918 949 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 950 } else {
951 /* copy the MAC address out of the EEPROM */
1dc32918 952 if (e1000_read_mac_addr(hw))
675ad473 953 e_err("EEPROM Read Error\n");
1da177e4 954 }
67b3c27c 955 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 956 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
957 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 958
67b3c27c 959 if (!is_valid_ether_addr(netdev->perm_addr))
675ad473 960 e_err("Invalid MAC Address\n");
1da177e4 961
1dc32918 962 e1000_get_bus_info(hw);
1da177e4
LT		 963
964 init_timer(&adapter->tx_fifo_stall_timer);
965 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 966 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 967
968 init_timer(&adapter->watchdog_timer);
969 adapter->watchdog_timer.function = &e1000_watchdog;
970 adapter->watchdog_timer.data = (unsigned long) adapter;
971
1da177e4
LT		 972 init_timer(&adapter->phy_info_timer);
973 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 974 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 975
65f27f38 976 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 977
1da177e4
LT		 978 e1000_check_options(adapter);
979
980 /* Initial Wake on LAN setting
981 * If APM wake is enabled in the EEPROM,
982 * enable the ACPI Magic Packet filter
983 */
984
1dc32918 985 switch (hw->mac_type) {
1da177e4
LT		 986 case e1000_82542_rev2_0:
987 case e1000_82542_rev2_1:
988 case e1000_82543:
989 break;
990 case e1000_82544:
1dc32918 991 e1000_read_eeprom(hw,
1da177e4
LT		 992 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
993 eeprom_apme_mask = E1000_EEPROM_82544_APM;
994 break;
995 case e1000_82546:
996 case e1000_82546_rev_3:
1dc32918
JP		 997 if (er32(STATUS) & E1000_STATUS_FUNC_1){
998 e1000_read_eeprom(hw,
1da177e4
LT		 999 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1000 break;
1001 }
1002 /* Fall Through */
1003 default:
1dc32918 1004 e1000_read_eeprom(hw,
1da177e4
LT		 1005 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1006 break;
1007 }
96838a40 1008 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1009 adapter->eeprom_wol |= E1000_WUFC_MAG;
1010
1011 /* now that we have the eeprom settings, apply the special cases
1012 * where the eeprom may be wrong or the board simply won't support
1013 * wake on lan on a particular port */
1014 switch (pdev->device) {
1015 case E1000_DEV_ID_82546GB_PCIE:
1016 adapter->eeprom_wol = 0;
1017 break;
1018 case E1000_DEV_ID_82546EB_FIBER:
1019 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1020 /* Wake events only supported on port A for dual fiber
1021 * regardless of eeprom setting */
1dc32918 1022 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1023 adapter->eeprom_wol = 0;
1024 break;
1025 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1026 /* if quad port adapter, disable WoL on all but port A */
1027 if (global_quad_port_a != 0)
1028 adapter->eeprom_wol = 0;
1029 else
1030 adapter->quad_port_a = 1;
1031 /* Reset for multiple quad port adapters */
1032 if (++global_quad_port_a == 4)
1033 global_quad_port_a = 0;
1034 break;
1035 }
1036
1037 /* initialize the wol settings based on the eeprom settings */
1038 adapter->wol = adapter->eeprom_wol;
de126489 1039 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1040
675ad473
ET		 1041 /* reset the hardware with the new settings */
1042 e1000_reset(adapter);
1043
1044 strcpy(netdev->name, "eth%d");
1045 err = register_netdev(netdev);
1046 if (err)
1047 goto err_register;
1048
fb3d47d4 1049 /* print bus type/speed/width info */
7837e58c
JP		 1050 e_info("(PCI%s:%dMHz:%d-bit) %pM\n",
1051 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1052 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1053 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1054 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1055 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1056 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1057 netdev->dev_addr);
1314bbf3 1058
eb62efd2
JB		 1059 /* carrier off reporting is important to ethtool even BEFORE open */
1060 netif_carrier_off(netdev);
1061
675ad473 1062 e_info("Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1063
1064 cards_found++;
1065 return 0;
1066
1067err_register:
6dd62ab0 1068err_eeprom:
1532ecea 1069 e1000_phy_hw_reset(hw);
6dd62ab0 1070
1dc32918
JP		 1071 if (hw->flash_address)
1072 iounmap(hw->flash_address);
6dd62ab0
VA		 1073 kfree(adapter->tx_ring);
1074 kfree(adapter->rx_ring);
1da177e4 1075err_sw_init:
1dc32918 1076 iounmap(hw->hw_addr);
1da177e4
LT		 1077err_ioremap:
1078 free_netdev(netdev);
1079err_alloc_etherdev:
81250297 1080 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1081err_pci_reg:
1082err_dma:
1083 pci_disable_device(pdev);
1da177e4
LT		 1084 return err;
1085}
1086
1087/**
1088 * e1000_remove - Device Removal Routine
1089 * @pdev: PCI device information struct
1090 *
1091 * e1000_remove is called by the PCI subsystem to alert the driver
1092 * that it should release a PCI device. The could be caused by a
1093 * Hot-Plug event, or because the driver is going to be removed from
1094 * memory.
1095 **/
1096
64798845 1097static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1098{
1099 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1100 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1101 struct e1000_hw *hw = &adapter->hw;
1da177e4 1102
baa34745
JB		 1103 set_bit(__E1000_DOWN, &adapter->flags);
1104 del_timer_sync(&adapter->tx_fifo_stall_timer);
1105 del_timer_sync(&adapter->watchdog_timer);
1106 del_timer_sync(&adapter->phy_info_timer);
1107
28e53bdd 1108 cancel_work_sync(&adapter->reset_task);
be2b28ed 1109
0fccd0e9 1110 e1000_release_manageability(adapter);
1da177e4 1111
bea3348e
SH		 1112 unregister_netdev(netdev);
1113
1532ecea 1114 e1000_phy_hw_reset(hw);
1da177e4 1115
24025e4e
MC		 1116 kfree(adapter->tx_ring);
1117 kfree(adapter->rx_ring);
24025e4e 1118
1dc32918
JP		 1119 iounmap(hw->hw_addr);
1120 if (hw->flash_address)
1121 iounmap(hw->flash_address);
81250297 1122 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1123
1124 free_netdev(netdev);
1125
1126 pci_disable_device(pdev);
1127}
1128
1129/**
1130 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1131 * @adapter: board private structure to initialize
1132 *
1133 * e1000_sw_init initializes the Adapter private data structure.
1134 * Fields are initialized based on PCI device information and
1135 * OS network device settings (MTU size).
1136 **/
1137
64798845 1138static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1139{
1140 struct e1000_hw *hw = &adapter->hw;
1141 struct net_device *netdev = adapter->netdev;
1142 struct pci_dev *pdev = adapter->pdev;
1143
1144 /* PCI config space info */
1145
1146 hw->vendor_id = pdev->vendor;
1147 hw->device_id = pdev->device;
1148 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1149 hw->subsystem_id = pdev->subsystem_device;
44c10138 1150 hw->revision_id = pdev->revision;
1da177e4
LT		 1151
1152 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1153
eb0f8054 1154 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1155 hw->max_frame_size = netdev->mtu +
1156 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1157 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1158
1159 /* identify the MAC */
1160
96838a40 1161 if (e1000_set_mac_type(hw)) {
675ad473 1162 e_err("Unknown MAC Type\n");
1da177e4
LT		 1163 return -EIO;
1164 }
1165
96838a40 1166 switch (hw->mac_type) {
1da177e4
LT		 1167 default:
1168 break;
1169 case e1000_82541:
1170 case e1000_82547:
1171 case e1000_82541_rev_2:
1172 case e1000_82547_rev_2:
1173 hw->phy_init_script = 1;
1174 break;
1175 }
1176
1177 e1000_set_media_type(hw);
1178
c3033b01
JP		 1179 hw->wait_autoneg_complete = false;
1180 hw->tbi_compatibility_en = true;
1181 hw->adaptive_ifs = true;
1da177e4
LT		 1182
1183 /* Copper options */
1184
96838a40 1185 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1186 hw->mdix = AUTO_ALL_MODES;
c3033b01 1187 hw->disable_polarity_correction = false;
1da177e4
LT		 1188 hw->master_slave = E1000_MASTER_SLAVE;
1189 }
1190
f56799ea
JK		 1191 adapter->num_tx_queues = 1;
1192 adapter->num_rx_queues = 1;
581d708e
MC		 1193
1194 if (e1000_alloc_queues(adapter)) {
675ad473 1195 e_err("Unable to allocate memory for queues\n");
581d708e
MC		 1196 return -ENOMEM;
1197 }
1198
47313054 1199 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1200 e1000_irq_disable(adapter);
1201
1da177e4 1202 spin_lock_init(&adapter->stats_lock);
1da177e4 1203
1314bbf3
AK		 1204 set_bit(__E1000_DOWN, &adapter->flags);
1205
1da177e4
LT		 1206 return 0;
1207}
1208
581d708e
MC		 1209/**
1210 * e1000_alloc_queues - Allocate memory for all rings
1211 * @adapter: board private structure to initialize
1212 *
1213 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1214 * number of queues at compile-time.
581d708e
MC		 1215 **/
1216
64798845 1217static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1218{
1c7e5b12
YB		 1219 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1220 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1221 if (!adapter->tx_ring)
1222 return -ENOMEM;
581d708e 1223
1c7e5b12
YB		 1224 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1225 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1226 if (!adapter->rx_ring) {
1227 kfree(adapter->tx_ring);
1228 return -ENOMEM;
1229 }
581d708e 1230
581d708e
MC		 1231 return E1000_SUCCESS;
1232}
1233
1da177e4
LT		 1234/**
1235 * e1000_open - Called when a network interface is made active
1236 * @netdev: network interface device structure
1237 *
1238 * Returns 0 on success, negative value on failure
1239 *
1240 * The open entry point is called when a network interface is made
1241 * active by the system (IFF_UP). At this point all resources needed
1242 * for transmit and receive operations are allocated, the interrupt
1243 * handler is registered with the OS, the watchdog timer is started,
1244 * and the stack is notified that the interface is ready.
1245 **/
1246
64798845 1247static int e1000_open(struct net_device *netdev)
1da177e4 1248{
60490fe0 1249 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1250 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1251 int err;
1252
2db10a08 1253 /* disallow open during test */
1314bbf3 1254 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1255 return -EBUSY;
1256
eb62efd2
JB		 1257 netif_carrier_off(netdev);
1258
1da177e4 1259 /* allocate transmit descriptors */
e0aac5a2
AK		 1260 err = e1000_setup_all_tx_resources(adapter);
1261 if (err)
1da177e4
LT		 1262 goto err_setup_tx;
1263
1264 /* allocate receive descriptors */
e0aac5a2 1265 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1266 if (err)
e0aac5a2 1267 goto err_setup_rx;
b5bf28cd 1268
79f05bf0
AK		 1269 e1000_power_up_phy(adapter);
1270
2d7edb92 1271 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1272 if ((hw->mng_cookie.status &
2d7edb92
MC		 1273 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1274 e1000_update_mng_vlan(adapter);
1275 }
1da177e4 1276
e0aac5a2
AK		 1277 /* before we allocate an interrupt, we must be ready to handle it.
1278 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1279 * as soon as we call pci_request_irq, so we have to setup our
1280 * clean_rx handler before we do so. */
1281 e1000_configure(adapter);
1282
1283 err = e1000_request_irq(adapter);
1284 if (err)
1285 goto err_req_irq;
1286
1287 /* From here on the code is the same as e1000_up() */
1288 clear_bit(__E1000_DOWN, &adapter->flags);
1289
bea3348e 1290 napi_enable(&adapter->napi);
47313054 1291
e0aac5a2
AK		 1292 e1000_irq_enable(adapter);
1293
076152d5
BH		 1294 netif_start_queue(netdev);
1295
e0aac5a2 1296 /* fire a link status change interrupt to start the watchdog */
1dc32918 1297 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1298
1da177e4
LT		 1299 return E1000_SUCCESS;
1300
b5bf28cd 1301err_req_irq:
e0aac5a2 1302 e1000_power_down_phy(adapter);
581d708e 1303 e1000_free_all_rx_resources(adapter);
1da177e4 1304err_setup_rx:
581d708e 1305 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1306err_setup_tx:
1307 e1000_reset(adapter);
1308
1309 return err;
1310}
1311
1312/**
1313 * e1000_close - Disables a network interface
1314 * @netdev: network interface device structure
1315 *
1316 * Returns 0, this is not allowed to fail
1317 *
1318 * The close entry point is called when an interface is de-activated
1319 * by the OS. The hardware is still under the drivers control, but
1320 * needs to be disabled. A global MAC reset is issued to stop the
1321 * hardware, and all transmit and receive resources are freed.
1322 **/
1323
64798845 1324static int e1000_close(struct net_device *netdev)
1da177e4 1325{
60490fe0 1326 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1327 struct e1000_hw *hw = &adapter->hw;
1da177e4 1328
2db10a08 1329 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1330 e1000_down(adapter);
79f05bf0 1331 e1000_power_down_phy(adapter);
2db10a08 1332 e1000_free_irq(adapter);
1da177e4 1333
581d708e
MC		 1334 e1000_free_all_tx_resources(adapter);
1335 e1000_free_all_rx_resources(adapter);
1da177e4 1336
4666560a
BA		 1337 /* kill manageability vlan ID if supported, but not if a vlan with
1338 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1339 if ((hw->mng_cookie.status &
4666560a
BA		 1340 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1341 !(adapter->vlgrp &&
5c15bdec 1342 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1343 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1344 }
b55ccb35 1345
1da177e4
LT		 1346 return 0;
1347}
1348
1349/**
1350 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1351 * @adapter: address of board private structure
2d7edb92
MC		 1352 * @start: address of beginning of memory
1353 * @len: length of memory
1da177e4 1354 **/
64798845
JP		 1355static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1356 unsigned long len)
1da177e4 1357{
1dc32918 1358 struct e1000_hw *hw = &adapter->hw;
e982f17c 1359 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1360 unsigned long end = begin + len;
1361
2648345f
MC		 1362 /* First rev 82545 and 82546 need to not allow any memory
1363 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1364 if (hw->mac_type == e1000_82545 ||
1365 hw->mac_type == e1000_82546) {
c3033b01 1366 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1367 }
1368
c3033b01 1369 return true;
1da177e4
LT		 1370}
1371
1372/**
1373 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1374 * @adapter: board private structure
581d708e 1375 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1376 *
1377 * Return 0 on success, negative on failure
1378 **/
1379
64798845
JP		 1380static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1381 struct e1000_tx_ring *txdr)
1da177e4 1382{
1da177e4
LT		 1383 struct pci_dev *pdev = adapter->pdev;
1384 int size;
1385
1386 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1387 txdr->buffer_info = vmalloc(size);
96838a40 1388 if (!txdr->buffer_info) {
675ad473 1389 e_err("Unable to allocate memory for the Tx descriptor ring\n");
1da177e4
LT		 1390 return -ENOMEM;
1391 }
1392 memset(txdr->buffer_info, 0, size);
1393
1394 /* round up to nearest 4K */
1395
1396 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1397 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1398
b16f53be
NN		 1399 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1400 GFP_KERNEL);
96838a40 1401 if (!txdr->desc) {
1da177e4 1402setup_tx_desc_die:
1da177e4 1403 vfree(txdr->buffer_info);
675ad473 1404 e_err("Unable to allocate memory for the Tx descriptor ring\n");
1da177e4
LT		 1405 return -ENOMEM;
1406 }
1407
2648345f 1408 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1409 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1410 void *olddesc = txdr->desc;
1411 dma_addr_t olddma = txdr->dma;
675ad473
ET		 1412 e_err("txdr align check failed: %u bytes at %p\n",
1413 txdr->size, txdr->desc);
2648345f 1414 /* Try again, without freeing the previous */
b16f53be
NN		 1415 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1416 &txdr->dma, GFP_KERNEL);
2648345f 1417 /* Failed allocation, critical failure */
96838a40 1418 if (!txdr->desc) {
b16f53be
NN		 1419 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1420 olddma);
1da177e4
LT		 1421 goto setup_tx_desc_die;
1422 }
1423
1424 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1425 /* give up */
b16f53be
NN		 1426 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1427 txdr->dma);
1428 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1429 olddma);
675ad473
ET		 1430 e_err("Unable to allocate aligned memory "
1431 "for the transmit descriptor ring\n");
1da177e4
LT		 1432 vfree(txdr->buffer_info);
1433 return -ENOMEM;
1434 } else {
2648345f 1435 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1436 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1437 olddma);
1da177e4
LT		 1438 }
1439 }
1440 memset(txdr->desc, 0, txdr->size);
1441
1442 txdr->next_to_use = 0;
1443 txdr->next_to_clean = 0;
1444
1445 return 0;
1446}
1447
581d708e
MC		 1448/**
1449 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1450 * (Descriptors) for all queues
1451 * @adapter: board private structure
1452 *
581d708e
MC		 1453 * Return 0 on success, negative on failure
1454 **/
1455
64798845 1456int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1457{
1458 int i, err = 0;
1459
f56799ea 1460 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1461 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1462 if (err) {
675ad473 1463 e_err("Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1464 for (i-- ; i >= 0; i--)
1465 e1000_free_tx_resources(adapter,
1466 &adapter->tx_ring[i]);
581d708e
MC		 1467 break;
1468 }
1469 }
1470
1471 return err;
1472}
1473
1da177e4
LT		 1474/**
1475 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1476 * @adapter: board private structure
1477 *
1478 * Configure the Tx unit of the MAC after a reset.
1479 **/
1480
64798845 1481static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1482{
406874a7 1483 u64 tdba;
581d708e 1484 struct e1000_hw *hw = &adapter->hw;
1532ecea 1485 u32 tdlen, tctl, tipg;
406874a7 1486 u32 ipgr1, ipgr2;
1da177e4
LT		 1487
1488 /* Setup the HW Tx Head and Tail descriptor pointers */
1489
f56799ea 1490 switch (adapter->num_tx_queues) {
24025e4e
MC		 1491 case 1:
1492 default:
581d708e
MC		 1493 tdba = adapter->tx_ring[0].dma;
1494 tdlen = adapter->tx_ring[0].count *
1495 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1496 ew32(TDLEN, tdlen);
1497 ew32(TDBAH, (tdba >> 32));
1498 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1499 ew32(TDT, 0);
1500 ew32(TDH, 0);
6a951698
AK		 1501 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1502 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1503 break;
1504 }
1da177e4
LT		 1505
1506 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1507 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1508 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1509 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1510 else
1511 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1512
581d708e 1513 switch (hw->mac_type) {
1da177e4
LT		 1514 case e1000_82542_rev2_0:
1515 case e1000_82542_rev2_1:
1516 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1517 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1518 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1519 break;
1520 default:
0fadb059
JK		 1521 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1522 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1523 break;
1da177e4 1524 }
0fadb059
JK		 1525 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1526 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1527 ew32(TIPG, tipg);
1da177e4
LT		 1528
1529 /* Set the Tx Interrupt Delay register */
1530
1dc32918 1531 ew32(TIDV, adapter->tx_int_delay);
581d708e 1532 if (hw->mac_type >= e1000_82540)
1dc32918 1533 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1534
1535 /* Program the Transmit Control Register */
1536
1dc32918 1537 tctl = er32(TCTL);
1da177e4 1538 tctl &= ~E1000_TCTL_CT;
7e6c9861 1539 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1540 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1541
581d708e 1542 e1000_config_collision_dist(hw);
1da177e4
LT		 1543
1544 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1545 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1546
1547 /* only set IDE if we are delaying interrupts using the timers */
1548 if (adapter->tx_int_delay)
1549 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1550
581d708e 1551 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1552 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1553 else
1554 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1555
1556 /* Cache if we're 82544 running in PCI-X because we'll
1557 * need this to apply a workaround later in the send path. */
581d708e
MC		 1558 if (hw->mac_type == e1000_82544 &&
1559 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1560 adapter->pcix_82544 = 1;
7e6c9861 1561
1dc32918 1562 ew32(TCTL, tctl);
7e6c9861 1563
1da177e4
LT		 1564}
1565
1566/**
1567 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1568 * @adapter: board private structure
581d708e 1569 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1570 *
1571 * Returns 0 on success, negative on failure
1572 **/
1573
64798845
JP		 1574static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1575 struct e1000_rx_ring *rxdr)
1da177e4 1576{
1da177e4 1577 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1578 int size, desc_len;
1da177e4
LT		 1579
1580 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1581 rxdr->buffer_info = vmalloc(size);
581d708e 1582 if (!rxdr->buffer_info) {
675ad473 1583 e_err("Unable to allocate memory for the Rx descriptor ring\n");
1da177e4
LT		 1584 return -ENOMEM;
1585 }
1586 memset(rxdr->buffer_info, 0, size);
1587
1532ecea 1588 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1589
1da177e4
LT		 1590 /* Round up to nearest 4K */
1591
2d7edb92 1592 rxdr->size = rxdr->count * desc_len;
9099cfb9 1593 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1594
b16f53be
NN		 1595 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1596 GFP_KERNEL);
1da177e4 1597
581d708e 1598 if (!rxdr->desc) {
675ad473 1599 e_err("Unable to allocate memory for the Rx descriptor ring\n");
1da177e4 1600setup_rx_desc_die:
1da177e4
LT		 1601 vfree(rxdr->buffer_info);
1602 return -ENOMEM;
1603 }
1604
2648345f 1605 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1606 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1607 void *olddesc = rxdr->desc;
1608 dma_addr_t olddma = rxdr->dma;
675ad473
ET		 1609 e_err("rxdr align check failed: %u bytes at %p\n",
1610 rxdr->size, rxdr->desc);
2648345f 1611 /* Try again, without freeing the previous */
b16f53be
NN		 1612 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1613 &rxdr->dma, GFP_KERNEL);
2648345f 1614 /* Failed allocation, critical failure */
581d708e 1615 if (!rxdr->desc) {
b16f53be
NN		 1616 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1617 olddma);
675ad473
ET		 1618 e_err("Unable to allocate memory for the Rx descriptor "
1619 "ring\n");
1da177e4
LT		 1620 goto setup_rx_desc_die;
1621 }
1622
1623 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1624 /* give up */
b16f53be
NN		 1625 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1626 rxdr->dma);
1627 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1628 olddma);
675ad473
ET		 1629 e_err("Unable to allocate aligned memory for the Rx "
1630 "descriptor ring\n");
581d708e 1631 goto setup_rx_desc_die;
1da177e4 1632 } else {
2648345f 1633 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1634 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1635 olddma);
1da177e4
LT		 1636 }
1637 }
1638 memset(rxdr->desc, 0, rxdr->size);
1639
1640 rxdr->next_to_clean = 0;
1641 rxdr->next_to_use = 0;
edbbb3ca 1642 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1643
1644 return 0;
1645}
1646
581d708e
MC		 1647/**
1648 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1649 * (Descriptors) for all queues
1650 * @adapter: board private structure
1651 *
581d708e
MC		 1652 * Return 0 on success, negative on failure
1653 **/
1654
64798845 1655int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1656{
1657 int i, err = 0;
1658
f56799ea 1659 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1660 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1661 if (err) {
675ad473 1662 e_err("Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1663 for (i-- ; i >= 0; i--)
1664 e1000_free_rx_resources(adapter,
1665 &adapter->rx_ring[i]);
581d708e
MC		 1666 break;
1667 }
1668 }
1669
1670 return err;
1671}
1672
1da177e4 1673/**
2648345f 1674 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1675 * @adapter: Board private structure
1676 **/
64798845 1677static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1678{
1dc32918 1679 struct e1000_hw *hw = &adapter->hw;
630b25cd 1680 u32 rctl;
1da177e4 1681
1dc32918 1682 rctl = er32(RCTL);
1da177e4
LT		 1683
1684 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1685
1686 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1687 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1688 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1689
1dc32918 1690 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1691 rctl |= E1000_RCTL_SBP;
1692 else
1693 rctl &= ~E1000_RCTL_SBP;
1694
2d7edb92
MC		 1695 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1696 rctl &= ~E1000_RCTL_LPE;
1697 else
1698 rctl |= E1000_RCTL_LPE;
1699
1da177e4 1700 /* Setup buffer sizes */
9e2feace
AK		 1701 rctl &= ~E1000_RCTL_SZ_4096;
1702 rctl |= E1000_RCTL_BSEX;
1703 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1704 case E1000_RXBUFFER_2048:
1705 default:
1706 rctl |= E1000_RCTL_SZ_2048;
1707 rctl &= ~E1000_RCTL_BSEX;
1708 break;
1709 case E1000_RXBUFFER_4096:
1710 rctl |= E1000_RCTL_SZ_4096;
1711 break;
1712 case E1000_RXBUFFER_8192:
1713 rctl |= E1000_RCTL_SZ_8192;
1714 break;
1715 case E1000_RXBUFFER_16384:
1716 rctl |= E1000_RCTL_SZ_16384;
1717 break;
2d7edb92
MC		 1718 }
1719
1dc32918 1720 ew32(RCTL, rctl);
1da177e4
LT		 1721}
1722
1723/**
1724 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1725 * @adapter: board private structure
1726 *
1727 * Configure the Rx unit of the MAC after a reset.
1728 **/
1729
64798845 1730static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1731{
406874a7 1732 u64 rdba;
581d708e 1733 struct e1000_hw *hw = &adapter->hw;
1532ecea 1734 u32 rdlen, rctl, rxcsum;
2d7edb92 1735
edbbb3ca
JB		 1736 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1737 rdlen = adapter->rx_ring[0].count *
1738 sizeof(struct e1000_rx_desc);
1739 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1740 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1741 } else {
1742 rdlen = adapter->rx_ring[0].count *
1743 sizeof(struct e1000_rx_desc);
1744 adapter->clean_rx = e1000_clean_rx_irq;
1745 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1746 }
1da177e4
LT		 1747
1748 /* disable receives while setting up the descriptors */
1dc32918
JP		 1749 rctl = er32(RCTL);
1750 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1751
1752 /* set the Receive Delay Timer Register */
1dc32918 1753 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1754
581d708e 1755 if (hw->mac_type >= e1000_82540) {
1dc32918 1756 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1757 if (adapter->itr_setting != 0)
1dc32918 1758 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1759 }
1760
581d708e
MC		 1761 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1762 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1763 switch (adapter->num_rx_queues) {
24025e4e
MC		 1764 case 1:
1765 default:
581d708e 1766 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1767 ew32(RDLEN, rdlen);
1768 ew32(RDBAH, (rdba >> 32));
1769 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1770 ew32(RDT, 0);
1771 ew32(RDH, 0);
6a951698
AK		 1772 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1773 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1774 break;
24025e4e
MC		 1775 }
1776
1da177e4 1777 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1778 if (hw->mac_type >= e1000_82543) {
1dc32918 1779 rxcsum = er32(RXCSUM);
630b25cd 1780 if (adapter->rx_csum)
2d7edb92 1781 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1782 else
2d7edb92 1783 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1784 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1785 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1786 }
1787
1788 /* Enable Receives */
1dc32918 1789 ew32(RCTL, rctl);
1da177e4
LT		 1790}
1791
1792/**
581d708e 1793 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1794 * @adapter: board private structure
581d708e 1795 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1796 *
1797 * Free all transmit software resources
1798 **/
1799
64798845
JP		 1800static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1801 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1802{
1803 struct pci_dev *pdev = adapter->pdev;
1804
581d708e 1805 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1806
581d708e
MC		 1807 vfree(tx_ring->buffer_info);
1808 tx_ring->buffer_info = NULL;
1da177e4 1809
b16f53be
NN		 1810 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1811 tx_ring->dma);
1da177e4 1812
581d708e
MC		 1813 tx_ring->desc = NULL;
1814}
1815
1816/**
1817 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1818 * @adapter: board private structure
1819 *
1820 * Free all transmit software resources
1821 **/
1822
64798845 1823void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1824{
1825 int i;
1826
f56799ea 1827 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1828 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1829}
1830
64798845
JP		 1831static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1832 struct e1000_buffer *buffer_info)
1da177e4 1833{
602c0554
AD		 1834 if (buffer_info->dma) {
1835 if (buffer_info->mapped_as_page)
b16f53be
NN		 1836 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1837 buffer_info->length, DMA_TO_DEVICE);
602c0554 1838 else
b16f53be 1839 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1840 buffer_info->length,
b16f53be 1841 DMA_TO_DEVICE);
602c0554
AD		 1842 buffer_info->dma = 0;
1843 }
a9ebadd6 1844 if (buffer_info->skb) {
1da177e4 1845 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1846 buffer_info->skb = NULL;
1847 }
37e73df8 1848 buffer_info->time_stamp = 0;
a9ebadd6 1849 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1850}
1851
1852/**
1853 * e1000_clean_tx_ring - Free Tx Buffers
1854 * @adapter: board private structure
581d708e 1855 * @tx_ring: ring to be cleaned
1da177e4
LT		 1856 **/
1857
64798845
JP		 1858static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1859 struct e1000_tx_ring *tx_ring)
1da177e4 1860{
1dc32918 1861 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1862 struct e1000_buffer *buffer_info;
1863 unsigned long size;
1864 unsigned int i;
1865
1866 /* Free all the Tx ring sk_buffs */
1867
96838a40 1868 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1869 buffer_info = &tx_ring->buffer_info[i];
1870 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1871 }
1872
1873 size = sizeof(struct e1000_buffer) * tx_ring->count;
1874 memset(tx_ring->buffer_info, 0, size);
1875
1876 /* Zero out the descriptor ring */
1877
1878 memset(tx_ring->desc, 0, tx_ring->size);
1879
1880 tx_ring->next_to_use = 0;
1881 tx_ring->next_to_clean = 0;
fd803241 1882 tx_ring->last_tx_tso = 0;
1da177e4 1883
1dc32918
JP		 1884 writel(0, hw->hw_addr + tx_ring->tdh);
1885 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 1886}
1887
1888/**
1889 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1890 * @adapter: board private structure
1891 **/
1892
64798845 1893static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 1894{
1895 int i;
1896
f56799ea 1897 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1898 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1899}
1900
1901/**
1902 * e1000_free_rx_resources - Free Rx Resources
1903 * @adapter: board private structure
581d708e 1904 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1905 *
1906 * Free all receive software resources
1907 **/
1908
64798845
JP		 1909static void e1000_free_rx_resources(struct e1000_adapter *adapter,
1910 struct e1000_rx_ring *rx_ring)
1da177e4 1911{
1da177e4
LT		 1912 struct pci_dev *pdev = adapter->pdev;
1913
581d708e 1914 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1915
1916 vfree(rx_ring->buffer_info);
1917 rx_ring->buffer_info = NULL;
1918
b16f53be
NN		 1919 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1920 rx_ring->dma);
1da177e4
LT		 1921
1922 rx_ring->desc = NULL;
1923}
1924
1925/**
581d708e 1926 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1927 * @adapter: board private structure
581d708e
MC		 1928 *
1929 * Free all receive software resources
1930 **/
1931
64798845 1932void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1933{
1934 int i;
1935
f56799ea 1936 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1937 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1938}
1939
1940/**
1941 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1942 * @adapter: board private structure
1943 * @rx_ring: ring to free buffers from
1da177e4
LT		 1944 **/
1945
64798845
JP		 1946static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
1947 struct e1000_rx_ring *rx_ring)
1da177e4 1948{
1dc32918 1949 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1950 struct e1000_buffer *buffer_info;
1951 struct pci_dev *pdev = adapter->pdev;
1952 unsigned long size;
630b25cd 1953 unsigned int i;
1da177e4
LT		 1954
1955 /* Free all the Rx ring sk_buffs */
96838a40 1956 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1957 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 1958 if (buffer_info->dma &&
1959 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 1960 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 1961 buffer_info->length,
b16f53be 1962 DMA_FROM_DEVICE);
edbbb3ca
JB		 1963 } else if (buffer_info->dma &&
1964 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN		 1965 dma_unmap_page(&pdev->dev, buffer_info->dma,
1966 buffer_info->length,
1967 DMA_FROM_DEVICE);
679be3ba 1968 }
1da177e4 1969
679be3ba 1970 buffer_info->dma = 0;
edbbb3ca
JB		 1971 if (buffer_info->page) {
1972 put_page(buffer_info->page);
1973 buffer_info->page = NULL;
1974 }
679be3ba 1975 if (buffer_info->skb) {
1da177e4
LT		 1976 dev_kfree_skb(buffer_info->skb);
1977 buffer_info->skb = NULL;
997f5cbd 1978 }
1da177e4
LT		 1979 }
1980
edbbb3ca
JB		 1981 /* there also may be some cached data from a chained receive */
1982 if (rx_ring->rx_skb_top) {
1983 dev_kfree_skb(rx_ring->rx_skb_top);
1984 rx_ring->rx_skb_top = NULL;
1985 }
1986
1da177e4
LT		 1987 size = sizeof(struct e1000_buffer) * rx_ring->count;
1988 memset(rx_ring->buffer_info, 0, size);
1989
1990 /* Zero out the descriptor ring */
1da177e4
LT		 1991 memset(rx_ring->desc, 0, rx_ring->size);
1992
1993 rx_ring->next_to_clean = 0;
1994 rx_ring->next_to_use = 0;
1995
1dc32918
JP		 1996 writel(0, hw->hw_addr + rx_ring->rdh);
1997 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 1998}
1999
2000/**
2001 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2002 * @adapter: board private structure
2003 **/
2004
64798845 2005static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2006{
2007 int i;
2008
f56799ea 2009 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2010 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2011}
2012
2013/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2014 * and memory write and invalidate disabled for certain operations
2015 */
64798845 2016static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2017{
1dc32918 2018 struct e1000_hw *hw = &adapter->hw;
1da177e4 2019 struct net_device *netdev = adapter->netdev;
406874a7 2020 u32 rctl;
1da177e4 2021
1dc32918 2022 e1000_pci_clear_mwi(hw);
1da177e4 2023
1dc32918 2024 rctl = er32(RCTL);
1da177e4 2025 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2026 ew32(RCTL, rctl);
2027 E1000_WRITE_FLUSH();
1da177e4
LT		 2028 mdelay(5);
2029
96838a40 2030 if (netif_running(netdev))
581d708e 2031 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2032}
2033
64798845 2034static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2035{
1dc32918 2036 struct e1000_hw *hw = &adapter->hw;
1da177e4 2037 struct net_device *netdev = adapter->netdev;
406874a7 2038 u32 rctl;
1da177e4 2039
1dc32918 2040 rctl = er32(RCTL);
1da177e4 2041 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2042 ew32(RCTL, rctl);
2043 E1000_WRITE_FLUSH();
1da177e4
LT		 2044 mdelay(5);
2045
1dc32918
JP		 2046 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2047 e1000_pci_set_mwi(hw);
1da177e4 2048
96838a40 2049 if (netif_running(netdev)) {
72d64a43
JK		 2050 /* No need to loop, because 82542 supports only 1 queue */
2051 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2052 e1000_configure_rx(adapter);
72d64a43 2053 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2054 }
2055}
2056
2057/**
2058 * e1000_set_mac - Change the Ethernet Address of the NIC
2059 * @netdev: network interface device structure
2060 * @p: pointer to an address structure
2061 *
2062 * Returns 0 on success, negative on failure
2063 **/
2064
64798845 2065static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2066{
60490fe0 2067 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2068 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2069 struct sockaddr *addr = p;
2070
96838a40 2071 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2072 return -EADDRNOTAVAIL;
2073
2074 /* 82542 2.0 needs to be in reset to write receive address registers */
2075
1dc32918 2076 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2077 e1000_enter_82542_rst(adapter);
2078
2079 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2080 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2081
1dc32918 2082 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2083
1dc32918 2084 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2085 e1000_leave_82542_rst(adapter);
2086
2087 return 0;
2088}
2089
2090/**
db0ce50d 2091 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2092 * @netdev: network interface device structure
2093 *
db0ce50d
PM		 2094 * The set_rx_mode entry point is called whenever the unicast or multicast
2095 * address lists or the network interface flags are updated. This routine is
2096 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2097 * promiscuous mode, and all-multi behavior.
2098 **/
2099
64798845 2100static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2101{
60490fe0 2102 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2103 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2104 struct netdev_hw_addr *ha;
2105 bool use_uc = false;
406874a7
JP		 2106 u32 rctl;
2107 u32 hash_value;
868d5309 2108 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2109 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2110 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2111
2112 if (!mcarray) {
675ad473 2113 e_err("memory allocation failed\n");
81c52285
JB		 2114 return;
2115 }
cd94dd0b 2116
2648345f
MC		 2117 /* Check for Promiscuous and All Multicast modes */
2118
1dc32918 2119 rctl = er32(RCTL);
1da177e4 2120
96838a40 2121 if (netdev->flags & IFF_PROMISC) {
1da177e4 2122 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2123 rctl &= ~E1000_RCTL_VFE;
1da177e4 2124 } else {
1532ecea 2125 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2126 rctl |= E1000_RCTL_MPE;
1532ecea 2127 else
746b9f02 2128 rctl &= ~E1000_RCTL_MPE;
1532ecea
JB		 2129 /* Enable VLAN filter if there is a VLAN */
2130 if (adapter->vlgrp)
2131 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2132 }
2133
32e7bfc4 2134 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2135 rctl |= E1000_RCTL_UPE;
2136 } else if (!(netdev->flags & IFF_PROMISC)) {
2137 rctl &= ~E1000_RCTL_UPE;
ccffad25 2138 use_uc = true;
1da177e4
LT		 2139 }
2140
1dc32918 2141 ew32(RCTL, rctl);
1da177e4
LT		 2142
2143 /* 82542 2.0 needs to be in reset to write receive address registers */
2144
96838a40 2145 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2146 e1000_enter_82542_rst(adapter);
2147
db0ce50d
PM		 2148 /* load the first 14 addresses into the exact filters 1-14. Unicast
2149 * addresses take precedence to avoid disabling unicast filtering
2150 * when possible.
2151 *
1da177e4
LT		 2152 * RAR 0 is used for the station MAC adddress
2153 * if there are not 14 addresses, go ahead and clear the filters
2154 */
ccffad25
JP		 2155 i = 1;
2156 if (use_uc)
32e7bfc4 2157 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2158 if (i == rar_entries)
2159 break;
2160 e1000_rar_set(hw, ha->addr, i++);
2161 }
2162
22bedad3 2163 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2164 if (i == rar_entries) {
2165 /* load any remaining addresses into the hash table */
2166 u32 hash_reg, hash_bit, mta;
22bedad3 2167 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2168 hash_reg = (hash_value >> 5) & 0x7F;
2169 hash_bit = hash_value & 0x1F;
2170 mta = (1 << hash_bit);
2171 mcarray[hash_reg] |= mta;
10886af5 2172 } else {
22bedad3 2173 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2174 }
2175 }
2176
7a81e9f3
JP		 2177 for (; i < rar_entries; i++) {
2178 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2179 E1000_WRITE_FLUSH();
2180 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2181 E1000_WRITE_FLUSH();
1da177e4
LT		 2182 }
2183
81c52285
JB		 2184 /* write the hash table completely, write from bottom to avoid
2185 * both stupid write combining chipsets, and flushing each write */
2186 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2187 /*
2188 * If we are on an 82544 has an errata where writing odd
2189 * offsets overwrites the previous even offset, but writing
2190 * backwards over the range solves the issue by always
2191 * writing the odd offset first
2192 */
2193 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2194 }
2195 E1000_WRITE_FLUSH();
2196
96838a40 2197 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2198 e1000_leave_82542_rst(adapter);
81c52285
JB		 2199
2200 kfree(mcarray);
1da177e4
LT		 2201}
2202
2203/* Need to wait a few seconds after link up to get diagnostic information from
2204 * the phy */
2205
64798845 2206static void e1000_update_phy_info(unsigned long data)
1da177e4 2207{
e982f17c 2208 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2209 struct e1000_hw *hw = &adapter->hw;
2210 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2211}
2212
2213/**
2214 * e1000_82547_tx_fifo_stall - Timer Call-back
2215 * @data: pointer to adapter cast into an unsigned long
2216 **/
2217
64798845 2218static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2219{
e982f17c 2220 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2221 struct e1000_hw *hw = &adapter->hw;
1da177e4 2222 struct net_device *netdev = adapter->netdev;
406874a7 2223 u32 tctl;
1da177e4 2224
96838a40 2225 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2226 if ((er32(TDT) == er32(TDH)) &&
2227 (er32(TDFT) == er32(TDFH)) &&
2228 (er32(TDFTS) == er32(TDFHS))) {
2229 tctl = er32(TCTL);
2230 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2231 ew32(TDFT, adapter->tx_head_addr);
2232 ew32(TDFH, adapter->tx_head_addr);
2233 ew32(TDFTS, adapter->tx_head_addr);
2234 ew32(TDFHS, adapter->tx_head_addr);
2235 ew32(TCTL, tctl);
2236 E1000_WRITE_FLUSH();
1da177e4
LT		 2237
2238 adapter->tx_fifo_head = 0;
2239 atomic_set(&adapter->tx_fifo_stall, 0);
2240 netif_wake_queue(netdev);
baa34745 2241 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT		 2242 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2243 }
2244 }
2245}
2246
b548192a 2247bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2248{
2249 struct e1000_hw *hw = &adapter->hw;
2250 bool link_active = false;
be0f0719
JB		 2251
2252 /* get_link_status is set on LSC (link status) interrupt or
2253 * rx sequence error interrupt. get_link_status will stay
2254 * false until the e1000_check_for_link establishes link
2255 * for copper adapters ONLY
2256 */
2257 switch (hw->media_type) {
2258 case e1000_media_type_copper:
2259 if (hw->get_link_status) {
120a5d0d 2260 e1000_check_for_link(hw);
be0f0719
JB		 2261 link_active = !hw->get_link_status;
2262 } else {
2263 link_active = true;
2264 }
2265 break;
2266 case e1000_media_type_fiber:
120a5d0d 2267 e1000_check_for_link(hw);
be0f0719
JB		 2268 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2269 break;
2270 case e1000_media_type_internal_serdes:
120a5d0d 2271 e1000_check_for_link(hw);
be0f0719
JB		 2272 link_active = hw->serdes_has_link;
2273 break;
2274 default:
2275 break;
2276 }
2277
2278 return link_active;
2279}
2280
1da177e4
LT		 2281/**
2282 * e1000_watchdog - Timer Call-back
2283 * @data: pointer to adapter cast into an unsigned long
2284 **/
64798845 2285static void e1000_watchdog(unsigned long data)
1da177e4 2286{
e982f17c 2287 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2288 struct e1000_hw *hw = &adapter->hw;
1da177e4 2289 struct net_device *netdev = adapter->netdev;
545c67c0 2290 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2291 u32 link, tctl;
90fb5135 2292
be0f0719
JB		 2293 link = e1000_has_link(adapter);
2294 if ((netif_carrier_ok(netdev)) && link)
2295 goto link_up;
1da177e4 2296
96838a40
JB		 2297 if (link) {
2298 if (!netif_carrier_ok(netdev)) {
406874a7 2299 u32 ctrl;
c3033b01 2300 bool txb2b = true;
be0f0719 2301 /* update snapshot of PHY registers on LSC */
1dc32918 2302 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2303 &adapter->link_speed,
2304 &adapter->link_duplex);
2305
1dc32918 2306 ctrl = er32(CTRL);
675ad473
ET		 2307 pr_info("%s NIC Link is Up %d Mbps %s, "
2308 "Flow Control: %s\n",
2309 netdev->name,
2310 adapter->link_speed,
2311 adapter->link_duplex == FULL_DUPLEX ?
2312 "Full Duplex" : "Half Duplex",
2313 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2314 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2315 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2316 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2317
39ca5f03 2318 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2319 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2320 switch (adapter->link_speed) {
2321 case SPEED_10:
c3033b01 2322 txb2b = false;
be0f0719 2323 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2324 break;
2325 case SPEED_100:
c3033b01 2326 txb2b = false;
7e6c9861
JK		 2327 /* maybe add some timeout factor ? */
2328 break;
2329 }
2330
1532ecea 2331 /* enable transmits in the hardware */
1dc32918 2332 tctl = er32(TCTL);
7e6c9861 2333 tctl |= E1000_TCTL_EN;
1dc32918 2334 ew32(TCTL, tctl);
66a2b0a3 2335
1da177e4 2336 netif_carrier_on(netdev);
baa34745
JB		 2337 if (!test_bit(__E1000_DOWN, &adapter->flags))
2338 mod_timer(&adapter->phy_info_timer,
2339 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2340 adapter->smartspeed = 0;
2341 }
2342 } else {
96838a40 2343 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2344 adapter->link_speed = 0;
2345 adapter->link_duplex = 0;
675ad473
ET		 2346 pr_info("%s NIC Link is Down\n",
2347 netdev->name);
1da177e4 2348 netif_carrier_off(netdev);
baa34745
JB		 2349
2350 if (!test_bit(__E1000_DOWN, &adapter->flags))
2351 mod_timer(&adapter->phy_info_timer,
2352 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2353 }
2354
2355 e1000_smartspeed(adapter);
2356 }
2357
be0f0719 2358link_up:
1da177e4
LT		 2359 e1000_update_stats(adapter);
2360
1dc32918 2361 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2362 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2363 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2364 adapter->colc_old = adapter->stats.colc;
2365
2366 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2367 adapter->gorcl_old = adapter->stats.gorcl;
2368 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2369 adapter->gotcl_old = adapter->stats.gotcl;
2370
1dc32918 2371 e1000_update_adaptive(hw);
1da177e4 2372
f56799ea 2373 if (!netif_carrier_ok(netdev)) {
581d708e 2374 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2375 /* We've lost link, so the controller stops DMA,
2376 * but we've got queued Tx work that's never going
2377 * to get done, so reset controller to flush Tx.
2378 * (Do the reset outside of interrupt context). */
87041639
JK		 2379 adapter->tx_timeout_count++;
2380 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2381 /* return immediately since reset is imminent */
2382 return;
1da177e4
LT		 2383 }
2384 }
2385
eab2abf5
JB		 2386 /* Simple mode for Interrupt Throttle Rate (ITR) */
2387 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
2388 /*
2389 * Symmetric Tx/Rx gets a reduced ITR=2000;
2390 * Total asymmetrical Tx or Rx gets ITR=8000;
2391 * everyone else is between 2000-8000.
2392 */
2393 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2394 u32 dif = (adapter->gotcl > adapter->gorcl ?
2395 adapter->gotcl - adapter->gorcl :
2396 adapter->gorcl - adapter->gotcl) / 10000;
2397 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2398
2399 ew32(ITR, 1000000000 / (itr * 256));
2400 }
2401
1da177e4 2402 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2403 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2404
2648345f 2405 /* Force detection of hung controller every watchdog period */
c3033b01 2406 adapter->detect_tx_hung = true;
1da177e4
LT		 2407
2408 /* Reset the timer */
baa34745
JB		 2409 if (!test_bit(__E1000_DOWN, &adapter->flags))
2410 mod_timer(&adapter->watchdog_timer,
2411 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2412}
2413
835bb129
JB		 2414enum latency_range {
2415 lowest_latency = 0,
2416 low_latency = 1,
2417 bulk_latency = 2,
2418 latency_invalid = 255
2419};
2420
2421/**
2422 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2423 * @adapter: pointer to adapter
2424 * @itr_setting: current adapter->itr
2425 * @packets: the number of packets during this measurement interval
2426 * @bytes: the number of bytes during this measurement interval
2427 *
835bb129
JB		 2428 * Stores a new ITR value based on packets and byte
2429 * counts during the last interrupt. The advantage of per interrupt
2430 * computation is faster updates and more accurate ITR for the current
2431 * traffic pattern. Constants in this function were computed
2432 * based on theoretical maximum wire speed and thresholds were set based
2433 * on testing data as well as attempting to minimize response time
2434 * while increasing bulk throughput.
2435 * this functionality is controlled by the InterruptThrottleRate module
2436 * parameter (see e1000_param.c)
835bb129
JB		 2437 **/
2438static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2439 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2440{
2441 unsigned int retval = itr_setting;
2442 struct e1000_hw *hw = &adapter->hw;
2443
2444 if (unlikely(hw->mac_type < e1000_82540))
2445 goto update_itr_done;
2446
2447 if (packets == 0)
2448 goto update_itr_done;
2449
835bb129
JB		 2450 switch (itr_setting) {
2451 case lowest_latency:
2b65326e
JB		 2452 /* jumbo frames get bulk treatment*/
2453 if (bytes/packets > 8000)
2454 retval = bulk_latency;
2455 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2456 retval = low_latency;
2457 break;
2458 case low_latency: /* 50 usec aka 20000 ints/s */
2459 if (bytes > 10000) {
2b65326e
JB		 2460 /* jumbo frames need bulk latency setting */
2461 if (bytes/packets > 8000)
2462 retval = bulk_latency;
2463 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2464 retval = bulk_latency;
2465 else if ((packets > 35))
2466 retval = lowest_latency;
2b65326e
JB		 2467 } else if (bytes/packets > 2000)
2468 retval = bulk_latency;
2469 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2470 retval = lowest_latency;
2471 break;
2472 case bulk_latency: /* 250 usec aka 4000 ints/s */
2473 if (bytes > 25000) {
2474 if (packets > 35)
2475 retval = low_latency;
2b65326e
JB		 2476 } else if (bytes < 6000) {
2477 retval = low_latency;
835bb129
JB		 2478 }
2479 break;
2480 }
2481
2482update_itr_done:
2483 return retval;
2484}
2485
2486static void e1000_set_itr(struct e1000_adapter *adapter)
2487{
2488 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2489 u16 current_itr;
2490 u32 new_itr = adapter->itr;
835bb129
JB		 2491
2492 if (unlikely(hw->mac_type < e1000_82540))
2493 return;
2494
2495 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2496 if (unlikely(adapter->link_speed != SPEED_1000)) {
2497 current_itr = 0;
2498 new_itr = 4000;
2499 goto set_itr_now;
2500 }
2501
2502 adapter->tx_itr = e1000_update_itr(adapter,
2503 adapter->tx_itr,
2504 adapter->total_tx_packets,
2505 adapter->total_tx_bytes);
2b65326e
JB		 2506 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2507 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2508 adapter->tx_itr = low_latency;
2509
835bb129
JB		 2510 adapter->rx_itr = e1000_update_itr(adapter,
2511 adapter->rx_itr,
2512 adapter->total_rx_packets,
2513 adapter->total_rx_bytes);
2b65326e
JB		 2514 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2515 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2516 adapter->rx_itr = low_latency;
835bb129
JB		 2517
2518 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2519
835bb129
JB		 2520 switch (current_itr) {
2521 /* counts and packets in update_itr are dependent on these numbers */
2522 case lowest_latency:
2523 new_itr = 70000;
2524 break;
2525 case low_latency:
2526 new_itr = 20000; /* aka hwitr = ~200 */
2527 break;
2528 case bulk_latency:
2529 new_itr = 4000;
2530 break;
2531 default:
2532 break;
2533 }
2534
2535set_itr_now:
2536 if (new_itr != adapter->itr) {
2537 /* this attempts to bias the interrupt rate towards Bulk
2538 * by adding intermediate steps when interrupt rate is
2539 * increasing */
2540 new_itr = new_itr > adapter->itr ?
2541 min(adapter->itr + (new_itr >> 2), new_itr) :
2542 new_itr;
2543 adapter->itr = new_itr;
1dc32918 2544 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2545 }
835bb129
JB		 2546}
2547
1da177e4
LT		 2548#define E1000_TX_FLAGS_CSUM 0x00000001
2549#define E1000_TX_FLAGS_VLAN 0x00000002
2550#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2551#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2552#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2553#define E1000_TX_FLAGS_VLAN_SHIFT 16
2554
64798845
JP		 2555static int e1000_tso(struct e1000_adapter *adapter,
2556 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2557{
1da177e4 2558 struct e1000_context_desc *context_desc;
545c67c0 2559 struct e1000_buffer *buffer_info;
1da177e4 2560 unsigned int i;
406874a7
JP		 2561 u32 cmd_length = 0;
2562 u16 ipcse = 0, tucse, mss;
2563 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2564 int err;
2565
89114afd 2566 if (skb_is_gso(skb)) {
1da177e4
LT		 2567 if (skb_header_cloned(skb)) {
2568 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2569 if (err)
2570 return err;
2571 }
2572
ab6a5bb6 2573 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2574 mss = skb_shinfo(skb)->gso_size;
60828236 2575 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2576 struct iphdr *iph = ip_hdr(skb);
2577 iph->tot_len = 0;
2578 iph->check = 0;
aa8223c7
ACM		 2579 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2580 iph->daddr, 0,
2581 IPPROTO_TCP,
2582 0);
2d7edb92 2583 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2584 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2585 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2586 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2587 tcp_hdr(skb)->check =
0660e03f
ACM		 2588 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2589 &ipv6_hdr(skb)->daddr,
2590 0, IPPROTO_TCP, 0);
2d7edb92 2591 ipcse = 0;
2d7edb92 2592 }
bbe735e4 2593 ipcss = skb_network_offset(skb);
eddc9ec5 2594 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2595 tucss = skb_transport_offset(skb);
aa8223c7 2596 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2597 tucse = 0;
2598
2599 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2600 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2601
581d708e
MC		 2602 i = tx_ring->next_to_use;
2603 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2604 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2605
2606 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2607 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2608 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2609 context_desc->upper_setup.tcp_fields.tucss = tucss;
2610 context_desc->upper_setup.tcp_fields.tucso = tucso;
2611 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2612 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2613 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2614 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2615
545c67c0 2616 buffer_info->time_stamp = jiffies;
a9ebadd6 2617 buffer_info->next_to_watch = i;
545c67c0 2618
581d708e
MC		 2619 if (++i == tx_ring->count) i = 0;
2620 tx_ring->next_to_use = i;
1da177e4 2621
c3033b01 2622 return true;
1da177e4 2623 }
c3033b01 2624 return false;
1da177e4
LT		 2625}
2626
64798845
JP		 2627static bool e1000_tx_csum(struct e1000_adapter *adapter,
2628 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2629{
2630 struct e1000_context_desc *context_desc;
545c67c0 2631 struct e1000_buffer *buffer_info;
1da177e4 2632 unsigned int i;
406874a7 2633 u8 css;
3ed30676 2634 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2635
3ed30676
DG		 2636 if (skb->ip_summed != CHECKSUM_PARTIAL)
2637 return false;
1da177e4 2638
3ed30676 2639 switch (skb->protocol) {
09640e63 2640 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2641 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2642 cmd_len |= E1000_TXD_CMD_TCP;
2643 break;
09640e63 2644 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2645 /* XXX not handling all IPV6 headers */
2646 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2647 cmd_len |= E1000_TXD_CMD_TCP;
2648 break;
2649 default:
2650 if (unlikely(net_ratelimit()))
675ad473 2651 e_warn("checksum_partial proto=%x!\n", skb->protocol);
3ed30676
DG		 2652 break;
2653 }
1da177e4 2654
3ed30676 2655 css = skb_transport_offset(skb);
1da177e4 2656
3ed30676
DG		 2657 i = tx_ring->next_to_use;
2658 buffer_info = &tx_ring->buffer_info[i];
2659 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2660
3ed30676
DG		 2661 context_desc->lower_setup.ip_config = 0;
2662 context_desc->upper_setup.tcp_fields.tucss = css;
2663 context_desc->upper_setup.tcp_fields.tucso =
2664 css + skb->csum_offset;
2665 context_desc->upper_setup.tcp_fields.tucse = 0;
2666 context_desc->tcp_seg_setup.data = 0;
2667 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2668
3ed30676
DG		 2669 buffer_info->time_stamp = jiffies;
2670 buffer_info->next_to_watch = i;
1da177e4 2671
3ed30676
DG		 2672 if (unlikely(++i == tx_ring->count)) i = 0;
2673 tx_ring->next_to_use = i;
2674
2675 return true;
1da177e4
LT		 2676}
2677
2678#define E1000_MAX_TXD_PWR 12
2679#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2680
64798845
JP		 2681static int e1000_tx_map(struct e1000_adapter *adapter,
2682 struct e1000_tx_ring *tx_ring,
2683 struct sk_buff *skb, unsigned int first,
2684 unsigned int max_per_txd, unsigned int nr_frags,
2685 unsigned int mss)
1da177e4 2686{
1dc32918 2687 struct e1000_hw *hw = &adapter->hw;
602c0554 2688 struct pci_dev *pdev = adapter->pdev;
37e73df8 2689 struct e1000_buffer *buffer_info;
d20b606c 2690 unsigned int len = skb_headlen(skb);
602c0554 2691 unsigned int offset = 0, size, count = 0, i;
1da177e4 2692 unsigned int f;
1da177e4
LT		 2693
2694 i = tx_ring->next_to_use;
2695
96838a40 2696 while (len) {
37e73df8 2697 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2698 size = min(len, max_per_txd);
fd803241
JK		 2699 /* Workaround for Controller erratum --
2700 * descriptor for non-tso packet in a linear SKB that follows a
2701 * tso gets written back prematurely before the data is fully
0f15a8fa 2702 * DMA'd to the controller */
fd803241 2703 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2704 !skb_is_gso(skb)) {
fd803241
JK		 2705 tx_ring->last_tx_tso = 0;
2706 size -= 4;
2707 }
2708
1da177e4
LT		 2709 /* Workaround for premature desc write-backs
2710 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2711 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2712 size -= 4;
97338bde
MC		 2713 /* work-around for errata 10 and it applies
2714 * to all controllers in PCI-X mode
2715 * The fix is to make sure that the first descriptor of a
2716 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2717 */
1dc32918 2718 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2719 (size > 2015) && count == 0))
2720 size = 2015;
96838a40 2721
1da177e4
LT		 2722 /* Workaround for potential 82544 hang in PCI-X. Avoid
2723 * terminating buffers within evenly-aligned dwords. */
96838a40 2724 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2725 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2726 size > 4))
2727 size -= 4;
2728
2729 buffer_info->length = size;
cdd7549e 2730 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2731 buffer_info->time_stamp = jiffies;
602c0554 2732 buffer_info->mapped_as_page = false;
b16f53be
NN		 2733 buffer_info->dma = dma_map_single(&pdev->dev,
2734 skb->data + offset,
2735 size, DMA_TO_DEVICE);
2736 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2737 goto dma_error;
a9ebadd6 2738 buffer_info->next_to_watch = i;
1da177e4
LT		 2739
2740 len -= size;
2741 offset += size;
2742 count++;
37e73df8
AD		 2743 if (len) {
2744 i++;
2745 if (unlikely(i == tx_ring->count))
2746 i = 0;
2747 }
1da177e4
LT		 2748 }
2749
96838a40 2750 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2751 struct skb_frag_struct *frag;
2752
2753 frag = &skb_shinfo(skb)->frags[f];
2754 len = frag->size;
602c0554 2755 offset = frag->page_offset;
1da177e4 2756
96838a40 2757 while (len) {
37e73df8
AD		 2758 i++;
2759 if (unlikely(i == tx_ring->count))
2760 i = 0;
2761
1da177e4
LT		 2762 buffer_info = &tx_ring->buffer_info[i];
2763 size = min(len, max_per_txd);
1da177e4
LT		 2764 /* Workaround for premature desc write-backs
2765 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2766 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2767 size -= 4;
1da177e4
LT		 2768 /* Workaround for potential 82544 hang in PCI-X.
2769 * Avoid terminating buffers within evenly-aligned
2770 * dwords. */
96838a40 2771 if (unlikely(adapter->pcix_82544 &&
8fce4731
JB		 2772 !((unsigned long)(page_to_phys(frag->page) + offset
2773 + size - 1) & 4) &&
2774 size > 4))
1da177e4
LT		 2775 size -= 4;
2776
2777 buffer_info->length = size;
1da177e4 2778 buffer_info->time_stamp = jiffies;
602c0554 2779 buffer_info->mapped_as_page = true;
b16f53be 2780 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
602c0554 2781 offset, size,
b16f53be
NN		 2782 DMA_TO_DEVICE);
2783 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2784 goto dma_error;
a9ebadd6 2785 buffer_info->next_to_watch = i;
1da177e4
LT		 2786
2787 len -= size;
2788 offset += size;
2789 count++;
1da177e4
LT		 2790 }
2791 }
2792
1da177e4
LT		 2793 tx_ring->buffer_info[i].skb = skb;
2794 tx_ring->buffer_info[first].next_to_watch = i;
2795
2796 return count;
602c0554
AD		 2797
2798dma_error:
2799 dev_err(&pdev->dev, "TX DMA map failed\n");
2800 buffer_info->dma = 0;
c1fa347f 2801 if (count)
602c0554 2802 count--;
c1fa347f
RK		 2803
2804 while (count--) {
2805 if (i==0)
602c0554 2806 i += tx_ring->count;
c1fa347f 2807 i--;
602c0554
AD		 2808 buffer_info = &tx_ring->buffer_info[i];
2809 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2810 }
2811
2812 return 0;
1da177e4
LT		 2813}
2814
64798845
JP		 2815static void e1000_tx_queue(struct e1000_adapter *adapter,
2816 struct e1000_tx_ring *tx_ring, int tx_flags,
2817 int count)
1da177e4 2818{
1dc32918 2819 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2820 struct e1000_tx_desc *tx_desc = NULL;
2821 struct e1000_buffer *buffer_info;
406874a7 2822 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2823 unsigned int i;
2824
96838a40 2825 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2826 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2827 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2828 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2829
96838a40 2830 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2831 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2832 }
2833
96838a40 2834 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2835 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2836 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2837 }
2838
96838a40 2839 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2840 txd_lower |= E1000_TXD_CMD_VLE;
2841 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2842 }
2843
2844 i = tx_ring->next_to_use;
2845
96838a40 2846 while (count--) {
1da177e4
LT		 2847 buffer_info = &tx_ring->buffer_info[i];
2848 tx_desc = E1000_TX_DESC(*tx_ring, i);
2849 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2850 tx_desc->lower.data =
2851 cpu_to_le32(txd_lower | buffer_info->length);
2852 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2853 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2854 }
2855
2856 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2857
2858 /* Force memory writes to complete before letting h/w
2859 * know there are new descriptors to fetch. (Only
2860 * applicable for weak-ordered memory model archs,
2861 * such as IA-64). */
2862 wmb();
2863
2864 tx_ring->next_to_use = i;
1dc32918 2865 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 2866 /* we need this if more than one processor can write to our tail
2867 * at a time, it syncronizes IO on IA64/Altix systems */
2868 mmiowb();
1da177e4
LT		 2869}
2870
2871/**
2872 * 82547 workaround to avoid controller hang in half-duplex environment.
2873 * The workaround is to avoid queuing a large packet that would span
2874 * the internal Tx FIFO ring boundary by notifying the stack to resend
2875 * the packet at a later time. This gives the Tx FIFO an opportunity to
2876 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2877 * to the beginning of the Tx FIFO.
2878 **/
2879
2880#define E1000_FIFO_HDR 0x10
2881#define E1000_82547_PAD_LEN 0x3E0
2882
64798845
JP		 2883static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
2884 struct sk_buff *skb)
1da177e4 2885{
406874a7
JP		 2886 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2887 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 2888
9099cfb9 2889 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 2890
96838a40 2891 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2892 goto no_fifo_stall_required;
2893
96838a40 2894 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2895 return 1;
2896
96838a40 2897 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2898 atomic_set(&adapter->tx_fifo_stall, 1);
2899 return 1;
2900 }
2901
2902no_fifo_stall_required:
2903 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2904 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2905 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2906 return 0;
2907}
2908
65c7973f
JB		 2909static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2910{
2911 struct e1000_adapter *adapter = netdev_priv(netdev);
2912 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2913
2914 netif_stop_queue(netdev);
2915 /* Herbert's original patch had:
2916 * smp_mb__after_netif_stop_queue();
2917 * but since that doesn't exist yet, just open code it. */
2918 smp_mb();
2919
2920 /* We need to check again in a case another CPU has just
2921 * made room available. */
2922 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2923 return -EBUSY;
2924
2925 /* A reprieve! */
2926 netif_start_queue(netdev);
fcfb1224 2927 ++adapter->restart_queue;
65c7973f
JB		 2928 return 0;
2929}
2930
2931static int e1000_maybe_stop_tx(struct net_device *netdev,
2932 struct e1000_tx_ring *tx_ring, int size)
2933{
2934 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2935 return 0;
2936 return __e1000_maybe_stop_tx(netdev, size);
2937}
2938
1da177e4 2939#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 2940static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
2941 struct net_device *netdev)
1da177e4 2942{
60490fe0 2943 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2944 struct e1000_hw *hw = &adapter->hw;
581d708e 2945 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2946 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2947 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2948 unsigned int tx_flags = 0;
e743d313 2949 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 2950 unsigned int nr_frags;
2951 unsigned int mss;
1da177e4 2952 int count = 0;
76c224bc 2953 int tso;
1da177e4 2954 unsigned int f;
1da177e4 2955
65c7973f
JB		 2956 /* This goes back to the question of how to logically map a tx queue
2957 * to a flow. Right now, performance is impacted slightly negatively
2958 * if using multiple tx queues. If the stack breaks away from a
2959 * single qdisc implementation, we can look at this again. */
581d708e 2960 tx_ring = adapter->tx_ring;
24025e4e 2961
581d708e 2962 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2963 dev_kfree_skb_any(skb);
2964 return NETDEV_TX_OK;
2965 }
2966
7967168c 2967 mss = skb_shinfo(skb)->gso_size;
76c224bc 2968 /* The controller does a simple calculation to
1da177e4
LT		 2969 * make sure there is enough room in the FIFO before
2970 * initiating the DMA for each buffer. The calc is:
2971 * 4 = ceil(buffer len/mss). To make sure we don't
2972 * overrun the FIFO, adjust the max buffer len if mss
2973 * drops. */
96838a40 2974 if (mss) {
406874a7 2975 u8 hdr_len;
1da177e4
LT		 2976 max_per_txd = min(mss << 2, max_per_txd);
2977 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2978
ab6a5bb6 2979 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 2980 if (skb->data_len && hdr_len == len) {
1dc32918 2981 switch (hw->mac_type) {
9f687888 2982 unsigned int pull_size;
683a2aa3
HX		 2983 case e1000_82544:
2984 /* Make sure we have room to chop off 4 bytes,
2985 * and that the end alignment will work out to
2986 * this hardware's requirements
2987 * NOTE: this is a TSO only workaround
2988 * if end byte alignment not correct move us
2989 * into the next dword */
27a884dc 2990 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 2991 break;
2992 /* fall through */
9f687888
JK		 2993 pull_size = min((unsigned int)4, skb->data_len);
2994 if (!__pskb_pull_tail(skb, pull_size)) {
675ad473 2995 e_err("__pskb_pull_tail failed.\n");
9f687888 2996 dev_kfree_skb_any(skb);
749dfc70 2997 return NETDEV_TX_OK;
9f687888 2998 }
e743d313 2999 len = skb_headlen(skb);
9f687888
JK		 3000 break;
3001 default:
3002 /* do nothing */
3003 break;
d74bbd3b 3004 }
9a3056da 3005 }
1da177e4
LT		 3006 }
3007
9a3056da 3008 /* reserve a descriptor for the offload context */
84fa7933 3009 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3010 count++;
2648345f 3011 count++;
fd803241 3012
fd803241 3013 /* Controller Erratum workaround */
89114afd 3014 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3015 count++;
fd803241 3016
1da177e4
LT		 3017 count += TXD_USE_COUNT(len, max_txd_pwr);
3018
96838a40 3019 if (adapter->pcix_82544)
1da177e4
LT		 3020 count++;
3021
96838a40 3022 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3023 * in PCI-X mode, so add one more descriptor to the count
3024 */
1dc32918 3025 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3026 (len > 2015)))
3027 count++;
3028
1da177e4 3029 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3030 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3031 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3032 max_txd_pwr);
96838a40 3033 if (adapter->pcix_82544)
1da177e4
LT		 3034 count += nr_frags;
3035
1da177e4
LT		 3036 /* need: count + 2 desc gap to keep tail from touching
3037 * head, otherwise try next time */
8017943e 3038 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3039 return NETDEV_TX_BUSY;
1da177e4 3040
1dc32918 3041 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3042 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3043 netif_stop_queue(netdev);
baa34745
JB		 3044 if (!test_bit(__E1000_DOWN, &adapter->flags))
3045 mod_timer(&adapter->tx_fifo_stall_timer,
3046 jiffies + 1);
1da177e4
LT		 3047 return NETDEV_TX_BUSY;
3048 }
3049 }
3050
96838a40 3051 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3052 tx_flags |= E1000_TX_FLAGS_VLAN;
3053 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3054 }
3055
581d708e 3056 first = tx_ring->next_to_use;
96838a40 3057
581d708e 3058 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3059 if (tso < 0) {
3060 dev_kfree_skb_any(skb);
3061 return NETDEV_TX_OK;
3062 }
3063
fd803241 3064 if (likely(tso)) {
8fce4731
JB		 3065 if (likely(hw->mac_type != e1000_82544))
3066 tx_ring->last_tx_tso = 1;
1da177e4 3067 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3068 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3069 tx_flags |= E1000_TX_FLAGS_CSUM;
3070
60828236 3071 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3072 tx_flags |= E1000_TX_FLAGS_IPV4;
3073
37e73df8
AD		 3074 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3075 nr_frags, mss);
1da177e4 3076
37e73df8
AD		 3077 if (count) {
3078 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3079 /* Make sure there is space in the ring for the next send. */
3080 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3081
37e73df8
AD		 3082 } else {
3083 dev_kfree_skb_any(skb);
3084 tx_ring->buffer_info[first].time_stamp = 0;
3085 tx_ring->next_to_use = first;
3086 }
1da177e4 3087
1da177e4
LT		 3088 return NETDEV_TX_OK;
3089}
3090
3091/**
3092 * e1000_tx_timeout - Respond to a Tx Hang
3093 * @netdev: network interface device structure
3094 **/
3095
64798845 3096static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3097{
60490fe0 3098 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3099
3100 /* Do the reset outside of interrupt context */
87041639
JK		 3101 adapter->tx_timeout_count++;
3102 schedule_work(&adapter->reset_task);
1da177e4
LT		 3103}
3104
64798845 3105static void e1000_reset_task(struct work_struct *work)
1da177e4 3106{
65f27f38
DH		 3107 struct e1000_adapter *adapter =
3108 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3109
2db10a08 3110 e1000_reinit_locked(adapter);
1da177e4
LT		 3111}
3112
3113/**
3114 * e1000_get_stats - Get System Network Statistics
3115 * @netdev: network interface device structure
3116 *
3117 * Returns the address of the device statistics structure.
3118 * The statistics are actually updated from the timer callback.
3119 **/
3120
64798845 3121static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3122{
6b7660cd 3123 /* only return the current stats */
5fe31def 3124 return &netdev->stats;
1da177e4
LT		 3125}
3126
3127/**
3128 * e1000_change_mtu - Change the Maximum Transfer Unit
3129 * @netdev: network interface device structure
3130 * @new_mtu: new value for maximum frame size
3131 *
3132 * Returns 0 on success, negative on failure
3133 **/
3134
64798845 3135static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3136{
60490fe0 3137 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3138 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3139 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3140
96838a40
JB		 3141 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3142 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
675ad473 3143 e_err("Invalid MTU setting\n");
1da177e4 3144 return -EINVAL;
2d7edb92 3145 }
1da177e4 3146
997f5cbd 3147 /* Adapter-specific max frame size limits. */
1dc32918 3148 switch (hw->mac_type) {
9e2feace 3149 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3150 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
675ad473 3151 e_err("Jumbo Frames not supported.\n");
2d7edb92 3152 return -EINVAL;
2d7edb92 3153 }
997f5cbd 3154 break;
997f5cbd
JK		 3155 default:
3156 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3157 break;
1da177e4
LT		 3158 }
3159
3d6114e7
JB		 3160 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3161 msleep(1);
3162 /* e1000_down has a dependency on max_frame_size */
3163 hw->max_frame_size = max_frame;
3164 if (netif_running(netdev))
3165 e1000_down(adapter);
3166
87f5032e 3167 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3168 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3169 * larger slab size.
3170 * i.e. RXBUFFER_2048 --> size-4096 slab
3171 * however with the new *_jumbo_rx* routines, jumbo receives will use
3172 * fragmented skbs */
9e2feace 3173
9926146b 3174 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3175 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3176 else
3177#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3178 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3179#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3180 adapter->rx_buffer_len = PAGE_SIZE;
3181#endif
9e2feace
AK		 3182
3183 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3184 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3185 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3186 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3187 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3188
675ad473
ET		 3189 pr_info("%s changing MTU from %d to %d\n",
3190 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3191 netdev->mtu = new_mtu;
3192
2db10a08 3193 if (netif_running(netdev))
3d6114e7
JB		 3194 e1000_up(adapter);
3195 else
3196 e1000_reset(adapter);
3197
3198 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3199
1da177e4
LT		 3200 return 0;
3201}
3202
3203/**
3204 * e1000_update_stats - Update the board statistics counters
3205 * @adapter: board private structure
3206 **/
3207
64798845 3208void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3209{
5fe31def 3210 struct net_device *netdev = adapter->netdev;
1da177e4 3211 struct e1000_hw *hw = &adapter->hw;
282f33c9 3212 struct pci_dev *pdev = adapter->pdev;
1da177e4 3213 unsigned long flags;
406874a7 3214 u16 phy_tmp;
1da177e4
LT		 3215
3216#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3217
282f33c9
LV		 3218 /*
3219 * Prevent stats update while adapter is being reset, or if the pci
3220 * connection is down.
3221 */
9026729b 3222 if (adapter->link_speed == 0)
282f33c9 3223 return;
81b1955e 3224 if (pci_channel_offline(pdev))
9026729b
AK		 3225 return;
3226
1da177e4
LT		 3227 spin_lock_irqsave(&adapter->stats_lock, flags);
3228
828d055f 3229 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3230 * called from the interrupt context, so they must only
3231 * be written while holding adapter->stats_lock
3232 */
3233
1dc32918
JP		 3234 adapter->stats.crcerrs += er32(CRCERRS);
3235 adapter->stats.gprc += er32(GPRC);
3236 adapter->stats.gorcl += er32(GORCL);
3237 adapter->stats.gorch += er32(GORCH);
3238 adapter->stats.bprc += er32(BPRC);
3239 adapter->stats.mprc += er32(MPRC);
3240 adapter->stats.roc += er32(ROC);
3241
1532ecea
JB		 3242 adapter->stats.prc64 += er32(PRC64);
3243 adapter->stats.prc127 += er32(PRC127);
3244 adapter->stats.prc255 += er32(PRC255);
3245 adapter->stats.prc511 += er32(PRC511);
3246 adapter->stats.prc1023 += er32(PRC1023);
3247 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3248
3249 adapter->stats.symerrs += er32(SYMERRS);
3250 adapter->stats.mpc += er32(MPC);
3251 adapter->stats.scc += er32(SCC);
3252 adapter->stats.ecol += er32(ECOL);
3253 adapter->stats.mcc += er32(MCC);
3254 adapter->stats.latecol += er32(LATECOL);
3255 adapter->stats.dc += er32(DC);
3256 adapter->stats.sec += er32(SEC);
3257 adapter->stats.rlec += er32(RLEC);
3258 adapter->stats.xonrxc += er32(XONRXC);
3259 adapter->stats.xontxc += er32(XONTXC);
3260 adapter->stats.xoffrxc += er32(XOFFRXC);
3261 adapter->stats.xofftxc += er32(XOFFTXC);
3262 adapter->stats.fcruc += er32(FCRUC);
3263 adapter->stats.gptc += er32(GPTC);
3264 adapter->stats.gotcl += er32(GOTCL);
3265 adapter->stats.gotch += er32(GOTCH);
3266 adapter->stats.rnbc += er32(RNBC);
3267 adapter->stats.ruc += er32(RUC);
3268 adapter->stats.rfc += er32(RFC);
3269 adapter->stats.rjc += er32(RJC);
3270 adapter->stats.torl += er32(TORL);
3271 adapter->stats.torh += er32(TORH);
3272 adapter->stats.totl += er32(TOTL);
3273 adapter->stats.toth += er32(TOTH);
3274 adapter->stats.tpr += er32(TPR);
3275
1532ecea
JB		 3276 adapter->stats.ptc64 += er32(PTC64);
3277 adapter->stats.ptc127 += er32(PTC127);
3278 adapter->stats.ptc255 += er32(PTC255);
3279 adapter->stats.ptc511 += er32(PTC511);
3280 adapter->stats.ptc1023 += er32(PTC1023);
3281 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3282
3283 adapter->stats.mptc += er32(MPTC);
3284 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3285
3286 /* used for adaptive IFS */
3287
1dc32918 3288 hw->tx_packet_delta = er32(TPT);
1da177e4 3289 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3290 hw->collision_delta = er32(COLC);
1da177e4
LT		 3291 adapter->stats.colc += hw->collision_delta;
3292
96838a40 3293 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3294 adapter->stats.algnerrc += er32(ALGNERRC);
3295 adapter->stats.rxerrc += er32(RXERRC);
3296 adapter->stats.tncrs += er32(TNCRS);
3297 adapter->stats.cexterr += er32(CEXTERR);
3298 adapter->stats.tsctc += er32(TSCTC);
3299 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3300 }
3301
3302 /* Fill out the OS statistics structure */
5fe31def
AK		 3303 netdev->stats.multicast = adapter->stats.mprc;
3304 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3305
3306 /* Rx Errors */
3307
87041639
JK		 3308 /* RLEC on some newer hardware can be incorrect so build
3309 * our own version based on RUC and ROC */
5fe31def 3310 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3311 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3312 adapter->stats.ruc + adapter->stats.roc +
3313 adapter->stats.cexterr;
49559854 3314 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3315 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3316 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3317 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3318 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3319
3320 /* Tx Errors */
49559854 3321 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3322 netdev->stats.tx_errors = adapter->stats.txerrc;
3323 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3324 netdev->stats.tx_window_errors = adapter->stats.latecol;
3325 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3326 if (hw->bad_tx_carr_stats_fd &&
167fb284 3327 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3328 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3329 adapter->stats.tncrs = 0;
3330 }
1da177e4
LT		 3331
3332 /* Tx Dropped needs to be maintained elsewhere */
3333
3334 /* Phy Stats */
96838a40
JB		 3335 if (hw->media_type == e1000_media_type_copper) {
3336 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3337 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3338 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3339 adapter->phy_stats.idle_errors += phy_tmp;
3340 }
3341
96838a40 3342 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3343 (hw->phy_type == e1000_phy_m88) &&
3344 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3345 adapter->phy_stats.receive_errors += phy_tmp;
3346 }
3347
15e376b4 3348 /* Management Stats */
1dc32918
JP		 3349 if (hw->has_smbus) {
3350 adapter->stats.mgptc += er32(MGTPTC);
3351 adapter->stats.mgprc += er32(MGTPRC);
3352 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3353 }
3354
1da177e4
LT		 3355 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3356}
9ac98284 3357
1da177e4
LT		 3358/**
3359 * e1000_intr - Interrupt Handler
3360 * @irq: interrupt number
3361 * @data: pointer to a network interface device structure
1da177e4
LT		 3362 **/
3363
64798845 3364static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3365{
3366 struct net_device *netdev = data;
60490fe0 3367 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3368 struct e1000_hw *hw = &adapter->hw;
1532ecea 3369 u32 icr = er32(ICR);
c3570acb 3370
e151a60a 3371 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3372 return IRQ_NONE; /* Not our interrupt */
3373
96838a40 3374 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3375 hw->get_link_status = 1;
1314bbf3
AK		 3376 /* guard against interrupt when we're going down */
3377 if (!test_bit(__E1000_DOWN, &adapter->flags))
3378 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3379 }
3380
1532ecea
JB		 3381 /* disable interrupts, without the synchronize_irq bit */
3382 ew32(IMC, ~0);
3383 E1000_WRITE_FLUSH();
3384
288379f0 3385 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3386 adapter->total_tx_bytes = 0;
3387 adapter->total_tx_packets = 0;
3388 adapter->total_rx_bytes = 0;
3389 adapter->total_rx_packets = 0;
288379f0 3390 __napi_schedule(&adapter->napi);
a6c42322 3391 } else {
90fb5135
AK		 3392 /* this really should not happen! if it does it is basically a
3393 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3394 if (!test_bit(__E1000_DOWN, &adapter->flags))
3395 e1000_irq_enable(adapter);
3396 }
1da177e4 3397
1da177e4
LT		 3398 return IRQ_HANDLED;
3399}
3400
1da177e4
LT		 3401/**
3402 * e1000_clean - NAPI Rx polling callback
3403 * @adapter: board private structure
3404 **/
64798845 3405static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3406{
bea3348e 3407 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3408 int tx_clean_complete = 0, work_done = 0;
581d708e 3409
650b5a5c 3410 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3411
650b5a5c 3412 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3413
650b5a5c 3414 if (!tx_clean_complete)
d2c7ddd6
DM		 3415 work_done = budget;
3416
53e52c72
DM		 3417 /* If budget not fully consumed, exit the polling mode */
3418 if (work_done < budget) {
835bb129
JB		 3419 if (likely(adapter->itr_setting & 3))
3420 e1000_set_itr(adapter);
288379f0 3421 napi_complete(napi);
a6c42322
JB		 3422 if (!test_bit(__E1000_DOWN, &adapter->flags))
3423 e1000_irq_enable(adapter);
1da177e4
LT		 3424 }
3425
bea3348e 3426 return work_done;
1da177e4
LT		 3427}
3428
1da177e4
LT		 3429/**
3430 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3431 * @adapter: board private structure
3432 **/
64798845
JP		 3433static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3434 struct e1000_tx_ring *tx_ring)
1da177e4 3435{
1dc32918 3436 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3437 struct net_device *netdev = adapter->netdev;
3438 struct e1000_tx_desc *tx_desc, *eop_desc;
3439 struct e1000_buffer *buffer_info;
3440 unsigned int i, eop;
2a1af5d7 3441 unsigned int count = 0;
835bb129 3442 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3443
3444 i = tx_ring->next_to_clean;
3445 eop = tx_ring->buffer_info[i].next_to_watch;
3446 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3447
ccfb342c
AD		 3448 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3449 (count < tx_ring->count)) {
843f4267
JB		 3450 bool cleaned = false;
3451 for ( ; !cleaned; count++) {
1da177e4
LT		 3452 tx_desc = E1000_TX_DESC(*tx_ring, i);
3453 buffer_info = &tx_ring->buffer_info[i];
3454 cleaned = (i == eop);
3455
835bb129 3456 if (cleaned) {
2b65326e 3457 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3458 unsigned int segs, bytecount;
3459 segs = skb_shinfo(skb)->gso_segs ?: 1;
3460 /* multiply data chunks by size of headers */
3461 bytecount = ((segs - 1) * skb_headlen(skb)) +
3462 skb->len;
2b65326e 3463 total_tx_packets += segs;
7753b171 3464 total_tx_bytes += bytecount;
835bb129 3465 }
fd803241 3466 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3467 tx_desc->upper.data = 0;
1da177e4 3468
96838a40 3469 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3470 }
581d708e 3471
1da177e4
LT		 3472 eop = tx_ring->buffer_info[i].next_to_watch;
3473 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3474 }
3475
3476 tx_ring->next_to_clean = i;
3477
77b2aad5 3478#define TX_WAKE_THRESHOLD 32
843f4267 3479 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3480 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3481 /* Make sure that anybody stopping the queue after this
3482 * sees the new next_to_clean.
3483 */
3484 smp_mb();
cdd7549e
JB		 3485
3486 if (netif_queue_stopped(netdev) &&
3487 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3488 netif_wake_queue(netdev);
fcfb1224
JB		 3489 ++adapter->restart_queue;
3490 }
77b2aad5 3491 }
2648345f 3492
581d708e 3493 if (adapter->detect_tx_hung) {
2648345f 3494 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3495 * check with the clearing of time_stamp and movement of i */
c3033b01 3496 adapter->detect_tx_hung = false;
cdd7549e
JB		 3497 if (tx_ring->buffer_info[eop].time_stamp &&
3498 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP		 3499 (adapter->tx_timeout_factor * HZ)) &&
3500 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3501
3502 /* detected Tx unit hang */
675ad473
ET		 3503 e_err("Detected Tx Unit Hang\n"
3504 " Tx Queue <%lu>\n"
3505 " TDH <%x>\n"
3506 " TDT <%x>\n"
3507 " next_to_use <%x>\n"
3508 " next_to_clean <%x>\n"
3509 "buffer_info[next_to_clean]\n"
3510 " time_stamp <%lx>\n"
3511 " next_to_watch <%x>\n"
3512 " jiffies <%lx>\n"
3513 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3514 (unsigned long)((tx_ring - adapter->tx_ring) /
3515 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3516 readl(hw->hw_addr + tx_ring->tdh),
3517 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3518 tx_ring->next_to_use,
392137fa 3519 tx_ring->next_to_clean,
cdd7549e 3520 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3521 eop,
3522 jiffies,
3523 eop_desc->upper.fields.status);
1da177e4 3524 netif_stop_queue(netdev);
70b8f1e1 3525 }
1da177e4 3526 }
835bb129
JB		 3527 adapter->total_tx_bytes += total_tx_bytes;
3528 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3529 netdev->stats.tx_bytes += total_tx_bytes;
3530 netdev->stats.tx_packets += total_tx_packets;
ccfb342c 3531 return (count < tx_ring->count);
1da177e4
LT		 3532}
3533
3534/**
3535 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3536 * @adapter: board private structure
3537 * @status_err: receive descriptor status and error fields
3538 * @csum: receive descriptor csum field
3539 * @sk_buff: socket buffer with received data
1da177e4
LT		 3540 **/
3541
64798845
JP		 3542static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3543 u32 csum, struct sk_buff *skb)
1da177e4 3544{
1dc32918 3545 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3546 u16 status = (u16)status_err;
3547 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3548 skb->ip_summed = CHECKSUM_NONE;
3549
1da177e4 3550 /* 82543 or newer only */
1dc32918 3551 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3552 /* Ignore Checksum bit is set */
96838a40 3553 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3554 /* TCP/UDP checksum error bit is set */
96838a40 3555 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3556 /* let the stack verify checksum errors */
1da177e4 3557 adapter->hw_csum_err++;
2d7edb92
MC		 3558 return;
3559 }
3560 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3561 if (!(status & E1000_RXD_STAT_TCPCS))
3562 return;
3563
2d7edb92
MC		 3564 /* It must be a TCP or UDP packet with a valid checksum */
3565 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3566 /* TCP checksum is good */
3567 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3568 }
2d7edb92 3569 adapter->hw_csum_good++;
1da177e4
LT		 3570}
3571
edbbb3ca
JB		 3572/**
3573 * e1000_consume_page - helper function
3574 **/
3575static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3576 u16 length)
3577{
3578 bi->page = NULL;
3579 skb->len += length;
3580 skb->data_len += length;
3581 skb->truesize += length;
3582}
3583
3584/**
3585 * e1000_receive_skb - helper function to handle rx indications
3586 * @adapter: board private structure
3587 * @status: descriptor status field as written by hardware
3588 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3589 * @skb: pointer to sk_buff to be indicated to stack
3590 */
3591static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3592 __le16 vlan, struct sk_buff *skb)
3593{
3594 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
3595 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3596 le16_to_cpu(vlan) &
3597 E1000_RXD_SPC_VLAN_MASK);
3598 } else {
3599 netif_receive_skb(skb);
3600 }
3601}
3602
3603/**
3604 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3605 * @adapter: board private structure
3606 * @rx_ring: ring to clean
3607 * @work_done: amount of napi work completed this call
3608 * @work_to_do: max amount of work allowed for this call to do
3609 *
3610 * the return value indicates whether actual cleaning was done, there
3611 * is no guarantee that everything was cleaned
3612 */
3613static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3614 struct e1000_rx_ring *rx_ring,
3615 int *work_done, int work_to_do)
3616{
3617 struct e1000_hw *hw = &adapter->hw;
3618 struct net_device *netdev = adapter->netdev;
3619 struct pci_dev *pdev = adapter->pdev;
3620 struct e1000_rx_desc *rx_desc, *next_rxd;
3621 struct e1000_buffer *buffer_info, *next_buffer;
3622 unsigned long irq_flags;
3623 u32 length;
3624 unsigned int i;
3625 int cleaned_count = 0;
3626 bool cleaned = false;
3627 unsigned int total_rx_bytes=0, total_rx_packets=0;
3628
3629 i = rx_ring->next_to_clean;
3630 rx_desc = E1000_RX_DESC(*rx_ring, i);
3631 buffer_info = &rx_ring->buffer_info[i];
3632
3633 while (rx_desc->status & E1000_RXD_STAT_DD) {
3634 struct sk_buff *skb;
3635 u8 status;
3636
3637 if (*work_done >= work_to_do)
3638 break;
3639 (*work_done)++;
3640
3641 status = rx_desc->status;
3642 skb = buffer_info->skb;
3643 buffer_info->skb = NULL;
3644
3645 if (++i == rx_ring->count) i = 0;
3646 next_rxd = E1000_RX_DESC(*rx_ring, i);
3647 prefetch(next_rxd);
3648
3649 next_buffer = &rx_ring->buffer_info[i];
3650
3651 cleaned = true;
3652 cleaned_count++;
b16f53be
NN		 3653 dma_unmap_page(&pdev->dev, buffer_info->dma,
3654 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB		 3655 buffer_info->dma = 0;
3656
3657 length = le16_to_cpu(rx_desc->length);
3658
3659 /* errors is only valid for DD + EOP descriptors */
3660 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3661 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3662 u8 last_byte = *(skb->data + length - 1);
3663 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3664 last_byte)) {
3665 spin_lock_irqsave(&adapter->stats_lock,
3666 irq_flags);
3667 e1000_tbi_adjust_stats(hw, &adapter->stats,
3668 length, skb->data);
3669 spin_unlock_irqrestore(&adapter->stats_lock,
3670 irq_flags);
3671 length--;
3672 } else {
3673 /* recycle both page and skb */
3674 buffer_info->skb = skb;
3675 /* an error means any chain goes out the window
3676 * too */
3677 if (rx_ring->rx_skb_top)
3678 dev_kfree_skb(rx_ring->rx_skb_top);
3679 rx_ring->rx_skb_top = NULL;
3680 goto next_desc;
3681 }
3682 }
3683
3684#define rxtop rx_ring->rx_skb_top
3685 if (!(status & E1000_RXD_STAT_EOP)) {
3686 /* this descriptor is only the beginning (or middle) */
3687 if (!rxtop) {
3688 /* this is the beginning of a chain */
3689 rxtop = skb;
3690 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3691 0, length);
3692 } else {
3693 /* this is the middle of a chain */
3694 skb_fill_page_desc(rxtop,
3695 skb_shinfo(rxtop)->nr_frags,
3696 buffer_info->page, 0, length);
3697 /* re-use the skb, only consumed the page */
3698 buffer_info->skb = skb;
3699 }
3700 e1000_consume_page(buffer_info, rxtop, length);
3701 goto next_desc;
3702 } else {
3703 if (rxtop) {
3704 /* end of the chain */
3705 skb_fill_page_desc(rxtop,
3706 skb_shinfo(rxtop)->nr_frags,
3707 buffer_info->page, 0, length);
3708 /* re-use the current skb, we only consumed the
3709 * page */
3710 buffer_info->skb = skb;
3711 skb = rxtop;
3712 rxtop = NULL;
3713 e1000_consume_page(buffer_info, skb, length);
3714 } else {
3715 /* no chain, got EOP, this buf is the packet
3716 * copybreak to save the put_page/alloc_page */
3717 if (length <= copybreak &&
3718 skb_tailroom(skb) >= length) {
3719 u8 *vaddr;
3720 vaddr = kmap_atomic(buffer_info->page,
3721 KM_SKB_DATA_SOFTIRQ);
3722 memcpy(skb_tail_pointer(skb), vaddr, length);
3723 kunmap_atomic(vaddr,
3724 KM_SKB_DATA_SOFTIRQ);
3725 /* re-use the page, so don't erase
3726 * buffer_info->page */
3727 skb_put(skb, length);
3728 } else {
3729 skb_fill_page_desc(skb, 0,
3730 buffer_info->page, 0,
3731 length);
3732 e1000_consume_page(buffer_info, skb,
3733 length);
3734 }
3735 }
3736 }
3737
3738 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3739 e1000_rx_checksum(adapter,
3740 (u32)(status) |
3741 ((u32)(rx_desc->errors) << 24),
3742 le16_to_cpu(rx_desc->csum), skb);
3743
3744 pskb_trim(skb, skb->len - 4);
3745
3746 /* probably a little skewed due to removing CRC */
3747 total_rx_bytes += skb->len;
3748 total_rx_packets++;
3749
3750 /* eth type trans needs skb->data to point to something */
3751 if (!pskb_may_pull(skb, ETH_HLEN)) {
675ad473 3752 e_err("pskb_may_pull failed.\n");
edbbb3ca
JB		 3753 dev_kfree_skb(skb);
3754 goto next_desc;
3755 }
3756
3757 skb->protocol = eth_type_trans(skb, netdev);
3758
3759 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3760
3761next_desc:
3762 rx_desc->status = 0;
3763
3764 /* return some buffers to hardware, one at a time is too slow */
3765 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3766 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3767 cleaned_count = 0;
3768 }
3769
3770 /* use prefetched values */
3771 rx_desc = next_rxd;
3772 buffer_info = next_buffer;
3773 }
3774 rx_ring->next_to_clean = i;
3775
3776 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3777 if (cleaned_count)
3778 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3779
3780 adapter->total_rx_packets += total_rx_packets;
3781 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3782 netdev->stats.rx_bytes += total_rx_bytes;
3783 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 3784 return cleaned;
3785}
3786
57bf6eef
JP		 3787/*
3788 * this should improve performance for small packets with large amounts
3789 * of reassembly being done in the stack
3790 */
3791static void e1000_check_copybreak(struct net_device *netdev,
3792 struct e1000_buffer *buffer_info,
3793 u32 length, struct sk_buff **skb)
3794{
3795 struct sk_buff *new_skb;
3796
3797 if (length > copybreak)
3798 return;
3799
3800 new_skb = netdev_alloc_skb_ip_align(netdev, length);
3801 if (!new_skb)
3802 return;
3803
3804 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
3805 (*skb)->data - NET_IP_ALIGN,
3806 length + NET_IP_ALIGN);
3807 /* save the skb in buffer_info as good */
3808 buffer_info->skb = *skb;
3809 *skb = new_skb;
3810}
3811
1da177e4 3812/**
2d7edb92 3813 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3814 * @adapter: board private structure
edbbb3ca
JB		 3815 * @rx_ring: ring to clean
3816 * @work_done: amount of napi work completed this call
3817 * @work_to_do: max amount of work allowed for this call to do
3818 */
64798845
JP		 3819static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3820 struct e1000_rx_ring *rx_ring,
3821 int *work_done, int work_to_do)
1da177e4 3822{
1dc32918 3823 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3824 struct net_device *netdev = adapter->netdev;
3825 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3826 struct e1000_rx_desc *rx_desc, *next_rxd;
3827 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3828 unsigned long flags;
406874a7 3829 u32 length;
1da177e4 3830 unsigned int i;
72d64a43 3831 int cleaned_count = 0;
c3033b01 3832 bool cleaned = false;
835bb129 3833 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3834
3835 i = rx_ring->next_to_clean;
3836 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3837 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3838
b92ff8ee 3839 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3840 struct sk_buff *skb;
a292ca6e 3841 u8 status;
90fb5135 3842
96838a40 3843 if (*work_done >= work_to_do)
1da177e4
LT		 3844 break;
3845 (*work_done)++;
c3570acb 3846
a292ca6e 3847 status = rx_desc->status;
b92ff8ee 3848 skb = buffer_info->skb;
86c3d59f
JB		 3849 buffer_info->skb = NULL;
3850
30320be8
JK		 3851 prefetch(skb->data - NET_IP_ALIGN);
3852
86c3d59f
JB		 3853 if (++i == rx_ring->count) i = 0;
3854 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3855 prefetch(next_rxd);
3856
86c3d59f 3857 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3858
c3033b01 3859 cleaned = true;
72d64a43 3860 cleaned_count++;
b16f53be
NN		 3861 dma_unmap_single(&pdev->dev, buffer_info->dma,
3862 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 3863 buffer_info->dma = 0;
1da177e4 3864
1da177e4 3865 length = le16_to_cpu(rx_desc->length);
ea30e119 3866 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 3867 * packet, if thats the case we need to toss it. In fact, we
3868 * to toss every packet with the EOP bit clear and the next
3869 * frame that _does_ have the EOP bit set, as it is by
3870 * definition only a frame fragment
3871 */
3872 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
3873 adapter->discarding = true;
3874
3875 if (adapter->discarding) {
a1415ee6 3876 /* All receives must fit into a single buffer */
675ad473 3877 e_info("Receive packet consumed multiple buffers\n");
864c4e45 3878 /* recycle */
8fc897b0 3879 buffer_info->skb = skb;
40a14dea
JB		 3880 if (status & E1000_RXD_STAT_EOP)
3881 adapter->discarding = false;
1da177e4
LT		 3882 goto next_desc;
3883 }
3884
96838a40 3885 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 3886 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 3887 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3888 last_byte)) {
1da177e4 3889 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 3890 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 3891 length, skb->data);
3892 spin_unlock_irqrestore(&adapter->stats_lock,
3893 flags);
3894 length--;
3895 } else {
9e2feace
AK		 3896 /* recycle */
3897 buffer_info->skb = skb;
1da177e4
LT		 3898 goto next_desc;
3899 }
1cb5821f 3900 }
1da177e4 3901
d2a1e213
JB		 3902 /* adjust length to remove Ethernet CRC, this must be
3903 * done after the TBI_ACCEPT workaround above */
3904 length -= 4;
3905
835bb129
JB		 3906 /* probably a little skewed due to removing CRC */
3907 total_rx_bytes += length;
3908 total_rx_packets++;
3909
57bf6eef
JP		 3910 e1000_check_copybreak(netdev, buffer_info, length, &skb);
3911
996695de 3912 skb_put(skb, length);
1da177e4
LT		 3913
3914 /* Receive Checksum Offload */
a292ca6e 3915 e1000_rx_checksum(adapter,
406874a7
JP		 3916 (u32)(status) |
3917 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 3918 le16_to_cpu(rx_desc->csum), skb);
96838a40 3919
1da177e4 3920 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 3921
edbbb3ca 3922 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 3923
1da177e4
LT		 3924next_desc:
3925 rx_desc->status = 0;
1da177e4 3926
72d64a43
JK		 3927 /* return some buffers to hardware, one at a time is too slow */
3928 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3929 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3930 cleaned_count = 0;
3931 }
3932
30320be8 3933 /* use prefetched values */
86c3d59f
JB		 3934 rx_desc = next_rxd;
3935 buffer_info = next_buffer;
1da177e4 3936 }
1da177e4 3937 rx_ring->next_to_clean = i;
72d64a43
JK		 3938
3939 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3940 if (cleaned_count)
3941 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 3942
835bb129
JB		 3943 adapter->total_rx_packets += total_rx_packets;
3944 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3945 netdev->stats.rx_bytes += total_rx_bytes;
3946 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 3947 return cleaned;
3948}
3949
edbbb3ca
JB		 3950/**
3951 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
3952 * @adapter: address of board private structure
3953 * @rx_ring: pointer to receive ring structure
3954 * @cleaned_count: number of buffers to allocate this pass
3955 **/
3956
3957static void
3958e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
3959 struct e1000_rx_ring *rx_ring, int cleaned_count)
3960{
3961 struct net_device *netdev = adapter->netdev;
3962 struct pci_dev *pdev = adapter->pdev;
3963 struct e1000_rx_desc *rx_desc;
3964 struct e1000_buffer *buffer_info;
3965 struct sk_buff *skb;
3966 unsigned int i;
89d71a66 3967 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 3968
3969 i = rx_ring->next_to_use;
3970 buffer_info = &rx_ring->buffer_info[i];
3971
3972 while (cleaned_count--) {
3973 skb = buffer_info->skb;
3974 if (skb) {
3975 skb_trim(skb, 0);
3976 goto check_page;
3977 }
3978
89d71a66 3979 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3980 if (unlikely(!skb)) {
3981 /* Better luck next round */
3982 adapter->alloc_rx_buff_failed++;
3983 break;
3984 }
3985
3986 /* Fix for errata 23, can't cross 64kB boundary */
3987 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3988 struct sk_buff *oldskb = skb;
675ad473
ET		 3989 e_err("skb align check failed: %u bytes at %p\n",
3990 bufsz, skb->data);
edbbb3ca 3991 /* Try again, without freeing the previous */
89d71a66 3992 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3993 /* Failed allocation, critical failure */
3994 if (!skb) {
3995 dev_kfree_skb(oldskb);
3996 adapter->alloc_rx_buff_failed++;
3997 break;
3998 }
3999
4000 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4001 /* give up */
4002 dev_kfree_skb(skb);
4003 dev_kfree_skb(oldskb);
4004 break; /* while (cleaned_count--) */
4005 }
4006
4007 /* Use new allocation */
4008 dev_kfree_skb(oldskb);
4009 }
edbbb3ca
JB		 4010 buffer_info->skb = skb;
4011 buffer_info->length = adapter->rx_buffer_len;
4012check_page:
4013 /* allocate a new page if necessary */
4014 if (!buffer_info->page) {
4015 buffer_info->page = alloc_page(GFP_ATOMIC);
4016 if (unlikely(!buffer_info->page)) {
4017 adapter->alloc_rx_buff_failed++;
4018 break;
4019 }
4020 }
4021
b5abb028 4022 if (!buffer_info->dma) {
b16f53be 4023 buffer_info->dma = dma_map_page(&pdev->dev,
edbbb3ca 4024 buffer_info->page, 0,
b16f53be
NN		 4025 buffer_info->length,
4026 DMA_FROM_DEVICE);
4027 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4028 put_page(buffer_info->page);
4029 dev_kfree_skb(skb);
4030 buffer_info->page = NULL;
4031 buffer_info->skb = NULL;
4032 buffer_info->dma = 0;
4033 adapter->alloc_rx_buff_failed++;
4034 break; /* while !buffer_info->skb */
4035 }
4036 }
edbbb3ca
JB		 4037
4038 rx_desc = E1000_RX_DESC(*rx_ring, i);
4039 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4040
4041 if (unlikely(++i == rx_ring->count))
4042 i = 0;
4043 buffer_info = &rx_ring->buffer_info[i];
4044 }
4045
4046 if (likely(rx_ring->next_to_use != i)) {
4047 rx_ring->next_to_use = i;
4048 if (unlikely(i-- == 0))
4049 i = (rx_ring->count - 1);
4050
4051 /* Force memory writes to complete before letting h/w
4052 * know there are new descriptors to fetch. (Only
4053 * applicable for weak-ordered memory model archs,
4054 * such as IA-64). */
4055 wmb();
4056 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4057 }
4058}
4059
1da177e4 4060/**
2d7edb92 4061 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4062 * @adapter: address of board private structure
4063 **/
4064
64798845
JP		 4065static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4066 struct e1000_rx_ring *rx_ring,
4067 int cleaned_count)
1da177e4 4068{
1dc32918 4069 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4070 struct net_device *netdev = adapter->netdev;
4071 struct pci_dev *pdev = adapter->pdev;
4072 struct e1000_rx_desc *rx_desc;
4073 struct e1000_buffer *buffer_info;
4074 struct sk_buff *skb;
2648345f 4075 unsigned int i;
89d71a66 4076 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4077
4078 i = rx_ring->next_to_use;
4079 buffer_info = &rx_ring->buffer_info[i];
4080
a292ca6e 4081 while (cleaned_count--) {
ca6f7224
CH		 4082 skb = buffer_info->skb;
4083 if (skb) {
a292ca6e
JK		 4084 skb_trim(skb, 0);
4085 goto map_skb;
4086 }
4087
89d71a66 4088 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4089 if (unlikely(!skb)) {
1da177e4 4090 /* Better luck next round */
72d64a43 4091 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4092 break;
4093 }
4094
2648345f 4095 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4096 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4097 struct sk_buff *oldskb = skb;
675ad473
ET		 4098 e_err("skb align check failed: %u bytes at %p\n",
4099 bufsz, skb->data);
2648345f 4100 /* Try again, without freeing the previous */
89d71a66 4101 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4102 /* Failed allocation, critical failure */
1da177e4
LT		 4103 if (!skb) {
4104 dev_kfree_skb(oldskb);
edbbb3ca 4105 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4106 break;
4107 }
2648345f 4108
1da177e4
LT		 4109 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4110 /* give up */
4111 dev_kfree_skb(skb);
4112 dev_kfree_skb(oldskb);
edbbb3ca 4113 adapter->alloc_rx_buff_failed++;
1da177e4 4114 break; /* while !buffer_info->skb */
1da177e4 4115 }
ca6f7224
CH		 4116
4117 /* Use new allocation */
4118 dev_kfree_skb(oldskb);
1da177e4 4119 }
1da177e4
LT		 4120 buffer_info->skb = skb;
4121 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4122map_skb:
b16f53be 4123 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4124 skb->data,
edbbb3ca 4125 buffer_info->length,
b16f53be
NN		 4126 DMA_FROM_DEVICE);
4127 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4128 dev_kfree_skb(skb);
4129 buffer_info->skb = NULL;
4130 buffer_info->dma = 0;
4131 adapter->alloc_rx_buff_failed++;
4132 break; /* while !buffer_info->skb */
4133 }
1da177e4 4134
edbbb3ca
JB		 4135 /*
4136 * XXX if it was allocated cleanly it will never map to a
4137 * boundary crossing
4138 */
4139
2648345f
MC		 4140 /* Fix for errata 23, can't cross 64kB boundary */
4141 if (!e1000_check_64k_bound(adapter,
4142 (void *)(unsigned long)buffer_info->dma,
4143 adapter->rx_buffer_len)) {
675ad473
ET		 4144 e_err("dma align check failed: %u bytes at %p\n",
4145 adapter->rx_buffer_len,
4146 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4147 dev_kfree_skb(skb);
4148 buffer_info->skb = NULL;
4149
b16f53be 4150 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4151 adapter->rx_buffer_len,
b16f53be 4152 DMA_FROM_DEVICE);
679be3ba 4153 buffer_info->dma = 0;
1da177e4 4154
edbbb3ca 4155 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4156 break; /* while !buffer_info->skb */
4157 }
1da177e4
LT		 4158 rx_desc = E1000_RX_DESC(*rx_ring, i);
4159 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4160
96838a40
JB		 4161 if (unlikely(++i == rx_ring->count))
4162 i = 0;
1da177e4
LT		 4163 buffer_info = &rx_ring->buffer_info[i];
4164 }
4165
b92ff8ee
JB		 4166 if (likely(rx_ring->next_to_use != i)) {
4167 rx_ring->next_to_use = i;
4168 if (unlikely(i-- == 0))
4169 i = (rx_ring->count - 1);
4170
4171 /* Force memory writes to complete before letting h/w
4172 * know there are new descriptors to fetch. (Only
4173 * applicable for weak-ordered memory model archs,
4174 * such as IA-64). */
4175 wmb();
1dc32918 4176 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4177 }
1da177e4
LT		 4178}
4179
4180/**
4181 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4182 * @adapter:
4183 **/
4184
64798845 4185static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4186{
1dc32918 4187 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4188 u16 phy_status;
4189 u16 phy_ctrl;
1da177e4 4190
1dc32918
JP		 4191 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4192 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4193 return;
4194
96838a40 4195 if (adapter->smartspeed == 0) {
1da177e4
LT		 4196 /* If Master/Slave config fault is asserted twice,
4197 * we assume back-to-back */
1dc32918 4198 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4199 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4200 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4201 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4202 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4203 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4204 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4205 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4206 phy_ctrl);
4207 adapter->smartspeed++;
1dc32918
JP		 4208 if (!e1000_phy_setup_autoneg(hw) &&
4209 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4210 &phy_ctrl)) {
4211 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4212 MII_CR_RESTART_AUTO_NEG);
1dc32918 4213 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4214 phy_ctrl);
4215 }
4216 }
4217 return;
96838a40 4218 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4219 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4220 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4221 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4222 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4223 if (!e1000_phy_setup_autoneg(hw) &&
4224 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4225 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4226 MII_CR_RESTART_AUTO_NEG);
1dc32918 4227 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4228 }
4229 }
4230 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4231 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4232 adapter->smartspeed = 0;
4233}
4234
4235/**
4236 * e1000_ioctl -
4237 * @netdev:
4238 * @ifreq:
4239 * @cmd:
4240 **/
4241
64798845 4242static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4243{
4244 switch (cmd) {
4245 case SIOCGMIIPHY:
4246 case SIOCGMIIREG:
4247 case SIOCSMIIREG:
4248 return e1000_mii_ioctl(netdev, ifr, cmd);
4249 default:
4250 return -EOPNOTSUPP;
4251 }
4252}
4253
4254/**
4255 * e1000_mii_ioctl -
4256 * @netdev:
4257 * @ifreq:
4258 * @cmd:
4259 **/
4260
64798845
JP		 4261static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4262 int cmd)
1da177e4 4263{
60490fe0 4264 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4265 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4266 struct mii_ioctl_data *data = if_mii(ifr);
4267 int retval;
406874a7
JP		 4268 u16 mii_reg;
4269 u16 spddplx;
97876fc6 4270 unsigned long flags;
1da177e4 4271
1dc32918 4272 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4273 return -EOPNOTSUPP;
4274
4275 switch (cmd) {
4276 case SIOCGMIIPHY:
1dc32918 4277 data->phy_id = hw->phy_addr;
1da177e4
LT		 4278 break;
4279 case SIOCGMIIREG:
97876fc6 4280 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4281 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4282 &data->val_out)) {
4283 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4284 return -EIO;
97876fc6
MC		 4285 }
4286 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4287 break;
4288 case SIOCSMIIREG:
96838a40 4289 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4290 return -EFAULT;
4291 mii_reg = data->val_in;
97876fc6 4292 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4293 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4294 mii_reg)) {
4295 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4296 return -EIO;
97876fc6 4297 }
f0163ac4 4298 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4299 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4300 switch (data->reg_num) {
4301 case PHY_CTRL:
96838a40 4302 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4303 break;
96838a40 4304 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4305 hw->autoneg = 1;
4306 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4307 } else {
4308 if (mii_reg & 0x40)
4309 spddplx = SPEED_1000;
4310 else if (mii_reg & 0x2000)
4311 spddplx = SPEED_100;
4312 else
4313 spddplx = SPEED_10;
4314 spddplx += (mii_reg & 0x100)
cb764326
JK		 4315 ? DUPLEX_FULL :
4316 DUPLEX_HALF;
1da177e4
LT		 4317 retval = e1000_set_spd_dplx(adapter,
4318 spddplx);
f0163ac4 4319 if (retval)
1da177e4
LT		 4320 return retval;
4321 }
2db10a08
AK		 4322 if (netif_running(adapter->netdev))
4323 e1000_reinit_locked(adapter);
4324 else
1da177e4
LT		 4325 e1000_reset(adapter);
4326 break;
4327 case M88E1000_PHY_SPEC_CTRL:
4328 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4329 if (e1000_phy_reset(hw))
1da177e4
LT		 4330 return -EIO;
4331 break;
4332 }
4333 } else {
4334 switch (data->reg_num) {
4335 case PHY_CTRL:
96838a40 4336 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4337 break;
2db10a08
AK		 4338 if (netif_running(adapter->netdev))
4339 e1000_reinit_locked(adapter);
4340 else
1da177e4
LT		 4341 e1000_reset(adapter);
4342 break;
4343 }
4344 }
4345 break;
4346 default:
4347 return -EOPNOTSUPP;
4348 }
4349 return E1000_SUCCESS;
4350}
4351
64798845 4352void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4353{
4354 struct e1000_adapter *adapter = hw->back;
2648345f 4355 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4356
96838a40 4357 if (ret_val)
675ad473 4358 e_err("Error in setting MWI\n");
1da177e4
LT		 4359}
4360
64798845 4361void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4362{
4363 struct e1000_adapter *adapter = hw->back;
4364
4365 pci_clear_mwi(adapter->pdev);
4366}
4367
64798845 4368int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4369{
4370 struct e1000_adapter *adapter = hw->back;
4371 return pcix_get_mmrbc(adapter->pdev);
4372}
4373
64798845 4374void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4375{
4376 struct e1000_adapter *adapter = hw->back;
4377 pcix_set_mmrbc(adapter->pdev, mmrbc);
4378}
4379
64798845 4380void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4381{
4382 outl(value, port);
4383}
4384
64798845
JP		 4385static void e1000_vlan_rx_register(struct net_device *netdev,
4386 struct vlan_group *grp)
1da177e4 4387{
60490fe0 4388 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4389 struct e1000_hw *hw = &adapter->hw;
406874a7 4390 u32 ctrl, rctl;
1da177e4 4391
9150b76a
JB		 4392 if (!test_bit(__E1000_DOWN, &adapter->flags))
4393 e1000_irq_disable(adapter);
1da177e4
LT		 4394 adapter->vlgrp = grp;
4395
96838a40 4396 if (grp) {
1da177e4 4397 /* enable VLAN tag insert/strip */
1dc32918 4398 ctrl = er32(CTRL);
1da177e4 4399 ctrl |= E1000_CTRL_VME;
1dc32918 4400 ew32(CTRL, ctrl);
1da177e4 4401
1532ecea
JB		 4402 /* enable VLAN receive filtering */
4403 rctl = er32(RCTL);
4404 rctl &= ~E1000_RCTL_CFIEN;
4405 if (!(netdev->flags & IFF_PROMISC))
4406 rctl |= E1000_RCTL_VFE;
4407 ew32(RCTL, rctl);
4408 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4409 } else {
4410 /* disable VLAN tag insert/strip */
1dc32918 4411 ctrl = er32(CTRL);
1da177e4 4412 ctrl &= ~E1000_CTRL_VME;
1dc32918 4413 ew32(CTRL, ctrl);
1da177e4 4414
1532ecea
JB		 4415 /* disable VLAN receive filtering */
4416 rctl = er32(RCTL);
4417 rctl &= ~E1000_RCTL_VFE;
4418 ew32(RCTL, rctl);
fd38d7a0 4419
1532ecea 4420 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
120a5d0d 4421 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1532ecea 4422 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
cd94dd0b 4423 }
1da177e4
LT		 4424 }
4425
9150b76a
JB		 4426 if (!test_bit(__E1000_DOWN, &adapter->flags))
4427 e1000_irq_enable(adapter);
1da177e4
LT		 4428}
4429
64798845 4430static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4431{
60490fe0 4432 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4433 struct e1000_hw *hw = &adapter->hw;
406874a7 4434 u32 vfta, index;
96838a40 4435
1dc32918 4436 if ((hw->mng_cookie.status &
96838a40
JB		 4437 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4438 (vid == adapter->mng_vlan_id))
2d7edb92 4439 return;
1da177e4
LT		 4440 /* add VID to filter table */
4441 index = (vid >> 5) & 0x7F;
1dc32918 4442 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4443 vfta |= (1 << (vid & 0x1F));
1dc32918 4444 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4445}
4446
64798845 4447static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4448{
60490fe0 4449 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4450 struct e1000_hw *hw = &adapter->hw;
406874a7 4451 u32 vfta, index;
1da177e4 4452
9150b76a
JB		 4453 if (!test_bit(__E1000_DOWN, &adapter->flags))
4454 e1000_irq_disable(adapter);
5c15bdec 4455 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4456 if (!test_bit(__E1000_DOWN, &adapter->flags))
4457 e1000_irq_enable(adapter);
1da177e4
LT		 4458
4459 /* remove VID from filter table */
4460 index = (vid >> 5) & 0x7F;
1dc32918 4461 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4462 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4463 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4464}
4465
64798845 4466static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4467{
4468 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4469
96838a40 4470 if (adapter->vlgrp) {
406874a7 4471 u16 vid;
96838a40 4472 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4473 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4474 continue;
4475 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4476 }
4477 }
4478}
4479
64798845 4480int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4481{
1dc32918
JP		 4482 struct e1000_hw *hw = &adapter->hw;
4483
4484 hw->autoneg = 0;
1da177e4 4485
6921368f 4486 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4487 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f 4488 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
675ad473 4489 e_err("Unsupported Speed/Duplex configuration\n");
6921368f
MC		 4490 return -EINVAL;
4491 }
4492
96838a40 4493 switch (spddplx) {
1da177e4 4494 case SPEED_10 + DUPLEX_HALF:
1dc32918 4495 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4496 break;
4497 case SPEED_10 + DUPLEX_FULL:
1dc32918 4498 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4499 break;
4500 case SPEED_100 + DUPLEX_HALF:
1dc32918 4501 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4502 break;
4503 case SPEED_100 + DUPLEX_FULL:
1dc32918 4504 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4505 break;
4506 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4507 hw->autoneg = 1;
4508 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4509 break;
4510 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4511 default:
675ad473 4512 e_err("Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4513 return -EINVAL;
4514 }
4515 return 0;
4516}
4517
b43fcd7d 4518static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4519{
4520 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4521 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4522 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4523 u32 ctrl, ctrl_ext, rctl, status;
4524 u32 wufc = adapter->wol;
6fdfef16 4525#ifdef CONFIG_PM
240b1710 4526 int retval = 0;
6fdfef16 4527#endif
1da177e4
LT		 4528
4529 netif_device_detach(netdev);
4530
2db10a08
AK		 4531 if (netif_running(netdev)) {
4532 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4533 e1000_down(adapter);
2db10a08 4534 }
1da177e4 4535
2f82665f 4536#ifdef CONFIG_PM
1d33e9c6 4537 retval = pci_save_state(pdev);
2f82665f
JB		 4538 if (retval)
4539 return retval;
4540#endif
4541
1dc32918 4542 status = er32(STATUS);
96838a40 4543 if (status & E1000_STATUS_LU)
1da177e4
LT		 4544 wufc &= ~E1000_WUFC_LNKC;
4545
96838a40 4546 if (wufc) {
1da177e4 4547 e1000_setup_rctl(adapter);
db0ce50d 4548 e1000_set_rx_mode(netdev);
1da177e4
LT		 4549
4550 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4551 if (wufc & E1000_WUFC_MC) {
1dc32918 4552 rctl = er32(RCTL);
1da177e4 4553 rctl |= E1000_RCTL_MPE;
1dc32918 4554 ew32(RCTL, rctl);
1da177e4
LT		 4555 }
4556
1dc32918
JP		 4557 if (hw->mac_type >= e1000_82540) {
4558 ctrl = er32(CTRL);
1da177e4
LT		 4559 /* advertise wake from D3Cold */
4560 #define E1000_CTRL_ADVD3WUC 0x00100000
4561 /* phy power management enable */
4562 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4563 ctrl |= E1000_CTRL_ADVD3WUC |
4564 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4565 ew32(CTRL, ctrl);
1da177e4
LT		 4566 }
4567
1dc32918 4568 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4569 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4570 /* keep the laser running in D3 */
1dc32918 4571 ctrl_ext = er32(CTRL_EXT);
1da177e4 4572 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4573 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4574 }
4575
1dc32918
JP		 4576 ew32(WUC, E1000_WUC_PME_EN);
4577 ew32(WUFC, wufc);
1da177e4 4578 } else {
1dc32918
JP		 4579 ew32(WUC, 0);
4580 ew32(WUFC, 0);
1da177e4
LT		 4581 }
4582
0fccd0e9
JG		 4583 e1000_release_manageability(adapter);
4584
b43fcd7d
RW		 4585 *enable_wake = !!wufc;
4586
0fccd0e9 4587 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4588 if (adapter->en_mng_pt)
4589 *enable_wake = true;
1da177e4 4590
edd106fc
AK		 4591 if (netif_running(netdev))
4592 e1000_free_irq(adapter);
4593
1da177e4 4594 pci_disable_device(pdev);
240b1710 4595
1da177e4
LT		 4596 return 0;
4597}
4598
2f82665f 4599#ifdef CONFIG_PM
b43fcd7d
RW		 4600static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4601{
4602 int retval;
4603 bool wake;
4604
4605 retval = __e1000_shutdown(pdev, &wake);
4606 if (retval)
4607 return retval;
4608
4609 if (wake) {
4610 pci_prepare_to_sleep(pdev);
4611 } else {
4612 pci_wake_from_d3(pdev, false);
4613 pci_set_power_state(pdev, PCI_D3hot);
4614 }
4615
4616 return 0;
4617}
4618
64798845 4619static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4620{
4621 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4622 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4623 struct e1000_hw *hw = &adapter->hw;
406874a7 4624 u32 err;
1da177e4 4625
d0e027db 4626 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4627 pci_restore_state(pdev);
dbb5aaeb 4628 pci_save_state(pdev);
81250297
TI		 4629
4630 if (adapter->need_ioport)
4631 err = pci_enable_device(pdev);
4632 else
4633 err = pci_enable_device_mem(pdev);
c7be73bc 4634 if (err) {
675ad473 4635 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 4636 return err;
4637 }
a4cb847d 4638 pci_set_master(pdev);
1da177e4 4639
d0e027db
AK		 4640 pci_enable_wake(pdev, PCI_D3hot, 0);
4641 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4642
c7be73bc
JP		 4643 if (netif_running(netdev)) {
4644 err = e1000_request_irq(adapter);
4645 if (err)
4646 return err;
4647 }
edd106fc
AK		 4648
4649 e1000_power_up_phy(adapter);
1da177e4 4650 e1000_reset(adapter);
1dc32918 4651 ew32(WUS, ~0);
1da177e4 4652
0fccd0e9
JG		 4653 e1000_init_manageability(adapter);
4654
96838a40 4655 if (netif_running(netdev))
1da177e4
LT		 4656 e1000_up(adapter);
4657
4658 netif_device_attach(netdev);
4659
1da177e4
LT		 4660 return 0;
4661}
4662#endif
c653e635
AK		 4663
4664static void e1000_shutdown(struct pci_dev *pdev)
4665{
b43fcd7d
RW		 4666 bool wake;
4667
4668 __e1000_shutdown(pdev, &wake);
4669
4670 if (system_state == SYSTEM_POWER_OFF) {
4671 pci_wake_from_d3(pdev, wake);
4672 pci_set_power_state(pdev, PCI_D3hot);
4673 }
c653e635
AK		 4674}
4675
1da177e4
LT		 4676#ifdef CONFIG_NET_POLL_CONTROLLER
4677/*
4678 * Polling 'interrupt' - used by things like netconsole to send skbs
4679 * without having to re-enable interrupts. It's not called while
4680 * the interrupt routine is executing.
4681 */
64798845 4682static void e1000_netpoll(struct net_device *netdev)
1da177e4 4683{
60490fe0 4684 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4685
1da177e4 4686 disable_irq(adapter->pdev->irq);
7d12e780 4687 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4688 enable_irq(adapter->pdev->irq);
4689}
4690#endif
4691
9026729b
AK		 4692/**
4693 * e1000_io_error_detected - called when PCI error is detected
4694 * @pdev: Pointer to PCI device
120a5d0d 4695 * @state: The current pci connection state
9026729b
AK		 4696 *
4697 * This function is called after a PCI bus error affecting
4698 * this device has been detected.
4699 */
64798845
JP		 4700static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4701 pci_channel_state_t state)
9026729b
AK		 4702{
4703 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4704 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4705
4706 netif_device_detach(netdev);
4707
eab63302
AD		 4708 if (state == pci_channel_io_perm_failure)
4709 return PCI_ERS_RESULT_DISCONNECT;
4710
9026729b
AK		 4711 if (netif_running(netdev))
4712 e1000_down(adapter);
72e8d6bb 4713 pci_disable_device(pdev);
9026729b
AK		 4714
4715 /* Request a slot slot reset. */
4716 return PCI_ERS_RESULT_NEED_RESET;
4717}
4718
4719/**
4720 * e1000_io_slot_reset - called after the pci bus has been reset.
4721 * @pdev: Pointer to PCI device
4722 *
4723 * Restart the card from scratch, as if from a cold-boot. Implementation
4724 * resembles the first-half of the e1000_resume routine.
4725 */
4726static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4727{
4728 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4729 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4730 struct e1000_hw *hw = &adapter->hw;
81250297 4731 int err;
9026729b 4732
81250297
TI		 4733 if (adapter->need_ioport)
4734 err = pci_enable_device(pdev);
4735 else
4736 err = pci_enable_device_mem(pdev);
4737 if (err) {
675ad473 4738 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 4739 return PCI_ERS_RESULT_DISCONNECT;
4740 }
4741 pci_set_master(pdev);
4742
dbf38c94
LV		 4743 pci_enable_wake(pdev, PCI_D3hot, 0);
4744 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4745
9026729b 4746 e1000_reset(adapter);
1dc32918 4747 ew32(WUS, ~0);
9026729b
AK		 4748
4749 return PCI_ERS_RESULT_RECOVERED;
4750}
4751
4752/**
4753 * e1000_io_resume - called when traffic can start flowing again.
4754 * @pdev: Pointer to PCI device
4755 *
4756 * This callback is called when the error recovery driver tells us that
4757 * its OK to resume normal operation. Implementation resembles the
4758 * second-half of the e1000_resume routine.
4759 */
4760static void e1000_io_resume(struct pci_dev *pdev)
4761{
4762 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4763 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4764
4765 e1000_init_manageability(adapter);
9026729b
AK		 4766
4767 if (netif_running(netdev)) {
4768 if (e1000_up(adapter)) {
675ad473 4769 pr_info("can't bring device back up after reset\n");
9026729b
AK		 4770 return;
4771 }
4772 }
4773
4774 netif_device_attach(netdev);
9026729b
AK		 4775}
4776
1da177e4 4777/* e1000_main.c */
Clone of davem's net-next-2.6 tree