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e1000: Fix filling skb descriptors while using packet split
[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
73629bbc
JB		 32 * 6.3.9 12/16/2005
33 * o incorporate fix for recycled skbs from IBM LTC
34 * 6.3.7 11/18/2005
35 * o Honor eeprom setting for enabling/disabling Wake On Lan
36 * 6.3.5 11/17/2005
37 * o Fix memory leak in rx ring handling for PCI Express adapters
38 * 6.3.4 11/8/05
39 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
40 * 6.3.2 9/20/05
41 * o Render logic that sets/resets DRV_LOAD as inline functions to
42 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
43 * network interface is open.
44 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
45 * o Adjust PBA partioning for Jumbo frames using MTU size and not
46 * rx_buffer_len
47 * 6.3.1 9/19/05
48 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
49 (e1000_clean_tx_irq)
50 * o Support for 8086:10B5 device (Quad Port)
51 * 6.2.14 9/15/05
52 * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
53 * open/close
54 * 6.2.13 9/14/05
55 * o Invoke e1000_check_mng_mode only for 8257x controllers since it
56 * accesses the FWSM that is not supported in other controllers
57 * 6.2.12 9/9/05
58 * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
59 * o set RCTL:SECRC only for controllers newer than 82543.
60 * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
61 * This code was moved from e1000_remove to e1000_close
62 * 6.2.10 9/6/05
63 * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
64 * o Enable fc by default on 82573 controllers (do not read eeprom)
65 * o Fix rx_errors statistic not to include missed_packet_count
66 * o Fix rx_dropped statistic not to include missed_packet_count
67 (Padraig Brady)
68 * 6.2.9 8/30/05
69 * o Remove call to update statistics from the controller ib e1000_get_stats
70 * 6.2.8 8/30/05
71 * o Improved algorithm for rx buffer allocation/rdt update
72 * o Flow control watermarks relative to rx PBA size
73 * o Simplified 'Tx Hung' detect logic
74 * 6.2.7 8/17/05
75 * o Report rx buffer allocation failures and tx timeout counts in stats
76 * 6.2.6 8/16/05
77 * o Implement workaround for controller erratum -- linear non-tso packet
78 * following a TSO gets written back prematurely
79 * 6.2.5 8/15/05
80 * o Set netdev->tx_queue_len based on link speed/duplex settings.
81 * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
82 * o Do not power off PHY if SoL/IDER session is active
83 * 6.2.4 8/10/05
84 * o Fix loopback test setup/cleanup for 82571/3 controllers
85 * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
86 * all packets as raw
87 * o Prevent operations that will cause the PHY to be reset if SoL/IDER
88 * sessions are active and log a message
89 * 6.2.2 7/21/05
90 * o used fixed size descriptors for all MTU sizes, reduces memory load
73629bbc
JB		 91 * 6.1.2 4/13/05
92 * o Fixed ethtool diagnostics
93 * o Enabled flow control to take default eeprom settings
94 * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
95 * calls, one from mii_ioctl and other from within update_stats while
96 * processing MIIREG ioctl.
1da177e4
LT		 97 */
98
99char e1000_driver_name[] = "e1000";
3ad2cc67 100static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 101#ifndef CONFIG_E1000_NAPI
102#define DRIVERNAPI
103#else
104#define DRIVERNAPI "-NAPI"
105#endif
c1605eb3 106#define DRV_VERSION "7.0.33-k2"DRIVERNAPI
1da177e4 107char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 108static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 109
110/* e1000_pci_tbl - PCI Device ID Table
111 *
112 * Last entry must be all 0s
113 *
114 * Macro expands to...
115 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
116 */
117static struct pci_device_id e1000_pci_tbl[] = {
118 INTEL_E1000_ETHERNET_DEVICE(0x1000),
119 INTEL_E1000_ETHERNET_DEVICE(0x1001),
120 INTEL_E1000_ETHERNET_DEVICE(0x1004),
121 INTEL_E1000_ETHERNET_DEVICE(0x1008),
122 INTEL_E1000_ETHERNET_DEVICE(0x1009),
123 INTEL_E1000_ETHERNET_DEVICE(0x100C),
124 INTEL_E1000_ETHERNET_DEVICE(0x100D),
125 INTEL_E1000_ETHERNET_DEVICE(0x100E),
126 INTEL_E1000_ETHERNET_DEVICE(0x100F),
127 INTEL_E1000_ETHERNET_DEVICE(0x1010),
128 INTEL_E1000_ETHERNET_DEVICE(0x1011),
129 INTEL_E1000_ETHERNET_DEVICE(0x1012),
130 INTEL_E1000_ETHERNET_DEVICE(0x1013),
131 INTEL_E1000_ETHERNET_DEVICE(0x1014),
132 INTEL_E1000_ETHERNET_DEVICE(0x1015),
133 INTEL_E1000_ETHERNET_DEVICE(0x1016),
134 INTEL_E1000_ETHERNET_DEVICE(0x1017),
135 INTEL_E1000_ETHERNET_DEVICE(0x1018),
136 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 137 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 138 INTEL_E1000_ETHERNET_DEVICE(0x101D),
139 INTEL_E1000_ETHERNET_DEVICE(0x101E),
140 INTEL_E1000_ETHERNET_DEVICE(0x1026),
141 INTEL_E1000_ETHERNET_DEVICE(0x1027),
142 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 143 INTEL_E1000_ETHERNET_DEVICE(0x105E),
144 INTEL_E1000_ETHERNET_DEVICE(0x105F),
145 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 146 INTEL_E1000_ETHERNET_DEVICE(0x1075),
147 INTEL_E1000_ETHERNET_DEVICE(0x1076),
148 INTEL_E1000_ETHERNET_DEVICE(0x1077),
149 INTEL_E1000_ETHERNET_DEVICE(0x1078),
150 INTEL_E1000_ETHERNET_DEVICE(0x1079),
151 INTEL_E1000_ETHERNET_DEVICE(0x107A),
152 INTEL_E1000_ETHERNET_DEVICE(0x107B),
153 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 154 INTEL_E1000_ETHERNET_DEVICE(0x107D),
155 INTEL_E1000_ETHERNET_DEVICE(0x107E),
156 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 157 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 158 INTEL_E1000_ETHERNET_DEVICE(0x108B),
159 INTEL_E1000_ETHERNET_DEVICE(0x108C),
b7ee49db 160 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 161 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 162 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 163 /* required last entry */
164 {0,}
165};
166
167MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
168
169int e1000_up(struct e1000_adapter *adapter);
170void e1000_down(struct e1000_adapter *adapter);
171void e1000_reset(struct e1000_adapter *adapter);
172int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 173int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
174int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
175void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
176void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67
AB		 177static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
178 struct e1000_tx_ring *txdr);
179static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rxdr);
181static void e1000_free_tx_resources(struct e1000_adapter *adapter,
182 struct e1000_tx_ring *tx_ring);
183static void e1000_free_rx_resources(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 185void e1000_update_stats(struct e1000_adapter *adapter);
186
187/* Local Function Prototypes */
188
189static int e1000_init_module(void);
190static void e1000_exit_module(void);
191static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
192static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 193static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 194static int e1000_sw_init(struct e1000_adapter *adapter);
195static int e1000_open(struct net_device *netdev);
196static int e1000_close(struct net_device *netdev);
197static void e1000_configure_tx(struct e1000_adapter *adapter);
198static void e1000_configure_rx(struct e1000_adapter *adapter);
199static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 200static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
201static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
202static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
203 struct e1000_tx_ring *tx_ring);
204static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
205 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 206static void e1000_set_multi(struct net_device *netdev);
207static void e1000_update_phy_info(unsigned long data);
208static void e1000_watchdog(unsigned long data);
209static void e1000_watchdog_task(struct e1000_adapter *adapter);
210static void e1000_82547_tx_fifo_stall(unsigned long data);
211static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
212static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
213static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
214static int e1000_set_mac(struct net_device *netdev, void *p);
215static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 216static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
217 struct e1000_tx_ring *tx_ring);
1da177e4 218#ifdef CONFIG_E1000_NAPI
581d708e 219static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 220static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 221 struct e1000_rx_ring *rx_ring,
1da177e4 222 int *work_done, int work_to_do);
2d7edb92 223static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 224 struct e1000_rx_ring *rx_ring,
2d7edb92 225 int *work_done, int work_to_do);
1da177e4 226#else
581d708e
MC		 227static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
228 struct e1000_rx_ring *rx_ring);
229static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
230 struct e1000_rx_ring *rx_ring);
1da177e4 231#endif
581d708e 232static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 233 struct e1000_rx_ring *rx_ring,
234 int cleaned_count);
581d708e 235static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 236 struct e1000_rx_ring *rx_ring,
237 int cleaned_count);
1da177e4
LT		 238static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
239static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
240 int cmd);
241void e1000_set_ethtool_ops(struct net_device *netdev);
242static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
243static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
244static void e1000_tx_timeout(struct net_device *dev);
245static void e1000_tx_timeout_task(struct net_device *dev);
246static void e1000_smartspeed(struct e1000_adapter *adapter);
247static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
248 struct sk_buff *skb);
249
250static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
251static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
252static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
253static void e1000_restore_vlan(struct e1000_adapter *adapter);
254
1da177e4 255#ifdef CONFIG_PM
977e74b5 256static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 257static int e1000_resume(struct pci_dev *pdev);
258#endif
259
260#ifdef CONFIG_NET_POLL_CONTROLLER
261/* for netdump / net console */
262static void e1000_netpoll (struct net_device *netdev);
263#endif
264
24025e4e 265
1da177e4
LT		 266/* Exported from other modules */
267
268extern void e1000_check_options(struct e1000_adapter *adapter);
269
270static struct pci_driver e1000_driver = {
271 .name = e1000_driver_name,
272 .id_table = e1000_pci_tbl,
273 .probe = e1000_probe,
274 .remove = __devexit_p(e1000_remove),
275 /* Power Managment Hooks */
276#ifdef CONFIG_PM
277 .suspend = e1000_suspend,
278 .resume = e1000_resume
279#endif
280};
281
282MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
283MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
284MODULE_LICENSE("GPL");
285MODULE_VERSION(DRV_VERSION);
286
287static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
288module_param(debug, int, 0);
289MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
290
291/**
292 * e1000_init_module - Driver Registration Routine
293 *
294 * e1000_init_module is the first routine called when the driver is
295 * loaded. All it does is register with the PCI subsystem.
296 **/
297
298static int __init
299e1000_init_module(void)
300{
301 int ret;
302 printk(KERN_INFO "%s - version %s\n",
303 e1000_driver_string, e1000_driver_version);
304
305 printk(KERN_INFO "%s\n", e1000_copyright);
306
307 ret = pci_module_init(&e1000_driver);
8b378def 308
1da177e4
LT		 309 return ret;
310}
311
312module_init(e1000_init_module);
313
314/**
315 * e1000_exit_module - Driver Exit Cleanup Routine
316 *
317 * e1000_exit_module is called just before the driver is removed
318 * from memory.
319 **/
320
321static void __exit
322e1000_exit_module(void)
323{
1da177e4
LT		 324 pci_unregister_driver(&e1000_driver);
325}
326
327module_exit(e1000_exit_module);
328
329/**
330 * e1000_irq_disable - Mask off interrupt generation on the NIC
331 * @adapter: board private structure
332 **/
333
334static inline void
335e1000_irq_disable(struct e1000_adapter *adapter)
336{
337 atomic_inc(&adapter->irq_sem);
338 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
339 E1000_WRITE_FLUSH(&adapter->hw);
340 synchronize_irq(adapter->pdev->irq);
341}
342
343/**
344 * e1000_irq_enable - Enable default interrupt generation settings
345 * @adapter: board private structure
346 **/
347
348static inline void
349e1000_irq_enable(struct e1000_adapter *adapter)
350{
96838a40 351 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 352 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
353 E1000_WRITE_FLUSH(&adapter->hw);
354 }
355}
3ad2cc67
AB		 356
357static void
2d7edb92
MC		 358e1000_update_mng_vlan(struct e1000_adapter *adapter)
359{
360 struct net_device *netdev = adapter->netdev;
361 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
362 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 363 if (adapter->vlgrp) {
364 if (!adapter->vlgrp->vlan_devices[vid]) {
365 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 366 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
367 e1000_vlan_rx_add_vid(netdev, vid);
368 adapter->mng_vlan_id = vid;
369 } else
370 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 371
372 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
373 (vid != old_vid) &&
2d7edb92
MC		 374 !adapter->vlgrp->vlan_devices[old_vid])
375 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 376 } else
377 adapter->mng_vlan_id = vid;
2d7edb92
MC		 378 }
379}
b55ccb35
JK		 380
381/**
382 * e1000_release_hw_control - release control of the h/w to f/w
383 * @adapter: address of board private structure
384 *
385 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
386 * For ASF and Pass Through versions of f/w this means that the
387 * driver is no longer loaded. For AMT version (only with 82573) i
388 * of the f/w this means that the netowrk i/f is closed.
389 *
390 **/
391
392static inline void
393e1000_release_hw_control(struct e1000_adapter *adapter)
394{
395 uint32_t ctrl_ext;
396 uint32_t swsm;
397
398 /* Let firmware taken over control of h/w */
399 switch (adapter->hw.mac_type) {
400 case e1000_82571:
401 case e1000_82572:
402 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
403 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
404 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
405 break;
406 case e1000_82573:
407 swsm = E1000_READ_REG(&adapter->hw, SWSM);
408 E1000_WRITE_REG(&adapter->hw, SWSM,
409 swsm & ~E1000_SWSM_DRV_LOAD);
410 default:
411 break;
412 }
413}
414
415/**
416 * e1000_get_hw_control - get control of the h/w from f/w
417 * @adapter: address of board private structure
418 *
419 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
420 * For ASF and Pass Through versions of f/w this means that
421 * the driver is loaded. For AMT version (only with 82573)
422 * of the f/w this means that the netowrk i/f is open.
423 *
424 **/
425
426static inline void
427e1000_get_hw_control(struct e1000_adapter *adapter)
428{
429 uint32_t ctrl_ext;
430 uint32_t swsm;
431 /* Let firmware know the driver has taken over */
432 switch (adapter->hw.mac_type) {
433 case e1000_82571:
434 case e1000_82572:
435 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
436 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
437 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
438 break;
439 case e1000_82573:
440 swsm = E1000_READ_REG(&adapter->hw, SWSM);
441 E1000_WRITE_REG(&adapter->hw, SWSM,
442 swsm | E1000_SWSM_DRV_LOAD);
443 break;
444 default:
445 break;
446 }
447}
448
1da177e4
LT		 449int
450e1000_up(struct e1000_adapter *adapter)
451{
452 struct net_device *netdev = adapter->netdev;
581d708e 453 int i, err;
1da177e4
LT		 454
455 /* hardware has been reset, we need to reload some things */
456
457 /* Reset the PHY if it was previously powered down */
96838a40 458 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 459 uint16_t mii_reg;
460 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
96838a40 461 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4
LT		 462 e1000_phy_reset(&adapter->hw);
463 }
464
465 e1000_set_multi(netdev);
466
467 e1000_restore_vlan(adapter);
468
469 e1000_configure_tx(adapter);
470 e1000_setup_rctl(adapter);
471 e1000_configure_rx(adapter);
72d64a43
JK		 472 /* call E1000_DESC_UNUSED which always leaves
473 * at least 1 descriptor unused to make sure
474 * next_to_use != next_to_clean */
f56799ea 475 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 476 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 477 adapter->alloc_rx_buf(adapter, ring,
478 E1000_DESC_UNUSED(ring));
f56799ea 479 }
1da177e4 480
fa4f7ef3 481#ifdef CONFIG_PCI_MSI
96838a40 482 if (adapter->hw.mac_type > e1000_82547_rev_2) {
fa4f7ef3 483 adapter->have_msi = TRUE;
96838a40 484 if ((err = pci_enable_msi(adapter->pdev))) {
fa4f7ef3
MC		 485 DPRINTK(PROBE, ERR,
486 "Unable to allocate MSI interrupt Error: %d\n", err);
487 adapter->have_msi = FALSE;
488 }
489 }
490#endif
96838a40 491 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
1da177e4 492 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 493 netdev->name, netdev))) {
494 DPRINTK(PROBE, ERR,
495 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 496 return err;
2648345f 497 }
1da177e4 498
7bfa4816
JK		 499 adapter->tx_queue_len = netdev->tx_queue_len;
500
1da177e4 501 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 502
503#ifdef CONFIG_E1000_NAPI
504 netif_poll_enable(netdev);
505#endif
5de55624
MC		 506 e1000_irq_enable(adapter);
507
1da177e4
LT		 508 return 0;
509}
510
511void
512e1000_down(struct e1000_adapter *adapter)
513{
514 struct net_device *netdev = adapter->netdev;
57128197
JK		 515 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
516 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 517
518 e1000_irq_disable(adapter);
c1605eb3 519
1da177e4 520 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3 521#ifdef CONFIG_PCI_MSI
96838a40 522 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
fa4f7ef3
MC		 523 adapter->have_msi == TRUE)
524 pci_disable_msi(adapter->pdev);
525#endif
1da177e4
LT		 526 del_timer_sync(&adapter->tx_fifo_stall_timer);
527 del_timer_sync(&adapter->watchdog_timer);
528 del_timer_sync(&adapter->phy_info_timer);
529
530#ifdef CONFIG_E1000_NAPI
531 netif_poll_disable(netdev);
532#endif
7bfa4816 533 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 534 adapter->link_speed = 0;
535 adapter->link_duplex = 0;
536 netif_carrier_off(netdev);
537 netif_stop_queue(netdev);
538
539 e1000_reset(adapter);
581d708e
MC		 540 e1000_clean_all_tx_rings(adapter);
541 e1000_clean_all_rx_rings(adapter);
1da177e4 542
57128197
JK		 543 /* Power down the PHY so no link is implied when interface is down *
544 * The PHY cannot be powered down if any of the following is TRUE *
545 * (a) WoL is enabled
546 * (b) AMT is active
547 * (c) SoL/IDER session is active */
548 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 549 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 550 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
551 !mng_mode_enabled &&
552 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 553 uint16_t mii_reg;
554 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
555 mii_reg |= MII_CR_POWER_DOWN;
556 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 557 mdelay(1);
1da177e4
LT		 558 }
559}
560
561void
562e1000_reset(struct e1000_adapter *adapter)
563{
2d7edb92 564 uint32_t pba, manc;
1125ecbc 565 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 566
567 /* Repartition Pba for greater than 9k mtu
568 * To take effect CTRL.RST is required.
569 */
570
2d7edb92
MC		 571 switch (adapter->hw.mac_type) {
572 case e1000_82547:
0e6ef3e0 573 case e1000_82547_rev_2:
2d7edb92
MC		 574 pba = E1000_PBA_30K;
575 break;
868d5309
MC		 576 case e1000_82571:
577 case e1000_82572:
578 pba = E1000_PBA_38K;
579 break;
2d7edb92
MC		 580 case e1000_82573:
581 pba = E1000_PBA_12K;
582 break;
583 default:
584 pba = E1000_PBA_48K;
585 break;
586 }
587
96838a40 588 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 589 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 590 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 591
592
96838a40 593 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 594 adapter->tx_fifo_head = 0;
595 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
596 adapter->tx_fifo_size =
597 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
598 atomic_set(&adapter->tx_fifo_stall, 0);
599 }
2d7edb92 600
1da177e4
LT		 601 E1000_WRITE_REG(&adapter->hw, PBA, pba);
602
603 /* flow control settings */
f11b7f85
JK		 604 /* Set the FC high water mark to 90% of the FIFO size.
605 * Required to clear last 3 LSB */
606 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
607
608 adapter->hw.fc_high_water = fc_high_water_mark;
609 adapter->hw.fc_low_water = fc_high_water_mark - 8;
1da177e4
LT		 610 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
611 adapter->hw.fc_send_xon = 1;
612 adapter->hw.fc = adapter->hw.original_fc;
613
2d7edb92 614 /* Allow time for pending master requests to run */
1da177e4 615 e1000_reset_hw(&adapter->hw);
96838a40 616 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 617 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 618 if (e1000_init_hw(&adapter->hw))
1da177e4 619 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 620 e1000_update_mng_vlan(adapter);
1da177e4
LT		 621 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
622 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
623
624 e1000_reset_adaptive(&adapter->hw);
625 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 626 if (adapter->en_mng_pt) {
627 manc = E1000_READ_REG(&adapter->hw, MANC);
628 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
629 E1000_WRITE_REG(&adapter->hw, MANC, manc);
630 }
1da177e4
LT		 631}
632
633/**
634 * e1000_probe - Device Initialization Routine
635 * @pdev: PCI device information struct
636 * @ent: entry in e1000_pci_tbl
637 *
638 * Returns 0 on success, negative on failure
639 *
640 * e1000_probe initializes an adapter identified by a pci_dev structure.
641 * The OS initialization, configuring of the adapter private structure,
642 * and a hardware reset occur.
643 **/
644
645static int __devinit
646e1000_probe(struct pci_dev *pdev,
647 const struct pci_device_id *ent)
648{
649 struct net_device *netdev;
650 struct e1000_adapter *adapter;
2d7edb92 651 unsigned long mmio_start, mmio_len;
2d7edb92 652
1da177e4 653 static int cards_found = 0;
84916829 654 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 655 int i, err, pci_using_dac;
1da177e4
LT		 656 uint16_t eeprom_data;
657 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 658 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 659 return err;
660
96838a40 661 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 662 pci_using_dac = 1;
663 } else {
96838a40 664 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 665 E1000_ERR("No usable DMA configuration, aborting\n");
666 return err;
667 }
668 pci_using_dac = 0;
669 }
670
96838a40 671 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 672 return err;
673
674 pci_set_master(pdev);
675
676 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 677 if (!netdev) {
1da177e4
LT		 678 err = -ENOMEM;
679 goto err_alloc_etherdev;
680 }
681
682 SET_MODULE_OWNER(netdev);
683 SET_NETDEV_DEV(netdev, &pdev->dev);
684
685 pci_set_drvdata(pdev, netdev);
60490fe0 686 adapter = netdev_priv(netdev);
1da177e4
LT		 687 adapter->netdev = netdev;
688 adapter->pdev = pdev;
689 adapter->hw.back = adapter;
690 adapter->msg_enable = (1 << debug) - 1;
691
692 mmio_start = pci_resource_start(pdev, BAR_0);
693 mmio_len = pci_resource_len(pdev, BAR_0);
694
695 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 696 if (!adapter->hw.hw_addr) {
1da177e4
LT		 697 err = -EIO;
698 goto err_ioremap;
699 }
700
96838a40
JB		 701 for (i = BAR_1; i <= BAR_5; i++) {
702 if (pci_resource_len(pdev, i) == 0)
1da177e4 703 continue;
96838a40 704 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 705 adapter->hw.io_base = pci_resource_start(pdev, i);
706 break;
707 }
708 }
709
710 netdev->open = &e1000_open;
711 netdev->stop = &e1000_close;
712 netdev->hard_start_xmit = &e1000_xmit_frame;
713 netdev->get_stats = &e1000_get_stats;
714 netdev->set_multicast_list = &e1000_set_multi;
715 netdev->set_mac_address = &e1000_set_mac;
716 netdev->change_mtu = &e1000_change_mtu;
717 netdev->do_ioctl = &e1000_ioctl;
718 e1000_set_ethtool_ops(netdev);
719 netdev->tx_timeout = &e1000_tx_timeout;
720 netdev->watchdog_timeo = 5 * HZ;
721#ifdef CONFIG_E1000_NAPI
722 netdev->poll = &e1000_clean;
723 netdev->weight = 64;
724#endif
725 netdev->vlan_rx_register = e1000_vlan_rx_register;
726 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
727 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
728#ifdef CONFIG_NET_POLL_CONTROLLER
729 netdev->poll_controller = e1000_netpoll;
730#endif
731 strcpy(netdev->name, pci_name(pdev));
732
733 netdev->mem_start = mmio_start;
734 netdev->mem_end = mmio_start + mmio_len;
735 netdev->base_addr = adapter->hw.io_base;
736
737 adapter->bd_number = cards_found;
738
739 /* setup the private structure */
740
96838a40 741 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 742 goto err_sw_init;
743
96838a40 744 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 745 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
746
84916829
JK		 747 /* if ksp3, indicate if it's port a being setup */
748 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
749 e1000_ksp3_port_a == 0)
750 adapter->ksp3_port_a = 1;
751 e1000_ksp3_port_a++;
752 /* Reset for multiple KP3 adapters */
753 if (e1000_ksp3_port_a == 4)
754 e1000_ksp3_port_a = 0;
755
96838a40 756 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 757 netdev->features = NETIF_F_SG |
758 NETIF_F_HW_CSUM |
759 NETIF_F_HW_VLAN_TX |
760 NETIF_F_HW_VLAN_RX |
761 NETIF_F_HW_VLAN_FILTER;
762 }
763
764#ifdef NETIF_F_TSO
96838a40 765 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 766 (adapter->hw.mac_type != e1000_82547))
767 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 768
769#ifdef NETIF_F_TSO_IPV6
96838a40 770 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 771 netdev->features |= NETIF_F_TSO_IPV6;
772#endif
1da177e4 773#endif
96838a40 774 if (pci_using_dac)
1da177e4
LT		 775 netdev->features |= NETIF_F_HIGHDMA;
776
777 /* hard_start_xmit is safe against parallel locking */
778 netdev->features |= NETIF_F_LLTX;
779
2d7edb92
MC		 780 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
781
96838a40 782 /* before reading the EEPROM, reset the controller to
1da177e4 783 * put the device in a known good starting state */
96838a40 784
1da177e4
LT		 785 e1000_reset_hw(&adapter->hw);
786
787 /* make sure the EEPROM is good */
788
96838a40 789 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 790 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
791 err = -EIO;
792 goto err_eeprom;
793 }
794
795 /* copy the MAC address out of the EEPROM */
796
96838a40 797 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 798 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
799 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 800 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 801
96838a40 802 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 803 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
804 err = -EIO;
805 goto err_eeprom;
806 }
807
808 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
809
810 e1000_get_bus_info(&adapter->hw);
811
812 init_timer(&adapter->tx_fifo_stall_timer);
813 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
814 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
815
816 init_timer(&adapter->watchdog_timer);
817 adapter->watchdog_timer.function = &e1000_watchdog;
818 adapter->watchdog_timer.data = (unsigned long) adapter;
819
820 INIT_WORK(&adapter->watchdog_task,
821 (void (*)(void *))e1000_watchdog_task, adapter);
822
823 init_timer(&adapter->phy_info_timer);
824 adapter->phy_info_timer.function = &e1000_update_phy_info;
825 adapter->phy_info_timer.data = (unsigned long) adapter;
826
827 INIT_WORK(&adapter->tx_timeout_task,
828 (void (*)(void *))e1000_tx_timeout_task, netdev);
829
830 /* we're going to reset, so assume we have no link for now */
831
832 netif_carrier_off(netdev);
833 netif_stop_queue(netdev);
834
835 e1000_check_options(adapter);
836
837 /* Initial Wake on LAN setting
838 * If APM wake is enabled in the EEPROM,
839 * enable the ACPI Magic Packet filter
840 */
841
96838a40 842 switch (adapter->hw.mac_type) {
1da177e4
LT		 843 case e1000_82542_rev2_0:
844 case e1000_82542_rev2_1:
845 case e1000_82543:
846 break;
847 case e1000_82544:
848 e1000_read_eeprom(&adapter->hw,
849 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
850 eeprom_apme_mask = E1000_EEPROM_82544_APM;
851 break;
852 case e1000_82546:
853 case e1000_82546_rev_3:
fd803241 854 case e1000_82571:
96838a40 855 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 856 e1000_read_eeprom(&adapter->hw,
857 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
858 break;
859 }
860 /* Fall Through */
861 default:
862 e1000_read_eeprom(&adapter->hw,
863 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
864 break;
865 }
96838a40 866 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 867 adapter->wol |= E1000_WUFC_MAG;
868
fb3d47d4
JK		 869 /* print bus type/speed/width info */
870 {
871 struct e1000_hw *hw = &adapter->hw;
872 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
873 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
874 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
875 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
876 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
877 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
878 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
879 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
880 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
881 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
882 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
883 "32-bit"));
884 }
885
886 for (i = 0; i < 6; i++)
887 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
888
1da177e4
LT		 889 /* reset the hardware with the new settings */
890 e1000_reset(adapter);
891
b55ccb35
JK		 892 /* If the controller is 82573 and f/w is AMT, do not set
893 * DRV_LOAD until the interface is up. For all other cases,
894 * let the f/w know that the h/w is now under the control
895 * of the driver. */
896 if (adapter->hw.mac_type != e1000_82573 ||
897 !e1000_check_mng_mode(&adapter->hw))
898 e1000_get_hw_control(adapter);
2d7edb92 899
1da177e4 900 strcpy(netdev->name, "eth%d");
96838a40 901 if ((err = register_netdev(netdev)))
1da177e4
LT		 902 goto err_register;
903
904 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
905
906 cards_found++;
907 return 0;
908
909err_register:
910err_sw_init:
911err_eeprom:
912 iounmap(adapter->hw.hw_addr);
913err_ioremap:
914 free_netdev(netdev);
915err_alloc_etherdev:
916 pci_release_regions(pdev);
917 return err;
918}
919
920/**
921 * e1000_remove - Device Removal Routine
922 * @pdev: PCI device information struct
923 *
924 * e1000_remove is called by the PCI subsystem to alert the driver
925 * that it should release a PCI device. The could be caused by a
926 * Hot-Plug event, or because the driver is going to be removed from
927 * memory.
928 **/
929
930static void __devexit
931e1000_remove(struct pci_dev *pdev)
932{
933 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 934 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 935 uint32_t manc;
581d708e
MC		 936#ifdef CONFIG_E1000_NAPI
937 int i;
938#endif
1da177e4 939
be2b28ed
JG		 940 flush_scheduled_work();
941
96838a40 942 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 943 adapter->hw.media_type == e1000_media_type_copper) {
944 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 945 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 946 manc |= E1000_MANC_ARP_EN;
947 E1000_WRITE_REG(&adapter->hw, MANC, manc);
948 }
949 }
950
b55ccb35
JK		 951 /* Release control of h/w to f/w. If f/w is AMT enabled, this
952 * would have already happened in close and is redundant. */
953 e1000_release_hw_control(adapter);
2d7edb92 954
1da177e4 955 unregister_netdev(netdev);
581d708e 956#ifdef CONFIG_E1000_NAPI
f56799ea 957 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 958 __dev_put(&adapter->polling_netdev[i]);
959#endif
1da177e4 960
96838a40 961 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 962 e1000_phy_hw_reset(&adapter->hw);
1da177e4 963
24025e4e
MC		 964 kfree(adapter->tx_ring);
965 kfree(adapter->rx_ring);
966#ifdef CONFIG_E1000_NAPI
967 kfree(adapter->polling_netdev);
968#endif
969
1da177e4
LT		 970 iounmap(adapter->hw.hw_addr);
971 pci_release_regions(pdev);
972
973 free_netdev(netdev);
974
975 pci_disable_device(pdev);
976}
977
978/**
979 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
980 * @adapter: board private structure to initialize
981 *
982 * e1000_sw_init initializes the Adapter private data structure.
983 * Fields are initialized based on PCI device information and
984 * OS network device settings (MTU size).
985 **/
986
987static int __devinit
988e1000_sw_init(struct e1000_adapter *adapter)
989{
990 struct e1000_hw *hw = &adapter->hw;
991 struct net_device *netdev = adapter->netdev;
992 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 993#ifdef CONFIG_E1000_NAPI
994 int i;
995#endif
1da177e4
LT		 996
997 /* PCI config space info */
998
999 hw->vendor_id = pdev->vendor;
1000 hw->device_id = pdev->device;
1001 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1002 hw->subsystem_id = pdev->subsystem_device;
1003
1004 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1005
1006 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1007
1008 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 1009 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 1010 hw->max_frame_size = netdev->mtu +
1011 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1012 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1013
1014 /* identify the MAC */
1015
96838a40 1016 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1017 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1018 return -EIO;
1019 }
1020
1021 /* initialize eeprom parameters */
1022
96838a40 1023 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1024 E1000_ERR("EEPROM initialization failed\n");
1025 return -EIO;
1026 }
1da177e4 1027
96838a40 1028 switch (hw->mac_type) {
1da177e4
LT		 1029 default:
1030 break;
1031 case e1000_82541:
1032 case e1000_82547:
1033 case e1000_82541_rev_2:
1034 case e1000_82547_rev_2:
1035 hw->phy_init_script = 1;
1036 break;
1037 }
1038
1039 e1000_set_media_type(hw);
1040
1041 hw->wait_autoneg_complete = FALSE;
1042 hw->tbi_compatibility_en = TRUE;
1043 hw->adaptive_ifs = TRUE;
1044
1045 /* Copper options */
1046
96838a40 1047 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1048 hw->mdix = AUTO_ALL_MODES;
1049 hw->disable_polarity_correction = FALSE;
1050 hw->master_slave = E1000_MASTER_SLAVE;
1051 }
1052
f56799ea
JK		 1053 adapter->num_tx_queues = 1;
1054 adapter->num_rx_queues = 1;
581d708e
MC		 1055
1056 if (e1000_alloc_queues(adapter)) {
1057 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1058 return -ENOMEM;
1059 }
1060
1061#ifdef CONFIG_E1000_NAPI
f56799ea 1062 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1063 adapter->polling_netdev[i].priv = adapter;
1064 adapter->polling_netdev[i].poll = &e1000_clean;
1065 adapter->polling_netdev[i].weight = 64;
1066 dev_hold(&adapter->polling_netdev[i]);
1067 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1068 }
7bfa4816 1069 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1070#endif
1071
1da177e4
LT		 1072 atomic_set(&adapter->irq_sem, 1);
1073 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1074
1075 return 0;
1076}
1077
581d708e
MC		 1078/**
1079 * e1000_alloc_queues - Allocate memory for all rings
1080 * @adapter: board private structure to initialize
1081 *
1082 * We allocate one ring per queue at run-time since we don't know the
1083 * number of queues at compile-time. The polling_netdev array is
1084 * intended for Multiqueue, but should work fine with a single queue.
1085 **/
1086
1087static int __devinit
1088e1000_alloc_queues(struct e1000_adapter *adapter)
1089{
1090 int size;
1091
f56799ea 1092 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1093 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1094 if (!adapter->tx_ring)
1095 return -ENOMEM;
1096 memset(adapter->tx_ring, 0, size);
1097
f56799ea 1098 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1099 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1100 if (!adapter->rx_ring) {
1101 kfree(adapter->tx_ring);
1102 return -ENOMEM;
1103 }
1104 memset(adapter->rx_ring, 0, size);
1105
1106#ifdef CONFIG_E1000_NAPI
f56799ea 1107 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1108 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1109 if (!adapter->polling_netdev) {
1110 kfree(adapter->tx_ring);
1111 kfree(adapter->rx_ring);
1112 return -ENOMEM;
1113 }
1114 memset(adapter->polling_netdev, 0, size);
1115#endif
1116
1117 return E1000_SUCCESS;
1118}
1119
1da177e4
LT		 1120/**
1121 * e1000_open - Called when a network interface is made active
1122 * @netdev: network interface device structure
1123 *
1124 * Returns 0 on success, negative value on failure
1125 *
1126 * The open entry point is called when a network interface is made
1127 * active by the system (IFF_UP). At this point all resources needed
1128 * for transmit and receive operations are allocated, the interrupt
1129 * handler is registered with the OS, the watchdog timer is started,
1130 * and the stack is notified that the interface is ready.
1131 **/
1132
1133static int
1134e1000_open(struct net_device *netdev)
1135{
60490fe0 1136 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1137 int err;
1138
1139 /* allocate transmit descriptors */
1140
581d708e 1141 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1142 goto err_setup_tx;
1143
1144 /* allocate receive descriptors */
1145
581d708e 1146 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1147 goto err_setup_rx;
1148
96838a40 1149 if ((err = e1000_up(adapter)))
1da177e4 1150 goto err_up;
2d7edb92 1151 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1152 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1153 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1154 e1000_update_mng_vlan(adapter);
1155 }
1da177e4 1156
b55ccb35
JK		 1157 /* If AMT is enabled, let the firmware know that the network
1158 * interface is now open */
1159 if (adapter->hw.mac_type == e1000_82573 &&
1160 e1000_check_mng_mode(&adapter->hw))
1161 e1000_get_hw_control(adapter);
1162
1da177e4
LT		 1163 return E1000_SUCCESS;
1164
1165err_up:
581d708e 1166 e1000_free_all_rx_resources(adapter);
1da177e4 1167err_setup_rx:
581d708e 1168 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1169err_setup_tx:
1170 e1000_reset(adapter);
1171
1172 return err;
1173}
1174
1175/**
1176 * e1000_close - Disables a network interface
1177 * @netdev: network interface device structure
1178 *
1179 * Returns 0, this is not allowed to fail
1180 *
1181 * The close entry point is called when an interface is de-activated
1182 * by the OS. The hardware is still under the drivers control, but
1183 * needs to be disabled. A global MAC reset is issued to stop the
1184 * hardware, and all transmit and receive resources are freed.
1185 **/
1186
1187static int
1188e1000_close(struct net_device *netdev)
1189{
60490fe0 1190 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1191
1192 e1000_down(adapter);
1193
581d708e
MC		 1194 e1000_free_all_tx_resources(adapter);
1195 e1000_free_all_rx_resources(adapter);
1da177e4 1196
96838a40 1197 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1198 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1199 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1200 }
b55ccb35
JK		 1201
1202 /* If AMT is enabled, let the firmware know that the network
1203 * interface is now closed */
1204 if (adapter->hw.mac_type == e1000_82573 &&
1205 e1000_check_mng_mode(&adapter->hw))
1206 e1000_release_hw_control(adapter);
1207
1da177e4
LT		 1208 return 0;
1209}
1210
1211/**
1212 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1213 * @adapter: address of board private structure
2d7edb92
MC		 1214 * @start: address of beginning of memory
1215 * @len: length of memory
1da177e4
LT		 1216 **/
1217static inline boolean_t
1218e1000_check_64k_bound(struct e1000_adapter *adapter,
1219 void *start, unsigned long len)
1220{
1221 unsigned long begin = (unsigned long) start;
1222 unsigned long end = begin + len;
1223
2648345f
MC		 1224 /* First rev 82545 and 82546 need to not allow any memory
1225 * write location to cross 64k boundary due to errata 23 */
1da177e4 1226 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1227 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1228 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1229 }
1230
1231 return TRUE;
1232}
1233
1234/**
1235 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1236 * @adapter: board private structure
581d708e 1237 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1238 *
1239 * Return 0 on success, negative on failure
1240 **/
1241
3ad2cc67 1242static int
581d708e
MC		 1243e1000_setup_tx_resources(struct e1000_adapter *adapter,
1244 struct e1000_tx_ring *txdr)
1da177e4 1245{
1da177e4
LT		 1246 struct pci_dev *pdev = adapter->pdev;
1247 int size;
1248
1249 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1250
1251 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1252 if (!txdr->buffer_info) {
2648345f
MC		 1253 DPRINTK(PROBE, ERR,
1254 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1255 return -ENOMEM;
1256 }
1257 memset(txdr->buffer_info, 0, size);
1258
1259 /* round up to nearest 4K */
1260
1261 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1262 E1000_ROUNDUP(txdr->size, 4096);
1263
1264 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1265 if (!txdr->desc) {
1da177e4 1266setup_tx_desc_die:
1da177e4 1267 vfree(txdr->buffer_info);
2648345f
MC		 1268 DPRINTK(PROBE, ERR,
1269 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1270 return -ENOMEM;
1271 }
1272
2648345f 1273 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1274 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1275 void *olddesc = txdr->desc;
1276 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1277 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1278 "at %p\n", txdr->size, txdr->desc);
1279 /* Try again, without freeing the previous */
1da177e4 1280 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1281 /* Failed allocation, critical failure */
96838a40 1282 if (!txdr->desc) {
1da177e4
LT		 1283 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1284 goto setup_tx_desc_die;
1285 }
1286
1287 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1288 /* give up */
2648345f
MC		 1289 pci_free_consistent(pdev, txdr->size, txdr->desc,
1290 txdr->dma);
1da177e4
LT		 1291 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1292 DPRINTK(PROBE, ERR,
2648345f
MC		 1293 "Unable to allocate aligned memory "
1294 "for the transmit descriptor ring\n");
1da177e4
LT		 1295 vfree(txdr->buffer_info);
1296 return -ENOMEM;
1297 } else {
2648345f 1298 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1299 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1300 }
1301 }
1302 memset(txdr->desc, 0, txdr->size);
1303
1304 txdr->next_to_use = 0;
1305 txdr->next_to_clean = 0;
2ae76d98 1306 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1307
1308 return 0;
1309}
1310
581d708e
MC		 1311/**
1312 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1313 * (Descriptors) for all queues
1314 * @adapter: board private structure
1315 *
1316 * If this function returns with an error, then it's possible one or
1317 * more of the rings is populated (while the rest are not). It is the
1318 * callers duty to clean those orphaned rings.
1319 *
1320 * Return 0 on success, negative on failure
1321 **/
1322
1323int
1324e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1325{
1326 int i, err = 0;
1327
f56799ea 1328 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1329 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1330 if (err) {
1331 DPRINTK(PROBE, ERR,
1332 "Allocation for Tx Queue %u failed\n", i);
1333 break;
1334 }
1335 }
1336
1337 return err;
1338}
1339
1da177e4
LT		 1340/**
1341 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1342 * @adapter: board private structure
1343 *
1344 * Configure the Tx unit of the MAC after a reset.
1345 **/
1346
1347static void
1348e1000_configure_tx(struct e1000_adapter *adapter)
1349{
581d708e
MC		 1350 uint64_t tdba;
1351 struct e1000_hw *hw = &adapter->hw;
1352 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1353 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1354
1355 /* Setup the HW Tx Head and Tail descriptor pointers */
1356
f56799ea 1357 switch (adapter->num_tx_queues) {
24025e4e
MC		 1358 case 1:
1359 default:
581d708e
MC		 1360 tdba = adapter->tx_ring[0].dma;
1361 tdlen = adapter->tx_ring[0].count *
1362 sizeof(struct e1000_tx_desc);
1363 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1364 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1365 E1000_WRITE_REG(hw, TDLEN, tdlen);
1366 E1000_WRITE_REG(hw, TDH, 0);
1367 E1000_WRITE_REG(hw, TDT, 0);
1368 adapter->tx_ring[0].tdh = E1000_TDH;
1369 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1370 break;
1371 }
1da177e4
LT		 1372
1373 /* Set the default values for the Tx Inter Packet Gap timer */
1374
0fadb059
JK		 1375 if (hw->media_type == e1000_media_type_fiber ||
1376 hw->media_type == e1000_media_type_internal_serdes)
1377 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1378 else
1379 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1380
581d708e 1381 switch (hw->mac_type) {
1da177e4
LT		 1382 case e1000_82542_rev2_0:
1383 case e1000_82542_rev2_1:
1384 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1385 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1386 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1387 break;
1388 default:
0fadb059
JK		 1389 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1390 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1391 break;
1da177e4 1392 }
0fadb059
JK		 1393 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1394 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1395 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1396
1397 /* Set the Tx Interrupt Delay register */
1398
581d708e
MC		 1399 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1400 if (hw->mac_type >= e1000_82540)
1401 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1402
1403 /* Program the Transmit Control Register */
1404
581d708e 1405 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1406
1407 tctl &= ~E1000_TCTL_CT;
7e6c9861 1408 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1409 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1410
7e6c9861
JK		 1411#ifdef DISABLE_MULR
1412 /* disable Multiple Reads for debugging */
1413 tctl &= ~E1000_TCTL_MULR;
1414#endif
1da177e4 1415
2ae76d98
MC		 1416 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1417 tarc = E1000_READ_REG(hw, TARC0);
1418 tarc |= ((1 << 25) | (1 << 21));
1419 E1000_WRITE_REG(hw, TARC0, tarc);
1420 tarc = E1000_READ_REG(hw, TARC1);
1421 tarc |= (1 << 25);
1422 if (tctl & E1000_TCTL_MULR)
1423 tarc &= ~(1 << 28);
1424 else
1425 tarc |= (1 << 28);
1426 E1000_WRITE_REG(hw, TARC1, tarc);
1427 }
1428
581d708e 1429 e1000_config_collision_dist(hw);
1da177e4
LT		 1430
1431 /* Setup Transmit Descriptor Settings for eop descriptor */
1432 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1433 E1000_TXD_CMD_IFCS;
1434
581d708e 1435 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1436 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1437 else
1438 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1439
1440 /* Cache if we're 82544 running in PCI-X because we'll
1441 * need this to apply a workaround later in the send path. */
581d708e
MC		 1442 if (hw->mac_type == e1000_82544 &&
1443 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1444 adapter->pcix_82544 = 1;
7e6c9861
JK		 1445
1446 E1000_WRITE_REG(hw, TCTL, tctl);
1447
1da177e4
LT		 1448}
1449
1450/**
1451 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1452 * @adapter: board private structure
581d708e 1453 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1454 *
1455 * Returns 0 on success, negative on failure
1456 **/
1457
3ad2cc67 1458static int
581d708e
MC		 1459e1000_setup_rx_resources(struct e1000_adapter *adapter,
1460 struct e1000_rx_ring *rxdr)
1da177e4 1461{
1da177e4 1462 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1463 int size, desc_len;
1da177e4
LT		 1464
1465 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1466 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1467 if (!rxdr->buffer_info) {
2648345f
MC		 1468 DPRINTK(PROBE, ERR,
1469 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1470 return -ENOMEM;
1471 }
1472 memset(rxdr->buffer_info, 0, size);
1473
2d7edb92
MC		 1474 size = sizeof(struct e1000_ps_page) * rxdr->count;
1475 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1476 if (!rxdr->ps_page) {
2d7edb92
MC		 1477 vfree(rxdr->buffer_info);
1478 DPRINTK(PROBE, ERR,
1479 "Unable to allocate memory for the receive descriptor ring\n");
1480 return -ENOMEM;
1481 }
1482 memset(rxdr->ps_page, 0, size);
1483
1484 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1485 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1486 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1487 vfree(rxdr->buffer_info);
1488 kfree(rxdr->ps_page);
1489 DPRINTK(PROBE, ERR,
1490 "Unable to allocate memory for the receive descriptor ring\n");
1491 return -ENOMEM;
1492 }
1493 memset(rxdr->ps_page_dma, 0, size);
1494
96838a40 1495 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1496 desc_len = sizeof(struct e1000_rx_desc);
1497 else
1498 desc_len = sizeof(union e1000_rx_desc_packet_split);
1499
1da177e4
LT		 1500 /* Round up to nearest 4K */
1501
2d7edb92 1502 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1503 E1000_ROUNDUP(rxdr->size, 4096);
1504
1505 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1506
581d708e
MC		 1507 if (!rxdr->desc) {
1508 DPRINTK(PROBE, ERR,
1509 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1510setup_rx_desc_die:
1da177e4 1511 vfree(rxdr->buffer_info);
2d7edb92
MC		 1512 kfree(rxdr->ps_page);
1513 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1514 return -ENOMEM;
1515 }
1516
2648345f 1517 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1518 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1519 void *olddesc = rxdr->desc;
1520 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1521 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1522 "at %p\n", rxdr->size, rxdr->desc);
1523 /* Try again, without freeing the previous */
1da177e4 1524 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1525 /* Failed allocation, critical failure */
581d708e 1526 if (!rxdr->desc) {
1da177e4 1527 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1528 DPRINTK(PROBE, ERR,
1529 "Unable to allocate memory "
1530 "for the receive descriptor ring\n");
1da177e4
LT		 1531 goto setup_rx_desc_die;
1532 }
1533
1534 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1535 /* give up */
2648345f
MC		 1536 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1537 rxdr->dma);
1da177e4 1538 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1539 DPRINTK(PROBE, ERR,
1540 "Unable to allocate aligned memory "
1541 "for the receive descriptor ring\n");
581d708e 1542 goto setup_rx_desc_die;
1da177e4 1543 } else {
2648345f 1544 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1545 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1546 }
1547 }
1548 memset(rxdr->desc, 0, rxdr->size);
1549
1550 rxdr->next_to_clean = 0;
1551 rxdr->next_to_use = 0;
1552
1553 return 0;
1554}
1555
581d708e
MC		 1556/**
1557 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1558 * (Descriptors) for all queues
1559 * @adapter: board private structure
1560 *
1561 * If this function returns with an error, then it's possible one or
1562 * more of the rings is populated (while the rest are not). It is the
1563 * callers duty to clean those orphaned rings.
1564 *
1565 * Return 0 on success, negative on failure
1566 **/
1567
1568int
1569e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1570{
1571 int i, err = 0;
1572
f56799ea 1573 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1574 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1575 if (err) {
1576 DPRINTK(PROBE, ERR,
1577 "Allocation for Rx Queue %u failed\n", i);
1578 break;
1579 }
1580 }
1581
1582 return err;
1583}
1584
1da177e4 1585/**
2648345f 1586 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1587 * @adapter: Board private structure
1588 **/
e4c811c9
MC		 1589#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1590 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1591static void
1592e1000_setup_rctl(struct e1000_adapter *adapter)
1593{
2d7edb92
MC		 1594 uint32_t rctl, rfctl;
1595 uint32_t psrctl = 0;
35ec56bb 1596#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1597 uint32_t pages = 0;
1598#endif
1da177e4
LT		 1599
1600 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1601
1602 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1603
1604 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1605 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1606 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1607
0fadb059
JK		 1608 if (adapter->hw.mac_type > e1000_82543)
1609 rctl |= E1000_RCTL_SECRC;
1610
1611 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1612 rctl |= E1000_RCTL_SBP;
1613 else
1614 rctl &= ~E1000_RCTL_SBP;
1615
2d7edb92
MC		 1616 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1617 rctl &= ~E1000_RCTL_LPE;
1618 else
1619 rctl |= E1000_RCTL_LPE;
1620
1da177e4 1621 /* Setup buffer sizes */
96838a40 1622 if (adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1623 /* We can now specify buffers in 1K increments.
1624 * BSIZE and BSEX are ignored in this case. */
1625 rctl |= adapter->rx_buffer_len << 0x11;
1626 } else {
1627 rctl &= ~E1000_RCTL_SZ_4096;
a1415ee6
JK		 1628 rctl |= E1000_RCTL_BSEX;
1629 switch (adapter->rx_buffer_len) {
1630 case E1000_RXBUFFER_2048:
1631 default:
1632 rctl |= E1000_RCTL_SZ_2048;
1633 rctl &= ~E1000_RCTL_BSEX;
1634 break;
1635 case E1000_RXBUFFER_4096:
1636 rctl |= E1000_RCTL_SZ_4096;
1637 break;
1638 case E1000_RXBUFFER_8192:
1639 rctl |= E1000_RCTL_SZ_8192;
1640 break;
1641 case E1000_RXBUFFER_16384:
1642 rctl |= E1000_RCTL_SZ_16384;
1643 break;
1644 }
2d7edb92
MC		 1645 }
1646
35ec56bb 1647#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1648 /* 82571 and greater support packet-split where the protocol
1649 * header is placed in skb->data and the packet data is
1650 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1651 * In the case of a non-split, skb->data is linearly filled,
1652 * followed by the page buffers. Therefore, skb->data is
1653 * sized to hold the largest protocol header.
1654 */
e4c811c9
MC		 1655 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1656 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1657 PAGE_SIZE <= 16384)
1658 adapter->rx_ps_pages = pages;
1659 else
1660 adapter->rx_ps_pages = 0;
2d7edb92 1661#endif
e4c811c9 1662 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1663 /* Configure extra packet-split registers */
1664 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1665 rfctl |= E1000_RFCTL_EXTEN;
1666 /* disable IPv6 packet split support */
1667 rfctl |= E1000_RFCTL_IPV6_DIS;
1668 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1669
1670 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1671
2d7edb92
MC		 1672 psrctl |= adapter->rx_ps_bsize0 >>
1673 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1674
1675 switch (adapter->rx_ps_pages) {
1676 case 3:
1677 psrctl |= PAGE_SIZE <<
1678 E1000_PSRCTL_BSIZE3_SHIFT;
1679 case 2:
1680 psrctl |= PAGE_SIZE <<
1681 E1000_PSRCTL_BSIZE2_SHIFT;
1682 case 1:
1683 psrctl |= PAGE_SIZE >>
1684 E1000_PSRCTL_BSIZE1_SHIFT;
1685 break;
1686 }
2d7edb92
MC		 1687
1688 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1689 }
1690
1691 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1692}
1693
1694/**
1695 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1696 * @adapter: board private structure
1697 *
1698 * Configure the Rx unit of the MAC after a reset.
1699 **/
1700
1701static void
1702e1000_configure_rx(struct e1000_adapter *adapter)
1703{
581d708e
MC		 1704 uint64_t rdba;
1705 struct e1000_hw *hw = &adapter->hw;
1706 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1707
e4c811c9 1708 if (adapter->rx_ps_pages) {
581d708e 1709 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1710 sizeof(union e1000_rx_desc_packet_split);
1711 adapter->clean_rx = e1000_clean_rx_irq_ps;
1712 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1713 } else {
581d708e
MC		 1714 rdlen = adapter->rx_ring[0].count *
1715 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1716 adapter->clean_rx = e1000_clean_rx_irq;
1717 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1718 }
1da177e4
LT		 1719
1720 /* disable receives while setting up the descriptors */
581d708e
MC		 1721 rctl = E1000_READ_REG(hw, RCTL);
1722 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1723
1724 /* set the Receive Delay Timer Register */
581d708e 1725 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1726
581d708e
MC		 1727 if (hw->mac_type >= e1000_82540) {
1728 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1729 if (adapter->itr > 1)
581d708e 1730 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1731 1000000000 / (adapter->itr * 256));
1732 }
1733
2ae76d98 1734 if (hw->mac_type >= e1000_82571) {
2ae76d98 1735 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1736 /* Reset delay timers after every interrupt */
2ae76d98 1737 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1738#ifdef CONFIG_E1000_NAPI
1739 /* Auto-Mask interrupts upon ICR read. */
1740 ctrl_ext |= E1000_CTRL_EXT_IAME;
1741#endif
2ae76d98 1742 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1743 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1744 E1000_WRITE_FLUSH(hw);
1745 }
1746
581d708e
MC		 1747 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1748 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1749 switch (adapter->num_rx_queues) {
24025e4e
MC		 1750 case 1:
1751 default:
581d708e
MC		 1752 rdba = adapter->rx_ring[0].dma;
1753 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1754 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1755 E1000_WRITE_REG(hw, RDLEN, rdlen);
1756 E1000_WRITE_REG(hw, RDH, 0);
1757 E1000_WRITE_REG(hw, RDT, 0);
1758 adapter->rx_ring[0].rdh = E1000_RDH;
1759 adapter->rx_ring[0].rdt = E1000_RDT;
1760 break;
24025e4e
MC		 1761 }
1762
1da177e4 1763 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1764 if (hw->mac_type >= e1000_82543) {
1765 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1766 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1767 rxcsum |= E1000_RXCSUM_TUOFL;
1768
868d5309 1769 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1770 * Must be used in conjunction with packet-split. */
96838a40
JB		 1771 if ((hw->mac_type >= e1000_82571) &&
1772 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1773 rxcsum |= E1000_RXCSUM_IPPCSE;
1774 }
1775 } else {
1776 rxcsum &= ~E1000_RXCSUM_TUOFL;
1777 /* don't need to clear IPPCSE as it defaults to 0 */
1778 }
581d708e 1779 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1780 }
1781
581d708e
MC		 1782 if (hw->mac_type == e1000_82573)
1783 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1784
1da177e4 1785 /* Enable Receives */
581d708e 1786 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1787}
1788
1789/**
581d708e 1790 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1791 * @adapter: board private structure
581d708e 1792 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1793 *
1794 * Free all transmit software resources
1795 **/
1796
3ad2cc67 1797static void
581d708e
MC		 1798e1000_free_tx_resources(struct e1000_adapter *adapter,
1799 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1800{
1801 struct pci_dev *pdev = adapter->pdev;
1802
581d708e 1803 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1804
581d708e
MC		 1805 vfree(tx_ring->buffer_info);
1806 tx_ring->buffer_info = NULL;
1da177e4 1807
581d708e 1808 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1809
581d708e
MC		 1810 tx_ring->desc = NULL;
1811}
1812
1813/**
1814 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1815 * @adapter: board private structure
1816 *
1817 * Free all transmit software resources
1818 **/
1819
1820void
1821e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1822{
1823 int i;
1824
f56799ea 1825 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1826 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1827}
1828
1829static inline void
1830e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1831 struct e1000_buffer *buffer_info)
1832{
96838a40 1833 if (buffer_info->dma) {
2648345f
MC		 1834 pci_unmap_page(adapter->pdev,
1835 buffer_info->dma,
1836 buffer_info->length,
1837 PCI_DMA_TODEVICE);
1da177e4 1838 }
8241e35e 1839 if (buffer_info->skb)
1da177e4 1840 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1841 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1842}
1843
1844/**
1845 * e1000_clean_tx_ring - Free Tx Buffers
1846 * @adapter: board private structure
581d708e 1847 * @tx_ring: ring to be cleaned
1da177e4
LT		 1848 **/
1849
1850static void
581d708e
MC		 1851e1000_clean_tx_ring(struct e1000_adapter *adapter,
1852 struct e1000_tx_ring *tx_ring)
1da177e4 1853{
1da177e4
LT		 1854 struct e1000_buffer *buffer_info;
1855 unsigned long size;
1856 unsigned int i;
1857
1858 /* Free all the Tx ring sk_buffs */
1859
96838a40 1860 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1861 buffer_info = &tx_ring->buffer_info[i];
1862 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1863 }
1864
1865 size = sizeof(struct e1000_buffer) * tx_ring->count;
1866 memset(tx_ring->buffer_info, 0, size);
1867
1868 /* Zero out the descriptor ring */
1869
1870 memset(tx_ring->desc, 0, tx_ring->size);
1871
1872 tx_ring->next_to_use = 0;
1873 tx_ring->next_to_clean = 0;
fd803241 1874 tx_ring->last_tx_tso = 0;
1da177e4 1875
581d708e
MC		 1876 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1877 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1878}
1879
1880/**
1881 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1882 * @adapter: board private structure
1883 **/
1884
1885static void
1886e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1887{
1888 int i;
1889
f56799ea 1890 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1891 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1892}
1893
1894/**
1895 * e1000_free_rx_resources - Free Rx Resources
1896 * @adapter: board private structure
581d708e 1897 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1898 *
1899 * Free all receive software resources
1900 **/
1901
3ad2cc67 1902static void
581d708e
MC		 1903e1000_free_rx_resources(struct e1000_adapter *adapter,
1904 struct e1000_rx_ring *rx_ring)
1da177e4 1905{
1da177e4
LT		 1906 struct pci_dev *pdev = adapter->pdev;
1907
581d708e 1908 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1909
1910 vfree(rx_ring->buffer_info);
1911 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1912 kfree(rx_ring->ps_page);
1913 rx_ring->ps_page = NULL;
1914 kfree(rx_ring->ps_page_dma);
1915 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1916
1917 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1918
1919 rx_ring->desc = NULL;
1920}
1921
1922/**
581d708e 1923 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1924 * @adapter: board private structure
581d708e
MC		 1925 *
1926 * Free all receive software resources
1927 **/
1928
1929void
1930e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1931{
1932 int i;
1933
f56799ea 1934 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1935 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1936}
1937
1938/**
1939 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1940 * @adapter: board private structure
1941 * @rx_ring: ring to free buffers from
1da177e4
LT		 1942 **/
1943
1944static void
581d708e
MC		 1945e1000_clean_rx_ring(struct e1000_adapter *adapter,
1946 struct e1000_rx_ring *rx_ring)
1da177e4 1947{
1da177e4 1948 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1949 struct e1000_ps_page *ps_page;
1950 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1951 struct pci_dev *pdev = adapter->pdev;
1952 unsigned long size;
2d7edb92 1953 unsigned int i, j;
1da177e4
LT		 1954
1955 /* Free all the Rx ring sk_buffs */
96838a40 1956 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1957 buffer_info = &rx_ring->buffer_info[i];
96838a40 1958 if (buffer_info->skb) {
1da177e4
LT		 1959 pci_unmap_single(pdev,
1960 buffer_info->dma,
1961 buffer_info->length,
1962 PCI_DMA_FROMDEVICE);
1963
1964 dev_kfree_skb(buffer_info->skb);
1965 buffer_info->skb = NULL;
997f5cbd
JK		 1966 }
1967 ps_page = &rx_ring->ps_page[i];
1968 ps_page_dma = &rx_ring->ps_page_dma[i];
1969 for (j = 0; j < adapter->rx_ps_pages; j++) {
1970 if (!ps_page->ps_page[j]) break;
1971 pci_unmap_page(pdev,
1972 ps_page_dma->ps_page_dma[j],
1973 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1974 ps_page_dma->ps_page_dma[j] = 0;
1975 put_page(ps_page->ps_page[j]);
1976 ps_page->ps_page[j] = NULL;
1da177e4
LT		 1977 }
1978 }
1979
1980 size = sizeof(struct e1000_buffer) * rx_ring->count;
1981 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 1982 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1983 memset(rx_ring->ps_page, 0, size);
1984 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1985 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 1986
1987 /* Zero out the descriptor ring */
1988
1989 memset(rx_ring->desc, 0, rx_ring->size);
1990
1991 rx_ring->next_to_clean = 0;
1992 rx_ring->next_to_use = 0;
1993
581d708e
MC		 1994 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1995 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1996}
1997
1998/**
1999 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2000 * @adapter: board private structure
2001 **/
2002
2003static void
2004e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2005{
2006 int i;
2007
f56799ea 2008 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2009 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2010}
2011
2012/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2013 * and memory write and invalidate disabled for certain operations
2014 */
2015static void
2016e1000_enter_82542_rst(struct e1000_adapter *adapter)
2017{
2018 struct net_device *netdev = adapter->netdev;
2019 uint32_t rctl;
2020
2021 e1000_pci_clear_mwi(&adapter->hw);
2022
2023 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2024 rctl |= E1000_RCTL_RST;
2025 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2026 E1000_WRITE_FLUSH(&adapter->hw);
2027 mdelay(5);
2028
96838a40 2029 if (netif_running(netdev))
581d708e 2030 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2031}
2032
2033static void
2034e1000_leave_82542_rst(struct e1000_adapter *adapter)
2035{
2036 struct net_device *netdev = adapter->netdev;
2037 uint32_t rctl;
2038
2039 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2040 rctl &= ~E1000_RCTL_RST;
2041 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2042 E1000_WRITE_FLUSH(&adapter->hw);
2043 mdelay(5);
2044
96838a40 2045 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2046 e1000_pci_set_mwi(&adapter->hw);
2047
96838a40 2048 if (netif_running(netdev)) {
72d64a43
JK		 2049 /* No need to loop, because 82542 supports only 1 queue */
2050 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2051 e1000_configure_rx(adapter);
72d64a43 2052 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2053 }
2054}
2055
2056/**
2057 * e1000_set_mac - Change the Ethernet Address of the NIC
2058 * @netdev: network interface device structure
2059 * @p: pointer to an address structure
2060 *
2061 * Returns 0 on success, negative on failure
2062 **/
2063
2064static int
2065e1000_set_mac(struct net_device *netdev, void *p)
2066{
60490fe0 2067 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2068 struct sockaddr *addr = p;
2069
96838a40 2070 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2071 return -EADDRNOTAVAIL;
2072
2073 /* 82542 2.0 needs to be in reset to write receive address registers */
2074
96838a40 2075 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2076 e1000_enter_82542_rst(adapter);
2077
2078 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2079 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2080
2081 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2082
868d5309
MC		 2083 /* With 82571 controllers, LAA may be overwritten (with the default)
2084 * due to controller reset from the other port. */
2085 if (adapter->hw.mac_type == e1000_82571) {
2086 /* activate the work around */
2087 adapter->hw.laa_is_present = 1;
2088
96838a40
JB		 2089 /* Hold a copy of the LAA in RAR[14] This is done so that
2090 * between the time RAR[0] gets clobbered and the time it
2091 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2092 * of the RARs and no incoming packets directed to this port
96838a40 2093 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2094 * RAR[14] */
96838a40 2095 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2096 E1000_RAR_ENTRIES - 1);
2097 }
2098
96838a40 2099 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2100 e1000_leave_82542_rst(adapter);
2101
2102 return 0;
2103}
2104
2105/**
2106 * e1000_set_multi - Multicast and Promiscuous mode set
2107 * @netdev: network interface device structure
2108 *
2109 * The set_multi entry point is called whenever the multicast address
2110 * list or the network interface flags are updated. This routine is
2111 * responsible for configuring the hardware for proper multicast,
2112 * promiscuous mode, and all-multi behavior.
2113 **/
2114
2115static void
2116e1000_set_multi(struct net_device *netdev)
2117{
60490fe0 2118 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2119 struct e1000_hw *hw = &adapter->hw;
2120 struct dev_mc_list *mc_ptr;
2121 uint32_t rctl;
2122 uint32_t hash_value;
868d5309 2123 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2124
868d5309
MC		 2125 /* reserve RAR[14] for LAA over-write work-around */
2126 if (adapter->hw.mac_type == e1000_82571)
2127 rar_entries--;
1da177e4 2128
2648345f
MC		 2129 /* Check for Promiscuous and All Multicast modes */
2130
1da177e4
LT		 2131 rctl = E1000_READ_REG(hw, RCTL);
2132
96838a40 2133 if (netdev->flags & IFF_PROMISC) {
1da177e4 2134 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2135 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2136 rctl |= E1000_RCTL_MPE;
2137 rctl &= ~E1000_RCTL_UPE;
2138 } else {
2139 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2140 }
2141
2142 E1000_WRITE_REG(hw, RCTL, rctl);
2143
2144 /* 82542 2.0 needs to be in reset to write receive address registers */
2145
96838a40 2146 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2147 e1000_enter_82542_rst(adapter);
2148
2149 /* load the first 14 multicast address into the exact filters 1-14
2150 * RAR 0 is used for the station MAC adddress
2151 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2152 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2153 */
2154 mc_ptr = netdev->mc_list;
2155
96838a40 2156 for (i = 1; i < rar_entries; i++) {
868d5309 2157 if (mc_ptr) {
1da177e4
LT		 2158 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2159 mc_ptr = mc_ptr->next;
2160 } else {
2161 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2162 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2163 }
2164 }
2165
2166 /* clear the old settings from the multicast hash table */
2167
96838a40 2168 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2169 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2170
2171 /* load any remaining addresses into the hash table */
2172
96838a40 2173 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2174 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2175 e1000_mta_set(hw, hash_value);
2176 }
2177
96838a40 2178 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2179 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2180}
2181
2182/* Need to wait a few seconds after link up to get diagnostic information from
2183 * the phy */
2184
2185static void
2186e1000_update_phy_info(unsigned long data)
2187{
2188 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2189 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2190}
2191
2192/**
2193 * e1000_82547_tx_fifo_stall - Timer Call-back
2194 * @data: pointer to adapter cast into an unsigned long
2195 **/
2196
2197static void
2198e1000_82547_tx_fifo_stall(unsigned long data)
2199{
2200 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2201 struct net_device *netdev = adapter->netdev;
2202 uint32_t tctl;
2203
96838a40
JB		 2204 if (atomic_read(&adapter->tx_fifo_stall)) {
2205 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2206 E1000_READ_REG(&adapter->hw, TDH)) &&
2207 (E1000_READ_REG(&adapter->hw, TDFT) ==
2208 E1000_READ_REG(&adapter->hw, TDFH)) &&
2209 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2210 E1000_READ_REG(&adapter->hw, TDFHS))) {
2211 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2212 E1000_WRITE_REG(&adapter->hw, TCTL,
2213 tctl & ~E1000_TCTL_EN);
2214 E1000_WRITE_REG(&adapter->hw, TDFT,
2215 adapter->tx_head_addr);
2216 E1000_WRITE_REG(&adapter->hw, TDFH,
2217 adapter->tx_head_addr);
2218 E1000_WRITE_REG(&adapter->hw, TDFTS,
2219 adapter->tx_head_addr);
2220 E1000_WRITE_REG(&adapter->hw, TDFHS,
2221 adapter->tx_head_addr);
2222 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2223 E1000_WRITE_FLUSH(&adapter->hw);
2224
2225 adapter->tx_fifo_head = 0;
2226 atomic_set(&adapter->tx_fifo_stall, 0);
2227 netif_wake_queue(netdev);
2228 } else {
2229 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2230 }
2231 }
2232}
2233
2234/**
2235 * e1000_watchdog - Timer Call-back
2236 * @data: pointer to adapter cast into an unsigned long
2237 **/
2238static void
2239e1000_watchdog(unsigned long data)
2240{
2241 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2242
2243 /* Do the rest outside of interrupt context */
2244 schedule_work(&adapter->watchdog_task);
2245}
2246
2247static void
2248e1000_watchdog_task(struct e1000_adapter *adapter)
2249{
2250 struct net_device *netdev = adapter->netdev;
545c67c0 2251 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2252 uint32_t link, tctl;
1da177e4
LT		 2253
2254 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2255 if (adapter->hw.mac_type == e1000_82573) {
2256 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2257 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2258 e1000_update_mng_vlan(adapter);
96838a40 2259 }
1da177e4 2260
96838a40 2261 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2262 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2263 link = !adapter->hw.serdes_link_down;
2264 else
2265 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2266
96838a40
JB		 2267 if (link) {
2268 if (!netif_carrier_ok(netdev)) {
1da177e4
LT		 2269 e1000_get_speed_and_duplex(&adapter->hw,
2270 &adapter->link_speed,
2271 &adapter->link_duplex);
2272
2273 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2274 adapter->link_speed,
2275 adapter->link_duplex == FULL_DUPLEX ?
2276 "Full Duplex" : "Half Duplex");
2277
7e6c9861
JK		 2278 /* tweak tx_queue_len according to speed/duplex
2279 * and adjust the timeout factor */
66a2b0a3
JK		 2280 netdev->tx_queue_len = adapter->tx_queue_len;
2281 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2282 adapter->txb2b = 1;
2283 switch (adapter->link_speed) {
2284 case SPEED_10:
2285 adapter->txb2b = 0;
2286 netdev->tx_queue_len = 10;
2287 adapter->tx_timeout_factor = 8;
2288 break;
2289 case SPEED_100:
2290 adapter->txb2b = 0;
2291 netdev->tx_queue_len = 100;
2292 /* maybe add some timeout factor ? */
2293 break;
2294 }
2295
2296 if ((adapter->hw.mac_type == e1000_82571 ||
2297 adapter->hw.mac_type == e1000_82572) &&
2298 adapter->txb2b == 0) {
2299#define SPEED_MODE_BIT (1 << 21)
2300 uint32_t tarc0;
2301 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2302 tarc0 &= ~SPEED_MODE_BIT;
2303 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2304 }
2305
2306#ifdef NETIF_F_TSO
2307 /* disable TSO for pcie and 10/100 speeds, to avoid
2308 * some hardware issues */
2309 if (!adapter->tso_force &&
2310 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2311 switch (adapter->link_speed) {
2312 case SPEED_10:
66a2b0a3 2313 case SPEED_100:
7e6c9861
JK		 2314 DPRINTK(PROBE,INFO,
2315 "10/100 speed: disabling TSO\n");
2316 netdev->features &= ~NETIF_F_TSO;
2317 break;
2318 case SPEED_1000:
2319 netdev->features |= NETIF_F_TSO;
2320 break;
2321 default:
2322 /* oops */
66a2b0a3
JK		 2323 break;
2324 }
2325 }
7e6c9861
JK		 2326#endif
2327
2328 /* enable transmits in the hardware, need to do this
2329 * after setting TARC0 */
2330 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2331 tctl |= E1000_TCTL_EN;
2332 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2333
1da177e4
LT		 2334 netif_carrier_on(netdev);
2335 netif_wake_queue(netdev);
2336 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2337 adapter->smartspeed = 0;
2338 }
2339 } else {
96838a40 2340 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2341 adapter->link_speed = 0;
2342 adapter->link_duplex = 0;
2343 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2344 netif_carrier_off(netdev);
2345 netif_stop_queue(netdev);
2346 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2347 }
2348
2349 e1000_smartspeed(adapter);
2350 }
2351
2352 e1000_update_stats(adapter);
2353
2354 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2355 adapter->tpt_old = adapter->stats.tpt;
2356 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2357 adapter->colc_old = adapter->stats.colc;
2358
2359 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2360 adapter->gorcl_old = adapter->stats.gorcl;
2361 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2362 adapter->gotcl_old = adapter->stats.gotcl;
2363
2364 e1000_update_adaptive(&adapter->hw);
2365
f56799ea 2366 if (!netif_carrier_ok(netdev)) {
581d708e 2367 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2368 /* We've lost link, so the controller stops DMA,
2369 * but we've got queued Tx work that's never going
2370 * to get done, so reset controller to flush Tx.
2371 * (Do the reset outside of interrupt context). */
2372 schedule_work(&adapter->tx_timeout_task);
2373 }
2374 }
2375
2376 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2377 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2378 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2379 * asymmetrical Tx or Rx gets ITR=8000; everyone
2380 * else is between 2000-8000. */
2381 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2382 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2383 adapter->gotcl - adapter->gorcl :
2384 adapter->gorcl - adapter->gotcl) / 10000;
2385 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2386 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2387 }
2388
2389 /* Cause software interrupt to ensure rx ring is cleaned */
2390 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2391
2648345f 2392 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2393 adapter->detect_tx_hung = TRUE;
2394
96838a40 2395 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2396 * reset from the other port. Set the appropriate LAA in RAR[0] */
2397 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2398 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2399
1da177e4
LT		 2400 /* Reset the timer */
2401 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2402}
2403
2404#define E1000_TX_FLAGS_CSUM 0x00000001
2405#define E1000_TX_FLAGS_VLAN 0x00000002
2406#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2407#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2408#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2409#define E1000_TX_FLAGS_VLAN_SHIFT 16
2410
2411static inline int
581d708e
MC		 2412e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2413 struct sk_buff *skb)
1da177e4
LT		 2414{
2415#ifdef NETIF_F_TSO
2416 struct e1000_context_desc *context_desc;
545c67c0 2417 struct e1000_buffer *buffer_info;
1da177e4
LT		 2418 unsigned int i;
2419 uint32_t cmd_length = 0;
2d7edb92 2420 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2421 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2422 int err;
2423
96838a40 2424 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2425 if (skb_header_cloned(skb)) {
2426 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2427 if (err)
2428 return err;
2429 }
2430
2431 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2432 mss = skb_shinfo(skb)->tso_size;
96838a40 2433 if (skb->protocol == ntohs(ETH_P_IP)) {
2d7edb92
MC		 2434 skb->nh.iph->tot_len = 0;
2435 skb->nh.iph->check = 0;
2436 skb->h.th->check =
2437 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2438 skb->nh.iph->daddr,
2439 0,
2440 IPPROTO_TCP,
2441 0);
2442 cmd_length = E1000_TXD_CMD_IP;
2443 ipcse = skb->h.raw - skb->data - 1;
2444#ifdef NETIF_F_TSO_IPV6
96838a40 2445 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2446 skb->nh.ipv6h->payload_len = 0;
2447 skb->h.th->check =
2448 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2449 &skb->nh.ipv6h->daddr,
2450 0,
2451 IPPROTO_TCP,
2452 0);
2453 ipcse = 0;
2454#endif
2455 }
1da177e4
LT		 2456 ipcss = skb->nh.raw - skb->data;
2457 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2458 tucss = skb->h.raw - skb->data;
2459 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2460 tucse = 0;
2461
2462 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2463 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2464
581d708e
MC		 2465 i = tx_ring->next_to_use;
2466 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2467 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2468
2469 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2470 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2471 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2472 context_desc->upper_setup.tcp_fields.tucss = tucss;
2473 context_desc->upper_setup.tcp_fields.tucso = tucso;
2474 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2475 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2476 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2477 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2478
545c67c0
JK		 2479 buffer_info->time_stamp = jiffies;
2480
581d708e
MC		 2481 if (++i == tx_ring->count) i = 0;
2482 tx_ring->next_to_use = i;
1da177e4 2483
8241e35e 2484 return TRUE;
1da177e4
LT		 2485 }
2486#endif
2487
8241e35e 2488 return FALSE;
1da177e4
LT		 2489}
2490
2491static inline boolean_t
581d708e
MC		 2492e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2493 struct sk_buff *skb)
1da177e4
LT		 2494{
2495 struct e1000_context_desc *context_desc;
545c67c0 2496 struct e1000_buffer *buffer_info;
1da177e4
LT		 2497 unsigned int i;
2498 uint8_t css;
2499
96838a40 2500 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2501 css = skb->h.raw - skb->data;
2502
581d708e 2503 i = tx_ring->next_to_use;
545c67c0 2504 buffer_info = &tx_ring->buffer_info[i];
581d708e 2505 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2506
2507 context_desc->upper_setup.tcp_fields.tucss = css;
2508 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2509 context_desc->upper_setup.tcp_fields.tucse = 0;
2510 context_desc->tcp_seg_setup.data = 0;
2511 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2512
545c67c0
JK		 2513 buffer_info->time_stamp = jiffies;
2514
581d708e
MC		 2515 if (unlikely(++i == tx_ring->count)) i = 0;
2516 tx_ring->next_to_use = i;
1da177e4
LT		 2517
2518 return TRUE;
2519 }
2520
2521 return FALSE;
2522}
2523
2524#define E1000_MAX_TXD_PWR 12
2525#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2526
2527static inline int
581d708e
MC		 2528e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2529 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2530 unsigned int nr_frags, unsigned int mss)
1da177e4 2531{
1da177e4
LT		 2532 struct e1000_buffer *buffer_info;
2533 unsigned int len = skb->len;
2534 unsigned int offset = 0, size, count = 0, i;
2535 unsigned int f;
2536 len -= skb->data_len;
2537
2538 i = tx_ring->next_to_use;
2539
96838a40 2540 while (len) {
1da177e4
LT		 2541 buffer_info = &tx_ring->buffer_info[i];
2542 size = min(len, max_per_txd);
2543#ifdef NETIF_F_TSO
fd803241
JK		 2544 /* Workaround for Controller erratum --
2545 * descriptor for non-tso packet in a linear SKB that follows a
2546 * tso gets written back prematurely before the data is fully
2547 * DMAd to the controller */
2548 if (!skb->data_len && tx_ring->last_tx_tso &&
2549 !skb_shinfo(skb)->tso_size) {
2550 tx_ring->last_tx_tso = 0;
2551 size -= 4;
2552 }
2553
1da177e4
LT		 2554 /* Workaround for premature desc write-backs
2555 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2556 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2557 size -= 4;
2558#endif
97338bde
MC		 2559 /* work-around for errata 10 and it applies
2560 * to all controllers in PCI-X mode
2561 * The fix is to make sure that the first descriptor of a
2562 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2563 */
96838a40 2564 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2565 (size > 2015) && count == 0))
2566 size = 2015;
96838a40 2567
1da177e4
LT		 2568 /* Workaround for potential 82544 hang in PCI-X. Avoid
2569 * terminating buffers within evenly-aligned dwords. */
96838a40 2570 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2571 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2572 size > 4))
2573 size -= 4;
2574
2575 buffer_info->length = size;
2576 buffer_info->dma =
2577 pci_map_single(adapter->pdev,
2578 skb->data + offset,
2579 size,
2580 PCI_DMA_TODEVICE);
2581 buffer_info->time_stamp = jiffies;
2582
2583 len -= size;
2584 offset += size;
2585 count++;
96838a40 2586 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2587 }
2588
96838a40 2589 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2590 struct skb_frag_struct *frag;
2591
2592 frag = &skb_shinfo(skb)->frags[f];
2593 len = frag->size;
2594 offset = frag->page_offset;
2595
96838a40 2596 while (len) {
1da177e4
LT		 2597 buffer_info = &tx_ring->buffer_info[i];
2598 size = min(len, max_per_txd);
2599#ifdef NETIF_F_TSO
2600 /* Workaround for premature desc write-backs
2601 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2602 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2603 size -= 4;
2604#endif
2605 /* Workaround for potential 82544 hang in PCI-X.
2606 * Avoid terminating buffers within evenly-aligned
2607 * dwords. */
96838a40 2608 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2609 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2610 size > 4))
2611 size -= 4;
2612
2613 buffer_info->length = size;
2614 buffer_info->dma =
2615 pci_map_page(adapter->pdev,
2616 frag->page,
2617 offset,
2618 size,
2619 PCI_DMA_TODEVICE);
2620 buffer_info->time_stamp = jiffies;
2621
2622 len -= size;
2623 offset += size;
2624 count++;
96838a40 2625 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2626 }
2627 }
2628
2629 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2630 tx_ring->buffer_info[i].skb = skb;
2631 tx_ring->buffer_info[first].next_to_watch = i;
2632
2633 return count;
2634}
2635
2636static inline void
581d708e
MC		 2637e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2638 int tx_flags, int count)
1da177e4 2639{
1da177e4
LT		 2640 struct e1000_tx_desc *tx_desc = NULL;
2641 struct e1000_buffer *buffer_info;
2642 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2643 unsigned int i;
2644
96838a40 2645 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2646 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2647 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2648 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2649
96838a40 2650 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2651 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2652 }
2653
96838a40 2654 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2655 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2656 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2657 }
2658
96838a40 2659 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2660 txd_lower |= E1000_TXD_CMD_VLE;
2661 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2662 }
2663
2664 i = tx_ring->next_to_use;
2665
96838a40 2666 while (count--) {
1da177e4
LT		 2667 buffer_info = &tx_ring->buffer_info[i];
2668 tx_desc = E1000_TX_DESC(*tx_ring, i);
2669 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2670 tx_desc->lower.data =
2671 cpu_to_le32(txd_lower | buffer_info->length);
2672 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2673 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2674 }
2675
2676 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2677
2678 /* Force memory writes to complete before letting h/w
2679 * know there are new descriptors to fetch. (Only
2680 * applicable for weak-ordered memory model archs,
2681 * such as IA-64). */
2682 wmb();
2683
2684 tx_ring->next_to_use = i;
581d708e 2685 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2686}
2687
2688/**
2689 * 82547 workaround to avoid controller hang in half-duplex environment.
2690 * The workaround is to avoid queuing a large packet that would span
2691 * the internal Tx FIFO ring boundary by notifying the stack to resend
2692 * the packet at a later time. This gives the Tx FIFO an opportunity to
2693 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2694 * to the beginning of the Tx FIFO.
2695 **/
2696
2697#define E1000_FIFO_HDR 0x10
2698#define E1000_82547_PAD_LEN 0x3E0
2699
2700static inline int
2701e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2702{
2703 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2704 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2705
2706 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2707
96838a40 2708 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2709 goto no_fifo_stall_required;
2710
96838a40 2711 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2712 return 1;
2713
96838a40 2714 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2715 atomic_set(&adapter->tx_fifo_stall, 1);
2716 return 1;
2717 }
2718
2719no_fifo_stall_required:
2720 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2721 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2722 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2723 return 0;
2724}
2725
2d7edb92
MC		 2726#define MINIMUM_DHCP_PACKET_SIZE 282
2727static inline int
2728e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2729{
2730 struct e1000_hw *hw = &adapter->hw;
2731 uint16_t length, offset;
96838a40
JB		 2732 if (vlan_tx_tag_present(skb)) {
2733 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2734 ( adapter->hw.mng_cookie.status &
2735 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2736 return 0;
2737 }
20a44028 2738 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2739 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2740 if ((htons(ETH_P_IP) == eth->h_proto)) {
2741 const struct iphdr *ip =
2d7edb92 2742 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2743 if (IPPROTO_UDP == ip->protocol) {
2744 struct udphdr *udp =
2745 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2746 (ip->ihl << 2));
96838a40 2747 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2748 offset = (uint8_t *)udp + 8 - skb->data;
2749 length = skb->len - offset;
2750
2751 return e1000_mng_write_dhcp_info(hw,
96838a40 2752 (uint8_t *)udp + 8,
2d7edb92
MC		 2753 length);
2754 }
2755 }
2756 }
2757 }
2758 return 0;
2759}
2760
1da177e4
LT		 2761#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2762static int
2763e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2764{
60490fe0 2765 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2766 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2767 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2768 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2769 unsigned int tx_flags = 0;
2770 unsigned int len = skb->len;
2771 unsigned long flags;
2772 unsigned int nr_frags = 0;
2773 unsigned int mss = 0;
2774 int count = 0;
96838a40 2775 int tso;
1da177e4
LT		 2776 unsigned int f;
2777 len -= skb->data_len;
2778
581d708e 2779 tx_ring = adapter->tx_ring;
24025e4e 2780
581d708e 2781 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2782 dev_kfree_skb_any(skb);
2783 return NETDEV_TX_OK;
2784 }
2785
2786#ifdef NETIF_F_TSO
2787 mss = skb_shinfo(skb)->tso_size;
2648345f 2788 /* The controller does a simple calculation to
1da177e4
LT		 2789 * make sure there is enough room in the FIFO before
2790 * initiating the DMA for each buffer. The calc is:
2791 * 4 = ceil(buffer len/mss). To make sure we don't
2792 * overrun the FIFO, adjust the max buffer len if mss
2793 * drops. */
96838a40 2794 if (mss) {
9a3056da 2795 uint8_t hdr_len;
1da177e4
LT		 2796 max_per_txd = min(mss << 2, max_per_txd);
2797 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da
JK		 2798
2799 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2800 * points to just header, pull a few bytes of payload from
2801 * frags into skb->data */
2802 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2803 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2804 (adapter->hw.mac_type == e1000_82571 ||
2805 adapter->hw.mac_type == e1000_82572)) {
d74bbd3b
JK		 2806 unsigned int pull_size;
2807 pull_size = min((unsigned int)4, skb->data_len);
2808 if (!__pskb_pull_tail(skb, pull_size)) {
2809 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2810 dev_kfree_skb_any(skb);
2811 return -EFAULT;
2812 }
9a3056da
JK		 2813 len = skb->len - skb->data_len;
2814 }
1da177e4
LT		 2815 }
2816
9a3056da 2817 /* reserve a descriptor for the offload context */
96838a40 2818 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2819 count++;
2648345f 2820 count++;
1da177e4 2821#else
96838a40 2822 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2823 count++;
2824#endif
fd803241
JK		 2825
2826#ifdef NETIF_F_TSO
2827 /* Controller Erratum workaround */
2828 if (!skb->data_len && tx_ring->last_tx_tso &&
2829 !skb_shinfo(skb)->tso_size)
2830 count++;
2831#endif
2832
1da177e4
LT		 2833 count += TXD_USE_COUNT(len, max_txd_pwr);
2834
96838a40 2835 if (adapter->pcix_82544)
1da177e4
LT		 2836 count++;
2837
96838a40 2838 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2839 * in PCI-X mode, so add one more descriptor to the count
2840 */
96838a40 2841 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2842 (len > 2015)))
2843 count++;
2844
1da177e4 2845 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2846 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2847 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2848 max_txd_pwr);
96838a40 2849 if (adapter->pcix_82544)
1da177e4
LT		 2850 count += nr_frags;
2851
96838a40 2852 if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2d7edb92
MC		 2853 e1000_transfer_dhcp_info(adapter, skb);
2854
581d708e
MC		 2855 local_irq_save(flags);
2856 if (!spin_trylock(&tx_ring->tx_lock)) {
2857 /* Collision - tell upper layer to requeue */
2858 local_irq_restore(flags);
2859 return NETDEV_TX_LOCKED;
2860 }
1da177e4
LT		 2861
2862 /* need: count + 2 desc gap to keep tail from touching
2863 * head, otherwise try next time */
581d708e 2864 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2865 netif_stop_queue(netdev);
581d708e 2866 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2867 return NETDEV_TX_BUSY;
2868 }
2869
96838a40
JB		 2870 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2871 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2872 netif_stop_queue(netdev);
2873 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2874 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2875 return NETDEV_TX_BUSY;
2876 }
2877 }
2878
96838a40 2879 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2880 tx_flags |= E1000_TX_FLAGS_VLAN;
2881 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2882 }
2883
581d708e 2884 first = tx_ring->next_to_use;
96838a40 2885
581d708e 2886 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2887 if (tso < 0) {
2888 dev_kfree_skb_any(skb);
581d708e 2889 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2890 return NETDEV_TX_OK;
2891 }
2892
fd803241
JK		 2893 if (likely(tso)) {
2894 tx_ring->last_tx_tso = 1;
1da177e4 2895 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2896 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2897 tx_flags |= E1000_TX_FLAGS_CSUM;
2898
2d7edb92 2899 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2900 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2901 * no longer assume, we must. */
581d708e 2902 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2903 tx_flags |= E1000_TX_FLAGS_IPV4;
2904
581d708e
MC		 2905 e1000_tx_queue(adapter, tx_ring, tx_flags,
2906 e1000_tx_map(adapter, tx_ring, skb, first,
2907 max_per_txd, nr_frags, mss));
1da177e4
LT		 2908
2909 netdev->trans_start = jiffies;
2910
2911 /* Make sure there is space in the ring for the next send. */
581d708e 2912 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2913 netif_stop_queue(netdev);
2914
581d708e 2915 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2916 return NETDEV_TX_OK;
2917}
2918
2919/**
2920 * e1000_tx_timeout - Respond to a Tx Hang
2921 * @netdev: network interface device structure
2922 **/
2923
2924static void
2925e1000_tx_timeout(struct net_device *netdev)
2926{
60490fe0 2927 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2928
2929 /* Do the reset outside of interrupt context */
2930 schedule_work(&adapter->tx_timeout_task);
2931}
2932
2933static void
2934e1000_tx_timeout_task(struct net_device *netdev)
2935{
60490fe0 2936 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2937
6b7660cd 2938 adapter->tx_timeout_count++;
1da177e4
LT		 2939 e1000_down(adapter);
2940 e1000_up(adapter);
2941}
2942
2943/**
2944 * e1000_get_stats - Get System Network Statistics
2945 * @netdev: network interface device structure
2946 *
2947 * Returns the address of the device statistics structure.
2948 * The statistics are actually updated from the timer callback.
2949 **/
2950
2951static struct net_device_stats *
2952e1000_get_stats(struct net_device *netdev)
2953{
60490fe0 2954 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2955
6b7660cd 2956 /* only return the current stats */
1da177e4
LT		 2957 return &adapter->net_stats;
2958}
2959
2960/**
2961 * e1000_change_mtu - Change the Maximum Transfer Unit
2962 * @netdev: network interface device structure
2963 * @new_mtu: new value for maximum frame size
2964 *
2965 * Returns 0 on success, negative on failure
2966 **/
2967
2968static int
2969e1000_change_mtu(struct net_device *netdev, int new_mtu)
2970{
60490fe0 2971 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2972 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
2973
96838a40
JB		 2974 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2975 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2976 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 2977 return -EINVAL;
2d7edb92 2978 }
1da177e4 2979
997f5cbd
JK		 2980 /* Adapter-specific max frame size limits. */
2981 switch (adapter->hw.mac_type) {
2982 case e1000_82542_rev2_0:
2983 case e1000_82542_rev2_1:
2984 case e1000_82573:
2985 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2986 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 2987 return -EINVAL;
2d7edb92 2988 }
997f5cbd
JK		 2989 break;
2990 case e1000_82571:
2991 case e1000_82572:
2992#define MAX_STD_JUMBO_FRAME_SIZE 9234
2993 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2994 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
2995 return -EINVAL;
2996 }
2997 break;
2998 default:
2999 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3000 break;
1da177e4
LT		 3001 }
3002
997f5cbd 3003
997f5cbd 3004 if (adapter->hw.mac_type > e1000_82547_rev_2) {
a1415ee6 3005 adapter->rx_buffer_len = max_frame;
997f5cbd 3006 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
a1415ee6
JK		 3007 } else {
3008 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
3009 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
3010 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
3011 "on 82542\n");
3012 return -EINVAL;
3013 } else {
3014 if(max_frame <= E1000_RXBUFFER_2048)
3015 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3016 else if(max_frame <= E1000_RXBUFFER_4096)
3017 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3018 else if(max_frame <= E1000_RXBUFFER_8192)
3019 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3020 else if(max_frame <= E1000_RXBUFFER_16384)
3021 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3022 }
3023 }
997f5cbd 3024
2d7edb92
MC		 3025 netdev->mtu = new_mtu;
3026
96838a40 3027 if (netif_running(netdev)) {
1da177e4
LT		 3028 e1000_down(adapter);
3029 e1000_up(adapter);
3030 }
3031
1da177e4
LT		 3032 adapter->hw.max_frame_size = max_frame;
3033
3034 return 0;
3035}
3036
3037/**
3038 * e1000_update_stats - Update the board statistics counters
3039 * @adapter: board private structure
3040 **/
3041
3042void
3043e1000_update_stats(struct e1000_adapter *adapter)
3044{
3045 struct e1000_hw *hw = &adapter->hw;
3046 unsigned long flags;
3047 uint16_t phy_tmp;
3048
3049#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3050
3051 spin_lock_irqsave(&adapter->stats_lock, flags);
3052
3053 /* these counters are modified from e1000_adjust_tbi_stats,
3054 * called from the interrupt context, so they must only
3055 * be written while holding adapter->stats_lock
3056 */
3057
3058 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3059 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3060 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3061 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3062 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3063 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3064 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3065 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3066 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3067 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3068 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3069 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3070 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3071
3072 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3073 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3074 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3075 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3076 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3077 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3078 adapter->stats.dc += E1000_READ_REG(hw, DC);
3079 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3080 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3081 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3082 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3083 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3084 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3085 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3086 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3087 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3088 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3089 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3090 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3091 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3092 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3093 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3094 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3095 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3096 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3097 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3098 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3099 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3100 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3101 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3102 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3103 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3104 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3105 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3106
3107 /* used for adaptive IFS */
3108
3109 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3110 adapter->stats.tpt += hw->tx_packet_delta;
3111 hw->collision_delta = E1000_READ_REG(hw, COLC);
3112 adapter->stats.colc += hw->collision_delta;
3113
96838a40 3114 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3115 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3116 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3117 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3118 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3119 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3120 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3121 }
96838a40 3122 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3123 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3124 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3125 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3126 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3127 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3128 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3129 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3130 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3131 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3132 }
1da177e4
LT		 3133
3134 /* Fill out the OS statistics structure */
3135
3136 adapter->net_stats.rx_packets = adapter->stats.gprc;
3137 adapter->net_stats.tx_packets = adapter->stats.gptc;
3138 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3139 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3140 adapter->net_stats.multicast = adapter->stats.mprc;
3141 adapter->net_stats.collisions = adapter->stats.colc;
3142
3143 /* Rx Errors */
3144
3145 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3146 adapter->stats.crcerrs + adapter->stats.algnerrc +
6b7660cd
JK		 3147 adapter->stats.rlec + adapter->stats.cexterr;
3148 adapter->net_stats.rx_dropped = 0;
1da177e4
LT		 3149 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3150 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3151 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3152 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3153
3154 /* Tx Errors */
3155
3156 adapter->net_stats.tx_errors = adapter->stats.ecol +
3157 adapter->stats.latecol;
3158 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3159 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3160 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3161
3162 /* Tx Dropped needs to be maintained elsewhere */
3163
3164 /* Phy Stats */
3165
96838a40
JB		 3166 if (hw->media_type == e1000_media_type_copper) {
3167 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3168 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3169 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3170 adapter->phy_stats.idle_errors += phy_tmp;
3171 }
3172
96838a40 3173 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3174 (hw->phy_type == e1000_phy_m88) &&
3175 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3176 adapter->phy_stats.receive_errors += phy_tmp;
3177 }
3178
3179 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3180}
3181
3182/**
3183 * e1000_intr - Interrupt Handler
3184 * @irq: interrupt number
3185 * @data: pointer to a network interface device structure
3186 * @pt_regs: CPU registers structure
3187 **/
3188
3189static irqreturn_t
3190e1000_intr(int irq, void *data, struct pt_regs *regs)
3191{
3192 struct net_device *netdev = data;
60490fe0 3193 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3194 struct e1000_hw *hw = &adapter->hw;
3195 uint32_t icr = E1000_READ_REG(hw, ICR);
1e613fd9 3196#ifndef CONFIG_E1000_NAPI
581d708e 3197 int i;
1e613fd9
JK		 3198#else
3199 /* Interrupt Auto-Mask...upon reading ICR,
3200 * interrupts are masked. No need for the
3201 * IMC write, but it does mean we should
3202 * account for it ASAP. */
3203 if (likely(hw->mac_type >= e1000_82571))
3204 atomic_inc(&adapter->irq_sem);
be2b28ed 3205#endif
1da177e4 3206
1e613fd9
JK		 3207 if (unlikely(!icr)) {
3208#ifdef CONFIG_E1000_NAPI
3209 if (hw->mac_type >= e1000_82571)
3210 e1000_irq_enable(adapter);
3211#endif
1da177e4 3212 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3213 }
1da177e4 3214
96838a40 3215 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4
LT		 3216 hw->get_link_status = 1;
3217 mod_timer(&adapter->watchdog_timer, jiffies);
3218 }
3219
3220#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3221 if (unlikely(hw->mac_type < e1000_82571)) {
3222 atomic_inc(&adapter->irq_sem);
3223 E1000_WRITE_REG(hw, IMC, ~0);
3224 E1000_WRITE_FLUSH(hw);
3225 }
581d708e
MC		 3226 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3227 __netif_rx_schedule(&adapter->polling_netdev[0]);
3228 else
3229 e1000_irq_enable(adapter);
c1605eb3 3230#else
1da177e4 3231 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3232 * Due to Hub Link bus being occupied, an interrupt
3233 * de-assertion message is not able to be sent.
3234 * When an interrupt assertion message is generated later,
3235 * two messages are re-ordered and sent out.
3236 * That causes APIC to think 82547 is in de-assertion
3237 * state, while 82547 is in assertion state, resulting
3238 * in dead lock. Writing IMC forces 82547 into
3239 * de-assertion state.
3240 */
3241 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3242 atomic_inc(&adapter->irq_sem);
2648345f 3243 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3244 }
3245
96838a40
JB		 3246 for (i = 0; i < E1000_MAX_INTR; i++)
3247 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3248 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3249 break;
3250
96838a40 3251 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3252 e1000_irq_enable(adapter);
581d708e 3253
c1605eb3 3254#endif
1da177e4
LT		 3255
3256 return IRQ_HANDLED;
3257}
3258
3259#ifdef CONFIG_E1000_NAPI
3260/**
3261 * e1000_clean - NAPI Rx polling callback
3262 * @adapter: board private structure
3263 **/
3264
3265static int
581d708e 3266e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3267{
581d708e
MC		 3268 struct e1000_adapter *adapter;
3269 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3270 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3271
3272 /* Must NOT use netdev_priv macro here. */
3273 adapter = poll_dev->priv;
3274
3275 /* Keep link state information with original netdev */
3276 if (!netif_carrier_ok(adapter->netdev))
3277 goto quit_polling;
2648345f 3278
581d708e
MC		 3279 while (poll_dev != &adapter->polling_netdev[i]) {
3280 i++;
f56799ea 3281 if (unlikely(i == adapter->num_rx_queues))
581d708e
MC		 3282 BUG();
3283 }
3284
8241e35e
JK		 3285 if (likely(adapter->num_tx_queues == 1)) {
3286 /* e1000_clean is called per-cpu. This lock protects
3287 * tx_ring[0] from being cleaned by multiple cpus
3288 * simultaneously. A failure obtaining the lock means
3289 * tx_ring[0] is currently being cleaned anyway. */
3290 if (spin_trylock(&adapter->tx_queue_lock)) {
3291 tx_cleaned = e1000_clean_tx_irq(adapter,
3292 &adapter->tx_ring[0]);
3293 spin_unlock(&adapter->tx_queue_lock);
3294 }
3295 } else
3296 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3297
581d708e
MC		 3298 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3299 &work_done, work_to_do);
1da177e4
LT		 3300
3301 *budget -= work_done;
581d708e 3302 poll_dev->quota -= work_done;
96838a40 3303
2b02893e 3304 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3305 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3306 !netif_running(adapter->netdev)) {
3307quit_polling:
3308 netif_rx_complete(poll_dev);
1da177e4
LT		 3309 e1000_irq_enable(adapter);
3310 return 0;
3311 }
3312
3313 return 1;
3314}
3315
3316#endif
3317/**
3318 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3319 * @adapter: board private structure
3320 **/
3321
3322static boolean_t
581d708e
MC		 3323e1000_clean_tx_irq(struct e1000_adapter *adapter,
3324 struct e1000_tx_ring *tx_ring)
1da177e4 3325{
1da177e4
LT		 3326 struct net_device *netdev = adapter->netdev;
3327 struct e1000_tx_desc *tx_desc, *eop_desc;
3328 struct e1000_buffer *buffer_info;
3329 unsigned int i, eop;
3330 boolean_t cleaned = FALSE;
3331
3332 i = tx_ring->next_to_clean;
3333 eop = tx_ring->buffer_info[i].next_to_watch;
3334 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3335
581d708e 3336 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3337 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3338 tx_desc = E1000_TX_DESC(*tx_ring, i);
3339 buffer_info = &tx_ring->buffer_info[i];
3340 cleaned = (i == eop);
3341
fd803241 3342 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3343 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3344
96838a40 3345 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3346 }
581d708e 3347
7bfa4816 3348
1da177e4
LT		 3349 eop = tx_ring->buffer_info[i].next_to_watch;
3350 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3351 }
3352
3353 tx_ring->next_to_clean = i;
3354
581d708e 3355 spin_lock(&tx_ring->tx_lock);
1da177e4 3356
96838a40 3357 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
1da177e4
LT		 3358 netif_carrier_ok(netdev)))
3359 netif_wake_queue(netdev);
3360
581d708e 3361 spin_unlock(&tx_ring->tx_lock);
2648345f 3362
581d708e 3363 if (adapter->detect_tx_hung) {
2648345f 3364 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3365 * check with the clearing of time_stamp and movement of i */
3366 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3367 if (tx_ring->buffer_info[eop].dma &&
3368 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3369 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3370 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3371 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3372
3373 /* detected Tx unit hang */
c6963ef5 3374 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3375 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3376 " TDH <%x>\n"
3377 " TDT <%x>\n"
3378 " next_to_use <%x>\n"
3379 " next_to_clean <%x>\n"
3380 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3381 " time_stamp <%lx>\n"
3382 " next_to_watch <%x>\n"
3383 " jiffies <%lx>\n"
3384 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3385 (unsigned long)((tx_ring - adapter->tx_ring) /
3386 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3387 readl(adapter->hw.hw_addr + tx_ring->tdh),
3388 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3389 tx_ring->next_to_use,
392137fa
JK		 3390 tx_ring->next_to_clean,
3391 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3392 eop,
3393 jiffies,
3394 eop_desc->upper.fields.status);
1da177e4 3395 netif_stop_queue(netdev);
70b8f1e1 3396 }
1da177e4 3397 }
1da177e4
LT		 3398 return cleaned;
3399}
3400
3401/**
3402 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3403 * @adapter: board private structure
3404 * @status_err: receive descriptor status and error fields
3405 * @csum: receive descriptor csum field
3406 * @sk_buff: socket buffer with received data
1da177e4
LT		 3407 **/
3408
3409static inline void
3410e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3411 uint32_t status_err, uint32_t csum,
3412 struct sk_buff *skb)
1da177e4 3413{
2d7edb92
MC		 3414 uint16_t status = (uint16_t)status_err;
3415 uint8_t errors = (uint8_t)(status_err >> 24);
3416 skb->ip_summed = CHECKSUM_NONE;
3417
1da177e4 3418 /* 82543 or newer only */
96838a40 3419 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3420 /* Ignore Checksum bit is set */
96838a40 3421 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3422 /* TCP/UDP checksum error bit is set */
96838a40 3423 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3424 /* let the stack verify checksum errors */
1da177e4 3425 adapter->hw_csum_err++;
2d7edb92
MC		 3426 return;
3427 }
3428 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3429 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3430 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3431 return;
1da177e4 3432 } else {
96838a40 3433 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3434 return;
3435 }
3436 /* It must be a TCP or UDP packet with a valid checksum */
3437 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3438 /* TCP checksum is good */
3439 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3440 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3441 /* IP fragment with UDP payload */
3442 /* Hardware complements the payload checksum, so we undo it
3443 * and then put the value in host order for further stack use.
3444 */
3445 csum = ntohl(csum ^ 0xFFFF);
3446 skb->csum = csum;
3447 skb->ip_summed = CHECKSUM_HW;
1da177e4 3448 }
2d7edb92 3449 adapter->hw_csum_good++;
1da177e4
LT		 3450}
3451
3452/**
2d7edb92 3453 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3454 * @adapter: board private structure
3455 **/
3456
3457static boolean_t
3458#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3459e1000_clean_rx_irq(struct e1000_adapter *adapter,
3460 struct e1000_rx_ring *rx_ring,
3461 int *work_done, int work_to_do)
1da177e4 3462#else
581d708e
MC		 3463e1000_clean_rx_irq(struct e1000_adapter *adapter,
3464 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3465#endif
3466{
1da177e4
LT		 3467 struct net_device *netdev = adapter->netdev;
3468 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3469 struct e1000_rx_desc *rx_desc, *next_rxd;
3470 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3471 unsigned long flags;
3472 uint32_t length;
3473 uint8_t last_byte;
3474 unsigned int i;
72d64a43 3475 int cleaned_count = 0;
a1415ee6 3476 boolean_t cleaned = FALSE;
1da177e4
LT		 3477
3478 i = rx_ring->next_to_clean;
3479 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3480 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3481
b92ff8ee 3482 while (rx_desc->status & E1000_RXD_STAT_DD) {
86c3d59f 3483 struct sk_buff *skb, *next_skb;
a292ca6e 3484 u8 status;
1da177e4 3485#ifdef CONFIG_E1000_NAPI
96838a40 3486 if (*work_done >= work_to_do)
1da177e4
LT		 3487 break;
3488 (*work_done)++;
3489#endif
a292ca6e 3490 status = rx_desc->status;
b92ff8ee 3491 skb = buffer_info->skb;
86c3d59f
JB		 3492 buffer_info->skb = NULL;
3493
3494 if (++i == rx_ring->count) i = 0;
3495 next_rxd = E1000_RX_DESC(*rx_ring, i);
3496 next_buffer = &rx_ring->buffer_info[i];
3497 next_skb = next_buffer->skb;
3498
72d64a43
JK		 3499 cleaned = TRUE;
3500 cleaned_count++;
a292ca6e
JK		 3501 pci_unmap_single(pdev,
3502 buffer_info->dma,
3503 buffer_info->length,
1da177e4
LT		 3504 PCI_DMA_FROMDEVICE);
3505
1da177e4
LT		 3506 length = le16_to_cpu(rx_desc->length);
3507
a1415ee6
JK		 3508 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3509 /* All receives must fit into a single buffer */
3510 E1000_DBG("%s: Receive packet consumed multiple"
3511 " buffers\n", netdev->name);
3512 dev_kfree_skb_irq(skb);
1da177e4
LT		 3513 goto next_desc;
3514 }
3515
96838a40 3516 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3517 last_byte = *(skb->data + length - 1);
b92ff8ee 3518 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3519 rx_desc->errors, length, last_byte)) {
3520 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3521 e1000_tbi_adjust_stats(&adapter->hw,
3522 &adapter->stats,
1da177e4
LT		 3523 length, skb->data);
3524 spin_unlock_irqrestore(&adapter->stats_lock,
3525 flags);
3526 length--;
3527 } else {
3528 dev_kfree_skb_irq(skb);
3529 goto next_desc;
3530 }
3531 }
3532
a292ca6e
JK		 3533 /* code added for copybreak, this should improve
3534 * performance for small packets with large amounts
3535 * of reassembly being done in the stack */
3536#define E1000_CB_LENGTH 256
a1415ee6 3537 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3538 struct sk_buff *new_skb =
3539 dev_alloc_skb(length + NET_IP_ALIGN);
3540 if (new_skb) {
3541 skb_reserve(new_skb, NET_IP_ALIGN);
3542 new_skb->dev = netdev;
3543 memcpy(new_skb->data - NET_IP_ALIGN,
3544 skb->data - NET_IP_ALIGN,
3545 length + NET_IP_ALIGN);
3546 /* save the skb in buffer_info as good */
3547 buffer_info->skb = skb;
3548 skb = new_skb;
3549 skb_put(skb, length);
3550 }
a1415ee6
JK		 3551 } else
3552 skb_put(skb, length);
a292ca6e
JK		 3553
3554 /* end copybreak code */
1da177e4
LT		 3555
3556 /* Receive Checksum Offload */
a292ca6e
JK		 3557 e1000_rx_checksum(adapter,
3558 (uint32_t)(status) |
2d7edb92
MC		 3559 ((uint32_t)(rx_desc->errors) << 24),
3560 rx_desc->csum, skb);
96838a40 3561
1da177e4
LT		 3562 skb->protocol = eth_type_trans(skb, netdev);
3563#ifdef CONFIG_E1000_NAPI
96838a40 3564 if (unlikely(adapter->vlgrp &&
a292ca6e 3565 (status & E1000_RXD_STAT_VP))) {
1da177e4 3566 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3567 le16_to_cpu(rx_desc->special) &
3568 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3569 } else {
3570 netif_receive_skb(skb);
3571 }
3572#else /* CONFIG_E1000_NAPI */
96838a40 3573 if (unlikely(adapter->vlgrp &&
b92ff8ee 3574 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3575 vlan_hwaccel_rx(skb, adapter->vlgrp,
3576 le16_to_cpu(rx_desc->special) &
3577 E1000_RXD_SPC_VLAN_MASK);
3578 } else {
3579 netif_rx(skb);
3580 }
3581#endif /* CONFIG_E1000_NAPI */
3582 netdev->last_rx = jiffies;
3583
3584next_desc:
3585 rx_desc->status = 0;
1da177e4 3586
72d64a43
JK		 3587 /* return some buffers to hardware, one at a time is too slow */
3588 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3589 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3590 cleaned_count = 0;
3591 }
3592
86c3d59f
JB		 3593 rx_desc = next_rxd;
3594 buffer_info = next_buffer;
1da177e4 3595 }
1da177e4 3596 rx_ring->next_to_clean = i;
72d64a43
JK		 3597
3598 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3599 if (cleaned_count)
3600 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3601
3602 return cleaned;
3603}
3604
3605/**
3606 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3607 * @adapter: board private structure
3608 **/
3609
3610static boolean_t
3611#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3612e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3613 struct e1000_rx_ring *rx_ring,
3614 int *work_done, int work_to_do)
2d7edb92 3615#else
581d708e
MC		 3616e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3617 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3618#endif
3619{
86c3d59f 3620 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3621 struct net_device *netdev = adapter->netdev;
3622 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3623 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3624 struct e1000_ps_page *ps_page;
3625 struct e1000_ps_page_dma *ps_page_dma;
86c3d59f 3626 struct sk_buff *skb, *next_skb;
2d7edb92
MC		 3627 unsigned int i, j;
3628 uint32_t length, staterr;
72d64a43 3629 int cleaned_count = 0;
2d7edb92
MC		 3630 boolean_t cleaned = FALSE;
3631
3632 i = rx_ring->next_to_clean;
3633 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3634 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
86c3d59f 3635 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3636
96838a40 3637 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3638 ps_page = &rx_ring->ps_page[i];
3639 ps_page_dma = &rx_ring->ps_page_dma[i];
3640#ifdef CONFIG_E1000_NAPI
96838a40 3641 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3642 break;
3643 (*work_done)++;
3644#endif
86c3d59f
JB		 3645 skb = buffer_info->skb;
3646
3647 if (++i == rx_ring->count) i = 0;
3648 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3649 next_buffer = &rx_ring->buffer_info[i];
3650 next_skb = next_buffer->skb;
3651
2d7edb92 3652 cleaned = TRUE;
72d64a43 3653 cleaned_count++;
2d7edb92
MC		 3654 pci_unmap_single(pdev, buffer_info->dma,
3655 buffer_info->length,
3656 PCI_DMA_FROMDEVICE);
3657
96838a40 3658 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3659 E1000_DBG("%s: Packet Split buffers didn't pick up"
3660 " the full packet\n", netdev->name);
3661 dev_kfree_skb_irq(skb);
3662 goto next_desc;
3663 }
1da177e4 3664
96838a40 3665 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3666 dev_kfree_skb_irq(skb);
3667 goto next_desc;
3668 }
3669
3670 length = le16_to_cpu(rx_desc->wb.middle.length0);
3671
96838a40 3672 if (unlikely(!length)) {
2d7edb92
MC		 3673 E1000_DBG("%s: Last part of the packet spanning"
3674 " multiple descriptors\n", netdev->name);
3675 dev_kfree_skb_irq(skb);
3676 goto next_desc;
3677 }
3678
3679 /* Good Receive */
3680 skb_put(skb, length);
3681
96838a40
JB		 3682 for (j = 0; j < adapter->rx_ps_pages; j++) {
3683 if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92
MC		 3684 break;
3685
3686 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3687 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3688 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3689 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3690 length);
2d7edb92 3691 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3692 skb->len += length;
3693 skb->data_len += length;
3694 }
3695
3696 e1000_rx_checksum(adapter, staterr,
3697 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3698 skb->protocol = eth_type_trans(skb, netdev);
3699
96838a40 3700 if (likely(rx_desc->wb.upper.header_status &
b92ff8ee 3701 E1000_RXDPS_HDRSTAT_HDRSP))
e4c811c9 3702 adapter->rx_hdr_split++;
2d7edb92 3703#ifdef CONFIG_E1000_NAPI
96838a40 3704 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3705 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3706 le16_to_cpu(rx_desc->wb.middle.vlan) &
3707 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3708 } else {
3709 netif_receive_skb(skb);
3710 }
3711#else /* CONFIG_E1000_NAPI */
96838a40 3712 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3713 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3714 le16_to_cpu(rx_desc->wb.middle.vlan) &
3715 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3716 } else {
3717 netif_rx(skb);
3718 }
3719#endif /* CONFIG_E1000_NAPI */
3720 netdev->last_rx = jiffies;
3721
3722next_desc:
3723 rx_desc->wb.middle.status_error &= ~0xFF;
3724 buffer_info->skb = NULL;
2d7edb92 3725
72d64a43
JK		 3726 /* return some buffers to hardware, one at a time is too slow */
3727 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3728 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3729 cleaned_count = 0;
3730 }
3731
86c3d59f
JB		 3732 rx_desc = next_rxd;
3733 buffer_info = next_buffer;
3734
683a38f3 3735 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3736 }
3737 rx_ring->next_to_clean = i;
72d64a43
JK		 3738
3739 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3740 if (cleaned_count)
3741 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3742
3743 return cleaned;
3744}
3745
3746/**
2d7edb92 3747 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3748 * @adapter: address of board private structure
3749 **/
3750
3751static void
581d708e 3752e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3753 struct e1000_rx_ring *rx_ring,
a292ca6e 3754 int cleaned_count)
1da177e4 3755{
1da177e4
LT		 3756 struct net_device *netdev = adapter->netdev;
3757 struct pci_dev *pdev = adapter->pdev;
3758 struct e1000_rx_desc *rx_desc;
3759 struct e1000_buffer *buffer_info;
3760 struct sk_buff *skb;
2648345f
MC		 3761 unsigned int i;
3762 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3763
3764 i = rx_ring->next_to_use;
3765 buffer_info = &rx_ring->buffer_info[i];
3766
a292ca6e
JK		 3767 while (cleaned_count--) {
3768 if (!(skb = buffer_info->skb))
3769 skb = dev_alloc_skb(bufsz);
3770 else {
3771 skb_trim(skb, 0);
3772 goto map_skb;
3773 }
3774
2648345f 3775
96838a40 3776 if (unlikely(!skb)) {
1da177e4 3777 /* Better luck next round */
72d64a43 3778 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3779 break;
3780 }
3781
2648345f 3782 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3783 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3784 struct sk_buff *oldskb = skb;
2648345f
MC		 3785 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3786 "at %p\n", bufsz, skb->data);
3787 /* Try again, without freeing the previous */
1da177e4 3788 skb = dev_alloc_skb(bufsz);
2648345f 3789 /* Failed allocation, critical failure */
1da177e4
LT		 3790 if (!skb) {
3791 dev_kfree_skb(oldskb);
3792 break;
3793 }
2648345f 3794
1da177e4
LT		 3795 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3796 /* give up */
3797 dev_kfree_skb(skb);
3798 dev_kfree_skb(oldskb);
3799 break; /* while !buffer_info->skb */
3800 } else {
2648345f 3801 /* Use new allocation */
1da177e4
LT		 3802 dev_kfree_skb(oldskb);
3803 }
3804 }
1da177e4
LT		 3805 /* Make buffer alignment 2 beyond a 16 byte boundary
3806 * this will result in a 16 byte aligned IP header after
3807 * the 14 byte MAC header is removed
3808 */
3809 skb_reserve(skb, NET_IP_ALIGN);
3810
3811 skb->dev = netdev;
3812
3813 buffer_info->skb = skb;
3814 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3815map_skb:
1da177e4
LT		 3816 buffer_info->dma = pci_map_single(pdev,
3817 skb->data,
3818 adapter->rx_buffer_len,
3819 PCI_DMA_FROMDEVICE);
3820
2648345f
MC		 3821 /* Fix for errata 23, can't cross 64kB boundary */
3822 if (!e1000_check_64k_bound(adapter,
3823 (void *)(unsigned long)buffer_info->dma,
3824 adapter->rx_buffer_len)) {
3825 DPRINTK(RX_ERR, ERR,
3826 "dma align check failed: %u bytes at %p\n",
3827 adapter->rx_buffer_len,
3828 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3829 dev_kfree_skb(skb);
3830 buffer_info->skb = NULL;
3831
2648345f 3832 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3833 adapter->rx_buffer_len,
3834 PCI_DMA_FROMDEVICE);
3835
3836 break; /* while !buffer_info->skb */
3837 }
1da177e4
LT		 3838 rx_desc = E1000_RX_DESC(*rx_ring, i);
3839 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3840
96838a40
JB		 3841 if (unlikely(++i == rx_ring->count))
3842 i = 0;
1da177e4
LT		 3843 buffer_info = &rx_ring->buffer_info[i];
3844 }
3845
b92ff8ee
JB		 3846 if (likely(rx_ring->next_to_use != i)) {
3847 rx_ring->next_to_use = i;
3848 if (unlikely(i-- == 0))
3849 i = (rx_ring->count - 1);
3850
3851 /* Force memory writes to complete before letting h/w
3852 * know there are new descriptors to fetch. (Only
3853 * applicable for weak-ordered memory model archs,
3854 * such as IA-64). */
3855 wmb();
3856 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3857 }
1da177e4
LT		 3858}
3859
2d7edb92
MC		 3860/**
3861 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3862 * @adapter: address of board private structure
3863 **/
3864
3865static void
581d708e 3866e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3867 struct e1000_rx_ring *rx_ring,
3868 int cleaned_count)
2d7edb92 3869{
2d7edb92
MC		 3870 struct net_device *netdev = adapter->netdev;
3871 struct pci_dev *pdev = adapter->pdev;
3872 union e1000_rx_desc_packet_split *rx_desc;
3873 struct e1000_buffer *buffer_info;
3874 struct e1000_ps_page *ps_page;
3875 struct e1000_ps_page_dma *ps_page_dma;
3876 struct sk_buff *skb;
3877 unsigned int i, j;
3878
3879 i = rx_ring->next_to_use;
3880 buffer_info = &rx_ring->buffer_info[i];
3881 ps_page = &rx_ring->ps_page[i];
3882 ps_page_dma = &rx_ring->ps_page_dma[i];
3883
72d64a43 3884 while (cleaned_count--) {
2d7edb92
MC		 3885 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3886
96838a40 3887 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 3888 if (j < adapter->rx_ps_pages) {
3889 if (likely(!ps_page->ps_page[j])) {
3890 ps_page->ps_page[j] =
3891 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 3892 if (unlikely(!ps_page->ps_page[j])) {
3893 adapter->alloc_rx_buff_failed++;
e4c811c9 3894 goto no_buffers;
b92ff8ee 3895 }
e4c811c9
MC		 3896 ps_page_dma->ps_page_dma[j] =
3897 pci_map_page(pdev,
3898 ps_page->ps_page[j],
3899 0, PAGE_SIZE,
3900 PCI_DMA_FROMDEVICE);
3901 }
3902 /* Refresh the desc even if buffer_addrs didn't
96838a40 3903 * change because each write-back erases
e4c811c9
MC		 3904 * this info.
3905 */
3906 rx_desc->read.buffer_addr[j+1] =
3907 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3908 } else
3909 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 3910 }
3911
3912 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3913
b92ff8ee
JB		 3914 if (unlikely(!skb)) {
3915 adapter->alloc_rx_buff_failed++;
2d7edb92 3916 break;
b92ff8ee 3917 }
2d7edb92
MC		 3918
3919 /* Make buffer alignment 2 beyond a 16 byte boundary
3920 * this will result in a 16 byte aligned IP header after
3921 * the 14 byte MAC header is removed
3922 */
3923 skb_reserve(skb, NET_IP_ALIGN);
3924
3925 skb->dev = netdev;
3926
3927 buffer_info->skb = skb;
3928 buffer_info->length = adapter->rx_ps_bsize0;
3929 buffer_info->dma = pci_map_single(pdev, skb->data,
3930 adapter->rx_ps_bsize0,
3931 PCI_DMA_FROMDEVICE);
3932
3933 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3934
96838a40 3935 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 3936 buffer_info = &rx_ring->buffer_info[i];
3937 ps_page = &rx_ring->ps_page[i];
3938 ps_page_dma = &rx_ring->ps_page_dma[i];
3939 }
3940
3941no_buffers:
b92ff8ee
JB		 3942 if (likely(rx_ring->next_to_use != i)) {
3943 rx_ring->next_to_use = i;
3944 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
3945
3946 /* Force memory writes to complete before letting h/w
3947 * know there are new descriptors to fetch. (Only
3948 * applicable for weak-ordered memory model archs,
3949 * such as IA-64). */
3950 wmb();
3951 /* Hardware increments by 16 bytes, but packet split
3952 * descriptors are 32 bytes...so we increment tail
3953 * twice as much.
3954 */
3955 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3956 }
2d7edb92
MC		 3957}
3958
1da177e4
LT		 3959/**
3960 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3961 * @adapter:
3962 **/
3963
3964static void
3965e1000_smartspeed(struct e1000_adapter *adapter)
3966{
3967 uint16_t phy_status;
3968 uint16_t phy_ctrl;
3969
96838a40 3970 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 3971 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3972 return;
3973
96838a40 3974 if (adapter->smartspeed == 0) {
1da177e4
LT		 3975 /* If Master/Slave config fault is asserted twice,
3976 * we assume back-to-back */
3977 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 3978 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 3979 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 3980 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 3981 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 3982 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 3983 phy_ctrl &= ~CR_1000T_MS_ENABLE;
3984 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
3985 phy_ctrl);
3986 adapter->smartspeed++;
96838a40 3987 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 3988 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
3989 &phy_ctrl)) {
3990 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3991 MII_CR_RESTART_AUTO_NEG);
3992 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
3993 phy_ctrl);
3994 }
3995 }
3996 return;
96838a40 3997 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 3998 /* If still no link, perhaps using 2/3 pair cable */
3999 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4000 phy_ctrl |= CR_1000T_MS_ENABLE;
4001 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4002 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4003 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4004 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4005 MII_CR_RESTART_AUTO_NEG);
4006 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4007 }
4008 }
4009 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4010 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4011 adapter->smartspeed = 0;
4012}
4013
4014/**
4015 * e1000_ioctl -
4016 * @netdev:
4017 * @ifreq:
4018 * @cmd:
4019 **/
4020
4021static int
4022e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4023{
4024 switch (cmd) {
4025 case SIOCGMIIPHY:
4026 case SIOCGMIIREG:
4027 case SIOCSMIIREG:
4028 return e1000_mii_ioctl(netdev, ifr, cmd);
4029 default:
4030 return -EOPNOTSUPP;
4031 }
4032}
4033
4034/**
4035 * e1000_mii_ioctl -
4036 * @netdev:
4037 * @ifreq:
4038 * @cmd:
4039 **/
4040
4041static int
4042e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4043{
60490fe0 4044 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4045 struct mii_ioctl_data *data = if_mii(ifr);
4046 int retval;
4047 uint16_t mii_reg;
4048 uint16_t spddplx;
97876fc6 4049 unsigned long flags;
1da177e4 4050
96838a40 4051 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4052 return -EOPNOTSUPP;
4053
4054 switch (cmd) {
4055 case SIOCGMIIPHY:
4056 data->phy_id = adapter->hw.phy_addr;
4057 break;
4058 case SIOCGMIIREG:
96838a40 4059 if (!capable(CAP_NET_ADMIN))
1da177e4 4060 return -EPERM;
97876fc6 4061 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4062 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4063 &data->val_out)) {
4064 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4065 return -EIO;
97876fc6
MC		 4066 }
4067 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4068 break;
4069 case SIOCSMIIREG:
96838a40 4070 if (!capable(CAP_NET_ADMIN))
1da177e4 4071 return -EPERM;
96838a40 4072 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4073 return -EFAULT;
4074 mii_reg = data->val_in;
97876fc6 4075 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4076 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4077 mii_reg)) {
4078 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4079 return -EIO;
97876fc6 4080 }
96838a40 4081 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 4082 switch (data->reg_num) {
4083 case PHY_CTRL:
96838a40 4084 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4085 break;
96838a40 4086 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4087 adapter->hw.autoneg = 1;
4088 adapter->hw.autoneg_advertised = 0x2F;
4089 } else {
4090 if (mii_reg & 0x40)
4091 spddplx = SPEED_1000;
4092 else if (mii_reg & 0x2000)
4093 spddplx = SPEED_100;
4094 else
4095 spddplx = SPEED_10;
4096 spddplx += (mii_reg & 0x100)
4097 ? FULL_DUPLEX :
4098 HALF_DUPLEX;
4099 retval = e1000_set_spd_dplx(adapter,
4100 spddplx);
96838a40 4101 if (retval) {
97876fc6 4102 spin_unlock_irqrestore(
96838a40 4103 &adapter->stats_lock,
97876fc6 4104 flags);
1da177e4 4105 return retval;
97876fc6 4106 }
1da177e4 4107 }
96838a40 4108 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4109 e1000_down(adapter);
4110 e1000_up(adapter);
4111 } else
4112 e1000_reset(adapter);
4113 break;
4114 case M88E1000_PHY_SPEC_CTRL:
4115 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4116 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4117 spin_unlock_irqrestore(
4118 &adapter->stats_lock, flags);
1da177e4 4119 return -EIO;
97876fc6 4120 }
1da177e4
LT		 4121 break;
4122 }
4123 } else {
4124 switch (data->reg_num) {
4125 case PHY_CTRL:
96838a40 4126 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4127 break;
96838a40 4128 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4129 e1000_down(adapter);
4130 e1000_up(adapter);
4131 } else
4132 e1000_reset(adapter);
4133 break;
4134 }
4135 }
97876fc6 4136 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4137 break;
4138 default:
4139 return -EOPNOTSUPP;
4140 }
4141 return E1000_SUCCESS;
4142}
4143
4144void
4145e1000_pci_set_mwi(struct e1000_hw *hw)
4146{
4147 struct e1000_adapter *adapter = hw->back;
2648345f 4148 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4149
96838a40 4150 if (ret_val)
2648345f 4151 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4152}
4153
4154void
4155e1000_pci_clear_mwi(struct e1000_hw *hw)
4156{
4157 struct e1000_adapter *adapter = hw->back;
4158
4159 pci_clear_mwi(adapter->pdev);
4160}
4161
4162void
4163e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4164{
4165 struct e1000_adapter *adapter = hw->back;
4166
4167 pci_read_config_word(adapter->pdev, reg, value);
4168}
4169
4170void
4171e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4172{
4173 struct e1000_adapter *adapter = hw->back;
4174
4175 pci_write_config_word(adapter->pdev, reg, *value);
4176}
4177
4178uint32_t
4179e1000_io_read(struct e1000_hw *hw, unsigned long port)
4180{
4181 return inl(port);
4182}
4183
4184void
4185e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4186{
4187 outl(value, port);
4188}
4189
4190static void
4191e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4192{
60490fe0 4193 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4194 uint32_t ctrl, rctl;
4195
4196 e1000_irq_disable(adapter);
4197 adapter->vlgrp = grp;
4198
96838a40 4199 if (grp) {
1da177e4
LT		 4200 /* enable VLAN tag insert/strip */
4201 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4202 ctrl |= E1000_CTRL_VME;
4203 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4204
4205 /* enable VLAN receive filtering */
4206 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4207 rctl |= E1000_RCTL_VFE;
4208 rctl &= ~E1000_RCTL_CFIEN;
4209 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4210 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4211 } else {
4212 /* disable VLAN tag insert/strip */
4213 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4214 ctrl &= ~E1000_CTRL_VME;
4215 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4216
4217 /* disable VLAN filtering */
4218 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4219 rctl &= ~E1000_RCTL_VFE;
4220 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4221 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4222 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4223 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4224 }
1da177e4
LT		 4225 }
4226
4227 e1000_irq_enable(adapter);
4228}
4229
4230static void
4231e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4232{
60490fe0 4233 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4234 uint32_t vfta, index;
96838a40
JB		 4235
4236 if ((adapter->hw.mng_cookie.status &
4237 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4238 (vid == adapter->mng_vlan_id))
2d7edb92 4239 return;
1da177e4
LT		 4240 /* add VID to filter table */
4241 index = (vid >> 5) & 0x7F;
4242 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4243 vfta |= (1 << (vid & 0x1F));
4244 e1000_write_vfta(&adapter->hw, index, vfta);
4245}
4246
4247static void
4248e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4249{
60490fe0 4250 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4251 uint32_t vfta, index;
4252
4253 e1000_irq_disable(adapter);
4254
96838a40 4255 if (adapter->vlgrp)
1da177e4
LT		 4256 adapter->vlgrp->vlan_devices[vid] = NULL;
4257
4258 e1000_irq_enable(adapter);
4259
96838a40
JB		 4260 if ((adapter->hw.mng_cookie.status &
4261 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4262 (vid == adapter->mng_vlan_id)) {
4263 /* release control to f/w */
4264 e1000_release_hw_control(adapter);
2d7edb92 4265 return;
ff147013
JK		 4266 }
4267
1da177e4
LT		 4268 /* remove VID from filter table */
4269 index = (vid >> 5) & 0x7F;
4270 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4271 vfta &= ~(1 << (vid & 0x1F));
4272 e1000_write_vfta(&adapter->hw, index, vfta);
4273}
4274
4275static void
4276e1000_restore_vlan(struct e1000_adapter *adapter)
4277{
4278 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4279
96838a40 4280 if (adapter->vlgrp) {
1da177e4 4281 uint16_t vid;
96838a40
JB		 4282 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4283 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4284 continue;
4285 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4286 }
4287 }
4288}
4289
4290int
4291e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4292{
4293 adapter->hw.autoneg = 0;
4294
6921368f 4295 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4296 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4297 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4298 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4299 return -EINVAL;
4300 }
4301
96838a40 4302 switch (spddplx) {
1da177e4
LT		 4303 case SPEED_10 + DUPLEX_HALF:
4304 adapter->hw.forced_speed_duplex = e1000_10_half;
4305 break;
4306 case SPEED_10 + DUPLEX_FULL:
4307 adapter->hw.forced_speed_duplex = e1000_10_full;
4308 break;
4309 case SPEED_100 + DUPLEX_HALF:
4310 adapter->hw.forced_speed_duplex = e1000_100_half;
4311 break;
4312 case SPEED_100 + DUPLEX_FULL:
4313 adapter->hw.forced_speed_duplex = e1000_100_full;
4314 break;
4315 case SPEED_1000 + DUPLEX_FULL:
4316 adapter->hw.autoneg = 1;
4317 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4318 break;
4319 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4320 default:
2648345f 4321 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4322 return -EINVAL;
4323 }
4324 return 0;
4325}
4326
b6a1d5f8 4327#ifdef CONFIG_PM
2f82665f
JB		 4328/* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
4329 * space versus the 64 bytes that pci_[save|restore]_state handle
4330 */
4331#define PCIE_CONFIG_SPACE_LEN 256
4332#define PCI_CONFIG_SPACE_LEN 64
4333static int
4334e1000_pci_save_state(struct e1000_adapter *adapter)
4335{
4336 struct pci_dev *dev = adapter->pdev;
4337 int size;
4338 int i;
4339 if (adapter->hw.mac_type >= e1000_82571)
4340 size = PCIE_CONFIG_SPACE_LEN;
4341 else
4342 size = PCI_CONFIG_SPACE_LEN;
4343
4344 WARN_ON(adapter->config_space != NULL);
4345
4346 adapter->config_space = kmalloc(size, GFP_KERNEL);
4347 if (!adapter->config_space) {
4348 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4349 return -ENOMEM;
4350 }
4351 for (i = 0; i < (size / 4); i++)
4352 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4353 return 0;
4354}
4355
4356static void
4357e1000_pci_restore_state(struct e1000_adapter *adapter)
4358{
4359 struct pci_dev *dev = adapter->pdev;
4360 int size;
4361 int i;
4362 if (adapter->config_space == NULL)
4363 return;
4364 if (adapter->hw.mac_type >= e1000_82571)
4365 size = PCIE_CONFIG_SPACE_LEN;
4366 else
4367 size = PCI_CONFIG_SPACE_LEN;
4368 for (i = 0; i < (size / 4); i++)
4369 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4370 kfree(adapter->config_space);
4371 adapter->config_space = NULL;
4372 return;
4373}
4374#endif /* CONFIG_PM */
4375
1da177e4 4376static int
829ca9a3 4377e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4378{
4379 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4380 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4381 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4382 uint32_t wufc = adapter->wol;
240b1710 4383 int retval = 0;
1da177e4
LT		 4384
4385 netif_device_detach(netdev);
4386
96838a40 4387 if (netif_running(netdev))
1da177e4
LT		 4388 e1000_down(adapter);
4389
2f82665f
JB		 4390#ifdef CONFIG_PM
4391 /* implement our own version of pci_save_state(pdev) because pci
4392 * express adapters have larger 256 byte config spaces */
4393 retval = e1000_pci_save_state(adapter);
4394 if (retval)
4395 return retval;
4396#endif
4397
1da177e4 4398 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4399 if (status & E1000_STATUS_LU)
1da177e4
LT		 4400 wufc &= ~E1000_WUFC_LNKC;
4401
96838a40 4402 if (wufc) {
1da177e4
LT		 4403 e1000_setup_rctl(adapter);
4404 e1000_set_multi(netdev);
4405
4406 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4407 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4408 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4409 rctl |= E1000_RCTL_MPE;
4410 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4411 }
4412
96838a40 4413 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4414 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4415 /* advertise wake from D3Cold */
4416 #define E1000_CTRL_ADVD3WUC 0x00100000
4417 /* phy power management enable */
4418 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4419 ctrl |= E1000_CTRL_ADVD3WUC |
4420 E1000_CTRL_EN_PHY_PWR_MGMT;
4421 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4422 }
4423
96838a40 4424 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4425 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4426 /* keep the laser running in D3 */
4427 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4428 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4429 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4430 }
4431
2d7edb92
MC		 4432 /* Allow time for pending master requests to run */
4433 e1000_disable_pciex_master(&adapter->hw);
4434
1da177e4
LT		 4435 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4436 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
240b1710
JK		 4437 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4438 if (retval)
4439 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4440 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4441 if (retval)
4442 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4443 } else {
4444 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4445 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
240b1710
JK		 4446 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4447 if (retval)
4448 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4449 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4450 if (retval)
4451 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4452 }
4453
96838a40 4454 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4455 adapter->hw.media_type == e1000_media_type_copper) {
4456 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4457 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4458 manc |= E1000_MANC_ARP_EN;
4459 E1000_WRITE_REG(&adapter->hw, MANC, manc);
240b1710
JK		 4460 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4461 if (retval)
4462 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4463 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4464 if (retval)
4465 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4466 }
4467 }
4468
b55ccb35
JK		 4469 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4470 * would have already happened in close and is redundant. */
4471 e1000_release_hw_control(adapter);
2d7edb92 4472
1da177e4 4473 pci_disable_device(pdev);
240b1710
JK		 4474
4475 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4476 if (retval)
4477 DPRINTK(PROBE, ERR, "Error in setting power state\n");
1da177e4
LT		 4478
4479 return 0;
4480}
4481
2f82665f 4482#ifdef CONFIG_PM
1da177e4
LT		 4483static int
4484e1000_resume(struct pci_dev *pdev)
4485{
4486 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4487 struct e1000_adapter *adapter = netdev_priv(netdev);
240b1710 4488 int retval;
b55ccb35 4489 uint32_t manc, ret_val;
1da177e4 4490
240b1710
JK		 4491 retval = pci_set_power_state(pdev, PCI_D0);
4492 if (retval)
4493 DPRINTK(PROBE, ERR, "Error in setting power state\n");
2f82665f 4494 e1000_pci_restore_state(adapter);
2b02893e 4495 ret_val = pci_enable_device(pdev);
a4cb847d 4496 pci_set_master(pdev);
1da177e4 4497
240b1710
JK		 4498 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4499 if (retval)
4500 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4501 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4502 if (retval)
4503 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4504
4505 e1000_reset(adapter);
4506 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4507
96838a40 4508 if (netif_running(netdev))
1da177e4
LT		 4509 e1000_up(adapter);
4510
4511 netif_device_attach(netdev);
4512
96838a40 4513 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4514 adapter->hw.media_type == e1000_media_type_copper) {
4515 manc = E1000_READ_REG(&adapter->hw, MANC);
4516 manc &= ~(E1000_MANC_ARP_EN);
4517 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4518 }
4519
b55ccb35
JK		 4520 /* If the controller is 82573 and f/w is AMT, do not set
4521 * DRV_LOAD until the interface is up. For all other cases,
4522 * let the f/w know that the h/w is now under the control
4523 * of the driver. */
4524 if (adapter->hw.mac_type != e1000_82573 ||
4525 !e1000_check_mng_mode(&adapter->hw))
4526 e1000_get_hw_control(adapter);
2d7edb92 4527
1da177e4
LT		 4528 return 0;
4529}
4530#endif
1da177e4
LT		 4531#ifdef CONFIG_NET_POLL_CONTROLLER
4532/*
4533 * Polling 'interrupt' - used by things like netconsole to send skbs
4534 * without having to re-enable interrupts. It's not called while
4535 * the interrupt routine is executing.
4536 */
4537static void
2648345f 4538e1000_netpoll(struct net_device *netdev)
1da177e4 4539{
60490fe0 4540 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4541 disable_irq(adapter->pdev->irq);
4542 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4543 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4544#ifndef CONFIG_E1000_NAPI
4545 adapter->clean_rx(adapter, adapter->rx_ring);
4546#endif
1da177e4
LT		 4547 enable_irq(adapter->pdev->irq);
4548}
4549#endif
4550
4551/* e1000_main.c */
Clone of davem's net-next-2.6 tree