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e1000: Added a performance enhancement - prefetch
[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
73629bbc
JB		 32 * 6.3.9 12/16/2005
33 * o incorporate fix for recycled skbs from IBM LTC
34 * 6.3.7 11/18/2005
35 * o Honor eeprom setting for enabling/disabling Wake On Lan
36 * 6.3.5 11/17/2005
37 * o Fix memory leak in rx ring handling for PCI Express adapters
38 * 6.3.4 11/8/05
39 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
40 * 6.3.2 9/20/05
41 * o Render logic that sets/resets DRV_LOAD as inline functions to
42 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
43 * network interface is open.
44 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
45 * o Adjust PBA partioning for Jumbo frames using MTU size and not
46 * rx_buffer_len
47 * 6.3.1 9/19/05
48 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
49 (e1000_clean_tx_irq)
50 * o Support for 8086:10B5 device (Quad Port)
51 * 6.2.14 9/15/05
52 * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
53 * open/close
54 * 6.2.13 9/14/05
55 * o Invoke e1000_check_mng_mode only for 8257x controllers since it
56 * accesses the FWSM that is not supported in other controllers
57 * 6.2.12 9/9/05
58 * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
59 * o set RCTL:SECRC only for controllers newer than 82543.
60 * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
61 * This code was moved from e1000_remove to e1000_close
62 * 6.2.10 9/6/05
63 * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
64 * o Enable fc by default on 82573 controllers (do not read eeprom)
65 * o Fix rx_errors statistic not to include missed_packet_count
66 * o Fix rx_dropped statistic not to include missed_packet_count
67 (Padraig Brady)
68 * 6.2.9 8/30/05
69 * o Remove call to update statistics from the controller ib e1000_get_stats
70 * 6.2.8 8/30/05
71 * o Improved algorithm for rx buffer allocation/rdt update
72 * o Flow control watermarks relative to rx PBA size
73 * o Simplified 'Tx Hung' detect logic
74 * 6.2.7 8/17/05
75 * o Report rx buffer allocation failures and tx timeout counts in stats
76 * 6.2.6 8/16/05
77 * o Implement workaround for controller erratum -- linear non-tso packet
78 * following a TSO gets written back prematurely
79 * 6.2.5 8/15/05
80 * o Set netdev->tx_queue_len based on link speed/duplex settings.
81 * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
82 * o Do not power off PHY if SoL/IDER session is active
83 * 6.2.4 8/10/05
84 * o Fix loopback test setup/cleanup for 82571/3 controllers
85 * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
86 * all packets as raw
87 * o Prevent operations that will cause the PHY to be reset if SoL/IDER
88 * sessions are active and log a message
89 * 6.2.2 7/21/05
90 * o used fixed size descriptors for all MTU sizes, reduces memory load
73629bbc
JB		 91 * 6.1.2 4/13/05
92 * o Fixed ethtool diagnostics
93 * o Enabled flow control to take default eeprom settings
94 * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
95 * calls, one from mii_ioctl and other from within update_stats while
96 * processing MIIREG ioctl.
1da177e4
LT		 97 */
98
99char e1000_driver_name[] = "e1000";
3ad2cc67 100static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 101#ifndef CONFIG_E1000_NAPI
102#define DRIVERNAPI
103#else
104#define DRIVERNAPI "-NAPI"
105#endif
c1605eb3 106#define DRV_VERSION "7.0.33-k2"DRIVERNAPI
1da177e4 107char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 108static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 109
110/* e1000_pci_tbl - PCI Device ID Table
111 *
112 * Last entry must be all 0s
113 *
114 * Macro expands to...
115 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
116 */
117static struct pci_device_id e1000_pci_tbl[] = {
118 INTEL_E1000_ETHERNET_DEVICE(0x1000),
119 INTEL_E1000_ETHERNET_DEVICE(0x1001),
120 INTEL_E1000_ETHERNET_DEVICE(0x1004),
121 INTEL_E1000_ETHERNET_DEVICE(0x1008),
122 INTEL_E1000_ETHERNET_DEVICE(0x1009),
123 INTEL_E1000_ETHERNET_DEVICE(0x100C),
124 INTEL_E1000_ETHERNET_DEVICE(0x100D),
125 INTEL_E1000_ETHERNET_DEVICE(0x100E),
126 INTEL_E1000_ETHERNET_DEVICE(0x100F),
127 INTEL_E1000_ETHERNET_DEVICE(0x1010),
128 INTEL_E1000_ETHERNET_DEVICE(0x1011),
129 INTEL_E1000_ETHERNET_DEVICE(0x1012),
130 INTEL_E1000_ETHERNET_DEVICE(0x1013),
131 INTEL_E1000_ETHERNET_DEVICE(0x1014),
132 INTEL_E1000_ETHERNET_DEVICE(0x1015),
133 INTEL_E1000_ETHERNET_DEVICE(0x1016),
134 INTEL_E1000_ETHERNET_DEVICE(0x1017),
135 INTEL_E1000_ETHERNET_DEVICE(0x1018),
136 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 137 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 138 INTEL_E1000_ETHERNET_DEVICE(0x101D),
139 INTEL_E1000_ETHERNET_DEVICE(0x101E),
140 INTEL_E1000_ETHERNET_DEVICE(0x1026),
141 INTEL_E1000_ETHERNET_DEVICE(0x1027),
142 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 143 INTEL_E1000_ETHERNET_DEVICE(0x105E),
144 INTEL_E1000_ETHERNET_DEVICE(0x105F),
145 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 146 INTEL_E1000_ETHERNET_DEVICE(0x1075),
147 INTEL_E1000_ETHERNET_DEVICE(0x1076),
148 INTEL_E1000_ETHERNET_DEVICE(0x1077),
149 INTEL_E1000_ETHERNET_DEVICE(0x1078),
150 INTEL_E1000_ETHERNET_DEVICE(0x1079),
151 INTEL_E1000_ETHERNET_DEVICE(0x107A),
152 INTEL_E1000_ETHERNET_DEVICE(0x107B),
153 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 154 INTEL_E1000_ETHERNET_DEVICE(0x107D),
155 INTEL_E1000_ETHERNET_DEVICE(0x107E),
156 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 157 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 158 INTEL_E1000_ETHERNET_DEVICE(0x108B),
159 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 160 INTEL_E1000_ETHERNET_DEVICE(0x1096),
161 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 162 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 163 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 164 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 165 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 166 /* required last entry */
167 {0,}
168};
169
170MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
171
172int e1000_up(struct e1000_adapter *adapter);
173void e1000_down(struct e1000_adapter *adapter);
174void e1000_reset(struct e1000_adapter *adapter);
175int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 176int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
177int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
178void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
179void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67
AB		 180static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
181 struct e1000_tx_ring *txdr);
182static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
183 struct e1000_rx_ring *rxdr);
184static void e1000_free_tx_resources(struct e1000_adapter *adapter,
185 struct e1000_tx_ring *tx_ring);
186static void e1000_free_rx_resources(struct e1000_adapter *adapter,
187 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 188void e1000_update_stats(struct e1000_adapter *adapter);
189
190/* Local Function Prototypes */
191
192static int e1000_init_module(void);
193static void e1000_exit_module(void);
194static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
195static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 196static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 197static int e1000_sw_init(struct e1000_adapter *adapter);
198static int e1000_open(struct net_device *netdev);
199static int e1000_close(struct net_device *netdev);
200static void e1000_configure_tx(struct e1000_adapter *adapter);
201static void e1000_configure_rx(struct e1000_adapter *adapter);
202static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 203static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
204static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
205static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
206 struct e1000_tx_ring *tx_ring);
207static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
208 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 209static void e1000_set_multi(struct net_device *netdev);
210static void e1000_update_phy_info(unsigned long data);
211static void e1000_watchdog(unsigned long data);
212static void e1000_watchdog_task(struct e1000_adapter *adapter);
213static void e1000_82547_tx_fifo_stall(unsigned long data);
214static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
215static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
216static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
217static int e1000_set_mac(struct net_device *netdev, void *p);
218static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 219static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
220 struct e1000_tx_ring *tx_ring);
1da177e4 221#ifdef CONFIG_E1000_NAPI
581d708e 222static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 223static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 224 struct e1000_rx_ring *rx_ring,
1da177e4 225 int *work_done, int work_to_do);
2d7edb92 226static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 227 struct e1000_rx_ring *rx_ring,
2d7edb92 228 int *work_done, int work_to_do);
1da177e4 229#else
581d708e
MC		 230static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
231 struct e1000_rx_ring *rx_ring);
232static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
233 struct e1000_rx_ring *rx_ring);
1da177e4 234#endif
581d708e 235static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 236 struct e1000_rx_ring *rx_ring,
237 int cleaned_count);
581d708e 238static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 239 struct e1000_rx_ring *rx_ring,
240 int cleaned_count);
1da177e4
LT		 241static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
242static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
243 int cmd);
244void e1000_set_ethtool_ops(struct net_device *netdev);
245static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
246static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
247static void e1000_tx_timeout(struct net_device *dev);
87041639 248static void e1000_reset_task(struct net_device *dev);
1da177e4
LT		 249static void e1000_smartspeed(struct e1000_adapter *adapter);
250static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
251 struct sk_buff *skb);
252
253static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
254static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
255static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
256static void e1000_restore_vlan(struct e1000_adapter *adapter);
257
1da177e4 258#ifdef CONFIG_PM
977e74b5 259static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 260static int e1000_resume(struct pci_dev *pdev);
261#endif
262
263#ifdef CONFIG_NET_POLL_CONTROLLER
264/* for netdump / net console */
265static void e1000_netpoll (struct net_device *netdev);
266#endif
267
24025e4e 268
1da177e4
LT		 269/* Exported from other modules */
270
271extern void e1000_check_options(struct e1000_adapter *adapter);
272
273static struct pci_driver e1000_driver = {
274 .name = e1000_driver_name,
275 .id_table = e1000_pci_tbl,
276 .probe = e1000_probe,
277 .remove = __devexit_p(e1000_remove),
278 /* Power Managment Hooks */
279#ifdef CONFIG_PM
280 .suspend = e1000_suspend,
281 .resume = e1000_resume
282#endif
283};
284
285MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
286MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
287MODULE_LICENSE("GPL");
288MODULE_VERSION(DRV_VERSION);
289
290static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
291module_param(debug, int, 0);
292MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
293
294/**
295 * e1000_init_module - Driver Registration Routine
296 *
297 * e1000_init_module is the first routine called when the driver is
298 * loaded. All it does is register with the PCI subsystem.
299 **/
300
301static int __init
302e1000_init_module(void)
303{
304 int ret;
305 printk(KERN_INFO "%s - version %s\n",
306 e1000_driver_string, e1000_driver_version);
307
308 printk(KERN_INFO "%s\n", e1000_copyright);
309
310 ret = pci_module_init(&e1000_driver);
8b378def 311
1da177e4
LT		 312 return ret;
313}
314
315module_init(e1000_init_module);
316
317/**
318 * e1000_exit_module - Driver Exit Cleanup Routine
319 *
320 * e1000_exit_module is called just before the driver is removed
321 * from memory.
322 **/
323
324static void __exit
325e1000_exit_module(void)
326{
1da177e4
LT		 327 pci_unregister_driver(&e1000_driver);
328}
329
330module_exit(e1000_exit_module);
331
332/**
333 * e1000_irq_disable - Mask off interrupt generation on the NIC
334 * @adapter: board private structure
335 **/
336
337static inline void
338e1000_irq_disable(struct e1000_adapter *adapter)
339{
340 atomic_inc(&adapter->irq_sem);
341 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
342 E1000_WRITE_FLUSH(&adapter->hw);
343 synchronize_irq(adapter->pdev->irq);
344}
345
346/**
347 * e1000_irq_enable - Enable default interrupt generation settings
348 * @adapter: board private structure
349 **/
350
351static inline void
352e1000_irq_enable(struct e1000_adapter *adapter)
353{
96838a40 354 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 355 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
356 E1000_WRITE_FLUSH(&adapter->hw);
357 }
358}
3ad2cc67
AB		 359
360static void
2d7edb92
MC		 361e1000_update_mng_vlan(struct e1000_adapter *adapter)
362{
363 struct net_device *netdev = adapter->netdev;
364 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
365 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 366 if (adapter->vlgrp) {
367 if (!adapter->vlgrp->vlan_devices[vid]) {
368 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 369 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
370 e1000_vlan_rx_add_vid(netdev, vid);
371 adapter->mng_vlan_id = vid;
372 } else
373 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 374
375 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
376 (vid != old_vid) &&
2d7edb92
MC		 377 !adapter->vlgrp->vlan_devices[old_vid])
378 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 379 } else
380 adapter->mng_vlan_id = vid;
2d7edb92
MC		 381 }
382}
b55ccb35
JK		 383
384/**
385 * e1000_release_hw_control - release control of the h/w to f/w
386 * @adapter: address of board private structure
387 *
388 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
389 * For ASF and Pass Through versions of f/w this means that the
390 * driver is no longer loaded. For AMT version (only with 82573) i
391 * of the f/w this means that the netowrk i/f is closed.
392 *
393 **/
394
395static inline void
396e1000_release_hw_control(struct e1000_adapter *adapter)
397{
398 uint32_t ctrl_ext;
399 uint32_t swsm;
400
401 /* Let firmware taken over control of h/w */
402 switch (adapter->hw.mac_type) {
403 case e1000_82571:
404 case e1000_82572:
405 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
406 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
407 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
408 break;
409 case e1000_82573:
410 swsm = E1000_READ_REG(&adapter->hw, SWSM);
411 E1000_WRITE_REG(&adapter->hw, SWSM,
412 swsm & ~E1000_SWSM_DRV_LOAD);
413 default:
414 break;
415 }
416}
417
418/**
419 * e1000_get_hw_control - get control of the h/w from f/w
420 * @adapter: address of board private structure
421 *
422 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
423 * For ASF and Pass Through versions of f/w this means that
424 * the driver is loaded. For AMT version (only with 82573)
425 * of the f/w this means that the netowrk i/f is open.
426 *
427 **/
428
429static inline void
430e1000_get_hw_control(struct e1000_adapter *adapter)
431{
432 uint32_t ctrl_ext;
433 uint32_t swsm;
434 /* Let firmware know the driver has taken over */
435 switch (adapter->hw.mac_type) {
436 case e1000_82571:
437 case e1000_82572:
438 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
439 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
440 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
441 break;
442 case e1000_82573:
443 swsm = E1000_READ_REG(&adapter->hw, SWSM);
444 E1000_WRITE_REG(&adapter->hw, SWSM,
445 swsm | E1000_SWSM_DRV_LOAD);
446 break;
447 default:
448 break;
449 }
450}
451
1da177e4
LT		 452int
453e1000_up(struct e1000_adapter *adapter)
454{
455 struct net_device *netdev = adapter->netdev;
581d708e 456 int i, err;
1da177e4
LT		 457
458 /* hardware has been reset, we need to reload some things */
459
460 /* Reset the PHY if it was previously powered down */
96838a40 461 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 462 uint16_t mii_reg;
463 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
96838a40 464 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4
LT		 465 e1000_phy_reset(&adapter->hw);
466 }
467
468 e1000_set_multi(netdev);
469
470 e1000_restore_vlan(adapter);
471
472 e1000_configure_tx(adapter);
473 e1000_setup_rctl(adapter);
474 e1000_configure_rx(adapter);
72d64a43
JK		 475 /* call E1000_DESC_UNUSED which always leaves
476 * at least 1 descriptor unused to make sure
477 * next_to_use != next_to_clean */
f56799ea 478 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 479 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 480 adapter->alloc_rx_buf(adapter, ring,
481 E1000_DESC_UNUSED(ring));
f56799ea 482 }
1da177e4 483
fa4f7ef3 484#ifdef CONFIG_PCI_MSI
96838a40 485 if (adapter->hw.mac_type > e1000_82547_rev_2) {
fa4f7ef3 486 adapter->have_msi = TRUE;
96838a40 487 if ((err = pci_enable_msi(adapter->pdev))) {
fa4f7ef3
MC		 488 DPRINTK(PROBE, ERR,
489 "Unable to allocate MSI interrupt Error: %d\n", err);
490 adapter->have_msi = FALSE;
491 }
492 }
493#endif
96838a40 494 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
1da177e4 495 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 496 netdev->name, netdev))) {
497 DPRINTK(PROBE, ERR,
498 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 499 return err;
2648345f 500 }
1da177e4 501
7bfa4816
JK		 502 adapter->tx_queue_len = netdev->tx_queue_len;
503
1da177e4 504 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 505
506#ifdef CONFIG_E1000_NAPI
507 netif_poll_enable(netdev);
508#endif
5de55624
MC		 509 e1000_irq_enable(adapter);
510
1da177e4
LT		 511 return 0;
512}
513
514void
515e1000_down(struct e1000_adapter *adapter)
516{
517 struct net_device *netdev = adapter->netdev;
57128197
JK		 518 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
519 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 520
521 e1000_irq_disable(adapter);
c1605eb3 522
1da177e4 523 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3 524#ifdef CONFIG_PCI_MSI
96838a40 525 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
fa4f7ef3
MC		 526 adapter->have_msi == TRUE)
527 pci_disable_msi(adapter->pdev);
528#endif
1da177e4
LT		 529 del_timer_sync(&adapter->tx_fifo_stall_timer);
530 del_timer_sync(&adapter->watchdog_timer);
531 del_timer_sync(&adapter->phy_info_timer);
532
533#ifdef CONFIG_E1000_NAPI
534 netif_poll_disable(netdev);
535#endif
7bfa4816 536 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 537 adapter->link_speed = 0;
538 adapter->link_duplex = 0;
539 netif_carrier_off(netdev);
540 netif_stop_queue(netdev);
541
542 e1000_reset(adapter);
581d708e
MC		 543 e1000_clean_all_tx_rings(adapter);
544 e1000_clean_all_rx_rings(adapter);
1da177e4 545
57128197
JK		 546 /* Power down the PHY so no link is implied when interface is down *
547 * The PHY cannot be powered down if any of the following is TRUE *
548 * (a) WoL is enabled
549 * (b) AMT is active
550 * (c) SoL/IDER session is active */
551 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 552 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 553 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
554 !mng_mode_enabled &&
555 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 556 uint16_t mii_reg;
557 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
558 mii_reg |= MII_CR_POWER_DOWN;
559 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 560 mdelay(1);
1da177e4
LT		 561 }
562}
563
564void
565e1000_reset(struct e1000_adapter *adapter)
566{
2d7edb92 567 uint32_t pba, manc;
1125ecbc 568 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 569
570 /* Repartition Pba for greater than 9k mtu
571 * To take effect CTRL.RST is required.
572 */
573
2d7edb92
MC		 574 switch (adapter->hw.mac_type) {
575 case e1000_82547:
0e6ef3e0 576 case e1000_82547_rev_2:
2d7edb92
MC		 577 pba = E1000_PBA_30K;
578 break;
868d5309
MC		 579 case e1000_82571:
580 case e1000_82572:
6418ecc6 581 case e1000_80003es2lan:
868d5309
MC		 582 pba = E1000_PBA_38K;
583 break;
2d7edb92
MC		 584 case e1000_82573:
585 pba = E1000_PBA_12K;
586 break;
587 default:
588 pba = E1000_PBA_48K;
589 break;
590 }
591
96838a40 592 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 593 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 594 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 595
596
96838a40 597 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 598 adapter->tx_fifo_head = 0;
599 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
600 adapter->tx_fifo_size =
601 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
602 atomic_set(&adapter->tx_fifo_stall, 0);
603 }
2d7edb92 604
1da177e4
LT		 605 E1000_WRITE_REG(&adapter->hw, PBA, pba);
606
607 /* flow control settings */
f11b7f85
JK		 608 /* Set the FC high water mark to 90% of the FIFO size.
609 * Required to clear last 3 LSB */
610 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
611
612 adapter->hw.fc_high_water = fc_high_water_mark;
613 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 614 if (adapter->hw.mac_type == e1000_80003es2lan)
615 adapter->hw.fc_pause_time = 0xFFFF;
616 else
617 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 618 adapter->hw.fc_send_xon = 1;
619 adapter->hw.fc = adapter->hw.original_fc;
620
2d7edb92 621 /* Allow time for pending master requests to run */
1da177e4 622 e1000_reset_hw(&adapter->hw);
96838a40 623 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 624 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 625 if (e1000_init_hw(&adapter->hw))
1da177e4 626 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 627 e1000_update_mng_vlan(adapter);
1da177e4
LT		 628 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
629 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
630
631 e1000_reset_adaptive(&adapter->hw);
632 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 633 if (adapter->en_mng_pt) {
634 manc = E1000_READ_REG(&adapter->hw, MANC);
635 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
636 E1000_WRITE_REG(&adapter->hw, MANC, manc);
637 }
1da177e4
LT		 638}
639
640/**
641 * e1000_probe - Device Initialization Routine
642 * @pdev: PCI device information struct
643 * @ent: entry in e1000_pci_tbl
644 *
645 * Returns 0 on success, negative on failure
646 *
647 * e1000_probe initializes an adapter identified by a pci_dev structure.
648 * The OS initialization, configuring of the adapter private structure,
649 * and a hardware reset occur.
650 **/
651
652static int __devinit
653e1000_probe(struct pci_dev *pdev,
654 const struct pci_device_id *ent)
655{
656 struct net_device *netdev;
657 struct e1000_adapter *adapter;
2d7edb92 658 unsigned long mmio_start, mmio_len;
2d7edb92 659
1da177e4 660 static int cards_found = 0;
84916829 661 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 662 int i, err, pci_using_dac;
1da177e4
LT		 663 uint16_t eeprom_data;
664 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 665 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 666 return err;
667
96838a40 668 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 669 pci_using_dac = 1;
670 } else {
96838a40 671 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 672 E1000_ERR("No usable DMA configuration, aborting\n");
673 return err;
674 }
675 pci_using_dac = 0;
676 }
677
96838a40 678 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 679 return err;
680
681 pci_set_master(pdev);
682
683 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 684 if (!netdev) {
1da177e4
LT		 685 err = -ENOMEM;
686 goto err_alloc_etherdev;
687 }
688
689 SET_MODULE_OWNER(netdev);
690 SET_NETDEV_DEV(netdev, &pdev->dev);
691
692 pci_set_drvdata(pdev, netdev);
60490fe0 693 adapter = netdev_priv(netdev);
1da177e4
LT		 694 adapter->netdev = netdev;
695 adapter->pdev = pdev;
696 adapter->hw.back = adapter;
697 adapter->msg_enable = (1 << debug) - 1;
698
699 mmio_start = pci_resource_start(pdev, BAR_0);
700 mmio_len = pci_resource_len(pdev, BAR_0);
701
702 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 703 if (!adapter->hw.hw_addr) {
1da177e4
LT		 704 err = -EIO;
705 goto err_ioremap;
706 }
707
96838a40
JB		 708 for (i = BAR_1; i <= BAR_5; i++) {
709 if (pci_resource_len(pdev, i) == 0)
1da177e4 710 continue;
96838a40 711 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 712 adapter->hw.io_base = pci_resource_start(pdev, i);
713 break;
714 }
715 }
716
717 netdev->open = &e1000_open;
718 netdev->stop = &e1000_close;
719 netdev->hard_start_xmit = &e1000_xmit_frame;
720 netdev->get_stats = &e1000_get_stats;
721 netdev->set_multicast_list = &e1000_set_multi;
722 netdev->set_mac_address = &e1000_set_mac;
723 netdev->change_mtu = &e1000_change_mtu;
724 netdev->do_ioctl = &e1000_ioctl;
725 e1000_set_ethtool_ops(netdev);
726 netdev->tx_timeout = &e1000_tx_timeout;
727 netdev->watchdog_timeo = 5 * HZ;
728#ifdef CONFIG_E1000_NAPI
729 netdev->poll = &e1000_clean;
730 netdev->weight = 64;
731#endif
732 netdev->vlan_rx_register = e1000_vlan_rx_register;
733 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
734 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
735#ifdef CONFIG_NET_POLL_CONTROLLER
736 netdev->poll_controller = e1000_netpoll;
737#endif
738 strcpy(netdev->name, pci_name(pdev));
739
740 netdev->mem_start = mmio_start;
741 netdev->mem_end = mmio_start + mmio_len;
742 netdev->base_addr = adapter->hw.io_base;
743
744 adapter->bd_number = cards_found;
745
746 /* setup the private structure */
747
96838a40 748 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 749 goto err_sw_init;
750
96838a40 751 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 752 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
753
84916829
JK		 754 /* if ksp3, indicate if it's port a being setup */
755 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
756 e1000_ksp3_port_a == 0)
757 adapter->ksp3_port_a = 1;
758 e1000_ksp3_port_a++;
759 /* Reset for multiple KP3 adapters */
760 if (e1000_ksp3_port_a == 4)
761 e1000_ksp3_port_a = 0;
762
96838a40 763 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 764 netdev->features = NETIF_F_SG |
765 NETIF_F_HW_CSUM |
766 NETIF_F_HW_VLAN_TX |
767 NETIF_F_HW_VLAN_RX |
768 NETIF_F_HW_VLAN_FILTER;
769 }
770
771#ifdef NETIF_F_TSO
96838a40 772 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 773 (adapter->hw.mac_type != e1000_82547))
774 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 775
776#ifdef NETIF_F_TSO_IPV6
96838a40 777 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 778 netdev->features |= NETIF_F_TSO_IPV6;
779#endif
1da177e4 780#endif
96838a40 781 if (pci_using_dac)
1da177e4
LT		 782 netdev->features |= NETIF_F_HIGHDMA;
783
784 /* hard_start_xmit is safe against parallel locking */
785 netdev->features |= NETIF_F_LLTX;
786
2d7edb92
MC		 787 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
788
96838a40 789 /* before reading the EEPROM, reset the controller to
1da177e4 790 * put the device in a known good starting state */
96838a40 791
1da177e4
LT		 792 e1000_reset_hw(&adapter->hw);
793
794 /* make sure the EEPROM is good */
795
96838a40 796 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 797 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
798 err = -EIO;
799 goto err_eeprom;
800 }
801
802 /* copy the MAC address out of the EEPROM */
803
96838a40 804 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 805 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
806 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 807 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 808
96838a40 809 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 810 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
811 err = -EIO;
812 goto err_eeprom;
813 }
814
815 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
816
817 e1000_get_bus_info(&adapter->hw);
818
819 init_timer(&adapter->tx_fifo_stall_timer);
820 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
821 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
822
823 init_timer(&adapter->watchdog_timer);
824 adapter->watchdog_timer.function = &e1000_watchdog;
825 adapter->watchdog_timer.data = (unsigned long) adapter;
826
827 INIT_WORK(&adapter->watchdog_task,
828 (void (*)(void *))e1000_watchdog_task, adapter);
829
830 init_timer(&adapter->phy_info_timer);
831 adapter->phy_info_timer.function = &e1000_update_phy_info;
832 adapter->phy_info_timer.data = (unsigned long) adapter;
833
87041639
JK		 834 INIT_WORK(&adapter->reset_task,
835 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 836
837 /* we're going to reset, so assume we have no link for now */
838
839 netif_carrier_off(netdev);
840 netif_stop_queue(netdev);
841
842 e1000_check_options(adapter);
843
844 /* Initial Wake on LAN setting
845 * If APM wake is enabled in the EEPROM,
846 * enable the ACPI Magic Packet filter
847 */
848
96838a40 849 switch (adapter->hw.mac_type) {
1da177e4
LT		 850 case e1000_82542_rev2_0:
851 case e1000_82542_rev2_1:
852 case e1000_82543:
853 break;
854 case e1000_82544:
855 e1000_read_eeprom(&adapter->hw,
856 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
857 eeprom_apme_mask = E1000_EEPROM_82544_APM;
858 break;
859 case e1000_82546:
860 case e1000_82546_rev_3:
fd803241 861 case e1000_82571:
6418ecc6 862 case e1000_80003es2lan:
96838a40 863 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 864 e1000_read_eeprom(&adapter->hw,
865 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
866 break;
867 }
868 /* Fall Through */
869 default:
870 e1000_read_eeprom(&adapter->hw,
871 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
872 break;
873 }
96838a40 874 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 875 adapter->wol |= E1000_WUFC_MAG;
876
fb3d47d4
JK		 877 /* print bus type/speed/width info */
878 {
879 struct e1000_hw *hw = &adapter->hw;
880 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
881 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
882 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
883 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
884 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
885 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
886 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
887 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
888 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
889 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
890 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
891 "32-bit"));
892 }
893
894 for (i = 0; i < 6; i++)
895 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
896
1da177e4
LT		 897 /* reset the hardware with the new settings */
898 e1000_reset(adapter);
899
b55ccb35
JK		 900 /* If the controller is 82573 and f/w is AMT, do not set
901 * DRV_LOAD until the interface is up. For all other cases,
902 * let the f/w know that the h/w is now under the control
903 * of the driver. */
904 if (adapter->hw.mac_type != e1000_82573 ||
905 !e1000_check_mng_mode(&adapter->hw))
906 e1000_get_hw_control(adapter);
2d7edb92 907
1da177e4 908 strcpy(netdev->name, "eth%d");
96838a40 909 if ((err = register_netdev(netdev)))
1da177e4
LT		 910 goto err_register;
911
912 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
913
914 cards_found++;
915 return 0;
916
917err_register:
918err_sw_init:
919err_eeprom:
920 iounmap(adapter->hw.hw_addr);
921err_ioremap:
922 free_netdev(netdev);
923err_alloc_etherdev:
924 pci_release_regions(pdev);
925 return err;
926}
927
928/**
929 * e1000_remove - Device Removal Routine
930 * @pdev: PCI device information struct
931 *
932 * e1000_remove is called by the PCI subsystem to alert the driver
933 * that it should release a PCI device. The could be caused by a
934 * Hot-Plug event, or because the driver is going to be removed from
935 * memory.
936 **/
937
938static void __devexit
939e1000_remove(struct pci_dev *pdev)
940{
941 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 942 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 943 uint32_t manc;
581d708e
MC		 944#ifdef CONFIG_E1000_NAPI
945 int i;
946#endif
1da177e4 947
be2b28ed
JG		 948 flush_scheduled_work();
949
96838a40 950 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 951 adapter->hw.media_type == e1000_media_type_copper) {
952 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 953 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 954 manc |= E1000_MANC_ARP_EN;
955 E1000_WRITE_REG(&adapter->hw, MANC, manc);
956 }
957 }
958
b55ccb35
JK		 959 /* Release control of h/w to f/w. If f/w is AMT enabled, this
960 * would have already happened in close and is redundant. */
961 e1000_release_hw_control(adapter);
2d7edb92 962
1da177e4 963 unregister_netdev(netdev);
581d708e 964#ifdef CONFIG_E1000_NAPI
f56799ea 965 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 966 __dev_put(&adapter->polling_netdev[i]);
967#endif
1da177e4 968
96838a40 969 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 970 e1000_phy_hw_reset(&adapter->hw);
1da177e4 971
24025e4e
MC		 972 kfree(adapter->tx_ring);
973 kfree(adapter->rx_ring);
974#ifdef CONFIG_E1000_NAPI
975 kfree(adapter->polling_netdev);
976#endif
977
1da177e4
LT		 978 iounmap(adapter->hw.hw_addr);
979 pci_release_regions(pdev);
980
981 free_netdev(netdev);
982
983 pci_disable_device(pdev);
984}
985
986/**
987 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
988 * @adapter: board private structure to initialize
989 *
990 * e1000_sw_init initializes the Adapter private data structure.
991 * Fields are initialized based on PCI device information and
992 * OS network device settings (MTU size).
993 **/
994
995static int __devinit
996e1000_sw_init(struct e1000_adapter *adapter)
997{
998 struct e1000_hw *hw = &adapter->hw;
999 struct net_device *netdev = adapter->netdev;
1000 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1001#ifdef CONFIG_E1000_NAPI
1002 int i;
1003#endif
1da177e4
LT		 1004
1005 /* PCI config space info */
1006
1007 hw->vendor_id = pdev->vendor;
1008 hw->device_id = pdev->device;
1009 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1010 hw->subsystem_id = pdev->subsystem_device;
1011
1012 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1013
1014 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1015
1016 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 1017 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 1018 hw->max_frame_size = netdev->mtu +
1019 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1020 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1021
1022 /* identify the MAC */
1023
96838a40 1024 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1025 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1026 return -EIO;
1027 }
1028
1029 /* initialize eeprom parameters */
1030
96838a40 1031 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1032 E1000_ERR("EEPROM initialization failed\n");
1033 return -EIO;
1034 }
1da177e4 1035
96838a40 1036 switch (hw->mac_type) {
1da177e4
LT		 1037 default:
1038 break;
1039 case e1000_82541:
1040 case e1000_82547:
1041 case e1000_82541_rev_2:
1042 case e1000_82547_rev_2:
1043 hw->phy_init_script = 1;
1044 break;
1045 }
1046
1047 e1000_set_media_type(hw);
1048
1049 hw->wait_autoneg_complete = FALSE;
1050 hw->tbi_compatibility_en = TRUE;
1051 hw->adaptive_ifs = TRUE;
1052
1053 /* Copper options */
1054
96838a40 1055 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1056 hw->mdix = AUTO_ALL_MODES;
1057 hw->disable_polarity_correction = FALSE;
1058 hw->master_slave = E1000_MASTER_SLAVE;
1059 }
1060
f56799ea
JK		 1061 adapter->num_tx_queues = 1;
1062 adapter->num_rx_queues = 1;
581d708e
MC		 1063
1064 if (e1000_alloc_queues(adapter)) {
1065 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1066 return -ENOMEM;
1067 }
1068
1069#ifdef CONFIG_E1000_NAPI
f56799ea 1070 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1071 adapter->polling_netdev[i].priv = adapter;
1072 adapter->polling_netdev[i].poll = &e1000_clean;
1073 adapter->polling_netdev[i].weight = 64;
1074 dev_hold(&adapter->polling_netdev[i]);
1075 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1076 }
7bfa4816 1077 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1078#endif
1079
1da177e4
LT		 1080 atomic_set(&adapter->irq_sem, 1);
1081 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1082
1083 return 0;
1084}
1085
581d708e
MC		 1086/**
1087 * e1000_alloc_queues - Allocate memory for all rings
1088 * @adapter: board private structure to initialize
1089 *
1090 * We allocate one ring per queue at run-time since we don't know the
1091 * number of queues at compile-time. The polling_netdev array is
1092 * intended for Multiqueue, but should work fine with a single queue.
1093 **/
1094
1095static int __devinit
1096e1000_alloc_queues(struct e1000_adapter *adapter)
1097{
1098 int size;
1099
f56799ea 1100 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1101 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1102 if (!adapter->tx_ring)
1103 return -ENOMEM;
1104 memset(adapter->tx_ring, 0, size);
1105
f56799ea 1106 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1107 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1108 if (!adapter->rx_ring) {
1109 kfree(adapter->tx_ring);
1110 return -ENOMEM;
1111 }
1112 memset(adapter->rx_ring, 0, size);
1113
1114#ifdef CONFIG_E1000_NAPI
f56799ea 1115 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1116 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1117 if (!adapter->polling_netdev) {
1118 kfree(adapter->tx_ring);
1119 kfree(adapter->rx_ring);
1120 return -ENOMEM;
1121 }
1122 memset(adapter->polling_netdev, 0, size);
1123#endif
1124
1125 return E1000_SUCCESS;
1126}
1127
1da177e4
LT		 1128/**
1129 * e1000_open - Called when a network interface is made active
1130 * @netdev: network interface device structure
1131 *
1132 * Returns 0 on success, negative value on failure
1133 *
1134 * The open entry point is called when a network interface is made
1135 * active by the system (IFF_UP). At this point all resources needed
1136 * for transmit and receive operations are allocated, the interrupt
1137 * handler is registered with the OS, the watchdog timer is started,
1138 * and the stack is notified that the interface is ready.
1139 **/
1140
1141static int
1142e1000_open(struct net_device *netdev)
1143{
60490fe0 1144 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1145 int err;
1146
1147 /* allocate transmit descriptors */
1148
581d708e 1149 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1150 goto err_setup_tx;
1151
1152 /* allocate receive descriptors */
1153
581d708e 1154 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1155 goto err_setup_rx;
1156
96838a40 1157 if ((err = e1000_up(adapter)))
1da177e4 1158 goto err_up;
2d7edb92 1159 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1160 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1161 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1162 e1000_update_mng_vlan(adapter);
1163 }
1da177e4 1164
b55ccb35
JK		 1165 /* If AMT is enabled, let the firmware know that the network
1166 * interface is now open */
1167 if (adapter->hw.mac_type == e1000_82573 &&
1168 e1000_check_mng_mode(&adapter->hw))
1169 e1000_get_hw_control(adapter);
1170
1da177e4
LT		 1171 return E1000_SUCCESS;
1172
1173err_up:
581d708e 1174 e1000_free_all_rx_resources(adapter);
1da177e4 1175err_setup_rx:
581d708e 1176 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1177err_setup_tx:
1178 e1000_reset(adapter);
1179
1180 return err;
1181}
1182
1183/**
1184 * e1000_close - Disables a network interface
1185 * @netdev: network interface device structure
1186 *
1187 * Returns 0, this is not allowed to fail
1188 *
1189 * The close entry point is called when an interface is de-activated
1190 * by the OS. The hardware is still under the drivers control, but
1191 * needs to be disabled. A global MAC reset is issued to stop the
1192 * hardware, and all transmit and receive resources are freed.
1193 **/
1194
1195static int
1196e1000_close(struct net_device *netdev)
1197{
60490fe0 1198 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1199
1200 e1000_down(adapter);
1201
581d708e
MC		 1202 e1000_free_all_tx_resources(adapter);
1203 e1000_free_all_rx_resources(adapter);
1da177e4 1204
96838a40 1205 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1206 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1207 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1208 }
b55ccb35
JK		 1209
1210 /* If AMT is enabled, let the firmware know that the network
1211 * interface is now closed */
1212 if (adapter->hw.mac_type == e1000_82573 &&
1213 e1000_check_mng_mode(&adapter->hw))
1214 e1000_release_hw_control(adapter);
1215
1da177e4
LT		 1216 return 0;
1217}
1218
1219/**
1220 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1221 * @adapter: address of board private structure
2d7edb92
MC		 1222 * @start: address of beginning of memory
1223 * @len: length of memory
1da177e4
LT		 1224 **/
1225static inline boolean_t
1226e1000_check_64k_bound(struct e1000_adapter *adapter,
1227 void *start, unsigned long len)
1228{
1229 unsigned long begin = (unsigned long) start;
1230 unsigned long end = begin + len;
1231
2648345f
MC		 1232 /* First rev 82545 and 82546 need to not allow any memory
1233 * write location to cross 64k boundary due to errata 23 */
1da177e4 1234 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1235 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1236 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1237 }
1238
1239 return TRUE;
1240}
1241
1242/**
1243 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1244 * @adapter: board private structure
581d708e 1245 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1246 *
1247 * Return 0 on success, negative on failure
1248 **/
1249
3ad2cc67 1250static int
581d708e
MC		 1251e1000_setup_tx_resources(struct e1000_adapter *adapter,
1252 struct e1000_tx_ring *txdr)
1da177e4 1253{
1da177e4
LT		 1254 struct pci_dev *pdev = adapter->pdev;
1255 int size;
1256
1257 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1258
1259 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1260 if (!txdr->buffer_info) {
2648345f
MC		 1261 DPRINTK(PROBE, ERR,
1262 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1263 return -ENOMEM;
1264 }
1265 memset(txdr->buffer_info, 0, size);
1266
1267 /* round up to nearest 4K */
1268
1269 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1270 E1000_ROUNDUP(txdr->size, 4096);
1271
1272 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1273 if (!txdr->desc) {
1da177e4 1274setup_tx_desc_die:
1da177e4 1275 vfree(txdr->buffer_info);
2648345f
MC		 1276 DPRINTK(PROBE, ERR,
1277 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1278 return -ENOMEM;
1279 }
1280
2648345f 1281 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1282 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1283 void *olddesc = txdr->desc;
1284 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1285 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1286 "at %p\n", txdr->size, txdr->desc);
1287 /* Try again, without freeing the previous */
1da177e4 1288 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1289 /* Failed allocation, critical failure */
96838a40 1290 if (!txdr->desc) {
1da177e4
LT		 1291 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1292 goto setup_tx_desc_die;
1293 }
1294
1295 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1296 /* give up */
2648345f
MC		 1297 pci_free_consistent(pdev, txdr->size, txdr->desc,
1298 txdr->dma);
1da177e4
LT		 1299 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1300 DPRINTK(PROBE, ERR,
2648345f
MC		 1301 "Unable to allocate aligned memory "
1302 "for the transmit descriptor ring\n");
1da177e4
LT		 1303 vfree(txdr->buffer_info);
1304 return -ENOMEM;
1305 } else {
2648345f 1306 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1307 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1308 }
1309 }
1310 memset(txdr->desc, 0, txdr->size);
1311
1312 txdr->next_to_use = 0;
1313 txdr->next_to_clean = 0;
2ae76d98 1314 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1315
1316 return 0;
1317}
1318
581d708e
MC		 1319/**
1320 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1321 * (Descriptors) for all queues
1322 * @adapter: board private structure
1323 *
1324 * If this function returns with an error, then it's possible one or
1325 * more of the rings is populated (while the rest are not). It is the
1326 * callers duty to clean those orphaned rings.
1327 *
1328 * Return 0 on success, negative on failure
1329 **/
1330
1331int
1332e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1333{
1334 int i, err = 0;
1335
f56799ea 1336 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1337 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1338 if (err) {
1339 DPRINTK(PROBE, ERR,
1340 "Allocation for Tx Queue %u failed\n", i);
1341 break;
1342 }
1343 }
1344
1345 return err;
1346}
1347
1da177e4
LT		 1348/**
1349 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1350 * @adapter: board private structure
1351 *
1352 * Configure the Tx unit of the MAC after a reset.
1353 **/
1354
1355static void
1356e1000_configure_tx(struct e1000_adapter *adapter)
1357{
581d708e
MC		 1358 uint64_t tdba;
1359 struct e1000_hw *hw = &adapter->hw;
1360 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1361 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1362
1363 /* Setup the HW Tx Head and Tail descriptor pointers */
1364
f56799ea 1365 switch (adapter->num_tx_queues) {
24025e4e
MC		 1366 case 1:
1367 default:
581d708e
MC		 1368 tdba = adapter->tx_ring[0].dma;
1369 tdlen = adapter->tx_ring[0].count *
1370 sizeof(struct e1000_tx_desc);
1371 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1372 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1373 E1000_WRITE_REG(hw, TDLEN, tdlen);
1374 E1000_WRITE_REG(hw, TDH, 0);
1375 E1000_WRITE_REG(hw, TDT, 0);
1376 adapter->tx_ring[0].tdh = E1000_TDH;
1377 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1378 break;
1379 }
1da177e4
LT		 1380
1381 /* Set the default values for the Tx Inter Packet Gap timer */
1382
0fadb059
JK		 1383 if (hw->media_type == e1000_media_type_fiber ||
1384 hw->media_type == e1000_media_type_internal_serdes)
1385 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1386 else
1387 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1388
581d708e 1389 switch (hw->mac_type) {
1da177e4
LT		 1390 case e1000_82542_rev2_0:
1391 case e1000_82542_rev2_1:
1392 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1393 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1394 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1395 break;
87041639
JK		 1396 case e1000_80003es2lan:
1397 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1398 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1399 break;
1da177e4 1400 default:
0fadb059
JK		 1401 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1402 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1403 break;
1da177e4 1404 }
0fadb059
JK		 1405 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1406 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1407 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1408
1409 /* Set the Tx Interrupt Delay register */
1410
581d708e
MC		 1411 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1412 if (hw->mac_type >= e1000_82540)
1413 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1414
1415 /* Program the Transmit Control Register */
1416
581d708e 1417 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1418
1419 tctl &= ~E1000_TCTL_CT;
7e6c9861 1420 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1421 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1422
7e6c9861
JK		 1423#ifdef DISABLE_MULR
1424 /* disable Multiple Reads for debugging */
1425 tctl &= ~E1000_TCTL_MULR;
1426#endif
1da177e4 1427
2ae76d98
MC		 1428 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1429 tarc = E1000_READ_REG(hw, TARC0);
1430 tarc |= ((1 << 25) | (1 << 21));
1431 E1000_WRITE_REG(hw, TARC0, tarc);
1432 tarc = E1000_READ_REG(hw, TARC1);
1433 tarc |= (1 << 25);
1434 if (tctl & E1000_TCTL_MULR)
1435 tarc &= ~(1 << 28);
1436 else
1437 tarc |= (1 << 28);
1438 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1439 } else if (hw->mac_type == e1000_80003es2lan) {
1440 tarc = E1000_READ_REG(hw, TARC0);
1441 tarc |= 1;
1442 if (hw->media_type == e1000_media_type_internal_serdes)
1443 tarc |= (1 << 20);
1444 E1000_WRITE_REG(hw, TARC0, tarc);
1445 tarc = E1000_READ_REG(hw, TARC1);
1446 tarc |= 1;
1447 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1448 }
1449
581d708e 1450 e1000_config_collision_dist(hw);
1da177e4
LT		 1451
1452 /* Setup Transmit Descriptor Settings for eop descriptor */
1453 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1454 E1000_TXD_CMD_IFCS;
1455
581d708e 1456 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1457 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1458 else
1459 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1460
1461 /* Cache if we're 82544 running in PCI-X because we'll
1462 * need this to apply a workaround later in the send path. */
581d708e
MC		 1463 if (hw->mac_type == e1000_82544 &&
1464 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1465 adapter->pcix_82544 = 1;
7e6c9861
JK		 1466
1467 E1000_WRITE_REG(hw, TCTL, tctl);
1468
1da177e4
LT		 1469}
1470
1471/**
1472 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1473 * @adapter: board private structure
581d708e 1474 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1475 *
1476 * Returns 0 on success, negative on failure
1477 **/
1478
3ad2cc67 1479static int
581d708e
MC		 1480e1000_setup_rx_resources(struct e1000_adapter *adapter,
1481 struct e1000_rx_ring *rxdr)
1da177e4 1482{
1da177e4 1483 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1484 int size, desc_len;
1da177e4
LT		 1485
1486 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1487 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1488 if (!rxdr->buffer_info) {
2648345f
MC		 1489 DPRINTK(PROBE, ERR,
1490 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1491 return -ENOMEM;
1492 }
1493 memset(rxdr->buffer_info, 0, size);
1494
2d7edb92
MC		 1495 size = sizeof(struct e1000_ps_page) * rxdr->count;
1496 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1497 if (!rxdr->ps_page) {
2d7edb92
MC		 1498 vfree(rxdr->buffer_info);
1499 DPRINTK(PROBE, ERR,
1500 "Unable to allocate memory for the receive descriptor ring\n");
1501 return -ENOMEM;
1502 }
1503 memset(rxdr->ps_page, 0, size);
1504
1505 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1506 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1507 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1508 vfree(rxdr->buffer_info);
1509 kfree(rxdr->ps_page);
1510 DPRINTK(PROBE, ERR,
1511 "Unable to allocate memory for the receive descriptor ring\n");
1512 return -ENOMEM;
1513 }
1514 memset(rxdr->ps_page_dma, 0, size);
1515
96838a40 1516 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1517 desc_len = sizeof(struct e1000_rx_desc);
1518 else
1519 desc_len = sizeof(union e1000_rx_desc_packet_split);
1520
1da177e4
LT		 1521 /* Round up to nearest 4K */
1522
2d7edb92 1523 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1524 E1000_ROUNDUP(rxdr->size, 4096);
1525
1526 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1527
581d708e
MC		 1528 if (!rxdr->desc) {
1529 DPRINTK(PROBE, ERR,
1530 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1531setup_rx_desc_die:
1da177e4 1532 vfree(rxdr->buffer_info);
2d7edb92
MC		 1533 kfree(rxdr->ps_page);
1534 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1535 return -ENOMEM;
1536 }
1537
2648345f 1538 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1539 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1540 void *olddesc = rxdr->desc;
1541 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1542 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1543 "at %p\n", rxdr->size, rxdr->desc);
1544 /* Try again, without freeing the previous */
1da177e4 1545 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1546 /* Failed allocation, critical failure */
581d708e 1547 if (!rxdr->desc) {
1da177e4 1548 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1549 DPRINTK(PROBE, ERR,
1550 "Unable to allocate memory "
1551 "for the receive descriptor ring\n");
1da177e4
LT		 1552 goto setup_rx_desc_die;
1553 }
1554
1555 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1556 /* give up */
2648345f
MC		 1557 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1558 rxdr->dma);
1da177e4 1559 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1560 DPRINTK(PROBE, ERR,
1561 "Unable to allocate aligned memory "
1562 "for the receive descriptor ring\n");
581d708e 1563 goto setup_rx_desc_die;
1da177e4 1564 } else {
2648345f 1565 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1566 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1567 }
1568 }
1569 memset(rxdr->desc, 0, rxdr->size);
1570
1571 rxdr->next_to_clean = 0;
1572 rxdr->next_to_use = 0;
1573
1574 return 0;
1575}
1576
581d708e
MC		 1577/**
1578 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1579 * (Descriptors) for all queues
1580 * @adapter: board private structure
1581 *
1582 * If this function returns with an error, then it's possible one or
1583 * more of the rings is populated (while the rest are not). It is the
1584 * callers duty to clean those orphaned rings.
1585 *
1586 * Return 0 on success, negative on failure
1587 **/
1588
1589int
1590e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1591{
1592 int i, err = 0;
1593
f56799ea 1594 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1595 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1596 if (err) {
1597 DPRINTK(PROBE, ERR,
1598 "Allocation for Rx Queue %u failed\n", i);
1599 break;
1600 }
1601 }
1602
1603 return err;
1604}
1605
1da177e4 1606/**
2648345f 1607 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1608 * @adapter: Board private structure
1609 **/
e4c811c9
MC		 1610#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1611 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1612static void
1613e1000_setup_rctl(struct e1000_adapter *adapter)
1614{
2d7edb92
MC		 1615 uint32_t rctl, rfctl;
1616 uint32_t psrctl = 0;
35ec56bb 1617#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1618 uint32_t pages = 0;
1619#endif
1da177e4
LT		 1620
1621 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1622
1623 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1624
1625 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1626 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1627 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1628
0fadb059
JK		 1629 if (adapter->hw.mac_type > e1000_82543)
1630 rctl |= E1000_RCTL_SECRC;
1631
1632 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1633 rctl |= E1000_RCTL_SBP;
1634 else
1635 rctl &= ~E1000_RCTL_SBP;
1636
2d7edb92
MC		 1637 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1638 rctl &= ~E1000_RCTL_LPE;
1639 else
1640 rctl |= E1000_RCTL_LPE;
1641
1da177e4 1642 /* Setup buffer sizes */
96838a40 1643 if (adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1644 /* We can now specify buffers in 1K increments.
1645 * BSIZE and BSEX are ignored in this case. */
1646 rctl |= adapter->rx_buffer_len << 0x11;
1647 } else {
1648 rctl &= ~E1000_RCTL_SZ_4096;
a1415ee6
JK		 1649 rctl |= E1000_RCTL_BSEX;
1650 switch (adapter->rx_buffer_len) {
1651 case E1000_RXBUFFER_2048:
1652 default:
1653 rctl |= E1000_RCTL_SZ_2048;
1654 rctl &= ~E1000_RCTL_BSEX;
1655 break;
1656 case E1000_RXBUFFER_4096:
1657 rctl |= E1000_RCTL_SZ_4096;
1658 break;
1659 case E1000_RXBUFFER_8192:
1660 rctl |= E1000_RCTL_SZ_8192;
1661 break;
1662 case E1000_RXBUFFER_16384:
1663 rctl |= E1000_RCTL_SZ_16384;
1664 break;
1665 }
2d7edb92
MC		 1666 }
1667
35ec56bb 1668#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1669 /* 82571 and greater support packet-split where the protocol
1670 * header is placed in skb->data and the packet data is
1671 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1672 * In the case of a non-split, skb->data is linearly filled,
1673 * followed by the page buffers. Therefore, skb->data is
1674 * sized to hold the largest protocol header.
1675 */
e4c811c9
MC		 1676 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1677 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1678 PAGE_SIZE <= 16384)
1679 adapter->rx_ps_pages = pages;
1680 else
1681 adapter->rx_ps_pages = 0;
2d7edb92 1682#endif
e4c811c9 1683 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1684 /* Configure extra packet-split registers */
1685 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1686 rfctl |= E1000_RFCTL_EXTEN;
1687 /* disable IPv6 packet split support */
1688 rfctl |= E1000_RFCTL_IPV6_DIS;
1689 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1690
1691 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1692
2d7edb92
MC		 1693 psrctl |= adapter->rx_ps_bsize0 >>
1694 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1695
1696 switch (adapter->rx_ps_pages) {
1697 case 3:
1698 psrctl |= PAGE_SIZE <<
1699 E1000_PSRCTL_BSIZE3_SHIFT;
1700 case 2:
1701 psrctl |= PAGE_SIZE <<
1702 E1000_PSRCTL_BSIZE2_SHIFT;
1703 case 1:
1704 psrctl |= PAGE_SIZE >>
1705 E1000_PSRCTL_BSIZE1_SHIFT;
1706 break;
1707 }
2d7edb92
MC		 1708
1709 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1710 }
1711
1712 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1713}
1714
1715/**
1716 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1717 * @adapter: board private structure
1718 *
1719 * Configure the Rx unit of the MAC after a reset.
1720 **/
1721
1722static void
1723e1000_configure_rx(struct e1000_adapter *adapter)
1724{
581d708e
MC		 1725 uint64_t rdba;
1726 struct e1000_hw *hw = &adapter->hw;
1727 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1728
e4c811c9 1729 if (adapter->rx_ps_pages) {
581d708e 1730 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1731 sizeof(union e1000_rx_desc_packet_split);
1732 adapter->clean_rx = e1000_clean_rx_irq_ps;
1733 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1734 } else {
581d708e
MC		 1735 rdlen = adapter->rx_ring[0].count *
1736 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1737 adapter->clean_rx = e1000_clean_rx_irq;
1738 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1739 }
1da177e4
LT		 1740
1741 /* disable receives while setting up the descriptors */
581d708e
MC		 1742 rctl = E1000_READ_REG(hw, RCTL);
1743 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1744
1745 /* set the Receive Delay Timer Register */
581d708e 1746 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1747
581d708e
MC		 1748 if (hw->mac_type >= e1000_82540) {
1749 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1750 if (adapter->itr > 1)
581d708e 1751 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1752 1000000000 / (adapter->itr * 256));
1753 }
1754
2ae76d98 1755 if (hw->mac_type >= e1000_82571) {
2ae76d98 1756 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1757 /* Reset delay timers after every interrupt */
2ae76d98 1758 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1759#ifdef CONFIG_E1000_NAPI
1760 /* Auto-Mask interrupts upon ICR read. */
1761 ctrl_ext |= E1000_CTRL_EXT_IAME;
1762#endif
2ae76d98 1763 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1764 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1765 E1000_WRITE_FLUSH(hw);
1766 }
1767
581d708e
MC		 1768 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1769 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1770 switch (adapter->num_rx_queues) {
24025e4e
MC		 1771 case 1:
1772 default:
581d708e
MC		 1773 rdba = adapter->rx_ring[0].dma;
1774 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1775 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1776 E1000_WRITE_REG(hw, RDLEN, rdlen);
1777 E1000_WRITE_REG(hw, RDH, 0);
1778 E1000_WRITE_REG(hw, RDT, 0);
1779 adapter->rx_ring[0].rdh = E1000_RDH;
1780 adapter->rx_ring[0].rdt = E1000_RDT;
1781 break;
24025e4e
MC		 1782 }
1783
1da177e4 1784 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1785 if (hw->mac_type >= e1000_82543) {
1786 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1787 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1788 rxcsum |= E1000_RXCSUM_TUOFL;
1789
868d5309 1790 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1791 * Must be used in conjunction with packet-split. */
96838a40
JB		 1792 if ((hw->mac_type >= e1000_82571) &&
1793 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1794 rxcsum |= E1000_RXCSUM_IPPCSE;
1795 }
1796 } else {
1797 rxcsum &= ~E1000_RXCSUM_TUOFL;
1798 /* don't need to clear IPPCSE as it defaults to 0 */
1799 }
581d708e 1800 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1801 }
1802
581d708e
MC		 1803 if (hw->mac_type == e1000_82573)
1804 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1805
1da177e4 1806 /* Enable Receives */
581d708e 1807 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1808}
1809
1810/**
581d708e 1811 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1812 * @adapter: board private structure
581d708e 1813 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1814 *
1815 * Free all transmit software resources
1816 **/
1817
3ad2cc67 1818static void
581d708e
MC		 1819e1000_free_tx_resources(struct e1000_adapter *adapter,
1820 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1821{
1822 struct pci_dev *pdev = adapter->pdev;
1823
581d708e 1824 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1825
581d708e
MC		 1826 vfree(tx_ring->buffer_info);
1827 tx_ring->buffer_info = NULL;
1da177e4 1828
581d708e 1829 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1830
581d708e
MC		 1831 tx_ring->desc = NULL;
1832}
1833
1834/**
1835 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1836 * @adapter: board private structure
1837 *
1838 * Free all transmit software resources
1839 **/
1840
1841void
1842e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1843{
1844 int i;
1845
f56799ea 1846 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1847 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1848}
1849
1850static inline void
1851e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1852 struct e1000_buffer *buffer_info)
1853{
96838a40 1854 if (buffer_info->dma) {
2648345f
MC		 1855 pci_unmap_page(adapter->pdev,
1856 buffer_info->dma,
1857 buffer_info->length,
1858 PCI_DMA_TODEVICE);
1da177e4 1859 }
8241e35e 1860 if (buffer_info->skb)
1da177e4 1861 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1862 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1863}
1864
1865/**
1866 * e1000_clean_tx_ring - Free Tx Buffers
1867 * @adapter: board private structure
581d708e 1868 * @tx_ring: ring to be cleaned
1da177e4
LT		 1869 **/
1870
1871static void
581d708e
MC		 1872e1000_clean_tx_ring(struct e1000_adapter *adapter,
1873 struct e1000_tx_ring *tx_ring)
1da177e4 1874{
1da177e4
LT		 1875 struct e1000_buffer *buffer_info;
1876 unsigned long size;
1877 unsigned int i;
1878
1879 /* Free all the Tx ring sk_buffs */
1880
96838a40 1881 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1882 buffer_info = &tx_ring->buffer_info[i];
1883 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1884 }
1885
1886 size = sizeof(struct e1000_buffer) * tx_ring->count;
1887 memset(tx_ring->buffer_info, 0, size);
1888
1889 /* Zero out the descriptor ring */
1890
1891 memset(tx_ring->desc, 0, tx_ring->size);
1892
1893 tx_ring->next_to_use = 0;
1894 tx_ring->next_to_clean = 0;
fd803241 1895 tx_ring->last_tx_tso = 0;
1da177e4 1896
581d708e
MC		 1897 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1898 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1899}
1900
1901/**
1902 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1903 * @adapter: board private structure
1904 **/
1905
1906static void
1907e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1908{
1909 int i;
1910
f56799ea 1911 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1912 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1913}
1914
1915/**
1916 * e1000_free_rx_resources - Free Rx Resources
1917 * @adapter: board private structure
581d708e 1918 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1919 *
1920 * Free all receive software resources
1921 **/
1922
3ad2cc67 1923static void
581d708e
MC		 1924e1000_free_rx_resources(struct e1000_adapter *adapter,
1925 struct e1000_rx_ring *rx_ring)
1da177e4 1926{
1da177e4
LT		 1927 struct pci_dev *pdev = adapter->pdev;
1928
581d708e 1929 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1930
1931 vfree(rx_ring->buffer_info);
1932 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1933 kfree(rx_ring->ps_page);
1934 rx_ring->ps_page = NULL;
1935 kfree(rx_ring->ps_page_dma);
1936 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1937
1938 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1939
1940 rx_ring->desc = NULL;
1941}
1942
1943/**
581d708e 1944 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1945 * @adapter: board private structure
581d708e
MC		 1946 *
1947 * Free all receive software resources
1948 **/
1949
1950void
1951e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1952{
1953 int i;
1954
f56799ea 1955 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1956 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1957}
1958
1959/**
1960 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1961 * @adapter: board private structure
1962 * @rx_ring: ring to free buffers from
1da177e4
LT		 1963 **/
1964
1965static void
581d708e
MC		 1966e1000_clean_rx_ring(struct e1000_adapter *adapter,
1967 struct e1000_rx_ring *rx_ring)
1da177e4 1968{
1da177e4 1969 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1970 struct e1000_ps_page *ps_page;
1971 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1972 struct pci_dev *pdev = adapter->pdev;
1973 unsigned long size;
2d7edb92 1974 unsigned int i, j;
1da177e4
LT		 1975
1976 /* Free all the Rx ring sk_buffs */
96838a40 1977 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1978 buffer_info = &rx_ring->buffer_info[i];
96838a40 1979 if (buffer_info->skb) {
1da177e4
LT		 1980 pci_unmap_single(pdev,
1981 buffer_info->dma,
1982 buffer_info->length,
1983 PCI_DMA_FROMDEVICE);
1984
1985 dev_kfree_skb(buffer_info->skb);
1986 buffer_info->skb = NULL;
997f5cbd
JK		 1987 }
1988 ps_page = &rx_ring->ps_page[i];
1989 ps_page_dma = &rx_ring->ps_page_dma[i];
1990 for (j = 0; j < adapter->rx_ps_pages; j++) {
1991 if (!ps_page->ps_page[j]) break;
1992 pci_unmap_page(pdev,
1993 ps_page_dma->ps_page_dma[j],
1994 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1995 ps_page_dma->ps_page_dma[j] = 0;
1996 put_page(ps_page->ps_page[j]);
1997 ps_page->ps_page[j] = NULL;
1da177e4
LT		 1998 }
1999 }
2000
2001 size = sizeof(struct e1000_buffer) * rx_ring->count;
2002 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2003 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2004 memset(rx_ring->ps_page, 0, size);
2005 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2006 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2007
2008 /* Zero out the descriptor ring */
2009
2010 memset(rx_ring->desc, 0, rx_ring->size);
2011
2012 rx_ring->next_to_clean = 0;
2013 rx_ring->next_to_use = 0;
2014
581d708e
MC		 2015 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2016 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2017}
2018
2019/**
2020 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2021 * @adapter: board private structure
2022 **/
2023
2024static void
2025e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2026{
2027 int i;
2028
f56799ea 2029 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2030 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2031}
2032
2033/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2034 * and memory write and invalidate disabled for certain operations
2035 */
2036static void
2037e1000_enter_82542_rst(struct e1000_adapter *adapter)
2038{
2039 struct net_device *netdev = adapter->netdev;
2040 uint32_t rctl;
2041
2042 e1000_pci_clear_mwi(&adapter->hw);
2043
2044 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2045 rctl |= E1000_RCTL_RST;
2046 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2047 E1000_WRITE_FLUSH(&adapter->hw);
2048 mdelay(5);
2049
96838a40 2050 if (netif_running(netdev))
581d708e 2051 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2052}
2053
2054static void
2055e1000_leave_82542_rst(struct e1000_adapter *adapter)
2056{
2057 struct net_device *netdev = adapter->netdev;
2058 uint32_t rctl;
2059
2060 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2061 rctl &= ~E1000_RCTL_RST;
2062 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2063 E1000_WRITE_FLUSH(&adapter->hw);
2064 mdelay(5);
2065
96838a40 2066 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2067 e1000_pci_set_mwi(&adapter->hw);
2068
96838a40 2069 if (netif_running(netdev)) {
72d64a43
JK		 2070 /* No need to loop, because 82542 supports only 1 queue */
2071 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2072 e1000_configure_rx(adapter);
72d64a43 2073 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2074 }
2075}
2076
2077/**
2078 * e1000_set_mac - Change the Ethernet Address of the NIC
2079 * @netdev: network interface device structure
2080 * @p: pointer to an address structure
2081 *
2082 * Returns 0 on success, negative on failure
2083 **/
2084
2085static int
2086e1000_set_mac(struct net_device *netdev, void *p)
2087{
60490fe0 2088 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2089 struct sockaddr *addr = p;
2090
96838a40 2091 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2092 return -EADDRNOTAVAIL;
2093
2094 /* 82542 2.0 needs to be in reset to write receive address registers */
2095
96838a40 2096 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2097 e1000_enter_82542_rst(adapter);
2098
2099 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2100 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2101
2102 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2103
868d5309
MC		 2104 /* With 82571 controllers, LAA may be overwritten (with the default)
2105 * due to controller reset from the other port. */
2106 if (adapter->hw.mac_type == e1000_82571) {
2107 /* activate the work around */
2108 adapter->hw.laa_is_present = 1;
2109
96838a40
JB		 2110 /* Hold a copy of the LAA in RAR[14] This is done so that
2111 * between the time RAR[0] gets clobbered and the time it
2112 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2113 * of the RARs and no incoming packets directed to this port
96838a40 2114 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2115 * RAR[14] */
96838a40 2116 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2117 E1000_RAR_ENTRIES - 1);
2118 }
2119
96838a40 2120 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2121 e1000_leave_82542_rst(adapter);
2122
2123 return 0;
2124}
2125
2126/**
2127 * e1000_set_multi - Multicast and Promiscuous mode set
2128 * @netdev: network interface device structure
2129 *
2130 * The set_multi entry point is called whenever the multicast address
2131 * list or the network interface flags are updated. This routine is
2132 * responsible for configuring the hardware for proper multicast,
2133 * promiscuous mode, and all-multi behavior.
2134 **/
2135
2136static void
2137e1000_set_multi(struct net_device *netdev)
2138{
60490fe0 2139 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2140 struct e1000_hw *hw = &adapter->hw;
2141 struct dev_mc_list *mc_ptr;
2142 uint32_t rctl;
2143 uint32_t hash_value;
868d5309 2144 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2145
868d5309
MC		 2146 /* reserve RAR[14] for LAA over-write work-around */
2147 if (adapter->hw.mac_type == e1000_82571)
2148 rar_entries--;
1da177e4 2149
2648345f
MC		 2150 /* Check for Promiscuous and All Multicast modes */
2151
1da177e4
LT		 2152 rctl = E1000_READ_REG(hw, RCTL);
2153
96838a40 2154 if (netdev->flags & IFF_PROMISC) {
1da177e4 2155 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2156 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2157 rctl |= E1000_RCTL_MPE;
2158 rctl &= ~E1000_RCTL_UPE;
2159 } else {
2160 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2161 }
2162
2163 E1000_WRITE_REG(hw, RCTL, rctl);
2164
2165 /* 82542 2.0 needs to be in reset to write receive address registers */
2166
96838a40 2167 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2168 e1000_enter_82542_rst(adapter);
2169
2170 /* load the first 14 multicast address into the exact filters 1-14
2171 * RAR 0 is used for the station MAC adddress
2172 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2173 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2174 */
2175 mc_ptr = netdev->mc_list;
2176
96838a40 2177 for (i = 1; i < rar_entries; i++) {
868d5309 2178 if (mc_ptr) {
1da177e4
LT		 2179 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2180 mc_ptr = mc_ptr->next;
2181 } else {
2182 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2183 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2184 }
2185 }
2186
2187 /* clear the old settings from the multicast hash table */
2188
96838a40 2189 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2190 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2191
2192 /* load any remaining addresses into the hash table */
2193
96838a40 2194 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2195 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2196 e1000_mta_set(hw, hash_value);
2197 }
2198
96838a40 2199 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2200 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2201}
2202
2203/* Need to wait a few seconds after link up to get diagnostic information from
2204 * the phy */
2205
2206static void
2207e1000_update_phy_info(unsigned long data)
2208{
2209 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2210 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2211}
2212
2213/**
2214 * e1000_82547_tx_fifo_stall - Timer Call-back
2215 * @data: pointer to adapter cast into an unsigned long
2216 **/
2217
2218static void
2219e1000_82547_tx_fifo_stall(unsigned long data)
2220{
2221 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2222 struct net_device *netdev = adapter->netdev;
2223 uint32_t tctl;
2224
96838a40
JB		 2225 if (atomic_read(&adapter->tx_fifo_stall)) {
2226 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2227 E1000_READ_REG(&adapter->hw, TDH)) &&
2228 (E1000_READ_REG(&adapter->hw, TDFT) ==
2229 E1000_READ_REG(&adapter->hw, TDFH)) &&
2230 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2231 E1000_READ_REG(&adapter->hw, TDFHS))) {
2232 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2233 E1000_WRITE_REG(&adapter->hw, TCTL,
2234 tctl & ~E1000_TCTL_EN);
2235 E1000_WRITE_REG(&adapter->hw, TDFT,
2236 adapter->tx_head_addr);
2237 E1000_WRITE_REG(&adapter->hw, TDFH,
2238 adapter->tx_head_addr);
2239 E1000_WRITE_REG(&adapter->hw, TDFTS,
2240 adapter->tx_head_addr);
2241 E1000_WRITE_REG(&adapter->hw, TDFHS,
2242 adapter->tx_head_addr);
2243 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2244 E1000_WRITE_FLUSH(&adapter->hw);
2245
2246 adapter->tx_fifo_head = 0;
2247 atomic_set(&adapter->tx_fifo_stall, 0);
2248 netif_wake_queue(netdev);
2249 } else {
2250 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2251 }
2252 }
2253}
2254
2255/**
2256 * e1000_watchdog - Timer Call-back
2257 * @data: pointer to adapter cast into an unsigned long
2258 **/
2259static void
2260e1000_watchdog(unsigned long data)
2261{
2262 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2263
2264 /* Do the rest outside of interrupt context */
2265 schedule_work(&adapter->watchdog_task);
2266}
2267
2268static void
2269e1000_watchdog_task(struct e1000_adapter *adapter)
2270{
2271 struct net_device *netdev = adapter->netdev;
545c67c0 2272 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2273 uint32_t link, tctl;
1da177e4
LT		 2274
2275 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2276 if (adapter->hw.mac_type == e1000_82573) {
2277 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2278 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2279 e1000_update_mng_vlan(adapter);
96838a40 2280 }
1da177e4 2281
96838a40 2282 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2283 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2284 link = !adapter->hw.serdes_link_down;
2285 else
2286 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2287
96838a40
JB		 2288 if (link) {
2289 if (!netif_carrier_ok(netdev)) {
1da177e4
LT		 2290 e1000_get_speed_and_duplex(&adapter->hw,
2291 &adapter->link_speed,
2292 &adapter->link_duplex);
2293
2294 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2295 adapter->link_speed,
2296 adapter->link_duplex == FULL_DUPLEX ?
2297 "Full Duplex" : "Half Duplex");
2298
7e6c9861
JK		 2299 /* tweak tx_queue_len according to speed/duplex
2300 * and adjust the timeout factor */
66a2b0a3
JK		 2301 netdev->tx_queue_len = adapter->tx_queue_len;
2302 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2303 adapter->txb2b = 1;
2304 switch (adapter->link_speed) {
2305 case SPEED_10:
2306 adapter->txb2b = 0;
2307 netdev->tx_queue_len = 10;
2308 adapter->tx_timeout_factor = 8;
2309 break;
2310 case SPEED_100:
2311 adapter->txb2b = 0;
2312 netdev->tx_queue_len = 100;
2313 /* maybe add some timeout factor ? */
2314 break;
2315 }
2316
2317 if ((adapter->hw.mac_type == e1000_82571 ||
2318 adapter->hw.mac_type == e1000_82572) &&
2319 adapter->txb2b == 0) {
2320#define SPEED_MODE_BIT (1 << 21)
2321 uint32_t tarc0;
2322 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2323 tarc0 &= ~SPEED_MODE_BIT;
2324 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2325 }
2326
2327#ifdef NETIF_F_TSO
2328 /* disable TSO for pcie and 10/100 speeds, to avoid
2329 * some hardware issues */
2330 if (!adapter->tso_force &&
2331 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2332 switch (adapter->link_speed) {
2333 case SPEED_10:
66a2b0a3 2334 case SPEED_100:
7e6c9861
JK		 2335 DPRINTK(PROBE,INFO,
2336 "10/100 speed: disabling TSO\n");
2337 netdev->features &= ~NETIF_F_TSO;
2338 break;
2339 case SPEED_1000:
2340 netdev->features |= NETIF_F_TSO;
2341 break;
2342 default:
2343 /* oops */
66a2b0a3
JK		 2344 break;
2345 }
2346 }
7e6c9861
JK		 2347#endif
2348
2349 /* enable transmits in the hardware, need to do this
2350 * after setting TARC0 */
2351 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2352 tctl |= E1000_TCTL_EN;
2353 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2354
1da177e4
LT		 2355 netif_carrier_on(netdev);
2356 netif_wake_queue(netdev);
2357 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2358 adapter->smartspeed = 0;
2359 }
2360 } else {
96838a40 2361 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2362 adapter->link_speed = 0;
2363 adapter->link_duplex = 0;
2364 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2365 netif_carrier_off(netdev);
2366 netif_stop_queue(netdev);
2367 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2368
2369 /* 80003ES2LAN workaround--
2370 * For packet buffer work-around on link down event;
2371 * disable receives in the ISR and
2372 * reset device here in the watchdog
2373 */
2374 if (adapter->hw.mac_type == e1000_80003es2lan) {
2375 /* reset device */
2376 schedule_work(&adapter->reset_task);
2377 }
1da177e4
LT		 2378 }
2379
2380 e1000_smartspeed(adapter);
2381 }
2382
2383 e1000_update_stats(adapter);
2384
2385 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2386 adapter->tpt_old = adapter->stats.tpt;
2387 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2388 adapter->colc_old = adapter->stats.colc;
2389
2390 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2391 adapter->gorcl_old = adapter->stats.gorcl;
2392 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2393 adapter->gotcl_old = adapter->stats.gotcl;
2394
2395 e1000_update_adaptive(&adapter->hw);
2396
f56799ea 2397 if (!netif_carrier_ok(netdev)) {
581d708e 2398 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2399 /* We've lost link, so the controller stops DMA,
2400 * but we've got queued Tx work that's never going
2401 * to get done, so reset controller to flush Tx.
2402 * (Do the reset outside of interrupt context). */
87041639
JK		 2403 adapter->tx_timeout_count++;
2404 schedule_work(&adapter->reset_task);
1da177e4
LT		 2405 }
2406 }
2407
2408 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2409 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2410 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2411 * asymmetrical Tx or Rx gets ITR=8000; everyone
2412 * else is between 2000-8000. */
2413 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2414 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2415 adapter->gotcl - adapter->gorcl :
2416 adapter->gorcl - adapter->gotcl) / 10000;
2417 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2418 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2419 }
2420
2421 /* Cause software interrupt to ensure rx ring is cleaned */
2422 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2423
2648345f 2424 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2425 adapter->detect_tx_hung = TRUE;
2426
96838a40 2427 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2428 * reset from the other port. Set the appropriate LAA in RAR[0] */
2429 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2430 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2431
1da177e4
LT		 2432 /* Reset the timer */
2433 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2434}
2435
2436#define E1000_TX_FLAGS_CSUM 0x00000001
2437#define E1000_TX_FLAGS_VLAN 0x00000002
2438#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2439#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2440#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2441#define E1000_TX_FLAGS_VLAN_SHIFT 16
2442
2443static inline int
581d708e
MC		 2444e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2445 struct sk_buff *skb)
1da177e4
LT		 2446{
2447#ifdef NETIF_F_TSO
2448 struct e1000_context_desc *context_desc;
545c67c0 2449 struct e1000_buffer *buffer_info;
1da177e4
LT		 2450 unsigned int i;
2451 uint32_t cmd_length = 0;
2d7edb92 2452 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2453 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2454 int err;
2455
96838a40 2456 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2457 if (skb_header_cloned(skb)) {
2458 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2459 if (err)
2460 return err;
2461 }
2462
2463 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2464 mss = skb_shinfo(skb)->tso_size;
96838a40 2465 if (skb->protocol == ntohs(ETH_P_IP)) {
2d7edb92
MC		 2466 skb->nh.iph->tot_len = 0;
2467 skb->nh.iph->check = 0;
2468 skb->h.th->check =
2469 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2470 skb->nh.iph->daddr,
2471 0,
2472 IPPROTO_TCP,
2473 0);
2474 cmd_length = E1000_TXD_CMD_IP;
2475 ipcse = skb->h.raw - skb->data - 1;
2476#ifdef NETIF_F_TSO_IPV6
96838a40 2477 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2478 skb->nh.ipv6h->payload_len = 0;
2479 skb->h.th->check =
2480 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2481 &skb->nh.ipv6h->daddr,
2482 0,
2483 IPPROTO_TCP,
2484 0);
2485 ipcse = 0;
2486#endif
2487 }
1da177e4
LT		 2488 ipcss = skb->nh.raw - skb->data;
2489 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2490 tucss = skb->h.raw - skb->data;
2491 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2492 tucse = 0;
2493
2494 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2495 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2496
581d708e
MC		 2497 i = tx_ring->next_to_use;
2498 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2499 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2500
2501 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2502 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2503 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2504 context_desc->upper_setup.tcp_fields.tucss = tucss;
2505 context_desc->upper_setup.tcp_fields.tucso = tucso;
2506 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2507 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2508 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2509 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2510
545c67c0
JK		 2511 buffer_info->time_stamp = jiffies;
2512
581d708e
MC		 2513 if (++i == tx_ring->count) i = 0;
2514 tx_ring->next_to_use = i;
1da177e4 2515
8241e35e 2516 return TRUE;
1da177e4
LT		 2517 }
2518#endif
2519
8241e35e 2520 return FALSE;
1da177e4
LT		 2521}
2522
2523static inline boolean_t
581d708e
MC		 2524e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2525 struct sk_buff *skb)
1da177e4
LT		 2526{
2527 struct e1000_context_desc *context_desc;
545c67c0 2528 struct e1000_buffer *buffer_info;
1da177e4
LT		 2529 unsigned int i;
2530 uint8_t css;
2531
96838a40 2532 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2533 css = skb->h.raw - skb->data;
2534
581d708e 2535 i = tx_ring->next_to_use;
545c67c0 2536 buffer_info = &tx_ring->buffer_info[i];
581d708e 2537 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2538
2539 context_desc->upper_setup.tcp_fields.tucss = css;
2540 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2541 context_desc->upper_setup.tcp_fields.tucse = 0;
2542 context_desc->tcp_seg_setup.data = 0;
2543 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2544
545c67c0
JK		 2545 buffer_info->time_stamp = jiffies;
2546
581d708e
MC		 2547 if (unlikely(++i == tx_ring->count)) i = 0;
2548 tx_ring->next_to_use = i;
1da177e4
LT		 2549
2550 return TRUE;
2551 }
2552
2553 return FALSE;
2554}
2555
2556#define E1000_MAX_TXD_PWR 12
2557#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2558
2559static inline int
581d708e
MC		 2560e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2561 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2562 unsigned int nr_frags, unsigned int mss)
1da177e4 2563{
1da177e4
LT		 2564 struct e1000_buffer *buffer_info;
2565 unsigned int len = skb->len;
2566 unsigned int offset = 0, size, count = 0, i;
2567 unsigned int f;
2568 len -= skb->data_len;
2569
2570 i = tx_ring->next_to_use;
2571
96838a40 2572 while (len) {
1da177e4
LT		 2573 buffer_info = &tx_ring->buffer_info[i];
2574 size = min(len, max_per_txd);
2575#ifdef NETIF_F_TSO
fd803241
JK		 2576 /* Workaround for Controller erratum --
2577 * descriptor for non-tso packet in a linear SKB that follows a
2578 * tso gets written back prematurely before the data is fully
2579 * DMAd to the controller */
2580 if (!skb->data_len && tx_ring->last_tx_tso &&
2581 !skb_shinfo(skb)->tso_size) {
2582 tx_ring->last_tx_tso = 0;
2583 size -= 4;
2584 }
2585
1da177e4
LT		 2586 /* Workaround for premature desc write-backs
2587 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2588 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2589 size -= 4;
2590#endif
97338bde
MC		 2591 /* work-around for errata 10 and it applies
2592 * to all controllers in PCI-X mode
2593 * The fix is to make sure that the first descriptor of a
2594 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2595 */
96838a40 2596 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2597 (size > 2015) && count == 0))
2598 size = 2015;
96838a40 2599
1da177e4
LT		 2600 /* Workaround for potential 82544 hang in PCI-X. Avoid
2601 * terminating buffers within evenly-aligned dwords. */
96838a40 2602 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2603 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2604 size > 4))
2605 size -= 4;
2606
2607 buffer_info->length = size;
2608 buffer_info->dma =
2609 pci_map_single(adapter->pdev,
2610 skb->data + offset,
2611 size,
2612 PCI_DMA_TODEVICE);
2613 buffer_info->time_stamp = jiffies;
2614
2615 len -= size;
2616 offset += size;
2617 count++;
96838a40 2618 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2619 }
2620
96838a40 2621 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2622 struct skb_frag_struct *frag;
2623
2624 frag = &skb_shinfo(skb)->frags[f];
2625 len = frag->size;
2626 offset = frag->page_offset;
2627
96838a40 2628 while (len) {
1da177e4
LT		 2629 buffer_info = &tx_ring->buffer_info[i];
2630 size = min(len, max_per_txd);
2631#ifdef NETIF_F_TSO
2632 /* Workaround for premature desc write-backs
2633 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2634 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2635 size -= 4;
2636#endif
2637 /* Workaround for potential 82544 hang in PCI-X.
2638 * Avoid terminating buffers within evenly-aligned
2639 * dwords. */
96838a40 2640 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2641 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2642 size > 4))
2643 size -= 4;
2644
2645 buffer_info->length = size;
2646 buffer_info->dma =
2647 pci_map_page(adapter->pdev,
2648 frag->page,
2649 offset,
2650 size,
2651 PCI_DMA_TODEVICE);
2652 buffer_info->time_stamp = jiffies;
2653
2654 len -= size;
2655 offset += size;
2656 count++;
96838a40 2657 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2658 }
2659 }
2660
2661 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2662 tx_ring->buffer_info[i].skb = skb;
2663 tx_ring->buffer_info[first].next_to_watch = i;
2664
2665 return count;
2666}
2667
2668static inline void
581d708e
MC		 2669e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2670 int tx_flags, int count)
1da177e4 2671{
1da177e4
LT		 2672 struct e1000_tx_desc *tx_desc = NULL;
2673 struct e1000_buffer *buffer_info;
2674 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2675 unsigned int i;
2676
96838a40 2677 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2678 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2679 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2680 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2681
96838a40 2682 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2683 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2684 }
2685
96838a40 2686 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2687 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2688 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2689 }
2690
96838a40 2691 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2692 txd_lower |= E1000_TXD_CMD_VLE;
2693 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2694 }
2695
2696 i = tx_ring->next_to_use;
2697
96838a40 2698 while (count--) {
1da177e4
LT		 2699 buffer_info = &tx_ring->buffer_info[i];
2700 tx_desc = E1000_TX_DESC(*tx_ring, i);
2701 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2702 tx_desc->lower.data =
2703 cpu_to_le32(txd_lower | buffer_info->length);
2704 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2705 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2706 }
2707
2708 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2709
2710 /* Force memory writes to complete before letting h/w
2711 * know there are new descriptors to fetch. (Only
2712 * applicable for weak-ordered memory model archs,
2713 * such as IA-64). */
2714 wmb();
2715
2716 tx_ring->next_to_use = i;
581d708e 2717 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2718}
2719
2720/**
2721 * 82547 workaround to avoid controller hang in half-duplex environment.
2722 * The workaround is to avoid queuing a large packet that would span
2723 * the internal Tx FIFO ring boundary by notifying the stack to resend
2724 * the packet at a later time. This gives the Tx FIFO an opportunity to
2725 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2726 * to the beginning of the Tx FIFO.
2727 **/
2728
2729#define E1000_FIFO_HDR 0x10
2730#define E1000_82547_PAD_LEN 0x3E0
2731
2732static inline int
2733e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2734{
2735 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2736 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2737
2738 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2739
96838a40 2740 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2741 goto no_fifo_stall_required;
2742
96838a40 2743 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2744 return 1;
2745
96838a40 2746 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2747 atomic_set(&adapter->tx_fifo_stall, 1);
2748 return 1;
2749 }
2750
2751no_fifo_stall_required:
2752 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2753 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2754 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2755 return 0;
2756}
2757
2d7edb92
MC		 2758#define MINIMUM_DHCP_PACKET_SIZE 282
2759static inline int
2760e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2761{
2762 struct e1000_hw *hw = &adapter->hw;
2763 uint16_t length, offset;
96838a40
JB		 2764 if (vlan_tx_tag_present(skb)) {
2765 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2766 ( adapter->hw.mng_cookie.status &
2767 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2768 return 0;
2769 }
20a44028 2770 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2771 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2772 if ((htons(ETH_P_IP) == eth->h_proto)) {
2773 const struct iphdr *ip =
2d7edb92 2774 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2775 if (IPPROTO_UDP == ip->protocol) {
2776 struct udphdr *udp =
2777 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2778 (ip->ihl << 2));
96838a40 2779 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2780 offset = (uint8_t *)udp + 8 - skb->data;
2781 length = skb->len - offset;
2782
2783 return e1000_mng_write_dhcp_info(hw,
96838a40 2784 (uint8_t *)udp + 8,
2d7edb92
MC		 2785 length);
2786 }
2787 }
2788 }
2789 }
2790 return 0;
2791}
2792
1da177e4
LT		 2793#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2794static int
2795e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2796{
60490fe0 2797 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2798 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2799 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2800 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2801 unsigned int tx_flags = 0;
2802 unsigned int len = skb->len;
2803 unsigned long flags;
2804 unsigned int nr_frags = 0;
2805 unsigned int mss = 0;
2806 int count = 0;
96838a40 2807 int tso;
1da177e4
LT		 2808 unsigned int f;
2809 len -= skb->data_len;
2810
581d708e 2811 tx_ring = adapter->tx_ring;
24025e4e 2812
581d708e 2813 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2814 dev_kfree_skb_any(skb);
2815 return NETDEV_TX_OK;
2816 }
2817
2818#ifdef NETIF_F_TSO
2819 mss = skb_shinfo(skb)->tso_size;
2648345f 2820 /* The controller does a simple calculation to
1da177e4
LT		 2821 * make sure there is enough room in the FIFO before
2822 * initiating the DMA for each buffer. The calc is:
2823 * 4 = ceil(buffer len/mss). To make sure we don't
2824 * overrun the FIFO, adjust the max buffer len if mss
2825 * drops. */
96838a40 2826 if (mss) {
9a3056da 2827 uint8_t hdr_len;
1da177e4
LT		 2828 max_per_txd = min(mss << 2, max_per_txd);
2829 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2830
9f687888 2831 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2832 * points to just header, pull a few bytes of payload from
2833 * frags into skb->data */
2834 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2835 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2836 switch (adapter->hw.mac_type) {
2837 unsigned int pull_size;
2838 case e1000_82571:
2839 case e1000_82572:
2840 case e1000_82573:
2841 pull_size = min((unsigned int)4, skb->data_len);
2842 if (!__pskb_pull_tail(skb, pull_size)) {
2843 printk(KERN_ERR
2844 "__pskb_pull_tail failed.\n");
2845 dev_kfree_skb_any(skb);
2846 return -EFAULT;
2847 }
2848 len = skb->len - skb->data_len;
2849 break;
2850 default:
2851 /* do nothing */
2852 break;
d74bbd3b 2853 }
9a3056da 2854 }
1da177e4
LT		 2855 }
2856
9a3056da 2857 /* reserve a descriptor for the offload context */
96838a40 2858 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2859 count++;
2648345f 2860 count++;
1da177e4 2861#else
96838a40 2862 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2863 count++;
2864#endif
fd803241
JK		 2865
2866#ifdef NETIF_F_TSO
2867 /* Controller Erratum workaround */
2868 if (!skb->data_len && tx_ring->last_tx_tso &&
2869 !skb_shinfo(skb)->tso_size)
2870 count++;
2871#endif
2872
1da177e4
LT		 2873 count += TXD_USE_COUNT(len, max_txd_pwr);
2874
96838a40 2875 if (adapter->pcix_82544)
1da177e4
LT		 2876 count++;
2877
96838a40 2878 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2879 * in PCI-X mode, so add one more descriptor to the count
2880 */
96838a40 2881 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2882 (len > 2015)))
2883 count++;
2884
1da177e4 2885 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2886 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2887 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2888 max_txd_pwr);
96838a40 2889 if (adapter->pcix_82544)
1da177e4
LT		 2890 count += nr_frags;
2891
96838a40 2892 if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2d7edb92
MC		 2893 e1000_transfer_dhcp_info(adapter, skb);
2894
581d708e
MC		 2895 local_irq_save(flags);
2896 if (!spin_trylock(&tx_ring->tx_lock)) {
2897 /* Collision - tell upper layer to requeue */
2898 local_irq_restore(flags);
2899 return NETDEV_TX_LOCKED;
2900 }
1da177e4
LT		 2901
2902 /* need: count + 2 desc gap to keep tail from touching
2903 * head, otherwise try next time */
581d708e 2904 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2905 netif_stop_queue(netdev);
581d708e 2906 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2907 return NETDEV_TX_BUSY;
2908 }
2909
96838a40
JB		 2910 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2911 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2912 netif_stop_queue(netdev);
2913 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2914 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2915 return NETDEV_TX_BUSY;
2916 }
2917 }
2918
96838a40 2919 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2920 tx_flags |= E1000_TX_FLAGS_VLAN;
2921 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2922 }
2923
581d708e 2924 first = tx_ring->next_to_use;
96838a40 2925
581d708e 2926 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2927 if (tso < 0) {
2928 dev_kfree_skb_any(skb);
581d708e 2929 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2930 return NETDEV_TX_OK;
2931 }
2932
fd803241
JK		 2933 if (likely(tso)) {
2934 tx_ring->last_tx_tso = 1;
1da177e4 2935 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2936 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2937 tx_flags |= E1000_TX_FLAGS_CSUM;
2938
2d7edb92 2939 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2940 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2941 * no longer assume, we must. */
581d708e 2942 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2943 tx_flags |= E1000_TX_FLAGS_IPV4;
2944
581d708e
MC		 2945 e1000_tx_queue(adapter, tx_ring, tx_flags,
2946 e1000_tx_map(adapter, tx_ring, skb, first,
2947 max_per_txd, nr_frags, mss));
1da177e4
LT		 2948
2949 netdev->trans_start = jiffies;
2950
2951 /* Make sure there is space in the ring for the next send. */
581d708e 2952 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2953 netif_stop_queue(netdev);
2954
581d708e 2955 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2956 return NETDEV_TX_OK;
2957}
2958
2959/**
2960 * e1000_tx_timeout - Respond to a Tx Hang
2961 * @netdev: network interface device structure
2962 **/
2963
2964static void
2965e1000_tx_timeout(struct net_device *netdev)
2966{
60490fe0 2967 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2968
2969 /* Do the reset outside of interrupt context */
87041639
JK		 2970 adapter->tx_timeout_count++;
2971 schedule_work(&adapter->reset_task);
1da177e4
LT		 2972}
2973
2974static void
87041639 2975e1000_reset_task(struct net_device *netdev)
1da177e4 2976{
60490fe0 2977 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2978
2979 e1000_down(adapter);
2980 e1000_up(adapter);
2981}
2982
2983/**
2984 * e1000_get_stats - Get System Network Statistics
2985 * @netdev: network interface device structure
2986 *
2987 * Returns the address of the device statistics structure.
2988 * The statistics are actually updated from the timer callback.
2989 **/
2990
2991static struct net_device_stats *
2992e1000_get_stats(struct net_device *netdev)
2993{
60490fe0 2994 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2995
6b7660cd 2996 /* only return the current stats */
1da177e4
LT		 2997 return &adapter->net_stats;
2998}
2999
3000/**
3001 * e1000_change_mtu - Change the Maximum Transfer Unit
3002 * @netdev: network interface device structure
3003 * @new_mtu: new value for maximum frame size
3004 *
3005 * Returns 0 on success, negative on failure
3006 **/
3007
3008static int
3009e1000_change_mtu(struct net_device *netdev, int new_mtu)
3010{
60490fe0 3011 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3012 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3013 uint16_t eeprom_data = 0;
1da177e4 3014
96838a40
JB		 3015 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3016 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3017 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3018 return -EINVAL;
2d7edb92 3019 }
1da177e4 3020
997f5cbd
JK		 3021 /* Adapter-specific max frame size limits. */
3022 switch (adapter->hw.mac_type) {
3023 case e1000_82542_rev2_0:
3024 case e1000_82542_rev2_1:
997f5cbd
JK		 3025 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3026 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3027 return -EINVAL;
2d7edb92 3028 }
997f5cbd 3029 break;
85b22eb6
JK		 3030 case e1000_82573:
3031 /* only enable jumbo frames if ASPM is disabled completely
3032 * this means both bits must be zero in 0x1A bits 3:2 */
3033 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3034 &eeprom_data);
3035 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3036 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3037 DPRINTK(PROBE, ERR,
3038 "Jumbo Frames not supported.\n");
3039 return -EINVAL;
3040 }
3041 break;
3042 }
3043 /* fall through to get support */
997f5cbd
JK		 3044 case e1000_82571:
3045 case e1000_82572:
87041639 3046 case e1000_80003es2lan:
997f5cbd
JK		 3047#define MAX_STD_JUMBO_FRAME_SIZE 9234
3048 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3049 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3050 return -EINVAL;
3051 }
3052 break;
3053 default:
3054 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3055 break;
1da177e4
LT		 3056 }
3057
997f5cbd 3058
997f5cbd 3059 if (adapter->hw.mac_type > e1000_82547_rev_2) {
a1415ee6 3060 adapter->rx_buffer_len = max_frame;
997f5cbd 3061 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
a1415ee6
JK		 3062 } else {
3063 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
3064 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
3065 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
3066 "on 82542\n");
3067 return -EINVAL;
3068 } else {
3069 if(max_frame <= E1000_RXBUFFER_2048)
3070 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3071 else if(max_frame <= E1000_RXBUFFER_4096)
3072 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3073 else if(max_frame <= E1000_RXBUFFER_8192)
3074 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3075 else if(max_frame <= E1000_RXBUFFER_16384)
3076 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3077 }
3078 }
997f5cbd 3079
2d7edb92
MC		 3080 netdev->mtu = new_mtu;
3081
96838a40 3082 if (netif_running(netdev)) {
1da177e4
LT		 3083 e1000_down(adapter);
3084 e1000_up(adapter);
3085 }
3086
1da177e4
LT		 3087 adapter->hw.max_frame_size = max_frame;
3088
3089 return 0;
3090}
3091
3092/**
3093 * e1000_update_stats - Update the board statistics counters
3094 * @adapter: board private structure
3095 **/
3096
3097void
3098e1000_update_stats(struct e1000_adapter *adapter)
3099{
3100 struct e1000_hw *hw = &adapter->hw;
3101 unsigned long flags;
3102 uint16_t phy_tmp;
3103
3104#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3105
3106 spin_lock_irqsave(&adapter->stats_lock, flags);
3107
3108 /* these counters are modified from e1000_adjust_tbi_stats,
3109 * called from the interrupt context, so they must only
3110 * be written while holding adapter->stats_lock
3111 */
3112
3113 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3114 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3115 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3116 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3117 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3118 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3119 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3120 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3121 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3122 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3123 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3124 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3125 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3126
3127 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3128 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3129 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3130 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3131 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3132 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3133 adapter->stats.dc += E1000_READ_REG(hw, DC);
3134 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3135 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3136 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3137 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3138 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3139 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3140 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3141 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3142 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3143 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3144 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3145 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3146 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3147 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3148 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3149 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3150 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3151 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3152 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3153 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3154 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3155 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3156 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3157 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3158 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3159 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3160 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3161
3162 /* used for adaptive IFS */
3163
3164 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3165 adapter->stats.tpt += hw->tx_packet_delta;
3166 hw->collision_delta = E1000_READ_REG(hw, COLC);
3167 adapter->stats.colc += hw->collision_delta;
3168
96838a40 3169 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3170 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3171 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3172 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3173 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3174 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3175 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3176 }
96838a40 3177 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3178 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3179 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3180 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3181 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3182 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3183 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3184 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3185 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3186 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3187 }
1da177e4
LT		 3188
3189 /* Fill out the OS statistics structure */
3190
3191 adapter->net_stats.rx_packets = adapter->stats.gprc;
3192 adapter->net_stats.tx_packets = adapter->stats.gptc;
3193 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3194 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3195 adapter->net_stats.multicast = adapter->stats.mprc;
3196 adapter->net_stats.collisions = adapter->stats.colc;
3197
3198 /* Rx Errors */
3199
87041639
JK		 3200 /* RLEC on some newer hardware can be incorrect so build
3201 * our own version based on RUC and ROC */
1da177e4
LT		 3202 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3203 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3204 adapter->stats.ruc + adapter->stats.roc +
3205 adapter->stats.cexterr;
6b7660cd 3206 adapter->net_stats.rx_dropped = 0;
87041639
JK		 3207 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3208 adapter->stats.roc;
1da177e4
LT		 3209 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3210 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3211 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3212
3213 /* Tx Errors */
3214
3215 adapter->net_stats.tx_errors = adapter->stats.ecol +
3216 adapter->stats.latecol;
3217 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3218 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3219 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3220
3221 /* Tx Dropped needs to be maintained elsewhere */
3222
3223 /* Phy Stats */
3224
96838a40
JB		 3225 if (hw->media_type == e1000_media_type_copper) {
3226 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3227 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3228 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3229 adapter->phy_stats.idle_errors += phy_tmp;
3230 }
3231
96838a40 3232 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3233 (hw->phy_type == e1000_phy_m88) &&
3234 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3235 adapter->phy_stats.receive_errors += phy_tmp;
3236 }
3237
3238 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3239}
3240
3241/**
3242 * e1000_intr - Interrupt Handler
3243 * @irq: interrupt number
3244 * @data: pointer to a network interface device structure
3245 * @pt_regs: CPU registers structure
3246 **/
3247
3248static irqreturn_t
3249e1000_intr(int irq, void *data, struct pt_regs *regs)
3250{
3251 struct net_device *netdev = data;
60490fe0 3252 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3253 struct e1000_hw *hw = &adapter->hw;
87041639 3254 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3255#ifndef CONFIG_E1000_NAPI
581d708e 3256 int i;
1e613fd9
JK		 3257#else
3258 /* Interrupt Auto-Mask...upon reading ICR,
3259 * interrupts are masked. No need for the
3260 * IMC write, but it does mean we should
3261 * account for it ASAP. */
3262 if (likely(hw->mac_type >= e1000_82571))
3263 atomic_inc(&adapter->irq_sem);
be2b28ed 3264#endif
1da177e4 3265
1e613fd9
JK		 3266 if (unlikely(!icr)) {
3267#ifdef CONFIG_E1000_NAPI
3268 if (hw->mac_type >= e1000_82571)
3269 e1000_irq_enable(adapter);
3270#endif
1da177e4 3271 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3272 }
1da177e4 3273
96838a40 3274 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3275 hw->get_link_status = 1;
87041639
JK		 3276 /* 80003ES2LAN workaround--
3277 * For packet buffer work-around on link down event;
3278 * disable receives here in the ISR and
3279 * reset adapter in watchdog
3280 */
3281 if (netif_carrier_ok(netdev) &&
3282 (adapter->hw.mac_type == e1000_80003es2lan)) {
3283 /* disable receives */
3284 rctl = E1000_READ_REG(hw, RCTL);
3285 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3286 }
1da177e4
LT		 3287 mod_timer(&adapter->watchdog_timer, jiffies);
3288 }
3289
3290#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3291 if (unlikely(hw->mac_type < e1000_82571)) {
3292 atomic_inc(&adapter->irq_sem);
3293 E1000_WRITE_REG(hw, IMC, ~0);
3294 E1000_WRITE_FLUSH(hw);
3295 }
581d708e
MC		 3296 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3297 __netif_rx_schedule(&adapter->polling_netdev[0]);
3298 else
3299 e1000_irq_enable(adapter);
c1605eb3 3300#else
1da177e4 3301 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3302 * Due to Hub Link bus being occupied, an interrupt
3303 * de-assertion message is not able to be sent.
3304 * When an interrupt assertion message is generated later,
3305 * two messages are re-ordered and sent out.
3306 * That causes APIC to think 82547 is in de-assertion
3307 * state, while 82547 is in assertion state, resulting
3308 * in dead lock. Writing IMC forces 82547 into
3309 * de-assertion state.
3310 */
3311 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3312 atomic_inc(&adapter->irq_sem);
2648345f 3313 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3314 }
3315
96838a40
JB		 3316 for (i = 0; i < E1000_MAX_INTR; i++)
3317 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3318 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3319 break;
3320
96838a40 3321 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3322 e1000_irq_enable(adapter);
581d708e 3323
c1605eb3 3324#endif
1da177e4
LT		 3325
3326 return IRQ_HANDLED;
3327}
3328
3329#ifdef CONFIG_E1000_NAPI
3330/**
3331 * e1000_clean - NAPI Rx polling callback
3332 * @adapter: board private structure
3333 **/
3334
3335static int
581d708e 3336e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3337{
581d708e
MC		 3338 struct e1000_adapter *adapter;
3339 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3340 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3341
3342 /* Must NOT use netdev_priv macro here. */
3343 adapter = poll_dev->priv;
3344
3345 /* Keep link state information with original netdev */
3346 if (!netif_carrier_ok(adapter->netdev))
3347 goto quit_polling;
2648345f 3348
581d708e
MC		 3349 while (poll_dev != &adapter->polling_netdev[i]) {
3350 i++;
f56799ea 3351 if (unlikely(i == adapter->num_rx_queues))
581d708e
MC		 3352 BUG();
3353 }
3354
8241e35e
JK		 3355 if (likely(adapter->num_tx_queues == 1)) {
3356 /* e1000_clean is called per-cpu. This lock protects
3357 * tx_ring[0] from being cleaned by multiple cpus
3358 * simultaneously. A failure obtaining the lock means
3359 * tx_ring[0] is currently being cleaned anyway. */
3360 if (spin_trylock(&adapter->tx_queue_lock)) {
3361 tx_cleaned = e1000_clean_tx_irq(adapter,
3362 &adapter->tx_ring[0]);
3363 spin_unlock(&adapter->tx_queue_lock);
3364 }
3365 } else
3366 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3367
581d708e
MC		 3368 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3369 &work_done, work_to_do);
1da177e4
LT		 3370
3371 *budget -= work_done;
581d708e 3372 poll_dev->quota -= work_done;
96838a40 3373
2b02893e 3374 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3375 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3376 !netif_running(adapter->netdev)) {
3377quit_polling:
3378 netif_rx_complete(poll_dev);
1da177e4
LT		 3379 e1000_irq_enable(adapter);
3380 return 0;
3381 }
3382
3383 return 1;
3384}
3385
3386#endif
3387/**
3388 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3389 * @adapter: board private structure
3390 **/
3391
3392static boolean_t
581d708e
MC		 3393e1000_clean_tx_irq(struct e1000_adapter *adapter,
3394 struct e1000_tx_ring *tx_ring)
1da177e4 3395{
1da177e4
LT		 3396 struct net_device *netdev = adapter->netdev;
3397 struct e1000_tx_desc *tx_desc, *eop_desc;
3398 struct e1000_buffer *buffer_info;
3399 unsigned int i, eop;
2a1af5d7
JK		 3400#ifdef CONFIG_E1000_NAPI
3401 unsigned int count = 0;
3402#endif
1da177e4
LT		 3403 boolean_t cleaned = FALSE;
3404
3405 i = tx_ring->next_to_clean;
3406 eop = tx_ring->buffer_info[i].next_to_watch;
3407 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3408
581d708e 3409 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3410 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3411 tx_desc = E1000_TX_DESC(*tx_ring, i);
3412 buffer_info = &tx_ring->buffer_info[i];
3413 cleaned = (i == eop);
3414
fd803241 3415 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3416 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3417
96838a40 3418 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3419 }
581d708e 3420
7bfa4816 3421
1da177e4
LT		 3422 eop = tx_ring->buffer_info[i].next_to_watch;
3423 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3424#ifdef CONFIG_E1000_NAPI
3425#define E1000_TX_WEIGHT 64
3426 /* weight of a sort for tx, to avoid endless transmit cleanup */
3427 if (count++ == E1000_TX_WEIGHT) break;
3428#endif
1da177e4
LT		 3429 }
3430
3431 tx_ring->next_to_clean = i;
3432
581d708e 3433 spin_lock(&tx_ring->tx_lock);
1da177e4 3434
96838a40 3435 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
1da177e4
LT		 3436 netif_carrier_ok(netdev)))
3437 netif_wake_queue(netdev);
3438
581d708e 3439 spin_unlock(&tx_ring->tx_lock);
2648345f 3440
581d708e 3441 if (adapter->detect_tx_hung) {
2648345f 3442 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3443 * check with the clearing of time_stamp and movement of i */
3444 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3445 if (tx_ring->buffer_info[eop].dma &&
3446 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3447 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3448 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3449 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3450
3451 /* detected Tx unit hang */
c6963ef5 3452 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3453 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3454 " TDH <%x>\n"
3455 " TDT <%x>\n"
3456 " next_to_use <%x>\n"
3457 " next_to_clean <%x>\n"
3458 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3459 " time_stamp <%lx>\n"
3460 " next_to_watch <%x>\n"
3461 " jiffies <%lx>\n"
3462 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3463 (unsigned long)((tx_ring - adapter->tx_ring) /
3464 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3465 readl(adapter->hw.hw_addr + tx_ring->tdh),
3466 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3467 tx_ring->next_to_use,
392137fa
JK		 3468 tx_ring->next_to_clean,
3469 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3470 eop,
3471 jiffies,
3472 eop_desc->upper.fields.status);
1da177e4 3473 netif_stop_queue(netdev);
70b8f1e1 3474 }
1da177e4 3475 }
1da177e4
LT		 3476 return cleaned;
3477}
3478
3479/**
3480 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3481 * @adapter: board private structure
3482 * @status_err: receive descriptor status and error fields
3483 * @csum: receive descriptor csum field
3484 * @sk_buff: socket buffer with received data
1da177e4
LT		 3485 **/
3486
3487static inline void
3488e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3489 uint32_t status_err, uint32_t csum,
3490 struct sk_buff *skb)
1da177e4 3491{
2d7edb92
MC		 3492 uint16_t status = (uint16_t)status_err;
3493 uint8_t errors = (uint8_t)(status_err >> 24);
3494 skb->ip_summed = CHECKSUM_NONE;
3495
1da177e4 3496 /* 82543 or newer only */
96838a40 3497 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3498 /* Ignore Checksum bit is set */
96838a40 3499 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3500 /* TCP/UDP checksum error bit is set */
96838a40 3501 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3502 /* let the stack verify checksum errors */
1da177e4 3503 adapter->hw_csum_err++;
2d7edb92
MC		 3504 return;
3505 }
3506 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3507 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3508 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3509 return;
1da177e4 3510 } else {
96838a40 3511 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3512 return;
3513 }
3514 /* It must be a TCP or UDP packet with a valid checksum */
3515 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3516 /* TCP checksum is good */
3517 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3518 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3519 /* IP fragment with UDP payload */
3520 /* Hardware complements the payload checksum, so we undo it
3521 * and then put the value in host order for further stack use.
3522 */
3523 csum = ntohl(csum ^ 0xFFFF);
3524 skb->csum = csum;
3525 skb->ip_summed = CHECKSUM_HW;
1da177e4 3526 }
2d7edb92 3527 adapter->hw_csum_good++;
1da177e4
LT		 3528}
3529
3530/**
2d7edb92 3531 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3532 * @adapter: board private structure
3533 **/
3534
3535static boolean_t
3536#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3537e1000_clean_rx_irq(struct e1000_adapter *adapter,
3538 struct e1000_rx_ring *rx_ring,
3539 int *work_done, int work_to_do)
1da177e4 3540#else
581d708e
MC		 3541e1000_clean_rx_irq(struct e1000_adapter *adapter,
3542 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3543#endif
3544{
1da177e4
LT		 3545 struct net_device *netdev = adapter->netdev;
3546 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3547 struct e1000_rx_desc *rx_desc, *next_rxd;
3548 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3549 unsigned long flags;
3550 uint32_t length;
3551 uint8_t last_byte;
3552 unsigned int i;
72d64a43 3553 int cleaned_count = 0;
a1415ee6 3554 boolean_t cleaned = FALSE;
1da177e4
LT		 3555
3556 i = rx_ring->next_to_clean;
3557 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3558 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3559
b92ff8ee 3560 while (rx_desc->status & E1000_RXD_STAT_DD) {
86c3d59f 3561 struct sk_buff *skb, *next_skb;
a292ca6e 3562 u8 status;
1da177e4 3563#ifdef CONFIG_E1000_NAPI
96838a40 3564 if (*work_done >= work_to_do)
1da177e4
LT		 3565 break;
3566 (*work_done)++;
3567#endif
a292ca6e 3568 status = rx_desc->status;
b92ff8ee 3569 skb = buffer_info->skb;
86c3d59f
JB		 3570 buffer_info->skb = NULL;
3571
30320be8
JK		 3572 prefetch(skb->data - NET_IP_ALIGN);
3573
86c3d59f
JB		 3574 if (++i == rx_ring->count) i = 0;
3575 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3576 prefetch(next_rxd);
3577
86c3d59f
JB		 3578 next_buffer = &rx_ring->buffer_info[i];
3579 next_skb = next_buffer->skb;
30320be8 3580 prefetch(next_skb->data - NET_IP_ALIGN);
86c3d59f 3581
72d64a43
JK		 3582 cleaned = TRUE;
3583 cleaned_count++;
a292ca6e
JK		 3584 pci_unmap_single(pdev,
3585 buffer_info->dma,
3586 buffer_info->length,
1da177e4
LT		 3587 PCI_DMA_FROMDEVICE);
3588
1da177e4
LT		 3589 length = le16_to_cpu(rx_desc->length);
3590
a1415ee6
JK		 3591 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3592 /* All receives must fit into a single buffer */
3593 E1000_DBG("%s: Receive packet consumed multiple"
3594 " buffers\n", netdev->name);
3595 dev_kfree_skb_irq(skb);
1da177e4
LT		 3596 goto next_desc;
3597 }
3598
96838a40 3599 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3600 last_byte = *(skb->data + length - 1);
b92ff8ee 3601 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3602 rx_desc->errors, length, last_byte)) {
3603 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3604 e1000_tbi_adjust_stats(&adapter->hw,
3605 &adapter->stats,
1da177e4
LT		 3606 length, skb->data);
3607 spin_unlock_irqrestore(&adapter->stats_lock,
3608 flags);
3609 length--;
3610 } else {
3611 dev_kfree_skb_irq(skb);
3612 goto next_desc;
3613 }
3614 }
3615
a292ca6e
JK		 3616 /* code added for copybreak, this should improve
3617 * performance for small packets with large amounts
3618 * of reassembly being done in the stack */
3619#define E1000_CB_LENGTH 256
a1415ee6 3620 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3621 struct sk_buff *new_skb =
3622 dev_alloc_skb(length + NET_IP_ALIGN);
3623 if (new_skb) {
3624 skb_reserve(new_skb, NET_IP_ALIGN);
3625 new_skb->dev = netdev;
3626 memcpy(new_skb->data - NET_IP_ALIGN,
3627 skb->data - NET_IP_ALIGN,
3628 length + NET_IP_ALIGN);
3629 /* save the skb in buffer_info as good */
3630 buffer_info->skb = skb;
3631 skb = new_skb;
3632 skb_put(skb, length);
3633 }
a1415ee6
JK		 3634 } else
3635 skb_put(skb, length);
a292ca6e
JK		 3636
3637 /* end copybreak code */
1da177e4
LT		 3638
3639 /* Receive Checksum Offload */
a292ca6e
JK		 3640 e1000_rx_checksum(adapter,
3641 (uint32_t)(status) |
2d7edb92
MC		 3642 ((uint32_t)(rx_desc->errors) << 24),
3643 rx_desc->csum, skb);
96838a40 3644
1da177e4
LT		 3645 skb->protocol = eth_type_trans(skb, netdev);
3646#ifdef CONFIG_E1000_NAPI
96838a40 3647 if (unlikely(adapter->vlgrp &&
a292ca6e 3648 (status & E1000_RXD_STAT_VP))) {
1da177e4 3649 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3650 le16_to_cpu(rx_desc->special) &
3651 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3652 } else {
3653 netif_receive_skb(skb);
3654 }
3655#else /* CONFIG_E1000_NAPI */
96838a40 3656 if (unlikely(adapter->vlgrp &&
b92ff8ee 3657 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3658 vlan_hwaccel_rx(skb, adapter->vlgrp,
3659 le16_to_cpu(rx_desc->special) &
3660 E1000_RXD_SPC_VLAN_MASK);
3661 } else {
3662 netif_rx(skb);
3663 }
3664#endif /* CONFIG_E1000_NAPI */
3665 netdev->last_rx = jiffies;
3666
3667next_desc:
3668 rx_desc->status = 0;
1da177e4 3669
72d64a43
JK		 3670 /* return some buffers to hardware, one at a time is too slow */
3671 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3672 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3673 cleaned_count = 0;
3674 }
3675
30320be8 3676 /* use prefetched values */
86c3d59f
JB		 3677 rx_desc = next_rxd;
3678 buffer_info = next_buffer;
1da177e4 3679 }
1da177e4 3680 rx_ring->next_to_clean = i;
72d64a43
JK		 3681
3682 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3683 if (cleaned_count)
3684 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3685
3686 return cleaned;
3687}
3688
3689/**
3690 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3691 * @adapter: board private structure
3692 **/
3693
3694static boolean_t
3695#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3696e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3697 struct e1000_rx_ring *rx_ring,
3698 int *work_done, int work_to_do)
2d7edb92 3699#else
581d708e
MC		 3700e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3701 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3702#endif
3703{
86c3d59f 3704 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3705 struct net_device *netdev = adapter->netdev;
3706 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3707 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3708 struct e1000_ps_page *ps_page;
3709 struct e1000_ps_page_dma *ps_page_dma;
86c3d59f 3710 struct sk_buff *skb, *next_skb;
2d7edb92
MC		 3711 unsigned int i, j;
3712 uint32_t length, staterr;
72d64a43 3713 int cleaned_count = 0;
2d7edb92
MC		 3714 boolean_t cleaned = FALSE;
3715
3716 i = rx_ring->next_to_clean;
3717 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3718 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92 3719
96838a40 3720 while (staterr & E1000_RXD_STAT_DD) {
30320be8 3721 buffer_info = &rx_ring->buffer_info[i];
2d7edb92
MC		 3722 ps_page = &rx_ring->ps_page[i];
3723 ps_page_dma = &rx_ring->ps_page_dma[i];
3724#ifdef CONFIG_E1000_NAPI
96838a40 3725 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3726 break;
3727 (*work_done)++;
3728#endif
86c3d59f
JB		 3729 skb = buffer_info->skb;
3730
30320be8
JK		 3731 /* in the packet split case this is header only */
3732 prefetch(skb->data - NET_IP_ALIGN);
3733
86c3d59f
JB		 3734 if (++i == rx_ring->count) i = 0;
3735 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3736 prefetch(next_rxd);
3737
86c3d59f
JB		 3738 next_buffer = &rx_ring->buffer_info[i];
3739 next_skb = next_buffer->skb;
30320be8 3740 prefetch(next_skb->data - NET_IP_ALIGN);
86c3d59f 3741
2d7edb92 3742 cleaned = TRUE;
72d64a43 3743 cleaned_count++;
2d7edb92
MC		 3744 pci_unmap_single(pdev, buffer_info->dma,
3745 buffer_info->length,
3746 PCI_DMA_FROMDEVICE);
3747
96838a40 3748 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3749 E1000_DBG("%s: Packet Split buffers didn't pick up"
3750 " the full packet\n", netdev->name);
3751 dev_kfree_skb_irq(skb);
3752 goto next_desc;
3753 }
1da177e4 3754
96838a40 3755 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3756 dev_kfree_skb_irq(skb);
3757 goto next_desc;
3758 }
3759
3760 length = le16_to_cpu(rx_desc->wb.middle.length0);
3761
96838a40 3762 if (unlikely(!length)) {
2d7edb92
MC		 3763 E1000_DBG("%s: Last part of the packet spanning"
3764 " multiple descriptors\n", netdev->name);
3765 dev_kfree_skb_irq(skb);
3766 goto next_desc;
3767 }
3768
3769 /* Good Receive */
3770 skb_put(skb, length);
3771
dc7c6add
JK		 3772 {
3773 /* this looks ugly, but it seems compiler issues make it
3774 more efficient than reusing j */
3775 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3776
3777 /* page alloc/put takes too long and effects small packet
3778 * throughput, so unsplit small packets and save the alloc/put*/
3779 if (l1 && ((length + l1) < E1000_CB_LENGTH)) {
3780 u8 *vaddr;
3781 /* there is no documentation about how to call
3782 * kmap_atomic, so we can't hold the mapping
3783 * very long */
3784 pci_dma_sync_single_for_cpu(pdev,
3785 ps_page_dma->ps_page_dma[0],
3786 PAGE_SIZE,
3787 PCI_DMA_FROMDEVICE);
3788 vaddr = kmap_atomic(ps_page->ps_page[0],
3789 KM_SKB_DATA_SOFTIRQ);
3790 memcpy(skb->tail, vaddr, l1);
3791 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3792 pci_dma_sync_single_for_device(pdev,
3793 ps_page_dma->ps_page_dma[0],
3794 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3795 skb_put(skb, l1);
3796 length += l1;
3797 goto copydone;
3798 } /* if */
3799 }
3800
96838a40 3801 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3802 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3803 break;
2d7edb92
MC		 3804 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3805 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3806 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3807 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3808 length);
2d7edb92 3809 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3810 skb->len += length;
3811 skb->data_len += length;
3812 }
3813
dc7c6add 3814copydone:
2d7edb92
MC		 3815 e1000_rx_checksum(adapter, staterr,
3816 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3817 skb->protocol = eth_type_trans(skb, netdev);
3818
96838a40 3819 if (likely(rx_desc->wb.upper.header_status &
b92ff8ee 3820 E1000_RXDPS_HDRSTAT_HDRSP))
e4c811c9 3821 adapter->rx_hdr_split++;
2d7edb92 3822#ifdef CONFIG_E1000_NAPI
96838a40 3823 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3824 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3825 le16_to_cpu(rx_desc->wb.middle.vlan) &
3826 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3827 } else {
3828 netif_receive_skb(skb);
3829 }
3830#else /* CONFIG_E1000_NAPI */
96838a40 3831 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3832 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3833 le16_to_cpu(rx_desc->wb.middle.vlan) &
3834 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3835 } else {
3836 netif_rx(skb);
3837 }
3838#endif /* CONFIG_E1000_NAPI */
3839 netdev->last_rx = jiffies;
3840
3841next_desc:
3842 rx_desc->wb.middle.status_error &= ~0xFF;
3843 buffer_info->skb = NULL;
2d7edb92 3844
72d64a43
JK		 3845 /* return some buffers to hardware, one at a time is too slow */
3846 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3847 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3848 cleaned_count = 0;
3849 }
3850
30320be8 3851 /* use prefetched values */
86c3d59f
JB		 3852 rx_desc = next_rxd;
3853 buffer_info = next_buffer;
3854
683a38f3 3855 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3856 }
3857 rx_ring->next_to_clean = i;
72d64a43
JK		 3858
3859 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3860 if (cleaned_count)
3861 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3862
3863 return cleaned;
3864}
3865
3866/**
2d7edb92 3867 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3868 * @adapter: address of board private structure
3869 **/
3870
3871static void
581d708e 3872e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3873 struct e1000_rx_ring *rx_ring,
a292ca6e 3874 int cleaned_count)
1da177e4 3875{
1da177e4
LT		 3876 struct net_device *netdev = adapter->netdev;
3877 struct pci_dev *pdev = adapter->pdev;
3878 struct e1000_rx_desc *rx_desc;
3879 struct e1000_buffer *buffer_info;
3880 struct sk_buff *skb;
2648345f
MC		 3881 unsigned int i;
3882 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3883
3884 i = rx_ring->next_to_use;
3885 buffer_info = &rx_ring->buffer_info[i];
3886
a292ca6e
JK		 3887 while (cleaned_count--) {
3888 if (!(skb = buffer_info->skb))
3889 skb = dev_alloc_skb(bufsz);
3890 else {
3891 skb_trim(skb, 0);
3892 goto map_skb;
3893 }
3894
2648345f 3895
96838a40 3896 if (unlikely(!skb)) {
1da177e4 3897 /* Better luck next round */
72d64a43 3898 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3899 break;
3900 }
3901
2648345f 3902 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3903 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3904 struct sk_buff *oldskb = skb;
2648345f
MC		 3905 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3906 "at %p\n", bufsz, skb->data);
3907 /* Try again, without freeing the previous */
1da177e4 3908 skb = dev_alloc_skb(bufsz);
2648345f 3909 /* Failed allocation, critical failure */
1da177e4
LT		 3910 if (!skb) {
3911 dev_kfree_skb(oldskb);
3912 break;
3913 }
2648345f 3914
1da177e4
LT		 3915 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3916 /* give up */
3917 dev_kfree_skb(skb);
3918 dev_kfree_skb(oldskb);
3919 break; /* while !buffer_info->skb */
3920 } else {
2648345f 3921 /* Use new allocation */
1da177e4
LT		 3922 dev_kfree_skb(oldskb);
3923 }
3924 }
1da177e4
LT		 3925 /* Make buffer alignment 2 beyond a 16 byte boundary
3926 * this will result in a 16 byte aligned IP header after
3927 * the 14 byte MAC header is removed
3928 */
3929 skb_reserve(skb, NET_IP_ALIGN);
3930
3931 skb->dev = netdev;
3932
3933 buffer_info->skb = skb;
3934 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3935map_skb:
1da177e4
LT		 3936 buffer_info->dma = pci_map_single(pdev,
3937 skb->data,
3938 adapter->rx_buffer_len,
3939 PCI_DMA_FROMDEVICE);
3940
2648345f
MC		 3941 /* Fix for errata 23, can't cross 64kB boundary */
3942 if (!e1000_check_64k_bound(adapter,
3943 (void *)(unsigned long)buffer_info->dma,
3944 adapter->rx_buffer_len)) {
3945 DPRINTK(RX_ERR, ERR,
3946 "dma align check failed: %u bytes at %p\n",
3947 adapter->rx_buffer_len,
3948 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3949 dev_kfree_skb(skb);
3950 buffer_info->skb = NULL;
3951
2648345f 3952 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3953 adapter->rx_buffer_len,
3954 PCI_DMA_FROMDEVICE);
3955
3956 break; /* while !buffer_info->skb */
3957 }
1da177e4
LT		 3958 rx_desc = E1000_RX_DESC(*rx_ring, i);
3959 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3960
96838a40
JB		 3961 if (unlikely(++i == rx_ring->count))
3962 i = 0;
1da177e4
LT		 3963 buffer_info = &rx_ring->buffer_info[i];
3964 }
3965
b92ff8ee
JB		 3966 if (likely(rx_ring->next_to_use != i)) {
3967 rx_ring->next_to_use = i;
3968 if (unlikely(i-- == 0))
3969 i = (rx_ring->count - 1);
3970
3971 /* Force memory writes to complete before letting h/w
3972 * know there are new descriptors to fetch. (Only
3973 * applicable for weak-ordered memory model archs,
3974 * such as IA-64). */
3975 wmb();
3976 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3977 }
1da177e4
LT		 3978}
3979
2d7edb92
MC		 3980/**
3981 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3982 * @adapter: address of board private structure
3983 **/
3984
3985static void
581d708e 3986e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3987 struct e1000_rx_ring *rx_ring,
3988 int cleaned_count)
2d7edb92 3989{
2d7edb92
MC		 3990 struct net_device *netdev = adapter->netdev;
3991 struct pci_dev *pdev = adapter->pdev;
3992 union e1000_rx_desc_packet_split *rx_desc;
3993 struct e1000_buffer *buffer_info;
3994 struct e1000_ps_page *ps_page;
3995 struct e1000_ps_page_dma *ps_page_dma;
3996 struct sk_buff *skb;
3997 unsigned int i, j;
3998
3999 i = rx_ring->next_to_use;
4000 buffer_info = &rx_ring->buffer_info[i];
4001 ps_page = &rx_ring->ps_page[i];
4002 ps_page_dma = &rx_ring->ps_page_dma[i];
4003
72d64a43 4004 while (cleaned_count--) {
2d7edb92
MC		 4005 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4006
96838a40 4007 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4008 if (j < adapter->rx_ps_pages) {
4009 if (likely(!ps_page->ps_page[j])) {
4010 ps_page->ps_page[j] =
4011 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4012 if (unlikely(!ps_page->ps_page[j])) {
4013 adapter->alloc_rx_buff_failed++;
e4c811c9 4014 goto no_buffers;
b92ff8ee 4015 }
e4c811c9
MC		 4016 ps_page_dma->ps_page_dma[j] =
4017 pci_map_page(pdev,
4018 ps_page->ps_page[j],
4019 0, PAGE_SIZE,
4020 PCI_DMA_FROMDEVICE);
4021 }
4022 /* Refresh the desc even if buffer_addrs didn't
96838a40 4023 * change because each write-back erases
e4c811c9
MC		 4024 * this info.
4025 */
4026 rx_desc->read.buffer_addr[j+1] =
4027 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4028 } else
4029 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4030 }
4031
4032 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4033
b92ff8ee
JB		 4034 if (unlikely(!skb)) {
4035 adapter->alloc_rx_buff_failed++;
2d7edb92 4036 break;
b92ff8ee 4037 }
2d7edb92
MC		 4038
4039 /* Make buffer alignment 2 beyond a 16 byte boundary
4040 * this will result in a 16 byte aligned IP header after
4041 * the 14 byte MAC header is removed
4042 */
4043 skb_reserve(skb, NET_IP_ALIGN);
4044
4045 skb->dev = netdev;
4046
4047 buffer_info->skb = skb;
4048 buffer_info->length = adapter->rx_ps_bsize0;
4049 buffer_info->dma = pci_map_single(pdev, skb->data,
4050 adapter->rx_ps_bsize0,
4051 PCI_DMA_FROMDEVICE);
4052
4053 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4054
96838a40 4055 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4056 buffer_info = &rx_ring->buffer_info[i];
4057 ps_page = &rx_ring->ps_page[i];
4058 ps_page_dma = &rx_ring->ps_page_dma[i];
4059 }
4060
4061no_buffers:
b92ff8ee
JB		 4062 if (likely(rx_ring->next_to_use != i)) {
4063 rx_ring->next_to_use = i;
4064 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4065
4066 /* Force memory writes to complete before letting h/w
4067 * know there are new descriptors to fetch. (Only
4068 * applicable for weak-ordered memory model archs,
4069 * such as IA-64). */
4070 wmb();
4071 /* Hardware increments by 16 bytes, but packet split
4072 * descriptors are 32 bytes...so we increment tail
4073 * twice as much.
4074 */
4075 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4076 }
2d7edb92
MC		 4077}
4078
1da177e4
LT		 4079/**
4080 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4081 * @adapter:
4082 **/
4083
4084static void
4085e1000_smartspeed(struct e1000_adapter *adapter)
4086{
4087 uint16_t phy_status;
4088 uint16_t phy_ctrl;
4089
96838a40 4090 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4091 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4092 return;
4093
96838a40 4094 if (adapter->smartspeed == 0) {
1da177e4
LT		 4095 /* If Master/Slave config fault is asserted twice,
4096 * we assume back-to-back */
4097 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4098 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4099 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4100 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4101 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4102 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4103 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4104 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4105 phy_ctrl);
4106 adapter->smartspeed++;
96838a40 4107 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4108 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4109 &phy_ctrl)) {
4110 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4111 MII_CR_RESTART_AUTO_NEG);
4112 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4113 phy_ctrl);
4114 }
4115 }
4116 return;
96838a40 4117 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4118 /* If still no link, perhaps using 2/3 pair cable */
4119 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4120 phy_ctrl |= CR_1000T_MS_ENABLE;
4121 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4122 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4123 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4124 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4125 MII_CR_RESTART_AUTO_NEG);
4126 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4127 }
4128 }
4129 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4130 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4131 adapter->smartspeed = 0;
4132}
4133
4134/**
4135 * e1000_ioctl -
4136 * @netdev:
4137 * @ifreq:
4138 * @cmd:
4139 **/
4140
4141static int
4142e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4143{
4144 switch (cmd) {
4145 case SIOCGMIIPHY:
4146 case SIOCGMIIREG:
4147 case SIOCSMIIREG:
4148 return e1000_mii_ioctl(netdev, ifr, cmd);
4149 default:
4150 return -EOPNOTSUPP;
4151 }
4152}
4153
4154/**
4155 * e1000_mii_ioctl -
4156 * @netdev:
4157 * @ifreq:
4158 * @cmd:
4159 **/
4160
4161static int
4162e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4163{
60490fe0 4164 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4165 struct mii_ioctl_data *data = if_mii(ifr);
4166 int retval;
4167 uint16_t mii_reg;
4168 uint16_t spddplx;
97876fc6 4169 unsigned long flags;
1da177e4 4170
96838a40 4171 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4172 return -EOPNOTSUPP;
4173
4174 switch (cmd) {
4175 case SIOCGMIIPHY:
4176 data->phy_id = adapter->hw.phy_addr;
4177 break;
4178 case SIOCGMIIREG:
96838a40 4179 if (!capable(CAP_NET_ADMIN))
1da177e4 4180 return -EPERM;
97876fc6 4181 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4182 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4183 &data->val_out)) {
4184 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4185 return -EIO;
97876fc6
MC		 4186 }
4187 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4188 break;
4189 case SIOCSMIIREG:
96838a40 4190 if (!capable(CAP_NET_ADMIN))
1da177e4 4191 return -EPERM;
96838a40 4192 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4193 return -EFAULT;
4194 mii_reg = data->val_in;
97876fc6 4195 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4196 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4197 mii_reg)) {
4198 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4199 return -EIO;
97876fc6 4200 }
96838a40 4201 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 4202 switch (data->reg_num) {
4203 case PHY_CTRL:
96838a40 4204 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4205 break;
96838a40 4206 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4207 adapter->hw.autoneg = 1;
4208 adapter->hw.autoneg_advertised = 0x2F;
4209 } else {
4210 if (mii_reg & 0x40)
4211 spddplx = SPEED_1000;
4212 else if (mii_reg & 0x2000)
4213 spddplx = SPEED_100;
4214 else
4215 spddplx = SPEED_10;
4216 spddplx += (mii_reg & 0x100)
4217 ? FULL_DUPLEX :
4218 HALF_DUPLEX;
4219 retval = e1000_set_spd_dplx(adapter,
4220 spddplx);
96838a40 4221 if (retval) {
97876fc6 4222 spin_unlock_irqrestore(
96838a40 4223 &adapter->stats_lock,
97876fc6 4224 flags);
1da177e4 4225 return retval;
97876fc6 4226 }
1da177e4 4227 }
96838a40 4228 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4229 e1000_down(adapter);
4230 e1000_up(adapter);
4231 } else
4232 e1000_reset(adapter);
4233 break;
4234 case M88E1000_PHY_SPEC_CTRL:
4235 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4236 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4237 spin_unlock_irqrestore(
4238 &adapter->stats_lock, flags);
1da177e4 4239 return -EIO;
97876fc6 4240 }
1da177e4
LT		 4241 break;
4242 }
4243 } else {
4244 switch (data->reg_num) {
4245 case PHY_CTRL:
96838a40 4246 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4247 break;
96838a40 4248 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4249 e1000_down(adapter);
4250 e1000_up(adapter);
4251 } else
4252 e1000_reset(adapter);
4253 break;
4254 }
4255 }
97876fc6 4256 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4257 break;
4258 default:
4259 return -EOPNOTSUPP;
4260 }
4261 return E1000_SUCCESS;
4262}
4263
4264void
4265e1000_pci_set_mwi(struct e1000_hw *hw)
4266{
4267 struct e1000_adapter *adapter = hw->back;
2648345f 4268 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4269
96838a40 4270 if (ret_val)
2648345f 4271 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4272}
4273
4274void
4275e1000_pci_clear_mwi(struct e1000_hw *hw)
4276{
4277 struct e1000_adapter *adapter = hw->back;
4278
4279 pci_clear_mwi(adapter->pdev);
4280}
4281
4282void
4283e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4284{
4285 struct e1000_adapter *adapter = hw->back;
4286
4287 pci_read_config_word(adapter->pdev, reg, value);
4288}
4289
4290void
4291e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4292{
4293 struct e1000_adapter *adapter = hw->back;
4294
4295 pci_write_config_word(adapter->pdev, reg, *value);
4296}
4297
4298uint32_t
4299e1000_io_read(struct e1000_hw *hw, unsigned long port)
4300{
4301 return inl(port);
4302}
4303
4304void
4305e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4306{
4307 outl(value, port);
4308}
4309
4310static void
4311e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4312{
60490fe0 4313 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4314 uint32_t ctrl, rctl;
4315
4316 e1000_irq_disable(adapter);
4317 adapter->vlgrp = grp;
4318
96838a40 4319 if (grp) {
1da177e4
LT		 4320 /* enable VLAN tag insert/strip */
4321 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4322 ctrl |= E1000_CTRL_VME;
4323 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4324
4325 /* enable VLAN receive filtering */
4326 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4327 rctl |= E1000_RCTL_VFE;
4328 rctl &= ~E1000_RCTL_CFIEN;
4329 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4330 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4331 } else {
4332 /* disable VLAN tag insert/strip */
4333 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4334 ctrl &= ~E1000_CTRL_VME;
4335 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4336
4337 /* disable VLAN filtering */
4338 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4339 rctl &= ~E1000_RCTL_VFE;
4340 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4341 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4342 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4343 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4344 }
1da177e4
LT		 4345 }
4346
4347 e1000_irq_enable(adapter);
4348}
4349
4350static void
4351e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4352{
60490fe0 4353 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4354 uint32_t vfta, index;
96838a40
JB		 4355
4356 if ((adapter->hw.mng_cookie.status &
4357 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4358 (vid == adapter->mng_vlan_id))
2d7edb92 4359 return;
1da177e4
LT		 4360 /* add VID to filter table */
4361 index = (vid >> 5) & 0x7F;
4362 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4363 vfta |= (1 << (vid & 0x1F));
4364 e1000_write_vfta(&adapter->hw, index, vfta);
4365}
4366
4367static void
4368e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4369{
60490fe0 4370 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4371 uint32_t vfta, index;
4372
4373 e1000_irq_disable(adapter);
4374
96838a40 4375 if (adapter->vlgrp)
1da177e4
LT		 4376 adapter->vlgrp->vlan_devices[vid] = NULL;
4377
4378 e1000_irq_enable(adapter);
4379
96838a40
JB		 4380 if ((adapter->hw.mng_cookie.status &
4381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4382 (vid == adapter->mng_vlan_id)) {
4383 /* release control to f/w */
4384 e1000_release_hw_control(adapter);
2d7edb92 4385 return;
ff147013
JK		 4386 }
4387
1da177e4
LT		 4388 /* remove VID from filter table */
4389 index = (vid >> 5) & 0x7F;
4390 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4391 vfta &= ~(1 << (vid & 0x1F));
4392 e1000_write_vfta(&adapter->hw, index, vfta);
4393}
4394
4395static void
4396e1000_restore_vlan(struct e1000_adapter *adapter)
4397{
4398 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4399
96838a40 4400 if (adapter->vlgrp) {
1da177e4 4401 uint16_t vid;
96838a40
JB		 4402 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4403 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4404 continue;
4405 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4406 }
4407 }
4408}
4409
4410int
4411e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4412{
4413 adapter->hw.autoneg = 0;
4414
6921368f 4415 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4416 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4417 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4418 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4419 return -EINVAL;
4420 }
4421
96838a40 4422 switch (spddplx) {
1da177e4
LT		 4423 case SPEED_10 + DUPLEX_HALF:
4424 adapter->hw.forced_speed_duplex = e1000_10_half;
4425 break;
4426 case SPEED_10 + DUPLEX_FULL:
4427 adapter->hw.forced_speed_duplex = e1000_10_full;
4428 break;
4429 case SPEED_100 + DUPLEX_HALF:
4430 adapter->hw.forced_speed_duplex = e1000_100_half;
4431 break;
4432 case SPEED_100 + DUPLEX_FULL:
4433 adapter->hw.forced_speed_duplex = e1000_100_full;
4434 break;
4435 case SPEED_1000 + DUPLEX_FULL:
4436 adapter->hw.autoneg = 1;
4437 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4438 break;
4439 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4440 default:
2648345f 4441 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4442 return -EINVAL;
4443 }
4444 return 0;
4445}
4446
b6a1d5f8 4447#ifdef CONFIG_PM
2f82665f
JB		 4448/* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
4449 * space versus the 64 bytes that pci_[save|restore]_state handle
4450 */
4451#define PCIE_CONFIG_SPACE_LEN 256
4452#define PCI_CONFIG_SPACE_LEN 64
4453static int
4454e1000_pci_save_state(struct e1000_adapter *adapter)
4455{
4456 struct pci_dev *dev = adapter->pdev;
4457 int size;
4458 int i;
4459 if (adapter->hw.mac_type >= e1000_82571)
4460 size = PCIE_CONFIG_SPACE_LEN;
4461 else
4462 size = PCI_CONFIG_SPACE_LEN;
4463
4464 WARN_ON(adapter->config_space != NULL);
4465
4466 adapter->config_space = kmalloc(size, GFP_KERNEL);
4467 if (!adapter->config_space) {
4468 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4469 return -ENOMEM;
4470 }
4471 for (i = 0; i < (size / 4); i++)
4472 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4473 return 0;
4474}
4475
4476static void
4477e1000_pci_restore_state(struct e1000_adapter *adapter)
4478{
4479 struct pci_dev *dev = adapter->pdev;
4480 int size;
4481 int i;
4482 if (adapter->config_space == NULL)
4483 return;
4484 if (adapter->hw.mac_type >= e1000_82571)
4485 size = PCIE_CONFIG_SPACE_LEN;
4486 else
4487 size = PCI_CONFIG_SPACE_LEN;
4488 for (i = 0; i < (size / 4); i++)
4489 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4490 kfree(adapter->config_space);
4491 adapter->config_space = NULL;
4492 return;
4493}
4494#endif /* CONFIG_PM */
4495
1da177e4 4496static int
829ca9a3 4497e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4498{
4499 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4500 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4501 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4502 uint32_t wufc = adapter->wol;
240b1710 4503 int retval = 0;
1da177e4
LT		 4504
4505 netif_device_detach(netdev);
4506
96838a40 4507 if (netif_running(netdev))
1da177e4
LT		 4508 e1000_down(adapter);
4509
2f82665f
JB		 4510#ifdef CONFIG_PM
4511 /* implement our own version of pci_save_state(pdev) because pci
4512 * express adapters have larger 256 byte config spaces */
4513 retval = e1000_pci_save_state(adapter);
4514 if (retval)
4515 return retval;
4516#endif
4517
1da177e4 4518 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4519 if (status & E1000_STATUS_LU)
1da177e4
LT		 4520 wufc &= ~E1000_WUFC_LNKC;
4521
96838a40 4522 if (wufc) {
1da177e4
LT		 4523 e1000_setup_rctl(adapter);
4524 e1000_set_multi(netdev);
4525
4526 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4527 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4528 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4529 rctl |= E1000_RCTL_MPE;
4530 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4531 }
4532
96838a40 4533 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4534 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4535 /* advertise wake from D3Cold */
4536 #define E1000_CTRL_ADVD3WUC 0x00100000
4537 /* phy power management enable */
4538 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4539 ctrl |= E1000_CTRL_ADVD3WUC |
4540 E1000_CTRL_EN_PHY_PWR_MGMT;
4541 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4542 }
4543
96838a40 4544 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4545 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4546 /* keep the laser running in D3 */
4547 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4548 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4549 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4550 }
4551
2d7edb92
MC		 4552 /* Allow time for pending master requests to run */
4553 e1000_disable_pciex_master(&adapter->hw);
4554
1da177e4
LT		 4555 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4556 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
240b1710
JK		 4557 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4558 if (retval)
4559 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4560 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4561 if (retval)
4562 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4563 } else {
4564 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4565 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
240b1710
JK		 4566 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4567 if (retval)
4568 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4569 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4570 if (retval)
4571 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4572 }
4573
96838a40 4574 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4575 adapter->hw.media_type == e1000_media_type_copper) {
4576 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4577 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4578 manc |= E1000_MANC_ARP_EN;
4579 E1000_WRITE_REG(&adapter->hw, MANC, manc);
240b1710
JK		 4580 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4581 if (retval)
4582 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4583 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4584 if (retval)
4585 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4586 }
4587 }
4588
b55ccb35
JK		 4589 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4590 * would have already happened in close and is redundant. */
4591 e1000_release_hw_control(adapter);
2d7edb92 4592
1da177e4 4593 pci_disable_device(pdev);
240b1710
JK		 4594
4595 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4596 if (retval)
4597 DPRINTK(PROBE, ERR, "Error in setting power state\n");
1da177e4
LT		 4598
4599 return 0;
4600}
4601
2f82665f 4602#ifdef CONFIG_PM
1da177e4
LT		 4603static int
4604e1000_resume(struct pci_dev *pdev)
4605{
4606 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4607 struct e1000_adapter *adapter = netdev_priv(netdev);
240b1710 4608 int retval;
b55ccb35 4609 uint32_t manc, ret_val;
1da177e4 4610
240b1710
JK		 4611 retval = pci_set_power_state(pdev, PCI_D0);
4612 if (retval)
4613 DPRINTK(PROBE, ERR, "Error in setting power state\n");
2f82665f 4614 e1000_pci_restore_state(adapter);
2b02893e 4615 ret_val = pci_enable_device(pdev);
a4cb847d 4616 pci_set_master(pdev);
1da177e4 4617
240b1710
JK		 4618 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4619 if (retval)
4620 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4621 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4622 if (retval)
4623 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4624
4625 e1000_reset(adapter);
4626 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4627
96838a40 4628 if (netif_running(netdev))
1da177e4
LT		 4629 e1000_up(adapter);
4630
4631 netif_device_attach(netdev);
4632
96838a40 4633 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4634 adapter->hw.media_type == e1000_media_type_copper) {
4635 manc = E1000_READ_REG(&adapter->hw, MANC);
4636 manc &= ~(E1000_MANC_ARP_EN);
4637 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4638 }
4639
b55ccb35
JK		 4640 /* If the controller is 82573 and f/w is AMT, do not set
4641 * DRV_LOAD until the interface is up. For all other cases,
4642 * let the f/w know that the h/w is now under the control
4643 * of the driver. */
4644 if (adapter->hw.mac_type != e1000_82573 ||
4645 !e1000_check_mng_mode(&adapter->hw))
4646 e1000_get_hw_control(adapter);
2d7edb92 4647
1da177e4
LT		 4648 return 0;
4649}
4650#endif
1da177e4
LT		 4651#ifdef CONFIG_NET_POLL_CONTROLLER
4652/*
4653 * Polling 'interrupt' - used by things like netconsole to send skbs
4654 * without having to re-enable interrupts. It's not called while
4655 * the interrupt routine is executing.
4656 */
4657static void
2648345f 4658e1000_netpoll(struct net_device *netdev)
1da177e4 4659{
60490fe0 4660 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4661 disable_irq(adapter->pdev->irq);
4662 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4663 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4664#ifndef CONFIG_E1000_NAPI
4665 adapter->clean_rx(adapter, adapter->rx_ring);
4666#endif
1da177e4
LT		 4667 enable_irq(adapter->pdev->irq);
4668}
4669#endif
4670
4671/* e1000_main.c */
Clone of davem's net-next-2.6 tree