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CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1532ecea 34#define DRV_VERSION "7.3.21-k5-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH		 128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT		 130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
edbbb3ca
JB		 140static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
581d708e 143static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 144 struct e1000_rx_ring *rx_ring,
72d64a43 145 int cleaned_count);
edbbb3ca
JB		 146static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count);
1da177e4
LT		 149static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
150static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
151 int cmd);
1da177e4
LT		 152static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
153static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
154static void e1000_tx_timeout(struct net_device *dev);
65f27f38 155static void e1000_reset_task(struct work_struct *work);
1da177e4 156static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 157static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
158 struct sk_buff *skb);
1da177e4
LT		 159
160static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 161static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164
6fdfef16 165#ifdef CONFIG_PM
b43fcd7d 166static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 167static int e1000_resume(struct pci_dev *pdev);
168#endif
c653e635 169static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 170
171#ifdef CONFIG_NET_POLL_CONTROLLER
172/* for netdump / net console */
173static void e1000_netpoll (struct net_device *netdev);
174#endif
175
1f753861
JB		 176#define COPYBREAK_DEFAULT 256
177static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
178module_param(copybreak, uint, 0644);
179MODULE_PARM_DESC(copybreak,
180 "Maximum size of packet that is copied to a new buffer on receive");
181
9026729b
AK		 182static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
183 pci_channel_state_t state);
184static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
185static void e1000_io_resume(struct pci_dev *pdev);
186
187static struct pci_error_handlers e1000_err_handler = {
188 .error_detected = e1000_io_error_detected,
189 .slot_reset = e1000_io_slot_reset,
190 .resume = e1000_io_resume,
191};
24025e4e 192
1da177e4
LT		 193static struct pci_driver e1000_driver = {
194 .name = e1000_driver_name,
195 .id_table = e1000_pci_tbl,
196 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove),
c4e24f01 198#ifdef CONFIG_PM
1da177e4 199 /* Power Managment Hooks */
1da177e4 200 .suspend = e1000_suspend,
c653e635 201 .resume = e1000_resume,
1da177e4 202#endif
9026729b
AK		 203 .shutdown = e1000_shutdown,
204 .err_handler = &e1000_err_handler
1da177e4
LT		 205};
206
207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
209MODULE_LICENSE("GPL");
210MODULE_VERSION(DRV_VERSION);
211
212static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
215
216/**
217 * e1000_init_module - Driver Registration Routine
218 *
219 * e1000_init_module is the first routine called when the driver is
220 * loaded. All it does is register with the PCI subsystem.
221 **/
222
64798845 223static int __init e1000_init_module(void)
1da177e4
LT		 224{
225 int ret;
226 printk(KERN_INFO "%s - version %s\n",
227 e1000_driver_string, e1000_driver_version);
228
229 printk(KERN_INFO "%s\n", e1000_copyright);
230
29917620 231 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 232 if (copybreak != COPYBREAK_DEFAULT) {
233 if (copybreak == 0)
234 printk(KERN_INFO "e1000: copybreak disabled\n");
235 else
236 printk(KERN_INFO "e1000: copybreak enabled for "
237 "packets <= %u bytes\n", copybreak);
238 }
1da177e4
LT		 239 return ret;
240}
241
242module_init(e1000_init_module);
243
244/**
245 * e1000_exit_module - Driver Exit Cleanup Routine
246 *
247 * e1000_exit_module is called just before the driver is removed
248 * from memory.
249 **/
250
64798845 251static void __exit e1000_exit_module(void)
1da177e4 252{
1da177e4
LT		 253 pci_unregister_driver(&e1000_driver);
254}
255
256module_exit(e1000_exit_module);
257
2db10a08
AK		 258static int e1000_request_irq(struct e1000_adapter *adapter)
259{
260 struct net_device *netdev = adapter->netdev;
3e18826c 261 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 262 int irq_flags = IRQF_SHARED;
263 int err;
2db10a08 264
e94bd23f
AK		 265 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
266 netdev);
267 if (err) {
2db10a08
AK		 268 DPRINTK(PROBE, ERR,
269 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 270 }
2db10a08
AK		 271
272 return err;
273}
274
275static void e1000_free_irq(struct e1000_adapter *adapter)
276{
277 struct net_device *netdev = adapter->netdev;
278
279 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 280}
281
1da177e4
LT		 282/**
283 * e1000_irq_disable - Mask off interrupt generation on the NIC
284 * @adapter: board private structure
285 **/
286
64798845 287static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 288{
1dc32918
JP		 289 struct e1000_hw *hw = &adapter->hw;
290
291 ew32(IMC, ~0);
292 E1000_WRITE_FLUSH();
1da177e4
LT		 293 synchronize_irq(adapter->pdev->irq);
294}
295
296/**
297 * e1000_irq_enable - Enable default interrupt generation settings
298 * @adapter: board private structure
299 **/
300
64798845 301static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 302{
1dc32918
JP		 303 struct e1000_hw *hw = &adapter->hw;
304
305 ew32(IMS, IMS_ENABLE_MASK);
306 E1000_WRITE_FLUSH();
1da177e4 307}
3ad2cc67 308
64798845 309static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 310{
1dc32918 311 struct e1000_hw *hw = &adapter->hw;
2d7edb92 312 struct net_device *netdev = adapter->netdev;
1dc32918 313 u16 vid = hw->mng_cookie.vlan_id;
406874a7 314 u16 old_vid = adapter->mng_vlan_id;
96838a40 315 if (adapter->vlgrp) {
5c15bdec 316 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 317 if (hw->mng_cookie.status &
2d7edb92
MC		 318 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
319 e1000_vlan_rx_add_vid(netdev, vid);
320 adapter->mng_vlan_id = vid;
321 } else
322 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 323
406874a7 324 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 325 (vid != old_vid) &&
5c15bdec 326 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 327 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 328 } else
329 adapter->mng_vlan_id = vid;
2d7edb92
MC		 330 }
331}
b55ccb35 332
64798845 333static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 334{
1dc32918
JP		 335 struct e1000_hw *hw = &adapter->hw;
336
0fccd0e9 337 if (adapter->en_mng_pt) {
1dc32918 338 u32 manc = er32(MANC);
0fccd0e9
JG		 339
340 /* disable hardware interception of ARP */
341 manc &= ~(E1000_MANC_ARP_EN);
342
1dc32918 343 ew32(MANC, manc);
0fccd0e9
JG		 344 }
345}
346
64798845 347static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 348{
1dc32918
JP		 349 struct e1000_hw *hw = &adapter->hw;
350
0fccd0e9 351 if (adapter->en_mng_pt) {
1dc32918 352 u32 manc = er32(MANC);
0fccd0e9
JG		 353
354 /* re-enable hardware interception of ARP */
355 manc |= E1000_MANC_ARP_EN;
356
1dc32918 357 ew32(MANC, manc);
0fccd0e9
JG		 358 }
359}
360
e0aac5a2
AK		 361/**
362 * e1000_configure - configure the hardware for RX and TX
363 * @adapter = private board structure
364 **/
365static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 366{
367 struct net_device *netdev = adapter->netdev;
2db10a08 368 int i;
1da177e4 369
db0ce50d 370 e1000_set_rx_mode(netdev);
1da177e4
LT		 371
372 e1000_restore_vlan(adapter);
0fccd0e9 373 e1000_init_manageability(adapter);
1da177e4
LT		 374
375 e1000_configure_tx(adapter);
376 e1000_setup_rctl(adapter);
377 e1000_configure_rx(adapter);
72d64a43
JK		 378 /* call E1000_DESC_UNUSED which always leaves
379 * at least 1 descriptor unused to make sure
380 * next_to_use != next_to_clean */
f56799ea 381 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 382 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 383 adapter->alloc_rx_buf(adapter, ring,
384 E1000_DESC_UNUSED(ring));
f56799ea 385 }
1da177e4 386
7bfa4816 387 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 388}
389
390int e1000_up(struct e1000_adapter *adapter)
391{
1dc32918
JP		 392 struct e1000_hw *hw = &adapter->hw;
393
e0aac5a2
AK		 394 /* hardware has been reset, we need to reload some things */
395 e1000_configure(adapter);
396
397 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 398
bea3348e 399 napi_enable(&adapter->napi);
c3570acb 400
5de55624
MC		 401 e1000_irq_enable(adapter);
402
4cb9be7a
JB		 403 netif_wake_queue(adapter->netdev);
404
79f3d399 405 /* fire a link change interrupt to start the watchdog */
1dc32918 406 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 407 return 0;
408}
409
79f05bf0
AK		 410/**
411 * e1000_power_up_phy - restore link in case the phy was powered down
412 * @adapter: address of board private structure
413 *
414 * The phy may be powered down to save power and turn off link when the
415 * driver is unloaded and wake on lan is not enabled (among others)
416 * *** this routine MUST be followed by a call to e1000_reset ***
417 *
418 **/
419
d658266e 420void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 421{
1dc32918 422 struct e1000_hw *hw = &adapter->hw;
406874a7 423 u16 mii_reg = 0;
79f05bf0
AK		 424
425 /* Just clear the power down bit to wake the phy back up */
1dc32918 426 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 427 /* according to the manual, the phy will retain its
428 * settings across a power-down/up cycle */
1dc32918 429 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 430 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 431 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 432 }
433}
434
435static void e1000_power_down_phy(struct e1000_adapter *adapter)
436{
1dc32918
JP		 437 struct e1000_hw *hw = &adapter->hw;
438
61c2505f 439 /* Power down the PHY so no link is implied when interface is down *
c3033b01 440 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 441 * (a) WoL is enabled
442 * (b) AMT is active
443 * (c) SoL/IDER session is active */
1dc32918
JP		 444 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
445 hw->media_type == e1000_media_type_copper) {
406874a7 446 u16 mii_reg = 0;
61c2505f 447
1dc32918 448 switch (hw->mac_type) {
61c2505f
BA		 449 case e1000_82540:
450 case e1000_82545:
451 case e1000_82545_rev_3:
452 case e1000_82546:
453 case e1000_82546_rev_3:
454 case e1000_82541:
455 case e1000_82541_rev_2:
456 case e1000_82547:
457 case e1000_82547_rev_2:
1dc32918 458 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 459 goto out;
460 break;
61c2505f
BA		 461 default:
462 goto out;
463 }
1dc32918 464 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 465 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 466 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 467 mdelay(1);
468 }
61c2505f
BA		 469out:
470 return;
79f05bf0
AK		 471}
472
64798845 473void e1000_down(struct e1000_adapter *adapter)
1da177e4 474{
a6c42322 475 struct e1000_hw *hw = &adapter->hw;
1da177e4 476 struct net_device *netdev = adapter->netdev;
a6c42322 477 u32 rctl, tctl;
1da177e4 478
1314bbf3
AK		 479 /* signal that we're down so the interrupt handler does not
480 * reschedule our watchdog timer */
481 set_bit(__E1000_DOWN, &adapter->flags);
482
a6c42322
JB		 483 /* disable receives in the hardware */
484 rctl = er32(RCTL);
485 ew32(RCTL, rctl & ~E1000_RCTL_EN);
486 /* flush and sleep below */
487
51851073 488 netif_tx_disable(netdev);
a6c42322
JB		 489
490 /* disable transmits in the hardware */
491 tctl = er32(TCTL);
492 tctl &= ~E1000_TCTL_EN;
493 ew32(TCTL, tctl);
494 /* flush both disables and wait for them to finish */
495 E1000_WRITE_FLUSH();
496 msleep(10);
497
bea3348e 498 napi_disable(&adapter->napi);
c3570acb 499
1da177e4 500 e1000_irq_disable(adapter);
c1605eb3 501
1da177e4
LT		 502 del_timer_sync(&adapter->tx_fifo_stall_timer);
503 del_timer_sync(&adapter->watchdog_timer);
504 del_timer_sync(&adapter->phy_info_timer);
505
7bfa4816 506 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 507 adapter->link_speed = 0;
508 adapter->link_duplex = 0;
509 netif_carrier_off(netdev);
1da177e4
LT		 510
511 e1000_reset(adapter);
581d708e
MC		 512 e1000_clean_all_tx_rings(adapter);
513 e1000_clean_all_rx_rings(adapter);
1da177e4 514}
1da177e4 515
64798845 516void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 517{
518 WARN_ON(in_interrupt());
519 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
520 msleep(1);
521 e1000_down(adapter);
522 e1000_up(adapter);
523 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 524}
525
64798845 526void e1000_reset(struct e1000_adapter *adapter)
1da177e4 527{
1dc32918 528 struct e1000_hw *hw = &adapter->hw;
406874a7 529 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 530 bool legacy_pba_adjust = false;
b7cb8c2c 531 u16 hwm;
1da177e4
LT		 532
533 /* Repartition Pba for greater than 9k mtu
534 * To take effect CTRL.RST is required.
535 */
536
1dc32918 537 switch (hw->mac_type) {
018ea44e
BA		 538 case e1000_82542_rev2_0:
539 case e1000_82542_rev2_1:
540 case e1000_82543:
541 case e1000_82544:
542 case e1000_82540:
543 case e1000_82541:
544 case e1000_82541_rev_2:
c3033b01 545 legacy_pba_adjust = true;
018ea44e
BA		 546 pba = E1000_PBA_48K;
547 break;
548 case e1000_82545:
549 case e1000_82545_rev_3:
550 case e1000_82546:
551 case e1000_82546_rev_3:
552 pba = E1000_PBA_48K;
553 break;
2d7edb92 554 case e1000_82547:
0e6ef3e0 555 case e1000_82547_rev_2:
c3033b01 556 legacy_pba_adjust = true;
2d7edb92
MC		 557 pba = E1000_PBA_30K;
558 break;
018ea44e
BA		 559 case e1000_undefined:
560 case e1000_num_macs:
2d7edb92
MC		 561 break;
562 }
563
c3033b01 564 if (legacy_pba_adjust) {
b7cb8c2c 565 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 566 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 567
1dc32918 568 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 569 adapter->tx_fifo_head = 0;
570 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
571 adapter->tx_fifo_size =
572 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
573 atomic_set(&adapter->tx_fifo_stall, 0);
574 }
b7cb8c2c 575 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 576 /* adjust PBA for jumbo frames */
1dc32918 577 ew32(PBA, pba);
018ea44e
BA		 578
579 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 580 * large enough to accommodate two full transmit packets,
018ea44e 581 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 582 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 583 * one full receive packet and is similarly rounded up and
584 * expressed in KB. */
1dc32918 585 pba = er32(PBA);
018ea44e
BA		 586 /* upper 16 bits has Tx packet buffer allocation size in KB */
587 tx_space = pba >> 16;
588 /* lower 16 bits has Rx packet buffer allocation size in KB */
589 pba &= 0xffff;
b7cb8c2c
JB		 590 /*
591 * the tx fifo also stores 16 bytes of information about the tx
592 * but don't include ethernet FCS because hardware appends it
593 */
594 min_tx_space = (hw->max_frame_size +
595 sizeof(struct e1000_tx_desc) -
596 ETH_FCS_LEN) * 2;
9099cfb9 597 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 598 min_tx_space >>= 10;
b7cb8c2c
JB		 599 /* software strips receive CRC, so leave room for it */
600 min_rx_space = hw->max_frame_size;
9099cfb9 601 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 602 min_rx_space >>= 10;
603
604 /* If current Tx allocation is less than the min Tx FIFO size,
605 * and the min Tx FIFO size is less than the current Rx FIFO
606 * allocation, take space away from current Rx allocation */
607 if (tx_space < min_tx_space &&
608 ((min_tx_space - tx_space) < pba)) {
609 pba = pba - (min_tx_space - tx_space);
610
611 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 612 switch (hw->mac_type) {
018ea44e
BA		 613 case e1000_82545 ... e1000_82546_rev_3:
614 pba &= ~(E1000_PBA_8K - 1);
615 break;
616 default:
617 break;
618 }
619
620 /* if short on rx space, rx wins and must trump tx
621 * adjustment or use Early Receive if available */
1532ecea
JB		 622 if (pba < min_rx_space)
623 pba = min_rx_space;
018ea44e 624 }
1da177e4 625 }
2d7edb92 626
1dc32918 627 ew32(PBA, pba);
1da177e4 628
b7cb8c2c
JB		 629 /*
630 * flow control settings:
631 * The high water mark must be low enough to fit one full frame
632 * (or the size used for early receive) above it in the Rx FIFO.
633 * Set it to the lower of:
634 * - 90% of the Rx FIFO size, and
635 * - the full Rx FIFO size minus the early receive size (for parts
636 * with ERT support assuming ERT set to E1000_ERT_2048), or
637 * - the full Rx FIFO size minus one full frame
638 */
639 hwm = min(((pba << 10) * 9 / 10),
640 ((pba << 10) - hw->max_frame_size));
641
642 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
643 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 644 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 645 hw->fc_send_xon = 1;
646 hw->fc = hw->original_fc;
1da177e4 647
2d7edb92 648 /* Allow time for pending master requests to run */
1dc32918
JP		 649 e1000_reset_hw(hw);
650 if (hw->mac_type >= e1000_82544)
651 ew32(WUC, 0);
09ae3e88 652
1dc32918 653 if (e1000_init_hw(hw))
1da177e4 654 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 655 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 656
657 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 658 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 659 hw->autoneg == 1 &&
660 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
661 u32 ctrl = er32(CTRL);
3d5460a0
JB		 662 /* clear phy power management bit if we are in gig only mode,
663 * which if enabled will attempt negotiation to 100Mb, which
664 * can cause a loss of link at power off or driver unload */
665 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 666 ew32(CTRL, ctrl);
3d5460a0
JB		 667 }
668
1da177e4 669 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 670 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 671
1dc32918
JP		 672 e1000_reset_adaptive(hw);
673 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 674
0fccd0e9 675 e1000_release_manageability(adapter);
1da177e4
LT		 676}
677
67b3c27c
AK		 678/**
679 * Dump the eeprom for users having checksum issues
680 **/
b4ea895d 681static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 682{
683 struct net_device *netdev = adapter->netdev;
684 struct ethtool_eeprom eeprom;
685 const struct ethtool_ops *ops = netdev->ethtool_ops;
686 u8 *data;
687 int i;
688 u16 csum_old, csum_new = 0;
689
690 eeprom.len = ops->get_eeprom_len(netdev);
691 eeprom.offset = 0;
692
693 data = kmalloc(eeprom.len, GFP_KERNEL);
694 if (!data) {
695 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
696 " data\n");
697 return;
698 }
699
700 ops->get_eeprom(netdev, &eeprom, data);
701
702 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
703 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
704 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
705 csum_new += data[i] + (data[i + 1] << 8);
706 csum_new = EEPROM_SUM - csum_new;
707
708 printk(KERN_ERR "/*********************/\n");
709 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
710 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
711
712 printk(KERN_ERR "Offset Values\n");
713 printk(KERN_ERR "======== ======\n");
714 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
715
716 printk(KERN_ERR "Include this output when contacting your support "
717 "provider.\n");
718 printk(KERN_ERR "This is not a software error! Something bad "
719 "happened to your hardware or\n");
720 printk(KERN_ERR "EEPROM image. Ignoring this "
721 "problem could result in further problems,\n");
722 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
723 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
724 "which is invalid\n");
725 printk(KERN_ERR "and requires you to set the proper MAC "
726 "address manually before continuing\n");
727 printk(KERN_ERR "to enable this network device.\n");
728 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
729 "to your hardware vendor\n");
63cd31f6 730 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 731 printk(KERN_ERR "/*********************/\n");
732
733 kfree(data);
734}
735
81250297
TI		 736/**
737 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
738 * @pdev: PCI device information struct
739 *
740 * Return true if an adapter needs ioport resources
741 **/
742static int e1000_is_need_ioport(struct pci_dev *pdev)
743{
744 switch (pdev->device) {
745 case E1000_DEV_ID_82540EM:
746 case E1000_DEV_ID_82540EM_LOM:
747 case E1000_DEV_ID_82540EP:
748 case E1000_DEV_ID_82540EP_LOM:
749 case E1000_DEV_ID_82540EP_LP:
750 case E1000_DEV_ID_82541EI:
751 case E1000_DEV_ID_82541EI_MOBILE:
752 case E1000_DEV_ID_82541ER:
753 case E1000_DEV_ID_82541ER_LOM:
754 case E1000_DEV_ID_82541GI:
755 case E1000_DEV_ID_82541GI_LF:
756 case E1000_DEV_ID_82541GI_MOBILE:
757 case E1000_DEV_ID_82544EI_COPPER:
758 case E1000_DEV_ID_82544EI_FIBER:
759 case E1000_DEV_ID_82544GC_COPPER:
760 case E1000_DEV_ID_82544GC_LOM:
761 case E1000_DEV_ID_82545EM_COPPER:
762 case E1000_DEV_ID_82545EM_FIBER:
763 case E1000_DEV_ID_82546EB_COPPER:
764 case E1000_DEV_ID_82546EB_FIBER:
765 case E1000_DEV_ID_82546EB_QUAD_COPPER:
766 return true;
767 default:
768 return false;
769 }
770}
771
0e7614bc
SH		 772static const struct net_device_ops e1000_netdev_ops = {
773 .ndo_open = e1000_open,
774 .ndo_stop = e1000_close,
00829823 775 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 776 .ndo_get_stats = e1000_get_stats,
777 .ndo_set_rx_mode = e1000_set_rx_mode,
778 .ndo_set_mac_address = e1000_set_mac,
779 .ndo_tx_timeout = e1000_tx_timeout,
780 .ndo_change_mtu = e1000_change_mtu,
781 .ndo_do_ioctl = e1000_ioctl,
782 .ndo_validate_addr = eth_validate_addr,
783
784 .ndo_vlan_rx_register = e1000_vlan_rx_register,
785 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
786 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
787#ifdef CONFIG_NET_POLL_CONTROLLER
788 .ndo_poll_controller = e1000_netpoll,
789#endif
790};
791
1da177e4
LT		 792/**
793 * e1000_probe - Device Initialization Routine
794 * @pdev: PCI device information struct
795 * @ent: entry in e1000_pci_tbl
796 *
797 * Returns 0 on success, negative on failure
798 *
799 * e1000_probe initializes an adapter identified by a pci_dev structure.
800 * The OS initialization, configuring of the adapter private structure,
801 * and a hardware reset occur.
802 **/
1dc32918
JP		 803static int __devinit e1000_probe(struct pci_dev *pdev,
804 const struct pci_device_id *ent)
1da177e4
LT		 805{
806 struct net_device *netdev;
807 struct e1000_adapter *adapter;
1dc32918 808 struct e1000_hw *hw;
2d7edb92 809
1da177e4 810 static int cards_found = 0;
120cd576 811 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 812 int i, err, pci_using_dac;
406874a7
JP		 813 u16 eeprom_data = 0;
814 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 815 int bars, need_ioport;
0795af57 816
81250297
TI		 817 /* do not allocate ioport bars when not needed */
818 need_ioport = e1000_is_need_ioport(pdev);
819 if (need_ioport) {
820 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
821 err = pci_enable_device(pdev);
822 } else {
823 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 824 err = pci_enable_device_mem(pdev);
81250297 825 }
c7be73bc 826 if (err)
1da177e4
LT		 827 return err;
828
6a35528a
YH		 829 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
830 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 831 pci_using_dac = 1;
832 } else {
284901a9 833 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 834 if (err) {
284901a9 835 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 836 if (err) {
837 E1000_ERR("No usable DMA configuration, "
838 "aborting\n");
839 goto err_dma;
840 }
1da177e4
LT		 841 }
842 pci_using_dac = 0;
843 }
844
81250297 845 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 846 if (err)
6dd62ab0 847 goto err_pci_reg;
1da177e4
LT		 848
849 pci_set_master(pdev);
dbb5aaeb
NN		 850 err = pci_save_state(pdev);
851 if (err)
852 goto err_alloc_etherdev;
1da177e4 853
6dd62ab0 854 err = -ENOMEM;
1da177e4 855 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 856 if (!netdev)
1da177e4 857 goto err_alloc_etherdev;
1da177e4 858
1da177e4
LT		 859 SET_NETDEV_DEV(netdev, &pdev->dev);
860
861 pci_set_drvdata(pdev, netdev);
60490fe0 862 adapter = netdev_priv(netdev);
1da177e4
LT		 863 adapter->netdev = netdev;
864 adapter->pdev = pdev;
1da177e4 865 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 866 adapter->bars = bars;
867 adapter->need_ioport = need_ioport;
1da177e4 868
1dc32918
JP		 869 hw = &adapter->hw;
870 hw->back = adapter;
871
6dd62ab0 872 err = -EIO;
275f165f 873 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 874 if (!hw->hw_addr)
1da177e4 875 goto err_ioremap;
1da177e4 876
81250297
TI		 877 if (adapter->need_ioport) {
878 for (i = BAR_1; i <= BAR_5; i++) {
879 if (pci_resource_len(pdev, i) == 0)
880 continue;
881 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
882 hw->io_base = pci_resource_start(pdev, i);
883 break;
884 }
1da177e4
LT		 885 }
886 }
887
0e7614bc 888 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 889 e1000_set_ethtool_ops(netdev);
1da177e4 890 netdev->watchdog_timeo = 5 * HZ;
bea3348e 891 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 892
0eb5a34c 893 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 894
1da177e4
LT		 895 adapter->bd_number = cards_found;
896
897 /* setup the private structure */
898
c7be73bc
JP		 899 err = e1000_sw_init(adapter);
900 if (err)
1da177e4
LT		 901 goto err_sw_init;
902
6dd62ab0 903 err = -EIO;
2d7edb92 904
1dc32918 905 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 906 netdev->features = NETIF_F_SG |
907 NETIF_F_HW_CSUM |
908 NETIF_F_HW_VLAN_TX |
909 NETIF_F_HW_VLAN_RX |
910 NETIF_F_HW_VLAN_FILTER;
911 }
912
1dc32918
JP		 913 if ((hw->mac_type >= e1000_82544) &&
914 (hw->mac_type != e1000_82547))
1da177e4 915 netdev->features |= NETIF_F_TSO;
2d7edb92 916
96838a40 917 if (pci_using_dac)
1da177e4
LT		 918 netdev->features |= NETIF_F_HIGHDMA;
919
20501a69 920 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 921 netdev->vlan_features |= NETIF_F_HW_CSUM;
922 netdev->vlan_features |= NETIF_F_SG;
923
1dc32918 924 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 925
cd94dd0b 926 /* initialize eeprom parameters */
1dc32918 927 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 928 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 929 goto err_eeprom;
cd94dd0b
AK		 930 }
931
96838a40 932 /* before reading the EEPROM, reset the controller to
1da177e4 933 * put the device in a known good starting state */
96838a40 934
1dc32918 935 e1000_reset_hw(hw);
1da177e4
LT		 936
937 /* make sure the EEPROM is good */
1dc32918 938 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 939 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 940 e1000_dump_eeprom(adapter);
941 /*
942 * set MAC address to all zeroes to invalidate and temporary
943 * disable this device for the user. This blocks regular
944 * traffic while still permitting ethtool ioctls from reaching
945 * the hardware as well as allowing the user to run the
946 * interface after manually setting a hw addr using
947 * `ip set address`
948 */
1dc32918 949 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 950 } else {
951 /* copy the MAC address out of the EEPROM */
1dc32918 952 if (e1000_read_mac_addr(hw))
67b3c27c 953 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 954 }
67b3c27c 955 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 956 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
957 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 958
67b3c27c 959 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 960 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 961
1dc32918 962 e1000_get_bus_info(hw);
1da177e4
LT		 963
964 init_timer(&adapter->tx_fifo_stall_timer);
965 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 966 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 967
968 init_timer(&adapter->watchdog_timer);
969 adapter->watchdog_timer.function = &e1000_watchdog;
970 adapter->watchdog_timer.data = (unsigned long) adapter;
971
1da177e4
LT		 972 init_timer(&adapter->phy_info_timer);
973 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 974 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 975
65f27f38 976 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 977
1da177e4
LT		 978 e1000_check_options(adapter);
979
980 /* Initial Wake on LAN setting
981 * If APM wake is enabled in the EEPROM,
982 * enable the ACPI Magic Packet filter
983 */
984
1dc32918 985 switch (hw->mac_type) {
1da177e4
LT		 986 case e1000_82542_rev2_0:
987 case e1000_82542_rev2_1:
988 case e1000_82543:
989 break;
990 case e1000_82544:
1dc32918 991 e1000_read_eeprom(hw,
1da177e4
LT		 992 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
993 eeprom_apme_mask = E1000_EEPROM_82544_APM;
994 break;
995 case e1000_82546:
996 case e1000_82546_rev_3:
1dc32918
JP		 997 if (er32(STATUS) & E1000_STATUS_FUNC_1){
998 e1000_read_eeprom(hw,
1da177e4
LT		 999 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1000 break;
1001 }
1002 /* Fall Through */
1003 default:
1dc32918 1004 e1000_read_eeprom(hw,
1da177e4
LT		 1005 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1006 break;
1007 }
96838a40 1008 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1009 adapter->eeprom_wol |= E1000_WUFC_MAG;
1010
1011 /* now that we have the eeprom settings, apply the special cases
1012 * where the eeprom may be wrong or the board simply won't support
1013 * wake on lan on a particular port */
1014 switch (pdev->device) {
1015 case E1000_DEV_ID_82546GB_PCIE:
1016 adapter->eeprom_wol = 0;
1017 break;
1018 case E1000_DEV_ID_82546EB_FIBER:
1019 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1020 /* Wake events only supported on port A for dual fiber
1021 * regardless of eeprom setting */
1dc32918 1022 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1023 adapter->eeprom_wol = 0;
1024 break;
1025 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1026 /* if quad port adapter, disable WoL on all but port A */
1027 if (global_quad_port_a != 0)
1028 adapter->eeprom_wol = 0;
1029 else
1030 adapter->quad_port_a = 1;
1031 /* Reset for multiple quad port adapters */
1032 if (++global_quad_port_a == 4)
1033 global_quad_port_a = 0;
1034 break;
1035 }
1036
1037 /* initialize the wol settings based on the eeprom settings */
1038 adapter->wol = adapter->eeprom_wol;
de126489 1039 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1040
fb3d47d4 1041 /* print bus type/speed/width info */
fb3d47d4 1042 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1532ecea
JB		 1043 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1044 ((hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
fb3d47d4
JK		 1045 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1046 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1047 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1532ecea 1048 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : "32-bit"));
fb3d47d4 1049
e174961c 1050 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1051
1da177e4
LT		 1052 /* reset the hardware with the new settings */
1053 e1000_reset(adapter);
1054
416b5d10 1055 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1056 err = register_netdev(netdev);
1057 if (err)
416b5d10 1058 goto err_register;
1314bbf3 1059
eb62efd2
JB		 1060 /* carrier off reporting is important to ethtool even BEFORE open */
1061 netif_carrier_off(netdev);
1062
1da177e4
LT		 1063 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1064
1065 cards_found++;
1066 return 0;
1067
1068err_register:
6dd62ab0 1069err_eeprom:
1532ecea 1070 e1000_phy_hw_reset(hw);
6dd62ab0 1071
1dc32918
JP		 1072 if (hw->flash_address)
1073 iounmap(hw->flash_address);
6dd62ab0
VA		 1074 kfree(adapter->tx_ring);
1075 kfree(adapter->rx_ring);
1da177e4 1076err_sw_init:
1dc32918 1077 iounmap(hw->hw_addr);
1da177e4
LT		 1078err_ioremap:
1079 free_netdev(netdev);
1080err_alloc_etherdev:
81250297 1081 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1082err_pci_reg:
1083err_dma:
1084 pci_disable_device(pdev);
1da177e4
LT		 1085 return err;
1086}
1087
1088/**
1089 * e1000_remove - Device Removal Routine
1090 * @pdev: PCI device information struct
1091 *
1092 * e1000_remove is called by the PCI subsystem to alert the driver
1093 * that it should release a PCI device. The could be caused by a
1094 * Hot-Plug event, or because the driver is going to be removed from
1095 * memory.
1096 **/
1097
64798845 1098static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1099{
1100 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1101 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1102 struct e1000_hw *hw = &adapter->hw;
1da177e4 1103
baa34745
JB		 1104 set_bit(__E1000_DOWN, &adapter->flags);
1105 del_timer_sync(&adapter->tx_fifo_stall_timer);
1106 del_timer_sync(&adapter->watchdog_timer);
1107 del_timer_sync(&adapter->phy_info_timer);
1108
28e53bdd 1109 cancel_work_sync(&adapter->reset_task);
be2b28ed 1110
0fccd0e9 1111 e1000_release_manageability(adapter);
1da177e4 1112
bea3348e
SH		 1113 unregister_netdev(netdev);
1114
1532ecea 1115 e1000_phy_hw_reset(hw);
1da177e4 1116
24025e4e
MC		 1117 kfree(adapter->tx_ring);
1118 kfree(adapter->rx_ring);
24025e4e 1119
1dc32918
JP		 1120 iounmap(hw->hw_addr);
1121 if (hw->flash_address)
1122 iounmap(hw->flash_address);
81250297 1123 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1124
1125 free_netdev(netdev);
1126
1127 pci_disable_device(pdev);
1128}
1129
1130/**
1131 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1132 * @adapter: board private structure to initialize
1133 *
1134 * e1000_sw_init initializes the Adapter private data structure.
1135 * Fields are initialized based on PCI device information and
1136 * OS network device settings (MTU size).
1137 **/
1138
64798845 1139static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1140{
1141 struct e1000_hw *hw = &adapter->hw;
1142 struct net_device *netdev = adapter->netdev;
1143 struct pci_dev *pdev = adapter->pdev;
1144
1145 /* PCI config space info */
1146
1147 hw->vendor_id = pdev->vendor;
1148 hw->device_id = pdev->device;
1149 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1150 hw->subsystem_id = pdev->subsystem_device;
44c10138 1151 hw->revision_id = pdev->revision;
1da177e4
LT		 1152
1153 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1154
eb0f8054 1155 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1156 hw->max_frame_size = netdev->mtu +
1157 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1158 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1159
1160 /* identify the MAC */
1161
96838a40 1162 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1163 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1164 return -EIO;
1165 }
1166
96838a40 1167 switch (hw->mac_type) {
1da177e4
LT		 1168 default:
1169 break;
1170 case e1000_82541:
1171 case e1000_82547:
1172 case e1000_82541_rev_2:
1173 case e1000_82547_rev_2:
1174 hw->phy_init_script = 1;
1175 break;
1176 }
1177
1178 e1000_set_media_type(hw);
1179
c3033b01
JP		 1180 hw->wait_autoneg_complete = false;
1181 hw->tbi_compatibility_en = true;
1182 hw->adaptive_ifs = true;
1da177e4
LT		 1183
1184 /* Copper options */
1185
96838a40 1186 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1187 hw->mdix = AUTO_ALL_MODES;
c3033b01 1188 hw->disable_polarity_correction = false;
1da177e4
LT		 1189 hw->master_slave = E1000_MASTER_SLAVE;
1190 }
1191
f56799ea
JK		 1192 adapter->num_tx_queues = 1;
1193 adapter->num_rx_queues = 1;
581d708e
MC		 1194
1195 if (e1000_alloc_queues(adapter)) {
1196 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1197 return -ENOMEM;
1198 }
1199
47313054 1200 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1201 e1000_irq_disable(adapter);
1202
1da177e4 1203 spin_lock_init(&adapter->stats_lock);
1da177e4 1204
1314bbf3
AK		 1205 set_bit(__E1000_DOWN, &adapter->flags);
1206
1da177e4
LT		 1207 return 0;
1208}
1209
581d708e
MC		 1210/**
1211 * e1000_alloc_queues - Allocate memory for all rings
1212 * @adapter: board private structure to initialize
1213 *
1214 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1215 * number of queues at compile-time.
581d708e
MC		 1216 **/
1217
64798845 1218static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1219{
1c7e5b12
YB		 1220 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1221 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1222 if (!adapter->tx_ring)
1223 return -ENOMEM;
581d708e 1224
1c7e5b12
YB		 1225 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1226 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1227 if (!adapter->rx_ring) {
1228 kfree(adapter->tx_ring);
1229 return -ENOMEM;
1230 }
581d708e 1231
581d708e
MC		 1232 return E1000_SUCCESS;
1233}
1234
1da177e4
LT		 1235/**
1236 * e1000_open - Called when a network interface is made active
1237 * @netdev: network interface device structure
1238 *
1239 * Returns 0 on success, negative value on failure
1240 *
1241 * The open entry point is called when a network interface is made
1242 * active by the system (IFF_UP). At this point all resources needed
1243 * for transmit and receive operations are allocated, the interrupt
1244 * handler is registered with the OS, the watchdog timer is started,
1245 * and the stack is notified that the interface is ready.
1246 **/
1247
64798845 1248static int e1000_open(struct net_device *netdev)
1da177e4 1249{
60490fe0 1250 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1251 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1252 int err;
1253
2db10a08 1254 /* disallow open during test */
1314bbf3 1255 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1256 return -EBUSY;
1257
eb62efd2
JB		 1258 netif_carrier_off(netdev);
1259
1da177e4 1260 /* allocate transmit descriptors */
e0aac5a2
AK		 1261 err = e1000_setup_all_tx_resources(adapter);
1262 if (err)
1da177e4
LT		 1263 goto err_setup_tx;
1264
1265 /* allocate receive descriptors */
e0aac5a2 1266 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1267 if (err)
e0aac5a2 1268 goto err_setup_rx;
b5bf28cd 1269
79f05bf0
AK		 1270 e1000_power_up_phy(adapter);
1271
2d7edb92 1272 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1273 if ((hw->mng_cookie.status &
2d7edb92
MC		 1274 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1275 e1000_update_mng_vlan(adapter);
1276 }
1da177e4 1277
e0aac5a2
AK		 1278 /* before we allocate an interrupt, we must be ready to handle it.
1279 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1280 * as soon as we call pci_request_irq, so we have to setup our
1281 * clean_rx handler before we do so. */
1282 e1000_configure(adapter);
1283
1284 err = e1000_request_irq(adapter);
1285 if (err)
1286 goto err_req_irq;
1287
1288 /* From here on the code is the same as e1000_up() */
1289 clear_bit(__E1000_DOWN, &adapter->flags);
1290
bea3348e 1291 napi_enable(&adapter->napi);
47313054 1292
e0aac5a2
AK		 1293 e1000_irq_enable(adapter);
1294
076152d5
BH		 1295 netif_start_queue(netdev);
1296
e0aac5a2 1297 /* fire a link status change interrupt to start the watchdog */
1dc32918 1298 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1299
1da177e4
LT		 1300 return E1000_SUCCESS;
1301
b5bf28cd 1302err_req_irq:
e0aac5a2 1303 e1000_power_down_phy(adapter);
581d708e 1304 e1000_free_all_rx_resources(adapter);
1da177e4 1305err_setup_rx:
581d708e 1306 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1307err_setup_tx:
1308 e1000_reset(adapter);
1309
1310 return err;
1311}
1312
1313/**
1314 * e1000_close - Disables a network interface
1315 * @netdev: network interface device structure
1316 *
1317 * Returns 0, this is not allowed to fail
1318 *
1319 * The close entry point is called when an interface is de-activated
1320 * by the OS. The hardware is still under the drivers control, but
1321 * needs to be disabled. A global MAC reset is issued to stop the
1322 * hardware, and all transmit and receive resources are freed.
1323 **/
1324
64798845 1325static int e1000_close(struct net_device *netdev)
1da177e4 1326{
60490fe0 1327 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1328 struct e1000_hw *hw = &adapter->hw;
1da177e4 1329
2db10a08 1330 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1331 e1000_down(adapter);
79f05bf0 1332 e1000_power_down_phy(adapter);
2db10a08 1333 e1000_free_irq(adapter);
1da177e4 1334
581d708e
MC		 1335 e1000_free_all_tx_resources(adapter);
1336 e1000_free_all_rx_resources(adapter);
1da177e4 1337
4666560a
BA		 1338 /* kill manageability vlan ID if supported, but not if a vlan with
1339 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1340 if ((hw->mng_cookie.status &
4666560a
BA		 1341 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1342 !(adapter->vlgrp &&
5c15bdec 1343 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1344 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1345 }
b55ccb35 1346
1da177e4
LT		 1347 return 0;
1348}
1349
1350/**
1351 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1352 * @adapter: address of board private structure
2d7edb92
MC		 1353 * @start: address of beginning of memory
1354 * @len: length of memory
1da177e4 1355 **/
64798845
JP		 1356static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1357 unsigned long len)
1da177e4 1358{
1dc32918 1359 struct e1000_hw *hw = &adapter->hw;
e982f17c 1360 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1361 unsigned long end = begin + len;
1362
2648345f
MC		 1363 /* First rev 82545 and 82546 need to not allow any memory
1364 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1365 if (hw->mac_type == e1000_82545 ||
1366 hw->mac_type == e1000_82546) {
c3033b01 1367 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1368 }
1369
c3033b01 1370 return true;
1da177e4
LT		 1371}
1372
1373/**
1374 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1375 * @adapter: board private structure
581d708e 1376 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1377 *
1378 * Return 0 on success, negative on failure
1379 **/
1380
64798845
JP		 1381static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1382 struct e1000_tx_ring *txdr)
1da177e4 1383{
1da177e4
LT		 1384 struct pci_dev *pdev = adapter->pdev;
1385 int size;
1386
1387 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1388 txdr->buffer_info = vmalloc(size);
96838a40 1389 if (!txdr->buffer_info) {
2648345f
MC		 1390 DPRINTK(PROBE, ERR,
1391 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1392 return -ENOMEM;
1393 }
1394 memset(txdr->buffer_info, 0, size);
1395
1396 /* round up to nearest 4K */
1397
1398 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1399 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1400
1401 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1402 if (!txdr->desc) {
1da177e4 1403setup_tx_desc_die:
1da177e4 1404 vfree(txdr->buffer_info);
2648345f
MC		 1405 DPRINTK(PROBE, ERR,
1406 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1407 return -ENOMEM;
1408 }
1409
2648345f 1410 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1411 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1412 void *olddesc = txdr->desc;
1413 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1414 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1415 "at %p\n", txdr->size, txdr->desc);
1416 /* Try again, without freeing the previous */
1da177e4 1417 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1418 /* Failed allocation, critical failure */
96838a40 1419 if (!txdr->desc) {
1da177e4
LT		 1420 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1421 goto setup_tx_desc_die;
1422 }
1423
1424 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1425 /* give up */
2648345f
MC		 1426 pci_free_consistent(pdev, txdr->size, txdr->desc,
1427 txdr->dma);
1da177e4
LT		 1428 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1429 DPRINTK(PROBE, ERR,
2648345f
MC		 1430 "Unable to allocate aligned memory "
1431 "for the transmit descriptor ring\n");
1da177e4
LT		 1432 vfree(txdr->buffer_info);
1433 return -ENOMEM;
1434 } else {
2648345f 1435 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1436 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1437 }
1438 }
1439 memset(txdr->desc, 0, txdr->size);
1440
1441 txdr->next_to_use = 0;
1442 txdr->next_to_clean = 0;
1443
1444 return 0;
1445}
1446
581d708e
MC		 1447/**
1448 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1449 * (Descriptors) for all queues
1450 * @adapter: board private structure
1451 *
581d708e
MC		 1452 * Return 0 on success, negative on failure
1453 **/
1454
64798845 1455int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1456{
1457 int i, err = 0;
1458
f56799ea 1459 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1460 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1461 if (err) {
1462 DPRINTK(PROBE, ERR,
1463 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1464 for (i-- ; i >= 0; i--)
1465 e1000_free_tx_resources(adapter,
1466 &adapter->tx_ring[i]);
581d708e
MC		 1467 break;
1468 }
1469 }
1470
1471 return err;
1472}
1473
1da177e4
LT		 1474/**
1475 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1476 * @adapter: board private structure
1477 *
1478 * Configure the Tx unit of the MAC after a reset.
1479 **/
1480
64798845 1481static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1482{
406874a7 1483 u64 tdba;
581d708e 1484 struct e1000_hw *hw = &adapter->hw;
1532ecea 1485 u32 tdlen, tctl, tipg;
406874a7 1486 u32 ipgr1, ipgr2;
1da177e4
LT		 1487
1488 /* Setup the HW Tx Head and Tail descriptor pointers */
1489
f56799ea 1490 switch (adapter->num_tx_queues) {
24025e4e
MC		 1491 case 1:
1492 default:
581d708e
MC		 1493 tdba = adapter->tx_ring[0].dma;
1494 tdlen = adapter->tx_ring[0].count *
1495 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1496 ew32(TDLEN, tdlen);
1497 ew32(TDBAH, (tdba >> 32));
1498 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1499 ew32(TDT, 0);
1500 ew32(TDH, 0);
6a951698
AK		 1501 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1502 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1503 break;
1504 }
1da177e4
LT		 1505
1506 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1507 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1508 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1509 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1510 else
1511 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1512
581d708e 1513 switch (hw->mac_type) {
1da177e4
LT		 1514 case e1000_82542_rev2_0:
1515 case e1000_82542_rev2_1:
1516 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1517 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1518 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1519 break;
1520 default:
0fadb059
JK		 1521 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1522 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1523 break;
1da177e4 1524 }
0fadb059
JK		 1525 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1526 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1527 ew32(TIPG, tipg);
1da177e4
LT		 1528
1529 /* Set the Tx Interrupt Delay register */
1530
1dc32918 1531 ew32(TIDV, adapter->tx_int_delay);
581d708e 1532 if (hw->mac_type >= e1000_82540)
1dc32918 1533 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1534
1535 /* Program the Transmit Control Register */
1536
1dc32918 1537 tctl = er32(TCTL);
1da177e4 1538 tctl &= ~E1000_TCTL_CT;
7e6c9861 1539 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1540 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1541
581d708e 1542 e1000_config_collision_dist(hw);
1da177e4
LT		 1543
1544 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1545 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1546
1547 /* only set IDE if we are delaying interrupts using the timers */
1548 if (adapter->tx_int_delay)
1549 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1550
581d708e 1551 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1552 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1553 else
1554 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1555
1556 /* Cache if we're 82544 running in PCI-X because we'll
1557 * need this to apply a workaround later in the send path. */
581d708e
MC		 1558 if (hw->mac_type == e1000_82544 &&
1559 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1560 adapter->pcix_82544 = 1;
7e6c9861 1561
1dc32918 1562 ew32(TCTL, tctl);
7e6c9861 1563
1da177e4
LT		 1564}
1565
1566/**
1567 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1568 * @adapter: board private structure
581d708e 1569 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1570 *
1571 * Returns 0 on success, negative on failure
1572 **/
1573
64798845
JP		 1574static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1575 struct e1000_rx_ring *rxdr)
1da177e4 1576{
1da177e4 1577 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1578 int size, desc_len;
1da177e4
LT		 1579
1580 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1581 rxdr->buffer_info = vmalloc(size);
581d708e 1582 if (!rxdr->buffer_info) {
2648345f
MC		 1583 DPRINTK(PROBE, ERR,
1584 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1585 return -ENOMEM;
1586 }
1587 memset(rxdr->buffer_info, 0, size);
1588
1532ecea 1589 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1590
1da177e4
LT		 1591 /* Round up to nearest 4K */
1592
2d7edb92 1593 rxdr->size = rxdr->count * desc_len;
9099cfb9 1594 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1595
1596 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1597
581d708e
MC		 1598 if (!rxdr->desc) {
1599 DPRINTK(PROBE, ERR,
1600 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1601setup_rx_desc_die:
1da177e4
LT		 1602 vfree(rxdr->buffer_info);
1603 return -ENOMEM;
1604 }
1605
2648345f 1606 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1607 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1608 void *olddesc = rxdr->desc;
1609 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1610 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1611 "at %p\n", rxdr->size, rxdr->desc);
1612 /* Try again, without freeing the previous */
1da177e4 1613 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1614 /* Failed allocation, critical failure */
581d708e 1615 if (!rxdr->desc) {
1da177e4 1616 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1617 DPRINTK(PROBE, ERR,
1618 "Unable to allocate memory "
1619 "for the receive descriptor ring\n");
1da177e4
LT		 1620 goto setup_rx_desc_die;
1621 }
1622
1623 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1624 /* give up */
2648345f
MC		 1625 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1626 rxdr->dma);
1da177e4 1627 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1628 DPRINTK(PROBE, ERR,
1629 "Unable to allocate aligned memory "
1630 "for the receive descriptor ring\n");
581d708e 1631 goto setup_rx_desc_die;
1da177e4 1632 } else {
2648345f 1633 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1634 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1635 }
1636 }
1637 memset(rxdr->desc, 0, rxdr->size);
1638
1639 rxdr->next_to_clean = 0;
1640 rxdr->next_to_use = 0;
edbbb3ca 1641 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1642
1643 return 0;
1644}
1645
581d708e
MC		 1646/**
1647 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1648 * (Descriptors) for all queues
1649 * @adapter: board private structure
1650 *
581d708e
MC		 1651 * Return 0 on success, negative on failure
1652 **/
1653
64798845 1654int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1655{
1656 int i, err = 0;
1657
f56799ea 1658 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1659 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1660 if (err) {
1661 DPRINTK(PROBE, ERR,
1662 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1663 for (i-- ; i >= 0; i--)
1664 e1000_free_rx_resources(adapter,
1665 &adapter->rx_ring[i]);
581d708e
MC		 1666 break;
1667 }
1668 }
1669
1670 return err;
1671}
1672
1da177e4 1673/**
2648345f 1674 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1675 * @adapter: Board private structure
1676 **/
64798845 1677static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1678{
1dc32918 1679 struct e1000_hw *hw = &adapter->hw;
630b25cd 1680 u32 rctl;
1da177e4 1681
1dc32918 1682 rctl = er32(RCTL);
1da177e4
LT		 1683
1684 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1685
1686 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1687 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1688 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1689
1dc32918 1690 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1691 rctl |= E1000_RCTL_SBP;
1692 else
1693 rctl &= ~E1000_RCTL_SBP;
1694
2d7edb92
MC		 1695 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1696 rctl &= ~E1000_RCTL_LPE;
1697 else
1698 rctl |= E1000_RCTL_LPE;
1699
1da177e4 1700 /* Setup buffer sizes */
9e2feace
AK		 1701 rctl &= ~E1000_RCTL_SZ_4096;
1702 rctl |= E1000_RCTL_BSEX;
1703 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1704 case E1000_RXBUFFER_2048:
1705 default:
1706 rctl |= E1000_RCTL_SZ_2048;
1707 rctl &= ~E1000_RCTL_BSEX;
1708 break;
1709 case E1000_RXBUFFER_4096:
1710 rctl |= E1000_RCTL_SZ_4096;
1711 break;
1712 case E1000_RXBUFFER_8192:
1713 rctl |= E1000_RCTL_SZ_8192;
1714 break;
1715 case E1000_RXBUFFER_16384:
1716 rctl |= E1000_RCTL_SZ_16384;
1717 break;
2d7edb92
MC		 1718 }
1719
1dc32918 1720 ew32(RCTL, rctl);
1da177e4
LT		 1721}
1722
1723/**
1724 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1725 * @adapter: board private structure
1726 *
1727 * Configure the Rx unit of the MAC after a reset.
1728 **/
1729
64798845 1730static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1731{
406874a7 1732 u64 rdba;
581d708e 1733 struct e1000_hw *hw = &adapter->hw;
1532ecea 1734 u32 rdlen, rctl, rxcsum;
2d7edb92 1735
edbbb3ca
JB		 1736 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1737 rdlen = adapter->rx_ring[0].count *
1738 sizeof(struct e1000_rx_desc);
1739 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1740 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1741 } else {
1742 rdlen = adapter->rx_ring[0].count *
1743 sizeof(struct e1000_rx_desc);
1744 adapter->clean_rx = e1000_clean_rx_irq;
1745 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1746 }
1da177e4
LT		 1747
1748 /* disable receives while setting up the descriptors */
1dc32918
JP		 1749 rctl = er32(RCTL);
1750 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1751
1752 /* set the Receive Delay Timer Register */
1dc32918 1753 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1754
581d708e 1755 if (hw->mac_type >= e1000_82540) {
1dc32918 1756 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1757 if (adapter->itr_setting != 0)
1dc32918 1758 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1759 }
1760
581d708e
MC		 1761 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1762 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1763 switch (adapter->num_rx_queues) {
24025e4e
MC		 1764 case 1:
1765 default:
581d708e 1766 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1767 ew32(RDLEN, rdlen);
1768 ew32(RDBAH, (rdba >> 32));
1769 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1770 ew32(RDT, 0);
1771 ew32(RDH, 0);
6a951698
AK		 1772 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1773 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1774 break;
24025e4e
MC		 1775 }
1776
1da177e4 1777 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1778 if (hw->mac_type >= e1000_82543) {
1dc32918 1779 rxcsum = er32(RXCSUM);
630b25cd 1780 if (adapter->rx_csum)
2d7edb92 1781 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1782 else
2d7edb92 1783 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1784 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1785 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1786 }
1787
1788 /* Enable Receives */
1dc32918 1789 ew32(RCTL, rctl);
1da177e4
LT		 1790}
1791
1792/**
581d708e 1793 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1794 * @adapter: board private structure
581d708e 1795 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1796 *
1797 * Free all transmit software resources
1798 **/
1799
64798845
JP		 1800static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1801 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1802{
1803 struct pci_dev *pdev = adapter->pdev;
1804
581d708e 1805 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1806
581d708e
MC		 1807 vfree(tx_ring->buffer_info);
1808 tx_ring->buffer_info = NULL;
1da177e4 1809
581d708e 1810 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1811
581d708e
MC		 1812 tx_ring->desc = NULL;
1813}
1814
1815/**
1816 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1817 * @adapter: board private structure
1818 *
1819 * Free all transmit software resources
1820 **/
1821
64798845 1822void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1823{
1824 int i;
1825
f56799ea 1826 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1827 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1828}
1829
64798845
JP		 1830static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1831 struct e1000_buffer *buffer_info)
1da177e4 1832{
602c0554
AD		 1833 if (buffer_info->dma) {
1834 if (buffer_info->mapped_as_page)
1835 pci_unmap_page(adapter->pdev, buffer_info->dma,
1836 buffer_info->length, PCI_DMA_TODEVICE);
1837 else
1838 pci_unmap_single(adapter->pdev, buffer_info->dma,
1839 buffer_info->length,
1840 PCI_DMA_TODEVICE);
1841 buffer_info->dma = 0;
1842 }
a9ebadd6 1843 if (buffer_info->skb) {
1da177e4 1844 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1845 buffer_info->skb = NULL;
1846 }
37e73df8 1847 buffer_info->time_stamp = 0;
a9ebadd6 1848 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1849}
1850
1851/**
1852 * e1000_clean_tx_ring - Free Tx Buffers
1853 * @adapter: board private structure
581d708e 1854 * @tx_ring: ring to be cleaned
1da177e4
LT		 1855 **/
1856
64798845
JP		 1857static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1858 struct e1000_tx_ring *tx_ring)
1da177e4 1859{
1dc32918 1860 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1861 struct e1000_buffer *buffer_info;
1862 unsigned long size;
1863 unsigned int i;
1864
1865 /* Free all the Tx ring sk_buffs */
1866
96838a40 1867 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1868 buffer_info = &tx_ring->buffer_info[i];
1869 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1870 }
1871
1872 size = sizeof(struct e1000_buffer) * tx_ring->count;
1873 memset(tx_ring->buffer_info, 0, size);
1874
1875 /* Zero out the descriptor ring */
1876
1877 memset(tx_ring->desc, 0, tx_ring->size);
1878
1879 tx_ring->next_to_use = 0;
1880 tx_ring->next_to_clean = 0;
fd803241 1881 tx_ring->last_tx_tso = 0;
1da177e4 1882
1dc32918
JP		 1883 writel(0, hw->hw_addr + tx_ring->tdh);
1884 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 1885}
1886
1887/**
1888 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1889 * @adapter: board private structure
1890 **/
1891
64798845 1892static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 1893{
1894 int i;
1895
f56799ea 1896 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1897 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1898}
1899
1900/**
1901 * e1000_free_rx_resources - Free Rx Resources
1902 * @adapter: board private structure
581d708e 1903 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1904 *
1905 * Free all receive software resources
1906 **/
1907
64798845
JP		 1908static void e1000_free_rx_resources(struct e1000_adapter *adapter,
1909 struct e1000_rx_ring *rx_ring)
1da177e4 1910{
1da177e4
LT		 1911 struct pci_dev *pdev = adapter->pdev;
1912
581d708e 1913 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1914
1915 vfree(rx_ring->buffer_info);
1916 rx_ring->buffer_info = NULL;
1917
1918 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1919
1920 rx_ring->desc = NULL;
1921}
1922
1923/**
581d708e 1924 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1925 * @adapter: board private structure
581d708e
MC		 1926 *
1927 * Free all receive software resources
1928 **/
1929
64798845 1930void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1931{
1932 int i;
1933
f56799ea 1934 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1935 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1936}
1937
1938/**
1939 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1940 * @adapter: board private structure
1941 * @rx_ring: ring to free buffers from
1da177e4
LT		 1942 **/
1943
64798845
JP		 1944static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
1945 struct e1000_rx_ring *rx_ring)
1da177e4 1946{
1dc32918 1947 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1948 struct e1000_buffer *buffer_info;
1949 struct pci_dev *pdev = adapter->pdev;
1950 unsigned long size;
630b25cd 1951 unsigned int i;
1da177e4
LT		 1952
1953 /* Free all the Rx ring sk_buffs */
96838a40 1954 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1955 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 1956 if (buffer_info->dma &&
1957 adapter->clean_rx == e1000_clean_rx_irq) {
1958 pci_unmap_single(pdev, buffer_info->dma,
1959 buffer_info->length,
1960 PCI_DMA_FROMDEVICE);
1961 } else if (buffer_info->dma &&
1962 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
1963 pci_unmap_page(pdev, buffer_info->dma,
1964 buffer_info->length,
1965 PCI_DMA_FROMDEVICE);
679be3ba 1966 }
1da177e4 1967
679be3ba 1968 buffer_info->dma = 0;
edbbb3ca
JB		 1969 if (buffer_info->page) {
1970 put_page(buffer_info->page);
1971 buffer_info->page = NULL;
1972 }
679be3ba 1973 if (buffer_info->skb) {
1da177e4
LT		 1974 dev_kfree_skb(buffer_info->skb);
1975 buffer_info->skb = NULL;
997f5cbd 1976 }
1da177e4
LT		 1977 }
1978
edbbb3ca
JB		 1979 /* there also may be some cached data from a chained receive */
1980 if (rx_ring->rx_skb_top) {
1981 dev_kfree_skb(rx_ring->rx_skb_top);
1982 rx_ring->rx_skb_top = NULL;
1983 }
1984
1da177e4
LT		 1985 size = sizeof(struct e1000_buffer) * rx_ring->count;
1986 memset(rx_ring->buffer_info, 0, size);
1987
1988 /* Zero out the descriptor ring */
1da177e4
LT		 1989 memset(rx_ring->desc, 0, rx_ring->size);
1990
1991 rx_ring->next_to_clean = 0;
1992 rx_ring->next_to_use = 0;
1993
1dc32918
JP		 1994 writel(0, hw->hw_addr + rx_ring->rdh);
1995 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 1996}
1997
1998/**
1999 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2000 * @adapter: board private structure
2001 **/
2002
64798845 2003static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2004{
2005 int i;
2006
f56799ea 2007 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2008 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2009}
2010
2011/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2012 * and memory write and invalidate disabled for certain operations
2013 */
64798845 2014static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2015{
1dc32918 2016 struct e1000_hw *hw = &adapter->hw;
1da177e4 2017 struct net_device *netdev = adapter->netdev;
406874a7 2018 u32 rctl;
1da177e4 2019
1dc32918 2020 e1000_pci_clear_mwi(hw);
1da177e4 2021
1dc32918 2022 rctl = er32(RCTL);
1da177e4 2023 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2024 ew32(RCTL, rctl);
2025 E1000_WRITE_FLUSH();
1da177e4
LT		 2026 mdelay(5);
2027
96838a40 2028 if (netif_running(netdev))
581d708e 2029 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2030}
2031
64798845 2032static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2033{
1dc32918 2034 struct e1000_hw *hw = &adapter->hw;
1da177e4 2035 struct net_device *netdev = adapter->netdev;
406874a7 2036 u32 rctl;
1da177e4 2037
1dc32918 2038 rctl = er32(RCTL);
1da177e4 2039 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2040 ew32(RCTL, rctl);
2041 E1000_WRITE_FLUSH();
1da177e4
LT		 2042 mdelay(5);
2043
1dc32918
JP		 2044 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2045 e1000_pci_set_mwi(hw);
1da177e4 2046
96838a40 2047 if (netif_running(netdev)) {
72d64a43
JK		 2048 /* No need to loop, because 82542 supports only 1 queue */
2049 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2050 e1000_configure_rx(adapter);
72d64a43 2051 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2052 }
2053}
2054
2055/**
2056 * e1000_set_mac - Change the Ethernet Address of the NIC
2057 * @netdev: network interface device structure
2058 * @p: pointer to an address structure
2059 *
2060 * Returns 0 on success, negative on failure
2061 **/
2062
64798845 2063static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2064{
60490fe0 2065 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2066 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2067 struct sockaddr *addr = p;
2068
96838a40 2069 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2070 return -EADDRNOTAVAIL;
2071
2072 /* 82542 2.0 needs to be in reset to write receive address registers */
2073
1dc32918 2074 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2075 e1000_enter_82542_rst(adapter);
2076
2077 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2078 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2079
1dc32918 2080 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2081
1dc32918 2082 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2083 e1000_leave_82542_rst(adapter);
2084
2085 return 0;
2086}
2087
2088/**
db0ce50d 2089 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2090 * @netdev: network interface device structure
2091 *
db0ce50d
PM		 2092 * The set_rx_mode entry point is called whenever the unicast or multicast
2093 * address lists or the network interface flags are updated. This routine is
2094 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2095 * promiscuous mode, and all-multi behavior.
2096 **/
2097
64798845 2098static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2099{
60490fe0 2100 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2101 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2102 struct netdev_hw_addr *ha;
2103 bool use_uc = false;
406874a7
JP		 2104 u32 rctl;
2105 u32 hash_value;
868d5309 2106 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2107 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2108 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2109
2110 if (!mcarray) {
2111 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2112 return;
2113 }
cd94dd0b 2114
2648345f
MC		 2115 /* Check for Promiscuous and All Multicast modes */
2116
1dc32918 2117 rctl = er32(RCTL);
1da177e4 2118
96838a40 2119 if (netdev->flags & IFF_PROMISC) {
1da177e4 2120 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2121 rctl &= ~E1000_RCTL_VFE;
1da177e4 2122 } else {
1532ecea 2123 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2124 rctl |= E1000_RCTL_MPE;
1532ecea 2125 else
746b9f02 2126 rctl &= ~E1000_RCTL_MPE;
1532ecea
JB		 2127 /* Enable VLAN filter if there is a VLAN */
2128 if (adapter->vlgrp)
2129 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2130 }
2131
32e7bfc4 2132 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2133 rctl |= E1000_RCTL_UPE;
2134 } else if (!(netdev->flags & IFF_PROMISC)) {
2135 rctl &= ~E1000_RCTL_UPE;
ccffad25 2136 use_uc = true;
1da177e4
LT		 2137 }
2138
1dc32918 2139 ew32(RCTL, rctl);
1da177e4
LT		 2140
2141 /* 82542 2.0 needs to be in reset to write receive address registers */
2142
96838a40 2143 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2144 e1000_enter_82542_rst(adapter);
2145
db0ce50d
PM		 2146 /* load the first 14 addresses into the exact filters 1-14. Unicast
2147 * addresses take precedence to avoid disabling unicast filtering
2148 * when possible.
2149 *
1da177e4
LT		 2150 * RAR 0 is used for the station MAC adddress
2151 * if there are not 14 addresses, go ahead and clear the filters
2152 */
ccffad25
JP		 2153 i = 1;
2154 if (use_uc)
32e7bfc4 2155 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2156 if (i == rar_entries)
2157 break;
2158 e1000_rar_set(hw, ha->addr, i++);
2159 }
2160
2161 WARN_ON(i == rar_entries);
2162
22bedad3 2163 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2164 if (i == rar_entries) {
2165 /* load any remaining addresses into the hash table */
2166 u32 hash_reg, hash_bit, mta;
22bedad3 2167 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2168 hash_reg = (hash_value >> 5) & 0x7F;
2169 hash_bit = hash_value & 0x1F;
2170 mta = (1 << hash_bit);
2171 mcarray[hash_reg] |= mta;
10886af5 2172 } else {
22bedad3 2173 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2174 }
2175 }
2176
7a81e9f3
JP		 2177 for (; i < rar_entries; i++) {
2178 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2179 E1000_WRITE_FLUSH();
2180 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2181 E1000_WRITE_FLUSH();
1da177e4
LT		 2182 }
2183
81c52285
JB		 2184 /* write the hash table completely, write from bottom to avoid
2185 * both stupid write combining chipsets, and flushing each write */
2186 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2187 /*
2188 * If we are on an 82544 has an errata where writing odd
2189 * offsets overwrites the previous even offset, but writing
2190 * backwards over the range solves the issue by always
2191 * writing the odd offset first
2192 */
2193 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2194 }
2195 E1000_WRITE_FLUSH();
2196
96838a40 2197 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2198 e1000_leave_82542_rst(adapter);
81c52285
JB		 2199
2200 kfree(mcarray);
1da177e4
LT		 2201}
2202
2203/* Need to wait a few seconds after link up to get diagnostic information from
2204 * the phy */
2205
64798845 2206static void e1000_update_phy_info(unsigned long data)
1da177e4 2207{
e982f17c 2208 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2209 struct e1000_hw *hw = &adapter->hw;
2210 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2211}
2212
2213/**
2214 * e1000_82547_tx_fifo_stall - Timer Call-back
2215 * @data: pointer to adapter cast into an unsigned long
2216 **/
2217
64798845 2218static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2219{
e982f17c 2220 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2221 struct e1000_hw *hw = &adapter->hw;
1da177e4 2222 struct net_device *netdev = adapter->netdev;
406874a7 2223 u32 tctl;
1da177e4 2224
96838a40 2225 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2226 if ((er32(TDT) == er32(TDH)) &&
2227 (er32(TDFT) == er32(TDFH)) &&
2228 (er32(TDFTS) == er32(TDFHS))) {
2229 tctl = er32(TCTL);
2230 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2231 ew32(TDFT, adapter->tx_head_addr);
2232 ew32(TDFH, adapter->tx_head_addr);
2233 ew32(TDFTS, adapter->tx_head_addr);
2234 ew32(TDFHS, adapter->tx_head_addr);
2235 ew32(TCTL, tctl);
2236 E1000_WRITE_FLUSH();
1da177e4
LT		 2237
2238 adapter->tx_fifo_head = 0;
2239 atomic_set(&adapter->tx_fifo_stall, 0);
2240 netif_wake_queue(netdev);
baa34745 2241 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT		 2242 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2243 }
2244 }
2245}
2246
b548192a 2247bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2248{
2249 struct e1000_hw *hw = &adapter->hw;
2250 bool link_active = false;
be0f0719
JB		 2251
2252 /* get_link_status is set on LSC (link status) interrupt or
2253 * rx sequence error interrupt. get_link_status will stay
2254 * false until the e1000_check_for_link establishes link
2255 * for copper adapters ONLY
2256 */
2257 switch (hw->media_type) {
2258 case e1000_media_type_copper:
2259 if (hw->get_link_status) {
120a5d0d 2260 e1000_check_for_link(hw);
be0f0719
JB		 2261 link_active = !hw->get_link_status;
2262 } else {
2263 link_active = true;
2264 }
2265 break;
2266 case e1000_media_type_fiber:
120a5d0d 2267 e1000_check_for_link(hw);
be0f0719
JB		 2268 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2269 break;
2270 case e1000_media_type_internal_serdes:
120a5d0d 2271 e1000_check_for_link(hw);
be0f0719
JB		 2272 link_active = hw->serdes_has_link;
2273 break;
2274 default:
2275 break;
2276 }
2277
2278 return link_active;
2279}
2280
1da177e4
LT		 2281/**
2282 * e1000_watchdog - Timer Call-back
2283 * @data: pointer to adapter cast into an unsigned long
2284 **/
64798845 2285static void e1000_watchdog(unsigned long data)
1da177e4 2286{
e982f17c 2287 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2288 struct e1000_hw *hw = &adapter->hw;
1da177e4 2289 struct net_device *netdev = adapter->netdev;
545c67c0 2290 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2291 u32 link, tctl;
90fb5135 2292
be0f0719
JB		 2293 link = e1000_has_link(adapter);
2294 if ((netif_carrier_ok(netdev)) && link)
2295 goto link_up;
1da177e4 2296
96838a40
JB		 2297 if (link) {
2298 if (!netif_carrier_ok(netdev)) {
406874a7 2299 u32 ctrl;
c3033b01 2300 bool txb2b = true;
be0f0719 2301 /* update snapshot of PHY registers on LSC */
1dc32918 2302 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2303 &adapter->link_speed,
2304 &adapter->link_duplex);
2305
1dc32918 2306 ctrl = er32(CTRL);
b30c4d8f
JK		 2307 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2308 "Flow Control: %s\n",
2309 netdev->name,
2310 adapter->link_speed,
2311 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2312 "Full Duplex" : "Half Duplex",
2313 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2314 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2315 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2316 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2317
7e6c9861
JK		 2318 /* tweak tx_queue_len according to speed/duplex
2319 * and adjust the timeout factor */
66a2b0a3
JK		 2320 netdev->tx_queue_len = adapter->tx_queue_len;
2321 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2322 switch (adapter->link_speed) {
2323 case SPEED_10:
c3033b01 2324 txb2b = false;
7e6c9861 2325 netdev->tx_queue_len = 10;
be0f0719 2326 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2327 break;
2328 case SPEED_100:
c3033b01 2329 txb2b = false;
7e6c9861
JK		 2330 netdev->tx_queue_len = 100;
2331 /* maybe add some timeout factor ? */
2332 break;
2333 }
2334
1532ecea 2335 /* enable transmits in the hardware */
1dc32918 2336 tctl = er32(TCTL);
7e6c9861 2337 tctl |= E1000_TCTL_EN;
1dc32918 2338 ew32(TCTL, tctl);
66a2b0a3 2339
1da177e4 2340 netif_carrier_on(netdev);
baa34745
JB		 2341 if (!test_bit(__E1000_DOWN, &adapter->flags))
2342 mod_timer(&adapter->phy_info_timer,
2343 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2344 adapter->smartspeed = 0;
2345 }
2346 } else {
96838a40 2347 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2348 adapter->link_speed = 0;
2349 adapter->link_duplex = 0;
b30c4d8f
JK		 2350 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2351 netdev->name);
1da177e4 2352 netif_carrier_off(netdev);
baa34745
JB		 2353
2354 if (!test_bit(__E1000_DOWN, &adapter->flags))
2355 mod_timer(&adapter->phy_info_timer,
2356 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2357 }
2358
2359 e1000_smartspeed(adapter);
2360 }
2361
be0f0719 2362link_up:
1da177e4
LT		 2363 e1000_update_stats(adapter);
2364
1dc32918 2365 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2366 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2367 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2368 adapter->colc_old = adapter->stats.colc;
2369
2370 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2371 adapter->gorcl_old = adapter->stats.gorcl;
2372 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2373 adapter->gotcl_old = adapter->stats.gotcl;
2374
1dc32918 2375 e1000_update_adaptive(hw);
1da177e4 2376
f56799ea 2377 if (!netif_carrier_ok(netdev)) {
581d708e 2378 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2379 /* We've lost link, so the controller stops DMA,
2380 * but we've got queued Tx work that's never going
2381 * to get done, so reset controller to flush Tx.
2382 * (Do the reset outside of interrupt context). */
87041639
JK		 2383 adapter->tx_timeout_count++;
2384 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2385 /* return immediately since reset is imminent */
2386 return;
1da177e4
LT		 2387 }
2388 }
2389
1da177e4 2390 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2391 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2392
2648345f 2393 /* Force detection of hung controller every watchdog period */
c3033b01 2394 adapter->detect_tx_hung = true;
1da177e4
LT		 2395
2396 /* Reset the timer */
baa34745
JB		 2397 if (!test_bit(__E1000_DOWN, &adapter->flags))
2398 mod_timer(&adapter->watchdog_timer,
2399 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2400}
2401
835bb129
JB		 2402enum latency_range {
2403 lowest_latency = 0,
2404 low_latency = 1,
2405 bulk_latency = 2,
2406 latency_invalid = 255
2407};
2408
2409/**
2410 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2411 * @adapter: pointer to adapter
2412 * @itr_setting: current adapter->itr
2413 * @packets: the number of packets during this measurement interval
2414 * @bytes: the number of bytes during this measurement interval
2415 *
835bb129
JB		 2416 * Stores a new ITR value based on packets and byte
2417 * counts during the last interrupt. The advantage of per interrupt
2418 * computation is faster updates and more accurate ITR for the current
2419 * traffic pattern. Constants in this function were computed
2420 * based on theoretical maximum wire speed and thresholds were set based
2421 * on testing data as well as attempting to minimize response time
2422 * while increasing bulk throughput.
2423 * this functionality is controlled by the InterruptThrottleRate module
2424 * parameter (see e1000_param.c)
835bb129
JB		 2425 **/
2426static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2427 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2428{
2429 unsigned int retval = itr_setting;
2430 struct e1000_hw *hw = &adapter->hw;
2431
2432 if (unlikely(hw->mac_type < e1000_82540))
2433 goto update_itr_done;
2434
2435 if (packets == 0)
2436 goto update_itr_done;
2437
835bb129
JB		 2438 switch (itr_setting) {
2439 case lowest_latency:
2b65326e
JB		 2440 /* jumbo frames get bulk treatment*/
2441 if (bytes/packets > 8000)
2442 retval = bulk_latency;
2443 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2444 retval = low_latency;
2445 break;
2446 case low_latency: /* 50 usec aka 20000 ints/s */
2447 if (bytes > 10000) {
2b65326e
JB		 2448 /* jumbo frames need bulk latency setting */
2449 if (bytes/packets > 8000)
2450 retval = bulk_latency;
2451 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2452 retval = bulk_latency;
2453 else if ((packets > 35))
2454 retval = lowest_latency;
2b65326e
JB		 2455 } else if (bytes/packets > 2000)
2456 retval = bulk_latency;
2457 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2458 retval = lowest_latency;
2459 break;
2460 case bulk_latency: /* 250 usec aka 4000 ints/s */
2461 if (bytes > 25000) {
2462 if (packets > 35)
2463 retval = low_latency;
2b65326e
JB		 2464 } else if (bytes < 6000) {
2465 retval = low_latency;
835bb129
JB		 2466 }
2467 break;
2468 }
2469
2470update_itr_done:
2471 return retval;
2472}
2473
2474static void e1000_set_itr(struct e1000_adapter *adapter)
2475{
2476 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2477 u16 current_itr;
2478 u32 new_itr = adapter->itr;
835bb129
JB		 2479
2480 if (unlikely(hw->mac_type < e1000_82540))
2481 return;
2482
2483 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2484 if (unlikely(adapter->link_speed != SPEED_1000)) {
2485 current_itr = 0;
2486 new_itr = 4000;
2487 goto set_itr_now;
2488 }
2489
2490 adapter->tx_itr = e1000_update_itr(adapter,
2491 adapter->tx_itr,
2492 adapter->total_tx_packets,
2493 adapter->total_tx_bytes);
2b65326e
JB		 2494 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2495 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2496 adapter->tx_itr = low_latency;
2497
835bb129
JB		 2498 adapter->rx_itr = e1000_update_itr(adapter,
2499 adapter->rx_itr,
2500 adapter->total_rx_packets,
2501 adapter->total_rx_bytes);
2b65326e
JB		 2502 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2503 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2504 adapter->rx_itr = low_latency;
835bb129
JB		 2505
2506 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2507
835bb129
JB		 2508 switch (current_itr) {
2509 /* counts and packets in update_itr are dependent on these numbers */
2510 case lowest_latency:
2511 new_itr = 70000;
2512 break;
2513 case low_latency:
2514 new_itr = 20000; /* aka hwitr = ~200 */
2515 break;
2516 case bulk_latency:
2517 new_itr = 4000;
2518 break;
2519 default:
2520 break;
2521 }
2522
2523set_itr_now:
2524 if (new_itr != adapter->itr) {
2525 /* this attempts to bias the interrupt rate towards Bulk
2526 * by adding intermediate steps when interrupt rate is
2527 * increasing */
2528 new_itr = new_itr > adapter->itr ?
2529 min(adapter->itr + (new_itr >> 2), new_itr) :
2530 new_itr;
2531 adapter->itr = new_itr;
1dc32918 2532 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2533 }
2534
2535 return;
2536}
2537
1da177e4
LT		 2538#define E1000_TX_FLAGS_CSUM 0x00000001
2539#define E1000_TX_FLAGS_VLAN 0x00000002
2540#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2541#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2542#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2543#define E1000_TX_FLAGS_VLAN_SHIFT 16
2544
64798845
JP		 2545static int e1000_tso(struct e1000_adapter *adapter,
2546 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2547{
1da177e4 2548 struct e1000_context_desc *context_desc;
545c67c0 2549 struct e1000_buffer *buffer_info;
1da177e4 2550 unsigned int i;
406874a7
JP		 2551 u32 cmd_length = 0;
2552 u16 ipcse = 0, tucse, mss;
2553 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2554 int err;
2555
89114afd 2556 if (skb_is_gso(skb)) {
1da177e4
LT		 2557 if (skb_header_cloned(skb)) {
2558 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2559 if (err)
2560 return err;
2561 }
2562
ab6a5bb6 2563 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2564 mss = skb_shinfo(skb)->gso_size;
60828236 2565 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2566 struct iphdr *iph = ip_hdr(skb);
2567 iph->tot_len = 0;
2568 iph->check = 0;
aa8223c7
ACM		 2569 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2570 iph->daddr, 0,
2571 IPPROTO_TCP,
2572 0);
2d7edb92 2573 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2574 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2575 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2576 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2577 tcp_hdr(skb)->check =
0660e03f
ACM		 2578 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2579 &ipv6_hdr(skb)->daddr,
2580 0, IPPROTO_TCP, 0);
2d7edb92 2581 ipcse = 0;
2d7edb92 2582 }
bbe735e4 2583 ipcss = skb_network_offset(skb);
eddc9ec5 2584 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2585 tucss = skb_transport_offset(skb);
aa8223c7 2586 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2587 tucse = 0;
2588
2589 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2590 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2591
581d708e
MC		 2592 i = tx_ring->next_to_use;
2593 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2594 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2595
2596 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2597 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2598 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2599 context_desc->upper_setup.tcp_fields.tucss = tucss;
2600 context_desc->upper_setup.tcp_fields.tucso = tucso;
2601 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2602 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2603 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2604 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2605
545c67c0 2606 buffer_info->time_stamp = jiffies;
a9ebadd6 2607 buffer_info->next_to_watch = i;
545c67c0 2608
581d708e
MC		 2609 if (++i == tx_ring->count) i = 0;
2610 tx_ring->next_to_use = i;
1da177e4 2611
c3033b01 2612 return true;
1da177e4 2613 }
c3033b01 2614 return false;
1da177e4
LT		 2615}
2616
64798845
JP		 2617static bool e1000_tx_csum(struct e1000_adapter *adapter,
2618 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2619{
2620 struct e1000_context_desc *context_desc;
545c67c0 2621 struct e1000_buffer *buffer_info;
1da177e4 2622 unsigned int i;
406874a7 2623 u8 css;
3ed30676 2624 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2625
3ed30676
DG		 2626 if (skb->ip_summed != CHECKSUM_PARTIAL)
2627 return false;
1da177e4 2628
3ed30676 2629 switch (skb->protocol) {
09640e63 2630 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2631 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2632 cmd_len |= E1000_TXD_CMD_TCP;
2633 break;
09640e63 2634 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2635 /* XXX not handling all IPV6 headers */
2636 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2637 cmd_len |= E1000_TXD_CMD_TCP;
2638 break;
2639 default:
2640 if (unlikely(net_ratelimit()))
2641 DPRINTK(DRV, WARNING,
2642 "checksum_partial proto=%x!\n", skb->protocol);
2643 break;
2644 }
1da177e4 2645
3ed30676 2646 css = skb_transport_offset(skb);
1da177e4 2647
3ed30676
DG		 2648 i = tx_ring->next_to_use;
2649 buffer_info = &tx_ring->buffer_info[i];
2650 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2651
3ed30676
DG		 2652 context_desc->lower_setup.ip_config = 0;
2653 context_desc->upper_setup.tcp_fields.tucss = css;
2654 context_desc->upper_setup.tcp_fields.tucso =
2655 css + skb->csum_offset;
2656 context_desc->upper_setup.tcp_fields.tucse = 0;
2657 context_desc->tcp_seg_setup.data = 0;
2658 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2659
3ed30676
DG		 2660 buffer_info->time_stamp = jiffies;
2661 buffer_info->next_to_watch = i;
1da177e4 2662
3ed30676
DG		 2663 if (unlikely(++i == tx_ring->count)) i = 0;
2664 tx_ring->next_to_use = i;
2665
2666 return true;
1da177e4
LT		 2667}
2668
2669#define E1000_MAX_TXD_PWR 12
2670#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2671
64798845
JP		 2672static int e1000_tx_map(struct e1000_adapter *adapter,
2673 struct e1000_tx_ring *tx_ring,
2674 struct sk_buff *skb, unsigned int first,
2675 unsigned int max_per_txd, unsigned int nr_frags,
2676 unsigned int mss)
1da177e4 2677{
1dc32918 2678 struct e1000_hw *hw = &adapter->hw;
602c0554 2679 struct pci_dev *pdev = adapter->pdev;
37e73df8 2680 struct e1000_buffer *buffer_info;
d20b606c 2681 unsigned int len = skb_headlen(skb);
602c0554 2682 unsigned int offset = 0, size, count = 0, i;
1da177e4 2683 unsigned int f;
1da177e4
LT		 2684
2685 i = tx_ring->next_to_use;
2686
96838a40 2687 while (len) {
37e73df8 2688 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2689 size = min(len, max_per_txd);
fd803241
JK		 2690 /* Workaround for Controller erratum --
2691 * descriptor for non-tso packet in a linear SKB that follows a
2692 * tso gets written back prematurely before the data is fully
0f15a8fa 2693 * DMA'd to the controller */
fd803241 2694 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2695 !skb_is_gso(skb)) {
fd803241
JK		 2696 tx_ring->last_tx_tso = 0;
2697 size -= 4;
2698 }
2699
1da177e4
LT		 2700 /* Workaround for premature desc write-backs
2701 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2702 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2703 size -= 4;
97338bde
MC		 2704 /* work-around for errata 10 and it applies
2705 * to all controllers in PCI-X mode
2706 * The fix is to make sure that the first descriptor of a
2707 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2708 */
1dc32918 2709 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2710 (size > 2015) && count == 0))
2711 size = 2015;
96838a40 2712
1da177e4
LT		 2713 /* Workaround for potential 82544 hang in PCI-X. Avoid
2714 * terminating buffers within evenly-aligned dwords. */
96838a40 2715 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2716 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2717 size > 4))
2718 size -= 4;
2719
2720 buffer_info->length = size;
cdd7549e 2721 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2722 buffer_info->time_stamp = jiffies;
602c0554
AD		 2723 buffer_info->mapped_as_page = false;
2724 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
2725 size, PCI_DMA_TODEVICE);
2726 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2727 goto dma_error;
a9ebadd6 2728 buffer_info->next_to_watch = i;
1da177e4
LT		 2729
2730 len -= size;
2731 offset += size;
2732 count++;
37e73df8
AD		 2733 if (len) {
2734 i++;
2735 if (unlikely(i == tx_ring->count))
2736 i = 0;
2737 }
1da177e4
LT		 2738 }
2739
96838a40 2740 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2741 struct skb_frag_struct *frag;
2742
2743 frag = &skb_shinfo(skb)->frags[f];
2744 len = frag->size;
602c0554 2745 offset = frag->page_offset;
1da177e4 2746
96838a40 2747 while (len) {
37e73df8
AD		 2748 i++;
2749 if (unlikely(i == tx_ring->count))
2750 i = 0;
2751
1da177e4
LT		 2752 buffer_info = &tx_ring->buffer_info[i];
2753 size = min(len, max_per_txd);
1da177e4
LT		 2754 /* Workaround for premature desc write-backs
2755 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2756 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2757 size -= 4;
1da177e4
LT		 2758 /* Workaround for potential 82544 hang in PCI-X.
2759 * Avoid terminating buffers within evenly-aligned
2760 * dwords. */
96838a40 2761 if (unlikely(adapter->pcix_82544 &&
8fce4731
JB		 2762 !((unsigned long)(page_to_phys(frag->page) + offset
2763 + size - 1) & 4) &&
2764 size > 4))
1da177e4
LT		 2765 size -= 4;
2766
2767 buffer_info->length = size;
1da177e4 2768 buffer_info->time_stamp = jiffies;
602c0554
AD		 2769 buffer_info->mapped_as_page = true;
2770 buffer_info->dma = pci_map_page(pdev, frag->page,
2771 offset, size,
2772 PCI_DMA_TODEVICE);
2773 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2774 goto dma_error;
a9ebadd6 2775 buffer_info->next_to_watch = i;
1da177e4
LT		 2776
2777 len -= size;
2778 offset += size;
2779 count++;
1da177e4
LT		 2780 }
2781 }
2782
1da177e4
LT		 2783 tx_ring->buffer_info[i].skb = skb;
2784 tx_ring->buffer_info[first].next_to_watch = i;
2785
2786 return count;
602c0554
AD		 2787
2788dma_error:
2789 dev_err(&pdev->dev, "TX DMA map failed\n");
2790 buffer_info->dma = 0;
c1fa347f 2791 if (count)
602c0554 2792 count--;
c1fa347f
RK		 2793
2794 while (count--) {
2795 if (i==0)
602c0554 2796 i += tx_ring->count;
c1fa347f 2797 i--;
602c0554
AD		 2798 buffer_info = &tx_ring->buffer_info[i];
2799 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2800 }
2801
2802 return 0;
1da177e4
LT		 2803}
2804
64798845
JP		 2805static void e1000_tx_queue(struct e1000_adapter *adapter,
2806 struct e1000_tx_ring *tx_ring, int tx_flags,
2807 int count)
1da177e4 2808{
1dc32918 2809 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2810 struct e1000_tx_desc *tx_desc = NULL;
2811 struct e1000_buffer *buffer_info;
406874a7 2812 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2813 unsigned int i;
2814
96838a40 2815 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2816 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2817 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2818 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2819
96838a40 2820 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2821 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2822 }
2823
96838a40 2824 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2825 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2826 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2827 }
2828
96838a40 2829 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2830 txd_lower |= E1000_TXD_CMD_VLE;
2831 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2832 }
2833
2834 i = tx_ring->next_to_use;
2835
96838a40 2836 while (count--) {
1da177e4
LT		 2837 buffer_info = &tx_ring->buffer_info[i];
2838 tx_desc = E1000_TX_DESC(*tx_ring, i);
2839 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2840 tx_desc->lower.data =
2841 cpu_to_le32(txd_lower | buffer_info->length);
2842 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2843 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2844 }
2845
2846 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2847
2848 /* Force memory writes to complete before letting h/w
2849 * know there are new descriptors to fetch. (Only
2850 * applicable for weak-ordered memory model archs,
2851 * such as IA-64). */
2852 wmb();
2853
2854 tx_ring->next_to_use = i;
1dc32918 2855 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 2856 /* we need this if more than one processor can write to our tail
2857 * at a time, it syncronizes IO on IA64/Altix systems */
2858 mmiowb();
1da177e4
LT		 2859}
2860
2861/**
2862 * 82547 workaround to avoid controller hang in half-duplex environment.
2863 * The workaround is to avoid queuing a large packet that would span
2864 * the internal Tx FIFO ring boundary by notifying the stack to resend
2865 * the packet at a later time. This gives the Tx FIFO an opportunity to
2866 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2867 * to the beginning of the Tx FIFO.
2868 **/
2869
2870#define E1000_FIFO_HDR 0x10
2871#define E1000_82547_PAD_LEN 0x3E0
2872
64798845
JP		 2873static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
2874 struct sk_buff *skb)
1da177e4 2875{
406874a7
JP		 2876 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2877 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 2878
9099cfb9 2879 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 2880
96838a40 2881 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2882 goto no_fifo_stall_required;
2883
96838a40 2884 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2885 return 1;
2886
96838a40 2887 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2888 atomic_set(&adapter->tx_fifo_stall, 1);
2889 return 1;
2890 }
2891
2892no_fifo_stall_required:
2893 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2894 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2895 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2896 return 0;
2897}
2898
65c7973f
JB		 2899static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2900{
2901 struct e1000_adapter *adapter = netdev_priv(netdev);
2902 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2903
2904 netif_stop_queue(netdev);
2905 /* Herbert's original patch had:
2906 * smp_mb__after_netif_stop_queue();
2907 * but since that doesn't exist yet, just open code it. */
2908 smp_mb();
2909
2910 /* We need to check again in a case another CPU has just
2911 * made room available. */
2912 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2913 return -EBUSY;
2914
2915 /* A reprieve! */
2916 netif_start_queue(netdev);
fcfb1224 2917 ++adapter->restart_queue;
65c7973f
JB		 2918 return 0;
2919}
2920
2921static int e1000_maybe_stop_tx(struct net_device *netdev,
2922 struct e1000_tx_ring *tx_ring, int size)
2923{
2924 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2925 return 0;
2926 return __e1000_maybe_stop_tx(netdev, size);
2927}
2928
1da177e4 2929#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 2930static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
2931 struct net_device *netdev)
1da177e4 2932{
60490fe0 2933 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2934 struct e1000_hw *hw = &adapter->hw;
581d708e 2935 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2936 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2937 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2938 unsigned int tx_flags = 0;
6d1e3aa7 2939 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 2940 unsigned int nr_frags;
2941 unsigned int mss;
1da177e4 2942 int count = 0;
76c224bc 2943 int tso;
1da177e4 2944 unsigned int f;
1da177e4 2945
65c7973f
JB		 2946 /* This goes back to the question of how to logically map a tx queue
2947 * to a flow. Right now, performance is impacted slightly negatively
2948 * if using multiple tx queues. If the stack breaks away from a
2949 * single qdisc implementation, we can look at this again. */
581d708e 2950 tx_ring = adapter->tx_ring;
24025e4e 2951
581d708e 2952 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2953 dev_kfree_skb_any(skb);
2954 return NETDEV_TX_OK;
2955 }
2956
7967168c 2957 mss = skb_shinfo(skb)->gso_size;
76c224bc 2958 /* The controller does a simple calculation to
1da177e4
LT		 2959 * make sure there is enough room in the FIFO before
2960 * initiating the DMA for each buffer. The calc is:
2961 * 4 = ceil(buffer len/mss). To make sure we don't
2962 * overrun the FIFO, adjust the max buffer len if mss
2963 * drops. */
96838a40 2964 if (mss) {
406874a7 2965 u8 hdr_len;
1da177e4
LT		 2966 max_per_txd = min(mss << 2, max_per_txd);
2967 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2968
ab6a5bb6 2969 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 2970 if (skb->data_len && hdr_len == len) {
1dc32918 2971 switch (hw->mac_type) {
9f687888 2972 unsigned int pull_size;
683a2aa3
HX		 2973 case e1000_82544:
2974 /* Make sure we have room to chop off 4 bytes,
2975 * and that the end alignment will work out to
2976 * this hardware's requirements
2977 * NOTE: this is a TSO only workaround
2978 * if end byte alignment not correct move us
2979 * into the next dword */
27a884dc 2980 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 2981 break;
2982 /* fall through */
9f687888
JK		 2983 pull_size = min((unsigned int)4, skb->data_len);
2984 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2985 DPRINTK(DRV, ERR,
9f687888
JK		 2986 "__pskb_pull_tail failed.\n");
2987 dev_kfree_skb_any(skb);
749dfc70 2988 return NETDEV_TX_OK;
9f687888
JK		 2989 }
2990 len = skb->len - skb->data_len;
2991 break;
2992 default:
2993 /* do nothing */
2994 break;
d74bbd3b 2995 }
9a3056da 2996 }
1da177e4
LT		 2997 }
2998
9a3056da 2999 /* reserve a descriptor for the offload context */
84fa7933 3000 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3001 count++;
2648345f 3002 count++;
fd803241 3003
fd803241 3004 /* Controller Erratum workaround */
89114afd 3005 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3006 count++;
fd803241 3007
1da177e4
LT		 3008 count += TXD_USE_COUNT(len, max_txd_pwr);
3009
96838a40 3010 if (adapter->pcix_82544)
1da177e4
LT		 3011 count++;
3012
96838a40 3013 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3014 * in PCI-X mode, so add one more descriptor to the count
3015 */
1dc32918 3016 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3017 (len > 2015)))
3018 count++;
3019
1da177e4 3020 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3021 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3022 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3023 max_txd_pwr);
96838a40 3024 if (adapter->pcix_82544)
1da177e4
LT		 3025 count += nr_frags;
3026
1da177e4
LT		 3027 /* need: count + 2 desc gap to keep tail from touching
3028 * head, otherwise try next time */
8017943e 3029 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3030 return NETDEV_TX_BUSY;
1da177e4 3031
1dc32918 3032 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3033 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3034 netif_stop_queue(netdev);
baa34745
JB		 3035 if (!test_bit(__E1000_DOWN, &adapter->flags))
3036 mod_timer(&adapter->tx_fifo_stall_timer,
3037 jiffies + 1);
1da177e4
LT		 3038 return NETDEV_TX_BUSY;
3039 }
3040 }
3041
96838a40 3042 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3043 tx_flags |= E1000_TX_FLAGS_VLAN;
3044 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3045 }
3046
581d708e 3047 first = tx_ring->next_to_use;
96838a40 3048
581d708e 3049 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3050 if (tso < 0) {
3051 dev_kfree_skb_any(skb);
3052 return NETDEV_TX_OK;
3053 }
3054
fd803241 3055 if (likely(tso)) {
8fce4731
JB		 3056 if (likely(hw->mac_type != e1000_82544))
3057 tx_ring->last_tx_tso = 1;
1da177e4 3058 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3059 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3060 tx_flags |= E1000_TX_FLAGS_CSUM;
3061
60828236 3062 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3063 tx_flags |= E1000_TX_FLAGS_IPV4;
3064
37e73df8
AD		 3065 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3066 nr_frags, mss);
1da177e4 3067
37e73df8
AD		 3068 if (count) {
3069 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3070 /* Make sure there is space in the ring for the next send. */
3071 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3072
37e73df8
AD		 3073 } else {
3074 dev_kfree_skb_any(skb);
3075 tx_ring->buffer_info[first].time_stamp = 0;
3076 tx_ring->next_to_use = first;
3077 }
1da177e4 3078
1da177e4
LT		 3079 return NETDEV_TX_OK;
3080}
3081
3082/**
3083 * e1000_tx_timeout - Respond to a Tx Hang
3084 * @netdev: network interface device structure
3085 **/
3086
64798845 3087static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3088{
60490fe0 3089 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3090
3091 /* Do the reset outside of interrupt context */
87041639
JK		 3092 adapter->tx_timeout_count++;
3093 schedule_work(&adapter->reset_task);
1da177e4
LT		 3094}
3095
64798845 3096static void e1000_reset_task(struct work_struct *work)
1da177e4 3097{
65f27f38
DH		 3098 struct e1000_adapter *adapter =
3099 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3100
2db10a08 3101 e1000_reinit_locked(adapter);
1da177e4
LT		 3102}
3103
3104/**
3105 * e1000_get_stats - Get System Network Statistics
3106 * @netdev: network interface device structure
3107 *
3108 * Returns the address of the device statistics structure.
3109 * The statistics are actually updated from the timer callback.
3110 **/
3111
64798845 3112static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3113{
6b7660cd 3114 /* only return the current stats */
5fe31def 3115 return &netdev->stats;
1da177e4
LT		 3116}
3117
3118/**
3119 * e1000_change_mtu - Change the Maximum Transfer Unit
3120 * @netdev: network interface device structure
3121 * @new_mtu: new value for maximum frame size
3122 *
3123 * Returns 0 on success, negative on failure
3124 **/
3125
64798845 3126static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3127{
60490fe0 3128 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3129 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3130 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3131
96838a40
JB		 3132 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3133 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3134 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3135 return -EINVAL;
2d7edb92 3136 }
1da177e4 3137
997f5cbd 3138 /* Adapter-specific max frame size limits. */
1dc32918 3139 switch (hw->mac_type) {
9e2feace 3140 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3141 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
997f5cbd 3142 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3143 return -EINVAL;
2d7edb92 3144 }
997f5cbd 3145 break;
997f5cbd
JK		 3146 default:
3147 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3148 break;
1da177e4
LT		 3149 }
3150
3d6114e7
JB		 3151 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3152 msleep(1);
3153 /* e1000_down has a dependency on max_frame_size */
3154 hw->max_frame_size = max_frame;
3155 if (netif_running(netdev))
3156 e1000_down(adapter);
3157
87f5032e 3158 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3159 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3160 * larger slab size.
3161 * i.e. RXBUFFER_2048 --> size-4096 slab
3162 * however with the new *_jumbo_rx* routines, jumbo receives will use
3163 * fragmented skbs */
9e2feace 3164
9926146b 3165 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3166 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3167 else
3168#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3169 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3170#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3171 adapter->rx_buffer_len = PAGE_SIZE;
3172#endif
9e2feace
AK		 3173
3174 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3175 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3176 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3177 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3178 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3179
3d6114e7
JB		 3180 printk(KERN_INFO "e1000: %s changing MTU from %d to %d\n",
3181 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3182 netdev->mtu = new_mtu;
3183
2db10a08 3184 if (netif_running(netdev))
3d6114e7
JB		 3185 e1000_up(adapter);
3186 else
3187 e1000_reset(adapter);
3188
3189 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3190
1da177e4
LT		 3191 return 0;
3192}
3193
3194/**
3195 * e1000_update_stats - Update the board statistics counters
3196 * @adapter: board private structure
3197 **/
3198
64798845 3199void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3200{
5fe31def 3201 struct net_device *netdev = adapter->netdev;
1da177e4 3202 struct e1000_hw *hw = &adapter->hw;
282f33c9 3203 struct pci_dev *pdev = adapter->pdev;
1da177e4 3204 unsigned long flags;
406874a7 3205 u16 phy_tmp;
1da177e4
LT		 3206
3207#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3208
282f33c9
LV		 3209 /*
3210 * Prevent stats update while adapter is being reset, or if the pci
3211 * connection is down.
3212 */
9026729b 3213 if (adapter->link_speed == 0)
282f33c9 3214 return;
81b1955e 3215 if (pci_channel_offline(pdev))
9026729b
AK		 3216 return;
3217
1da177e4
LT		 3218 spin_lock_irqsave(&adapter->stats_lock, flags);
3219
828d055f 3220 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3221 * called from the interrupt context, so they must only
3222 * be written while holding adapter->stats_lock
3223 */
3224
1dc32918
JP		 3225 adapter->stats.crcerrs += er32(CRCERRS);
3226 adapter->stats.gprc += er32(GPRC);
3227 adapter->stats.gorcl += er32(GORCL);
3228 adapter->stats.gorch += er32(GORCH);
3229 adapter->stats.bprc += er32(BPRC);
3230 adapter->stats.mprc += er32(MPRC);
3231 adapter->stats.roc += er32(ROC);
3232
1532ecea
JB		 3233 adapter->stats.prc64 += er32(PRC64);
3234 adapter->stats.prc127 += er32(PRC127);
3235 adapter->stats.prc255 += er32(PRC255);
3236 adapter->stats.prc511 += er32(PRC511);
3237 adapter->stats.prc1023 += er32(PRC1023);
3238 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3239
3240 adapter->stats.symerrs += er32(SYMERRS);
3241 adapter->stats.mpc += er32(MPC);
3242 adapter->stats.scc += er32(SCC);
3243 adapter->stats.ecol += er32(ECOL);
3244 adapter->stats.mcc += er32(MCC);
3245 adapter->stats.latecol += er32(LATECOL);
3246 adapter->stats.dc += er32(DC);
3247 adapter->stats.sec += er32(SEC);
3248 adapter->stats.rlec += er32(RLEC);
3249 adapter->stats.xonrxc += er32(XONRXC);
3250 adapter->stats.xontxc += er32(XONTXC);
3251 adapter->stats.xoffrxc += er32(XOFFRXC);
3252 adapter->stats.xofftxc += er32(XOFFTXC);
3253 adapter->stats.fcruc += er32(FCRUC);
3254 adapter->stats.gptc += er32(GPTC);
3255 adapter->stats.gotcl += er32(GOTCL);
3256 adapter->stats.gotch += er32(GOTCH);
3257 adapter->stats.rnbc += er32(RNBC);
3258 adapter->stats.ruc += er32(RUC);
3259 adapter->stats.rfc += er32(RFC);
3260 adapter->stats.rjc += er32(RJC);
3261 adapter->stats.torl += er32(TORL);
3262 adapter->stats.torh += er32(TORH);
3263 adapter->stats.totl += er32(TOTL);
3264 adapter->stats.toth += er32(TOTH);
3265 adapter->stats.tpr += er32(TPR);
3266
1532ecea
JB		 3267 adapter->stats.ptc64 += er32(PTC64);
3268 adapter->stats.ptc127 += er32(PTC127);
3269 adapter->stats.ptc255 += er32(PTC255);
3270 adapter->stats.ptc511 += er32(PTC511);
3271 adapter->stats.ptc1023 += er32(PTC1023);
3272 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3273
3274 adapter->stats.mptc += er32(MPTC);
3275 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3276
3277 /* used for adaptive IFS */
3278
1dc32918 3279 hw->tx_packet_delta = er32(TPT);
1da177e4 3280 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3281 hw->collision_delta = er32(COLC);
1da177e4
LT		 3282 adapter->stats.colc += hw->collision_delta;
3283
96838a40 3284 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3285 adapter->stats.algnerrc += er32(ALGNERRC);
3286 adapter->stats.rxerrc += er32(RXERRC);
3287 adapter->stats.tncrs += er32(TNCRS);
3288 adapter->stats.cexterr += er32(CEXTERR);
3289 adapter->stats.tsctc += er32(TSCTC);
3290 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3291 }
3292
3293 /* Fill out the OS statistics structure */
5fe31def
AK		 3294 netdev->stats.multicast = adapter->stats.mprc;
3295 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3296
3297 /* Rx Errors */
3298
87041639
JK		 3299 /* RLEC on some newer hardware can be incorrect so build
3300 * our own version based on RUC and ROC */
5fe31def 3301 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3302 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3303 adapter->stats.ruc + adapter->stats.roc +
3304 adapter->stats.cexterr;
49559854 3305 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3306 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3307 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3308 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3309 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3310
3311 /* Tx Errors */
49559854 3312 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3313 netdev->stats.tx_errors = adapter->stats.txerrc;
3314 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3315 netdev->stats.tx_window_errors = adapter->stats.latecol;
3316 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3317 if (hw->bad_tx_carr_stats_fd &&
167fb284 3318 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3319 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3320 adapter->stats.tncrs = 0;
3321 }
1da177e4
LT		 3322
3323 /* Tx Dropped needs to be maintained elsewhere */
3324
3325 /* Phy Stats */
96838a40
JB		 3326 if (hw->media_type == e1000_media_type_copper) {
3327 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3328 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3329 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3330 adapter->phy_stats.idle_errors += phy_tmp;
3331 }
3332
96838a40 3333 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3334 (hw->phy_type == e1000_phy_m88) &&
3335 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3336 adapter->phy_stats.receive_errors += phy_tmp;
3337 }
3338
15e376b4 3339 /* Management Stats */
1dc32918
JP		 3340 if (hw->has_smbus) {
3341 adapter->stats.mgptc += er32(MGTPTC);
3342 adapter->stats.mgprc += er32(MGTPRC);
3343 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3344 }
3345
1da177e4
LT		 3346 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3347}
9ac98284 3348
1da177e4
LT		 3349/**
3350 * e1000_intr - Interrupt Handler
3351 * @irq: interrupt number
3352 * @data: pointer to a network interface device structure
1da177e4
LT		 3353 **/
3354
64798845 3355static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3356{
3357 struct net_device *netdev = data;
60490fe0 3358 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3359 struct e1000_hw *hw = &adapter->hw;
1532ecea 3360 u32 icr = er32(ICR);
c3570acb 3361
e151a60a 3362 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3363 return IRQ_NONE; /* Not our interrupt */
3364
96838a40 3365 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3366 hw->get_link_status = 1;
1314bbf3
AK		 3367 /* guard against interrupt when we're going down */
3368 if (!test_bit(__E1000_DOWN, &adapter->flags))
3369 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3370 }
3371
1532ecea
JB		 3372 /* disable interrupts, without the synchronize_irq bit */
3373 ew32(IMC, ~0);
3374 E1000_WRITE_FLUSH();
3375
288379f0 3376 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3377 adapter->total_tx_bytes = 0;
3378 adapter->total_tx_packets = 0;
3379 adapter->total_rx_bytes = 0;
3380 adapter->total_rx_packets = 0;
288379f0 3381 __napi_schedule(&adapter->napi);
a6c42322 3382 } else {
90fb5135
AK		 3383 /* this really should not happen! if it does it is basically a
3384 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3385 if (!test_bit(__E1000_DOWN, &adapter->flags))
3386 e1000_irq_enable(adapter);
3387 }
1da177e4 3388
1da177e4
LT		 3389 return IRQ_HANDLED;
3390}
3391
1da177e4
LT		 3392/**
3393 * e1000_clean - NAPI Rx polling callback
3394 * @adapter: board private structure
3395 **/
64798845 3396static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3397{
bea3348e 3398 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3399 int tx_clean_complete = 0, work_done = 0;
581d708e 3400
650b5a5c 3401 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3402
650b5a5c 3403 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3404
650b5a5c 3405 if (!tx_clean_complete)
d2c7ddd6
DM		 3406 work_done = budget;
3407
53e52c72
DM		 3408 /* If budget not fully consumed, exit the polling mode */
3409 if (work_done < budget) {
835bb129
JB		 3410 if (likely(adapter->itr_setting & 3))
3411 e1000_set_itr(adapter);
288379f0 3412 napi_complete(napi);
a6c42322
JB		 3413 if (!test_bit(__E1000_DOWN, &adapter->flags))
3414 e1000_irq_enable(adapter);
1da177e4
LT		 3415 }
3416
bea3348e 3417 return work_done;
1da177e4
LT		 3418}
3419
1da177e4
LT		 3420/**
3421 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3422 * @adapter: board private structure
3423 **/
64798845
JP		 3424static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3425 struct e1000_tx_ring *tx_ring)
1da177e4 3426{
1dc32918 3427 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3428 struct net_device *netdev = adapter->netdev;
3429 struct e1000_tx_desc *tx_desc, *eop_desc;
3430 struct e1000_buffer *buffer_info;
3431 unsigned int i, eop;
2a1af5d7 3432 unsigned int count = 0;
835bb129 3433 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3434
3435 i = tx_ring->next_to_clean;
3436 eop = tx_ring->buffer_info[i].next_to_watch;
3437 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3438
ccfb342c
AD		 3439 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3440 (count < tx_ring->count)) {
843f4267
JB		 3441 bool cleaned = false;
3442 for ( ; !cleaned; count++) {
1da177e4
LT		 3443 tx_desc = E1000_TX_DESC(*tx_ring, i);
3444 buffer_info = &tx_ring->buffer_info[i];
3445 cleaned = (i == eop);
3446
835bb129 3447 if (cleaned) {
2b65326e 3448 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3449 unsigned int segs, bytecount;
3450 segs = skb_shinfo(skb)->gso_segs ?: 1;
3451 /* multiply data chunks by size of headers */
3452 bytecount = ((segs - 1) * skb_headlen(skb)) +
3453 skb->len;
2b65326e 3454 total_tx_packets += segs;
7753b171 3455 total_tx_bytes += bytecount;
835bb129 3456 }
fd803241 3457 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3458 tx_desc->upper.data = 0;
1da177e4 3459
96838a40 3460 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3461 }
581d708e 3462
1da177e4
LT		 3463 eop = tx_ring->buffer_info[i].next_to_watch;
3464 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3465 }
3466
3467 tx_ring->next_to_clean = i;
3468
77b2aad5 3469#define TX_WAKE_THRESHOLD 32
843f4267 3470 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3471 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3472 /* Make sure that anybody stopping the queue after this
3473 * sees the new next_to_clean.
3474 */
3475 smp_mb();
cdd7549e
JB		 3476
3477 if (netif_queue_stopped(netdev) &&
3478 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3479 netif_wake_queue(netdev);
fcfb1224
JB		 3480 ++adapter->restart_queue;
3481 }
77b2aad5 3482 }
2648345f 3483
581d708e 3484 if (adapter->detect_tx_hung) {
2648345f 3485 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3486 * check with the clearing of time_stamp and movement of i */
c3033b01 3487 adapter->detect_tx_hung = false;
cdd7549e
JB		 3488 if (tx_ring->buffer_info[eop].time_stamp &&
3489 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP		 3490 (adapter->tx_timeout_factor * HZ)) &&
3491 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3492
3493 /* detected Tx unit hang */
c6963ef5 3494 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3495 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3496 " TDH <%x>\n"
3497 " TDT <%x>\n"
3498 " next_to_use <%x>\n"
3499 " next_to_clean <%x>\n"
3500 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3501 " time_stamp <%lx>\n"
3502 " next_to_watch <%x>\n"
3503 " jiffies <%lx>\n"
3504 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3505 (unsigned long)((tx_ring - adapter->tx_ring) /
3506 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3507 readl(hw->hw_addr + tx_ring->tdh),
3508 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3509 tx_ring->next_to_use,
392137fa 3510 tx_ring->next_to_clean,
cdd7549e 3511 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3512 eop,
3513 jiffies,
3514 eop_desc->upper.fields.status);
1da177e4 3515 netif_stop_queue(netdev);
70b8f1e1 3516 }
1da177e4 3517 }
835bb129
JB		 3518 adapter->total_tx_bytes += total_tx_bytes;
3519 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3520 netdev->stats.tx_bytes += total_tx_bytes;
3521 netdev->stats.tx_packets += total_tx_packets;
ccfb342c 3522 return (count < tx_ring->count);
1da177e4
LT		 3523}
3524
3525/**
3526 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3527 * @adapter: board private structure
3528 * @status_err: receive descriptor status and error fields
3529 * @csum: receive descriptor csum field
3530 * @sk_buff: socket buffer with received data
1da177e4
LT		 3531 **/
3532
64798845
JP		 3533static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3534 u32 csum, struct sk_buff *skb)
1da177e4 3535{
1dc32918 3536 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3537 u16 status = (u16)status_err;
3538 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3539 skb->ip_summed = CHECKSUM_NONE;
3540
1da177e4 3541 /* 82543 or newer only */
1dc32918 3542 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3543 /* Ignore Checksum bit is set */
96838a40 3544 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3545 /* TCP/UDP checksum error bit is set */
96838a40 3546 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3547 /* let the stack verify checksum errors */
1da177e4 3548 adapter->hw_csum_err++;
2d7edb92
MC		 3549 return;
3550 }
3551 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3552 if (!(status & E1000_RXD_STAT_TCPCS))
3553 return;
3554
2d7edb92
MC		 3555 /* It must be a TCP or UDP packet with a valid checksum */
3556 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3557 /* TCP checksum is good */
3558 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3559 }
2d7edb92 3560 adapter->hw_csum_good++;
1da177e4
LT		 3561}
3562
edbbb3ca
JB		 3563/**
3564 * e1000_consume_page - helper function
3565 **/
3566static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3567 u16 length)
3568{
3569 bi->page = NULL;
3570 skb->len += length;
3571 skb->data_len += length;
3572 skb->truesize += length;
3573}
3574
3575/**
3576 * e1000_receive_skb - helper function to handle rx indications
3577 * @adapter: board private structure
3578 * @status: descriptor status field as written by hardware
3579 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3580 * @skb: pointer to sk_buff to be indicated to stack
3581 */
3582static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3583 __le16 vlan, struct sk_buff *skb)
3584{
3585 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
3586 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3587 le16_to_cpu(vlan) &
3588 E1000_RXD_SPC_VLAN_MASK);
3589 } else {
3590 netif_receive_skb(skb);
3591 }
3592}
3593
3594/**
3595 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3596 * @adapter: board private structure
3597 * @rx_ring: ring to clean
3598 * @work_done: amount of napi work completed this call
3599 * @work_to_do: max amount of work allowed for this call to do
3600 *
3601 * the return value indicates whether actual cleaning was done, there
3602 * is no guarantee that everything was cleaned
3603 */
3604static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3605 struct e1000_rx_ring *rx_ring,
3606 int *work_done, int work_to_do)
3607{
3608 struct e1000_hw *hw = &adapter->hw;
3609 struct net_device *netdev = adapter->netdev;
3610 struct pci_dev *pdev = adapter->pdev;
3611 struct e1000_rx_desc *rx_desc, *next_rxd;
3612 struct e1000_buffer *buffer_info, *next_buffer;
3613 unsigned long irq_flags;
3614 u32 length;
3615 unsigned int i;
3616 int cleaned_count = 0;
3617 bool cleaned = false;
3618 unsigned int total_rx_bytes=0, total_rx_packets=0;
3619
3620 i = rx_ring->next_to_clean;
3621 rx_desc = E1000_RX_DESC(*rx_ring, i);
3622 buffer_info = &rx_ring->buffer_info[i];
3623
3624 while (rx_desc->status & E1000_RXD_STAT_DD) {
3625 struct sk_buff *skb;
3626 u8 status;
3627
3628 if (*work_done >= work_to_do)
3629 break;
3630 (*work_done)++;
3631
3632 status = rx_desc->status;
3633 skb = buffer_info->skb;
3634 buffer_info->skb = NULL;
3635
3636 if (++i == rx_ring->count) i = 0;
3637 next_rxd = E1000_RX_DESC(*rx_ring, i);
3638 prefetch(next_rxd);
3639
3640 next_buffer = &rx_ring->buffer_info[i];
3641
3642 cleaned = true;
3643 cleaned_count++;
3644 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
3645 PCI_DMA_FROMDEVICE);
3646 buffer_info->dma = 0;
3647
3648 length = le16_to_cpu(rx_desc->length);
3649
3650 /* errors is only valid for DD + EOP descriptors */
3651 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3652 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3653 u8 last_byte = *(skb->data + length - 1);
3654 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3655 last_byte)) {
3656 spin_lock_irqsave(&adapter->stats_lock,
3657 irq_flags);
3658 e1000_tbi_adjust_stats(hw, &adapter->stats,
3659 length, skb->data);
3660 spin_unlock_irqrestore(&adapter->stats_lock,
3661 irq_flags);
3662 length--;
3663 } else {
3664 /* recycle both page and skb */
3665 buffer_info->skb = skb;
3666 /* an error means any chain goes out the window
3667 * too */
3668 if (rx_ring->rx_skb_top)
3669 dev_kfree_skb(rx_ring->rx_skb_top);
3670 rx_ring->rx_skb_top = NULL;
3671 goto next_desc;
3672 }
3673 }
3674
3675#define rxtop rx_ring->rx_skb_top
3676 if (!(status & E1000_RXD_STAT_EOP)) {
3677 /* this descriptor is only the beginning (or middle) */
3678 if (!rxtop) {
3679 /* this is the beginning of a chain */
3680 rxtop = skb;
3681 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3682 0, length);
3683 } else {
3684 /* this is the middle of a chain */
3685 skb_fill_page_desc(rxtop,
3686 skb_shinfo(rxtop)->nr_frags,
3687 buffer_info->page, 0, length);
3688 /* re-use the skb, only consumed the page */
3689 buffer_info->skb = skb;
3690 }
3691 e1000_consume_page(buffer_info, rxtop, length);
3692 goto next_desc;
3693 } else {
3694 if (rxtop) {
3695 /* end of the chain */
3696 skb_fill_page_desc(rxtop,
3697 skb_shinfo(rxtop)->nr_frags,
3698 buffer_info->page, 0, length);
3699 /* re-use the current skb, we only consumed the
3700 * page */
3701 buffer_info->skb = skb;
3702 skb = rxtop;
3703 rxtop = NULL;
3704 e1000_consume_page(buffer_info, skb, length);
3705 } else {
3706 /* no chain, got EOP, this buf is the packet
3707 * copybreak to save the put_page/alloc_page */
3708 if (length <= copybreak &&
3709 skb_tailroom(skb) >= length) {
3710 u8 *vaddr;
3711 vaddr = kmap_atomic(buffer_info->page,
3712 KM_SKB_DATA_SOFTIRQ);
3713 memcpy(skb_tail_pointer(skb), vaddr, length);
3714 kunmap_atomic(vaddr,
3715 KM_SKB_DATA_SOFTIRQ);
3716 /* re-use the page, so don't erase
3717 * buffer_info->page */
3718 skb_put(skb, length);
3719 } else {
3720 skb_fill_page_desc(skb, 0,
3721 buffer_info->page, 0,
3722 length);
3723 e1000_consume_page(buffer_info, skb,
3724 length);
3725 }
3726 }
3727 }
3728
3729 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3730 e1000_rx_checksum(adapter,
3731 (u32)(status) |
3732 ((u32)(rx_desc->errors) << 24),
3733 le16_to_cpu(rx_desc->csum), skb);
3734
3735 pskb_trim(skb, skb->len - 4);
3736
3737 /* probably a little skewed due to removing CRC */
3738 total_rx_bytes += skb->len;
3739 total_rx_packets++;
3740
3741 /* eth type trans needs skb->data to point to something */
3742 if (!pskb_may_pull(skb, ETH_HLEN)) {
3743 DPRINTK(DRV, ERR, "pskb_may_pull failed.\n");
3744 dev_kfree_skb(skb);
3745 goto next_desc;
3746 }
3747
3748 skb->protocol = eth_type_trans(skb, netdev);
3749
3750 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3751
3752next_desc:
3753 rx_desc->status = 0;
3754
3755 /* return some buffers to hardware, one at a time is too slow */
3756 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3757 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3758 cleaned_count = 0;
3759 }
3760
3761 /* use prefetched values */
3762 rx_desc = next_rxd;
3763 buffer_info = next_buffer;
3764 }
3765 rx_ring->next_to_clean = i;
3766
3767 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3768 if (cleaned_count)
3769 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3770
3771 adapter->total_rx_packets += total_rx_packets;
3772 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3773 netdev->stats.rx_bytes += total_rx_bytes;
3774 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 3775 return cleaned;
3776}
3777
1da177e4 3778/**
2d7edb92 3779 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3780 * @adapter: board private structure
edbbb3ca
JB		 3781 * @rx_ring: ring to clean
3782 * @work_done: amount of napi work completed this call
3783 * @work_to_do: max amount of work allowed for this call to do
3784 */
64798845
JP		 3785static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3786 struct e1000_rx_ring *rx_ring,
3787 int *work_done, int work_to_do)
1da177e4 3788{
1dc32918 3789 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3790 struct net_device *netdev = adapter->netdev;
3791 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3792 struct e1000_rx_desc *rx_desc, *next_rxd;
3793 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3794 unsigned long flags;
406874a7 3795 u32 length;
1da177e4 3796 unsigned int i;
72d64a43 3797 int cleaned_count = 0;
c3033b01 3798 bool cleaned = false;
835bb129 3799 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3800
3801 i = rx_ring->next_to_clean;
3802 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3803 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3804
b92ff8ee 3805 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3806 struct sk_buff *skb;
a292ca6e 3807 u8 status;
90fb5135 3808
96838a40 3809 if (*work_done >= work_to_do)
1da177e4
LT		 3810 break;
3811 (*work_done)++;
c3570acb 3812
a292ca6e 3813 status = rx_desc->status;
b92ff8ee 3814 skb = buffer_info->skb;
86c3d59f
JB		 3815 buffer_info->skb = NULL;
3816
30320be8
JK		 3817 prefetch(skb->data - NET_IP_ALIGN);
3818
86c3d59f
JB		 3819 if (++i == rx_ring->count) i = 0;
3820 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3821 prefetch(next_rxd);
3822
86c3d59f 3823 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3824
c3033b01 3825 cleaned = true;
72d64a43 3826 cleaned_count++;
edbbb3ca 3827 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
1da177e4 3828 PCI_DMA_FROMDEVICE);
679be3ba 3829 buffer_info->dma = 0;
1da177e4 3830
1da177e4 3831 length = le16_to_cpu(rx_desc->length);
ea30e119 3832 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 3833 * packet, if thats the case we need to toss it. In fact, we
3834 * to toss every packet with the EOP bit clear and the next
3835 * frame that _does_ have the EOP bit set, as it is by
3836 * definition only a frame fragment
3837 */
3838 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
3839 adapter->discarding = true;
3840
3841 if (adapter->discarding) {
a1415ee6
JK		 3842 /* All receives must fit into a single buffer */
3843 E1000_DBG("%s: Receive packet consumed multiple"
3844 " buffers\n", netdev->name);
864c4e45 3845 /* recycle */
8fc897b0 3846 buffer_info->skb = skb;
40a14dea
JB		 3847 if (status & E1000_RXD_STAT_EOP)
3848 adapter->discarding = false;
1da177e4
LT		 3849 goto next_desc;
3850 }
3851
96838a40 3852 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 3853 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 3854 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3855 last_byte)) {
1da177e4 3856 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 3857 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 3858 length, skb->data);
3859 spin_unlock_irqrestore(&adapter->stats_lock,
3860 flags);
3861 length--;
3862 } else {
9e2feace
AK		 3863 /* recycle */
3864 buffer_info->skb = skb;
1da177e4
LT		 3865 goto next_desc;
3866 }
1cb5821f 3867 }
1da177e4 3868
d2a1e213
JB		 3869 /* adjust length to remove Ethernet CRC, this must be
3870 * done after the TBI_ACCEPT workaround above */
3871 length -= 4;
3872
835bb129
JB		 3873 /* probably a little skewed due to removing CRC */
3874 total_rx_bytes += length;
3875 total_rx_packets++;
3876
a292ca6e
JK		 3877 /* code added for copybreak, this should improve
3878 * performance for small packets with large amounts
3879 * of reassembly being done in the stack */
1f753861 3880 if (length < copybreak) {
a292ca6e 3881 struct sk_buff *new_skb =
89d71a66 3882 netdev_alloc_skb_ip_align(netdev, length);
a292ca6e 3883 if (new_skb) {
27d7ff46
ACM		 3884 skb_copy_to_linear_data_offset(new_skb,
3885 -NET_IP_ALIGN,
3886 (skb->data -
3887 NET_IP_ALIGN),
3888 (length +
3889 NET_IP_ALIGN));
a292ca6e
JK		 3890 /* save the skb in buffer_info as good */
3891 buffer_info->skb = skb;
3892 skb = new_skb;
a292ca6e 3893 }
996695de
AK		 3894 /* else just continue with the old one */
3895 }
a292ca6e 3896 /* end copybreak code */
996695de 3897 skb_put(skb, length);
1da177e4
LT		 3898
3899 /* Receive Checksum Offload */
a292ca6e 3900 e1000_rx_checksum(adapter,
406874a7
JP		 3901 (u32)(status) |
3902 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 3903 le16_to_cpu(rx_desc->csum), skb);
96838a40 3904
1da177e4 3905 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 3906
edbbb3ca 3907 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 3908
1da177e4
LT		 3909next_desc:
3910 rx_desc->status = 0;
1da177e4 3911
72d64a43
JK		 3912 /* return some buffers to hardware, one at a time is too slow */
3913 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3914 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3915 cleaned_count = 0;
3916 }
3917
30320be8 3918 /* use prefetched values */
86c3d59f
JB		 3919 rx_desc = next_rxd;
3920 buffer_info = next_buffer;
1da177e4 3921 }
1da177e4 3922 rx_ring->next_to_clean = i;
72d64a43
JK		 3923
3924 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3925 if (cleaned_count)
3926 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 3927
835bb129
JB		 3928 adapter->total_rx_packets += total_rx_packets;
3929 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3930 netdev->stats.rx_bytes += total_rx_bytes;
3931 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 3932 return cleaned;
3933}
3934
edbbb3ca
JB		 3935/**
3936 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
3937 * @adapter: address of board private structure
3938 * @rx_ring: pointer to receive ring structure
3939 * @cleaned_count: number of buffers to allocate this pass
3940 **/
3941
3942static void
3943e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
3944 struct e1000_rx_ring *rx_ring, int cleaned_count)
3945{
3946 struct net_device *netdev = adapter->netdev;
3947 struct pci_dev *pdev = adapter->pdev;
3948 struct e1000_rx_desc *rx_desc;
3949 struct e1000_buffer *buffer_info;
3950 struct sk_buff *skb;
3951 unsigned int i;
89d71a66 3952 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 3953
3954 i = rx_ring->next_to_use;
3955 buffer_info = &rx_ring->buffer_info[i];
3956
3957 while (cleaned_count--) {
3958 skb = buffer_info->skb;
3959 if (skb) {
3960 skb_trim(skb, 0);
3961 goto check_page;
3962 }
3963
89d71a66 3964 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3965 if (unlikely(!skb)) {
3966 /* Better luck next round */
3967 adapter->alloc_rx_buff_failed++;
3968 break;
3969 }
3970
3971 /* Fix for errata 23, can't cross 64kB boundary */
3972 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3973 struct sk_buff *oldskb = skb;
3974 DPRINTK(PROBE, ERR, "skb align check failed: %u bytes "
3975 "at %p\n", bufsz, skb->data);
3976 /* Try again, without freeing the previous */
89d71a66 3977 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3978 /* Failed allocation, critical failure */
3979 if (!skb) {
3980 dev_kfree_skb(oldskb);
3981 adapter->alloc_rx_buff_failed++;
3982 break;
3983 }
3984
3985 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3986 /* give up */
3987 dev_kfree_skb(skb);
3988 dev_kfree_skb(oldskb);
3989 break; /* while (cleaned_count--) */
3990 }
3991
3992 /* Use new allocation */
3993 dev_kfree_skb(oldskb);
3994 }
edbbb3ca
JB		 3995 buffer_info->skb = skb;
3996 buffer_info->length = adapter->rx_buffer_len;
3997check_page:
3998 /* allocate a new page if necessary */
3999 if (!buffer_info->page) {
4000 buffer_info->page = alloc_page(GFP_ATOMIC);
4001 if (unlikely(!buffer_info->page)) {
4002 adapter->alloc_rx_buff_failed++;
4003 break;
4004 }
4005 }
4006
b5abb028 4007 if (!buffer_info->dma) {
edbbb3ca
JB		 4008 buffer_info->dma = pci_map_page(pdev,
4009 buffer_info->page, 0,
4010 buffer_info->length,
4011 PCI_DMA_FROMDEVICE);
b5abb028
AB		 4012 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
4013 put_page(buffer_info->page);
4014 dev_kfree_skb(skb);
4015 buffer_info->page = NULL;
4016 buffer_info->skb = NULL;
4017 buffer_info->dma = 0;
4018 adapter->alloc_rx_buff_failed++;
4019 break; /* while !buffer_info->skb */
4020 }
4021 }
edbbb3ca
JB		 4022
4023 rx_desc = E1000_RX_DESC(*rx_ring, i);
4024 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4025
4026 if (unlikely(++i == rx_ring->count))
4027 i = 0;
4028 buffer_info = &rx_ring->buffer_info[i];
4029 }
4030
4031 if (likely(rx_ring->next_to_use != i)) {
4032 rx_ring->next_to_use = i;
4033 if (unlikely(i-- == 0))
4034 i = (rx_ring->count - 1);
4035
4036 /* Force memory writes to complete before letting h/w
4037 * know there are new descriptors to fetch. (Only
4038 * applicable for weak-ordered memory model archs,
4039 * such as IA-64). */
4040 wmb();
4041 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4042 }
4043}
4044
1da177e4 4045/**
2d7edb92 4046 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4047 * @adapter: address of board private structure
4048 **/
4049
64798845
JP		 4050static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4051 struct e1000_rx_ring *rx_ring,
4052 int cleaned_count)
1da177e4 4053{
1dc32918 4054 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4055 struct net_device *netdev = adapter->netdev;
4056 struct pci_dev *pdev = adapter->pdev;
4057 struct e1000_rx_desc *rx_desc;
4058 struct e1000_buffer *buffer_info;
4059 struct sk_buff *skb;
2648345f 4060 unsigned int i;
89d71a66 4061 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4062
4063 i = rx_ring->next_to_use;
4064 buffer_info = &rx_ring->buffer_info[i];
4065
a292ca6e 4066 while (cleaned_count--) {
ca6f7224
CH		 4067 skb = buffer_info->skb;
4068 if (skb) {
a292ca6e
JK		 4069 skb_trim(skb, 0);
4070 goto map_skb;
4071 }
4072
89d71a66 4073 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4074 if (unlikely(!skb)) {
1da177e4 4075 /* Better luck next round */
72d64a43 4076 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4077 break;
4078 }
4079
2648345f 4080 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4081 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4082 struct sk_buff *oldskb = skb;
2648345f
MC		 4083 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4084 "at %p\n", bufsz, skb->data);
4085 /* Try again, without freeing the previous */
89d71a66 4086 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4087 /* Failed allocation, critical failure */
1da177e4
LT		 4088 if (!skb) {
4089 dev_kfree_skb(oldskb);
edbbb3ca 4090 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4091 break;
4092 }
2648345f 4093
1da177e4
LT		 4094 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4095 /* give up */
4096 dev_kfree_skb(skb);
4097 dev_kfree_skb(oldskb);
edbbb3ca 4098 adapter->alloc_rx_buff_failed++;
1da177e4 4099 break; /* while !buffer_info->skb */
1da177e4 4100 }
ca6f7224
CH		 4101
4102 /* Use new allocation */
4103 dev_kfree_skb(oldskb);
1da177e4 4104 }
1da177e4
LT		 4105 buffer_info->skb = skb;
4106 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4107map_skb:
1da177e4
LT		 4108 buffer_info->dma = pci_map_single(pdev,
4109 skb->data,
edbbb3ca 4110 buffer_info->length,
1da177e4 4111 PCI_DMA_FROMDEVICE);
b5abb028
AB		 4112 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
4113 dev_kfree_skb(skb);
4114 buffer_info->skb = NULL;
4115 buffer_info->dma = 0;
4116 adapter->alloc_rx_buff_failed++;
4117 break; /* while !buffer_info->skb */
4118 }
1da177e4 4119
edbbb3ca
JB		 4120 /*
4121 * XXX if it was allocated cleanly it will never map to a
4122 * boundary crossing
4123 */
4124
2648345f
MC		 4125 /* Fix for errata 23, can't cross 64kB boundary */
4126 if (!e1000_check_64k_bound(adapter,
4127 (void *)(unsigned long)buffer_info->dma,
4128 adapter->rx_buffer_len)) {
4129 DPRINTK(RX_ERR, ERR,
4130 "dma align check failed: %u bytes at %p\n",
4131 adapter->rx_buffer_len,
4132 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4133 dev_kfree_skb(skb);
4134 buffer_info->skb = NULL;
4135
2648345f 4136 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4137 adapter->rx_buffer_len,
4138 PCI_DMA_FROMDEVICE);
679be3ba 4139 buffer_info->dma = 0;
1da177e4 4140
edbbb3ca 4141 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4142 break; /* while !buffer_info->skb */
4143 }
1da177e4
LT		 4144 rx_desc = E1000_RX_DESC(*rx_ring, i);
4145 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4146
96838a40
JB		 4147 if (unlikely(++i == rx_ring->count))
4148 i = 0;
1da177e4
LT		 4149 buffer_info = &rx_ring->buffer_info[i];
4150 }
4151
b92ff8ee
JB		 4152 if (likely(rx_ring->next_to_use != i)) {
4153 rx_ring->next_to_use = i;
4154 if (unlikely(i-- == 0))
4155 i = (rx_ring->count - 1);
4156
4157 /* Force memory writes to complete before letting h/w
4158 * know there are new descriptors to fetch. (Only
4159 * applicable for weak-ordered memory model archs,
4160 * such as IA-64). */
4161 wmb();
1dc32918 4162 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4163 }
1da177e4
LT		 4164}
4165
4166/**
4167 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4168 * @adapter:
4169 **/
4170
64798845 4171static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4172{
1dc32918 4173 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4174 u16 phy_status;
4175 u16 phy_ctrl;
1da177e4 4176
1dc32918
JP		 4177 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4178 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4179 return;
4180
96838a40 4181 if (adapter->smartspeed == 0) {
1da177e4
LT		 4182 /* If Master/Slave config fault is asserted twice,
4183 * we assume back-to-back */
1dc32918 4184 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4185 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4186 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4187 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4188 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4189 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4190 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4191 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4192 phy_ctrl);
4193 adapter->smartspeed++;
1dc32918
JP		 4194 if (!e1000_phy_setup_autoneg(hw) &&
4195 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4196 &phy_ctrl)) {
4197 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4198 MII_CR_RESTART_AUTO_NEG);
1dc32918 4199 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4200 phy_ctrl);
4201 }
4202 }
4203 return;
96838a40 4204 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4205 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4206 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4207 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4208 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4209 if (!e1000_phy_setup_autoneg(hw) &&
4210 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4211 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4212 MII_CR_RESTART_AUTO_NEG);
1dc32918 4213 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4214 }
4215 }
4216 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4217 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4218 adapter->smartspeed = 0;
4219}
4220
4221/**
4222 * e1000_ioctl -
4223 * @netdev:
4224 * @ifreq:
4225 * @cmd:
4226 **/
4227
64798845 4228static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4229{
4230 switch (cmd) {
4231 case SIOCGMIIPHY:
4232 case SIOCGMIIREG:
4233 case SIOCSMIIREG:
4234 return e1000_mii_ioctl(netdev, ifr, cmd);
4235 default:
4236 return -EOPNOTSUPP;
4237 }
4238}
4239
4240/**
4241 * e1000_mii_ioctl -
4242 * @netdev:
4243 * @ifreq:
4244 * @cmd:
4245 **/
4246
64798845
JP		 4247static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4248 int cmd)
1da177e4 4249{
60490fe0 4250 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4251 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4252 struct mii_ioctl_data *data = if_mii(ifr);
4253 int retval;
406874a7
JP		 4254 u16 mii_reg;
4255 u16 spddplx;
97876fc6 4256 unsigned long flags;
1da177e4 4257
1dc32918 4258 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4259 return -EOPNOTSUPP;
4260
4261 switch (cmd) {
4262 case SIOCGMIIPHY:
1dc32918 4263 data->phy_id = hw->phy_addr;
1da177e4
LT		 4264 break;
4265 case SIOCGMIIREG:
97876fc6 4266 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4267 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4268 &data->val_out)) {
4269 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4270 return -EIO;
97876fc6
MC		 4271 }
4272 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4273 break;
4274 case SIOCSMIIREG:
96838a40 4275 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4276 return -EFAULT;
4277 mii_reg = data->val_in;
97876fc6 4278 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4279 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4280 mii_reg)) {
4281 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4282 return -EIO;
97876fc6 4283 }
f0163ac4 4284 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4285 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4286 switch (data->reg_num) {
4287 case PHY_CTRL:
96838a40 4288 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4289 break;
96838a40 4290 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4291 hw->autoneg = 1;
4292 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4293 } else {
4294 if (mii_reg & 0x40)
4295 spddplx = SPEED_1000;
4296 else if (mii_reg & 0x2000)
4297 spddplx = SPEED_100;
4298 else
4299 spddplx = SPEED_10;
4300 spddplx += (mii_reg & 0x100)
cb764326
JK		 4301 ? DUPLEX_FULL :
4302 DUPLEX_HALF;
1da177e4
LT		 4303 retval = e1000_set_spd_dplx(adapter,
4304 spddplx);
f0163ac4 4305 if (retval)
1da177e4
LT		 4306 return retval;
4307 }
2db10a08
AK		 4308 if (netif_running(adapter->netdev))
4309 e1000_reinit_locked(adapter);
4310 else
1da177e4
LT		 4311 e1000_reset(adapter);
4312 break;
4313 case M88E1000_PHY_SPEC_CTRL:
4314 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4315 if (e1000_phy_reset(hw))
1da177e4
LT		 4316 return -EIO;
4317 break;
4318 }
4319 } else {
4320 switch (data->reg_num) {
4321 case PHY_CTRL:
96838a40 4322 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4323 break;
2db10a08
AK		 4324 if (netif_running(adapter->netdev))
4325 e1000_reinit_locked(adapter);
4326 else
1da177e4
LT		 4327 e1000_reset(adapter);
4328 break;
4329 }
4330 }
4331 break;
4332 default:
4333 return -EOPNOTSUPP;
4334 }
4335 return E1000_SUCCESS;
4336}
4337
64798845 4338void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4339{
4340 struct e1000_adapter *adapter = hw->back;
2648345f 4341 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4342
96838a40 4343 if (ret_val)
2648345f 4344 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4345}
4346
64798845 4347void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4348{
4349 struct e1000_adapter *adapter = hw->back;
4350
4351 pci_clear_mwi(adapter->pdev);
4352}
4353
64798845 4354int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4355{
4356 struct e1000_adapter *adapter = hw->back;
4357 return pcix_get_mmrbc(adapter->pdev);
4358}
4359
64798845 4360void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4361{
4362 struct e1000_adapter *adapter = hw->back;
4363 pcix_set_mmrbc(adapter->pdev, mmrbc);
4364}
4365
64798845 4366void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4367{
4368 outl(value, port);
4369}
4370
64798845
JP		 4371static void e1000_vlan_rx_register(struct net_device *netdev,
4372 struct vlan_group *grp)
1da177e4 4373{
60490fe0 4374 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4375 struct e1000_hw *hw = &adapter->hw;
406874a7 4376 u32 ctrl, rctl;
1da177e4 4377
9150b76a
JB		 4378 if (!test_bit(__E1000_DOWN, &adapter->flags))
4379 e1000_irq_disable(adapter);
1da177e4
LT		 4380 adapter->vlgrp = grp;
4381
96838a40 4382 if (grp) {
1da177e4 4383 /* enable VLAN tag insert/strip */
1dc32918 4384 ctrl = er32(CTRL);
1da177e4 4385 ctrl |= E1000_CTRL_VME;
1dc32918 4386 ew32(CTRL, ctrl);
1da177e4 4387
1532ecea
JB		 4388 /* enable VLAN receive filtering */
4389 rctl = er32(RCTL);
4390 rctl &= ~E1000_RCTL_CFIEN;
4391 if (!(netdev->flags & IFF_PROMISC))
4392 rctl |= E1000_RCTL_VFE;
4393 ew32(RCTL, rctl);
4394 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4395 } else {
4396 /* disable VLAN tag insert/strip */
1dc32918 4397 ctrl = er32(CTRL);
1da177e4 4398 ctrl &= ~E1000_CTRL_VME;
1dc32918 4399 ew32(CTRL, ctrl);
1da177e4 4400
1532ecea
JB		 4401 /* disable VLAN receive filtering */
4402 rctl = er32(RCTL);
4403 rctl &= ~E1000_RCTL_VFE;
4404 ew32(RCTL, rctl);
fd38d7a0 4405
1532ecea 4406 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
120a5d0d 4407 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1532ecea 4408 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
cd94dd0b 4409 }
1da177e4
LT		 4410 }
4411
9150b76a
JB		 4412 if (!test_bit(__E1000_DOWN, &adapter->flags))
4413 e1000_irq_enable(adapter);
1da177e4
LT		 4414}
4415
64798845 4416static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4417{
60490fe0 4418 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4419 struct e1000_hw *hw = &adapter->hw;
406874a7 4420 u32 vfta, index;
96838a40 4421
1dc32918 4422 if ((hw->mng_cookie.status &
96838a40
JB		 4423 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4424 (vid == adapter->mng_vlan_id))
2d7edb92 4425 return;
1da177e4
LT		 4426 /* add VID to filter table */
4427 index = (vid >> 5) & 0x7F;
1dc32918 4428 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4429 vfta |= (1 << (vid & 0x1F));
1dc32918 4430 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4431}
4432
64798845 4433static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4434{
60490fe0 4435 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4436 struct e1000_hw *hw = &adapter->hw;
406874a7 4437 u32 vfta, index;
1da177e4 4438
9150b76a
JB		 4439 if (!test_bit(__E1000_DOWN, &adapter->flags))
4440 e1000_irq_disable(adapter);
5c15bdec 4441 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4442 if (!test_bit(__E1000_DOWN, &adapter->flags))
4443 e1000_irq_enable(adapter);
1da177e4
LT		 4444
4445 /* remove VID from filter table */
4446 index = (vid >> 5) & 0x7F;
1dc32918 4447 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4448 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4449 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4450}
4451
64798845 4452static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4453{
4454 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4455
96838a40 4456 if (adapter->vlgrp) {
406874a7 4457 u16 vid;
96838a40 4458 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4459 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4460 continue;
4461 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4462 }
4463 }
4464}
4465
64798845 4466int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4467{
1dc32918
JP		 4468 struct e1000_hw *hw = &adapter->hw;
4469
4470 hw->autoneg = 0;
1da177e4 4471
6921368f 4472 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4473 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4474 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4475 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4476 return -EINVAL;
4477 }
4478
96838a40 4479 switch (spddplx) {
1da177e4 4480 case SPEED_10 + DUPLEX_HALF:
1dc32918 4481 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4482 break;
4483 case SPEED_10 + DUPLEX_FULL:
1dc32918 4484 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4485 break;
4486 case SPEED_100 + DUPLEX_HALF:
1dc32918 4487 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4488 break;
4489 case SPEED_100 + DUPLEX_FULL:
1dc32918 4490 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4491 break;
4492 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4493 hw->autoneg = 1;
4494 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4495 break;
4496 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4497 default:
2648345f 4498 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4499 return -EINVAL;
4500 }
4501 return 0;
4502}
4503
b43fcd7d 4504static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4505{
4506 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4507 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4508 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4509 u32 ctrl, ctrl_ext, rctl, status;
4510 u32 wufc = adapter->wol;
6fdfef16 4511#ifdef CONFIG_PM
240b1710 4512 int retval = 0;
6fdfef16 4513#endif
1da177e4
LT		 4514
4515 netif_device_detach(netdev);
4516
2db10a08
AK		 4517 if (netif_running(netdev)) {
4518 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4519 e1000_down(adapter);
2db10a08 4520 }
1da177e4 4521
2f82665f 4522#ifdef CONFIG_PM
1d33e9c6 4523 retval = pci_save_state(pdev);
2f82665f
JB		 4524 if (retval)
4525 return retval;
4526#endif
4527
1dc32918 4528 status = er32(STATUS);
96838a40 4529 if (status & E1000_STATUS_LU)
1da177e4
LT		 4530 wufc &= ~E1000_WUFC_LNKC;
4531
96838a40 4532 if (wufc) {
1da177e4 4533 e1000_setup_rctl(adapter);
db0ce50d 4534 e1000_set_rx_mode(netdev);
1da177e4
LT		 4535
4536 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4537 if (wufc & E1000_WUFC_MC) {
1dc32918 4538 rctl = er32(RCTL);
1da177e4 4539 rctl |= E1000_RCTL_MPE;
1dc32918 4540 ew32(RCTL, rctl);
1da177e4
LT		 4541 }
4542
1dc32918
JP		 4543 if (hw->mac_type >= e1000_82540) {
4544 ctrl = er32(CTRL);
1da177e4
LT		 4545 /* advertise wake from D3Cold */
4546 #define E1000_CTRL_ADVD3WUC 0x00100000
4547 /* phy power management enable */
4548 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4549 ctrl |= E1000_CTRL_ADVD3WUC |
4550 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4551 ew32(CTRL, ctrl);
1da177e4
LT		 4552 }
4553
1dc32918 4554 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4555 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4556 /* keep the laser running in D3 */
1dc32918 4557 ctrl_ext = er32(CTRL_EXT);
1da177e4 4558 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4559 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4560 }
4561
1dc32918
JP		 4562 ew32(WUC, E1000_WUC_PME_EN);
4563 ew32(WUFC, wufc);
1da177e4 4564 } else {
1dc32918
JP		 4565 ew32(WUC, 0);
4566 ew32(WUFC, 0);
1da177e4
LT		 4567 }
4568
0fccd0e9
JG		 4569 e1000_release_manageability(adapter);
4570
b43fcd7d
RW		 4571 *enable_wake = !!wufc;
4572
0fccd0e9 4573 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4574 if (adapter->en_mng_pt)
4575 *enable_wake = true;
1da177e4 4576
edd106fc
AK		 4577 if (netif_running(netdev))
4578 e1000_free_irq(adapter);
4579
1da177e4 4580 pci_disable_device(pdev);
240b1710 4581
1da177e4
LT		 4582 return 0;
4583}
4584
2f82665f 4585#ifdef CONFIG_PM
b43fcd7d
RW		 4586static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4587{
4588 int retval;
4589 bool wake;
4590
4591 retval = __e1000_shutdown(pdev, &wake);
4592 if (retval)
4593 return retval;
4594
4595 if (wake) {
4596 pci_prepare_to_sleep(pdev);
4597 } else {
4598 pci_wake_from_d3(pdev, false);
4599 pci_set_power_state(pdev, PCI_D3hot);
4600 }
4601
4602 return 0;
4603}
4604
64798845 4605static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4606{
4607 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4608 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4609 struct e1000_hw *hw = &adapter->hw;
406874a7 4610 u32 err;
1da177e4 4611
d0e027db 4612 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4613 pci_restore_state(pdev);
dbb5aaeb 4614 pci_save_state(pdev);
81250297
TI		 4615
4616 if (adapter->need_ioport)
4617 err = pci_enable_device(pdev);
4618 else
4619 err = pci_enable_device_mem(pdev);
c7be73bc 4620 if (err) {
3d1dd8cb
AK		 4621 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4622 return err;
4623 }
a4cb847d 4624 pci_set_master(pdev);
1da177e4 4625
d0e027db
AK		 4626 pci_enable_wake(pdev, PCI_D3hot, 0);
4627 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4628
c7be73bc
JP		 4629 if (netif_running(netdev)) {
4630 err = e1000_request_irq(adapter);
4631 if (err)
4632 return err;
4633 }
edd106fc
AK		 4634
4635 e1000_power_up_phy(adapter);
1da177e4 4636 e1000_reset(adapter);
1dc32918 4637 ew32(WUS, ~0);
1da177e4 4638
0fccd0e9
JG		 4639 e1000_init_manageability(adapter);
4640
96838a40 4641 if (netif_running(netdev))
1da177e4
LT		 4642 e1000_up(adapter);
4643
4644 netif_device_attach(netdev);
4645
1da177e4
LT		 4646 return 0;
4647}
4648#endif
c653e635
AK		 4649
4650static void e1000_shutdown(struct pci_dev *pdev)
4651{
b43fcd7d
RW		 4652 bool wake;
4653
4654 __e1000_shutdown(pdev, &wake);
4655
4656 if (system_state == SYSTEM_POWER_OFF) {
4657 pci_wake_from_d3(pdev, wake);
4658 pci_set_power_state(pdev, PCI_D3hot);
4659 }
c653e635
AK		 4660}
4661
1da177e4
LT		 4662#ifdef CONFIG_NET_POLL_CONTROLLER
4663/*
4664 * Polling 'interrupt' - used by things like netconsole to send skbs
4665 * without having to re-enable interrupts. It's not called while
4666 * the interrupt routine is executing.
4667 */
64798845 4668static void e1000_netpoll(struct net_device *netdev)
1da177e4 4669{
60490fe0 4670 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4671
1da177e4 4672 disable_irq(adapter->pdev->irq);
7d12e780 4673 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4674 enable_irq(adapter->pdev->irq);
4675}
4676#endif
4677
9026729b
AK		 4678/**
4679 * e1000_io_error_detected - called when PCI error is detected
4680 * @pdev: Pointer to PCI device
120a5d0d 4681 * @state: The current pci connection state
9026729b
AK		 4682 *
4683 * This function is called after a PCI bus error affecting
4684 * this device has been detected.
4685 */
64798845
JP		 4686static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4687 pci_channel_state_t state)
9026729b
AK		 4688{
4689 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4690 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4691
4692 netif_device_detach(netdev);
4693
eab63302
AD		 4694 if (state == pci_channel_io_perm_failure)
4695 return PCI_ERS_RESULT_DISCONNECT;
4696
9026729b
AK		 4697 if (netif_running(netdev))
4698 e1000_down(adapter);
72e8d6bb 4699 pci_disable_device(pdev);
9026729b
AK		 4700
4701 /* Request a slot slot reset. */
4702 return PCI_ERS_RESULT_NEED_RESET;
4703}
4704
4705/**
4706 * e1000_io_slot_reset - called after the pci bus has been reset.
4707 * @pdev: Pointer to PCI device
4708 *
4709 * Restart the card from scratch, as if from a cold-boot. Implementation
4710 * resembles the first-half of the e1000_resume routine.
4711 */
4712static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4713{
4714 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4715 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4716 struct e1000_hw *hw = &adapter->hw;
81250297 4717 int err;
9026729b 4718
81250297
TI		 4719 if (adapter->need_ioport)
4720 err = pci_enable_device(pdev);
4721 else
4722 err = pci_enable_device_mem(pdev);
4723 if (err) {
9026729b
AK		 4724 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4725 return PCI_ERS_RESULT_DISCONNECT;
4726 }
4727 pci_set_master(pdev);
4728
dbf38c94
LV		 4729 pci_enable_wake(pdev, PCI_D3hot, 0);
4730 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4731
9026729b 4732 e1000_reset(adapter);
1dc32918 4733 ew32(WUS, ~0);
9026729b
AK		 4734
4735 return PCI_ERS_RESULT_RECOVERED;
4736}
4737
4738/**
4739 * e1000_io_resume - called when traffic can start flowing again.
4740 * @pdev: Pointer to PCI device
4741 *
4742 * This callback is called when the error recovery driver tells us that
4743 * its OK to resume normal operation. Implementation resembles the
4744 * second-half of the e1000_resume routine.
4745 */
4746static void e1000_io_resume(struct pci_dev *pdev)
4747{
4748 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4749 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4750
4751 e1000_init_manageability(adapter);
9026729b
AK		 4752
4753 if (netif_running(netdev)) {
4754 if (e1000_up(adapter)) {
4755 printk("e1000: can't bring device back up after reset\n");
4756 return;
4757 }
4758 }
4759
4760 netif_device_attach(netdev);
9026729b
AK		 4761}
4762
1da177e4 4763/* e1000_main.c */
Clone of davem's net-next-2.6 tree