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e1000: 3 new driver stats for managability testing
[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
25006ac6 39#define DRV_VERSION "7.3.15-k2"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
fc2307d0
AK		 107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
1da177e4
LT		 110 /* required last entry */
111 {0,}
112};
113
114MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
35574764
NN		 116int e1000_up(struct e1000_adapter *adapter);
117void e1000_down(struct e1000_adapter *adapter);
118void e1000_reinit_locked(struct e1000_adapter *adapter);
119void e1000_reset(struct e1000_adapter *adapter);
120int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 125static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 126 struct e1000_tx_ring *txdr);
3ad2cc67 127static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 128 struct e1000_rx_ring *rxdr);
3ad2cc67 129static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 130 struct e1000_tx_ring *tx_ring);
3ad2cc67 131static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 132 struct e1000_rx_ring *rx_ring);
133void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 134
135static int e1000_init_module(void);
136static void e1000_exit_module(void);
137static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 139static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 140static int e1000_sw_init(struct e1000_adapter *adapter);
141static int e1000_open(struct net_device *netdev);
142static int e1000_close(struct net_device *netdev);
143static void e1000_configure_tx(struct e1000_adapter *adapter);
144static void e1000_configure_rx(struct e1000_adapter *adapter);
145static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 146static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 152static void e1000_set_multi(struct net_device *netdev);
153static void e1000_update_phy_info(unsigned long data);
154static void e1000_watchdog(unsigned long data);
1da177e4
LT		 155static void e1000_82547_tx_fifo_stall(unsigned long data);
156static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 160static irqreturn_t e1000_intr(int irq, void *data);
9ac98284
JB		 161#ifdef CONFIG_PCI_MSI
162static irqreturn_t e1000_intr_msi(int irq, void *data);
163#endif
581d708e
MC		 164static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
1da177e4 166#ifdef CONFIG_E1000_NAPI
581d708e 167static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 169 struct e1000_rx_ring *rx_ring,
1da177e4 170 int *work_done, int work_to_do);
2d7edb92 171static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 172 struct e1000_rx_ring *rx_ring,
2d7edb92 173 int *work_done, int work_to_do);
1da177e4 174#else
581d708e
MC		 175static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
1da177e4 179#endif
581d708e 180static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
581d708e 183static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
1da177e4
LT		 186static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
35574764 189void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 190static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192static void e1000_tx_timeout(struct net_device *dev);
65f27f38 193static void e1000_reset_task(struct work_struct *work);
1da177e4 194static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 195static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
1da177e4
LT		 197
198static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
977e74b5 203static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 204#ifdef CONFIG_PM
1da177e4
LT		 205static int e1000_resume(struct pci_dev *pdev);
206#endif
c653e635 207static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 208
209#ifdef CONFIG_NET_POLL_CONTROLLER
210/* for netdump / net console */
211static void e1000_netpoll (struct net_device *netdev);
212#endif
213
35574764
NN		 214extern void e1000_check_options(struct e1000_adapter *adapter);
215
1f753861
JB		 216#define COPYBREAK_DEFAULT 256
217static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
218module_param(copybreak, uint, 0644);
219MODULE_PARM_DESC(copybreak,
220 "Maximum size of packet that is copied to a new buffer on receive");
221
9026729b
AK		 222static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
223 pci_channel_state_t state);
224static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
225static void e1000_io_resume(struct pci_dev *pdev);
226
227static struct pci_error_handlers e1000_err_handler = {
228 .error_detected = e1000_io_error_detected,
229 .slot_reset = e1000_io_slot_reset,
230 .resume = e1000_io_resume,
231};
24025e4e 232
1da177e4
LT		 233static struct pci_driver e1000_driver = {
234 .name = e1000_driver_name,
235 .id_table = e1000_pci_tbl,
236 .probe = e1000_probe,
237 .remove = __devexit_p(e1000_remove),
c4e24f01 238#ifdef CONFIG_PM
1da177e4 239 /* Power Managment Hooks */
1da177e4 240 .suspend = e1000_suspend,
c653e635 241 .resume = e1000_resume,
1da177e4 242#endif
9026729b
AK		 243 .shutdown = e1000_shutdown,
244 .err_handler = &e1000_err_handler
1da177e4
LT		 245};
246
247MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
248MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
249MODULE_LICENSE("GPL");
250MODULE_VERSION(DRV_VERSION);
251
252static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
253module_param(debug, int, 0);
254MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
255
256/**
257 * e1000_init_module - Driver Registration Routine
258 *
259 * e1000_init_module is the first routine called when the driver is
260 * loaded. All it does is register with the PCI subsystem.
261 **/
262
263static int __init
264e1000_init_module(void)
265{
266 int ret;
267 printk(KERN_INFO "%s - version %s\n",
268 e1000_driver_string, e1000_driver_version);
269
270 printk(KERN_INFO "%s\n", e1000_copyright);
271
29917620 272 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 273 if (copybreak != COPYBREAK_DEFAULT) {
274 if (copybreak == 0)
275 printk(KERN_INFO "e1000: copybreak disabled\n");
276 else
277 printk(KERN_INFO "e1000: copybreak enabled for "
278 "packets <= %u bytes\n", copybreak);
279 }
1da177e4
LT		 280 return ret;
281}
282
283module_init(e1000_init_module);
284
285/**
286 * e1000_exit_module - Driver Exit Cleanup Routine
287 *
288 * e1000_exit_module is called just before the driver is removed
289 * from memory.
290 **/
291
292static void __exit
293e1000_exit_module(void)
294{
1da177e4
LT		 295 pci_unregister_driver(&e1000_driver);
296}
297
298module_exit(e1000_exit_module);
299
2db10a08
AK		 300static int e1000_request_irq(struct e1000_adapter *adapter)
301{
302 struct net_device *netdev = adapter->netdev;
303 int flags, err = 0;
304
c0bc8721 305 flags = IRQF_SHARED;
2db10a08 306#ifdef CONFIG_PCI_MSI
9ac98284 307 if (adapter->hw.mac_type >= e1000_82571) {
2db10a08
AK		 308 adapter->have_msi = TRUE;
309 if ((err = pci_enable_msi(adapter->pdev))) {
310 DPRINTK(PROBE, ERR,
311 "Unable to allocate MSI interrupt Error: %d\n", err);
312 adapter->have_msi = FALSE;
313 }
314 }
9ac98284 315 if (adapter->have_msi) {
61ef5c00 316 flags &= ~IRQF_SHARED;
9ac98284
JB		 317 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
318 netdev->name, netdev);
319 if (err)
320 DPRINTK(PROBE, ERR,
321 "Unable to allocate interrupt Error: %d\n", err);
322 } else
2db10a08
AK		 323#endif
324 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
325 netdev->name, netdev)))
326 DPRINTK(PROBE, ERR,
327 "Unable to allocate interrupt Error: %d\n", err);
328
329 return err;
330}
331
332static void e1000_free_irq(struct e1000_adapter *adapter)
333{
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338#ifdef CONFIG_PCI_MSI
339 if (adapter->have_msi)
340 pci_disable_msi(adapter->pdev);
341#endif
342}
343
1da177e4
LT		 344/**
345 * e1000_irq_disable - Mask off interrupt generation on the NIC
346 * @adapter: board private structure
347 **/
348
e619d523 349static void
1da177e4
LT		 350e1000_irq_disable(struct e1000_adapter *adapter)
351{
352 atomic_inc(&adapter->irq_sem);
353 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
354 E1000_WRITE_FLUSH(&adapter->hw);
355 synchronize_irq(adapter->pdev->irq);
356}
357
358/**
359 * e1000_irq_enable - Enable default interrupt generation settings
360 * @adapter: board private structure
361 **/
362
e619d523 363static void
1da177e4
LT		 364e1000_irq_enable(struct e1000_adapter *adapter)
365{
96838a40 366 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 367 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
368 E1000_WRITE_FLUSH(&adapter->hw);
369 }
370}
3ad2cc67
AB		 371
372static void
2d7edb92
MC		 373e1000_update_mng_vlan(struct e1000_adapter *adapter)
374{
375 struct net_device *netdev = adapter->netdev;
376 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
377 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 378 if (adapter->vlgrp) {
379 if (!adapter->vlgrp->vlan_devices[vid]) {
380 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
382 e1000_vlan_rx_add_vid(netdev, vid);
383 adapter->mng_vlan_id = vid;
384 } else
385 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 386
387 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
388 (vid != old_vid) &&
2d7edb92
MC		 389 !adapter->vlgrp->vlan_devices[old_vid])
390 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 391 } else
392 adapter->mng_vlan_id = vid;
2d7edb92
MC		 393 }
394}
b55ccb35
JK		 395
396/**
397 * e1000_release_hw_control - release control of the h/w to f/w
398 * @adapter: address of board private structure
399 *
400 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
401 * For ASF and Pass Through versions of f/w this means that the
402 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 403 * of the f/w this means that the network i/f is closed.
76c224bc 404 *
b55ccb35
JK		 405 **/
406
e619d523 407static void
b55ccb35
JK		 408e1000_release_hw_control(struct e1000_adapter *adapter)
409{
410 uint32_t ctrl_ext;
411 uint32_t swsm;
cd94dd0b 412 uint32_t extcnf;
b55ccb35
JK		 413
414 /* Let firmware taken over control of h/w */
415 switch (adapter->hw.mac_type) {
416 case e1000_82571:
417 case e1000_82572:
4cc15f54 418 case e1000_80003es2lan:
b55ccb35
JK		 419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
422 break;
423 case e1000_82573:
424 swsm = E1000_READ_REG(&adapter->hw, SWSM);
425 E1000_WRITE_REG(&adapter->hw, SWSM,
426 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 427 case e1000_ich8lan:
428 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
429 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
430 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
431 break;
b55ccb35
JK		 432 default:
433 break;
434 }
435}
436
437/**
438 * e1000_get_hw_control - get control of the h/w from f/w
439 * @adapter: address of board private structure
440 *
441 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 442 * For ASF and Pass Through versions of f/w this means that
443 * the driver is loaded. For AMT version (only with 82573)
90fb5135 444 * of the f/w this means that the network i/f is open.
76c224bc 445 *
b55ccb35
JK		 446 **/
447
e619d523 448static void
b55ccb35
JK		 449e1000_get_hw_control(struct e1000_adapter *adapter)
450{
451 uint32_t ctrl_ext;
452 uint32_t swsm;
cd94dd0b 453 uint32_t extcnf;
90fb5135 454
b55ccb35
JK		 455 /* Let firmware know the driver has taken over */
456 switch (adapter->hw.mac_type) {
457 case e1000_82571:
458 case e1000_82572:
4cc15f54 459 case e1000_80003es2lan:
b55ccb35
JK		 460 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
461 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
462 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
463 break;
464 case e1000_82573:
465 swsm = E1000_READ_REG(&adapter->hw, SWSM);
466 E1000_WRITE_REG(&adapter->hw, SWSM,
467 swsm | E1000_SWSM_DRV_LOAD);
468 break;
cd94dd0b
AK		 469 case e1000_ich8lan:
470 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
471 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
472 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
473 break;
b55ccb35
JK		 474 default:
475 break;
476 }
477}
478
0fccd0e9
JG		 479static void
480e1000_init_manageability(struct e1000_adapter *adapter)
481{
482 if (adapter->en_mng_pt) {
483 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
484
485 /* disable hardware interception of ARP */
486 manc &= ~(E1000_MANC_ARP_EN);
487
488 /* enable receiving management packets to the host */
489 /* this will probably generate destination unreachable messages
490 * from the host OS, but the packets will be handled on SMBUS */
491 if (adapter->hw.has_manc2h) {
492 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
493
494 manc |= E1000_MANC_EN_MNG2HOST;
495#define E1000_MNG2HOST_PORT_623 (1 << 5)
496#define E1000_MNG2HOST_PORT_664 (1 << 6)
497 manc2h |= E1000_MNG2HOST_PORT_623;
498 manc2h |= E1000_MNG2HOST_PORT_664;
499 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
500 }
501
502 E1000_WRITE_REG(&adapter->hw, MANC, manc);
503 }
504}
505
506static void
507e1000_release_manageability(struct e1000_adapter *adapter)
508{
509 if (adapter->en_mng_pt) {
510 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
511
512 /* re-enable hardware interception of ARP */
513 manc |= E1000_MANC_ARP_EN;
514
515 if (adapter->hw.has_manc2h)
516 manc &= ~E1000_MANC_EN_MNG2HOST;
517
518 /* don't explicitly have to mess with MANC2H since
519 * MANC has an enable disable that gates MANC2H */
520
521 E1000_WRITE_REG(&adapter->hw, MANC, manc);
522 }
523}
524
1da177e4
LT		 525int
526e1000_up(struct e1000_adapter *adapter)
527{
528 struct net_device *netdev = adapter->netdev;
2db10a08 529 int i;
1da177e4
LT		 530
531 /* hardware has been reset, we need to reload some things */
532
1da177e4
LT		 533 e1000_set_multi(netdev);
534
535 e1000_restore_vlan(adapter);
0fccd0e9 536 e1000_init_manageability(adapter);
1da177e4
LT		 537
538 e1000_configure_tx(adapter);
539 e1000_setup_rctl(adapter);
540 e1000_configure_rx(adapter);
72d64a43
JK		 541 /* call E1000_DESC_UNUSED which always leaves
542 * at least 1 descriptor unused to make sure
543 * next_to_use != next_to_clean */
f56799ea 544 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 545 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 546 adapter->alloc_rx_buf(adapter, ring,
547 E1000_DESC_UNUSED(ring));
f56799ea 548 }
1da177e4 549
7bfa4816
JK		 550 adapter->tx_queue_len = netdev->tx_queue_len;
551
1da177e4
LT		 552#ifdef CONFIG_E1000_NAPI
553 netif_poll_enable(netdev);
554#endif
5de55624
MC		 555 e1000_irq_enable(adapter);
556
1314bbf3
AK		 557 clear_bit(__E1000_DOWN, &adapter->flags);
558
559 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1da177e4
LT		 560 return 0;
561}
562
79f05bf0
AK		 563/**
564 * e1000_power_up_phy - restore link in case the phy was powered down
565 * @adapter: address of board private structure
566 *
567 * The phy may be powered down to save power and turn off link when the
568 * driver is unloaded and wake on lan is not enabled (among others)
569 * *** this routine MUST be followed by a call to e1000_reset ***
570 *
571 **/
572
d658266e 573void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 574{
575 uint16_t mii_reg = 0;
576
577 /* Just clear the power down bit to wake the phy back up */
578 if (adapter->hw.media_type == e1000_media_type_copper) {
579 /* according to the manual, the phy will retain its
580 * settings across a power-down/up cycle */
581 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
582 mii_reg &= ~MII_CR_POWER_DOWN;
583 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
584 }
585}
586
587static void e1000_power_down_phy(struct e1000_adapter *adapter)
588{
61c2505f
BA		 589 /* Power down the PHY so no link is implied when interface is down *
590 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 591 * (a) WoL is enabled
592 * (b) AMT is active
593 * (c) SoL/IDER session is active */
594 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 595 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 596 uint16_t mii_reg = 0;
61c2505f
BA		 597
598 switch (adapter->hw.mac_type) {
599 case e1000_82540:
600 case e1000_82545:
601 case e1000_82545_rev_3:
602 case e1000_82546:
603 case e1000_82546_rev_3:
604 case e1000_82541:
605 case e1000_82541_rev_2:
606 case e1000_82547:
607 case e1000_82547_rev_2:
608 if (E1000_READ_REG(&adapter->hw, MANC) &
609 E1000_MANC_SMBUS_EN)
610 goto out;
611 break;
612 case e1000_82571:
613 case e1000_82572:
614 case e1000_82573:
615 case e1000_80003es2lan:
616 case e1000_ich8lan:
617 if (e1000_check_mng_mode(&adapter->hw) ||
618 e1000_check_phy_reset_block(&adapter->hw))
619 goto out;
620 break;
621 default:
622 goto out;
623 }
79f05bf0
AK		 624 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
625 mii_reg |= MII_CR_POWER_DOWN;
626 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
627 mdelay(1);
628 }
61c2505f
BA		 629out:
630 return;
79f05bf0
AK		 631}
632
1da177e4
LT		 633void
634e1000_down(struct e1000_adapter *adapter)
635{
636 struct net_device *netdev = adapter->netdev;
637
1314bbf3
AK		 638 /* signal that we're down so the interrupt handler does not
639 * reschedule our watchdog timer */
640 set_bit(__E1000_DOWN, &adapter->flags);
641
1da177e4 642 e1000_irq_disable(adapter);
c1605eb3 643
1da177e4
LT		 644 del_timer_sync(&adapter->tx_fifo_stall_timer);
645 del_timer_sync(&adapter->watchdog_timer);
646 del_timer_sync(&adapter->phy_info_timer);
647
648#ifdef CONFIG_E1000_NAPI
649 netif_poll_disable(netdev);
650#endif
7bfa4816 651 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 652 adapter->link_speed = 0;
653 adapter->link_duplex = 0;
654 netif_carrier_off(netdev);
655 netif_stop_queue(netdev);
656
657 e1000_reset(adapter);
581d708e
MC		 658 e1000_clean_all_tx_rings(adapter);
659 e1000_clean_all_rx_rings(adapter);
1da177e4 660}
1da177e4 661
2db10a08
AK		 662void
663e1000_reinit_locked(struct e1000_adapter *adapter)
664{
665 WARN_ON(in_interrupt());
666 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
667 msleep(1);
668 e1000_down(adapter);
669 e1000_up(adapter);
670 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 671}
672
673void
674e1000_reset(struct e1000_adapter *adapter)
675{
018ea44e 676 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
1125ecbc 677 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
018ea44e 678 boolean_t legacy_pba_adjust = FALSE;
1da177e4
LT		 679
680 /* Repartition Pba for greater than 9k mtu
681 * To take effect CTRL.RST is required.
682 */
683
2d7edb92 684 switch (adapter->hw.mac_type) {
018ea44e
BA		 685 case e1000_82542_rev2_0:
686 case e1000_82542_rev2_1:
687 case e1000_82543:
688 case e1000_82544:
689 case e1000_82540:
690 case e1000_82541:
691 case e1000_82541_rev_2:
692 legacy_pba_adjust = TRUE;
693 pba = E1000_PBA_48K;
694 break;
695 case e1000_82545:
696 case e1000_82545_rev_3:
697 case e1000_82546:
698 case e1000_82546_rev_3:
699 pba = E1000_PBA_48K;
700 break;
2d7edb92 701 case e1000_82547:
0e6ef3e0 702 case e1000_82547_rev_2:
018ea44e 703 legacy_pba_adjust = TRUE;
2d7edb92
MC		 704 pba = E1000_PBA_30K;
705 break;
868d5309
MC		 706 case e1000_82571:
707 case e1000_82572:
6418ecc6 708 case e1000_80003es2lan:
868d5309
MC		 709 pba = E1000_PBA_38K;
710 break;
2d7edb92 711 case e1000_82573:
018ea44e 712 pba = E1000_PBA_20K;
2d7edb92 713 break;
cd94dd0b
AK		 714 case e1000_ich8lan:
715 pba = E1000_PBA_8K;
018ea44e
BA		 716 case e1000_undefined:
717 case e1000_num_macs:
2d7edb92
MC		 718 break;
719 }
720
018ea44e
BA		 721 if (legacy_pba_adjust == TRUE) {
722 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
723 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 724
018ea44e
BA		 725 if (adapter->hw.mac_type == e1000_82547) {
726 adapter->tx_fifo_head = 0;
727 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
728 adapter->tx_fifo_size =
729 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
730 atomic_set(&adapter->tx_fifo_stall, 0);
731 }
732 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
733 /* adjust PBA for jumbo frames */
734 E1000_WRITE_REG(&adapter->hw, PBA, pba);
735
736 /* To maintain wire speed transmits, the Tx FIFO should be
737 * large enough to accomodate two full transmit packets,
738 * rounded up to the next 1KB and expressed in KB. Likewise,
739 * the Rx FIFO should be large enough to accomodate at least
740 * one full receive packet and is similarly rounded up and
741 * expressed in KB. */
742 pba = E1000_READ_REG(&adapter->hw, PBA);
743 /* upper 16 bits has Tx packet buffer allocation size in KB */
744 tx_space = pba >> 16;
745 /* lower 16 bits has Rx packet buffer allocation size in KB */
746 pba &= 0xffff;
747 /* don't include ethernet FCS because hardware appends/strips */
748 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
749 VLAN_TAG_SIZE;
750 min_tx_space = min_rx_space;
751 min_tx_space *= 2;
752 E1000_ROUNDUP(min_tx_space, 1024);
753 min_tx_space >>= 10;
754 E1000_ROUNDUP(min_rx_space, 1024);
755 min_rx_space >>= 10;
756
757 /* If current Tx allocation is less than the min Tx FIFO size,
758 * and the min Tx FIFO size is less than the current Rx FIFO
759 * allocation, take space away from current Rx allocation */
760 if (tx_space < min_tx_space &&
761 ((min_tx_space - tx_space) < pba)) {
762 pba = pba - (min_tx_space - tx_space);
763
764 /* PCI/PCIx hardware has PBA alignment constraints */
765 switch (adapter->hw.mac_type) {
766 case e1000_82545 ... e1000_82546_rev_3:
767 pba &= ~(E1000_PBA_8K - 1);
768 break;
769 default:
770 break;
771 }
772
773 /* if short on rx space, rx wins and must trump tx
774 * adjustment or use Early Receive if available */
775 if (pba < min_rx_space) {
776 switch (adapter->hw.mac_type) {
777 case e1000_82573:
778 /* ERT enabled in e1000_configure_rx */
779 break;
780 default:
781 pba = min_rx_space;
782 break;
783 }
784 }
785 }
1da177e4 786 }
2d7edb92 787
1da177e4
LT		 788 E1000_WRITE_REG(&adapter->hw, PBA, pba);
789
790 /* flow control settings */
f11b7f85
JK		 791 /* Set the FC high water mark to 90% of the FIFO size.
792 * Required to clear last 3 LSB */
793 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 794 /* We can't use 90% on small FIFOs because the remainder
795 * would be less than 1 full frame. In this case, we size
796 * it to allow at least a full frame above the high water
797 * mark. */
798 if (pba < E1000_PBA_16K)
799 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 800
801 adapter->hw.fc_high_water = fc_high_water_mark;
802 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 803 if (adapter->hw.mac_type == e1000_80003es2lan)
804 adapter->hw.fc_pause_time = 0xFFFF;
805 else
806 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 807 adapter->hw.fc_send_xon = 1;
808 adapter->hw.fc = adapter->hw.original_fc;
809
2d7edb92 810 /* Allow time for pending master requests to run */
1da177e4 811 e1000_reset_hw(&adapter->hw);
96838a40 812 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 813 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88 814
96838a40 815 if (e1000_init_hw(&adapter->hw))
1da177e4 816 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 817 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 818
819 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
820 if (adapter->hw.mac_type >= e1000_82544 &&
821 adapter->hw.mac_type <= e1000_82547_rev_2 &&
822 adapter->hw.autoneg == 1 &&
823 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
824 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
825 /* clear phy power management bit if we are in gig only mode,
826 * which if enabled will attempt negotiation to 100Mb, which
827 * can cause a loss of link at power off or driver unload */
828 ctrl &= ~E1000_CTRL_SWDPIN3;
829 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
830 }
831
1da177e4
LT		 832 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
833 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
834
835 e1000_reset_adaptive(&adapter->hw);
836 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 837
838 if (!adapter->smart_power_down &&
839 (adapter->hw.mac_type == e1000_82571 ||
840 adapter->hw.mac_type == e1000_82572)) {
841 uint16_t phy_data = 0;
842 /* speed up time to link by disabling smart power down, ignore
843 * the return value of this function because there is nothing
844 * different we would do if it failed */
845 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
846 &phy_data);
847 phy_data &= ~IGP02E1000_PM_SPD;
848 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
849 phy_data);
850 }
851
0fccd0e9 852 e1000_release_manageability(adapter);
1da177e4
LT		 853}
854
855/**
856 * e1000_probe - Device Initialization Routine
857 * @pdev: PCI device information struct
858 * @ent: entry in e1000_pci_tbl
859 *
860 * Returns 0 on success, negative on failure
861 *
862 * e1000_probe initializes an adapter identified by a pci_dev structure.
863 * The OS initialization, configuring of the adapter private structure,
864 * and a hardware reset occur.
865 **/
866
867static int __devinit
868e1000_probe(struct pci_dev *pdev,
869 const struct pci_device_id *ent)
870{
871 struct net_device *netdev;
872 struct e1000_adapter *adapter;
2d7edb92 873 unsigned long mmio_start, mmio_len;
cd94dd0b 874 unsigned long flash_start, flash_len;
2d7edb92 875
1da177e4 876 static int cards_found = 0;
120cd576 877 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 878 int i, err, pci_using_dac;
120cd576 879 uint16_t eeprom_data = 0;
1da177e4 880 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 881 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 882 return err;
883
cd94dd0b
AK		 884 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
885 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 886 pci_using_dac = 1;
887 } else {
cd94dd0b
AK		 888 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
889 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 890 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 891 goto err_dma;
1da177e4
LT		 892 }
893 pci_using_dac = 0;
894 }
895
96838a40 896 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 897 goto err_pci_reg;
1da177e4
LT		 898
899 pci_set_master(pdev);
900
6dd62ab0 901 err = -ENOMEM;
1da177e4 902 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 903 if (!netdev)
1da177e4 904 goto err_alloc_etherdev;
1da177e4
LT		 905
906 SET_MODULE_OWNER(netdev);
907 SET_NETDEV_DEV(netdev, &pdev->dev);
908
909 pci_set_drvdata(pdev, netdev);
60490fe0 910 adapter = netdev_priv(netdev);
1da177e4
LT		 911 adapter->netdev = netdev;
912 adapter->pdev = pdev;
913 adapter->hw.back = adapter;
914 adapter->msg_enable = (1 << debug) - 1;
915
916 mmio_start = pci_resource_start(pdev, BAR_0);
917 mmio_len = pci_resource_len(pdev, BAR_0);
918
6dd62ab0 919 err = -EIO;
1da177e4 920 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 921 if (!adapter->hw.hw_addr)
1da177e4 922 goto err_ioremap;
1da177e4 923
96838a40
JB		 924 for (i = BAR_1; i <= BAR_5; i++) {
925 if (pci_resource_len(pdev, i) == 0)
1da177e4 926 continue;
96838a40 927 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 928 adapter->hw.io_base = pci_resource_start(pdev, i);
929 break;
930 }
931 }
932
933 netdev->open = &e1000_open;
934 netdev->stop = &e1000_close;
935 netdev->hard_start_xmit = &e1000_xmit_frame;
936 netdev->get_stats = &e1000_get_stats;
937 netdev->set_multicast_list = &e1000_set_multi;
938 netdev->set_mac_address = &e1000_set_mac;
939 netdev->change_mtu = &e1000_change_mtu;
940 netdev->do_ioctl = &e1000_ioctl;
941 e1000_set_ethtool_ops(netdev);
942 netdev->tx_timeout = &e1000_tx_timeout;
943 netdev->watchdog_timeo = 5 * HZ;
944#ifdef CONFIG_E1000_NAPI
945 netdev->poll = &e1000_clean;
946 netdev->weight = 64;
947#endif
948 netdev->vlan_rx_register = e1000_vlan_rx_register;
949 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
950 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
951#ifdef CONFIG_NET_POLL_CONTROLLER
952 netdev->poll_controller = e1000_netpoll;
953#endif
0eb5a34c 954 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 955
956 netdev->mem_start = mmio_start;
957 netdev->mem_end = mmio_start + mmio_len;
958 netdev->base_addr = adapter->hw.io_base;
959
960 adapter->bd_number = cards_found;
961
962 /* setup the private structure */
963
96838a40 964 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 965 goto err_sw_init;
966
6dd62ab0 967 err = -EIO;
cd94dd0b
AK		 968 /* Flash BAR mapping must happen after e1000_sw_init
969 * because it depends on mac_type */
970 if ((adapter->hw.mac_type == e1000_ich8lan) &&
971 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
972 flash_start = pci_resource_start(pdev, 1);
973 flash_len = pci_resource_len(pdev, 1);
974 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 975 if (!adapter->hw.flash_address)
cd94dd0b 976 goto err_flashmap;
cd94dd0b
AK		 977 }
978
6dd62ab0 979 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 980 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
981
96838a40 982 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 983 netdev->features = NETIF_F_SG |
984 NETIF_F_HW_CSUM |
985 NETIF_F_HW_VLAN_TX |
986 NETIF_F_HW_VLAN_RX |
987 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 988 if (adapter->hw.mac_type == e1000_ich8lan)
989 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 990 }
991
992#ifdef NETIF_F_TSO
96838a40 993 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 994 (adapter->hw.mac_type != e1000_82547))
995 netdev->features |= NETIF_F_TSO;
2d7edb92 996
72f3ab74
JB		 997#ifdef CONFIG_DEBUG_SLAB
998 /* 82544's work arounds do not play nicely with DEBUG SLAB */
999 if (adapter->hw.mac_type == e1000_82544)
1000 netdev->features &= ~NETIF_F_TSO;
1001#endif
1002
87ca4e5b 1003#ifdef NETIF_F_TSO6
96838a40 1004 if (adapter->hw.mac_type > e1000_82547_rev_2)
87ca4e5b 1005 netdev->features |= NETIF_F_TSO6;
2d7edb92 1006#endif
1da177e4 1007#endif
96838a40 1008 if (pci_using_dac)
1da177e4
LT		 1009 netdev->features |= NETIF_F_HIGHDMA;
1010
76c224bc
AK		 1011 netdev->features |= NETIF_F_LLTX;
1012
2d7edb92
MC		 1013 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1014
cd94dd0b
AK		 1015 /* initialize eeprom parameters */
1016
1017 if (e1000_init_eeprom_params(&adapter->hw)) {
1018 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1019 goto err_eeprom;
cd94dd0b
AK		 1020 }
1021
96838a40 1022 /* before reading the EEPROM, reset the controller to
1da177e4 1023 * put the device in a known good starting state */
96838a40 1024
1da177e4
LT		 1025 e1000_reset_hw(&adapter->hw);
1026
1027 /* make sure the EEPROM is good */
1028
96838a40 1029 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 1030 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 1031 goto err_eeprom;
1032 }
1033
1034 /* copy the MAC address out of the EEPROM */
1035
96838a40 1036 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 1037 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1038 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 1039 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 1040
96838a40 1041 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 1042 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 1043 goto err_eeprom;
1044 }
1045
1da177e4
LT		 1046 e1000_get_bus_info(&adapter->hw);
1047
1048 init_timer(&adapter->tx_fifo_stall_timer);
1049 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1050 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1051
1052 init_timer(&adapter->watchdog_timer);
1053 adapter->watchdog_timer.function = &e1000_watchdog;
1054 adapter->watchdog_timer.data = (unsigned long) adapter;
1055
1da177e4
LT		 1056 init_timer(&adapter->phy_info_timer);
1057 adapter->phy_info_timer.function = &e1000_update_phy_info;
1058 adapter->phy_info_timer.data = (unsigned long) adapter;
1059
65f27f38 1060 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1061
1da177e4
LT		 1062 e1000_check_options(adapter);
1063
1064 /* Initial Wake on LAN setting
1065 * If APM wake is enabled in the EEPROM,
1066 * enable the ACPI Magic Packet filter
1067 */
1068
96838a40 1069 switch (adapter->hw.mac_type) {
1da177e4
LT		 1070 case e1000_82542_rev2_0:
1071 case e1000_82542_rev2_1:
1072 case e1000_82543:
1073 break;
1074 case e1000_82544:
1075 e1000_read_eeprom(&adapter->hw,
1076 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1077 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1078 break;
cd94dd0b
AK		 1079 case e1000_ich8lan:
1080 e1000_read_eeprom(&adapter->hw,
1081 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1082 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1083 break;
1da177e4
LT		 1084 case e1000_82546:
1085 case e1000_82546_rev_3:
fd803241 1086 case e1000_82571:
6418ecc6 1087 case e1000_80003es2lan:
96838a40 1088 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 1089 e1000_read_eeprom(&adapter->hw,
1090 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1091 break;
1092 }
1093 /* Fall Through */
1094 default:
1095 e1000_read_eeprom(&adapter->hw,
1096 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1097 break;
1098 }
96838a40 1099 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1100 adapter->eeprom_wol |= E1000_WUFC_MAG;
1101
1102 /* now that we have the eeprom settings, apply the special cases
1103 * where the eeprom may be wrong or the board simply won't support
1104 * wake on lan on a particular port */
1105 switch (pdev->device) {
1106 case E1000_DEV_ID_82546GB_PCIE:
1107 adapter->eeprom_wol = 0;
1108 break;
1109 case E1000_DEV_ID_82546EB_FIBER:
1110 case E1000_DEV_ID_82546GB_FIBER:
1111 case E1000_DEV_ID_82571EB_FIBER:
1112 /* Wake events only supported on port A for dual fiber
1113 * regardless of eeprom setting */
1114 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1115 adapter->eeprom_wol = 0;
1116 break;
1117 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1118 case E1000_DEV_ID_82571EB_QUAD_COPPER:
fc2307d0 1119 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
120cd576
JB		 1120 /* if quad port adapter, disable WoL on all but port A */
1121 if (global_quad_port_a != 0)
1122 adapter->eeprom_wol = 0;
1123 else
1124 adapter->quad_port_a = 1;
1125 /* Reset for multiple quad port adapters */
1126 if (++global_quad_port_a == 4)
1127 global_quad_port_a = 0;
1128 break;
1129 }
1130
1131 /* initialize the wol settings based on the eeprom settings */
1132 adapter->wol = adapter->eeprom_wol;
1da177e4 1133
fb3d47d4
JK		 1134 /* print bus type/speed/width info */
1135 {
1136 struct e1000_hw *hw = &adapter->hw;
1137 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1138 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1139 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1140 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1141 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1142 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1143 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1144 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1145 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1146 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1147 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1148 "32-bit"));
1149 }
1150
1151 for (i = 0; i < 6; i++)
1152 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1153
1da177e4
LT		 1154 /* reset the hardware with the new settings */
1155 e1000_reset(adapter);
1156
b55ccb35
JK		 1157 /* If the controller is 82573 and f/w is AMT, do not set
1158 * DRV_LOAD until the interface is up. For all other cases,
1159 * let the f/w know that the h/w is now under the control
1160 * of the driver. */
1161 if (adapter->hw.mac_type != e1000_82573 ||
1162 !e1000_check_mng_mode(&adapter->hw))
1163 e1000_get_hw_control(adapter);
2d7edb92 1164
1da177e4 1165 strcpy(netdev->name, "eth%d");
96838a40 1166 if ((err = register_netdev(netdev)))
1da177e4
LT		 1167 goto err_register;
1168
1314bbf3
AK		 1169 /* tell the stack to leave us alone until e1000_open() is called */
1170 netif_carrier_off(netdev);
1171 netif_stop_queue(netdev);
1172
1da177e4
LT		 1173 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1174
1175 cards_found++;
1176 return 0;
1177
1178err_register:
6dd62ab0
VA		 1179 e1000_release_hw_control(adapter);
1180err_eeprom:
1181 if (!e1000_check_phy_reset_block(&adapter->hw))
1182 e1000_phy_hw_reset(&adapter->hw);
1183
cd94dd0b
AK		 1184 if (adapter->hw.flash_address)
1185 iounmap(adapter->hw.flash_address);
1186err_flashmap:
6dd62ab0
VA		 1187#ifdef CONFIG_E1000_NAPI
1188 for (i = 0; i < adapter->num_rx_queues; i++)
1189 dev_put(&adapter->polling_netdev[i]);
1190#endif
1191
1192 kfree(adapter->tx_ring);
1193 kfree(adapter->rx_ring);
1194#ifdef CONFIG_E1000_NAPI
1195 kfree(adapter->polling_netdev);
1196#endif
1da177e4 1197err_sw_init:
1da177e4
LT		 1198 iounmap(adapter->hw.hw_addr);
1199err_ioremap:
1200 free_netdev(netdev);
1201err_alloc_etherdev:
1202 pci_release_regions(pdev);
6dd62ab0
VA		 1203err_pci_reg:
1204err_dma:
1205 pci_disable_device(pdev);
1da177e4
LT		 1206 return err;
1207}
1208
1209/**
1210 * e1000_remove - Device Removal Routine
1211 * @pdev: PCI device information struct
1212 *
1213 * e1000_remove is called by the PCI subsystem to alert the driver
1214 * that it should release a PCI device. The could be caused by a
1215 * Hot-Plug event, or because the driver is going to be removed from
1216 * memory.
1217 **/
1218
1219static void __devexit
1220e1000_remove(struct pci_dev *pdev)
1221{
1222 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1223 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e
MC		 1224#ifdef CONFIG_E1000_NAPI
1225 int i;
1226#endif
1da177e4 1227
be2b28ed
JG		 1228 flush_scheduled_work();
1229
0fccd0e9 1230 e1000_release_manageability(adapter);
1da177e4 1231
b55ccb35
JK		 1232 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1233 * would have already happened in close and is redundant. */
1234 e1000_release_hw_control(adapter);
2d7edb92 1235
1da177e4 1236 unregister_netdev(netdev);
581d708e 1237#ifdef CONFIG_E1000_NAPI
f56799ea 1238 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1239 dev_put(&adapter->polling_netdev[i]);
581d708e 1240#endif
1da177e4 1241
96838a40 1242 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1243 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1244
24025e4e
MC		 1245 kfree(adapter->tx_ring);
1246 kfree(adapter->rx_ring);
1247#ifdef CONFIG_E1000_NAPI
1248 kfree(adapter->polling_netdev);
1249#endif
1250
1da177e4 1251 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1252 if (adapter->hw.flash_address)
1253 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1254 pci_release_regions(pdev);
1255
1256 free_netdev(netdev);
1257
1258 pci_disable_device(pdev);
1259}
1260
1261/**
1262 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1263 * @adapter: board private structure to initialize
1264 *
1265 * e1000_sw_init initializes the Adapter private data structure.
1266 * Fields are initialized based on PCI device information and
1267 * OS network device settings (MTU size).
1268 **/
1269
1270static int __devinit
1271e1000_sw_init(struct e1000_adapter *adapter)
1272{
1273 struct e1000_hw *hw = &adapter->hw;
1274 struct net_device *netdev = adapter->netdev;
1275 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1276#ifdef CONFIG_E1000_NAPI
1277 int i;
1278#endif
1da177e4
LT		 1279
1280 /* PCI config space info */
1281
1282 hw->vendor_id = pdev->vendor;
1283 hw->device_id = pdev->device;
1284 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1285 hw->subsystem_id = pdev->subsystem_device;
1286
1287 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1288
1289 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1290
eb0f8054 1291 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1292 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1293 hw->max_frame_size = netdev->mtu +
1294 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1295 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1296
1297 /* identify the MAC */
1298
96838a40 1299 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1300 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1301 return -EIO;
1302 }
1303
96838a40 1304 switch (hw->mac_type) {
1da177e4
LT		 1305 default:
1306 break;
1307 case e1000_82541:
1308 case e1000_82547:
1309 case e1000_82541_rev_2:
1310 case e1000_82547_rev_2:
1311 hw->phy_init_script = 1;
1312 break;
1313 }
1314
1315 e1000_set_media_type(hw);
1316
1317 hw->wait_autoneg_complete = FALSE;
1318 hw->tbi_compatibility_en = TRUE;
1319 hw->adaptive_ifs = TRUE;
1320
1321 /* Copper options */
1322
96838a40 1323 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1324 hw->mdix = AUTO_ALL_MODES;
1325 hw->disable_polarity_correction = FALSE;
1326 hw->master_slave = E1000_MASTER_SLAVE;
1327 }
1328
f56799ea
JK		 1329 adapter->num_tx_queues = 1;
1330 adapter->num_rx_queues = 1;
581d708e
MC		 1331
1332 if (e1000_alloc_queues(adapter)) {
1333 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1334 return -ENOMEM;
1335 }
1336
1337#ifdef CONFIG_E1000_NAPI
f56799ea 1338 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1339 adapter->polling_netdev[i].priv = adapter;
1340 adapter->polling_netdev[i].poll = &e1000_clean;
1341 adapter->polling_netdev[i].weight = 64;
1342 dev_hold(&adapter->polling_netdev[i]);
1343 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1344 }
7bfa4816 1345 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1346#endif
1347
1da177e4
LT		 1348 atomic_set(&adapter->irq_sem, 1);
1349 spin_lock_init(&adapter->stats_lock);
1da177e4 1350
1314bbf3
AK		 1351 set_bit(__E1000_DOWN, &adapter->flags);
1352
1da177e4
LT		 1353 return 0;
1354}
1355
581d708e
MC		 1356/**
1357 * e1000_alloc_queues - Allocate memory for all rings
1358 * @adapter: board private structure to initialize
1359 *
1360 * We allocate one ring per queue at run-time since we don't know the
1361 * number of queues at compile-time. The polling_netdev array is
1362 * intended for Multiqueue, but should work fine with a single queue.
1363 **/
1364
1365static int __devinit
1366e1000_alloc_queues(struct e1000_adapter *adapter)
1367{
1368 int size;
1369
f56799ea 1370 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1371 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1372 if (!adapter->tx_ring)
1373 return -ENOMEM;
1374 memset(adapter->tx_ring, 0, size);
1375
f56799ea 1376 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1377 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1378 if (!adapter->rx_ring) {
1379 kfree(adapter->tx_ring);
1380 return -ENOMEM;
1381 }
1382 memset(adapter->rx_ring, 0, size);
1383
1384#ifdef CONFIG_E1000_NAPI
f56799ea 1385 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1386 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1387 if (!adapter->polling_netdev) {
1388 kfree(adapter->tx_ring);
1389 kfree(adapter->rx_ring);
1390 return -ENOMEM;
1391 }
1392 memset(adapter->polling_netdev, 0, size);
1393#endif
1394
1395 return E1000_SUCCESS;
1396}
1397
1da177e4
LT		 1398/**
1399 * e1000_open - Called when a network interface is made active
1400 * @netdev: network interface device structure
1401 *
1402 * Returns 0 on success, negative value on failure
1403 *
1404 * The open entry point is called when a network interface is made
1405 * active by the system (IFF_UP). At this point all resources needed
1406 * for transmit and receive operations are allocated, the interrupt
1407 * handler is registered with the OS, the watchdog timer is started,
1408 * and the stack is notified that the interface is ready.
1409 **/
1410
1411static int
1412e1000_open(struct net_device *netdev)
1413{
60490fe0 1414 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1415 int err;
1416
2db10a08 1417 /* disallow open during test */
1314bbf3 1418 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1419 return -EBUSY;
1420
1da177e4 1421 /* allocate transmit descriptors */
581d708e 1422 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1423 goto err_setup_tx;
1424
1425 /* allocate receive descriptors */
581d708e 1426 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1427 goto err_setup_rx;
1428
2db10a08
AK		 1429 err = e1000_request_irq(adapter);
1430 if (err)
401a552b 1431 goto err_req_irq;
2db10a08 1432
79f05bf0
AK		 1433 e1000_power_up_phy(adapter);
1434
96838a40 1435 if ((err = e1000_up(adapter)))
1da177e4 1436 goto err_up;
2d7edb92 1437 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1438 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1439 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1440 e1000_update_mng_vlan(adapter);
1441 }
1da177e4 1442
b55ccb35
JK		 1443 /* If AMT is enabled, let the firmware know that the network
1444 * interface is now open */
1445 if (adapter->hw.mac_type == e1000_82573 &&
1446 e1000_check_mng_mode(&adapter->hw))
1447 e1000_get_hw_control(adapter);
1448
1da177e4
LT		 1449 return E1000_SUCCESS;
1450
1451err_up:
401a552b
VA		 1452 e1000_power_down_phy(adapter);
1453 e1000_free_irq(adapter);
1454err_req_irq:
581d708e 1455 e1000_free_all_rx_resources(adapter);
1da177e4 1456err_setup_rx:
581d708e 1457 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1458err_setup_tx:
1459 e1000_reset(adapter);
1460
1461 return err;
1462}
1463
1464/**
1465 * e1000_close - Disables a network interface
1466 * @netdev: network interface device structure
1467 *
1468 * Returns 0, this is not allowed to fail
1469 *
1470 * The close entry point is called when an interface is de-activated
1471 * by the OS. The hardware is still under the drivers control, but
1472 * needs to be disabled. A global MAC reset is issued to stop the
1473 * hardware, and all transmit and receive resources are freed.
1474 **/
1475
1476static int
1477e1000_close(struct net_device *netdev)
1478{
60490fe0 1479 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1480
2db10a08 1481 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1482 e1000_down(adapter);
79f05bf0 1483 e1000_power_down_phy(adapter);
2db10a08 1484 e1000_free_irq(adapter);
1da177e4 1485
581d708e
MC		 1486 e1000_free_all_tx_resources(adapter);
1487 e1000_free_all_rx_resources(adapter);
1da177e4 1488
4666560a
BA		 1489 /* kill manageability vlan ID if supported, but not if a vlan with
1490 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1491 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1492 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1493 !(adapter->vlgrp &&
1494 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
2d7edb92
MC		 1495 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1496 }
b55ccb35
JK		 1497
1498 /* If AMT is enabled, let the firmware know that the network
1499 * interface is now closed */
1500 if (adapter->hw.mac_type == e1000_82573 &&
1501 e1000_check_mng_mode(&adapter->hw))
1502 e1000_release_hw_control(adapter);
1503
1da177e4
LT		 1504 return 0;
1505}
1506
1507/**
1508 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1509 * @adapter: address of board private structure
2d7edb92
MC		 1510 * @start: address of beginning of memory
1511 * @len: length of memory
1da177e4 1512 **/
e619d523 1513static boolean_t
1da177e4
LT		 1514e1000_check_64k_bound(struct e1000_adapter *adapter,
1515 void *start, unsigned long len)
1516{
1517 unsigned long begin = (unsigned long) start;
1518 unsigned long end = begin + len;
1519
2648345f
MC		 1520 /* First rev 82545 and 82546 need to not allow any memory
1521 * write location to cross 64k boundary due to errata 23 */
1da177e4 1522 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1523 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1524 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1525 }
1526
1527 return TRUE;
1528}
1529
1530/**
1531 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1532 * @adapter: board private structure
581d708e 1533 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1534 *
1535 * Return 0 on success, negative on failure
1536 **/
1537
3ad2cc67 1538static int
581d708e
MC		 1539e1000_setup_tx_resources(struct e1000_adapter *adapter,
1540 struct e1000_tx_ring *txdr)
1da177e4 1541{
1da177e4
LT		 1542 struct pci_dev *pdev = adapter->pdev;
1543 int size;
1544
1545 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1546 txdr->buffer_info = vmalloc(size);
96838a40 1547 if (!txdr->buffer_info) {
2648345f
MC		 1548 DPRINTK(PROBE, ERR,
1549 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1550 return -ENOMEM;
1551 }
1552 memset(txdr->buffer_info, 0, size);
1553
1554 /* round up to nearest 4K */
1555
1556 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1557 E1000_ROUNDUP(txdr->size, 4096);
1558
1559 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1560 if (!txdr->desc) {
1da177e4 1561setup_tx_desc_die:
1da177e4 1562 vfree(txdr->buffer_info);
2648345f
MC		 1563 DPRINTK(PROBE, ERR,
1564 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1565 return -ENOMEM;
1566 }
1567
2648345f 1568 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1569 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1570 void *olddesc = txdr->desc;
1571 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1572 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1573 "at %p\n", txdr->size, txdr->desc);
1574 /* Try again, without freeing the previous */
1da177e4 1575 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1576 /* Failed allocation, critical failure */
96838a40 1577 if (!txdr->desc) {
1da177e4
LT		 1578 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1579 goto setup_tx_desc_die;
1580 }
1581
1582 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1583 /* give up */
2648345f
MC		 1584 pci_free_consistent(pdev, txdr->size, txdr->desc,
1585 txdr->dma);
1da177e4
LT		 1586 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1587 DPRINTK(PROBE, ERR,
2648345f
MC		 1588 "Unable to allocate aligned memory "
1589 "for the transmit descriptor ring\n");
1da177e4
LT		 1590 vfree(txdr->buffer_info);
1591 return -ENOMEM;
1592 } else {
2648345f 1593 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1594 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1595 }
1596 }
1597 memset(txdr->desc, 0, txdr->size);
1598
1599 txdr->next_to_use = 0;
1600 txdr->next_to_clean = 0;
2ae76d98 1601 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1602
1603 return 0;
1604}
1605
581d708e
MC		 1606/**
1607 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1608 * (Descriptors) for all queues
1609 * @adapter: board private structure
1610 *
581d708e
MC		 1611 * Return 0 on success, negative on failure
1612 **/
1613
1614int
1615e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1616{
1617 int i, err = 0;
1618
f56799ea 1619 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1620 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1621 if (err) {
1622 DPRINTK(PROBE, ERR,
1623 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1624 for (i-- ; i >= 0; i--)
1625 e1000_free_tx_resources(adapter,
1626 &adapter->tx_ring[i]);
581d708e
MC		 1627 break;
1628 }
1629 }
1630
1631 return err;
1632}
1633
1da177e4
LT		 1634/**
1635 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1636 * @adapter: board private structure
1637 *
1638 * Configure the Tx unit of the MAC after a reset.
1639 **/
1640
1641static void
1642e1000_configure_tx(struct e1000_adapter *adapter)
1643{
581d708e
MC		 1644 uint64_t tdba;
1645 struct e1000_hw *hw = &adapter->hw;
1646 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1647 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1648
1649 /* Setup the HW Tx Head and Tail descriptor pointers */
1650
f56799ea 1651 switch (adapter->num_tx_queues) {
24025e4e
MC		 1652 case 1:
1653 default:
581d708e
MC		 1654 tdba = adapter->tx_ring[0].dma;
1655 tdlen = adapter->tx_ring[0].count *
1656 sizeof(struct e1000_tx_desc);
581d708e 1657 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1658 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1659 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1660 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1661 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1662 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1663 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1664 break;
1665 }
1da177e4
LT		 1666
1667 /* Set the default values for the Tx Inter Packet Gap timer */
d89b6c67
JB		 1668 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1669 (hw->media_type == e1000_media_type_fiber ||
1670 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1671 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1672 else
1673 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1674
581d708e 1675 switch (hw->mac_type) {
1da177e4
LT		 1676 case e1000_82542_rev2_0:
1677 case e1000_82542_rev2_1:
1678 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1679 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1680 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1681 break;
87041639
JK		 1682 case e1000_80003es2lan:
1683 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1684 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1685 break;
1da177e4 1686 default:
0fadb059
JK		 1687 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1688 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1689 break;
1da177e4 1690 }
0fadb059
JK		 1691 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1692 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1693 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1694
1695 /* Set the Tx Interrupt Delay register */
1696
581d708e
MC		 1697 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1698 if (hw->mac_type >= e1000_82540)
1699 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1700
1701 /* Program the Transmit Control Register */
1702
581d708e 1703 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1704 tctl &= ~E1000_TCTL_CT;
7e6c9861 1705 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1706 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1707
2ae76d98
MC		 1708 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1709 tarc = E1000_READ_REG(hw, TARC0);
90fb5135
AK		 1710 /* set the speed mode bit, we'll clear it if we're not at
1711 * gigabit link later */
09ae3e88 1712 tarc |= (1 << 21);
2ae76d98 1713 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1714 } else if (hw->mac_type == e1000_80003es2lan) {
1715 tarc = E1000_READ_REG(hw, TARC0);
1716 tarc |= 1;
87041639
JK		 1717 E1000_WRITE_REG(hw, TARC0, tarc);
1718 tarc = E1000_READ_REG(hw, TARC1);
1719 tarc |= 1;
1720 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1721 }
1722
581d708e 1723 e1000_config_collision_dist(hw);
1da177e4
LT		 1724
1725 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1726 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1727
1728 /* only set IDE if we are delaying interrupts using the timers */
1729 if (adapter->tx_int_delay)
1730 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1731
581d708e 1732 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1733 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1734 else
1735 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1736
1737 /* Cache if we're 82544 running in PCI-X because we'll
1738 * need this to apply a workaround later in the send path. */
581d708e
MC		 1739 if (hw->mac_type == e1000_82544 &&
1740 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1741 adapter->pcix_82544 = 1;
7e6c9861
JK		 1742
1743 E1000_WRITE_REG(hw, TCTL, tctl);
1744
1da177e4
LT		 1745}
1746
1747/**
1748 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1749 * @adapter: board private structure
581d708e 1750 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1751 *
1752 * Returns 0 on success, negative on failure
1753 **/
1754
3ad2cc67 1755static int
581d708e
MC		 1756e1000_setup_rx_resources(struct e1000_adapter *adapter,
1757 struct e1000_rx_ring *rxdr)
1da177e4 1758{
1da177e4 1759 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1760 int size, desc_len;
1da177e4
LT		 1761
1762 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1763 rxdr->buffer_info = vmalloc(size);
581d708e 1764 if (!rxdr->buffer_info) {
2648345f
MC		 1765 DPRINTK(PROBE, ERR,
1766 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1767 return -ENOMEM;
1768 }
1769 memset(rxdr->buffer_info, 0, size);
1770
2d7edb92
MC		 1771 size = sizeof(struct e1000_ps_page) * rxdr->count;
1772 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1773 if (!rxdr->ps_page) {
2d7edb92
MC		 1774 vfree(rxdr->buffer_info);
1775 DPRINTK(PROBE, ERR,
1776 "Unable to allocate memory for the receive descriptor ring\n");
1777 return -ENOMEM;
1778 }
1779 memset(rxdr->ps_page, 0, size);
1780
1781 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1782 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1783 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1784 vfree(rxdr->buffer_info);
1785 kfree(rxdr->ps_page);
1786 DPRINTK(PROBE, ERR,
1787 "Unable to allocate memory for the receive descriptor ring\n");
1788 return -ENOMEM;
1789 }
1790 memset(rxdr->ps_page_dma, 0, size);
1791
96838a40 1792 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1793 desc_len = sizeof(struct e1000_rx_desc);
1794 else
1795 desc_len = sizeof(union e1000_rx_desc_packet_split);
1796
1da177e4
LT		 1797 /* Round up to nearest 4K */
1798
2d7edb92 1799 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1800 E1000_ROUNDUP(rxdr->size, 4096);
1801
1802 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1803
581d708e
MC		 1804 if (!rxdr->desc) {
1805 DPRINTK(PROBE, ERR,
1806 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1807setup_rx_desc_die:
1da177e4 1808 vfree(rxdr->buffer_info);
2d7edb92
MC		 1809 kfree(rxdr->ps_page);
1810 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1811 return -ENOMEM;
1812 }
1813
2648345f 1814 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1815 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1816 void *olddesc = rxdr->desc;
1817 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1818 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1819 "at %p\n", rxdr->size, rxdr->desc);
1820 /* Try again, without freeing the previous */
1da177e4 1821 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1822 /* Failed allocation, critical failure */
581d708e 1823 if (!rxdr->desc) {
1da177e4 1824 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1825 DPRINTK(PROBE, ERR,
1826 "Unable to allocate memory "
1827 "for the receive descriptor ring\n");
1da177e4
LT		 1828 goto setup_rx_desc_die;
1829 }
1830
1831 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1832 /* give up */
2648345f
MC		 1833 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1834 rxdr->dma);
1da177e4 1835 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1836 DPRINTK(PROBE, ERR,
1837 "Unable to allocate aligned memory "
1838 "for the receive descriptor ring\n");
581d708e 1839 goto setup_rx_desc_die;
1da177e4 1840 } else {
2648345f 1841 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1842 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1843 }
1844 }
1845 memset(rxdr->desc, 0, rxdr->size);
1846
1847 rxdr->next_to_clean = 0;
1848 rxdr->next_to_use = 0;
1849
1850 return 0;
1851}
1852
581d708e
MC		 1853/**
1854 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1855 * (Descriptors) for all queues
1856 * @adapter: board private structure
1857 *
581d708e
MC		 1858 * Return 0 on success, negative on failure
1859 **/
1860
1861int
1862e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1863{
1864 int i, err = 0;
1865
f56799ea 1866 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1867 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1868 if (err) {
1869 DPRINTK(PROBE, ERR,
1870 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1871 for (i-- ; i >= 0; i--)
1872 e1000_free_rx_resources(adapter,
1873 &adapter->rx_ring[i]);
581d708e
MC		 1874 break;
1875 }
1876 }
1877
1878 return err;
1879}
1880
1da177e4 1881/**
2648345f 1882 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1883 * @adapter: Board private structure
1884 **/
e4c811c9
MC		 1885#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1886 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1887static void
1888e1000_setup_rctl(struct e1000_adapter *adapter)
1889{
2d7edb92
MC		 1890 uint32_t rctl, rfctl;
1891 uint32_t psrctl = 0;
35ec56bb 1892#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1893 uint32_t pages = 0;
1894#endif
1da177e4
LT		 1895
1896 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1897
1898 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1899
1900 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1901 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1902 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1903
0fadb059 1904 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1905 rctl |= E1000_RCTL_SBP;
1906 else
1907 rctl &= ~E1000_RCTL_SBP;
1908
2d7edb92
MC		 1909 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1910 rctl &= ~E1000_RCTL_LPE;
1911 else
1912 rctl |= E1000_RCTL_LPE;
1913
1da177e4 1914 /* Setup buffer sizes */
9e2feace
AK		 1915 rctl &= ~E1000_RCTL_SZ_4096;
1916 rctl |= E1000_RCTL_BSEX;
1917 switch (adapter->rx_buffer_len) {
1918 case E1000_RXBUFFER_256:
1919 rctl |= E1000_RCTL_SZ_256;
1920 rctl &= ~E1000_RCTL_BSEX;
1921 break;
1922 case E1000_RXBUFFER_512:
1923 rctl |= E1000_RCTL_SZ_512;
1924 rctl &= ~E1000_RCTL_BSEX;
1925 break;
1926 case E1000_RXBUFFER_1024:
1927 rctl |= E1000_RCTL_SZ_1024;
1928 rctl &= ~E1000_RCTL_BSEX;
1929 break;
a1415ee6
JK		 1930 case E1000_RXBUFFER_2048:
1931 default:
1932 rctl |= E1000_RCTL_SZ_2048;
1933 rctl &= ~E1000_RCTL_BSEX;
1934 break;
1935 case E1000_RXBUFFER_4096:
1936 rctl |= E1000_RCTL_SZ_4096;
1937 break;
1938 case E1000_RXBUFFER_8192:
1939 rctl |= E1000_RCTL_SZ_8192;
1940 break;
1941 case E1000_RXBUFFER_16384:
1942 rctl |= E1000_RCTL_SZ_16384;
1943 break;
2d7edb92
MC		 1944 }
1945
35ec56bb 1946#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1947 /* 82571 and greater support packet-split where the protocol
1948 * header is placed in skb->data and the packet data is
1949 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1950 * In the case of a non-split, skb->data is linearly filled,
1951 * followed by the page buffers. Therefore, skb->data is
1952 * sized to hold the largest protocol header.
1953 */
e64d7d02
JB		 1954 /* allocations using alloc_page take too long for regular MTU
1955 * so only enable packet split for jumbo frames */
e4c811c9 1956 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
e64d7d02
JB		 1957 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1958 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
e4c811c9
MC		 1959 adapter->rx_ps_pages = pages;
1960 else
1961 adapter->rx_ps_pages = 0;
2d7edb92 1962#endif
e4c811c9 1963 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1964 /* Configure extra packet-split registers */
1965 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1966 rfctl |= E1000_RFCTL_EXTEN;
87ca4e5b
AK		 1967 /* disable packet split support for IPv6 extension headers,
1968 * because some malformed IPv6 headers can hang the RX */
1969 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1970 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1971
2d7edb92
MC		 1972 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1973
7dfee0cb 1974 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1975
2d7edb92
MC		 1976 psrctl |= adapter->rx_ps_bsize0 >>
1977 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1978
1979 switch (adapter->rx_ps_pages) {
1980 case 3:
1981 psrctl |= PAGE_SIZE <<
1982 E1000_PSRCTL_BSIZE3_SHIFT;
1983 case 2:
1984 psrctl |= PAGE_SIZE <<
1985 E1000_PSRCTL_BSIZE2_SHIFT;
1986 case 1:
1987 psrctl |= PAGE_SIZE >>
1988 E1000_PSRCTL_BSIZE1_SHIFT;
1989 break;
1990 }
2d7edb92
MC		 1991
1992 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1993 }
1994
1995 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1996}
1997
1998/**
1999 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2000 * @adapter: board private structure
2001 *
2002 * Configure the Rx unit of the MAC after a reset.
2003 **/
2004
2005static void
2006e1000_configure_rx(struct e1000_adapter *adapter)
2007{
581d708e
MC		 2008 uint64_t rdba;
2009 struct e1000_hw *hw = &adapter->hw;
2010 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 2011
e4c811c9 2012 if (adapter->rx_ps_pages) {
0f15a8fa 2013 /* this is a 32 byte descriptor */
581d708e 2014 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 2015 sizeof(union e1000_rx_desc_packet_split);
2016 adapter->clean_rx = e1000_clean_rx_irq_ps;
2017 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2018 } else {
581d708e
MC		 2019 rdlen = adapter->rx_ring[0].count *
2020 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 2021 adapter->clean_rx = e1000_clean_rx_irq;
2022 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2023 }
1da177e4
LT		 2024
2025 /* disable receives while setting up the descriptors */
581d708e
MC		 2026 rctl = E1000_READ_REG(hw, RCTL);
2027 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 2028
2029 /* set the Receive Delay Timer Register */
581d708e 2030 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 2031
581d708e
MC		 2032 if (hw->mac_type >= e1000_82540) {
2033 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
835bb129 2034 if (adapter->itr_setting != 0)
581d708e 2035 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 2036 1000000000 / (adapter->itr * 256));
2037 }
2038
2ae76d98 2039 if (hw->mac_type >= e1000_82571) {
2ae76d98 2040 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 2041 /* Reset delay timers after every interrupt */
6fc7a7ec 2042 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9 2043#ifdef CONFIG_E1000_NAPI
835bb129 2044 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2045 ctrl_ext |= E1000_CTRL_EXT_IAME;
835bb129 2046 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1e613fd9 2047#endif
2ae76d98
MC		 2048 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2049 E1000_WRITE_FLUSH(hw);
2050 }
2051
581d708e
MC		 2052 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2053 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2054 switch (adapter->num_rx_queues) {
24025e4e
MC		 2055 case 1:
2056 default:
581d708e 2057 rdba = adapter->rx_ring[0].dma;
581d708e 2058 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 2059 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2060 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 2061 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 2062 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 2063 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2064 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2065 break;
24025e4e
MC		 2066 }
2067
1da177e4 2068 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 2069 if (hw->mac_type >= e1000_82543) {
2070 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 2071 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 2072 rxcsum |= E1000_RXCSUM_TUOFL;
2073
868d5309 2074 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 2075 * Must be used in conjunction with packet-split. */
96838a40
JB		 2076 if ((hw->mac_type >= e1000_82571) &&
2077 (adapter->rx_ps_pages)) {
2d7edb92
MC		 2078 rxcsum |= E1000_RXCSUM_IPPCSE;
2079 }
2080 } else {
2081 rxcsum &= ~E1000_RXCSUM_TUOFL;
2082 /* don't need to clear IPPCSE as it defaults to 0 */
2083 }
581d708e 2084 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 2085 }
2086
21c4d5e0
AK		 2087 /* enable early receives on 82573, only takes effect if using > 2048
2088 * byte total frame size. for example only for jumbo frames */
2089#define E1000_ERT_2048 0x100
2090 if (hw->mac_type == e1000_82573)
2091 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2092
1da177e4 2093 /* Enable Receives */
581d708e 2094 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 2095}
2096
2097/**
581d708e 2098 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2099 * @adapter: board private structure
581d708e 2100 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2101 *
2102 * Free all transmit software resources
2103 **/
2104
3ad2cc67 2105static void
581d708e
MC		 2106e1000_free_tx_resources(struct e1000_adapter *adapter,
2107 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2108{
2109 struct pci_dev *pdev = adapter->pdev;
2110
581d708e 2111 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2112
581d708e
MC		 2113 vfree(tx_ring->buffer_info);
2114 tx_ring->buffer_info = NULL;
1da177e4 2115
581d708e 2116 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2117
581d708e
MC		 2118 tx_ring->desc = NULL;
2119}
2120
2121/**
2122 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2123 * @adapter: board private structure
2124 *
2125 * Free all transmit software resources
2126 **/
2127
2128void
2129e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2130{
2131 int i;
2132
f56799ea 2133 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2134 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2135}
2136
e619d523 2137static void
1da177e4
LT		 2138e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2139 struct e1000_buffer *buffer_info)
2140{
96838a40 2141 if (buffer_info->dma) {
2648345f
MC		 2142 pci_unmap_page(adapter->pdev,
2143 buffer_info->dma,
2144 buffer_info->length,
2145 PCI_DMA_TODEVICE);
a9ebadd6 2146 buffer_info->dma = 0;
1da177e4 2147 }
a9ebadd6 2148 if (buffer_info->skb) {
1da177e4 2149 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2150 buffer_info->skb = NULL;
2151 }
2152 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2153}
2154
2155/**
2156 * e1000_clean_tx_ring - Free Tx Buffers
2157 * @adapter: board private structure
581d708e 2158 * @tx_ring: ring to be cleaned
1da177e4
LT		 2159 **/
2160
2161static void
581d708e
MC		 2162e1000_clean_tx_ring(struct e1000_adapter *adapter,
2163 struct e1000_tx_ring *tx_ring)
1da177e4 2164{
1da177e4
LT		 2165 struct e1000_buffer *buffer_info;
2166 unsigned long size;
2167 unsigned int i;
2168
2169 /* Free all the Tx ring sk_buffs */
2170
96838a40 2171 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2172 buffer_info = &tx_ring->buffer_info[i];
2173 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2174 }
2175
2176 size = sizeof(struct e1000_buffer) * tx_ring->count;
2177 memset(tx_ring->buffer_info, 0, size);
2178
2179 /* Zero out the descriptor ring */
2180
2181 memset(tx_ring->desc, 0, tx_ring->size);
2182
2183 tx_ring->next_to_use = 0;
2184 tx_ring->next_to_clean = 0;
fd803241 2185 tx_ring->last_tx_tso = 0;
1da177e4 2186
581d708e
MC		 2187 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2188 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2189}
2190
2191/**
2192 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2193 * @adapter: board private structure
2194 **/
2195
2196static void
2197e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2198{
2199 int i;
2200
f56799ea 2201 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2202 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2203}
2204
2205/**
2206 * e1000_free_rx_resources - Free Rx Resources
2207 * @adapter: board private structure
581d708e 2208 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2209 *
2210 * Free all receive software resources
2211 **/
2212
3ad2cc67 2213static void
581d708e
MC		 2214e1000_free_rx_resources(struct e1000_adapter *adapter,
2215 struct e1000_rx_ring *rx_ring)
1da177e4 2216{
1da177e4
LT		 2217 struct pci_dev *pdev = adapter->pdev;
2218
581d708e 2219 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2220
2221 vfree(rx_ring->buffer_info);
2222 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2223 kfree(rx_ring->ps_page);
2224 rx_ring->ps_page = NULL;
2225 kfree(rx_ring->ps_page_dma);
2226 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2227
2228 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2229
2230 rx_ring->desc = NULL;
2231}
2232
2233/**
581d708e 2234 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2235 * @adapter: board private structure
581d708e
MC		 2236 *
2237 * Free all receive software resources
2238 **/
2239
2240void
2241e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2242{
2243 int i;
2244
f56799ea 2245 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2246 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2247}
2248
2249/**
2250 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2251 * @adapter: board private structure
2252 * @rx_ring: ring to free buffers from
1da177e4
LT		 2253 **/
2254
2255static void
581d708e
MC		 2256e1000_clean_rx_ring(struct e1000_adapter *adapter,
2257 struct e1000_rx_ring *rx_ring)
1da177e4 2258{
1da177e4 2259 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2260 struct e1000_ps_page *ps_page;
2261 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2262 struct pci_dev *pdev = adapter->pdev;
2263 unsigned long size;
2d7edb92 2264 unsigned int i, j;
1da177e4
LT		 2265
2266 /* Free all the Rx ring sk_buffs */
96838a40 2267 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2268 buffer_info = &rx_ring->buffer_info[i];
96838a40 2269 if (buffer_info->skb) {
1da177e4
LT		 2270 pci_unmap_single(pdev,
2271 buffer_info->dma,
2272 buffer_info->length,
2273 PCI_DMA_FROMDEVICE);
2274
2275 dev_kfree_skb(buffer_info->skb);
2276 buffer_info->skb = NULL;
997f5cbd
JK		 2277 }
2278 ps_page = &rx_ring->ps_page[i];
2279 ps_page_dma = &rx_ring->ps_page_dma[i];
2280 for (j = 0; j < adapter->rx_ps_pages; j++) {
2281 if (!ps_page->ps_page[j]) break;
2282 pci_unmap_page(pdev,
2283 ps_page_dma->ps_page_dma[j],
2284 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2285 ps_page_dma->ps_page_dma[j] = 0;
2286 put_page(ps_page->ps_page[j]);
2287 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2288 }
2289 }
2290
2291 size = sizeof(struct e1000_buffer) * rx_ring->count;
2292 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2293 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2294 memset(rx_ring->ps_page, 0, size);
2295 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2296 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2297
2298 /* Zero out the descriptor ring */
2299
2300 memset(rx_ring->desc, 0, rx_ring->size);
2301
2302 rx_ring->next_to_clean = 0;
2303 rx_ring->next_to_use = 0;
2304
581d708e
MC		 2305 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2306 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2307}
2308
2309/**
2310 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2311 * @adapter: board private structure
2312 **/
2313
2314static void
2315e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2316{
2317 int i;
2318
f56799ea 2319 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2320 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2321}
2322
2323/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2324 * and memory write and invalidate disabled for certain operations
2325 */
2326static void
2327e1000_enter_82542_rst(struct e1000_adapter *adapter)
2328{
2329 struct net_device *netdev = adapter->netdev;
2330 uint32_t rctl;
2331
2332 e1000_pci_clear_mwi(&adapter->hw);
2333
2334 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2335 rctl |= E1000_RCTL_RST;
2336 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2337 E1000_WRITE_FLUSH(&adapter->hw);
2338 mdelay(5);
2339
96838a40 2340 if (netif_running(netdev))
581d708e 2341 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2342}
2343
2344static void
2345e1000_leave_82542_rst(struct e1000_adapter *adapter)
2346{
2347 struct net_device *netdev = adapter->netdev;
2348 uint32_t rctl;
2349
2350 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2351 rctl &= ~E1000_RCTL_RST;
2352 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2353 E1000_WRITE_FLUSH(&adapter->hw);
2354 mdelay(5);
2355
96838a40 2356 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2357 e1000_pci_set_mwi(&adapter->hw);
2358
96838a40 2359 if (netif_running(netdev)) {
72d64a43
JK		 2360 /* No need to loop, because 82542 supports only 1 queue */
2361 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2362 e1000_configure_rx(adapter);
72d64a43 2363 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2364 }
2365}
2366
2367/**
2368 * e1000_set_mac - Change the Ethernet Address of the NIC
2369 * @netdev: network interface device structure
2370 * @p: pointer to an address structure
2371 *
2372 * Returns 0 on success, negative on failure
2373 **/
2374
2375static int
2376e1000_set_mac(struct net_device *netdev, void *p)
2377{
60490fe0 2378 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2379 struct sockaddr *addr = p;
2380
96838a40 2381 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2382 return -EADDRNOTAVAIL;
2383
2384 /* 82542 2.0 needs to be in reset to write receive address registers */
2385
96838a40 2386 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2387 e1000_enter_82542_rst(adapter);
2388
2389 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2390 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2391
2392 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2393
868d5309
MC		 2394 /* With 82571 controllers, LAA may be overwritten (with the default)
2395 * due to controller reset from the other port. */
2396 if (adapter->hw.mac_type == e1000_82571) {
2397 /* activate the work around */
2398 adapter->hw.laa_is_present = 1;
2399
96838a40
JB		 2400 /* Hold a copy of the LAA in RAR[14] This is done so that
2401 * between the time RAR[0] gets clobbered and the time it
2402 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2403 * of the RARs and no incoming packets directed to this port
96838a40 2404 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2405 * RAR[14] */
96838a40 2406 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2407 E1000_RAR_ENTRIES - 1);
2408 }
2409
96838a40 2410 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2411 e1000_leave_82542_rst(adapter);
2412
2413 return 0;
2414}
2415
2416/**
2417 * e1000_set_multi - Multicast and Promiscuous mode set
2418 * @netdev: network interface device structure
2419 *
2420 * The set_multi entry point is called whenever the multicast address
2421 * list or the network interface flags are updated. This routine is
2422 * responsible for configuring the hardware for proper multicast,
2423 * promiscuous mode, and all-multi behavior.
2424 **/
2425
2426static void
2427e1000_set_multi(struct net_device *netdev)
2428{
60490fe0 2429 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2430 struct e1000_hw *hw = &adapter->hw;
2431 struct dev_mc_list *mc_ptr;
2432 uint32_t rctl;
2433 uint32_t hash_value;
868d5309 2434 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2435 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2436 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2437 E1000_NUM_MTA_REGISTERS;
2438
2439 if (adapter->hw.mac_type == e1000_ich8lan)
2440 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2441
868d5309
MC		 2442 /* reserve RAR[14] for LAA over-write work-around */
2443 if (adapter->hw.mac_type == e1000_82571)
2444 rar_entries--;
1da177e4 2445
2648345f
MC		 2446 /* Check for Promiscuous and All Multicast modes */
2447
1da177e4
LT		 2448 rctl = E1000_READ_REG(hw, RCTL);
2449
96838a40 2450 if (netdev->flags & IFF_PROMISC) {
1da177e4 2451 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2452 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2453 rctl |= E1000_RCTL_MPE;
2454 rctl &= ~E1000_RCTL_UPE;
2455 } else {
2456 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2457 }
2458
2459 E1000_WRITE_REG(hw, RCTL, rctl);
2460
2461 /* 82542 2.0 needs to be in reset to write receive address registers */
2462
96838a40 2463 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2464 e1000_enter_82542_rst(adapter);
2465
2466 /* load the first 14 multicast address into the exact filters 1-14
2467 * RAR 0 is used for the station MAC adddress
2468 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2469 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2470 */
2471 mc_ptr = netdev->mc_list;
2472
96838a40 2473 for (i = 1; i < rar_entries; i++) {
868d5309 2474 if (mc_ptr) {
1da177e4
LT		 2475 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2476 mc_ptr = mc_ptr->next;
2477 } else {
2478 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2479 E1000_WRITE_FLUSH(hw);
1da177e4 2480 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2481 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2482 }
2483 }
2484
2485 /* clear the old settings from the multicast hash table */
2486
cd94dd0b 2487 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2488 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2489 E1000_WRITE_FLUSH(hw);
2490 }
1da177e4
LT		 2491
2492 /* load any remaining addresses into the hash table */
2493
96838a40 2494 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2495 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2496 e1000_mta_set(hw, hash_value);
2497 }
2498
96838a40 2499 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2500 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2501}
2502
2503/* Need to wait a few seconds after link up to get diagnostic information from
2504 * the phy */
2505
2506static void
2507e1000_update_phy_info(unsigned long data)
2508{
2509 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2510 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2511}
2512
2513/**
2514 * e1000_82547_tx_fifo_stall - Timer Call-back
2515 * @data: pointer to adapter cast into an unsigned long
2516 **/
2517
2518static void
2519e1000_82547_tx_fifo_stall(unsigned long data)
2520{
2521 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2522 struct net_device *netdev = adapter->netdev;
2523 uint32_t tctl;
2524
96838a40
JB		 2525 if (atomic_read(&adapter->tx_fifo_stall)) {
2526 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2527 E1000_READ_REG(&adapter->hw, TDH)) &&
2528 (E1000_READ_REG(&adapter->hw, TDFT) ==
2529 E1000_READ_REG(&adapter->hw, TDFH)) &&
2530 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2531 E1000_READ_REG(&adapter->hw, TDFHS))) {
2532 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2533 E1000_WRITE_REG(&adapter->hw, TCTL,
2534 tctl & ~E1000_TCTL_EN);
2535 E1000_WRITE_REG(&adapter->hw, TDFT,
2536 adapter->tx_head_addr);
2537 E1000_WRITE_REG(&adapter->hw, TDFH,
2538 adapter->tx_head_addr);
2539 E1000_WRITE_REG(&adapter->hw, TDFTS,
2540 adapter->tx_head_addr);
2541 E1000_WRITE_REG(&adapter->hw, TDFHS,
2542 adapter->tx_head_addr);
2543 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2544 E1000_WRITE_FLUSH(&adapter->hw);
2545
2546 adapter->tx_fifo_head = 0;
2547 atomic_set(&adapter->tx_fifo_stall, 0);
2548 netif_wake_queue(netdev);
2549 } else {
2550 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2551 }
2552 }
2553}
2554
2555/**
2556 * e1000_watchdog - Timer Call-back
2557 * @data: pointer to adapter cast into an unsigned long
2558 **/
2559static void
2560e1000_watchdog(unsigned long data)
2561{
2562 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2563 struct net_device *netdev = adapter->netdev;
545c67c0 2564 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2565 uint32_t link, tctl;
cd94dd0b
AK		 2566 int32_t ret_val;
2567
2568 ret_val = e1000_check_for_link(&adapter->hw);
2569 if ((ret_val == E1000_ERR_PHY) &&
2570 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2571 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2572 /* See e1000_kumeran_lock_loss_workaround() */
2573 DPRINTK(LINK, INFO,
2574 "Gigabit has been disabled, downgrading speed\n");
2575 }
90fb5135 2576
2d7edb92
MC		 2577 if (adapter->hw.mac_type == e1000_82573) {
2578 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2579 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2580 e1000_update_mng_vlan(adapter);
96838a40 2581 }
1da177e4 2582
96838a40 2583 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2584 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2585 link = !adapter->hw.serdes_link_down;
2586 else
2587 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2588
96838a40
JB		 2589 if (link) {
2590 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2591 boolean_t txb2b = 1;
1da177e4
LT		 2592 e1000_get_speed_and_duplex(&adapter->hw,
2593 &adapter->link_speed,
2594 &adapter->link_duplex);
2595
2596 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2597 adapter->link_speed,
2598 adapter->link_duplex == FULL_DUPLEX ?
2599 "Full Duplex" : "Half Duplex");
2600
7e6c9861
JK		 2601 /* tweak tx_queue_len according to speed/duplex
2602 * and adjust the timeout factor */
66a2b0a3
JK		 2603 netdev->tx_queue_len = adapter->tx_queue_len;
2604 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2605 switch (adapter->link_speed) {
2606 case SPEED_10:
fe7fe28e 2607 txb2b = 0;
7e6c9861
JK		 2608 netdev->tx_queue_len = 10;
2609 adapter->tx_timeout_factor = 8;
2610 break;
2611 case SPEED_100:
fe7fe28e 2612 txb2b = 0;
7e6c9861
JK		 2613 netdev->tx_queue_len = 100;
2614 /* maybe add some timeout factor ? */
2615 break;
2616 }
2617
fe7fe28e 2618 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2619 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2620 txb2b == 0) {
7e6c9861
JK		 2621 uint32_t tarc0;
2622 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
90fb5135 2623 tarc0 &= ~(1 << 21);
7e6c9861
JK		 2624 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2625 }
90fb5135 2626
7e6c9861
JK		 2627#ifdef NETIF_F_TSO
2628 /* disable TSO for pcie and 10/100 speeds, to avoid
2629 * some hardware issues */
2630 if (!adapter->tso_force &&
2631 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2632 switch (adapter->link_speed) {
2633 case SPEED_10:
66a2b0a3 2634 case SPEED_100:
7e6c9861
JK		 2635 DPRINTK(PROBE,INFO,
2636 "10/100 speed: disabling TSO\n");
2637 netdev->features &= ~NETIF_F_TSO;
87ca4e5b
AK		 2638#ifdef NETIF_F_TSO6
2639 netdev->features &= ~NETIF_F_TSO6;
2640#endif
7e6c9861
JK		 2641 break;
2642 case SPEED_1000:
2643 netdev->features |= NETIF_F_TSO;
87ca4e5b
AK		 2644#ifdef NETIF_F_TSO6
2645 netdev->features |= NETIF_F_TSO6;
2646#endif
7e6c9861
JK		 2647 break;
2648 default:
2649 /* oops */
66a2b0a3
JK		 2650 break;
2651 }
2652 }
7e6c9861
JK		 2653#endif
2654
2655 /* enable transmits in the hardware, need to do this
2656 * after setting TARC0 */
2657 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2658 tctl |= E1000_TCTL_EN;
2659 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2660
1da177e4
LT		 2661 netif_carrier_on(netdev);
2662 netif_wake_queue(netdev);
2663 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2664 adapter->smartspeed = 0;
bb8e3311
JG		 2665 } else {
2666 /* make sure the receive unit is started */
2667 if (adapter->hw.rx_needs_kicking) {
2668 struct e1000_hw *hw = &adapter->hw;
2669 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2670 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2671 }
1da177e4
LT		 2672 }
2673 } else {
96838a40 2674 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2675 adapter->link_speed = 0;
2676 adapter->link_duplex = 0;
2677 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2678 netif_carrier_off(netdev);
2679 netif_stop_queue(netdev);
2680 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2681
2682 /* 80003ES2LAN workaround--
2683 * For packet buffer work-around on link down event;
2684 * disable receives in the ISR and
2685 * reset device here in the watchdog
2686 */
8fc897b0 2687 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2688 /* reset device */
2689 schedule_work(&adapter->reset_task);
1da177e4
LT		 2690 }
2691
2692 e1000_smartspeed(adapter);
2693 }
2694
2695 e1000_update_stats(adapter);
2696
2697 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2698 adapter->tpt_old = adapter->stats.tpt;
2699 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2700 adapter->colc_old = adapter->stats.colc;
2701
2702 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2703 adapter->gorcl_old = adapter->stats.gorcl;
2704 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2705 adapter->gotcl_old = adapter->stats.gotcl;
2706
2707 e1000_update_adaptive(&adapter->hw);
2708
f56799ea 2709 if (!netif_carrier_ok(netdev)) {
581d708e 2710 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2711 /* We've lost link, so the controller stops DMA,
2712 * but we've got queued Tx work that's never going
2713 * to get done, so reset controller to flush Tx.
2714 * (Do the reset outside of interrupt context). */
87041639
JK		 2715 adapter->tx_timeout_count++;
2716 schedule_work(&adapter->reset_task);
1da177e4
LT		 2717 }
2718 }
2719
1da177e4
LT		 2720 /* Cause software interrupt to ensure rx ring is cleaned */
2721 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2722
2648345f 2723 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2724 adapter->detect_tx_hung = TRUE;
2725
96838a40 2726 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2727 * reset from the other port. Set the appropriate LAA in RAR[0] */
2728 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2729 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2730
1da177e4
LT		 2731 /* Reset the timer */
2732 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2733}
2734
835bb129
JB		 2735enum latency_range {
2736 lowest_latency = 0,
2737 low_latency = 1,
2738 bulk_latency = 2,
2739 latency_invalid = 255
2740};
2741
2742/**
2743 * e1000_update_itr - update the dynamic ITR value based on statistics
2744 * Stores a new ITR value based on packets and byte
2745 * counts during the last interrupt. The advantage of per interrupt
2746 * computation is faster updates and more accurate ITR for the current
2747 * traffic pattern. Constants in this function were computed
2748 * based on theoretical maximum wire speed and thresholds were set based
2749 * on testing data as well as attempting to minimize response time
2750 * while increasing bulk throughput.
2751 * this functionality is controlled by the InterruptThrottleRate module
2752 * parameter (see e1000_param.c)
2753 * @adapter: pointer to adapter
2754 * @itr_setting: current adapter->itr
2755 * @packets: the number of packets during this measurement interval
2756 * @bytes: the number of bytes during this measurement interval
2757 **/
2758static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2759 uint16_t itr_setting,
2760 int packets,
2761 int bytes)
2762{
2763 unsigned int retval = itr_setting;
2764 struct e1000_hw *hw = &adapter->hw;
2765
2766 if (unlikely(hw->mac_type < e1000_82540))
2767 goto update_itr_done;
2768
2769 if (packets == 0)
2770 goto update_itr_done;
2771
835bb129
JB		 2772 switch (itr_setting) {
2773 case lowest_latency:
2b65326e
JB		 2774 /* jumbo frames get bulk treatment*/
2775 if (bytes/packets > 8000)
2776 retval = bulk_latency;
2777 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2778 retval = low_latency;
2779 break;
2780 case low_latency: /* 50 usec aka 20000 ints/s */
2781 if (bytes > 10000) {
2b65326e
JB		 2782 /* jumbo frames need bulk latency setting */
2783 if (bytes/packets > 8000)
2784 retval = bulk_latency;
2785 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2786 retval = bulk_latency;
2787 else if ((packets > 35))
2788 retval = lowest_latency;
2b65326e
JB		 2789 } else if (bytes/packets > 2000)
2790 retval = bulk_latency;
2791 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2792 retval = lowest_latency;
2793 break;
2794 case bulk_latency: /* 250 usec aka 4000 ints/s */
2795 if (bytes > 25000) {
2796 if (packets > 35)
2797 retval = low_latency;
2b65326e
JB		 2798 } else if (bytes < 6000) {
2799 retval = low_latency;
835bb129
JB		 2800 }
2801 break;
2802 }
2803
2804update_itr_done:
2805 return retval;
2806}
2807
2808static void e1000_set_itr(struct e1000_adapter *adapter)
2809{
2810 struct e1000_hw *hw = &adapter->hw;
2811 uint16_t current_itr;
2812 uint32_t new_itr = adapter->itr;
2813
2814 if (unlikely(hw->mac_type < e1000_82540))
2815 return;
2816
2817 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2818 if (unlikely(adapter->link_speed != SPEED_1000)) {
2819 current_itr = 0;
2820 new_itr = 4000;
2821 goto set_itr_now;
2822 }
2823
2824 adapter->tx_itr = e1000_update_itr(adapter,
2825 adapter->tx_itr,
2826 adapter->total_tx_packets,
2827 adapter->total_tx_bytes);
2b65326e
JB		 2828 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2829 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2830 adapter->tx_itr = low_latency;
2831
835bb129
JB		 2832 adapter->rx_itr = e1000_update_itr(adapter,
2833 adapter->rx_itr,
2834 adapter->total_rx_packets,
2835 adapter->total_rx_bytes);
2b65326e
JB		 2836 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2837 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2838 adapter->rx_itr = low_latency;
835bb129
JB		 2839
2840 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2841
835bb129
JB		 2842 switch (current_itr) {
2843 /* counts and packets in update_itr are dependent on these numbers */
2844 case lowest_latency:
2845 new_itr = 70000;
2846 break;
2847 case low_latency:
2848 new_itr = 20000; /* aka hwitr = ~200 */
2849 break;
2850 case bulk_latency:
2851 new_itr = 4000;
2852 break;
2853 default:
2854 break;
2855 }
2856
2857set_itr_now:
2858 if (new_itr != adapter->itr) {
2859 /* this attempts to bias the interrupt rate towards Bulk
2860 * by adding intermediate steps when interrupt rate is
2861 * increasing */
2862 new_itr = new_itr > adapter->itr ?
2863 min(adapter->itr + (new_itr >> 2), new_itr) :
2864 new_itr;
2865 adapter->itr = new_itr;
2866 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2867 }
2868
2869 return;
2870}
2871
1da177e4
LT		 2872#define E1000_TX_FLAGS_CSUM 0x00000001
2873#define E1000_TX_FLAGS_VLAN 0x00000002
2874#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2875#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2876#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2877#define E1000_TX_FLAGS_VLAN_SHIFT 16
2878
e619d523 2879static int
581d708e
MC		 2880e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2881 struct sk_buff *skb)
1da177e4
LT		 2882{
2883#ifdef NETIF_F_TSO
2884 struct e1000_context_desc *context_desc;
545c67c0 2885 struct e1000_buffer *buffer_info;
1da177e4
LT		 2886 unsigned int i;
2887 uint32_t cmd_length = 0;
2d7edb92 2888 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2889 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2890 int err;
2891
89114afd 2892 if (skb_is_gso(skb)) {
1da177e4
LT		 2893 if (skb_header_cloned(skb)) {
2894 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2895 if (err)
2896 return err;
2897 }
2898
2899 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2900 mss = skb_shinfo(skb)->gso_size;
60828236 2901 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2902 skb->nh.iph->tot_len = 0;
2903 skb->nh.iph->check = 0;
2904 skb->h.th->check =
2905 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2906 skb->nh.iph->daddr,
2907 0,
2908 IPPROTO_TCP,
2909 0);
2910 cmd_length = E1000_TXD_CMD_IP;
2911 ipcse = skb->h.raw - skb->data - 1;
87ca4e5b 2912#ifdef NETIF_F_TSO6
e15fdd03 2913 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2914 skb->nh.ipv6h->payload_len = 0;
2915 skb->h.th->check =
2916 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2917 &skb->nh.ipv6h->daddr,
2918 0,
2919 IPPROTO_TCP,
2920 0);
2921 ipcse = 0;
2922#endif
2923 }
1da177e4
LT		 2924 ipcss = skb->nh.raw - skb->data;
2925 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2926 tucss = skb->h.raw - skb->data;
2927 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2928 tucse = 0;
2929
2930 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2931 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2932
581d708e
MC		 2933 i = tx_ring->next_to_use;
2934 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2935 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2936
2937 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2938 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2939 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2940 context_desc->upper_setup.tcp_fields.tucss = tucss;
2941 context_desc->upper_setup.tcp_fields.tucso = tucso;
2942 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2943 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2944 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2945 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2946
545c67c0 2947 buffer_info->time_stamp = jiffies;
a9ebadd6 2948 buffer_info->next_to_watch = i;
545c67c0 2949
581d708e
MC		 2950 if (++i == tx_ring->count) i = 0;
2951 tx_ring->next_to_use = i;
1da177e4 2952
8241e35e 2953 return TRUE;
1da177e4
LT		 2954 }
2955#endif
2956
8241e35e 2957 return FALSE;
1da177e4
LT		 2958}
2959
e619d523 2960static boolean_t
581d708e
MC		 2961e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2962 struct sk_buff *skb)
1da177e4
LT		 2963{
2964 struct e1000_context_desc *context_desc;
545c67c0 2965 struct e1000_buffer *buffer_info;
1da177e4
LT		 2966 unsigned int i;
2967 uint8_t css;
2968
84fa7933 2969 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2970 css = skb->h.raw - skb->data;
2971
581d708e 2972 i = tx_ring->next_to_use;
545c67c0 2973 buffer_info = &tx_ring->buffer_info[i];
581d708e 2974 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2975
2976 context_desc->upper_setup.tcp_fields.tucss = css;
ff1dcadb 2977 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
1da177e4
LT		 2978 context_desc->upper_setup.tcp_fields.tucse = 0;
2979 context_desc->tcp_seg_setup.data = 0;
2980 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2981
545c67c0 2982 buffer_info->time_stamp = jiffies;
a9ebadd6 2983 buffer_info->next_to_watch = i;
545c67c0 2984
581d708e
MC		 2985 if (unlikely(++i == tx_ring->count)) i = 0;
2986 tx_ring->next_to_use = i;
1da177e4
LT		 2987
2988 return TRUE;
2989 }
2990
2991 return FALSE;
2992}
2993
2994#define E1000_MAX_TXD_PWR 12
2995#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2996
e619d523 2997static int
581d708e
MC		 2998e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2999 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3000 unsigned int nr_frags, unsigned int mss)
1da177e4 3001{
1da177e4
LT		 3002 struct e1000_buffer *buffer_info;
3003 unsigned int len = skb->len;
3004 unsigned int offset = 0, size, count = 0, i;
3005 unsigned int f;
3006 len -= skb->data_len;
3007
3008 i = tx_ring->next_to_use;
3009
96838a40 3010 while (len) {
1da177e4
LT		 3011 buffer_info = &tx_ring->buffer_info[i];
3012 size = min(len, max_per_txd);
3013#ifdef NETIF_F_TSO
fd803241
JK		 3014 /* Workaround for Controller erratum --
3015 * descriptor for non-tso packet in a linear SKB that follows a
3016 * tso gets written back prematurely before the data is fully
0f15a8fa 3017 * DMA'd to the controller */
fd803241 3018 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 3019 !skb_is_gso(skb)) {
fd803241
JK		 3020 tx_ring->last_tx_tso = 0;
3021 size -= 4;
3022 }
3023
1da177e4
LT		 3024 /* Workaround for premature desc write-backs
3025 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3026 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 3027 size -= 4;
3028#endif
97338bde
MC		 3029 /* work-around for errata 10 and it applies
3030 * to all controllers in PCI-X mode
3031 * The fix is to make sure that the first descriptor of a
3032 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3033 */
96838a40 3034 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3035 (size > 2015) && count == 0))
3036 size = 2015;
96838a40 3037
1da177e4
LT		 3038 /* Workaround for potential 82544 hang in PCI-X. Avoid
3039 * terminating buffers within evenly-aligned dwords. */
96838a40 3040 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3041 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3042 size > 4))
3043 size -= 4;
3044
3045 buffer_info->length = size;
3046 buffer_info->dma =
3047 pci_map_single(adapter->pdev,
3048 skb->data + offset,
3049 size,
3050 PCI_DMA_TODEVICE);
3051 buffer_info->time_stamp = jiffies;
a9ebadd6 3052 buffer_info->next_to_watch = i;
1da177e4
LT		 3053
3054 len -= size;
3055 offset += size;
3056 count++;
96838a40 3057 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3058 }
3059
96838a40 3060 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 3061 struct skb_frag_struct *frag;
3062
3063 frag = &skb_shinfo(skb)->frags[f];
3064 len = frag->size;
3065 offset = frag->page_offset;
3066
96838a40 3067 while (len) {
1da177e4
LT		 3068 buffer_info = &tx_ring->buffer_info[i];
3069 size = min(len, max_per_txd);
3070#ifdef NETIF_F_TSO
3071 /* Workaround for premature desc write-backs
3072 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3073 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 3074 size -= 4;
3075#endif
3076 /* Workaround for potential 82544 hang in PCI-X.
3077 * Avoid terminating buffers within evenly-aligned
3078 * dwords. */
96838a40 3079 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3080 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3081 size > 4))
3082 size -= 4;
3083
3084 buffer_info->length = size;
3085 buffer_info->dma =
3086 pci_map_page(adapter->pdev,
3087 frag->page,
3088 offset,
3089 size,
3090 PCI_DMA_TODEVICE);
3091 buffer_info->time_stamp = jiffies;
a9ebadd6 3092 buffer_info->next_to_watch = i;
1da177e4
LT		 3093
3094 len -= size;
3095 offset += size;
3096 count++;
96838a40 3097 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3098 }
3099 }
3100
3101 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3102 tx_ring->buffer_info[i].skb = skb;
3103 tx_ring->buffer_info[first].next_to_watch = i;
3104
3105 return count;
3106}
3107
e619d523 3108static void
581d708e
MC		 3109e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3110 int tx_flags, int count)
1da177e4 3111{
1da177e4
LT		 3112 struct e1000_tx_desc *tx_desc = NULL;
3113 struct e1000_buffer *buffer_info;
3114 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3115 unsigned int i;
3116
96838a40 3117 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3118 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3119 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3120 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3121
96838a40 3122 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3123 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3124 }
3125
96838a40 3126 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3127 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3128 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3129 }
3130
96838a40 3131 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3132 txd_lower |= E1000_TXD_CMD_VLE;
3133 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3134 }
3135
3136 i = tx_ring->next_to_use;
3137
96838a40 3138 while (count--) {
1da177e4
LT		 3139 buffer_info = &tx_ring->buffer_info[i];
3140 tx_desc = E1000_TX_DESC(*tx_ring, i);
3141 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3142 tx_desc->lower.data =
3143 cpu_to_le32(txd_lower | buffer_info->length);
3144 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3145 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3146 }
3147
3148 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3149
3150 /* Force memory writes to complete before letting h/w
3151 * know there are new descriptors to fetch. (Only
3152 * applicable for weak-ordered memory model archs,
3153 * such as IA-64). */
3154 wmb();
3155
3156 tx_ring->next_to_use = i;
581d708e 3157 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2ce9047f
JB		 3158 /* we need this if more than one processor can write to our tail
3159 * at a time, it syncronizes IO on IA64/Altix systems */
3160 mmiowb();
1da177e4
LT		 3161}
3162
3163/**
3164 * 82547 workaround to avoid controller hang in half-duplex environment.
3165 * The workaround is to avoid queuing a large packet that would span
3166 * the internal Tx FIFO ring boundary by notifying the stack to resend
3167 * the packet at a later time. This gives the Tx FIFO an opportunity to
3168 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3169 * to the beginning of the Tx FIFO.
3170 **/
3171
3172#define E1000_FIFO_HDR 0x10
3173#define E1000_82547_PAD_LEN 0x3E0
3174
e619d523 3175static int
1da177e4
LT		 3176e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3177{
3178 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3179 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3180
3181 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3182
96838a40 3183 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3184 goto no_fifo_stall_required;
3185
96838a40 3186 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3187 return 1;
3188
96838a40 3189 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3190 atomic_set(&adapter->tx_fifo_stall, 1);
3191 return 1;
3192 }
3193
3194no_fifo_stall_required:
3195 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3196 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3197 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3198 return 0;
3199}
3200
2d7edb92 3201#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 3202static int
2d7edb92
MC		 3203e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3204{
3205 struct e1000_hw *hw = &adapter->hw;
3206 uint16_t length, offset;
96838a40
JB		 3207 if (vlan_tx_tag_present(skb)) {
3208 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 3209 ( adapter->hw.mng_cookie.status &
3210 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3211 return 0;
3212 }
20a44028 3213 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 3214 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 3215 if ((htons(ETH_P_IP) == eth->h_proto)) {
3216 const struct iphdr *ip =
2d7edb92 3217 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 3218 if (IPPROTO_UDP == ip->protocol) {
3219 struct udphdr *udp =
3220 (struct udphdr *)((uint8_t *)ip +
2d7edb92 3221 (ip->ihl << 2));
96838a40 3222 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 3223 offset = (uint8_t *)udp + 8 - skb->data;
3224 length = skb->len - offset;
3225
3226 return e1000_mng_write_dhcp_info(hw,
96838a40 3227 (uint8_t *)udp + 8,
2d7edb92
MC		 3228 length);
3229 }
3230 }
3231 }
3232 }
3233 return 0;
3234}
3235
65c7973f
JB		 3236static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3237{
3238 struct e1000_adapter *adapter = netdev_priv(netdev);
3239 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3240
3241 netif_stop_queue(netdev);
3242 /* Herbert's original patch had:
3243 * smp_mb__after_netif_stop_queue();
3244 * but since that doesn't exist yet, just open code it. */
3245 smp_mb();
3246
3247 /* We need to check again in a case another CPU has just
3248 * made room available. */
3249 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3250 return -EBUSY;
3251
3252 /* A reprieve! */
3253 netif_start_queue(netdev);
fcfb1224 3254 ++adapter->restart_queue;
65c7973f
JB		 3255 return 0;
3256}
3257
3258static int e1000_maybe_stop_tx(struct net_device *netdev,
3259 struct e1000_tx_ring *tx_ring, int size)
3260{
3261 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3262 return 0;
3263 return __e1000_maybe_stop_tx(netdev, size);
3264}
3265
1da177e4
LT		 3266#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3267static int
3268e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3269{
60490fe0 3270 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 3271 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3272 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3273 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3274 unsigned int tx_flags = 0;
3275 unsigned int len = skb->len;
3276 unsigned long flags;
3277 unsigned int nr_frags = 0;
3278 unsigned int mss = 0;
3279 int count = 0;
76c224bc 3280 int tso;
1da177e4
LT		 3281 unsigned int f;
3282 len -= skb->data_len;
3283
65c7973f
JB		 3284 /* This goes back to the question of how to logically map a tx queue
3285 * to a flow. Right now, performance is impacted slightly negatively
3286 * if using multiple tx queues. If the stack breaks away from a
3287 * single qdisc implementation, we can look at this again. */
581d708e 3288 tx_ring = adapter->tx_ring;
24025e4e 3289
581d708e 3290 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3291 dev_kfree_skb_any(skb);
3292 return NETDEV_TX_OK;
3293 }
3294
032fe6e9
JB		 3295 /* 82571 and newer doesn't need the workaround that limited descriptor
3296 * length to 4kB */
3297 if (adapter->hw.mac_type >= e1000_82571)
3298 max_per_txd = 8192;
3299
1da177e4 3300#ifdef NETIF_F_TSO
7967168c 3301 mss = skb_shinfo(skb)->gso_size;
76c224bc 3302 /* The controller does a simple calculation to
1da177e4
LT		 3303 * make sure there is enough room in the FIFO before
3304 * initiating the DMA for each buffer. The calc is:
3305 * 4 = ceil(buffer len/mss). To make sure we don't
3306 * overrun the FIFO, adjust the max buffer len if mss
3307 * drops. */
96838a40 3308 if (mss) {
9a3056da 3309 uint8_t hdr_len;
1da177e4
LT		 3310 max_per_txd = min(mss << 2, max_per_txd);
3311 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3312
90fb5135
AK		 3313 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3314 * points to just header, pull a few bytes of payload from
3315 * frags into skb->data */
9a3056da 3316 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 3317 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3318 switch (adapter->hw.mac_type) {
3319 unsigned int pull_size;
3320 case e1000_82571:
3321 case e1000_82572:
3322 case e1000_82573:
cd94dd0b 3323 case e1000_ich8lan:
9f687888
JK		 3324 pull_size = min((unsigned int)4, skb->data_len);
3325 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3326 DPRINTK(DRV, ERR,
9f687888
JK		 3327 "__pskb_pull_tail failed.\n");
3328 dev_kfree_skb_any(skb);
749dfc70 3329 return NETDEV_TX_OK;
9f687888
JK		 3330 }
3331 len = skb->len - skb->data_len;
3332 break;
3333 default:
3334 /* do nothing */
3335 break;
d74bbd3b 3336 }
9a3056da 3337 }
1da177e4
LT		 3338 }
3339
9a3056da 3340 /* reserve a descriptor for the offload context */
84fa7933 3341 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3342 count++;
2648345f 3343 count++;
1da177e4 3344#else
84fa7933 3345 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 3346 count++;
3347#endif
fd803241
JK		 3348
3349#ifdef NETIF_F_TSO
3350 /* Controller Erratum workaround */
89114afd 3351 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 3352 count++;
3353#endif
3354
1da177e4
LT		 3355 count += TXD_USE_COUNT(len, max_txd_pwr);
3356
96838a40 3357 if (adapter->pcix_82544)
1da177e4
LT		 3358 count++;
3359
96838a40 3360 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3361 * in PCI-X mode, so add one more descriptor to the count
3362 */
96838a40 3363 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3364 (len > 2015)))
3365 count++;
3366
1da177e4 3367 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3368 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3369 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3370 max_txd_pwr);
96838a40 3371 if (adapter->pcix_82544)
1da177e4
LT		 3372 count += nr_frags;
3373
0f15a8fa
JK		 3374
3375 if (adapter->hw.tx_pkt_filtering &&
3376 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3377 e1000_transfer_dhcp_info(adapter, skb);
3378
581d708e
MC		 3379 local_irq_save(flags);
3380 if (!spin_trylock(&tx_ring->tx_lock)) {
3381 /* Collision - tell upper layer to requeue */
3382 local_irq_restore(flags);
3383 return NETDEV_TX_LOCKED;
3384 }
1da177e4
LT		 3385
3386 /* need: count + 2 desc gap to keep tail from touching
3387 * head, otherwise try next time */
65c7973f 3388 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3389 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3390 return NETDEV_TX_BUSY;
3391 }
3392
96838a40
JB		 3393 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3394 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3395 netif_stop_queue(netdev);
1314bbf3 3396 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3397 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3398 return NETDEV_TX_BUSY;
3399 }
3400 }
3401
96838a40 3402 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3403 tx_flags |= E1000_TX_FLAGS_VLAN;
3404 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3405 }
3406
581d708e 3407 first = tx_ring->next_to_use;
96838a40 3408
581d708e 3409 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3410 if (tso < 0) {
3411 dev_kfree_skb_any(skb);
581d708e 3412 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3413 return NETDEV_TX_OK;
3414 }
3415
fd803241
JK		 3416 if (likely(tso)) {
3417 tx_ring->last_tx_tso = 1;
1da177e4 3418 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3419 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3420 tx_flags |= E1000_TX_FLAGS_CSUM;
3421
2d7edb92 3422 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3423 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3424 * no longer assume, we must. */
60828236 3425 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3426 tx_flags |= E1000_TX_FLAGS_IPV4;
3427
581d708e
MC		 3428 e1000_tx_queue(adapter, tx_ring, tx_flags,
3429 e1000_tx_map(adapter, tx_ring, skb, first,
3430 max_per_txd, nr_frags, mss));
1da177e4
LT		 3431
3432 netdev->trans_start = jiffies;
3433
3434 /* Make sure there is space in the ring for the next send. */
65c7973f 3435 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3436
581d708e 3437 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3438 return NETDEV_TX_OK;
3439}
3440
3441/**
3442 * e1000_tx_timeout - Respond to a Tx Hang
3443 * @netdev: network interface device structure
3444 **/
3445
3446static void
3447e1000_tx_timeout(struct net_device *netdev)
3448{
60490fe0 3449 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3450
3451 /* Do the reset outside of interrupt context */
87041639
JK		 3452 adapter->tx_timeout_count++;
3453 schedule_work(&adapter->reset_task);
1da177e4
LT		 3454}
3455
3456static void
65f27f38 3457e1000_reset_task(struct work_struct *work)
1da177e4 3458{
65f27f38
DH		 3459 struct e1000_adapter *adapter =
3460 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3461
2db10a08 3462 e1000_reinit_locked(adapter);
1da177e4
LT		 3463}
3464
3465/**
3466 * e1000_get_stats - Get System Network Statistics
3467 * @netdev: network interface device structure
3468 *
3469 * Returns the address of the device statistics structure.
3470 * The statistics are actually updated from the timer callback.
3471 **/
3472
3473static struct net_device_stats *
3474e1000_get_stats(struct net_device *netdev)
3475{
60490fe0 3476 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3477
6b7660cd 3478 /* only return the current stats */
1da177e4
LT		 3479 return &adapter->net_stats;
3480}
3481
3482/**
3483 * e1000_change_mtu - Change the Maximum Transfer Unit
3484 * @netdev: network interface device structure
3485 * @new_mtu: new value for maximum frame size
3486 *
3487 * Returns 0 on success, negative on failure
3488 **/
3489
3490static int
3491e1000_change_mtu(struct net_device *netdev, int new_mtu)
3492{
60490fe0 3493 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3494 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3495 uint16_t eeprom_data = 0;
1da177e4 3496
96838a40
JB		 3497 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3498 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3499 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3500 return -EINVAL;
2d7edb92 3501 }
1da177e4 3502
997f5cbd
JK		 3503 /* Adapter-specific max frame size limits. */
3504 switch (adapter->hw.mac_type) {
9e2feace 3505 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3506 case e1000_ich8lan:
997f5cbd
JK		 3507 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3508 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3509 return -EINVAL;
2d7edb92 3510 }
997f5cbd 3511 break;
85b22eb6 3512 case e1000_82573:
249d71d6
BA		 3513 /* Jumbo Frames not supported if:
3514 * - this is not an 82573L device
3515 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3516 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3517 &eeprom_data);
249d71d6
BA		 3518 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3519 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3520 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3521 DPRINTK(PROBE, ERR,
3522 "Jumbo Frames not supported.\n");
3523 return -EINVAL;
3524 }
3525 break;
3526 }
249d71d6
BA		 3527 /* ERT will be enabled later to enable wire speed receives */
3528
85b22eb6 3529 /* fall through to get support */
997f5cbd
JK		 3530 case e1000_82571:
3531 case e1000_82572:
87041639 3532 case e1000_80003es2lan:
997f5cbd
JK		 3533#define MAX_STD_JUMBO_FRAME_SIZE 9234
3534 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3535 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3536 return -EINVAL;
3537 }
3538 break;
3539 default:
3540 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3541 break;
1da177e4
LT		 3542 }
3543
87f5032e 3544 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3545 * means we reserve 2 more, this pushes us to allocate from the next
3546 * larger slab size
3547 * i.e. RXBUFFER_2048 --> size-4096 slab */
3548
3549 if (max_frame <= E1000_RXBUFFER_256)
3550 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3551 else if (max_frame <= E1000_RXBUFFER_512)
3552 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3553 else if (max_frame <= E1000_RXBUFFER_1024)
3554 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3555 else if (max_frame <= E1000_RXBUFFER_2048)
3556 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3557 else if (max_frame <= E1000_RXBUFFER_4096)
3558 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3559 else if (max_frame <= E1000_RXBUFFER_8192)
3560 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3561 else if (max_frame <= E1000_RXBUFFER_16384)
3562 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3563
3564 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3565 if (!adapter->hw.tbi_compatibility_on &&
3566 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3567 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3568 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3569
2d7edb92 3570 netdev->mtu = new_mtu;
83cd8279 3571 adapter->hw.max_frame_size = max_frame;
2d7edb92 3572
2db10a08
AK		 3573 if (netif_running(netdev))
3574 e1000_reinit_locked(adapter);
1da177e4 3575
1da177e4
LT		 3576 return 0;
3577}
3578
3579/**
3580 * e1000_update_stats - Update the board statistics counters
3581 * @adapter: board private structure
3582 **/
3583
3584void
3585e1000_update_stats(struct e1000_adapter *adapter)
3586{
3587 struct e1000_hw *hw = &adapter->hw;
282f33c9 3588 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3589 unsigned long flags;
3590 uint16_t phy_tmp;
3591
3592#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3593
282f33c9
LV		 3594 /*
3595 * Prevent stats update while adapter is being reset, or if the pci
3596 * connection is down.
3597 */
9026729b 3598 if (adapter->link_speed == 0)
282f33c9
LV		 3599 return;
3600 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3601 return;
3602
1da177e4
LT		 3603 spin_lock_irqsave(&adapter->stats_lock, flags);
3604
3605 /* these counters are modified from e1000_adjust_tbi_stats,
3606 * called from the interrupt context, so they must only
3607 * be written while holding adapter->stats_lock
3608 */
3609
3610 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3611 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3612 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3613 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3614 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3615 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3616 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3617
3618 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3619 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3620 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3621 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3622 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3623 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3624 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3625 }
1da177e4
LT		 3626
3627 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3628 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3629 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3630 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3631 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3632 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3633 adapter->stats.dc += E1000_READ_REG(hw, DC);
3634 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3635 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3636 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3637 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3638 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3639 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3640 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3641 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3642 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3643 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3644 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3645 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3646 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3647 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3648 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3649 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3650 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3651 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3652 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3653
3654 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3655 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3656 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3657 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3658 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3659 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3660 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3661 }
3662
1da177e4
LT		 3663 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3664 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3665
3666 /* used for adaptive IFS */
3667
3668 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3669 adapter->stats.tpt += hw->tx_packet_delta;
3670 hw->collision_delta = E1000_READ_REG(hw, COLC);
3671 adapter->stats.colc += hw->collision_delta;
3672
96838a40 3673 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3674 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3675 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3676 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3677 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3678 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3679 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3680 }
96838a40 3681 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3682 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3683 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3684
3685 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3686 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3687 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3688 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3689 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3690 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3691 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3692 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3693 }
2d7edb92 3694 }
1da177e4
LT		 3695
3696 /* Fill out the OS statistics structure */
1da177e4
LT		 3697 adapter->net_stats.rx_packets = adapter->stats.gprc;
3698 adapter->net_stats.tx_packets = adapter->stats.gptc;
3699 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3700 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3701 adapter->net_stats.multicast = adapter->stats.mprc;
3702 adapter->net_stats.collisions = adapter->stats.colc;
3703
3704 /* Rx Errors */
3705
87041639
JK		 3706 /* RLEC on some newer hardware can be incorrect so build
3707 * our own version based on RUC and ROC */
1da177e4
LT		 3708 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3709 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3710 adapter->stats.ruc + adapter->stats.roc +
3711 adapter->stats.cexterr;
49559854
MW		 3712 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3713 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3714 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3715 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3716 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3717
3718 /* Tx Errors */
49559854
MW		 3719 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3720 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3721 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3722 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3723 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
167fb284
JG		 3724 if (adapter->hw.bad_tx_carr_stats_fd &&
3725 adapter->link_duplex == FULL_DUPLEX) {
3726 adapter->net_stats.tx_carrier_errors = 0;
3727 adapter->stats.tncrs = 0;
3728 }
1da177e4
LT		 3729
3730 /* Tx Dropped needs to be maintained elsewhere */
3731
3732 /* Phy Stats */
96838a40
JB		 3733 if (hw->media_type == e1000_media_type_copper) {
3734 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3735 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3736 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3737 adapter->phy_stats.idle_errors += phy_tmp;
3738 }
3739
96838a40 3740 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3741 (hw->phy_type == e1000_phy_m88) &&
3742 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3743 adapter->phy_stats.receive_errors += phy_tmp;
3744 }
3745
15e376b4
JG		 3746 /* Management Stats */
3747 if (adapter->hw.has_smbus) {
3748 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3749 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3750 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3751 }
3752
1da177e4
LT		 3753 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3754}
9ac98284
JB		 3755#ifdef CONFIG_PCI_MSI
3756
3757/**
3758 * e1000_intr_msi - Interrupt Handler
3759 * @irq: interrupt number
3760 * @data: pointer to a network interface device structure
3761 **/
3762
3763static
3764irqreturn_t e1000_intr_msi(int irq, void *data)
3765{
3766 struct net_device *netdev = data;
3767 struct e1000_adapter *adapter = netdev_priv(netdev);
3768 struct e1000_hw *hw = &adapter->hw;
3769#ifndef CONFIG_E1000_NAPI
3770 int i;
3771#endif
3772
3773 /* this code avoids the read of ICR but has to get 1000 interrupts
3774 * at every link change event before it will notice the change */
3775 if (++adapter->detect_link >= 1000) {
3776 uint32_t icr = E1000_READ_REG(hw, ICR);
3777#ifdef CONFIG_E1000_NAPI
3778 /* read ICR disables interrupts using IAM, so keep up with our
3779 * enable/disable accounting */
3780 atomic_inc(&adapter->irq_sem);
3781#endif
3782 adapter->detect_link = 0;
3783 if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
3784 (icr & E1000_ICR_INT_ASSERTED)) {
3785 hw->get_link_status = 1;
3786 /* 80003ES2LAN workaround--
3787 * For packet buffer work-around on link down event;
3788 * disable receives here in the ISR and
3789 * reset adapter in watchdog
3790 */
3791 if (netif_carrier_ok(netdev) &&
3792 (adapter->hw.mac_type == e1000_80003es2lan)) {
3793 /* disable receives */
3794 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3795 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3796 }
3797 /* guard against interrupt when we're going down */
3798 if (!test_bit(__E1000_DOWN, &adapter->flags))
3799 mod_timer(&adapter->watchdog_timer,
3800 jiffies + 1);
3801 }
3802 } else {
3803 E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
3804 E1000_ICR_LSC)));
3805 /* bummer we have to flush here, but things break otherwise as
3806 * some event appears to be lost or delayed and throughput
3807 * drops. In almost all tests this flush is un-necessary */
3808 E1000_WRITE_FLUSH(hw);
3809#ifdef CONFIG_E1000_NAPI
3810 /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
3811 * masked. No need for the IMC write, but it does mean we
3812 * should account for it ASAP. */
3813 atomic_inc(&adapter->irq_sem);
3814#endif
3815 }
3816
3817#ifdef CONFIG_E1000_NAPI
835bb129
JB		 3818 if (likely(netif_rx_schedule_prep(netdev))) {
3819 adapter->total_tx_bytes = 0;
3820 adapter->total_tx_packets = 0;
3821 adapter->total_rx_bytes = 0;
3822 adapter->total_rx_packets = 0;
9ac98284 3823 __netif_rx_schedule(netdev);
835bb129 3824 } else
9ac98284
JB		 3825 e1000_irq_enable(adapter);
3826#else
835bb129
JB		 3827 adapter->total_tx_bytes = 0;
3828 adapter->total_rx_bytes = 0;
3829 adapter->total_tx_packets = 0;
3830 adapter->total_rx_packets = 0;
3831
9ac98284
JB		 3832 for (i = 0; i < E1000_MAX_INTR; i++)
3833 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3834 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3835 break;
835bb129
JB		 3836
3837 if (likely(adapter->itr_setting & 3))
3838 e1000_set_itr(adapter);
9ac98284
JB		 3839#endif
3840
3841 return IRQ_HANDLED;
3842}
3843#endif
1da177e4
LT		 3844
3845/**
3846 * e1000_intr - Interrupt Handler
3847 * @irq: interrupt number
3848 * @data: pointer to a network interface device structure
1da177e4
LT		 3849 **/
3850
3851static irqreturn_t
7d12e780 3852e1000_intr(int irq, void *data)
1da177e4
LT		 3853{
3854 struct net_device *netdev = data;
60490fe0 3855 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3856 struct e1000_hw *hw = &adapter->hw;
87041639 3857 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3858#ifndef CONFIG_E1000_NAPI
581d708e 3859 int i;
835bb129
JB		 3860#endif
3861 if (unlikely(!icr))
3862 return IRQ_NONE; /* Not our interrupt */
3863
3864#ifdef CONFIG_E1000_NAPI
3865 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3866 * not set, then the adapter didn't send an interrupt */
3867 if (unlikely(hw->mac_type >= e1000_82571 &&
3868 !(icr & E1000_ICR_INT_ASSERTED)))
3869 return IRQ_NONE;
3870
1e613fd9
JK		 3871 /* Interrupt Auto-Mask...upon reading ICR,
3872 * interrupts are masked. No need for the
3873 * IMC write, but it does mean we should
3874 * account for it ASAP. */
3875 if (likely(hw->mac_type >= e1000_82571))
3876 atomic_inc(&adapter->irq_sem);
be2b28ed 3877#endif
1da177e4 3878
96838a40 3879 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3880 hw->get_link_status = 1;
87041639
JK		 3881 /* 80003ES2LAN workaround--
3882 * For packet buffer work-around on link down event;
3883 * disable receives here in the ISR and
3884 * reset adapter in watchdog
3885 */
3886 if (netif_carrier_ok(netdev) &&
3887 (adapter->hw.mac_type == e1000_80003es2lan)) {
3888 /* disable receives */
3889 rctl = E1000_READ_REG(hw, RCTL);
3890 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3891 }
1314bbf3
AK		 3892 /* guard against interrupt when we're going down */
3893 if (!test_bit(__E1000_DOWN, &adapter->flags))
3894 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3895 }
3896
3897#ifdef CONFIG_E1000_NAPI
1e613fd9 3898 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3899 /* disable interrupts, without the synchronize_irq bit */
1e613fd9
JK		 3900 atomic_inc(&adapter->irq_sem);
3901 E1000_WRITE_REG(hw, IMC, ~0);
3902 E1000_WRITE_FLUSH(hw);
3903 }
835bb129
JB		 3904 if (likely(netif_rx_schedule_prep(netdev))) {
3905 adapter->total_tx_bytes = 0;
3906 adapter->total_tx_packets = 0;
3907 adapter->total_rx_bytes = 0;
3908 adapter->total_rx_packets = 0;
d3d9e484 3909 __netif_rx_schedule(netdev);
835bb129 3910 } else
90fb5135
AK		 3911 /* this really should not happen! if it does it is basically a
3912 * bug, but not a hard error, so enable ints and continue */
581d708e 3913 e1000_irq_enable(adapter);
c1605eb3 3914#else
1da177e4 3915 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3916 * Due to Hub Link bus being occupied, an interrupt
3917 * de-assertion message is not able to be sent.
3918 * When an interrupt assertion message is generated later,
3919 * two messages are re-ordered and sent out.
3920 * That causes APIC to think 82547 is in de-assertion
3921 * state, while 82547 is in assertion state, resulting
3922 * in dead lock. Writing IMC forces 82547 into
3923 * de-assertion state.
3924 */
3925 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3926 atomic_inc(&adapter->irq_sem);
2648345f 3927 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3928 }
3929
835bb129
JB		 3930 adapter->total_tx_bytes = 0;
3931 adapter->total_rx_bytes = 0;
3932 adapter->total_tx_packets = 0;
3933 adapter->total_rx_packets = 0;
3934
96838a40
JB		 3935 for (i = 0; i < E1000_MAX_INTR; i++)
3936 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3937 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3938 break;
3939
835bb129
JB		 3940 if (likely(adapter->itr_setting & 3))
3941 e1000_set_itr(adapter);
3942
96838a40 3943 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3944 e1000_irq_enable(adapter);
581d708e 3945
c1605eb3 3946#endif
1da177e4
LT		 3947 return IRQ_HANDLED;
3948}
3949
3950#ifdef CONFIG_E1000_NAPI
3951/**
3952 * e1000_clean - NAPI Rx polling callback
3953 * @adapter: board private structure
3954 **/
3955
3956static int
581d708e 3957e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3958{
581d708e
MC		 3959 struct e1000_adapter *adapter;
3960 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3961 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3962
3963 /* Must NOT use netdev_priv macro here. */
3964 adapter = poll_dev->priv;
3965
3966 /* Keep link state information with original netdev */
d3d9e484 3967 if (!netif_carrier_ok(poll_dev))
581d708e 3968 goto quit_polling;
2648345f 3969
d3d9e484
AK		 3970 /* e1000_clean is called per-cpu. This lock protects
3971 * tx_ring[0] from being cleaned by multiple cpus
3972 * simultaneously. A failure obtaining the lock means
3973 * tx_ring[0] is currently being cleaned anyway. */
3974 if (spin_trylock(&adapter->tx_queue_lock)) {
3975 tx_cleaned = e1000_clean_tx_irq(adapter,
3976 &adapter->tx_ring[0]);
3977 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3978 }
3979
d3d9e484 3980 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3981 &work_done, work_to_do);
1da177e4
LT		 3982
3983 *budget -= work_done;
581d708e 3984 poll_dev->quota -= work_done;
96838a40 3985
2b02893e 3986 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3987 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3988 !netif_running(poll_dev)) {
581d708e 3989quit_polling:
835bb129
JB		 3990 if (likely(adapter->itr_setting & 3))
3991 e1000_set_itr(adapter);
581d708e 3992 netif_rx_complete(poll_dev);
1da177e4
LT		 3993 e1000_irq_enable(adapter);
3994 return 0;
3995 }
3996
3997 return 1;
3998}
3999
4000#endif
4001/**
4002 * e1000_clean_tx_irq - Reclaim resources after transmit completes
4003 * @adapter: board private structure
4004 **/
4005
4006static boolean_t
581d708e
MC		 4007e1000_clean_tx_irq(struct e1000_adapter *adapter,
4008 struct e1000_tx_ring *tx_ring)
1da177e4 4009{
1da177e4
LT		 4010 struct net_device *netdev = adapter->netdev;
4011 struct e1000_tx_desc *tx_desc, *eop_desc;
4012 struct e1000_buffer *buffer_info;
4013 unsigned int i, eop;
2a1af5d7
JK		 4014#ifdef CONFIG_E1000_NAPI
4015 unsigned int count = 0;
4016#endif
1da177e4 4017 boolean_t cleaned = FALSE;
835bb129 4018 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 4019
4020 i = tx_ring->next_to_clean;
4021 eop = tx_ring->buffer_info[i].next_to_watch;
4022 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4023
581d708e 4024 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 4025 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 4026 tx_desc = E1000_TX_DESC(*tx_ring, i);
4027 buffer_info = &tx_ring->buffer_info[i];
4028 cleaned = (i == eop);
4029
835bb129 4030 if (cleaned) {
2b65326e
JB		 4031 struct sk_buff *skb = buffer_info->skb;
4032 unsigned int segs = skb_shinfo(skb)->gso_segs;
4033 total_tx_packets += segs;
835bb129 4034 total_tx_packets++;
2b65326e 4035 total_tx_bytes += skb->len;
835bb129 4036 }
fd803241 4037 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 4038 tx_desc->upper.data = 0;
1da177e4 4039
96838a40 4040 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 4041 }
581d708e 4042
1da177e4
LT		 4043 eop = tx_ring->buffer_info[i].next_to_watch;
4044 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 4045#ifdef CONFIG_E1000_NAPI
4046#define E1000_TX_WEIGHT 64
4047 /* weight of a sort for tx, to avoid endless transmit cleanup */
4048 if (count++ == E1000_TX_WEIGHT) break;
4049#endif
1da177e4
LT		 4050 }
4051
4052 tx_ring->next_to_clean = i;
4053
77b2aad5 4054#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 4055 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4056 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4057 /* Make sure that anybody stopping the queue after this
4058 * sees the new next_to_clean.
4059 */
4060 smp_mb();
fcfb1224 4061 if (netif_queue_stopped(netdev)) {
77b2aad5 4062 netif_wake_queue(netdev);
fcfb1224
JB		 4063 ++adapter->restart_queue;
4064 }
77b2aad5 4065 }
2648345f 4066
581d708e 4067 if (adapter->detect_tx_hung) {
2648345f 4068 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 4069 * check with the clearing of time_stamp and movement of i */
4070 adapter->detect_tx_hung = FALSE;
392137fa
JK		 4071 if (tx_ring->buffer_info[eop].dma &&
4072 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 4073 (adapter->tx_timeout_factor * HZ))
70b8f1e1 4074 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 4075 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 4076
4077 /* detected Tx unit hang */
c6963ef5 4078 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 4079 " Tx Queue <%lu>\n"
70b8f1e1
MC		 4080 " TDH <%x>\n"
4081 " TDT <%x>\n"
4082 " next_to_use <%x>\n"
4083 " next_to_clean <%x>\n"
4084 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 4085 " time_stamp <%lx>\n"
4086 " next_to_watch <%x>\n"
4087 " jiffies <%lx>\n"
4088 " next_to_watch.status <%x>\n",
7bfa4816
JK		 4089 (unsigned long)((tx_ring - adapter->tx_ring) /
4090 sizeof(struct e1000_tx_ring)),
581d708e
MC		 4091 readl(adapter->hw.hw_addr + tx_ring->tdh),
4092 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 4093 tx_ring->next_to_use,
392137fa
JK		 4094 tx_ring->next_to_clean,
4095 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 4096 eop,
4097 jiffies,
4098 eop_desc->upper.fields.status);
1da177e4 4099 netif_stop_queue(netdev);
70b8f1e1 4100 }
1da177e4 4101 }
835bb129
JB		 4102 adapter->total_tx_bytes += total_tx_bytes;
4103 adapter->total_tx_packets += total_tx_packets;
1da177e4
LT		 4104 return cleaned;
4105}
4106
4107/**
4108 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 4109 * @adapter: board private structure
4110 * @status_err: receive descriptor status and error fields
4111 * @csum: receive descriptor csum field
4112 * @sk_buff: socket buffer with received data
1da177e4
LT		 4113 **/
4114
e619d523 4115static void
1da177e4 4116e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 4117 uint32_t status_err, uint32_t csum,
4118 struct sk_buff *skb)
1da177e4 4119{
2d7edb92
MC		 4120 uint16_t status = (uint16_t)status_err;
4121 uint8_t errors = (uint8_t)(status_err >> 24);
4122 skb->ip_summed = CHECKSUM_NONE;
4123
1da177e4 4124 /* 82543 or newer only */
96838a40 4125 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 4126 /* Ignore Checksum bit is set */
96838a40 4127 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 4128 /* TCP/UDP checksum error bit is set */
96838a40 4129 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 4130 /* let the stack verify checksum errors */
1da177e4 4131 adapter->hw_csum_err++;
2d7edb92
MC		 4132 return;
4133 }
4134 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 4135 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4136 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 4137 return;
1da177e4 4138 } else {
96838a40 4139 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 4140 return;
4141 }
4142 /* It must be a TCP or UDP packet with a valid checksum */
4143 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 4144 /* TCP checksum is good */
4145 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 4146 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4147 /* IP fragment with UDP payload */
4148 /* Hardware complements the payload checksum, so we undo it
4149 * and then put the value in host order for further stack use.
4150 */
4151 csum = ntohl(csum ^ 0xFFFF);
4152 skb->csum = csum;
84fa7933 4153 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 4154 }
2d7edb92 4155 adapter->hw_csum_good++;
1da177e4
LT		 4156}
4157
4158/**
2d7edb92 4159 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 4160 * @adapter: board private structure
4161 **/
4162
4163static boolean_t
4164#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4165e1000_clean_rx_irq(struct e1000_adapter *adapter,
4166 struct e1000_rx_ring *rx_ring,
4167 int *work_done, int work_to_do)
1da177e4 4168#else
581d708e
MC		 4169e1000_clean_rx_irq(struct e1000_adapter *adapter,
4170 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 4171#endif
4172{
1da177e4
LT		 4173 struct net_device *netdev = adapter->netdev;
4174 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4175 struct e1000_rx_desc *rx_desc, *next_rxd;
4176 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 4177 unsigned long flags;
4178 uint32_t length;
4179 uint8_t last_byte;
4180 unsigned int i;
72d64a43 4181 int cleaned_count = 0;
a1415ee6 4182 boolean_t cleaned = FALSE;
835bb129 4183 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4184
4185 i = rx_ring->next_to_clean;
4186 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4187 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4188
b92ff8ee 4189 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4190 struct sk_buff *skb;
a292ca6e 4191 u8 status;
90fb5135 4192
1da177e4 4193#ifdef CONFIG_E1000_NAPI
96838a40 4194 if (*work_done >= work_to_do)
1da177e4
LT		 4195 break;
4196 (*work_done)++;
4197#endif
a292ca6e 4198 status = rx_desc->status;
b92ff8ee 4199 skb = buffer_info->skb;
86c3d59f
JB		 4200 buffer_info->skb = NULL;
4201
30320be8
JK		 4202 prefetch(skb->data - NET_IP_ALIGN);
4203
86c3d59f
JB		 4204 if (++i == rx_ring->count) i = 0;
4205 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4206 prefetch(next_rxd);
4207
86c3d59f 4208 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4209
72d64a43
JK		 4210 cleaned = TRUE;
4211 cleaned_count++;
a292ca6e
JK		 4212 pci_unmap_single(pdev,
4213 buffer_info->dma,
4214 buffer_info->length,
1da177e4
LT		 4215 PCI_DMA_FROMDEVICE);
4216
1da177e4
LT		 4217 length = le16_to_cpu(rx_desc->length);
4218
a1415ee6
JK		 4219 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4220 /* All receives must fit into a single buffer */
4221 E1000_DBG("%s: Receive packet consumed multiple"
4222 " buffers\n", netdev->name);
864c4e45 4223 /* recycle */
8fc897b0 4224 buffer_info->skb = skb;
1da177e4
LT		 4225 goto next_desc;
4226 }
4227
96838a40 4228 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4229 last_byte = *(skb->data + length - 1);
b92ff8ee 4230 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 4231 rx_desc->errors, length, last_byte)) {
4232 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 4233 e1000_tbi_adjust_stats(&adapter->hw,
4234 &adapter->stats,
1da177e4
LT		 4235 length, skb->data);
4236 spin_unlock_irqrestore(&adapter->stats_lock,
4237 flags);
4238 length--;
4239 } else {
9e2feace
AK		 4240 /* recycle */
4241 buffer_info->skb = skb;
1da177e4
LT		 4242 goto next_desc;
4243 }
1cb5821f 4244 }
1da177e4 4245
d2a1e213
JB		 4246 /* adjust length to remove Ethernet CRC, this must be
4247 * done after the TBI_ACCEPT workaround above */
4248 length -= 4;
4249
835bb129
JB		 4250 /* probably a little skewed due to removing CRC */
4251 total_rx_bytes += length;
4252 total_rx_packets++;
4253
a292ca6e
JK		 4254 /* code added for copybreak, this should improve
4255 * performance for small packets with large amounts
4256 * of reassembly being done in the stack */
1f753861 4257 if (length < copybreak) {
a292ca6e 4258 struct sk_buff *new_skb =
87f5032e 4259 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4260 if (new_skb) {
4261 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 4262 memcpy(new_skb->data - NET_IP_ALIGN,
4263 skb->data - NET_IP_ALIGN,
4264 length + NET_IP_ALIGN);
4265 /* save the skb in buffer_info as good */
4266 buffer_info->skb = skb;
4267 skb = new_skb;
a292ca6e 4268 }
996695de
AK		 4269 /* else just continue with the old one */
4270 }
a292ca6e 4271 /* end copybreak code */
996695de 4272 skb_put(skb, length);
1da177e4
LT		 4273
4274 /* Receive Checksum Offload */
a292ca6e
JK		 4275 e1000_rx_checksum(adapter,
4276 (uint32_t)(status) |
2d7edb92 4277 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 4278 le16_to_cpu(rx_desc->csum), skb);
96838a40 4279
1da177e4
LT		 4280 skb->protocol = eth_type_trans(skb, netdev);
4281#ifdef CONFIG_E1000_NAPI
96838a40 4282 if (unlikely(adapter->vlgrp &&
a292ca6e 4283 (status & E1000_RXD_STAT_VP))) {
1da177e4 4284 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 4285 le16_to_cpu(rx_desc->special) &
4286 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 4287 } else {
4288 netif_receive_skb(skb);
4289 }
4290#else /* CONFIG_E1000_NAPI */
96838a40 4291 if (unlikely(adapter->vlgrp &&
b92ff8ee 4292 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 4293 vlan_hwaccel_rx(skb, adapter->vlgrp,
4294 le16_to_cpu(rx_desc->special) &
4295 E1000_RXD_SPC_VLAN_MASK);
4296 } else {
4297 netif_rx(skb);
4298 }
4299#endif /* CONFIG_E1000_NAPI */
4300 netdev->last_rx = jiffies;
4301
4302next_desc:
4303 rx_desc->status = 0;
1da177e4 4304
72d64a43
JK		 4305 /* return some buffers to hardware, one at a time is too slow */
4306 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4307 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4308 cleaned_count = 0;
4309 }
4310
30320be8 4311 /* use prefetched values */
86c3d59f
JB		 4312 rx_desc = next_rxd;
4313 buffer_info = next_buffer;
1da177e4 4314 }
1da177e4 4315 rx_ring->next_to_clean = i;
72d64a43
JK		 4316
4317 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4318 if (cleaned_count)
4319 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4320
835bb129
JB		 4321 adapter->total_rx_packets += total_rx_packets;
4322 adapter->total_rx_bytes += total_rx_bytes;
2d7edb92
MC		 4323 return cleaned;
4324}
4325
4326/**
4327 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4328 * @adapter: board private structure
4329 **/
4330
4331static boolean_t
4332#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4333e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4334 struct e1000_rx_ring *rx_ring,
4335 int *work_done, int work_to_do)
2d7edb92 4336#else
581d708e
MC		 4337e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4338 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 4339#endif
4340{
86c3d59f 4341 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 4342 struct net_device *netdev = adapter->netdev;
4343 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4344 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 4345 struct e1000_ps_page *ps_page;
4346 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 4347 struct sk_buff *skb;
2d7edb92
MC		 4348 unsigned int i, j;
4349 uint32_t length, staterr;
72d64a43 4350 int cleaned_count = 0;
2d7edb92 4351 boolean_t cleaned = FALSE;
835bb129 4352 unsigned int total_rx_bytes=0, total_rx_packets=0;
2d7edb92
MC		 4353
4354 i = rx_ring->next_to_clean;
4355 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 4356 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 4357 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 4358
96838a40 4359 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 4360 ps_page = &rx_ring->ps_page[i];
4361 ps_page_dma = &rx_ring->ps_page_dma[i];
4362#ifdef CONFIG_E1000_NAPI
96838a40 4363 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 4364 break;
4365 (*work_done)++;
4366#endif
86c3d59f
JB		 4367 skb = buffer_info->skb;
4368
30320be8
JK		 4369 /* in the packet split case this is header only */
4370 prefetch(skb->data - NET_IP_ALIGN);
4371
86c3d59f
JB		 4372 if (++i == rx_ring->count) i = 0;
4373 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 4374 prefetch(next_rxd);
4375
86c3d59f 4376 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4377
2d7edb92 4378 cleaned = TRUE;
72d64a43 4379 cleaned_count++;
2d7edb92
MC		 4380 pci_unmap_single(pdev, buffer_info->dma,
4381 buffer_info->length,
4382 PCI_DMA_FROMDEVICE);
4383
96838a40 4384 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 4385 E1000_DBG("%s: Packet Split buffers didn't pick up"
4386 " the full packet\n", netdev->name);
4387 dev_kfree_skb_irq(skb);
4388 goto next_desc;
4389 }
1da177e4 4390
96838a40 4391 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 4392 dev_kfree_skb_irq(skb);
4393 goto next_desc;
4394 }
4395
4396 length = le16_to_cpu(rx_desc->wb.middle.length0);
4397
96838a40 4398 if (unlikely(!length)) {
2d7edb92
MC		 4399 E1000_DBG("%s: Last part of the packet spanning"
4400 " multiple descriptors\n", netdev->name);
4401 dev_kfree_skb_irq(skb);
4402 goto next_desc;
4403 }
4404
4405 /* Good Receive */
4406 skb_put(skb, length);
4407
dc7c6add
JK		 4408 {
4409 /* this looks ugly, but it seems compiler issues make it
4410 more efficient than reusing j */
4411 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4412
4413 /* page alloc/put takes too long and effects small packet
4414 * throughput, so unsplit small packets and save the alloc/put*/
1f753861 4415 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 4416 u8 *vaddr;
76c224bc 4417 /* there is no documentation about how to call
dc7c6add
JK		 4418 * kmap_atomic, so we can't hold the mapping
4419 * very long */
4420 pci_dma_sync_single_for_cpu(pdev,
4421 ps_page_dma->ps_page_dma[0],
4422 PAGE_SIZE,
4423 PCI_DMA_FROMDEVICE);
4424 vaddr = kmap_atomic(ps_page->ps_page[0],
4425 KM_SKB_DATA_SOFTIRQ);
4426 memcpy(skb->tail, vaddr, l1);
4427 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4428 pci_dma_sync_single_for_device(pdev,
4429 ps_page_dma->ps_page_dma[0],
4430 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 4431 /* remove the CRC */
4432 l1 -= 4;
dc7c6add 4433 skb_put(skb, l1);
dc7c6add
JK		 4434 goto copydone;
4435 } /* if */
4436 }
90fb5135 4437
96838a40 4438 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 4439 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 4440 break;
2d7edb92
MC		 4441 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4442 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4443 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4444 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4445 length);
2d7edb92 4446 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4447 skb->len += length;
4448 skb->data_len += length;
5d51b80f 4449 skb->truesize += length;
2d7edb92
MC		 4450 }
4451
f235a2ab
AK		 4452 /* strip the ethernet crc, problem is we're using pages now so
4453 * this whole operation can get a little cpu intensive */
4454 pskb_trim(skb, skb->len - 4);
4455
dc7c6add 4456copydone:
835bb129
JB		 4457 total_rx_bytes += skb->len;
4458 total_rx_packets++;
4459
2d7edb92 4460 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4461 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4462 skb->protocol = eth_type_trans(skb, netdev);
4463
96838a40 4464 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4465 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4466 adapter->rx_hdr_split++;
2d7edb92 4467#ifdef CONFIG_E1000_NAPI
96838a40 4468 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4469 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4470 le16_to_cpu(rx_desc->wb.middle.vlan) &
4471 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4472 } else {
4473 netif_receive_skb(skb);
4474 }
4475#else /* CONFIG_E1000_NAPI */
96838a40 4476 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4477 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4478 le16_to_cpu(rx_desc->wb.middle.vlan) &
4479 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4480 } else {
4481 netif_rx(skb);
4482 }
4483#endif /* CONFIG_E1000_NAPI */
4484 netdev->last_rx = jiffies;
4485
4486next_desc:
c3d7a3a4 4487 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4488 buffer_info->skb = NULL;
2d7edb92 4489
72d64a43
JK		 4490 /* return some buffers to hardware, one at a time is too slow */
4491 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4492 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4493 cleaned_count = 0;
4494 }
4495
30320be8 4496 /* use prefetched values */
86c3d59f
JB		 4497 rx_desc = next_rxd;
4498 buffer_info = next_buffer;
4499
683a38f3 4500 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4501 }
4502 rx_ring->next_to_clean = i;
72d64a43
JK		 4503
4504 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4505 if (cleaned_count)
4506 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4 4507
835bb129
JB		 4508 adapter->total_rx_packets += total_rx_packets;
4509 adapter->total_rx_bytes += total_rx_bytes;
1da177e4
LT		 4510 return cleaned;
4511}
4512
4513/**
2d7edb92 4514 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4515 * @adapter: address of board private structure
4516 **/
4517
4518static void
581d708e 4519e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4520 struct e1000_rx_ring *rx_ring,
a292ca6e 4521 int cleaned_count)
1da177e4 4522{
1da177e4
LT		 4523 struct net_device *netdev = adapter->netdev;
4524 struct pci_dev *pdev = adapter->pdev;
4525 struct e1000_rx_desc *rx_desc;
4526 struct e1000_buffer *buffer_info;
4527 struct sk_buff *skb;
2648345f
MC		 4528 unsigned int i;
4529 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4530
4531 i = rx_ring->next_to_use;
4532 buffer_info = &rx_ring->buffer_info[i];
4533
a292ca6e 4534 while (cleaned_count--) {
ca6f7224
CH		 4535 skb = buffer_info->skb;
4536 if (skb) {
a292ca6e
JK		 4537 skb_trim(skb, 0);
4538 goto map_skb;
4539 }
4540
ca6f7224 4541 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4542 if (unlikely(!skb)) {
1da177e4 4543 /* Better luck next round */
72d64a43 4544 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4545 break;
4546 }
4547
2648345f 4548 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4549 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4550 struct sk_buff *oldskb = skb;
2648345f
MC		 4551 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4552 "at %p\n", bufsz, skb->data);
4553 /* Try again, without freeing the previous */
87f5032e 4554 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4555 /* Failed allocation, critical failure */
1da177e4
LT		 4556 if (!skb) {
4557 dev_kfree_skb(oldskb);
4558 break;
4559 }
2648345f 4560
1da177e4
LT		 4561 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4562 /* give up */
4563 dev_kfree_skb(skb);
4564 dev_kfree_skb(oldskb);
4565 break; /* while !buffer_info->skb */
1da177e4 4566 }
ca6f7224
CH		 4567
4568 /* Use new allocation */
4569 dev_kfree_skb(oldskb);
1da177e4 4570 }
1da177e4
LT		 4571 /* Make buffer alignment 2 beyond a 16 byte boundary
4572 * this will result in a 16 byte aligned IP header after
4573 * the 14 byte MAC header is removed
4574 */
4575 skb_reserve(skb, NET_IP_ALIGN);
4576
1da177e4
LT		 4577 buffer_info->skb = skb;
4578 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4579map_skb:
1da177e4
LT		 4580 buffer_info->dma = pci_map_single(pdev,
4581 skb->data,
4582 adapter->rx_buffer_len,
4583 PCI_DMA_FROMDEVICE);
4584
2648345f
MC		 4585 /* Fix for errata 23, can't cross 64kB boundary */
4586 if (!e1000_check_64k_bound(adapter,
4587 (void *)(unsigned long)buffer_info->dma,
4588 adapter->rx_buffer_len)) {
4589 DPRINTK(RX_ERR, ERR,
4590 "dma align check failed: %u bytes at %p\n",
4591 adapter->rx_buffer_len,
4592 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4593 dev_kfree_skb(skb);
4594 buffer_info->skb = NULL;
4595
2648345f 4596 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4597 adapter->rx_buffer_len,
4598 PCI_DMA_FROMDEVICE);
4599
4600 break; /* while !buffer_info->skb */
4601 }
1da177e4
LT		 4602 rx_desc = E1000_RX_DESC(*rx_ring, i);
4603 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4604
96838a40
JB		 4605 if (unlikely(++i == rx_ring->count))
4606 i = 0;
1da177e4
LT		 4607 buffer_info = &rx_ring->buffer_info[i];
4608 }
4609
b92ff8ee
JB		 4610 if (likely(rx_ring->next_to_use != i)) {
4611 rx_ring->next_to_use = i;
4612 if (unlikely(i-- == 0))
4613 i = (rx_ring->count - 1);
4614
4615 /* Force memory writes to complete before letting h/w
4616 * know there are new descriptors to fetch. (Only
4617 * applicable for weak-ordered memory model archs,
4618 * such as IA-64). */
4619 wmb();
4620 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4621 }
1da177e4
LT		 4622}
4623
2d7edb92
MC		 4624/**
4625 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4626 * @adapter: address of board private structure
4627 **/
4628
4629static void
581d708e 4630e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4631 struct e1000_rx_ring *rx_ring,
4632 int cleaned_count)
2d7edb92 4633{
2d7edb92
MC		 4634 struct net_device *netdev = adapter->netdev;
4635 struct pci_dev *pdev = adapter->pdev;
4636 union e1000_rx_desc_packet_split *rx_desc;
4637 struct e1000_buffer *buffer_info;
4638 struct e1000_ps_page *ps_page;
4639 struct e1000_ps_page_dma *ps_page_dma;
4640 struct sk_buff *skb;
4641 unsigned int i, j;
4642
4643 i = rx_ring->next_to_use;
4644 buffer_info = &rx_ring->buffer_info[i];
4645 ps_page = &rx_ring->ps_page[i];
4646 ps_page_dma = &rx_ring->ps_page_dma[i];
4647
72d64a43 4648 while (cleaned_count--) {
2d7edb92
MC		 4649 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4650
96838a40 4651 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4652 if (j < adapter->rx_ps_pages) {
4653 if (likely(!ps_page->ps_page[j])) {
4654 ps_page->ps_page[j] =
4655 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4656 if (unlikely(!ps_page->ps_page[j])) {
4657 adapter->alloc_rx_buff_failed++;
e4c811c9 4658 goto no_buffers;
b92ff8ee 4659 }
e4c811c9
MC		 4660 ps_page_dma->ps_page_dma[j] =
4661 pci_map_page(pdev,
4662 ps_page->ps_page[j],
4663 0, PAGE_SIZE,
4664 PCI_DMA_FROMDEVICE);
4665 }
4666 /* Refresh the desc even if buffer_addrs didn't
96838a40 4667 * change because each write-back erases
e4c811c9
MC		 4668 * this info.
4669 */
4670 rx_desc->read.buffer_addr[j+1] =
4671 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4672 } else
4673 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4674 }
4675
87f5032e 4676 skb = netdev_alloc_skb(netdev,
90fb5135 4677 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4678
b92ff8ee
JB		 4679 if (unlikely(!skb)) {
4680 adapter->alloc_rx_buff_failed++;
2d7edb92 4681 break;
b92ff8ee 4682 }
2d7edb92
MC		 4683
4684 /* Make buffer alignment 2 beyond a 16 byte boundary
4685 * this will result in a 16 byte aligned IP header after
4686 * the 14 byte MAC header is removed
4687 */
4688 skb_reserve(skb, NET_IP_ALIGN);
4689
2d7edb92
MC		 4690 buffer_info->skb = skb;
4691 buffer_info->length = adapter->rx_ps_bsize0;
4692 buffer_info->dma = pci_map_single(pdev, skb->data,
4693 adapter->rx_ps_bsize0,
4694 PCI_DMA_FROMDEVICE);
4695
4696 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4697
96838a40 4698 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4699 buffer_info = &rx_ring->buffer_info[i];
4700 ps_page = &rx_ring->ps_page[i];
4701 ps_page_dma = &rx_ring->ps_page_dma[i];
4702 }
4703
4704no_buffers:
b92ff8ee
JB		 4705 if (likely(rx_ring->next_to_use != i)) {
4706 rx_ring->next_to_use = i;
4707 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4708
4709 /* Force memory writes to complete before letting h/w
4710 * know there are new descriptors to fetch. (Only
4711 * applicable for weak-ordered memory model archs,
4712 * such as IA-64). */
4713 wmb();
4714 /* Hardware increments by 16 bytes, but packet split
4715 * descriptors are 32 bytes...so we increment tail
4716 * twice as much.
4717 */
4718 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4719 }
2d7edb92
MC		 4720}
4721
1da177e4
LT		 4722/**
4723 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4724 * @adapter:
4725 **/
4726
4727static void
4728e1000_smartspeed(struct e1000_adapter *adapter)
4729{
4730 uint16_t phy_status;
4731 uint16_t phy_ctrl;
4732
96838a40 4733 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4734 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4735 return;
4736
96838a40 4737 if (adapter->smartspeed == 0) {
1da177e4
LT		 4738 /* If Master/Slave config fault is asserted twice,
4739 * we assume back-to-back */
4740 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4741 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4742 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4743 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4744 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4745 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4746 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4747 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4748 phy_ctrl);
4749 adapter->smartspeed++;
96838a40 4750 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4751 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4752 &phy_ctrl)) {
4753 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4754 MII_CR_RESTART_AUTO_NEG);
4755 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4756 phy_ctrl);
4757 }
4758 }
4759 return;
96838a40 4760 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4761 /* If still no link, perhaps using 2/3 pair cable */
4762 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4763 phy_ctrl |= CR_1000T_MS_ENABLE;
4764 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4765 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4766 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4767 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4768 MII_CR_RESTART_AUTO_NEG);
4769 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4770 }
4771 }
4772 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4773 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4774 adapter->smartspeed = 0;
4775}
4776
4777/**
4778 * e1000_ioctl -
4779 * @netdev:
4780 * @ifreq:
4781 * @cmd:
4782 **/
4783
4784static int
4785e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4786{
4787 switch (cmd) {
4788 case SIOCGMIIPHY:
4789 case SIOCGMIIREG:
4790 case SIOCSMIIREG:
4791 return e1000_mii_ioctl(netdev, ifr, cmd);
4792 default:
4793 return -EOPNOTSUPP;
4794 }
4795}
4796
4797/**
4798 * e1000_mii_ioctl -
4799 * @netdev:
4800 * @ifreq:
4801 * @cmd:
4802 **/
4803
4804static int
4805e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4806{
60490fe0 4807 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4808 struct mii_ioctl_data *data = if_mii(ifr);
4809 int retval;
4810 uint16_t mii_reg;
4811 uint16_t spddplx;
97876fc6 4812 unsigned long flags;
1da177e4 4813
96838a40 4814 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4815 return -EOPNOTSUPP;
4816
4817 switch (cmd) {
4818 case SIOCGMIIPHY:
4819 data->phy_id = adapter->hw.phy_addr;
4820 break;
4821 case SIOCGMIIREG:
96838a40 4822 if (!capable(CAP_NET_ADMIN))
1da177e4 4823 return -EPERM;
97876fc6 4824 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4825 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4826 &data->val_out)) {
4827 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4828 return -EIO;
97876fc6
MC		 4829 }
4830 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4831 break;
4832 case SIOCSMIIREG:
96838a40 4833 if (!capable(CAP_NET_ADMIN))
1da177e4 4834 return -EPERM;
96838a40 4835 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4836 return -EFAULT;
4837 mii_reg = data->val_in;
97876fc6 4838 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4839 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4840 mii_reg)) {
4841 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4842 return -EIO;
97876fc6 4843 }
dc86d32a 4844 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4845 switch (data->reg_num) {
4846 case PHY_CTRL:
96838a40 4847 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4848 break;
96838a40 4849 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4850 adapter->hw.autoneg = 1;
4851 adapter->hw.autoneg_advertised = 0x2F;
4852 } else {
4853 if (mii_reg & 0x40)
4854 spddplx = SPEED_1000;
4855 else if (mii_reg & 0x2000)
4856 spddplx = SPEED_100;
4857 else
4858 spddplx = SPEED_10;
4859 spddplx += (mii_reg & 0x100)
cb764326
JK		 4860 ? DUPLEX_FULL :
4861 DUPLEX_HALF;
1da177e4
LT		 4862 retval = e1000_set_spd_dplx(adapter,
4863 spddplx);
96838a40 4864 if (retval) {
97876fc6 4865 spin_unlock_irqrestore(
96838a40 4866 &adapter->stats_lock,
97876fc6 4867 flags);
1da177e4 4868 return retval;
97876fc6 4869 }
1da177e4 4870 }
2db10a08
AK		 4871 if (netif_running(adapter->netdev))
4872 e1000_reinit_locked(adapter);
4873 else
1da177e4
LT		 4874 e1000_reset(adapter);
4875 break;
4876 case M88E1000_PHY_SPEC_CTRL:
4877 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4878 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4879 spin_unlock_irqrestore(
4880 &adapter->stats_lock, flags);
1da177e4 4881 return -EIO;
97876fc6 4882 }
1da177e4
LT		 4883 break;
4884 }
4885 } else {
4886 switch (data->reg_num) {
4887 case PHY_CTRL:
96838a40 4888 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4889 break;
2db10a08
AK		 4890 if (netif_running(adapter->netdev))
4891 e1000_reinit_locked(adapter);
4892 else
1da177e4
LT		 4893 e1000_reset(adapter);
4894 break;
4895 }
4896 }
97876fc6 4897 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4898 break;
4899 default:
4900 return -EOPNOTSUPP;
4901 }
4902 return E1000_SUCCESS;
4903}
4904
4905void
4906e1000_pci_set_mwi(struct e1000_hw *hw)
4907{
4908 struct e1000_adapter *adapter = hw->back;
2648345f 4909 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4910
96838a40 4911 if (ret_val)
2648345f 4912 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4913}
4914
4915void
4916e1000_pci_clear_mwi(struct e1000_hw *hw)
4917{
4918 struct e1000_adapter *adapter = hw->back;
4919
4920 pci_clear_mwi(adapter->pdev);
4921}
4922
4923void
4924e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4925{
4926 struct e1000_adapter *adapter = hw->back;
4927
4928 pci_read_config_word(adapter->pdev, reg, value);
4929}
4930
4931void
4932e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4933{
4934 struct e1000_adapter *adapter = hw->back;
4935
4936 pci_write_config_word(adapter->pdev, reg, *value);
4937}
4938
caeccb68
JK		 4939int32_t
4940e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4941{
4942 struct e1000_adapter *adapter = hw->back;
4943 uint16_t cap_offset;
4944
4945 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4946 if (!cap_offset)
4947 return -E1000_ERR_CONFIG;
4948
4949 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4950
4951 return E1000_SUCCESS;
4952}
4953
1da177e4
LT		 4954void
4955e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4956{
4957 outl(value, port);
4958}
4959
4960static void
4961e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4962{
60490fe0 4963 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4964 uint32_t ctrl, rctl;
4965
4966 e1000_irq_disable(adapter);
4967 adapter->vlgrp = grp;
4968
96838a40 4969 if (grp) {
1da177e4
LT		 4970 /* enable VLAN tag insert/strip */
4971 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4972 ctrl |= E1000_CTRL_VME;
4973 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4974
cd94dd0b 4975 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4976 /* enable VLAN receive filtering */
4977 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4978 rctl |= E1000_RCTL_VFE;
4979 rctl &= ~E1000_RCTL_CFIEN;
4980 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4981 e1000_update_mng_vlan(adapter);
cd94dd0b 4982 }
1da177e4
LT		 4983 } else {
4984 /* disable VLAN tag insert/strip */
4985 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4986 ctrl &= ~E1000_CTRL_VME;
4987 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4988
cd94dd0b 4989 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4990 /* disable VLAN filtering */
4991 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4992 rctl &= ~E1000_RCTL_VFE;
4993 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4994 if (adapter->mng_vlan_id !=
4995 (uint16_t)E1000_MNG_VLAN_NONE) {
4996 e1000_vlan_rx_kill_vid(netdev,
4997 adapter->mng_vlan_id);
4998 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4999 }
cd94dd0b 5000 }
1da177e4
LT		 5001 }
5002
5003 e1000_irq_enable(adapter);
5004}
5005
5006static void
5007e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
5008{
60490fe0 5009 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 5010 uint32_t vfta, index;
96838a40
JB		 5011
5012 if ((adapter->hw.mng_cookie.status &
5013 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5014 (vid == adapter->mng_vlan_id))
2d7edb92 5015 return;
1da177e4
LT		 5016 /* add VID to filter table */
5017 index = (vid >> 5) & 0x7F;
5018 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5019 vfta |= (1 << (vid & 0x1F));
5020 e1000_write_vfta(&adapter->hw, index, vfta);
5021}
5022
5023static void
5024e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5025{
60490fe0 5026 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 5027 uint32_t vfta, index;
5028
5029 e1000_irq_disable(adapter);
5030
96838a40 5031 if (adapter->vlgrp)
1da177e4
LT		 5032 adapter->vlgrp->vlan_devices[vid] = NULL;
5033
5034 e1000_irq_enable(adapter);
5035
96838a40
JB		 5036 if ((adapter->hw.mng_cookie.status &
5037 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 5038 (vid == adapter->mng_vlan_id)) {
5039 /* release control to f/w */
5040 e1000_release_hw_control(adapter);
2d7edb92 5041 return;
ff147013
JK		 5042 }
5043
1da177e4
LT		 5044 /* remove VID from filter table */
5045 index = (vid >> 5) & 0x7F;
5046 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5047 vfta &= ~(1 << (vid & 0x1F));
5048 e1000_write_vfta(&adapter->hw, index, vfta);
5049}
5050
5051static void
5052e1000_restore_vlan(struct e1000_adapter *adapter)
5053{
5054 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5055
96838a40 5056 if (adapter->vlgrp) {
1da177e4 5057 uint16_t vid;
96838a40
JB		 5058 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5059 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 5060 continue;
5061 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5062 }
5063 }
5064}
5065
5066int
5067e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5068{
5069 adapter->hw.autoneg = 0;
5070
6921368f 5071 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 5072 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 5073 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5074 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5075 return -EINVAL;
5076 }
5077
96838a40 5078 switch (spddplx) {
1da177e4
LT		 5079 case SPEED_10 + DUPLEX_HALF:
5080 adapter->hw.forced_speed_duplex = e1000_10_half;
5081 break;
5082 case SPEED_10 + DUPLEX_FULL:
5083 adapter->hw.forced_speed_duplex = e1000_10_full;
5084 break;
5085 case SPEED_100 + DUPLEX_HALF:
5086 adapter->hw.forced_speed_duplex = e1000_100_half;
5087 break;
5088 case SPEED_100 + DUPLEX_FULL:
5089 adapter->hw.forced_speed_duplex = e1000_100_full;
5090 break;
5091 case SPEED_1000 + DUPLEX_FULL:
5092 adapter->hw.autoneg = 1;
5093 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5094 break;
5095 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5096 default:
2648345f 5097 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 5098 return -EINVAL;
5099 }
5100 return 0;
5101}
5102
b6a1d5f8 5103#ifdef CONFIG_PM
0f15a8fa
JK		 5104/* Save/restore 16 or 64 dwords of PCI config space depending on which
5105 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 5106 */
5107#define PCIE_CONFIG_SPACE_LEN 256
5108#define PCI_CONFIG_SPACE_LEN 64
5109static int
5110e1000_pci_save_state(struct e1000_adapter *adapter)
5111{
5112 struct pci_dev *dev = adapter->pdev;
5113 int size;
5114 int i;
0f15a8fa 5115
2f82665f
JB		 5116 if (adapter->hw.mac_type >= e1000_82571)
5117 size = PCIE_CONFIG_SPACE_LEN;
5118 else
5119 size = PCI_CONFIG_SPACE_LEN;
5120
5121 WARN_ON(adapter->config_space != NULL);
5122
5123 adapter->config_space = kmalloc(size, GFP_KERNEL);
5124 if (!adapter->config_space) {
5125 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
5126 return -ENOMEM;
5127 }
5128 for (i = 0; i < (size / 4); i++)
5129 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
5130 return 0;
5131}
5132
5133static void
5134e1000_pci_restore_state(struct e1000_adapter *adapter)
5135{
5136 struct pci_dev *dev = adapter->pdev;
5137 int size;
5138 int i;
0f15a8fa 5139
2f82665f
JB		 5140 if (adapter->config_space == NULL)
5141 return;
0f15a8fa 5142
2f82665f
JB		 5143 if (adapter->hw.mac_type >= e1000_82571)
5144 size = PCIE_CONFIG_SPACE_LEN;
5145 else
5146 size = PCI_CONFIG_SPACE_LEN;
5147 for (i = 0; i < (size / 4); i++)
5148 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
5149 kfree(adapter->config_space);
5150 adapter->config_space = NULL;
5151 return;
5152}
5153#endif /* CONFIG_PM */
5154
1da177e4 5155static int
829ca9a3 5156e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 5157{
5158 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5159 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5160 uint32_t ctrl, ctrl_ext, rctl, status;
1da177e4 5161 uint32_t wufc = adapter->wol;
6fdfef16 5162#ifdef CONFIG_PM
240b1710 5163 int retval = 0;
6fdfef16 5164#endif
1da177e4
LT		 5165
5166 netif_device_detach(netdev);
5167
2db10a08
AK		 5168 if (netif_running(netdev)) {
5169 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5170 e1000_down(adapter);
2db10a08 5171 }
1da177e4 5172
2f82665f 5173#ifdef CONFIG_PM
0f15a8fa
JK		 5174 /* Implement our own version of pci_save_state(pdev) because pci-
5175 * express adapters have 256-byte config spaces. */
2f82665f
JB		 5176 retval = e1000_pci_save_state(adapter);
5177 if (retval)
5178 return retval;
5179#endif
5180
1da177e4 5181 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 5182 if (status & E1000_STATUS_LU)
1da177e4
LT		 5183 wufc &= ~E1000_WUFC_LNKC;
5184
96838a40 5185 if (wufc) {
1da177e4
LT		 5186 e1000_setup_rctl(adapter);
5187 e1000_set_multi(netdev);
5188
5189 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 5190 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 5191 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5192 rctl |= E1000_RCTL_MPE;
5193 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5194 }
5195
96838a40 5196 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 5197 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5198 /* advertise wake from D3Cold */
5199 #define E1000_CTRL_ADVD3WUC 0x00100000
5200 /* phy power management enable */
5201 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5202 ctrl |= E1000_CTRL_ADVD3WUC |
5203 E1000_CTRL_EN_PHY_PWR_MGMT;
5204 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5205 }
5206
96838a40 5207 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 5208 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5209 /* keep the laser running in D3 */
5210 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5211 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5212 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5213 }
5214
2d7edb92
MC		 5215 /* Allow time for pending master requests to run */
5216 e1000_disable_pciex_master(&adapter->hw);
5217
1da177e4
LT		 5218 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5219 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 5220 pci_enable_wake(pdev, PCI_D3hot, 1);
5221 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5222 } else {
5223 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5224 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 5225 pci_enable_wake(pdev, PCI_D3hot, 0);
5226 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 5227 }
5228
0fccd0e9
JG		 5229 e1000_release_manageability(adapter);
5230
5231 /* make sure adapter isn't asleep if manageability is enabled */
5232 if (adapter->en_mng_pt) {
5233 pci_enable_wake(pdev, PCI_D3hot, 1);
5234 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5235 }
5236
cd94dd0b
AK		 5237 if (adapter->hw.phy_type == e1000_phy_igp_3)
5238 e1000_phy_powerdown_workaround(&adapter->hw);
5239
edd106fc
AK		 5240 if (netif_running(netdev))
5241 e1000_free_irq(adapter);
5242
b55ccb35
JK		 5243 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5244 * would have already happened in close and is redundant. */
5245 e1000_release_hw_control(adapter);
2d7edb92 5246
1da177e4 5247 pci_disable_device(pdev);
240b1710 5248
d0e027db 5249 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 5250
5251 return 0;
5252}
5253
2f82665f 5254#ifdef CONFIG_PM
1da177e4
LT		 5255static int
5256e1000_resume(struct pci_dev *pdev)
5257{
5258 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5259 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5260 uint32_t err;
1da177e4 5261
d0e027db 5262 pci_set_power_state(pdev, PCI_D0);
2f82665f 5263 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 5264 if ((err = pci_enable_device(pdev))) {
5265 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5266 return err;
5267 }
a4cb847d 5268 pci_set_master(pdev);
1da177e4 5269
d0e027db
AK		 5270 pci_enable_wake(pdev, PCI_D3hot, 0);
5271 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5272
edd106fc
AK		 5273 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5274 return err;
5275
5276 e1000_power_up_phy(adapter);
1da177e4
LT		 5277 e1000_reset(adapter);
5278 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5279
0fccd0e9
JG		 5280 e1000_init_manageability(adapter);
5281
96838a40 5282 if (netif_running(netdev))
1da177e4
LT		 5283 e1000_up(adapter);
5284
5285 netif_device_attach(netdev);
5286
b55ccb35
JK		 5287 /* If the controller is 82573 and f/w is AMT, do not set
5288 * DRV_LOAD until the interface is up. For all other cases,
5289 * let the f/w know that the h/w is now under the control
5290 * of the driver. */
5291 if (adapter->hw.mac_type != e1000_82573 ||
5292 !e1000_check_mng_mode(&adapter->hw))
5293 e1000_get_hw_control(adapter);
2d7edb92 5294
1da177e4
LT		 5295 return 0;
5296}
5297#endif
c653e635
AK		 5298
5299static void e1000_shutdown(struct pci_dev *pdev)
5300{
5301 e1000_suspend(pdev, PMSG_SUSPEND);
5302}
5303
1da177e4
LT		 5304#ifdef CONFIG_NET_POLL_CONTROLLER
5305/*
5306 * Polling 'interrupt' - used by things like netconsole to send skbs
5307 * without having to re-enable interrupts. It's not called while
5308 * the interrupt routine is executing.
5309 */
5310static void
2648345f 5311e1000_netpoll(struct net_device *netdev)
1da177e4 5312{
60490fe0 5313 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5314
1da177e4 5315 disable_irq(adapter->pdev->irq);
7d12e780 5316 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 5317 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 5318#ifndef CONFIG_E1000_NAPI
5319 adapter->clean_rx(adapter, adapter->rx_ring);
5320#endif
1da177e4
LT		 5321 enable_irq(adapter->pdev->irq);
5322}
5323#endif
5324
9026729b
AK		 5325/**
5326 * e1000_io_error_detected - called when PCI error is detected
5327 * @pdev: Pointer to PCI device
5328 * @state: The current pci conneection state
5329 *
5330 * This function is called after a PCI bus error affecting
5331 * this device has been detected.
5332 */
5333static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5334{
5335 struct net_device *netdev = pci_get_drvdata(pdev);
5336 struct e1000_adapter *adapter = netdev->priv;
5337
5338 netif_device_detach(netdev);
5339
5340 if (netif_running(netdev))
5341 e1000_down(adapter);
72e8d6bb 5342 pci_disable_device(pdev);
9026729b
AK		 5343
5344 /* Request a slot slot reset. */
5345 return PCI_ERS_RESULT_NEED_RESET;
5346}
5347
5348/**
5349 * e1000_io_slot_reset - called after the pci bus has been reset.
5350 * @pdev: Pointer to PCI device
5351 *
5352 * Restart the card from scratch, as if from a cold-boot. Implementation
5353 * resembles the first-half of the e1000_resume routine.
5354 */
5355static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5356{
5357 struct net_device *netdev = pci_get_drvdata(pdev);
5358 struct e1000_adapter *adapter = netdev->priv;
5359
5360 if (pci_enable_device(pdev)) {
5361 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5362 return PCI_ERS_RESULT_DISCONNECT;
5363 }
5364 pci_set_master(pdev);
5365
dbf38c94
LV		 5366 pci_enable_wake(pdev, PCI_D3hot, 0);
5367 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5368
9026729b
AK		 5369 e1000_reset(adapter);
5370 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5371
5372 return PCI_ERS_RESULT_RECOVERED;
5373}
5374
5375/**
5376 * e1000_io_resume - called when traffic can start flowing again.
5377 * @pdev: Pointer to PCI device
5378 *
5379 * This callback is called when the error recovery driver tells us that
5380 * its OK to resume normal operation. Implementation resembles the
5381 * second-half of the e1000_resume routine.
5382 */
5383static void e1000_io_resume(struct pci_dev *pdev)
5384{
5385 struct net_device *netdev = pci_get_drvdata(pdev);
5386 struct e1000_adapter *adapter = netdev->priv;
0fccd0e9
JG		 5387
5388 e1000_init_manageability(adapter);
9026729b
AK		 5389
5390 if (netif_running(netdev)) {
5391 if (e1000_up(adapter)) {
5392 printk("e1000: can't bring device back up after reset\n");
5393 return;
5394 }
5395 }
5396
5397 netif_device_attach(netdev);
5398
0fccd0e9
JG		 5399 /* If the controller is 82573 and f/w is AMT, do not set
5400 * DRV_LOAD until the interface is up. For all other cases,
5401 * let the f/w know that the h/w is now under the control
5402 * of the driver. */
5403 if (adapter->hw.mac_type != e1000_82573 ||
5404 !e1000_check_mng_mode(&adapter->hw))
5405 e1000_get_hw_control(adapter);
9026729b 5406
9026729b
AK		 5407}
5408
1da177e4 5409/* e1000_main.c */
Clone of davem's net-next-2.6 tree