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[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
c3570acb 34#define DRV_VERSION "7.3.20-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
977e74b5 159static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 160#ifdef CONFIG_PM
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
79f3d399 501 /* fire a link change interrupt to start the watchdog */
1dc32918 502 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 503 return 0;
504}
505
79f05bf0
AK		 506/**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
d658266e 516void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 517{
1dc32918 518 struct e1000_hw *hw = &adapter->hw;
406874a7 519 u16 mii_reg = 0;
79f05bf0
AK		 520
521 /* Just clear the power down bit to wake the phy back up */
1dc32918 522 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
1dc32918 525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 526 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 528 }
529}
530
531static void e1000_power_down_phy(struct e1000_adapter *adapter)
532{
1dc32918
JP		 533 struct e1000_hw *hw = &adapter->hw;
534
61c2505f 535 /* Power down the PHY so no link is implied when interface is down *
c3033b01 536 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
1dc32918
JP		 540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
406874a7 542 u16 mii_reg = 0;
61c2505f 543
1dc32918 544 switch (hw->mac_type) {
61c2505f
BA		 545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
1dc32918 554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
1dc32918
JP		 562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
61c2505f
BA		 564 goto out;
565 break;
566 default:
567 goto out;
568 }
1dc32918 569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 570 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 572 mdelay(1);
573 }
61c2505f
BA		 574out:
575 return;
79f05bf0
AK		 576}
577
64798845 578void e1000_down(struct e1000_adapter *adapter)
1da177e4
LT		 579{
580 struct net_device *netdev = adapter->netdev;
581
1314bbf3
AK		 582 /* signal that we're down so the interrupt handler does not
583 * reschedule our watchdog timer */
584 set_bit(__E1000_DOWN, &adapter->flags);
585
bea3348e 586 napi_disable(&adapter->napi);
c3570acb 587
1da177e4 588 e1000_irq_disable(adapter);
c1605eb3 589
1da177e4
LT		 590 del_timer_sync(&adapter->tx_fifo_stall_timer);
591 del_timer_sync(&adapter->watchdog_timer);
592 del_timer_sync(&adapter->phy_info_timer);
593
7bfa4816 594 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 595 adapter->link_speed = 0;
596 adapter->link_duplex = 0;
597 netif_carrier_off(netdev);
598 netif_stop_queue(netdev);
599
600 e1000_reset(adapter);
581d708e
MC		 601 e1000_clean_all_tx_rings(adapter);
602 e1000_clean_all_rx_rings(adapter);
1da177e4 603}
1da177e4 604
64798845 605void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 606{
607 WARN_ON(in_interrupt());
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610 e1000_down(adapter);
611 e1000_up(adapter);
612 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 613}
614
64798845 615void e1000_reset(struct e1000_adapter *adapter)
1da177e4 616{
1dc32918 617 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 618 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
619 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 620 bool legacy_pba_adjust = false;
1da177e4
LT		 621
622 /* Repartition Pba for greater than 9k mtu
623 * To take effect CTRL.RST is required.
624 */
625
1dc32918 626 switch (hw->mac_type) {
018ea44e
BA		 627 case e1000_82542_rev2_0:
628 case e1000_82542_rev2_1:
629 case e1000_82543:
630 case e1000_82544:
631 case e1000_82540:
632 case e1000_82541:
633 case e1000_82541_rev_2:
c3033b01 634 legacy_pba_adjust = true;
018ea44e
BA		 635 pba = E1000_PBA_48K;
636 break;
637 case e1000_82545:
638 case e1000_82545_rev_3:
639 case e1000_82546:
640 case e1000_82546_rev_3:
641 pba = E1000_PBA_48K;
642 break;
2d7edb92 643 case e1000_82547:
0e6ef3e0 644 case e1000_82547_rev_2:
c3033b01 645 legacy_pba_adjust = true;
2d7edb92
MC		 646 pba = E1000_PBA_30K;
647 break;
868d5309
MC		 648 case e1000_82571:
649 case e1000_82572:
6418ecc6 650 case e1000_80003es2lan:
868d5309
MC		 651 pba = E1000_PBA_38K;
652 break;
2d7edb92 653 case e1000_82573:
018ea44e 654 pba = E1000_PBA_20K;
2d7edb92 655 break;
cd94dd0b
AK		 656 case e1000_ich8lan:
657 pba = E1000_PBA_8K;
018ea44e
BA		 658 case e1000_undefined:
659 case e1000_num_macs:
2d7edb92
MC		 660 break;
661 }
662
c3033b01 663 if (legacy_pba_adjust) {
018ea44e
BA		 664 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
665 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 666
1dc32918 667 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 668 adapter->tx_fifo_head = 0;
669 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
670 adapter->tx_fifo_size =
671 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
672 atomic_set(&adapter->tx_fifo_stall, 0);
673 }
1dc32918 674 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 675 /* adjust PBA for jumbo frames */
1dc32918 676 ew32(PBA, pba);
018ea44e
BA		 677
678 /* To maintain wire speed transmits, the Tx FIFO should be
679 * large enough to accomodate two full transmit packets,
680 * rounded up to the next 1KB and expressed in KB. Likewise,
681 * the Rx FIFO should be large enough to accomodate at least
682 * one full receive packet and is similarly rounded up and
683 * expressed in KB. */
1dc32918 684 pba = er32(PBA);
018ea44e
BA		 685 /* upper 16 bits has Tx packet buffer allocation size in KB */
686 tx_space = pba >> 16;
687 /* lower 16 bits has Rx packet buffer allocation size in KB */
688 pba &= 0xffff;
689 /* don't include ethernet FCS because hardware appends/strips */
690 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
691 VLAN_TAG_SIZE;
692 min_tx_space = min_rx_space;
693 min_tx_space *= 2;
9099cfb9 694 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 695 min_tx_space >>= 10;
9099cfb9 696 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 697 min_rx_space >>= 10;
698
699 /* If current Tx allocation is less than the min Tx FIFO size,
700 * and the min Tx FIFO size is less than the current Rx FIFO
701 * allocation, take space away from current Rx allocation */
702 if (tx_space < min_tx_space &&
703 ((min_tx_space - tx_space) < pba)) {
704 pba = pba - (min_tx_space - tx_space);
705
706 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 707 switch (hw->mac_type) {
018ea44e
BA		 708 case e1000_82545 ... e1000_82546_rev_3:
709 pba &= ~(E1000_PBA_8K - 1);
710 break;
711 default:
712 break;
713 }
714
715 /* if short on rx space, rx wins and must trump tx
716 * adjustment or use Early Receive if available */
717 if (pba < min_rx_space) {
1dc32918 718 switch (hw->mac_type) {
018ea44e
BA		 719 case e1000_82573:
720 /* ERT enabled in e1000_configure_rx */
721 break;
722 default:
723 pba = min_rx_space;
724 break;
725 }
726 }
727 }
1da177e4 728 }
2d7edb92 729
1dc32918 730 ew32(PBA, pba);
1da177e4
LT		 731
732 /* flow control settings */
f11b7f85
JK		 733 /* Set the FC high water mark to 90% of the FIFO size.
734 * Required to clear last 3 LSB */
735 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 736 /* We can't use 90% on small FIFOs because the remainder
737 * would be less than 1 full frame. In this case, we size
738 * it to allow at least a full frame above the high water
739 * mark. */
740 if (pba < E1000_PBA_16K)
741 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 742
1dc32918
JP		 743 hw->fc_high_water = fc_high_water_mark;
744 hw->fc_low_water = fc_high_water_mark - 8;
745 if (hw->mac_type == e1000_80003es2lan)
746 hw->fc_pause_time = 0xFFFF;
87041639 747 else
1dc32918
JP		 748 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
749 hw->fc_send_xon = 1;
750 hw->fc = hw->original_fc;
1da177e4 751
2d7edb92 752 /* Allow time for pending master requests to run */
1dc32918
JP		 753 e1000_reset_hw(hw);
754 if (hw->mac_type >= e1000_82544)
755 ew32(WUC, 0);
09ae3e88 756
1dc32918 757 if (e1000_init_hw(hw))
1da177e4 758 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 759 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 760
761 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 762 if (hw->mac_type >= e1000_82544 &&
763 hw->mac_type <= e1000_82547_rev_2 &&
764 hw->autoneg == 1 &&
765 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
766 u32 ctrl = er32(CTRL);
3d5460a0
JB		 767 /* clear phy power management bit if we are in gig only mode,
768 * which if enabled will attempt negotiation to 100Mb, which
769 * can cause a loss of link at power off or driver unload */
770 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 771 ew32(CTRL, ctrl);
3d5460a0
JB		 772 }
773
1da177e4 774 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 775 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 776
1dc32918
JP		 777 e1000_reset_adaptive(hw);
778 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 779
780 if (!adapter->smart_power_down &&
1dc32918
JP		 781 (hw->mac_type == e1000_82571 ||
782 hw->mac_type == e1000_82572)) {
406874a7 783 u16 phy_data = 0;
9a53a202
AK		 784 /* speed up time to link by disabling smart power down, ignore
785 * the return value of this function because there is nothing
786 * different we would do if it failed */
1dc32918 787 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 788 &phy_data);
789 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 790 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 791 phy_data);
792 }
793
0fccd0e9 794 e1000_release_manageability(adapter);
1da177e4
LT		 795}
796
67b3c27c
AK		 797/**
798 * Dump the eeprom for users having checksum issues
799 **/
b4ea895d 800static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 801{
802 struct net_device *netdev = adapter->netdev;
803 struct ethtool_eeprom eeprom;
804 const struct ethtool_ops *ops = netdev->ethtool_ops;
805 u8 *data;
806 int i;
807 u16 csum_old, csum_new = 0;
808
809 eeprom.len = ops->get_eeprom_len(netdev);
810 eeprom.offset = 0;
811
812 data = kmalloc(eeprom.len, GFP_KERNEL);
813 if (!data) {
814 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
815 " data\n");
816 return;
817 }
818
819 ops->get_eeprom(netdev, &eeprom, data);
820
821 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
822 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
823 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
824 csum_new += data[i] + (data[i + 1] << 8);
825 csum_new = EEPROM_SUM - csum_new;
826
827 printk(KERN_ERR "/*********************/\n");
828 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
829 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
830
831 printk(KERN_ERR "Offset Values\n");
832 printk(KERN_ERR "======== ======\n");
833 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
834
835 printk(KERN_ERR "Include this output when contacting your support "
836 "provider.\n");
837 printk(KERN_ERR "This is not a software error! Something bad "
838 "happened to your hardware or\n");
839 printk(KERN_ERR "EEPROM image. Ignoring this "
840 "problem could result in further problems,\n");
841 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
842 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
843 "which is invalid\n");
844 printk(KERN_ERR "and requires you to set the proper MAC "
845 "address manually before continuing\n");
846 printk(KERN_ERR "to enable this network device.\n");
847 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
848 "to your hardware vendor\n");
63cd31f6 849 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 850 printk(KERN_ERR "/*********************/\n");
851
852 kfree(data);
853}
854
81250297
TI		 855/**
856 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
857 * @pdev: PCI device information struct
858 *
859 * Return true if an adapter needs ioport resources
860 **/
861static int e1000_is_need_ioport(struct pci_dev *pdev)
862{
863 switch (pdev->device) {
864 case E1000_DEV_ID_82540EM:
865 case E1000_DEV_ID_82540EM_LOM:
866 case E1000_DEV_ID_82540EP:
867 case E1000_DEV_ID_82540EP_LOM:
868 case E1000_DEV_ID_82540EP_LP:
869 case E1000_DEV_ID_82541EI:
870 case E1000_DEV_ID_82541EI_MOBILE:
871 case E1000_DEV_ID_82541ER:
872 case E1000_DEV_ID_82541ER_LOM:
873 case E1000_DEV_ID_82541GI:
874 case E1000_DEV_ID_82541GI_LF:
875 case E1000_DEV_ID_82541GI_MOBILE:
876 case E1000_DEV_ID_82544EI_COPPER:
877 case E1000_DEV_ID_82544EI_FIBER:
878 case E1000_DEV_ID_82544GC_COPPER:
879 case E1000_DEV_ID_82544GC_LOM:
880 case E1000_DEV_ID_82545EM_COPPER:
881 case E1000_DEV_ID_82545EM_FIBER:
882 case E1000_DEV_ID_82546EB_COPPER:
883 case E1000_DEV_ID_82546EB_FIBER:
884 case E1000_DEV_ID_82546EB_QUAD_COPPER:
885 return true;
886 default:
887 return false;
888 }
889}
890
1da177e4
LT		 891/**
892 * e1000_probe - Device Initialization Routine
893 * @pdev: PCI device information struct
894 * @ent: entry in e1000_pci_tbl
895 *
896 * Returns 0 on success, negative on failure
897 *
898 * e1000_probe initializes an adapter identified by a pci_dev structure.
899 * The OS initialization, configuring of the adapter private structure,
900 * and a hardware reset occur.
901 **/
1dc32918
JP		 902static int __devinit e1000_probe(struct pci_dev *pdev,
903 const struct pci_device_id *ent)
1da177e4
LT		 904{
905 struct net_device *netdev;
906 struct e1000_adapter *adapter;
1dc32918 907 struct e1000_hw *hw;
2d7edb92 908
1da177e4 909 static int cards_found = 0;
120cd576 910 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 911 int i, err, pci_using_dac;
406874a7
JP		 912 u16 eeprom_data = 0;
913 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 914 int bars, need_ioport;
0795af57
JP		 915 DECLARE_MAC_BUF(mac);
916
81250297
TI		 917 /* do not allocate ioport bars when not needed */
918 need_ioport = e1000_is_need_ioport(pdev);
919 if (need_ioport) {
920 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
921 err = pci_enable_device(pdev);
922 } else {
923 bars = pci_select_bars(pdev, IORESOURCE_MEM);
924 err = pci_enable_device(pdev);
925 }
c7be73bc 926 if (err)
1da177e4
LT		 927 return err;
928
c7be73bc
JP		 929 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
930 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1da177e4
LT		 931 pci_using_dac = 1;
932 } else {
c7be73bc
JP		 933 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
934 if (err) {
935 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
936 if (err) {
937 E1000_ERR("No usable DMA configuration, "
938 "aborting\n");
939 goto err_dma;
940 }
1da177e4
LT		 941 }
942 pci_using_dac = 0;
943 }
944
81250297 945 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 946 if (err)
6dd62ab0 947 goto err_pci_reg;
1da177e4
LT		 948
949 pci_set_master(pdev);
950
6dd62ab0 951 err = -ENOMEM;
1da177e4 952 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 953 if (!netdev)
1da177e4 954 goto err_alloc_etherdev;
1da177e4 955
1da177e4
LT		 956 SET_NETDEV_DEV(netdev, &pdev->dev);
957
958 pci_set_drvdata(pdev, netdev);
60490fe0 959 adapter = netdev_priv(netdev);
1da177e4
LT		 960 adapter->netdev = netdev;
961 adapter->pdev = pdev;
1da177e4 962 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 963 adapter->bars = bars;
964 adapter->need_ioport = need_ioport;
1da177e4 965
1dc32918
JP		 966 hw = &adapter->hw;
967 hw->back = adapter;
968
6dd62ab0 969 err = -EIO;
1dc32918
JP		 970 hw->hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
971 pci_resource_len(pdev, BAR_0));
972 if (!hw->hw_addr)
1da177e4 973 goto err_ioremap;
1da177e4 974
81250297
TI		 975 if (adapter->need_ioport) {
976 for (i = BAR_1; i <= BAR_5; i++) {
977 if (pci_resource_len(pdev, i) == 0)
978 continue;
979 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
980 hw->io_base = pci_resource_start(pdev, i);
981 break;
982 }
1da177e4
LT		 983 }
984 }
985
986 netdev->open = &e1000_open;
987 netdev->stop = &e1000_close;
988 netdev->hard_start_xmit = &e1000_xmit_frame;
989 netdev->get_stats = &e1000_get_stats;
db0ce50d 990 netdev->set_rx_mode = &e1000_set_rx_mode;
1da177e4
LT		 991 netdev->set_mac_address = &e1000_set_mac;
992 netdev->change_mtu = &e1000_change_mtu;
993 netdev->do_ioctl = &e1000_ioctl;
994 e1000_set_ethtool_ops(netdev);
995 netdev->tx_timeout = &e1000_tx_timeout;
996 netdev->watchdog_timeo = 5 * HZ;
bea3348e 997 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1da177e4
LT		 998 netdev->vlan_rx_register = e1000_vlan_rx_register;
999 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
1000 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
1001#ifdef CONFIG_NET_POLL_CONTROLLER
1002 netdev->poll_controller = e1000_netpoll;
1003#endif
0eb5a34c 1004 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1005
1da177e4
LT		 1006 adapter->bd_number = cards_found;
1007
1008 /* setup the private structure */
1009
c7be73bc
JP		 1010 err = e1000_sw_init(adapter);
1011 if (err)
1da177e4
LT		 1012 goto err_sw_init;
1013
6dd62ab0 1014 err = -EIO;
cd94dd0b
AK		 1015 /* Flash BAR mapping must happen after e1000_sw_init
1016 * because it depends on mac_type */
1dc32918 1017 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1018 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1dc32918 1019 hw->flash_address =
3c34ac36
BH		 1020 ioremap(pci_resource_start(pdev, 1),
1021 pci_resource_len(pdev, 1));
1dc32918 1022 if (!hw->flash_address)
cd94dd0b 1023 goto err_flashmap;
cd94dd0b
AK		 1024 }
1025
1dc32918 1026 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1027 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1028
1dc32918 1029 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1030 netdev->features = NETIF_F_SG |
1031 NETIF_F_HW_CSUM |
1032 NETIF_F_HW_VLAN_TX |
1033 NETIF_F_HW_VLAN_RX |
1034 NETIF_F_HW_VLAN_FILTER;
1dc32918 1035 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1036 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1037 }
1038
1dc32918
JP		 1039 if ((hw->mac_type >= e1000_82544) &&
1040 (hw->mac_type != e1000_82547))
1da177e4 1041 netdev->features |= NETIF_F_TSO;
2d7edb92 1042
1dc32918 1043 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1044 netdev->features |= NETIF_F_TSO6;
96838a40 1045 if (pci_using_dac)
1da177e4
LT		 1046 netdev->features |= NETIF_F_HIGHDMA;
1047
76c224bc
AK		 1048 netdev->features |= NETIF_F_LLTX;
1049
20501a69
PM		 1050 netdev->vlan_features |= NETIF_F_TSO;
1051 netdev->vlan_features |= NETIF_F_TSO6;
1052 netdev->vlan_features |= NETIF_F_HW_CSUM;
1053 netdev->vlan_features |= NETIF_F_SG;
1054
1dc32918 1055 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1056
cd94dd0b 1057 /* initialize eeprom parameters */
1dc32918 1058 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1059 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1060 goto err_eeprom;
cd94dd0b
AK		 1061 }
1062
96838a40 1063 /* before reading the EEPROM, reset the controller to
1da177e4 1064 * put the device in a known good starting state */
96838a40 1065
1dc32918 1066 e1000_reset_hw(hw);
1da177e4
LT		 1067
1068 /* make sure the EEPROM is good */
1dc32918 1069 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1070 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1071 e1000_dump_eeprom(adapter);
1072 /*
1073 * set MAC address to all zeroes to invalidate and temporary
1074 * disable this device for the user. This blocks regular
1075 * traffic while still permitting ethtool ioctls from reaching
1076 * the hardware as well as allowing the user to run the
1077 * interface after manually setting a hw addr using
1078 * `ip set address`
1079 */
1dc32918 1080 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1081 } else {
1082 /* copy the MAC address out of the EEPROM */
1dc32918 1083 if (e1000_read_mac_addr(hw))
67b3c27c 1084 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1085 }
67b3c27c 1086 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1087 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1088 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1089
67b3c27c 1090 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1091 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1092
1dc32918 1093 e1000_get_bus_info(hw);
1da177e4
LT		 1094
1095 init_timer(&adapter->tx_fifo_stall_timer);
1096 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1097 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1098
1099 init_timer(&adapter->watchdog_timer);
1100 adapter->watchdog_timer.function = &e1000_watchdog;
1101 adapter->watchdog_timer.data = (unsigned long) adapter;
1102
1da177e4
LT		 1103 init_timer(&adapter->phy_info_timer);
1104 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1105 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1106
65f27f38 1107 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1108
1da177e4
LT		 1109 e1000_check_options(adapter);
1110
1111 /* Initial Wake on LAN setting
1112 * If APM wake is enabled in the EEPROM,
1113 * enable the ACPI Magic Packet filter
1114 */
1115
1dc32918 1116 switch (hw->mac_type) {
1da177e4
LT		 1117 case e1000_82542_rev2_0:
1118 case e1000_82542_rev2_1:
1119 case e1000_82543:
1120 break;
1121 case e1000_82544:
1dc32918 1122 e1000_read_eeprom(hw,
1da177e4
LT		 1123 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1124 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1125 break;
cd94dd0b 1126 case e1000_ich8lan:
1dc32918 1127 e1000_read_eeprom(hw,
cd94dd0b
AK		 1128 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1129 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1130 break;
1da177e4
LT		 1131 case e1000_82546:
1132 case e1000_82546_rev_3:
fd803241 1133 case e1000_82571:
6418ecc6 1134 case e1000_80003es2lan:
1dc32918
JP		 1135 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1136 e1000_read_eeprom(hw,
1da177e4
LT		 1137 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1138 break;
1139 }
1140 /* Fall Through */
1141 default:
1dc32918 1142 e1000_read_eeprom(hw,
1da177e4
LT		 1143 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1144 break;
1145 }
96838a40 1146 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1147 adapter->eeprom_wol |= E1000_WUFC_MAG;
1148
1149 /* now that we have the eeprom settings, apply the special cases
1150 * where the eeprom may be wrong or the board simply won't support
1151 * wake on lan on a particular port */
1152 switch (pdev->device) {
1153 case E1000_DEV_ID_82546GB_PCIE:
1154 adapter->eeprom_wol = 0;
1155 break;
1156 case E1000_DEV_ID_82546EB_FIBER:
1157 case E1000_DEV_ID_82546GB_FIBER:
1158 case E1000_DEV_ID_82571EB_FIBER:
1159 /* Wake events only supported on port A for dual fiber
1160 * regardless of eeprom setting */
1dc32918 1161 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1162 adapter->eeprom_wol = 0;
1163 break;
1164 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1165 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1166 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1167 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1168 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1169 /* if quad port adapter, disable WoL on all but port A */
1170 if (global_quad_port_a != 0)
1171 adapter->eeprom_wol = 0;
1172 else
1173 adapter->quad_port_a = 1;
1174 /* Reset for multiple quad port adapters */
1175 if (++global_quad_port_a == 4)
1176 global_quad_port_a = 0;
1177 break;
1178 }
1179
1180 /* initialize the wol settings based on the eeprom settings */
1181 adapter->wol = adapter->eeprom_wol;
1da177e4 1182
fb3d47d4 1183 /* print bus type/speed/width info */
fb3d47d4
JK		 1184 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1185 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1186 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1187 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1188 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1189 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1190 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1191 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1192 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1193 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1194 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1195 "32-bit"));
fb3d47d4 1196
0795af57 1197 printk("%s\n", print_mac(mac, netdev->dev_addr));
fb3d47d4 1198
1dc32918 1199 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1200 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1201 "longer be supported by this driver in the future.\n",
1202 pdev->vendor, pdev->device);
1203 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1204 "driver instead.\n");
1205 }
1206
1da177e4
LT		 1207 /* reset the hardware with the new settings */
1208 e1000_reset(adapter);
1209
b55ccb35
JK		 1210 /* If the controller is 82573 and f/w is AMT, do not set
1211 * DRV_LOAD until the interface is up. For all other cases,
1212 * let the f/w know that the h/w is now under the control
1213 * of the driver. */
1dc32918
JP		 1214 if (hw->mac_type != e1000_82573 ||
1215 !e1000_check_mng_mode(hw))
b55ccb35 1216 e1000_get_hw_control(adapter);
2d7edb92 1217
1314bbf3
AK		 1218 /* tell the stack to leave us alone until e1000_open() is called */
1219 netif_carrier_off(netdev);
1220 netif_stop_queue(netdev);
416b5d10
AK		 1221
1222 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1223 err = register_netdev(netdev);
1224 if (err)
416b5d10 1225 goto err_register;
1314bbf3 1226
1da177e4
LT		 1227 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1228
1229 cards_found++;
1230 return 0;
1231
1232err_register:
6dd62ab0
VA		 1233 e1000_release_hw_control(adapter);
1234err_eeprom:
1dc32918
JP		 1235 if (!e1000_check_phy_reset_block(hw))
1236 e1000_phy_hw_reset(hw);
6dd62ab0 1237
1dc32918
JP		 1238 if (hw->flash_address)
1239 iounmap(hw->flash_address);
cd94dd0b 1240err_flashmap:
6dd62ab0
VA		 1241 for (i = 0; i < adapter->num_rx_queues; i++)
1242 dev_put(&adapter->polling_netdev[i]);
6dd62ab0
VA		 1243
1244 kfree(adapter->tx_ring);
1245 kfree(adapter->rx_ring);
6dd62ab0 1246 kfree(adapter->polling_netdev);
1da177e4 1247err_sw_init:
1dc32918 1248 iounmap(hw->hw_addr);
1da177e4
LT		 1249err_ioremap:
1250 free_netdev(netdev);
1251err_alloc_etherdev:
81250297 1252 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1253err_pci_reg:
1254err_dma:
1255 pci_disable_device(pdev);
1da177e4
LT		 1256 return err;
1257}
1258
1259/**
1260 * e1000_remove - Device Removal Routine
1261 * @pdev: PCI device information struct
1262 *
1263 * e1000_remove is called by the PCI subsystem to alert the driver
1264 * that it should release a PCI device. The could be caused by a
1265 * Hot-Plug event, or because the driver is going to be removed from
1266 * memory.
1267 **/
1268
64798845 1269static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1270{
1271 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1272 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1273 struct e1000_hw *hw = &adapter->hw;
581d708e 1274 int i;
1da177e4 1275
28e53bdd 1276 cancel_work_sync(&adapter->reset_task);
be2b28ed 1277
0fccd0e9 1278 e1000_release_manageability(adapter);
1da177e4 1279
b55ccb35
JK		 1280 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1281 * would have already happened in close and is redundant. */
1282 e1000_release_hw_control(adapter);
2d7edb92 1283
f56799ea 1284 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1285 dev_put(&adapter->polling_netdev[i]);
1da177e4 1286
bea3348e
SH		 1287 unregister_netdev(netdev);
1288
1dc32918
JP		 1289 if (!e1000_check_phy_reset_block(hw))
1290 e1000_phy_hw_reset(hw);
1da177e4 1291
24025e4e
MC		 1292 kfree(adapter->tx_ring);
1293 kfree(adapter->rx_ring);
24025e4e 1294 kfree(adapter->polling_netdev);
24025e4e 1295
1dc32918
JP		 1296 iounmap(hw->hw_addr);
1297 if (hw->flash_address)
1298 iounmap(hw->flash_address);
81250297 1299 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1300
1301 free_netdev(netdev);
1302
1303 pci_disable_device(pdev);
1304}
1305
1306/**
1307 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1308 * @adapter: board private structure to initialize
1309 *
1310 * e1000_sw_init initializes the Adapter private data structure.
1311 * Fields are initialized based on PCI device information and
1312 * OS network device settings (MTU size).
1313 **/
1314
64798845 1315static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1316{
1317 struct e1000_hw *hw = &adapter->hw;
1318 struct net_device *netdev = adapter->netdev;
1319 struct pci_dev *pdev = adapter->pdev;
581d708e 1320 int i;
1da177e4
LT		 1321
1322 /* PCI config space info */
1323
1324 hw->vendor_id = pdev->vendor;
1325 hw->device_id = pdev->device;
1326 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1327 hw->subsystem_id = pdev->subsystem_device;
44c10138 1328 hw->revision_id = pdev->revision;
1da177e4
LT		 1329
1330 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1331
eb0f8054 1332 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1333 hw->max_frame_size = netdev->mtu +
1334 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1335 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1336
1337 /* identify the MAC */
1338
96838a40 1339 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1340 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1341 return -EIO;
1342 }
1343
96838a40 1344 switch (hw->mac_type) {
1da177e4
LT		 1345 default:
1346 break;
1347 case e1000_82541:
1348 case e1000_82547:
1349 case e1000_82541_rev_2:
1350 case e1000_82547_rev_2:
1351 hw->phy_init_script = 1;
1352 break;
1353 }
1354
1355 e1000_set_media_type(hw);
1356
c3033b01
JP		 1357 hw->wait_autoneg_complete = false;
1358 hw->tbi_compatibility_en = true;
1359 hw->adaptive_ifs = true;
1da177e4
LT		 1360
1361 /* Copper options */
1362
96838a40 1363 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1364 hw->mdix = AUTO_ALL_MODES;
c3033b01 1365 hw->disable_polarity_correction = false;
1da177e4
LT		 1366 hw->master_slave = E1000_MASTER_SLAVE;
1367 }
1368
f56799ea
JK		 1369 adapter->num_tx_queues = 1;
1370 adapter->num_rx_queues = 1;
581d708e
MC		 1371
1372 if (e1000_alloc_queues(adapter)) {
1373 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1374 return -ENOMEM;
1375 }
1376
f56799ea 1377 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e 1378 adapter->polling_netdev[i].priv = adapter;
581d708e
MC		 1379 dev_hold(&adapter->polling_netdev[i]);
1380 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1381 }
7bfa4816 1382 spin_lock_init(&adapter->tx_queue_lock);
24025e4e 1383
47313054 1384 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1385 e1000_irq_disable(adapter);
1386
1da177e4 1387 spin_lock_init(&adapter->stats_lock);
1da177e4 1388
1314bbf3
AK		 1389 set_bit(__E1000_DOWN, &adapter->flags);
1390
1da177e4
LT		 1391 return 0;
1392}
1393
581d708e
MC		 1394/**
1395 * e1000_alloc_queues - Allocate memory for all rings
1396 * @adapter: board private structure to initialize
1397 *
1398 * We allocate one ring per queue at run-time since we don't know the
1399 * number of queues at compile-time. The polling_netdev array is
1400 * intended for Multiqueue, but should work fine with a single queue.
1401 **/
1402
64798845 1403static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1404{
1c7e5b12
YB		 1405 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1406 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1407 if (!adapter->tx_ring)
1408 return -ENOMEM;
581d708e 1409
1c7e5b12
YB		 1410 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1411 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1412 if (!adapter->rx_ring) {
1413 kfree(adapter->tx_ring);
1414 return -ENOMEM;
1415 }
581d708e 1416
1c7e5b12
YB		 1417 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1418 sizeof(struct net_device),
1419 GFP_KERNEL);
581d708e
MC		 1420 if (!adapter->polling_netdev) {
1421 kfree(adapter->tx_ring);
1422 kfree(adapter->rx_ring);
1423 return -ENOMEM;
1424 }
581d708e
MC		 1425
1426 return E1000_SUCCESS;
1427}
1428
1da177e4
LT		 1429/**
1430 * e1000_open - Called when a network interface is made active
1431 * @netdev: network interface device structure
1432 *
1433 * Returns 0 on success, negative value on failure
1434 *
1435 * The open entry point is called when a network interface is made
1436 * active by the system (IFF_UP). At this point all resources needed
1437 * for transmit and receive operations are allocated, the interrupt
1438 * handler is registered with the OS, the watchdog timer is started,
1439 * and the stack is notified that the interface is ready.
1440 **/
1441
64798845 1442static int e1000_open(struct net_device *netdev)
1da177e4 1443{
60490fe0 1444 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1445 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1446 int err;
1447
2db10a08 1448 /* disallow open during test */
1314bbf3 1449 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1450 return -EBUSY;
1451
1da177e4 1452 /* allocate transmit descriptors */
e0aac5a2
AK		 1453 err = e1000_setup_all_tx_resources(adapter);
1454 if (err)
1da177e4
LT		 1455 goto err_setup_tx;
1456
1457 /* allocate receive descriptors */
e0aac5a2 1458 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1459 if (err)
e0aac5a2 1460 goto err_setup_rx;
b5bf28cd 1461
79f05bf0
AK		 1462 e1000_power_up_phy(adapter);
1463
2d7edb92 1464 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1465 if ((hw->mng_cookie.status &
2d7edb92
MC		 1466 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1467 e1000_update_mng_vlan(adapter);
1468 }
1da177e4 1469
b55ccb35
JK		 1470 /* If AMT is enabled, let the firmware know that the network
1471 * interface is now open */
1dc32918
JP		 1472 if (hw->mac_type == e1000_82573 &&
1473 e1000_check_mng_mode(hw))
b55ccb35
JK		 1474 e1000_get_hw_control(adapter);
1475
e0aac5a2
AK		 1476 /* before we allocate an interrupt, we must be ready to handle it.
1477 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1478 * as soon as we call pci_request_irq, so we have to setup our
1479 * clean_rx handler before we do so. */
1480 e1000_configure(adapter);
1481
1482 err = e1000_request_irq(adapter);
1483 if (err)
1484 goto err_req_irq;
1485
1486 /* From here on the code is the same as e1000_up() */
1487 clear_bit(__E1000_DOWN, &adapter->flags);
1488
bea3348e 1489 napi_enable(&adapter->napi);
47313054 1490
e0aac5a2
AK		 1491 e1000_irq_enable(adapter);
1492
076152d5
BH		 1493 netif_start_queue(netdev);
1494
e0aac5a2 1495 /* fire a link status change interrupt to start the watchdog */
1dc32918 1496 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1497
1da177e4
LT		 1498 return E1000_SUCCESS;
1499
b5bf28cd 1500err_req_irq:
e0aac5a2
AK		 1501 e1000_release_hw_control(adapter);
1502 e1000_power_down_phy(adapter);
581d708e 1503 e1000_free_all_rx_resources(adapter);
1da177e4 1504err_setup_rx:
581d708e 1505 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1506err_setup_tx:
1507 e1000_reset(adapter);
1508
1509 return err;
1510}
1511
1512/**
1513 * e1000_close - Disables a network interface
1514 * @netdev: network interface device structure
1515 *
1516 * Returns 0, this is not allowed to fail
1517 *
1518 * The close entry point is called when an interface is de-activated
1519 * by the OS. The hardware is still under the drivers control, but
1520 * needs to be disabled. A global MAC reset is issued to stop the
1521 * hardware, and all transmit and receive resources are freed.
1522 **/
1523
64798845 1524static int e1000_close(struct net_device *netdev)
1da177e4 1525{
60490fe0 1526 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1527 struct e1000_hw *hw = &adapter->hw;
1da177e4 1528
2db10a08 1529 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1530 e1000_down(adapter);
79f05bf0 1531 e1000_power_down_phy(adapter);
2db10a08 1532 e1000_free_irq(adapter);
1da177e4 1533
581d708e
MC		 1534 e1000_free_all_tx_resources(adapter);
1535 e1000_free_all_rx_resources(adapter);
1da177e4 1536
4666560a
BA		 1537 /* kill manageability vlan ID if supported, but not if a vlan with
1538 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1539 if ((hw->mng_cookie.status &
4666560a
BA		 1540 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1541 !(adapter->vlgrp &&
5c15bdec 1542 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1543 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1544 }
b55ccb35
JK		 1545
1546 /* If AMT is enabled, let the firmware know that the network
1547 * interface is now closed */
1dc32918
JP		 1548 if (hw->mac_type == e1000_82573 &&
1549 e1000_check_mng_mode(hw))
b55ccb35
JK		 1550 e1000_release_hw_control(adapter);
1551
1da177e4
LT		 1552 return 0;
1553}
1554
1555/**
1556 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1557 * @adapter: address of board private structure
2d7edb92
MC		 1558 * @start: address of beginning of memory
1559 * @len: length of memory
1da177e4 1560 **/
64798845
JP		 1561static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1562 unsigned long len)
1da177e4 1563{
1dc32918 1564 struct e1000_hw *hw = &adapter->hw;
e982f17c 1565 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1566 unsigned long end = begin + len;
1567
2648345f
MC		 1568 /* First rev 82545 and 82546 need to not allow any memory
1569 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1570 if (hw->mac_type == e1000_82545 ||
1571 hw->mac_type == e1000_82546) {
c3033b01 1572 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1573 }
1574
c3033b01 1575 return true;
1da177e4
LT		 1576}
1577
1578/**
1579 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1580 * @adapter: board private structure
581d708e 1581 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1582 *
1583 * Return 0 on success, negative on failure
1584 **/
1585
64798845
JP		 1586static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1587 struct e1000_tx_ring *txdr)
1da177e4 1588{
1da177e4
LT		 1589 struct pci_dev *pdev = adapter->pdev;
1590 int size;
1591
1592 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1593 txdr->buffer_info = vmalloc(size);
96838a40 1594 if (!txdr->buffer_info) {
2648345f
MC		 1595 DPRINTK(PROBE, ERR,
1596 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1597 return -ENOMEM;
1598 }
1599 memset(txdr->buffer_info, 0, size);
1600
1601 /* round up to nearest 4K */
1602
1603 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1604 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1605
1606 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1607 if (!txdr->desc) {
1da177e4 1608setup_tx_desc_die:
1da177e4 1609 vfree(txdr->buffer_info);
2648345f
MC		 1610 DPRINTK(PROBE, ERR,
1611 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1612 return -ENOMEM;
1613 }
1614
2648345f 1615 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1616 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1617 void *olddesc = txdr->desc;
1618 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1619 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1620 "at %p\n", txdr->size, txdr->desc);
1621 /* Try again, without freeing the previous */
1da177e4 1622 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1623 /* Failed allocation, critical failure */
96838a40 1624 if (!txdr->desc) {
1da177e4
LT		 1625 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1626 goto setup_tx_desc_die;
1627 }
1628
1629 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1630 /* give up */
2648345f
MC		 1631 pci_free_consistent(pdev, txdr->size, txdr->desc,
1632 txdr->dma);
1da177e4
LT		 1633 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1634 DPRINTK(PROBE, ERR,
2648345f
MC		 1635 "Unable to allocate aligned memory "
1636 "for the transmit descriptor ring\n");
1da177e4
LT		 1637 vfree(txdr->buffer_info);
1638 return -ENOMEM;
1639 } else {
2648345f 1640 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1641 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1642 }
1643 }
1644 memset(txdr->desc, 0, txdr->size);
1645
1646 txdr->next_to_use = 0;
1647 txdr->next_to_clean = 0;
2ae76d98 1648 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1649
1650 return 0;
1651}
1652
581d708e
MC		 1653/**
1654 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1655 * (Descriptors) for all queues
1656 * @adapter: board private structure
1657 *
581d708e
MC		 1658 * Return 0 on success, negative on failure
1659 **/
1660
64798845 1661int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1662{
1663 int i, err = 0;
1664
f56799ea 1665 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1666 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1667 if (err) {
1668 DPRINTK(PROBE, ERR,
1669 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1670 for (i-- ; i >= 0; i--)
1671 e1000_free_tx_resources(adapter,
1672 &adapter->tx_ring[i]);
581d708e
MC		 1673 break;
1674 }
1675 }
1676
1677 return err;
1678}
1679
1da177e4
LT		 1680/**
1681 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1682 * @adapter: board private structure
1683 *
1684 * Configure the Tx unit of the MAC after a reset.
1685 **/
1686
64798845 1687static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1688{
406874a7 1689 u64 tdba;
581d708e 1690 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1691 u32 tdlen, tctl, tipg, tarc;
1692 u32 ipgr1, ipgr2;
1da177e4
LT		 1693
1694 /* Setup the HW Tx Head and Tail descriptor pointers */
1695
f56799ea 1696 switch (adapter->num_tx_queues) {
24025e4e
MC		 1697 case 1:
1698 default:
581d708e
MC		 1699 tdba = adapter->tx_ring[0].dma;
1700 tdlen = adapter->tx_ring[0].count *
1701 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1702 ew32(TDLEN, tdlen);
1703 ew32(TDBAH, (tdba >> 32));
1704 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1705 ew32(TDT, 0);
1706 ew32(TDH, 0);
6a951698
AK		 1707 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1708 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1709 break;
1710 }
1da177e4
LT		 1711
1712 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1713 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1714 (hw->media_type == e1000_media_type_fiber ||
1715 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1716 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1717 else
1718 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1719
581d708e 1720 switch (hw->mac_type) {
1da177e4
LT		 1721 case e1000_82542_rev2_0:
1722 case e1000_82542_rev2_1:
1723 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1724 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1725 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1726 break;
87041639
JK		 1727 case e1000_80003es2lan:
1728 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1729 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1730 break;
1da177e4 1731 default:
0fadb059
JK		 1732 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1733 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1734 break;
1da177e4 1735 }
0fadb059
JK		 1736 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1737 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1738 ew32(TIPG, tipg);
1da177e4
LT		 1739
1740 /* Set the Tx Interrupt Delay register */
1741
1dc32918 1742 ew32(TIDV, adapter->tx_int_delay);
581d708e 1743 if (hw->mac_type >= e1000_82540)
1dc32918 1744 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1745
1746 /* Program the Transmit Control Register */
1747
1dc32918 1748 tctl = er32(TCTL);
1da177e4 1749 tctl &= ~E1000_TCTL_CT;
7e6c9861 1750 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1751 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1752
2ae76d98 1753 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1754 tarc = er32(TARC0);
90fb5135
AK		 1755 /* set the speed mode bit, we'll clear it if we're not at
1756 * gigabit link later */
09ae3e88 1757 tarc |= (1 << 21);
1dc32918 1758 ew32(TARC0, tarc);
87041639 1759 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1760 tarc = er32(TARC0);
87041639 1761 tarc |= 1;
1dc32918
JP		 1762 ew32(TARC0, tarc);
1763 tarc = er32(TARC1);
87041639 1764 tarc |= 1;
1dc32918 1765 ew32(TARC1, tarc);
2ae76d98
MC		 1766 }
1767
581d708e 1768 e1000_config_collision_dist(hw);
1da177e4
LT		 1769
1770 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1771 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1772
1773 /* only set IDE if we are delaying interrupts using the timers */
1774 if (adapter->tx_int_delay)
1775 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1776
581d708e 1777 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1778 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1779 else
1780 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1781
1782 /* Cache if we're 82544 running in PCI-X because we'll
1783 * need this to apply a workaround later in the send path. */
581d708e
MC		 1784 if (hw->mac_type == e1000_82544 &&
1785 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1786 adapter->pcix_82544 = 1;
7e6c9861 1787
1dc32918 1788 ew32(TCTL, tctl);
7e6c9861 1789
1da177e4
LT		 1790}
1791
1792/**
1793 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1794 * @adapter: board private structure
581d708e 1795 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1796 *
1797 * Returns 0 on success, negative on failure
1798 **/
1799
64798845
JP		 1800static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1801 struct e1000_rx_ring *rxdr)
1da177e4 1802{
1dc32918 1803 struct e1000_hw *hw = &adapter->hw;
1da177e4 1804 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1805 int size, desc_len;
1da177e4
LT		 1806
1807 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1808 rxdr->buffer_info = vmalloc(size);
581d708e 1809 if (!rxdr->buffer_info) {
2648345f
MC		 1810 DPRINTK(PROBE, ERR,
1811 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1812 return -ENOMEM;
1813 }
1814 memset(rxdr->buffer_info, 0, size);
1815
1dc32918 1816 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1817 desc_len = sizeof(struct e1000_rx_desc);
1818 else
1819 desc_len = sizeof(union e1000_rx_desc_packet_split);
1820
1da177e4
LT		 1821 /* Round up to nearest 4K */
1822
2d7edb92 1823 rxdr->size = rxdr->count * desc_len;
9099cfb9 1824 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1825
1826 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1827
581d708e
MC		 1828 if (!rxdr->desc) {
1829 DPRINTK(PROBE, ERR,
1830 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1831setup_rx_desc_die:
1da177e4
LT		 1832 vfree(rxdr->buffer_info);
1833 return -ENOMEM;
1834 }
1835
2648345f 1836 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1837 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1838 void *olddesc = rxdr->desc;
1839 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1840 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1841 "at %p\n", rxdr->size, rxdr->desc);
1842 /* Try again, without freeing the previous */
1da177e4 1843 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1844 /* Failed allocation, critical failure */
581d708e 1845 if (!rxdr->desc) {
1da177e4 1846 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1847 DPRINTK(PROBE, ERR,
1848 "Unable to allocate memory "
1849 "for the receive descriptor ring\n");
1da177e4
LT		 1850 goto setup_rx_desc_die;
1851 }
1852
1853 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1854 /* give up */
2648345f
MC		 1855 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1856 rxdr->dma);
1da177e4 1857 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1858 DPRINTK(PROBE, ERR,
1859 "Unable to allocate aligned memory "
1860 "for the receive descriptor ring\n");
581d708e 1861 goto setup_rx_desc_die;
1da177e4 1862 } else {
2648345f 1863 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1864 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1865 }
1866 }
1867 memset(rxdr->desc, 0, rxdr->size);
1868
1869 rxdr->next_to_clean = 0;
1870 rxdr->next_to_use = 0;
1871
1872 return 0;
1873}
1874
581d708e
MC		 1875/**
1876 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1877 * (Descriptors) for all queues
1878 * @adapter: board private structure
1879 *
581d708e
MC		 1880 * Return 0 on success, negative on failure
1881 **/
1882
64798845 1883int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1884{
1885 int i, err = 0;
1886
f56799ea 1887 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1888 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1889 if (err) {
1890 DPRINTK(PROBE, ERR,
1891 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1892 for (i-- ; i >= 0; i--)
1893 e1000_free_rx_resources(adapter,
1894 &adapter->rx_ring[i]);
581d708e
MC		 1895 break;
1896 }
1897 }
1898
1899 return err;
1900}
1901
1da177e4 1902/**
2648345f 1903 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1904 * @adapter: Board private structure
1905 **/
e4c811c9
MC		 1906#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1907 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
64798845 1908static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1909{
1dc32918 1910 struct e1000_hw *hw = &adapter->hw;
630b25cd 1911 u32 rctl;
1da177e4 1912
1dc32918 1913 rctl = er32(RCTL);
1da177e4
LT		 1914
1915 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1916
1917 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1918 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1919 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1920
1dc32918 1921 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1922 rctl |= E1000_RCTL_SBP;
1923 else
1924 rctl &= ~E1000_RCTL_SBP;
1925
2d7edb92
MC		 1926 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1927 rctl &= ~E1000_RCTL_LPE;
1928 else
1929 rctl |= E1000_RCTL_LPE;
1930
1da177e4 1931 /* Setup buffer sizes */
9e2feace
AK		 1932 rctl &= ~E1000_RCTL_SZ_4096;
1933 rctl |= E1000_RCTL_BSEX;
1934 switch (adapter->rx_buffer_len) {
1935 case E1000_RXBUFFER_256:
1936 rctl |= E1000_RCTL_SZ_256;
1937 rctl &= ~E1000_RCTL_BSEX;
1938 break;
1939 case E1000_RXBUFFER_512:
1940 rctl |= E1000_RCTL_SZ_512;
1941 rctl &= ~E1000_RCTL_BSEX;
1942 break;
1943 case E1000_RXBUFFER_1024:
1944 rctl |= E1000_RCTL_SZ_1024;
1945 rctl &= ~E1000_RCTL_BSEX;
1946 break;
a1415ee6
JK		 1947 case E1000_RXBUFFER_2048:
1948 default:
1949 rctl |= E1000_RCTL_SZ_2048;
1950 rctl &= ~E1000_RCTL_BSEX;
1951 break;
1952 case E1000_RXBUFFER_4096:
1953 rctl |= E1000_RCTL_SZ_4096;
1954 break;
1955 case E1000_RXBUFFER_8192:
1956 rctl |= E1000_RCTL_SZ_8192;
1957 break;
1958 case E1000_RXBUFFER_16384:
1959 rctl |= E1000_RCTL_SZ_16384;
1960 break;
2d7edb92
MC		 1961 }
1962
1dc32918 1963 ew32(RCTL, rctl);
1da177e4
LT		 1964}
1965
1966/**
1967 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1968 * @adapter: board private structure
1969 *
1970 * Configure the Rx unit of the MAC after a reset.
1971 **/
1972
64798845 1973static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1974{
406874a7 1975 u64 rdba;
581d708e 1976 struct e1000_hw *hw = &adapter->hw;
406874a7 1977 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1978
630b25cd
BJ		 1979 rdlen = adapter->rx_ring[0].count *
1980 sizeof(struct e1000_rx_desc);
1981 adapter->clean_rx = e1000_clean_rx_irq;
1982 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1983
1984 /* disable receives while setting up the descriptors */
1dc32918
JP		 1985 rctl = er32(RCTL);
1986 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1987
1988 /* set the Receive Delay Timer Register */
1dc32918 1989 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1990
581d708e 1991 if (hw->mac_type >= e1000_82540) {
1dc32918 1992 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1993 if (adapter->itr_setting != 0)
1dc32918 1994 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1995 }
1996
2ae76d98 1997 if (hw->mac_type >= e1000_82571) {
1dc32918 1998 ctrl_ext = er32(CTRL_EXT);
1e613fd9 1999 /* Reset delay timers after every interrupt */
6fc7a7ec 2000 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 2001 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2002 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 2003 ew32(IAM, 0xffffffff);
1dc32918
JP		 2004 ew32(CTRL_EXT, ctrl_ext);
2005 E1000_WRITE_FLUSH();
2ae76d98
MC		 2006 }
2007
581d708e
MC		 2008 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2009 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2010 switch (adapter->num_rx_queues) {
24025e4e
MC		 2011 case 1:
2012 default:
581d708e 2013 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2014 ew32(RDLEN, rdlen);
2015 ew32(RDBAH, (rdba >> 32));
2016 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2017 ew32(RDT, 0);
2018 ew32(RDH, 0);
6a951698
AK		 2019 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2020 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2021 break;
24025e4e
MC		 2022 }
2023
1da177e4 2024 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2025 if (hw->mac_type >= e1000_82543) {
1dc32918 2026 rxcsum = er32(RXCSUM);
630b25cd 2027 if (adapter->rx_csum)
2d7edb92 2028 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2029 else
2d7edb92 2030 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2031 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2032 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2033 }
2034
2035 /* Enable Receives */
1dc32918 2036 ew32(RCTL, rctl);
1da177e4
LT		 2037}
2038
2039/**
581d708e 2040 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2041 * @adapter: board private structure
581d708e 2042 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2043 *
2044 * Free all transmit software resources
2045 **/
2046
64798845
JP		 2047static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2048 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2049{
2050 struct pci_dev *pdev = adapter->pdev;
2051
581d708e 2052 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2053
581d708e
MC		 2054 vfree(tx_ring->buffer_info);
2055 tx_ring->buffer_info = NULL;
1da177e4 2056
581d708e 2057 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2058
581d708e
MC		 2059 tx_ring->desc = NULL;
2060}
2061
2062/**
2063 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2064 * @adapter: board private structure
2065 *
2066 * Free all transmit software resources
2067 **/
2068
64798845 2069void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2070{
2071 int i;
2072
f56799ea 2073 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2074 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2075}
2076
64798845
JP		 2077static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2078 struct e1000_buffer *buffer_info)
1da177e4 2079{
96838a40 2080 if (buffer_info->dma) {
2648345f
MC		 2081 pci_unmap_page(adapter->pdev,
2082 buffer_info->dma,
2083 buffer_info->length,
2084 PCI_DMA_TODEVICE);
a9ebadd6 2085 buffer_info->dma = 0;
1da177e4 2086 }
a9ebadd6 2087 if (buffer_info->skb) {
1da177e4 2088 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2089 buffer_info->skb = NULL;
2090 }
2091 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2092}
2093
2094/**
2095 * e1000_clean_tx_ring - Free Tx Buffers
2096 * @adapter: board private structure
581d708e 2097 * @tx_ring: ring to be cleaned
1da177e4
LT		 2098 **/
2099
64798845
JP		 2100static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2101 struct e1000_tx_ring *tx_ring)
1da177e4 2102{
1dc32918 2103 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2104 struct e1000_buffer *buffer_info;
2105 unsigned long size;
2106 unsigned int i;
2107
2108 /* Free all the Tx ring sk_buffs */
2109
96838a40 2110 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2111 buffer_info = &tx_ring->buffer_info[i];
2112 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2113 }
2114
2115 size = sizeof(struct e1000_buffer) * tx_ring->count;
2116 memset(tx_ring->buffer_info, 0, size);
2117
2118 /* Zero out the descriptor ring */
2119
2120 memset(tx_ring->desc, 0, tx_ring->size);
2121
2122 tx_ring->next_to_use = 0;
2123 tx_ring->next_to_clean = 0;
fd803241 2124 tx_ring->last_tx_tso = 0;
1da177e4 2125
1dc32918
JP		 2126 writel(0, hw->hw_addr + tx_ring->tdh);
2127 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2128}
2129
2130/**
2131 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2132 * @adapter: board private structure
2133 **/
2134
64798845 2135static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2136{
2137 int i;
2138
f56799ea 2139 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2140 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2141}
2142
2143/**
2144 * e1000_free_rx_resources - Free Rx Resources
2145 * @adapter: board private structure
581d708e 2146 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2147 *
2148 * Free all receive software resources
2149 **/
2150
64798845
JP		 2151static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2152 struct e1000_rx_ring *rx_ring)
1da177e4 2153{
1da177e4
LT		 2154 struct pci_dev *pdev = adapter->pdev;
2155
581d708e 2156 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2157
2158 vfree(rx_ring->buffer_info);
2159 rx_ring->buffer_info = NULL;
2160
2161 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2162
2163 rx_ring->desc = NULL;
2164}
2165
2166/**
581d708e 2167 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2168 * @adapter: board private structure
581d708e
MC		 2169 *
2170 * Free all receive software resources
2171 **/
2172
64798845 2173void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2174{
2175 int i;
2176
f56799ea 2177 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2178 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2179}
2180
2181/**
2182 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2183 * @adapter: board private structure
2184 * @rx_ring: ring to free buffers from
1da177e4
LT		 2185 **/
2186
64798845
JP		 2187static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2188 struct e1000_rx_ring *rx_ring)
1da177e4 2189{
1dc32918 2190 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2191 struct e1000_buffer *buffer_info;
2192 struct pci_dev *pdev = adapter->pdev;
2193 unsigned long size;
630b25cd 2194 unsigned int i;
1da177e4
LT		 2195
2196 /* Free all the Rx ring sk_buffs */
96838a40 2197 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2198 buffer_info = &rx_ring->buffer_info[i];
96838a40 2199 if (buffer_info->skb) {
1da177e4
LT		 2200 pci_unmap_single(pdev,
2201 buffer_info->dma,
2202 buffer_info->length,
2203 PCI_DMA_FROMDEVICE);
2204
2205 dev_kfree_skb(buffer_info->skb);
2206 buffer_info->skb = NULL;
997f5cbd 2207 }
1da177e4
LT		 2208 }
2209
2210 size = sizeof(struct e1000_buffer) * rx_ring->count;
2211 memset(rx_ring->buffer_info, 0, size);
2212
2213 /* Zero out the descriptor ring */
2214
2215 memset(rx_ring->desc, 0, rx_ring->size);
2216
2217 rx_ring->next_to_clean = 0;
2218 rx_ring->next_to_use = 0;
2219
1dc32918
JP		 2220 writel(0, hw->hw_addr + rx_ring->rdh);
2221 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2222}
2223
2224/**
2225 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2226 * @adapter: board private structure
2227 **/
2228
64798845 2229static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2230{
2231 int i;
2232
f56799ea 2233 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2234 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2235}
2236
2237/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2238 * and memory write and invalidate disabled for certain operations
2239 */
64798845 2240static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2241{
1dc32918 2242 struct e1000_hw *hw = &adapter->hw;
1da177e4 2243 struct net_device *netdev = adapter->netdev;
406874a7 2244 u32 rctl;
1da177e4 2245
1dc32918 2246 e1000_pci_clear_mwi(hw);
1da177e4 2247
1dc32918 2248 rctl = er32(RCTL);
1da177e4 2249 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2250 ew32(RCTL, rctl);
2251 E1000_WRITE_FLUSH();
1da177e4
LT		 2252 mdelay(5);
2253
96838a40 2254 if (netif_running(netdev))
581d708e 2255 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2256}
2257
64798845 2258static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2259{
1dc32918 2260 struct e1000_hw *hw = &adapter->hw;
1da177e4 2261 struct net_device *netdev = adapter->netdev;
406874a7 2262 u32 rctl;
1da177e4 2263
1dc32918 2264 rctl = er32(RCTL);
1da177e4 2265 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2266 ew32(RCTL, rctl);
2267 E1000_WRITE_FLUSH();
1da177e4
LT		 2268 mdelay(5);
2269
1dc32918
JP		 2270 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2271 e1000_pci_set_mwi(hw);
1da177e4 2272
96838a40 2273 if (netif_running(netdev)) {
72d64a43
JK		 2274 /* No need to loop, because 82542 supports only 1 queue */
2275 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2276 e1000_configure_rx(adapter);
72d64a43 2277 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2278 }
2279}
2280
2281/**
2282 * e1000_set_mac - Change the Ethernet Address of the NIC
2283 * @netdev: network interface device structure
2284 * @p: pointer to an address structure
2285 *
2286 * Returns 0 on success, negative on failure
2287 **/
2288
64798845 2289static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2290{
60490fe0 2291 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2292 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2293 struct sockaddr *addr = p;
2294
96838a40 2295 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2296 return -EADDRNOTAVAIL;
2297
2298 /* 82542 2.0 needs to be in reset to write receive address registers */
2299
1dc32918 2300 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2301 e1000_enter_82542_rst(adapter);
2302
2303 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2304 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2305
1dc32918 2306 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2307
868d5309
MC		 2308 /* With 82571 controllers, LAA may be overwritten (with the default)
2309 * due to controller reset from the other port. */
1dc32918 2310 if (hw->mac_type == e1000_82571) {
868d5309 2311 /* activate the work around */
1dc32918 2312 hw->laa_is_present = 1;
868d5309 2313
96838a40
JB		 2314 /* Hold a copy of the LAA in RAR[14] This is done so that
2315 * between the time RAR[0] gets clobbered and the time it
2316 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2317 * of the RARs and no incoming packets directed to this port
96838a40 2318 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2319 * RAR[14] */
1dc32918 2320 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2321 E1000_RAR_ENTRIES - 1);
2322 }
2323
1dc32918 2324 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2325 e1000_leave_82542_rst(adapter);
2326
2327 return 0;
2328}
2329
2330/**
db0ce50d 2331 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2332 * @netdev: network interface device structure
2333 *
db0ce50d
PM		 2334 * The set_rx_mode entry point is called whenever the unicast or multicast
2335 * address lists or the network interface flags are updated. This routine is
2336 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2337 * promiscuous mode, and all-multi behavior.
2338 **/
2339
64798845 2340static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2341{
60490fe0 2342 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2343 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2344 struct dev_addr_list *uc_ptr;
2345 struct dev_addr_list *mc_ptr;
406874a7
JP		 2346 u32 rctl;
2347 u32 hash_value;
868d5309 2348 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2349 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2350 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2351 E1000_NUM_MTA_REGISTERS;
2352
1dc32918 2353 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2354 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2355
868d5309 2356 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2357 if (hw->mac_type == e1000_82571)
868d5309 2358 rar_entries--;
1da177e4 2359
2648345f
MC		 2360 /* Check for Promiscuous and All Multicast modes */
2361
1dc32918 2362 rctl = er32(RCTL);
1da177e4 2363
96838a40 2364 if (netdev->flags & IFF_PROMISC) {
1da177e4 2365 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2366 rctl &= ~E1000_RCTL_VFE;
1da177e4 2367 } else {
746b9f02
PM		 2368 if (netdev->flags & IFF_ALLMULTI) {
2369 rctl |= E1000_RCTL_MPE;
2370 } else {
2371 rctl &= ~E1000_RCTL_MPE;
2372 }
78ed11a5 2373 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2374 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2375 }
2376
2377 uc_ptr = NULL;
2378 if (netdev->uc_count > rar_entries - 1) {
2379 rctl |= E1000_RCTL_UPE;
2380 } else if (!(netdev->flags & IFF_PROMISC)) {
2381 rctl &= ~E1000_RCTL_UPE;
2382 uc_ptr = netdev->uc_list;
1da177e4
LT		 2383 }
2384
1dc32918 2385 ew32(RCTL, rctl);
1da177e4
LT		 2386
2387 /* 82542 2.0 needs to be in reset to write receive address registers */
2388
96838a40 2389 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2390 e1000_enter_82542_rst(adapter);
2391
db0ce50d
PM		 2392 /* load the first 14 addresses into the exact filters 1-14. Unicast
2393 * addresses take precedence to avoid disabling unicast filtering
2394 * when possible.
2395 *
1da177e4
LT		 2396 * RAR 0 is used for the station MAC adddress
2397 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2398 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2399 */
2400 mc_ptr = netdev->mc_list;
2401
96838a40 2402 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2403 if (uc_ptr) {
2404 e1000_rar_set(hw, uc_ptr->da_addr, i);
2405 uc_ptr = uc_ptr->next;
2406 } else if (mc_ptr) {
2407 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2408 mc_ptr = mc_ptr->next;
2409 } else {
2410 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2411 E1000_WRITE_FLUSH();
1da177e4 2412 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2413 E1000_WRITE_FLUSH();
1da177e4
LT		 2414 }
2415 }
db0ce50d 2416 WARN_ON(uc_ptr != NULL);
1da177e4
LT		 2417
2418 /* clear the old settings from the multicast hash table */
2419
cd94dd0b 2420 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2421 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
1dc32918 2422 E1000_WRITE_FLUSH();
4ca213a6 2423 }
1da177e4
LT		 2424
2425 /* load any remaining addresses into the hash table */
2426
96838a40 2427 for (; mc_ptr; mc_ptr = mc_ptr->next) {
db0ce50d 2428 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
1da177e4
LT		 2429 e1000_mta_set(hw, hash_value);
2430 }
2431
96838a40 2432 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2433 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2434}
2435
2436/* Need to wait a few seconds after link up to get diagnostic information from
2437 * the phy */
2438
64798845 2439static void e1000_update_phy_info(unsigned long data)
1da177e4 2440{
e982f17c 2441 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2442 struct e1000_hw *hw = &adapter->hw;
2443 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2444}
2445
2446/**
2447 * e1000_82547_tx_fifo_stall - Timer Call-back
2448 * @data: pointer to adapter cast into an unsigned long
2449 **/
2450
64798845 2451static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2452{
e982f17c 2453 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2454 struct e1000_hw *hw = &adapter->hw;
1da177e4 2455 struct net_device *netdev = adapter->netdev;
406874a7 2456 u32 tctl;
1da177e4 2457
96838a40 2458 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2459 if ((er32(TDT) == er32(TDH)) &&
2460 (er32(TDFT) == er32(TDFH)) &&
2461 (er32(TDFTS) == er32(TDFHS))) {
2462 tctl = er32(TCTL);
2463 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2464 ew32(TDFT, adapter->tx_head_addr);
2465 ew32(TDFH, adapter->tx_head_addr);
2466 ew32(TDFTS, adapter->tx_head_addr);
2467 ew32(TDFHS, adapter->tx_head_addr);
2468 ew32(TCTL, tctl);
2469 E1000_WRITE_FLUSH();
1da177e4
LT		 2470
2471 adapter->tx_fifo_head = 0;
2472 atomic_set(&adapter->tx_fifo_stall, 0);
2473 netif_wake_queue(netdev);
2474 } else {
2475 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2476 }
2477 }
2478}
2479
2480/**
2481 * e1000_watchdog - Timer Call-back
2482 * @data: pointer to adapter cast into an unsigned long
2483 **/
64798845 2484static void e1000_watchdog(unsigned long data)
1da177e4 2485{
e982f17c 2486 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2487 struct e1000_hw *hw = &adapter->hw;
1da177e4 2488 struct net_device *netdev = adapter->netdev;
545c67c0 2489 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2490 u32 link, tctl;
2491 s32 ret_val;
cd94dd0b 2492
1dc32918 2493 ret_val = e1000_check_for_link(hw);
cd94dd0b 2494 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2495 (hw->phy_type == e1000_phy_igp_3) &&
2496 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2497 /* See e1000_kumeran_lock_loss_workaround() */
2498 DPRINTK(LINK, INFO,
2499 "Gigabit has been disabled, downgrading speed\n");
2500 }
90fb5135 2501
1dc32918
JP		 2502 if (hw->mac_type == e1000_82573) {
2503 e1000_enable_tx_pkt_filtering(hw);
2504 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2505 e1000_update_mng_vlan(adapter);
96838a40 2506 }
1da177e4 2507
1dc32918
JP		 2508 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2509 !(er32(TXCW) & E1000_TXCW_ANE))
2510 link = !hw->serdes_link_down;
1da177e4 2511 else
1dc32918 2512 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2513
96838a40
JB		 2514 if (link) {
2515 if (!netif_carrier_ok(netdev)) {
406874a7 2516 u32 ctrl;
c3033b01 2517 bool txb2b = true;
1dc32918 2518 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2519 &adapter->link_speed,
2520 &adapter->link_duplex);
2521
1dc32918 2522 ctrl = er32(CTRL);
9669f53b
AK		 2523 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2524 "Flow Control: %s\n",
2525 adapter->link_speed,
2526 adapter->link_duplex == FULL_DUPLEX ?
2527 "Full Duplex" : "Half Duplex",
2528 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2529 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2530 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2531 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2532
7e6c9861
JK		 2533 /* tweak tx_queue_len according to speed/duplex
2534 * and adjust the timeout factor */
66a2b0a3
JK		 2535 netdev->tx_queue_len = adapter->tx_queue_len;
2536 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2537 switch (adapter->link_speed) {
2538 case SPEED_10:
c3033b01 2539 txb2b = false;
7e6c9861
JK		 2540 netdev->tx_queue_len = 10;
2541 adapter->tx_timeout_factor = 8;
2542 break;
2543 case SPEED_100:
c3033b01 2544 txb2b = false;
7e6c9861
JK		 2545 netdev->tx_queue_len = 100;
2546 /* maybe add some timeout factor ? */
2547 break;
2548 }
2549
1dc32918
JP		 2550 if ((hw->mac_type == e1000_82571 ||
2551 hw->mac_type == e1000_82572) &&
c3033b01 2552 !txb2b) {
406874a7 2553 u32 tarc0;
1dc32918 2554 tarc0 = er32(TARC0);
90fb5135 2555 tarc0 &= ~(1 << 21);
1dc32918 2556 ew32(TARC0, tarc0);
7e6c9861 2557 }
90fb5135 2558
7e6c9861
JK		 2559 /* disable TSO for pcie and 10/100 speeds, to avoid
2560 * some hardware issues */
2561 if (!adapter->tso_force &&
1dc32918 2562 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2563 switch (adapter->link_speed) {
2564 case SPEED_10:
66a2b0a3 2565 case SPEED_100:
7e6c9861
JK		 2566 DPRINTK(PROBE,INFO,
2567 "10/100 speed: disabling TSO\n");
2568 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2569 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2570 break;
2571 case SPEED_1000:
2572 netdev->features |= NETIF_F_TSO;
87ca4e5b 2573 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2574 break;
2575 default:
2576 /* oops */
66a2b0a3
JK		 2577 break;
2578 }
2579 }
7e6c9861
JK		 2580
2581 /* enable transmits in the hardware, need to do this
2582 * after setting TARC0 */
1dc32918 2583 tctl = er32(TCTL);
7e6c9861 2584 tctl |= E1000_TCTL_EN;
1dc32918 2585 ew32(TCTL, tctl);
66a2b0a3 2586
1da177e4
LT		 2587 netif_carrier_on(netdev);
2588 netif_wake_queue(netdev);
56e1393f 2589 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2590 adapter->smartspeed = 0;
bb8e3311
JG		 2591 } else {
2592 /* make sure the receive unit is started */
1dc32918
JP		 2593 if (hw->rx_needs_kicking) {
2594 u32 rctl = er32(RCTL);
2595 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2596 }
1da177e4
LT		 2597 }
2598 } else {
96838a40 2599 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2600 adapter->link_speed = 0;
2601 adapter->link_duplex = 0;
2602 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2603 netif_carrier_off(netdev);
2604 netif_stop_queue(netdev);
56e1393f 2605 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2606
2607 /* 80003ES2LAN workaround--
2608 * For packet buffer work-around on link down event;
2609 * disable receives in the ISR and
2610 * reset device here in the watchdog
2611 */
1dc32918 2612 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2613 /* reset device */
2614 schedule_work(&adapter->reset_task);
1da177e4
LT		 2615 }
2616
2617 e1000_smartspeed(adapter);
2618 }
2619
2620 e1000_update_stats(adapter);
2621
1dc32918 2622 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2623 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2624 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2625 adapter->colc_old = adapter->stats.colc;
2626
2627 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2628 adapter->gorcl_old = adapter->stats.gorcl;
2629 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2630 adapter->gotcl_old = adapter->stats.gotcl;
2631
1dc32918 2632 e1000_update_adaptive(hw);
1da177e4 2633
f56799ea 2634 if (!netif_carrier_ok(netdev)) {
581d708e 2635 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2636 /* We've lost link, so the controller stops DMA,
2637 * but we've got queued Tx work that's never going
2638 * to get done, so reset controller to flush Tx.
2639 * (Do the reset outside of interrupt context). */
87041639
JK		 2640 adapter->tx_timeout_count++;
2641 schedule_work(&adapter->reset_task);
1da177e4
LT		 2642 }
2643 }
2644
1da177e4 2645 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2646 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2647
2648345f 2648 /* Force detection of hung controller every watchdog period */
c3033b01 2649 adapter->detect_tx_hung = true;
1da177e4 2650
96838a40 2651 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2652 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2653 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2654 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2655
1da177e4 2656 /* Reset the timer */
56e1393f 2657 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2658}
2659
835bb129
JB		 2660enum latency_range {
2661 lowest_latency = 0,
2662 low_latency = 1,
2663 bulk_latency = 2,
2664 latency_invalid = 255
2665};
2666
2667/**
2668 * e1000_update_itr - update the dynamic ITR value based on statistics
2669 * Stores a new ITR value based on packets and byte
2670 * counts during the last interrupt. The advantage of per interrupt
2671 * computation is faster updates and more accurate ITR for the current
2672 * traffic pattern. Constants in this function were computed
2673 * based on theoretical maximum wire speed and thresholds were set based
2674 * on testing data as well as attempting to minimize response time
2675 * while increasing bulk throughput.
2676 * this functionality is controlled by the InterruptThrottleRate module
2677 * parameter (see e1000_param.c)
2678 * @adapter: pointer to adapter
2679 * @itr_setting: current adapter->itr
2680 * @packets: the number of packets during this measurement interval
2681 * @bytes: the number of bytes during this measurement interval
2682 **/
2683static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2684 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2685{
2686 unsigned int retval = itr_setting;
2687 struct e1000_hw *hw = &adapter->hw;
2688
2689 if (unlikely(hw->mac_type < e1000_82540))
2690 goto update_itr_done;
2691
2692 if (packets == 0)
2693 goto update_itr_done;
2694
835bb129
JB		 2695 switch (itr_setting) {
2696 case lowest_latency:
2b65326e
JB		 2697 /* jumbo frames get bulk treatment*/
2698 if (bytes/packets > 8000)
2699 retval = bulk_latency;
2700 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2701 retval = low_latency;
2702 break;
2703 case low_latency: /* 50 usec aka 20000 ints/s */
2704 if (bytes > 10000) {
2b65326e
JB		 2705 /* jumbo frames need bulk latency setting */
2706 if (bytes/packets > 8000)
2707 retval = bulk_latency;
2708 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2709 retval = bulk_latency;
2710 else if ((packets > 35))
2711 retval = lowest_latency;
2b65326e
JB		 2712 } else if (bytes/packets > 2000)
2713 retval = bulk_latency;
2714 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2715 retval = lowest_latency;
2716 break;
2717 case bulk_latency: /* 250 usec aka 4000 ints/s */
2718 if (bytes > 25000) {
2719 if (packets > 35)
2720 retval = low_latency;
2b65326e
JB		 2721 } else if (bytes < 6000) {
2722 retval = low_latency;
835bb129
JB		 2723 }
2724 break;
2725 }
2726
2727update_itr_done:
2728 return retval;
2729}
2730
2731static void e1000_set_itr(struct e1000_adapter *adapter)
2732{
2733 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2734 u16 current_itr;
2735 u32 new_itr = adapter->itr;
835bb129
JB		 2736
2737 if (unlikely(hw->mac_type < e1000_82540))
2738 return;
2739
2740 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2741 if (unlikely(adapter->link_speed != SPEED_1000)) {
2742 current_itr = 0;
2743 new_itr = 4000;
2744 goto set_itr_now;
2745 }
2746
2747 adapter->tx_itr = e1000_update_itr(adapter,
2748 adapter->tx_itr,
2749 adapter->total_tx_packets,
2750 adapter->total_tx_bytes);
2b65326e
JB		 2751 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2752 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2753 adapter->tx_itr = low_latency;
2754
835bb129
JB		 2755 adapter->rx_itr = e1000_update_itr(adapter,
2756 adapter->rx_itr,
2757 adapter->total_rx_packets,
2758 adapter->total_rx_bytes);
2b65326e
JB		 2759 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2760 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2761 adapter->rx_itr = low_latency;
835bb129
JB		 2762
2763 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2764
835bb129
JB		 2765 switch (current_itr) {
2766 /* counts and packets in update_itr are dependent on these numbers */
2767 case lowest_latency:
2768 new_itr = 70000;
2769 break;
2770 case low_latency:
2771 new_itr = 20000; /* aka hwitr = ~200 */
2772 break;
2773 case bulk_latency:
2774 new_itr = 4000;
2775 break;
2776 default:
2777 break;
2778 }
2779
2780set_itr_now:
2781 if (new_itr != adapter->itr) {
2782 /* this attempts to bias the interrupt rate towards Bulk
2783 * by adding intermediate steps when interrupt rate is
2784 * increasing */
2785 new_itr = new_itr > adapter->itr ?
2786 min(adapter->itr + (new_itr >> 2), new_itr) :
2787 new_itr;
2788 adapter->itr = new_itr;
1dc32918 2789 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2790 }
2791
2792 return;
2793}
2794
1da177e4
LT		 2795#define E1000_TX_FLAGS_CSUM 0x00000001
2796#define E1000_TX_FLAGS_VLAN 0x00000002
2797#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2798#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2799#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2800#define E1000_TX_FLAGS_VLAN_SHIFT 16
2801
64798845
JP		 2802static int e1000_tso(struct e1000_adapter *adapter,
2803 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2804{
1da177e4 2805 struct e1000_context_desc *context_desc;
545c67c0 2806 struct e1000_buffer *buffer_info;
1da177e4 2807 unsigned int i;
406874a7
JP		 2808 u32 cmd_length = 0;
2809 u16 ipcse = 0, tucse, mss;
2810 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2811 int err;
2812
89114afd 2813 if (skb_is_gso(skb)) {
1da177e4
LT		 2814 if (skb_header_cloned(skb)) {
2815 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2816 if (err)
2817 return err;
2818 }
2819
ab6a5bb6 2820 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2821 mss = skb_shinfo(skb)->gso_size;
60828236 2822 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2823 struct iphdr *iph = ip_hdr(skb);
2824 iph->tot_len = 0;
2825 iph->check = 0;
aa8223c7
ACM		 2826 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2827 iph->daddr, 0,
2828 IPPROTO_TCP,
2829 0);
2d7edb92 2830 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2831 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2832 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2833 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2834 tcp_hdr(skb)->check =
0660e03f
ACM		 2835 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2836 &ipv6_hdr(skb)->daddr,
2837 0, IPPROTO_TCP, 0);
2d7edb92 2838 ipcse = 0;
2d7edb92 2839 }
bbe735e4 2840 ipcss = skb_network_offset(skb);
eddc9ec5 2841 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2842 tucss = skb_transport_offset(skb);
aa8223c7 2843 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2844 tucse = 0;
2845
2846 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2847 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2848
581d708e
MC		 2849 i = tx_ring->next_to_use;
2850 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2851 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2852
2853 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2854 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2855 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2856 context_desc->upper_setup.tcp_fields.tucss = tucss;
2857 context_desc->upper_setup.tcp_fields.tucso = tucso;
2858 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2859 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2860 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2861 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2862
545c67c0 2863 buffer_info->time_stamp = jiffies;
a9ebadd6 2864 buffer_info->next_to_watch = i;
545c67c0 2865
581d708e
MC		 2866 if (++i == tx_ring->count) i = 0;
2867 tx_ring->next_to_use = i;
1da177e4 2868
c3033b01 2869 return true;
1da177e4 2870 }
c3033b01 2871 return false;
1da177e4
LT		 2872}
2873
64798845
JP		 2874static bool e1000_tx_csum(struct e1000_adapter *adapter,
2875 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2876{
2877 struct e1000_context_desc *context_desc;
545c67c0 2878 struct e1000_buffer *buffer_info;
1da177e4 2879 unsigned int i;
406874a7 2880 u8 css;
3ed30676 2881 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2882
3ed30676
DG		 2883 if (skb->ip_summed != CHECKSUM_PARTIAL)
2884 return false;
1da177e4 2885
3ed30676
DG		 2886 switch (skb->protocol) {
2887 case __constant_htons(ETH_P_IP):
2888 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2889 cmd_len |= E1000_TXD_CMD_TCP;
2890 break;
2891 case __constant_htons(ETH_P_IPV6):
2892 /* XXX not handling all IPV6 headers */
2893 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2894 cmd_len |= E1000_TXD_CMD_TCP;
2895 break;
2896 default:
2897 if (unlikely(net_ratelimit()))
2898 DPRINTK(DRV, WARNING,
2899 "checksum_partial proto=%x!\n", skb->protocol);
2900 break;
2901 }
1da177e4 2902
3ed30676 2903 css = skb_transport_offset(skb);
1da177e4 2904
3ed30676
DG		 2905 i = tx_ring->next_to_use;
2906 buffer_info = &tx_ring->buffer_info[i];
2907 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2908
3ed30676
DG		 2909 context_desc->lower_setup.ip_config = 0;
2910 context_desc->upper_setup.tcp_fields.tucss = css;
2911 context_desc->upper_setup.tcp_fields.tucso =
2912 css + skb->csum_offset;
2913 context_desc->upper_setup.tcp_fields.tucse = 0;
2914 context_desc->tcp_seg_setup.data = 0;
2915 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2916
3ed30676
DG		 2917 buffer_info->time_stamp = jiffies;
2918 buffer_info->next_to_watch = i;
1da177e4 2919
3ed30676
DG		 2920 if (unlikely(++i == tx_ring->count)) i = 0;
2921 tx_ring->next_to_use = i;
2922
2923 return true;
1da177e4
LT		 2924}
2925
2926#define E1000_MAX_TXD_PWR 12
2927#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2928
64798845
JP		 2929static int e1000_tx_map(struct e1000_adapter *adapter,
2930 struct e1000_tx_ring *tx_ring,
2931 struct sk_buff *skb, unsigned int first,
2932 unsigned int max_per_txd, unsigned int nr_frags,
2933 unsigned int mss)
1da177e4 2934{
1dc32918 2935 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2936 struct e1000_buffer *buffer_info;
2937 unsigned int len = skb->len;
2938 unsigned int offset = 0, size, count = 0, i;
2939 unsigned int f;
2940 len -= skb->data_len;
2941
2942 i = tx_ring->next_to_use;
2943
96838a40 2944 while (len) {
1da177e4
LT		 2945 buffer_info = &tx_ring->buffer_info[i];
2946 size = min(len, max_per_txd);
fd803241
JK		 2947 /* Workaround for Controller erratum --
2948 * descriptor for non-tso packet in a linear SKB that follows a
2949 * tso gets written back prematurely before the data is fully
0f15a8fa 2950 * DMA'd to the controller */
fd803241 2951 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2952 !skb_is_gso(skb)) {
fd803241
JK		 2953 tx_ring->last_tx_tso = 0;
2954 size -= 4;
2955 }
2956
1da177e4
LT		 2957 /* Workaround for premature desc write-backs
2958 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2959 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2960 size -= 4;
97338bde
MC		 2961 /* work-around for errata 10 and it applies
2962 * to all controllers in PCI-X mode
2963 * The fix is to make sure that the first descriptor of a
2964 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2965 */
1dc32918 2966 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2967 (size > 2015) && count == 0))
2968 size = 2015;
96838a40 2969
1da177e4
LT		 2970 /* Workaround for potential 82544 hang in PCI-X. Avoid
2971 * terminating buffers within evenly-aligned dwords. */
96838a40 2972 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2973 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2974 size > 4))
2975 size -= 4;
2976
2977 buffer_info->length = size;
2978 buffer_info->dma =
2979 pci_map_single(adapter->pdev,
2980 skb->data + offset,
2981 size,
2982 PCI_DMA_TODEVICE);
2983 buffer_info->time_stamp = jiffies;
a9ebadd6 2984 buffer_info->next_to_watch = i;
1da177e4
LT		 2985
2986 len -= size;
2987 offset += size;
2988 count++;
96838a40 2989 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2990 }
2991
96838a40 2992 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2993 struct skb_frag_struct *frag;
2994
2995 frag = &skb_shinfo(skb)->frags[f];
2996 len = frag->size;
2997 offset = frag->page_offset;
2998
96838a40 2999 while (len) {
1da177e4
LT		 3000 buffer_info = &tx_ring->buffer_info[i];
3001 size = min(len, max_per_txd);
1da177e4
LT		 3002 /* Workaround for premature desc write-backs
3003 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3004 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3005 size -= 4;
1da177e4
LT		 3006 /* Workaround for potential 82544 hang in PCI-X.
3007 * Avoid terminating buffers within evenly-aligned
3008 * dwords. */
96838a40 3009 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3010 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3011 size > 4))
3012 size -= 4;
3013
3014 buffer_info->length = size;
3015 buffer_info->dma =
3016 pci_map_page(adapter->pdev,
3017 frag->page,
3018 offset,
3019 size,
3020 PCI_DMA_TODEVICE);
3021 buffer_info->time_stamp = jiffies;
a9ebadd6 3022 buffer_info->next_to_watch = i;
1da177e4
LT		 3023
3024 len -= size;
3025 offset += size;
3026 count++;
96838a40 3027 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3028 }
3029 }
3030
3031 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3032 tx_ring->buffer_info[i].skb = skb;
3033 tx_ring->buffer_info[first].next_to_watch = i;
3034
3035 return count;
3036}
3037
64798845
JP		 3038static void e1000_tx_queue(struct e1000_adapter *adapter,
3039 struct e1000_tx_ring *tx_ring, int tx_flags,
3040 int count)
1da177e4 3041{
1dc32918 3042 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3043 struct e1000_tx_desc *tx_desc = NULL;
3044 struct e1000_buffer *buffer_info;
406874a7 3045 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3046 unsigned int i;
3047
96838a40 3048 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3049 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3050 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3051 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3052
96838a40 3053 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3054 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3055 }
3056
96838a40 3057 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3058 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3059 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3060 }
3061
96838a40 3062 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3063 txd_lower |= E1000_TXD_CMD_VLE;
3064 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3065 }
3066
3067 i = tx_ring->next_to_use;
3068
96838a40 3069 while (count--) {
1da177e4
LT		 3070 buffer_info = &tx_ring->buffer_info[i];
3071 tx_desc = E1000_TX_DESC(*tx_ring, i);
3072 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3073 tx_desc->lower.data =
3074 cpu_to_le32(txd_lower | buffer_info->length);
3075 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3076 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3077 }
3078
3079 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3080
3081 /* Force memory writes to complete before letting h/w
3082 * know there are new descriptors to fetch. (Only
3083 * applicable for weak-ordered memory model archs,
3084 * such as IA-64). */
3085 wmb();
3086
3087 tx_ring->next_to_use = i;
1dc32918 3088 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3089 /* we need this if more than one processor can write to our tail
3090 * at a time, it syncronizes IO on IA64/Altix systems */
3091 mmiowb();
1da177e4
LT		 3092}
3093
3094/**
3095 * 82547 workaround to avoid controller hang in half-duplex environment.
3096 * The workaround is to avoid queuing a large packet that would span
3097 * the internal Tx FIFO ring boundary by notifying the stack to resend
3098 * the packet at a later time. This gives the Tx FIFO an opportunity to
3099 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3100 * to the beginning of the Tx FIFO.
3101 **/
3102
3103#define E1000_FIFO_HDR 0x10
3104#define E1000_82547_PAD_LEN 0x3E0
3105
64798845
JP		 3106static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3107 struct sk_buff *skb)
1da177e4 3108{
406874a7
JP		 3109 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3110 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3111
9099cfb9 3112 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3113
96838a40 3114 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3115 goto no_fifo_stall_required;
3116
96838a40 3117 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3118 return 1;
3119
96838a40 3120 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3121 atomic_set(&adapter->tx_fifo_stall, 1);
3122 return 1;
3123 }
3124
3125no_fifo_stall_required:
3126 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3127 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3128 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3129 return 0;
3130}
3131
2d7edb92 3132#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3133static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3134 struct sk_buff *skb)
2d7edb92
MC		 3135{
3136 struct e1000_hw *hw = &adapter->hw;
406874a7 3137 u16 length, offset;
96838a40 3138 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3139 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3140 ( hw->mng_cookie.status &
2d7edb92
MC		 3141 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3142 return 0;
3143 }
20a44028 3144 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3145 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3146 if ((htons(ETH_P_IP) == eth->h_proto)) {
3147 const struct iphdr *ip =
406874a7 3148 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3149 if (IPPROTO_UDP == ip->protocol) {
3150 struct udphdr *udp =
406874a7 3151 (struct udphdr *)((u8 *)ip +
2d7edb92 3152 (ip->ihl << 2));
96838a40 3153 if (ntohs(udp->dest) == 67) {
406874a7 3154 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3155 length = skb->len - offset;
3156
3157 return e1000_mng_write_dhcp_info(hw,
406874a7 3158 (u8 *)udp + 8,
2d7edb92
MC		 3159 length);
3160 }
3161 }
3162 }
3163 }
3164 return 0;
3165}
3166
65c7973f
JB		 3167static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3168{
3169 struct e1000_adapter *adapter = netdev_priv(netdev);
3170 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3171
3172 netif_stop_queue(netdev);
3173 /* Herbert's original patch had:
3174 * smp_mb__after_netif_stop_queue();
3175 * but since that doesn't exist yet, just open code it. */
3176 smp_mb();
3177
3178 /* We need to check again in a case another CPU has just
3179 * made room available. */
3180 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3181 return -EBUSY;
3182
3183 /* A reprieve! */
3184 netif_start_queue(netdev);
fcfb1224 3185 ++adapter->restart_queue;
65c7973f
JB		 3186 return 0;
3187}
3188
3189static int e1000_maybe_stop_tx(struct net_device *netdev,
3190 struct e1000_tx_ring *tx_ring, int size)
3191{
3192 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3193 return 0;
3194 return __e1000_maybe_stop_tx(netdev, size);
3195}
3196
1da177e4 3197#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3198static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3199{
60490fe0 3200 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3201 struct e1000_hw *hw = &adapter->hw;
581d708e 3202 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3203 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3204 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3205 unsigned int tx_flags = 0;
6d1e3aa7 3206 unsigned int len = skb->len - skb->data_len;
1da177e4 3207 unsigned long flags;
6d1e3aa7
KK		 3208 unsigned int nr_frags;
3209 unsigned int mss;
1da177e4 3210 int count = 0;
76c224bc 3211 int tso;
1da177e4 3212 unsigned int f;
1da177e4 3213
65c7973f
JB		 3214 /* This goes back to the question of how to logically map a tx queue
3215 * to a flow. Right now, performance is impacted slightly negatively
3216 * if using multiple tx queues. If the stack breaks away from a
3217 * single qdisc implementation, we can look at this again. */
581d708e 3218 tx_ring = adapter->tx_ring;
24025e4e 3219
581d708e 3220 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3221 dev_kfree_skb_any(skb);
3222 return NETDEV_TX_OK;
3223 }
3224
032fe6e9
JB		 3225 /* 82571 and newer doesn't need the workaround that limited descriptor
3226 * length to 4kB */
1dc32918 3227 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3228 max_per_txd = 8192;
3229
7967168c 3230 mss = skb_shinfo(skb)->gso_size;
76c224bc 3231 /* The controller does a simple calculation to
1da177e4
LT		 3232 * make sure there is enough room in the FIFO before
3233 * initiating the DMA for each buffer. The calc is:
3234 * 4 = ceil(buffer len/mss). To make sure we don't
3235 * overrun the FIFO, adjust the max buffer len if mss
3236 * drops. */
96838a40 3237 if (mss) {
406874a7 3238 u8 hdr_len;
1da177e4
LT		 3239 max_per_txd = min(mss << 2, max_per_txd);
3240 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3241
90fb5135
AK		 3242 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3243 * points to just header, pull a few bytes of payload from
3244 * frags into skb->data */
ab6a5bb6 3245 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3246 if (skb->data_len && hdr_len == len) {
1dc32918 3247 switch (hw->mac_type) {
9f687888 3248 unsigned int pull_size;
683a2aa3
HX		 3249 case e1000_82544:
3250 /* Make sure we have room to chop off 4 bytes,
3251 * and that the end alignment will work out to
3252 * this hardware's requirements
3253 * NOTE: this is a TSO only workaround
3254 * if end byte alignment not correct move us
3255 * into the next dword */
27a884dc 3256 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3257 break;
3258 /* fall through */
9f687888
JK		 3259 case e1000_82571:
3260 case e1000_82572:
3261 case e1000_82573:
cd94dd0b 3262 case e1000_ich8lan:
9f687888
JK		 3263 pull_size = min((unsigned int)4, skb->data_len);
3264 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3265 DPRINTK(DRV, ERR,
9f687888
JK		 3266 "__pskb_pull_tail failed.\n");
3267 dev_kfree_skb_any(skb);
749dfc70 3268 return NETDEV_TX_OK;
9f687888
JK		 3269 }
3270 len = skb->len - skb->data_len;
3271 break;
3272 default:
3273 /* do nothing */
3274 break;
d74bbd3b 3275 }
9a3056da 3276 }
1da177e4
LT		 3277 }
3278
9a3056da 3279 /* reserve a descriptor for the offload context */
84fa7933 3280 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3281 count++;
2648345f 3282 count++;
fd803241 3283
fd803241 3284 /* Controller Erratum workaround */
89114afd 3285 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3286 count++;
fd803241 3287
1da177e4
LT		 3288 count += TXD_USE_COUNT(len, max_txd_pwr);
3289
96838a40 3290 if (adapter->pcix_82544)
1da177e4
LT		 3291 count++;
3292
96838a40 3293 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3294 * in PCI-X mode, so add one more descriptor to the count
3295 */
1dc32918 3296 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3297 (len > 2015)))
3298 count++;
3299
1da177e4 3300 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3301 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3302 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3303 max_txd_pwr);
96838a40 3304 if (adapter->pcix_82544)
1da177e4
LT		 3305 count += nr_frags;
3306
0f15a8fa 3307
1dc32918
JP		 3308 if (hw->tx_pkt_filtering &&
3309 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3310 e1000_transfer_dhcp_info(adapter, skb);
3311
f50393fe 3312 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3313 /* Collision - tell upper layer to requeue */
581d708e 3314 return NETDEV_TX_LOCKED;
1da177e4
LT		 3315
3316 /* need: count + 2 desc gap to keep tail from touching
3317 * head, otherwise try next time */
65c7973f 3318 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3319 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3320 return NETDEV_TX_BUSY;
3321 }
3322
1dc32918 3323 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3324 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3325 netif_stop_queue(netdev);
1314bbf3 3326 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3327 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3328 return NETDEV_TX_BUSY;
3329 }
3330 }
3331
96838a40 3332 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3333 tx_flags |= E1000_TX_FLAGS_VLAN;
3334 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3335 }
3336
581d708e 3337 first = tx_ring->next_to_use;
96838a40 3338
581d708e 3339 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3340 if (tso < 0) {
3341 dev_kfree_skb_any(skb);
581d708e 3342 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3343 return NETDEV_TX_OK;
3344 }
3345
fd803241
JK		 3346 if (likely(tso)) {
3347 tx_ring->last_tx_tso = 1;
1da177e4 3348 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3349 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3350 tx_flags |= E1000_TX_FLAGS_CSUM;
3351
2d7edb92 3352 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3353 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3354 * no longer assume, we must. */
60828236 3355 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3356 tx_flags |= E1000_TX_FLAGS_IPV4;
3357
581d708e
MC		 3358 e1000_tx_queue(adapter, tx_ring, tx_flags,
3359 e1000_tx_map(adapter, tx_ring, skb, first,
3360 max_per_txd, nr_frags, mss));
1da177e4
LT		 3361
3362 netdev->trans_start = jiffies;
3363
3364 /* Make sure there is space in the ring for the next send. */
65c7973f 3365 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3366
581d708e 3367 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3368 return NETDEV_TX_OK;
3369}
3370
3371/**
3372 * e1000_tx_timeout - Respond to a Tx Hang
3373 * @netdev: network interface device structure
3374 **/
3375
64798845 3376static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3377{
60490fe0 3378 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3379
3380 /* Do the reset outside of interrupt context */
87041639
JK		 3381 adapter->tx_timeout_count++;
3382 schedule_work(&adapter->reset_task);
1da177e4
LT		 3383}
3384
64798845 3385static void e1000_reset_task(struct work_struct *work)
1da177e4 3386{
65f27f38
DH		 3387 struct e1000_adapter *adapter =
3388 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3389
2db10a08 3390 e1000_reinit_locked(adapter);
1da177e4
LT		 3391}
3392
3393/**
3394 * e1000_get_stats - Get System Network Statistics
3395 * @netdev: network interface device structure
3396 *
3397 * Returns the address of the device statistics structure.
3398 * The statistics are actually updated from the timer callback.
3399 **/
3400
64798845 3401static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3402{
60490fe0 3403 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3404
6b7660cd 3405 /* only return the current stats */
1da177e4
LT		 3406 return &adapter->net_stats;
3407}
3408
3409/**
3410 * e1000_change_mtu - Change the Maximum Transfer Unit
3411 * @netdev: network interface device structure
3412 * @new_mtu: new value for maximum frame size
3413 *
3414 * Returns 0 on success, negative on failure
3415 **/
3416
64798845 3417static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3418{
60490fe0 3419 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3420 struct e1000_hw *hw = &adapter->hw;
1da177e4 3421 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3422 u16 eeprom_data = 0;
1da177e4 3423
96838a40
JB		 3424 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3425 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3426 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3427 return -EINVAL;
2d7edb92 3428 }
1da177e4 3429
997f5cbd 3430 /* Adapter-specific max frame size limits. */
1dc32918 3431 switch (hw->mac_type) {
9e2feace 3432 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3433 case e1000_ich8lan:
997f5cbd
JK		 3434 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3435 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3436 return -EINVAL;
2d7edb92 3437 }
997f5cbd 3438 break;
85b22eb6 3439 case e1000_82573:
249d71d6
BA		 3440 /* Jumbo Frames not supported if:
3441 * - this is not an 82573L device
3442 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3443 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3444 &eeprom_data);
1dc32918 3445 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3446 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3447 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3448 DPRINTK(PROBE, ERR,
3449 "Jumbo Frames not supported.\n");
3450 return -EINVAL;
3451 }
3452 break;
3453 }
249d71d6
BA		 3454 /* ERT will be enabled later to enable wire speed receives */
3455
85b22eb6 3456 /* fall through to get support */
997f5cbd
JK		 3457 case e1000_82571:
3458 case e1000_82572:
87041639 3459 case e1000_80003es2lan:
997f5cbd
JK		 3460#define MAX_STD_JUMBO_FRAME_SIZE 9234
3461 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3462 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3463 return -EINVAL;
3464 }
3465 break;
3466 default:
3467 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3468 break;
1da177e4
LT		 3469 }
3470
87f5032e 3471 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3472 * means we reserve 2 more, this pushes us to allocate from the next
3473 * larger slab size
3474 * i.e. RXBUFFER_2048 --> size-4096 slab */
3475
3476 if (max_frame <= E1000_RXBUFFER_256)
3477 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3478 else if (max_frame <= E1000_RXBUFFER_512)
3479 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3480 else if (max_frame <= E1000_RXBUFFER_1024)
3481 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3482 else if (max_frame <= E1000_RXBUFFER_2048)
3483 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3484 else if (max_frame <= E1000_RXBUFFER_4096)
3485 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3486 else if (max_frame <= E1000_RXBUFFER_8192)
3487 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3488 else if (max_frame <= E1000_RXBUFFER_16384)
3489 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3490
3491 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3492 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3493 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3494 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3495 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3496
2d7edb92 3497 netdev->mtu = new_mtu;
1dc32918 3498 hw->max_frame_size = max_frame;
2d7edb92 3499
2db10a08
AK		 3500 if (netif_running(netdev))
3501 e1000_reinit_locked(adapter);
1da177e4 3502
1da177e4
LT		 3503 return 0;
3504}
3505
3506/**
3507 * e1000_update_stats - Update the board statistics counters
3508 * @adapter: board private structure
3509 **/
3510
64798845 3511void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3512{
3513 struct e1000_hw *hw = &adapter->hw;
282f33c9 3514 struct pci_dev *pdev = adapter->pdev;
1da177e4 3515 unsigned long flags;
406874a7 3516 u16 phy_tmp;
1da177e4
LT		 3517
3518#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3519
282f33c9
LV		 3520 /*
3521 * Prevent stats update while adapter is being reset, or if the pci
3522 * connection is down.
3523 */
9026729b 3524 if (adapter->link_speed == 0)
282f33c9 3525 return;
81b1955e 3526 if (pci_channel_offline(pdev))
9026729b
AK		 3527 return;
3528
1da177e4
LT		 3529 spin_lock_irqsave(&adapter->stats_lock, flags);
3530
828d055f 3531 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3532 * called from the interrupt context, so they must only
3533 * be written while holding adapter->stats_lock
3534 */
3535
1dc32918
JP		 3536 adapter->stats.crcerrs += er32(CRCERRS);
3537 adapter->stats.gprc += er32(GPRC);
3538 adapter->stats.gorcl += er32(GORCL);
3539 adapter->stats.gorch += er32(GORCH);
3540 adapter->stats.bprc += er32(BPRC);
3541 adapter->stats.mprc += er32(MPRC);
3542 adapter->stats.roc += er32(ROC);
3543
3544 if (hw->mac_type != e1000_ich8lan) {
3545 adapter->stats.prc64 += er32(PRC64);
3546 adapter->stats.prc127 += er32(PRC127);
3547 adapter->stats.prc255 += er32(PRC255);
3548 adapter->stats.prc511 += er32(PRC511);
3549 adapter->stats.prc1023 += er32(PRC1023);
3550 adapter->stats.prc1522 += er32(PRC1522);
3551 }
3552
3553 adapter->stats.symerrs += er32(SYMERRS);
3554 adapter->stats.mpc += er32(MPC);
3555 adapter->stats.scc += er32(SCC);
3556 adapter->stats.ecol += er32(ECOL);
3557 adapter->stats.mcc += er32(MCC);
3558 adapter->stats.latecol += er32(LATECOL);
3559 adapter->stats.dc += er32(DC);
3560 adapter->stats.sec += er32(SEC);
3561 adapter->stats.rlec += er32(RLEC);
3562 adapter->stats.xonrxc += er32(XONRXC);
3563 adapter->stats.xontxc += er32(XONTXC);
3564 adapter->stats.xoffrxc += er32(XOFFRXC);
3565 adapter->stats.xofftxc += er32(XOFFTXC);
3566 adapter->stats.fcruc += er32(FCRUC);
3567 adapter->stats.gptc += er32(GPTC);
3568 adapter->stats.gotcl += er32(GOTCL);
3569 adapter->stats.gotch += er32(GOTCH);
3570 adapter->stats.rnbc += er32(RNBC);
3571 adapter->stats.ruc += er32(RUC);
3572 adapter->stats.rfc += er32(RFC);
3573 adapter->stats.rjc += er32(RJC);
3574 adapter->stats.torl += er32(TORL);
3575 adapter->stats.torh += er32(TORH);
3576 adapter->stats.totl += er32(TOTL);
3577 adapter->stats.toth += er32(TOTH);
3578 adapter->stats.tpr += er32(TPR);
3579
3580 if (hw->mac_type != e1000_ich8lan) {
3581 adapter->stats.ptc64 += er32(PTC64);
3582 adapter->stats.ptc127 += er32(PTC127);
3583 adapter->stats.ptc255 += er32(PTC255);
3584 adapter->stats.ptc511 += er32(PTC511);
3585 adapter->stats.ptc1023 += er32(PTC1023);
3586 adapter->stats.ptc1522 += er32(PTC1522);
3587 }
3588
3589 adapter->stats.mptc += er32(MPTC);
3590 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3591
3592 /* used for adaptive IFS */
3593
1dc32918 3594 hw->tx_packet_delta = er32(TPT);
1da177e4 3595 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3596 hw->collision_delta = er32(COLC);
1da177e4
LT		 3597 adapter->stats.colc += hw->collision_delta;
3598
96838a40 3599 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3600 adapter->stats.algnerrc += er32(ALGNERRC);
3601 adapter->stats.rxerrc += er32(RXERRC);
3602 adapter->stats.tncrs += er32(TNCRS);
3603 adapter->stats.cexterr += er32(CEXTERR);
3604 adapter->stats.tsctc += er32(TSCTC);
3605 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3606 }
96838a40 3607 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3608 adapter->stats.iac += er32(IAC);
3609 adapter->stats.icrxoc += er32(ICRXOC);
3610
3611 if (hw->mac_type != e1000_ich8lan) {
3612 adapter->stats.icrxptc += er32(ICRXPTC);
3613 adapter->stats.icrxatc += er32(ICRXATC);
3614 adapter->stats.ictxptc += er32(ICTXPTC);
3615 adapter->stats.ictxatc += er32(ICTXATC);
3616 adapter->stats.ictxqec += er32(ICTXQEC);
3617 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3618 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3619 }
2d7edb92 3620 }
1da177e4
LT		 3621
3622 /* Fill out the OS statistics structure */
1da177e4
LT		 3623 adapter->net_stats.multicast = adapter->stats.mprc;
3624 adapter->net_stats.collisions = adapter->stats.colc;
3625
3626 /* Rx Errors */
3627
87041639
JK		 3628 /* RLEC on some newer hardware can be incorrect so build
3629 * our own version based on RUC and ROC */
1da177e4
LT		 3630 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3631 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3632 adapter->stats.ruc + adapter->stats.roc +
3633 adapter->stats.cexterr;
49559854
MW		 3634 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3635 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3636 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3637 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3638 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3639
3640 /* Tx Errors */
49559854
MW		 3641 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3642 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3643 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3644 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3645 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3646 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3647 adapter->link_duplex == FULL_DUPLEX) {
3648 adapter->net_stats.tx_carrier_errors = 0;
3649 adapter->stats.tncrs = 0;
3650 }
1da177e4
LT		 3651
3652 /* Tx Dropped needs to be maintained elsewhere */
3653
3654 /* Phy Stats */
96838a40
JB		 3655 if (hw->media_type == e1000_media_type_copper) {
3656 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3657 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3658 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3659 adapter->phy_stats.idle_errors += phy_tmp;
3660 }
3661
96838a40 3662 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3663 (hw->phy_type == e1000_phy_m88) &&
3664 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3665 adapter->phy_stats.receive_errors += phy_tmp;
3666 }
3667
15e376b4 3668 /* Management Stats */
1dc32918
JP		 3669 if (hw->has_smbus) {
3670 adapter->stats.mgptc += er32(MGTPTC);
3671 adapter->stats.mgprc += er32(MGTPRC);
3672 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3673 }
3674
1da177e4
LT		 3675 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3676}
9ac98284
JB		 3677
3678/**
3679 * e1000_intr_msi - Interrupt Handler
3680 * @irq: interrupt number
3681 * @data: pointer to a network interface device structure
3682 **/
3683
64798845 3684static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3685{
3686 struct net_device *netdev = data;
3687 struct e1000_adapter *adapter = netdev_priv(netdev);
3688 struct e1000_hw *hw = &adapter->hw;
1dc32918 3689 u32 icr = er32(ICR);
9ac98284 3690
9150b76a
JB		 3691 /* in NAPI mode read ICR disables interrupts using IAM */
3692
b5fc8f0c
JB		 3693 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3694 hw->get_link_status = 1;
3695 /* 80003ES2LAN workaround-- For packet buffer work-around on
3696 * link down event; disable receives here in the ISR and reset
3697 * adapter in watchdog */
3698 if (netif_carrier_ok(netdev) &&
1dc32918 3699 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3700 /* disable receives */
1dc32918
JP		 3701 u32 rctl = er32(RCTL);
3702 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3703 }
b5fc8f0c
JB		 3704 /* guard against interrupt when we're going down */
3705 if (!test_bit(__E1000_DOWN, &adapter->flags))
3706 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3707 }
3708
bea3348e 3709 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3710 adapter->total_tx_bytes = 0;
3711 adapter->total_tx_packets = 0;
3712 adapter->total_rx_bytes = 0;
3713 adapter->total_rx_packets = 0;
bea3348e 3714 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3715 } else
9ac98284 3716 e1000_irq_enable(adapter);
9ac98284
JB		 3717
3718 return IRQ_HANDLED;
3719}
1da177e4
LT		 3720
3721/**
3722 * e1000_intr - Interrupt Handler
3723 * @irq: interrupt number
3724 * @data: pointer to a network interface device structure
1da177e4
LT		 3725 **/
3726
64798845 3727static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3728{
3729 struct net_device *netdev = data;
60490fe0 3730 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3731 struct e1000_hw *hw = &adapter->hw;
1dc32918 3732 u32 rctl, icr = er32(ICR);
c3570acb 3733
835bb129
JB		 3734 if (unlikely(!icr))
3735 return IRQ_NONE; /* Not our interrupt */
3736
835bb129
JB		 3737 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3738 * not set, then the adapter didn't send an interrupt */
3739 if (unlikely(hw->mac_type >= e1000_82571 &&
3740 !(icr & E1000_ICR_INT_ASSERTED)))
3741 return IRQ_NONE;
3742
9150b76a
JB		 3743 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3744 * need for the IMC write */
1da177e4 3745
96838a40 3746 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3747 hw->get_link_status = 1;
87041639
JK		 3748 /* 80003ES2LAN workaround--
3749 * For packet buffer work-around on link down event;
3750 * disable receives here in the ISR and
3751 * reset adapter in watchdog
3752 */
3753 if (netif_carrier_ok(netdev) &&
1dc32918 3754 (hw->mac_type == e1000_80003es2lan)) {
87041639 3755 /* disable receives */
1dc32918
JP		 3756 rctl = er32(RCTL);
3757 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3758 }
1314bbf3
AK		 3759 /* guard against interrupt when we're going down */
3760 if (!test_bit(__E1000_DOWN, &adapter->flags))
3761 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3762 }
3763
1e613fd9 3764 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3765 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3766 ew32(IMC, ~0);
3767 E1000_WRITE_FLUSH();
1e613fd9 3768 }
bea3348e 3769 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3770 adapter->total_tx_bytes = 0;
3771 adapter->total_tx_packets = 0;
3772 adapter->total_rx_bytes = 0;
3773 adapter->total_rx_packets = 0;
bea3348e 3774 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3775 } else
90fb5135
AK		 3776 /* this really should not happen! if it does it is basically a
3777 * bug, but not a hard error, so enable ints and continue */
581d708e 3778 e1000_irq_enable(adapter);
1da177e4 3779
1da177e4
LT		 3780 return IRQ_HANDLED;
3781}
3782
1da177e4
LT		 3783/**
3784 * e1000_clean - NAPI Rx polling callback
3785 * @adapter: board private structure
3786 **/
64798845 3787static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3788{
bea3348e
SH		 3789 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3790 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3791 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3792
3793 /* Must NOT use netdev_priv macro here. */
3794 adapter = poll_dev->priv;
3795
d3d9e484
AK		 3796 /* e1000_clean is called per-cpu. This lock protects
3797 * tx_ring[0] from being cleaned by multiple cpus
3798 * simultaneously. A failure obtaining the lock means
3799 * tx_ring[0] is currently being cleaned anyway. */
3800 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6
DM		 3801 tx_cleaned = e1000_clean_tx_irq(adapter,
3802 &adapter->tx_ring[0]);
d3d9e484 3803 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3804 }
3805
d3d9e484 3806 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3807 &work_done, budget);
96838a40 3808
d2c7ddd6
DM		 3809 if (tx_cleaned)
3810 work_done = budget;
3811
53e52c72
DM		 3812 /* If budget not fully consumed, exit the polling mode */
3813 if (work_done < budget) {
835bb129
JB		 3814 if (likely(adapter->itr_setting & 3))
3815 e1000_set_itr(adapter);
bea3348e 3816 netif_rx_complete(poll_dev, napi);
1da177e4 3817 e1000_irq_enable(adapter);
1da177e4
LT		 3818 }
3819
bea3348e 3820 return work_done;
1da177e4
LT		 3821}
3822
1da177e4
LT		 3823/**
3824 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3825 * @adapter: board private structure
3826 **/
64798845
JP		 3827static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3828 struct e1000_tx_ring *tx_ring)
1da177e4 3829{
1dc32918 3830 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3831 struct net_device *netdev = adapter->netdev;
3832 struct e1000_tx_desc *tx_desc, *eop_desc;
3833 struct e1000_buffer *buffer_info;
3834 unsigned int i, eop;
2a1af5d7 3835 unsigned int count = 0;
c3033b01 3836 bool cleaned = false;
835bb129 3837 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3838
3839 i = tx_ring->next_to_clean;
3840 eop = tx_ring->buffer_info[i].next_to_watch;
3841 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3842
581d708e 3843 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
c3033b01 3844 for (cleaned = false; !cleaned; ) {
1da177e4
LT		 3845 tx_desc = E1000_TX_DESC(*tx_ring, i);
3846 buffer_info = &tx_ring->buffer_info[i];
3847 cleaned = (i == eop);
3848
835bb129 3849 if (cleaned) {
2b65326e 3850 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3851 unsigned int segs, bytecount;
3852 segs = skb_shinfo(skb)->gso_segs ?: 1;
3853 /* multiply data chunks by size of headers */
3854 bytecount = ((segs - 1) * skb_headlen(skb)) +
3855 skb->len;
2b65326e 3856 total_tx_packets += segs;
7753b171 3857 total_tx_bytes += bytecount;
835bb129 3858 }
fd803241 3859 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3860 tx_desc->upper.data = 0;
1da177e4 3861
96838a40 3862 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3863 }
581d708e 3864
1da177e4
LT		 3865 eop = tx_ring->buffer_info[i].next_to_watch;
3866 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3867#define E1000_TX_WEIGHT 64
3868 /* weight of a sort for tx, to avoid endless transmit cleanup */
c3570acb
FR		 3869 if (count++ == E1000_TX_WEIGHT)
3870 break;
1da177e4
LT		 3871 }
3872
3873 tx_ring->next_to_clean = i;
3874
77b2aad5 3875#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3876 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3877 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3878 /* Make sure that anybody stopping the queue after this
3879 * sees the new next_to_clean.
3880 */
3881 smp_mb();
fcfb1224 3882 if (netif_queue_stopped(netdev)) {
77b2aad5 3883 netif_wake_queue(netdev);
fcfb1224
JB		 3884 ++adapter->restart_queue;
3885 }
77b2aad5 3886 }
2648345f 3887
581d708e 3888 if (adapter->detect_tx_hung) {
2648345f 3889 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3890 * check with the clearing of time_stamp and movement of i */
c3033b01 3891 adapter->detect_tx_hung = false;
392137fa
JK		 3892 if (tx_ring->buffer_info[eop].dma &&
3893 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3894 (adapter->tx_timeout_factor * HZ))
1dc32918 3895 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3896
3897 /* detected Tx unit hang */
c6963ef5 3898 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3899 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3900 " TDH <%x>\n"
3901 " TDT <%x>\n"
3902 " next_to_use <%x>\n"
3903 " next_to_clean <%x>\n"
3904 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3905 " time_stamp <%lx>\n"
3906 " next_to_watch <%x>\n"
3907 " jiffies <%lx>\n"
3908 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3909 (unsigned long)((tx_ring - adapter->tx_ring) /
3910 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3911 readl(hw->hw_addr + tx_ring->tdh),
3912 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3913 tx_ring->next_to_use,
392137fa
JK		 3914 tx_ring->next_to_clean,
3915 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3916 eop,
3917 jiffies,
3918 eop_desc->upper.fields.status);
1da177e4 3919 netif_stop_queue(netdev);
70b8f1e1 3920 }
1da177e4 3921 }
835bb129
JB		 3922 adapter->total_tx_bytes += total_tx_bytes;
3923 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3924 adapter->net_stats.tx_bytes += total_tx_bytes;
3925 adapter->net_stats.tx_packets += total_tx_packets;
1da177e4
LT		 3926 return cleaned;
3927}
3928
3929/**
3930 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3931 * @adapter: board private structure
3932 * @status_err: receive descriptor status and error fields
3933 * @csum: receive descriptor csum field
3934 * @sk_buff: socket buffer with received data
1da177e4
LT		 3935 **/
3936
64798845
JP		 3937static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3938 u32 csum, struct sk_buff *skb)
1da177e4 3939{
1dc32918 3940 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3941 u16 status = (u16)status_err;
3942 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3943 skb->ip_summed = CHECKSUM_NONE;
3944
1da177e4 3945 /* 82543 or newer only */
1dc32918 3946 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3947 /* Ignore Checksum bit is set */
96838a40 3948 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3949 /* TCP/UDP checksum error bit is set */
96838a40 3950 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3951 /* let the stack verify checksum errors */
1da177e4 3952 adapter->hw_csum_err++;
2d7edb92
MC		 3953 return;
3954 }
3955 /* TCP/UDP Checksum has not been calculated */
1dc32918 3956 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3957 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3958 return;
1da177e4 3959 } else {
96838a40 3960 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3961 return;
3962 }
3963 /* It must be a TCP or UDP packet with a valid checksum */
3964 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3965 /* TCP checksum is good */
3966 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3967 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3968 /* IP fragment with UDP payload */
3969 /* Hardware complements the payload checksum, so we undo it
3970 * and then put the value in host order for further stack use.
3971 */
3e18826c
AV		 3972 __sum16 sum = (__force __sum16)htons(csum);
3973 skb->csum = csum_unfold(~sum);
84fa7933 3974 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3975 }
2d7edb92 3976 adapter->hw_csum_good++;
1da177e4
LT		 3977}
3978
3979/**
2d7edb92 3980 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3981 * @adapter: board private structure
3982 **/
64798845
JP		 3983static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3984 struct e1000_rx_ring *rx_ring,
3985 int *work_done, int work_to_do)
1da177e4 3986{
1dc32918 3987 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3988 struct net_device *netdev = adapter->netdev;
3989 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3990 struct e1000_rx_desc *rx_desc, *next_rxd;
3991 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3992 unsigned long flags;
406874a7
JP		 3993 u32 length;
3994 u8 last_byte;
1da177e4 3995 unsigned int i;
72d64a43 3996 int cleaned_count = 0;
c3033b01 3997 bool cleaned = false;
835bb129 3998 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3999
4000 i = rx_ring->next_to_clean;
4001 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4002 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4003
b92ff8ee 4004 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4005 struct sk_buff *skb;
a292ca6e 4006 u8 status;
90fb5135 4007
96838a40 4008 if (*work_done >= work_to_do)
1da177e4
LT		 4009 break;
4010 (*work_done)++;
c3570acb 4011
a292ca6e 4012 status = rx_desc->status;
b92ff8ee 4013 skb = buffer_info->skb;
86c3d59f
JB		 4014 buffer_info->skb = NULL;
4015
30320be8
JK		 4016 prefetch(skb->data - NET_IP_ALIGN);
4017
86c3d59f
JB		 4018 if (++i == rx_ring->count) i = 0;
4019 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4020 prefetch(next_rxd);
4021
86c3d59f 4022 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4023
c3033b01 4024 cleaned = true;
72d64a43 4025 cleaned_count++;
a292ca6e
JK		 4026 pci_unmap_single(pdev,
4027 buffer_info->dma,
4028 buffer_info->length,
1da177e4
LT		 4029 PCI_DMA_FROMDEVICE);
4030
1da177e4
LT		 4031 length = le16_to_cpu(rx_desc->length);
4032
a1415ee6
JK		 4033 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4034 /* All receives must fit into a single buffer */
4035 E1000_DBG("%s: Receive packet consumed multiple"
4036 " buffers\n", netdev->name);
864c4e45 4037 /* recycle */
8fc897b0 4038 buffer_info->skb = skb;
1da177e4
LT		 4039 goto next_desc;
4040 }
4041
96838a40 4042 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4043 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4044 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4045 last_byte)) {
1da177e4 4046 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4047 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4048 length, skb->data);
4049 spin_unlock_irqrestore(&adapter->stats_lock,
4050 flags);
4051 length--;
4052 } else {
9e2feace
AK		 4053 /* recycle */
4054 buffer_info->skb = skb;
1da177e4
LT		 4055 goto next_desc;
4056 }
1cb5821f 4057 }
1da177e4 4058
d2a1e213
JB		 4059 /* adjust length to remove Ethernet CRC, this must be
4060 * done after the TBI_ACCEPT workaround above */
4061 length -= 4;
4062
835bb129
JB		 4063 /* probably a little skewed due to removing CRC */
4064 total_rx_bytes += length;
4065 total_rx_packets++;
4066
a292ca6e
JK		 4067 /* code added for copybreak, this should improve
4068 * performance for small packets with large amounts
4069 * of reassembly being done in the stack */
1f753861 4070 if (length < copybreak) {
a292ca6e 4071 struct sk_buff *new_skb =
87f5032e 4072 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4073 if (new_skb) {
4074 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4075 skb_copy_to_linear_data_offset(new_skb,
4076 -NET_IP_ALIGN,
4077 (skb->data -
4078 NET_IP_ALIGN),
4079 (length +
4080 NET_IP_ALIGN));
a292ca6e
JK		 4081 /* save the skb in buffer_info as good */
4082 buffer_info->skb = skb;
4083 skb = new_skb;
a292ca6e 4084 }
996695de
AK		 4085 /* else just continue with the old one */
4086 }
a292ca6e 4087 /* end copybreak code */
996695de 4088 skb_put(skb, length);
1da177e4
LT		 4089
4090 /* Receive Checksum Offload */
a292ca6e 4091 e1000_rx_checksum(adapter,
406874a7
JP		 4092 (u32)(status) |
4093 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4094 le16_to_cpu(rx_desc->csum), skb);
96838a40 4095
1da177e4 4096 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4097
96838a40 4098 if (unlikely(adapter->vlgrp &&
a292ca6e 4099 (status & E1000_RXD_STAT_VP))) {
1da177e4 4100 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4101 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4102 } else {
4103 netif_receive_skb(skb);
4104 }
c3570acb 4105
1da177e4
LT		 4106 netdev->last_rx = jiffies;
4107
4108next_desc:
4109 rx_desc->status = 0;
1da177e4 4110
72d64a43
JK		 4111 /* return some buffers to hardware, one at a time is too slow */
4112 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4113 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4114 cleaned_count = 0;
4115 }
4116
30320be8 4117 /* use prefetched values */
86c3d59f
JB		 4118 rx_desc = next_rxd;
4119 buffer_info = next_buffer;
1da177e4 4120 }
1da177e4 4121 rx_ring->next_to_clean = i;
72d64a43
JK		 4122
4123 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4124 if (cleaned_count)
4125 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4126
835bb129
JB		 4127 adapter->total_rx_packets += total_rx_packets;
4128 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4129 adapter->net_stats.rx_bytes += total_rx_bytes;
4130 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4131 return cleaned;
4132}
4133
1da177e4 4134/**
2d7edb92 4135 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4136 * @adapter: address of board private structure
4137 **/
4138
64798845
JP		 4139static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4140 struct e1000_rx_ring *rx_ring,
4141 int cleaned_count)
1da177e4 4142{
1dc32918 4143 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4144 struct net_device *netdev = adapter->netdev;
4145 struct pci_dev *pdev = adapter->pdev;
4146 struct e1000_rx_desc *rx_desc;
4147 struct e1000_buffer *buffer_info;
4148 struct sk_buff *skb;
2648345f
MC		 4149 unsigned int i;
4150 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4151
4152 i = rx_ring->next_to_use;
4153 buffer_info = &rx_ring->buffer_info[i];
4154
a292ca6e 4155 while (cleaned_count--) {
ca6f7224
CH		 4156 skb = buffer_info->skb;
4157 if (skb) {
a292ca6e
JK		 4158 skb_trim(skb, 0);
4159 goto map_skb;
4160 }
4161
ca6f7224 4162 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4163 if (unlikely(!skb)) {
1da177e4 4164 /* Better luck next round */
72d64a43 4165 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4166 break;
4167 }
4168
2648345f 4169 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4170 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4171 struct sk_buff *oldskb = skb;
2648345f
MC		 4172 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4173 "at %p\n", bufsz, skb->data);
4174 /* Try again, without freeing the previous */
87f5032e 4175 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4176 /* Failed allocation, critical failure */
1da177e4
LT		 4177 if (!skb) {
4178 dev_kfree_skb(oldskb);
4179 break;
4180 }
2648345f 4181
1da177e4
LT		 4182 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4183 /* give up */
4184 dev_kfree_skb(skb);
4185 dev_kfree_skb(oldskb);
4186 break; /* while !buffer_info->skb */
1da177e4 4187 }
ca6f7224
CH		 4188
4189 /* Use new allocation */
4190 dev_kfree_skb(oldskb);
1da177e4 4191 }
1da177e4
LT		 4192 /* Make buffer alignment 2 beyond a 16 byte boundary
4193 * this will result in a 16 byte aligned IP header after
4194 * the 14 byte MAC header is removed
4195 */
4196 skb_reserve(skb, NET_IP_ALIGN);
4197
1da177e4
LT		 4198 buffer_info->skb = skb;
4199 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4200map_skb:
1da177e4
LT		 4201 buffer_info->dma = pci_map_single(pdev,
4202 skb->data,
4203 adapter->rx_buffer_len,
4204 PCI_DMA_FROMDEVICE);
4205
2648345f
MC		 4206 /* Fix for errata 23, can't cross 64kB boundary */
4207 if (!e1000_check_64k_bound(adapter,
4208 (void *)(unsigned long)buffer_info->dma,
4209 adapter->rx_buffer_len)) {
4210 DPRINTK(RX_ERR, ERR,
4211 "dma align check failed: %u bytes at %p\n",
4212 adapter->rx_buffer_len,
4213 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4214 dev_kfree_skb(skb);
4215 buffer_info->skb = NULL;
4216
2648345f 4217 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4218 adapter->rx_buffer_len,
4219 PCI_DMA_FROMDEVICE);
4220
4221 break; /* while !buffer_info->skb */
4222 }
1da177e4
LT		 4223 rx_desc = E1000_RX_DESC(*rx_ring, i);
4224 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4225
96838a40
JB		 4226 if (unlikely(++i == rx_ring->count))
4227 i = 0;
1da177e4
LT		 4228 buffer_info = &rx_ring->buffer_info[i];
4229 }
4230
b92ff8ee
JB		 4231 if (likely(rx_ring->next_to_use != i)) {
4232 rx_ring->next_to_use = i;
4233 if (unlikely(i-- == 0))
4234 i = (rx_ring->count - 1);
4235
4236 /* Force memory writes to complete before letting h/w
4237 * know there are new descriptors to fetch. (Only
4238 * applicable for weak-ordered memory model archs,
4239 * such as IA-64). */
4240 wmb();
1dc32918 4241 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4242 }
1da177e4
LT		 4243}
4244
4245/**
4246 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4247 * @adapter:
4248 **/
4249
64798845 4250static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4251{
1dc32918 4252 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4253 u16 phy_status;
4254 u16 phy_ctrl;
1da177e4 4255
1dc32918
JP		 4256 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4257 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4258 return;
4259
96838a40 4260 if (adapter->smartspeed == 0) {
1da177e4
LT		 4261 /* If Master/Slave config fault is asserted twice,
4262 * we assume back-to-back */
1dc32918 4263 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4264 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4265 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4266 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4267 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4268 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4269 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4270 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4271 phy_ctrl);
4272 adapter->smartspeed++;
1dc32918
JP		 4273 if (!e1000_phy_setup_autoneg(hw) &&
4274 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4275 &phy_ctrl)) {
4276 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4277 MII_CR_RESTART_AUTO_NEG);
1dc32918 4278 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4279 phy_ctrl);
4280 }
4281 }
4282 return;
96838a40 4283 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4284 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4285 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4286 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4287 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4288 if (!e1000_phy_setup_autoneg(hw) &&
4289 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4290 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4291 MII_CR_RESTART_AUTO_NEG);
1dc32918 4292 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4293 }
4294 }
4295 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4296 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4297 adapter->smartspeed = 0;
4298}
4299
4300/**
4301 * e1000_ioctl -
4302 * @netdev:
4303 * @ifreq:
4304 * @cmd:
4305 **/
4306
64798845 4307static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4308{
4309 switch (cmd) {
4310 case SIOCGMIIPHY:
4311 case SIOCGMIIREG:
4312 case SIOCSMIIREG:
4313 return e1000_mii_ioctl(netdev, ifr, cmd);
4314 default:
4315 return -EOPNOTSUPP;
4316 }
4317}
4318
4319/**
4320 * e1000_mii_ioctl -
4321 * @netdev:
4322 * @ifreq:
4323 * @cmd:
4324 **/
4325
64798845
JP		 4326static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4327 int cmd)
1da177e4 4328{
60490fe0 4329 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4330 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4331 struct mii_ioctl_data *data = if_mii(ifr);
4332 int retval;
406874a7
JP		 4333 u16 mii_reg;
4334 u16 spddplx;
97876fc6 4335 unsigned long flags;
1da177e4 4336
1dc32918 4337 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4338 return -EOPNOTSUPP;
4339
4340 switch (cmd) {
4341 case SIOCGMIIPHY:
1dc32918 4342 data->phy_id = hw->phy_addr;
1da177e4
LT		 4343 break;
4344 case SIOCGMIIREG:
96838a40 4345 if (!capable(CAP_NET_ADMIN))
1da177e4 4346 return -EPERM;
97876fc6 4347 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4348 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4349 &data->val_out)) {
4350 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4351 return -EIO;
97876fc6
MC		 4352 }
4353 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4354 break;
4355 case SIOCSMIIREG:
96838a40 4356 if (!capable(CAP_NET_ADMIN))
1da177e4 4357 return -EPERM;
96838a40 4358 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4359 return -EFAULT;
4360 mii_reg = data->val_in;
97876fc6 4361 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4362 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4363 mii_reg)) {
4364 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4365 return -EIO;
97876fc6 4366 }
f0163ac4 4367 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4368 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4369 switch (data->reg_num) {
4370 case PHY_CTRL:
96838a40 4371 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4372 break;
96838a40 4373 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4374 hw->autoneg = 1;
4375 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4376 } else {
4377 if (mii_reg & 0x40)
4378 spddplx = SPEED_1000;
4379 else if (mii_reg & 0x2000)
4380 spddplx = SPEED_100;
4381 else
4382 spddplx = SPEED_10;
4383 spddplx += (mii_reg & 0x100)
cb764326
JK		 4384 ? DUPLEX_FULL :
4385 DUPLEX_HALF;
1da177e4
LT		 4386 retval = e1000_set_spd_dplx(adapter,
4387 spddplx);
f0163ac4 4388 if (retval)
1da177e4
LT		 4389 return retval;
4390 }
2db10a08
AK		 4391 if (netif_running(adapter->netdev))
4392 e1000_reinit_locked(adapter);
4393 else
1da177e4
LT		 4394 e1000_reset(adapter);
4395 break;
4396 case M88E1000_PHY_SPEC_CTRL:
4397 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4398 if (e1000_phy_reset(hw))
1da177e4
LT		 4399 return -EIO;
4400 break;
4401 }
4402 } else {
4403 switch (data->reg_num) {
4404 case PHY_CTRL:
96838a40 4405 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4406 break;
2db10a08
AK		 4407 if (netif_running(adapter->netdev))
4408 e1000_reinit_locked(adapter);
4409 else
1da177e4
LT		 4410 e1000_reset(adapter);
4411 break;
4412 }
4413 }
4414 break;
4415 default:
4416 return -EOPNOTSUPP;
4417 }
4418 return E1000_SUCCESS;
4419}
4420
64798845 4421void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4422{
4423 struct e1000_adapter *adapter = hw->back;
2648345f 4424 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4425
96838a40 4426 if (ret_val)
2648345f 4427 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4428}
4429
64798845 4430void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4431{
4432 struct e1000_adapter *adapter = hw->back;
4433
4434 pci_clear_mwi(adapter->pdev);
4435}
4436
64798845 4437int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4438{
4439 struct e1000_adapter *adapter = hw->back;
4440 return pcix_get_mmrbc(adapter->pdev);
4441}
4442
64798845 4443void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4444{
4445 struct e1000_adapter *adapter = hw->back;
4446 pcix_set_mmrbc(adapter->pdev, mmrbc);
4447}
4448
64798845 4449s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4450{
4451 struct e1000_adapter *adapter = hw->back;
406874a7 4452 u16 cap_offset;
caeccb68
JK		 4453
4454 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4455 if (!cap_offset)
4456 return -E1000_ERR_CONFIG;
4457
4458 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4459
4460 return E1000_SUCCESS;
4461}
4462
64798845 4463void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4464{
4465 outl(value, port);
4466}
4467
64798845
JP		 4468static void e1000_vlan_rx_register(struct net_device *netdev,
4469 struct vlan_group *grp)
1da177e4 4470{
60490fe0 4471 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4472 struct e1000_hw *hw = &adapter->hw;
406874a7 4473 u32 ctrl, rctl;
1da177e4 4474
9150b76a
JB		 4475 if (!test_bit(__E1000_DOWN, &adapter->flags))
4476 e1000_irq_disable(adapter);
1da177e4
LT		 4477 adapter->vlgrp = grp;
4478
96838a40 4479 if (grp) {
1da177e4 4480 /* enable VLAN tag insert/strip */
1dc32918 4481 ctrl = er32(CTRL);
1da177e4 4482 ctrl |= E1000_CTRL_VME;
1dc32918 4483 ew32(CTRL, ctrl);
1da177e4 4484
cd94dd0b 4485 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4486 /* enable VLAN receive filtering */
1dc32918 4487 rctl = er32(RCTL);
90fb5135 4488 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4489 ew32(RCTL, rctl);
90fb5135 4490 e1000_update_mng_vlan(adapter);
cd94dd0b 4491 }
1da177e4
LT		 4492 } else {
4493 /* disable VLAN tag insert/strip */
1dc32918 4494 ctrl = er32(CTRL);
1da177e4 4495 ctrl &= ~E1000_CTRL_VME;
1dc32918 4496 ew32(CTRL, ctrl);
1da177e4 4497
cd94dd0b 4498 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4499 if (adapter->mng_vlan_id !=
406874a7 4500 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4501 e1000_vlan_rx_kill_vid(netdev,
4502 adapter->mng_vlan_id);
4503 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4504 }
cd94dd0b 4505 }
1da177e4
LT		 4506 }
4507
9150b76a
JB		 4508 if (!test_bit(__E1000_DOWN, &adapter->flags))
4509 e1000_irq_enable(adapter);
1da177e4
LT		 4510}
4511
64798845 4512static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4513{
60490fe0 4514 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4515 struct e1000_hw *hw = &adapter->hw;
406874a7 4516 u32 vfta, index;
96838a40 4517
1dc32918 4518 if ((hw->mng_cookie.status &
96838a40
JB		 4519 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4520 (vid == adapter->mng_vlan_id))
2d7edb92 4521 return;
1da177e4
LT		 4522 /* add VID to filter table */
4523 index = (vid >> 5) & 0x7F;
1dc32918 4524 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4525 vfta |= (1 << (vid & 0x1F));
1dc32918 4526 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4527}
4528
64798845 4529static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4530{
60490fe0 4531 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4532 struct e1000_hw *hw = &adapter->hw;
406874a7 4533 u32 vfta, index;
1da177e4 4534
9150b76a
JB		 4535 if (!test_bit(__E1000_DOWN, &adapter->flags))
4536 e1000_irq_disable(adapter);
5c15bdec 4537 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4538 if (!test_bit(__E1000_DOWN, &adapter->flags))
4539 e1000_irq_enable(adapter);
1da177e4 4540
1dc32918 4541 if ((hw->mng_cookie.status &
96838a40 4542 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4543 (vid == adapter->mng_vlan_id)) {
4544 /* release control to f/w */
4545 e1000_release_hw_control(adapter);
2d7edb92 4546 return;
ff147013
JK		 4547 }
4548
1da177e4
LT		 4549 /* remove VID from filter table */
4550 index = (vid >> 5) & 0x7F;
1dc32918 4551 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4552 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4553 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4554}
4555
64798845 4556static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4557{
4558 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4559
96838a40 4560 if (adapter->vlgrp) {
406874a7 4561 u16 vid;
96838a40 4562 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4563 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4564 continue;
4565 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4566 }
4567 }
4568}
4569
64798845 4570int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4571{
1dc32918
JP		 4572 struct e1000_hw *hw = &adapter->hw;
4573
4574 hw->autoneg = 0;
1da177e4 4575
6921368f 4576 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4577 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4578 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4579 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4580 return -EINVAL;
4581 }
4582
96838a40 4583 switch (spddplx) {
1da177e4 4584 case SPEED_10 + DUPLEX_HALF:
1dc32918 4585 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4586 break;
4587 case SPEED_10 + DUPLEX_FULL:
1dc32918 4588 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4589 break;
4590 case SPEED_100 + DUPLEX_HALF:
1dc32918 4591 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4592 break;
4593 case SPEED_100 + DUPLEX_FULL:
1dc32918 4594 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4595 break;
4596 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4597 hw->autoneg = 1;
4598 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4599 break;
4600 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4601 default:
2648345f 4602 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4603 return -EINVAL;
4604 }
4605 return 0;
4606}
4607
64798845 4608static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4609{
4610 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4611 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4612 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4613 u32 ctrl, ctrl_ext, rctl, status;
4614 u32 wufc = adapter->wol;
6fdfef16 4615#ifdef CONFIG_PM
240b1710 4616 int retval = 0;
6fdfef16 4617#endif
1da177e4
LT		 4618
4619 netif_device_detach(netdev);
4620
2db10a08
AK		 4621 if (netif_running(netdev)) {
4622 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4623 e1000_down(adapter);
2db10a08 4624 }
1da177e4 4625
2f82665f 4626#ifdef CONFIG_PM
1d33e9c6 4627 retval = pci_save_state(pdev);
2f82665f
JB		 4628 if (retval)
4629 return retval;
4630#endif
4631
1dc32918 4632 status = er32(STATUS);
96838a40 4633 if (status & E1000_STATUS_LU)
1da177e4
LT		 4634 wufc &= ~E1000_WUFC_LNKC;
4635
96838a40 4636 if (wufc) {
1da177e4 4637 e1000_setup_rctl(adapter);
db0ce50d 4638 e1000_set_rx_mode(netdev);
1da177e4
LT		 4639
4640 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4641 if (wufc & E1000_WUFC_MC) {
1dc32918 4642 rctl = er32(RCTL);
1da177e4 4643 rctl |= E1000_RCTL_MPE;
1dc32918 4644 ew32(RCTL, rctl);
1da177e4
LT		 4645 }
4646
1dc32918
JP		 4647 if (hw->mac_type >= e1000_82540) {
4648 ctrl = er32(CTRL);
1da177e4
LT		 4649 /* advertise wake from D3Cold */
4650 #define E1000_CTRL_ADVD3WUC 0x00100000
4651 /* phy power management enable */
4652 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4653 ctrl |= E1000_CTRL_ADVD3WUC |
4654 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4655 ew32(CTRL, ctrl);
1da177e4
LT		 4656 }
4657
1dc32918
JP		 4658 if (hw->media_type == e1000_media_type_fiber ||
4659 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4660 /* keep the laser running in D3 */
1dc32918 4661 ctrl_ext = er32(CTRL_EXT);
1da177e4 4662 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4663 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4664 }
4665
2d7edb92 4666 /* Allow time for pending master requests to run */
1dc32918 4667 e1000_disable_pciex_master(hw);
2d7edb92 4668
1dc32918
JP		 4669 ew32(WUC, E1000_WUC_PME_EN);
4670 ew32(WUFC, wufc);
d0e027db
AK		 4671 pci_enable_wake(pdev, PCI_D3hot, 1);
4672 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4 4673 } else {
1dc32918
JP		 4674 ew32(WUC, 0);
4675 ew32(WUFC, 0);
d0e027db
AK		 4676 pci_enable_wake(pdev, PCI_D3hot, 0);
4677 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4678 }
4679
0fccd0e9
JG		 4680 e1000_release_manageability(adapter);
4681
4682 /* make sure adapter isn't asleep if manageability is enabled */
4683 if (adapter->en_mng_pt) {
4684 pci_enable_wake(pdev, PCI_D3hot, 1);
4685 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4686 }
4687
1dc32918
JP		 4688 if (hw->phy_type == e1000_phy_igp_3)
4689 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4690
edd106fc
AK		 4691 if (netif_running(netdev))
4692 e1000_free_irq(adapter);
4693
b55ccb35
JK		 4694 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4695 * would have already happened in close and is redundant. */
4696 e1000_release_hw_control(adapter);
2d7edb92 4697
1da177e4 4698 pci_disable_device(pdev);
240b1710 4699
d0e027db 4700 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4701
4702 return 0;
4703}
4704
2f82665f 4705#ifdef CONFIG_PM
64798845 4706static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4707{
4708 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4709 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4710 struct e1000_hw *hw = &adapter->hw;
406874a7 4711 u32 err;
1da177e4 4712
d0e027db 4713 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4714 pci_restore_state(pdev);
81250297
TI		 4715
4716 if (adapter->need_ioport)
4717 err = pci_enable_device(pdev);
4718 else
4719 err = pci_enable_device_mem(pdev);
c7be73bc 4720 if (err) {
3d1dd8cb
AK		 4721 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4722 return err;
4723 }
a4cb847d 4724 pci_set_master(pdev);
1da177e4 4725
d0e027db
AK		 4726 pci_enable_wake(pdev, PCI_D3hot, 0);
4727 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4728
c7be73bc
JP		 4729 if (netif_running(netdev)) {
4730 err = e1000_request_irq(adapter);
4731 if (err)
4732 return err;
4733 }
edd106fc
AK		 4734
4735 e1000_power_up_phy(adapter);
1da177e4 4736 e1000_reset(adapter);
1dc32918 4737 ew32(WUS, ~0);
1da177e4 4738
0fccd0e9
JG		 4739 e1000_init_manageability(adapter);
4740
96838a40 4741 if (netif_running(netdev))
1da177e4
LT		 4742 e1000_up(adapter);
4743
4744 netif_device_attach(netdev);
4745
b55ccb35
JK		 4746 /* If the controller is 82573 and f/w is AMT, do not set
4747 * DRV_LOAD until the interface is up. For all other cases,
4748 * let the f/w know that the h/w is now under the control
4749 * of the driver. */
1dc32918
JP		 4750 if (hw->mac_type != e1000_82573 ||
4751 !e1000_check_mng_mode(hw))
b55ccb35 4752 e1000_get_hw_control(adapter);
2d7edb92 4753
1da177e4
LT		 4754 return 0;
4755}
4756#endif
c653e635
AK		 4757
4758static void e1000_shutdown(struct pci_dev *pdev)
4759{
4760 e1000_suspend(pdev, PMSG_SUSPEND);
4761}
4762
1da177e4
LT		 4763#ifdef CONFIG_NET_POLL_CONTROLLER
4764/*
4765 * Polling 'interrupt' - used by things like netconsole to send skbs
4766 * without having to re-enable interrupts. It's not called while
4767 * the interrupt routine is executing.
4768 */
64798845 4769static void e1000_netpoll(struct net_device *netdev)
1da177e4 4770{
60490fe0 4771 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4772
1da177e4 4773 disable_irq(adapter->pdev->irq);
7d12e780 4774 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4775 enable_irq(adapter->pdev->irq);
4776}
4777#endif
4778
9026729b
AK		 4779/**
4780 * e1000_io_error_detected - called when PCI error is detected
4781 * @pdev: Pointer to PCI device
4782 * @state: The current pci conneection state
4783 *
4784 * This function is called after a PCI bus error affecting
4785 * this device has been detected.
4786 */
64798845
JP		 4787static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4788 pci_channel_state_t state)
9026729b
AK		 4789{
4790 struct net_device *netdev = pci_get_drvdata(pdev);
4791 struct e1000_adapter *adapter = netdev->priv;
4792
4793 netif_device_detach(netdev);
4794
4795 if (netif_running(netdev))
4796 e1000_down(adapter);
72e8d6bb 4797 pci_disable_device(pdev);
9026729b
AK		 4798
4799 /* Request a slot slot reset. */
4800 return PCI_ERS_RESULT_NEED_RESET;
4801}
4802
4803/**
4804 * e1000_io_slot_reset - called after the pci bus has been reset.
4805 * @pdev: Pointer to PCI device
4806 *
4807 * Restart the card from scratch, as if from a cold-boot. Implementation
4808 * resembles the first-half of the e1000_resume routine.
4809 */
4810static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4811{
4812 struct net_device *netdev = pci_get_drvdata(pdev);
4813 struct e1000_adapter *adapter = netdev->priv;
1dc32918 4814 struct e1000_hw *hw = &adapter->hw;
81250297 4815 int err;
9026729b 4816
81250297
TI		 4817 if (adapter->need_ioport)
4818 err = pci_enable_device(pdev);
4819 else
4820 err = pci_enable_device_mem(pdev);
4821 if (err) {
9026729b
AK		 4822 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4823 return PCI_ERS_RESULT_DISCONNECT;
4824 }
4825 pci_set_master(pdev);
4826
dbf38c94
LV		 4827 pci_enable_wake(pdev, PCI_D3hot, 0);
4828 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4829
9026729b 4830 e1000_reset(adapter);
1dc32918 4831 ew32(WUS, ~0);
9026729b
AK		 4832
4833 return PCI_ERS_RESULT_RECOVERED;
4834}
4835
4836/**
4837 * e1000_io_resume - called when traffic can start flowing again.
4838 * @pdev: Pointer to PCI device
4839 *
4840 * This callback is called when the error recovery driver tells us that
4841 * its OK to resume normal operation. Implementation resembles the
4842 * second-half of the e1000_resume routine.
4843 */
4844static void e1000_io_resume(struct pci_dev *pdev)
4845{
4846 struct net_device *netdev = pci_get_drvdata(pdev);
4847 struct e1000_adapter *adapter = netdev->priv;
1dc32918 4848 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4849
4850 e1000_init_manageability(adapter);
9026729b
AK		 4851
4852 if (netif_running(netdev)) {
4853 if (e1000_up(adapter)) {
4854 printk("e1000: can't bring device back up after reset\n");
4855 return;
4856 }
4857 }
4858
4859 netif_device_attach(netdev);
4860
0fccd0e9
JG		 4861 /* If the controller is 82573 and f/w is AMT, do not set
4862 * DRV_LOAD until the interface is up. For all other cases,
4863 * let the f/w know that the h/w is now under the control
4864 * of the driver. */
1dc32918
JP		 4865 if (hw->mac_type != e1000_82573 ||
4866 !e1000_check_mng_mode(hw))
0fccd0e9 4867 e1000_get_hw_control(adapter);
9026729b 4868
9026729b
AK		 4869}
4870
1da177e4 4871/* e1000_main.c */
Clone of davem's net-next-2.6 tree