]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/cnic.c
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
cnic: Fix ring I/O address for bnx2x devices.
[net-next-2.6.git] / drivers / net / cnic.c
CommitLineData
a4636960
MC		 1/* cnic.c: Broadcom CNIC core network driver.
2 *
3 * Copyright (c) 2006-2009 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
13#include <linux/module.h>
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/slab.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21#include <linux/netdevice.h>
22#include <linux/uio_driver.h>
23#include <linux/in.h>
24#include <linux/dma-mapping.h>
25#include <linux/delay.h>
26#include <linux/ethtool.h>
27#include <linux/if_vlan.h>
28#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
29#define BCM_VLAN 1
30#endif
31#include <net/ip.h>
32#include <net/tcp.h>
33#include <net/route.h>
34#include <net/ipv6.h>
35#include <net/ip6_route.h>
c05e85a0 36#include <net/ip6_checksum.h>
a4636960
MC		 37#include <scsi/iscsi_if.h>
38
39#include "cnic_if.h"
40#include "bnx2.h"
e2513065
MC		 41#include "bnx2x_reg.h"
42#include "bnx2x_fw_defs.h"
43#include "bnx2x_hsi.h"
44#include "../scsi/bnx2i/57xx_iscsi_constants.h"
45#include "../scsi/bnx2i/57xx_iscsi_hsi.h"
a4636960
MC		 46#include "cnic.h"
47#include "cnic_defs.h"
48
49#define DRV_MODULE_NAME "cnic"
50#define PFX DRV_MODULE_NAME ": "
51
52static char version[] __devinitdata =
53 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
54
55MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
56 "Chen (zongxi@broadcom.com");
57MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
58MODULE_LICENSE("GPL");
59MODULE_VERSION(CNIC_MODULE_VERSION);
60
61static LIST_HEAD(cnic_dev_list);
62static DEFINE_RWLOCK(cnic_dev_lock);
63static DEFINE_MUTEX(cnic_lock);
64
65static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
66
67static int cnic_service_bnx2(void *, void *);
71034ba8 68static int cnic_service_bnx2x(void *, void *);
a4636960
MC		 69static int cnic_ctl(void *, struct cnic_ctl_info *);
70
71static struct cnic_ops cnic_bnx2_ops = {
72 .cnic_owner = THIS_MODULE,
73 .cnic_handler = cnic_service_bnx2,
74 .cnic_ctl = cnic_ctl,
75};
76
71034ba8
MC		 77static struct cnic_ops cnic_bnx2x_ops = {
78 .cnic_owner = THIS_MODULE,
79 .cnic_handler = cnic_service_bnx2x,
80 .cnic_ctl = cnic_ctl,
81};
82
86b53606
MC		 83static void cnic_shutdown_rings(struct cnic_dev *);
84static void cnic_init_rings(struct cnic_dev *);
a4636960
MC		 85static int cnic_cm_set_pg(struct cnic_sock *);
86
87static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
88{
89 struct cnic_dev *dev = uinfo->priv;
90 struct cnic_local *cp = dev->cnic_priv;
91
92 if (!capable(CAP_NET_ADMIN))
93 return -EPERM;
94
95 if (cp->uio_dev != -1)
96 return -EBUSY;
97
86b53606
MC		 98 rtnl_lock();
99 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
100 rtnl_unlock();
101 return -ENODEV;
102 }
103
a4636960
MC		 104 cp->uio_dev = iminor(inode);
105
86b53606
MC		 106 cnic_init_rings(dev);
107 rtnl_unlock();
a4636960
MC		 108
109 return 0;
110}
111
112static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
113{
114 struct cnic_dev *dev = uinfo->priv;
115 struct cnic_local *cp = dev->cnic_priv;
116
86b53606 117 cnic_shutdown_rings(dev);
6ef57a0e 118
a4636960
MC		 119 cp->uio_dev = -1;
120 return 0;
121}
122
123static inline void cnic_hold(struct cnic_dev *dev)
124{
125 atomic_inc(&dev->ref_count);
126}
127
128static inline void cnic_put(struct cnic_dev *dev)
129{
130 atomic_dec(&dev->ref_count);
131}
132
133static inline void csk_hold(struct cnic_sock *csk)
134{
135 atomic_inc(&csk->ref_count);
136}
137
138static inline void csk_put(struct cnic_sock *csk)
139{
140 atomic_dec(&csk->ref_count);
141}
142
143static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
144{
145 struct cnic_dev *cdev;
146
147 read_lock(&cnic_dev_lock);
148 list_for_each_entry(cdev, &cnic_dev_list, list) {
149 if (netdev == cdev->netdev) {
150 cnic_hold(cdev);
151 read_unlock(&cnic_dev_lock);
152 return cdev;
153 }
154 }
155 read_unlock(&cnic_dev_lock);
156 return NULL;
157}
158
7fc1ece4
MC		 159static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
160{
161 atomic_inc(&ulp_ops->ref_count);
162}
163
164static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
165{
166 atomic_dec(&ulp_ops->ref_count);
167}
168
a4636960
MC		 169static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
170{
171 struct cnic_local *cp = dev->cnic_priv;
172 struct cnic_eth_dev *ethdev = cp->ethdev;
173 struct drv_ctl_info info;
174 struct drv_ctl_io *io = &info.data.io;
175
176 info.cmd = DRV_CTL_CTX_WR_CMD;
177 io->cid_addr = cid_addr;
178 io->offset = off;
179 io->data = val;
180 ethdev->drv_ctl(dev->netdev, &info);
181}
182
71034ba8
MC		 183static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
184{
185 struct cnic_local *cp = dev->cnic_priv;
186 struct cnic_eth_dev *ethdev = cp->ethdev;
187 struct drv_ctl_info info;
188 struct drv_ctl_io *io = &info.data.io;
189
190 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
191 io->offset = off;
192 io->dma_addr = addr;
193 ethdev->drv_ctl(dev->netdev, &info);
194}
195
196static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
197{
198 struct cnic_local *cp = dev->cnic_priv;
199 struct cnic_eth_dev *ethdev = cp->ethdev;
200 struct drv_ctl_info info;
201 struct drv_ctl_l2_ring *ring = &info.data.ring;
202
203 if (start)
204 info.cmd = DRV_CTL_START_L2_CMD;
205 else
206 info.cmd = DRV_CTL_STOP_L2_CMD;
207
208 ring->cid = cid;
209 ring->client_id = cl_id;
210 ethdev->drv_ctl(dev->netdev, &info);
211}
212
a4636960
MC		 213static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
214{
215 struct cnic_local *cp = dev->cnic_priv;
216 struct cnic_eth_dev *ethdev = cp->ethdev;
217 struct drv_ctl_info info;
218 struct drv_ctl_io *io = &info.data.io;
219
220 info.cmd = DRV_CTL_IO_WR_CMD;
221 io->offset = off;
222 io->data = val;
223 ethdev->drv_ctl(dev->netdev, &info);
224}
225
226static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
227{
228 struct cnic_local *cp = dev->cnic_priv;
229 struct cnic_eth_dev *ethdev = cp->ethdev;
230 struct drv_ctl_info info;
231 struct drv_ctl_io *io = &info.data.io;
232
233 info.cmd = DRV_CTL_IO_RD_CMD;
234 io->offset = off;
235 ethdev->drv_ctl(dev->netdev, &info);
236 return io->data;
237}
238
239static int cnic_in_use(struct cnic_sock *csk)
240{
241 return test_bit(SK_F_INUSE, &csk->flags);
242}
243
244static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
245{
246 struct cnic_local *cp = dev->cnic_priv;
247 struct cnic_eth_dev *ethdev = cp->ethdev;
248 struct drv_ctl_info info;
249
250 info.cmd = DRV_CTL_COMPLETION_CMD;
251 info.data.comp.comp_count = count;
252 ethdev->drv_ctl(dev->netdev, &info);
253}
254
71034ba8
MC		 255static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
256{
257 u32 i;
258
259 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
260 if (cp->ctx_tbl[i].cid == cid) {
261 *l5_cid = i;
262 return 0;
263 }
264 }
265 return -EINVAL;
266}
267
a4636960
MC		 268static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
269 struct cnic_sock *csk)
270{
271 struct iscsi_path path_req;
272 char *buf = NULL;
273 u16 len = 0;
274 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
275 struct cnic_ulp_ops *ulp_ops;
276
277 if (cp->uio_dev == -1)
278 return -ENODEV;
279
280 if (csk) {
281 len = sizeof(path_req);
282 buf = (char *) &path_req;
283 memset(&path_req, 0, len);
284
285 msg_type = ISCSI_KEVENT_PATH_REQ;
286 path_req.handle = (u64) csk->l5_cid;
287 if (test_bit(SK_F_IPV6, &csk->flags)) {
288 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
289 sizeof(struct in6_addr));
290 path_req.ip_addr_len = 16;
291 } else {
292 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
293 sizeof(struct in_addr));
294 path_req.ip_addr_len = 4;
295 }
296 path_req.vlan_id = csk->vlan_id;
297 path_req.pmtu = csk->mtu;
298 }
299
300 rcu_read_lock();
6d7760a8 301 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
a4636960
MC		 302 if (ulp_ops)
303 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
304 rcu_read_unlock();
305 return 0;
306}
307
308static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
309 char *buf, u16 len)
310{
311 int rc = -EINVAL;
312
313 switch (msg_type) {
314 case ISCSI_UEVENT_PATH_UPDATE: {
315 struct cnic_local *cp;
316 u32 l5_cid;
317 struct cnic_sock *csk;
318 struct iscsi_path *path_resp;
319
320 if (len < sizeof(*path_resp))
321 break;
322
323 path_resp = (struct iscsi_path *) buf;
324 cp = dev->cnic_priv;
325 l5_cid = (u32) path_resp->handle;
326 if (l5_cid >= MAX_CM_SK_TBL_SZ)
327 break;
328
329 csk = &cp->csk_tbl[l5_cid];
330 csk_hold(csk);
331 if (cnic_in_use(csk)) {
332 memcpy(csk->ha, path_resp->mac_addr, 6);
333 if (test_bit(SK_F_IPV6, &csk->flags))
334 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
335 sizeof(struct in6_addr));
336 else
337 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
338 sizeof(struct in_addr));
339 if (is_valid_ether_addr(csk->ha))
340 cnic_cm_set_pg(csk);
341 }
342 csk_put(csk);
343 rc = 0;
344 }
345 }
346
347 return rc;
348}
349
350static int cnic_offld_prep(struct cnic_sock *csk)
351{
352 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
353 return 0;
354
355 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
356 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
357 return 0;
358 }
359
360 return 1;
361}
362
363static int cnic_close_prep(struct cnic_sock *csk)
364{
365 clear_bit(SK_F_CONNECT_START, &csk->flags);
366 smp_mb__after_clear_bit();
367
368 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
369 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
370 msleep(1);
371
372 return 1;
373 }
374 return 0;
375}
376
377static int cnic_abort_prep(struct cnic_sock *csk)
378{
379 clear_bit(SK_F_CONNECT_START, &csk->flags);
380 smp_mb__after_clear_bit();
381
382 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
383 msleep(1);
384
385 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
386 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
387 return 1;
388 }
389
390 return 0;
391}
392
6d7760a8
MC		 393static void cnic_uio_stop(void)
394{
395 struct cnic_dev *dev;
396
397 read_lock(&cnic_dev_lock);
398 list_for_each_entry(dev, &cnic_dev_list, list) {
399 struct cnic_local *cp = dev->cnic_priv;
400
401 if (cp->cnic_uinfo)
402 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
403 }
404 read_unlock(&cnic_dev_lock);
405}
406
a4636960
MC		 407int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
408{
409 struct cnic_dev *dev;
410
0d37f36f 411 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 412 printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
413 ulp_type);
414 return -EINVAL;
415 }
416 mutex_lock(&cnic_lock);
417 if (cnic_ulp_tbl[ulp_type]) {
418 printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
419 "been registered\n", ulp_type);
420 mutex_unlock(&cnic_lock);
421 return -EBUSY;
422 }
423
424 read_lock(&cnic_dev_lock);
425 list_for_each_entry(dev, &cnic_dev_list, list) {
426 struct cnic_local *cp = dev->cnic_priv;
427
428 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
429 }
430 read_unlock(&cnic_dev_lock);
431
7fc1ece4 432 atomic_set(&ulp_ops->ref_count, 0);
a4636960
MC		 433 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
434 mutex_unlock(&cnic_lock);
435
436 /* Prevent race conditions with netdev_event */
437 rtnl_lock();
438 read_lock(&cnic_dev_lock);
439 list_for_each_entry(dev, &cnic_dev_list, list) {
440 struct cnic_local *cp = dev->cnic_priv;
441
442 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
443 ulp_ops->cnic_init(dev);
444 }
445 read_unlock(&cnic_dev_lock);
446 rtnl_unlock();
447
448 return 0;
449}
450
451int cnic_unregister_driver(int ulp_type)
452{
453 struct cnic_dev *dev;
7fc1ece4
MC		 454 struct cnic_ulp_ops *ulp_ops;
455 int i = 0;
a4636960 456
0d37f36f 457 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 458 printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
459 ulp_type);
460 return -EINVAL;
461 }
462 mutex_lock(&cnic_lock);
7fc1ece4
MC		 463 ulp_ops = cnic_ulp_tbl[ulp_type];
464 if (!ulp_ops) {
a4636960
MC		 465 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
466 "been registered\n", ulp_type);
467 goto out_unlock;
468 }
469 read_lock(&cnic_dev_lock);
470 list_for_each_entry(dev, &cnic_dev_list, list) {
471 struct cnic_local *cp = dev->cnic_priv;
472
473 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
474 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
475 "still has devices registered\n", ulp_type);
476 read_unlock(&cnic_dev_lock);
477 goto out_unlock;
478 }
479 }
480 read_unlock(&cnic_dev_lock);
481
6d7760a8
MC		 482 if (ulp_type == CNIC_ULP_ISCSI)
483 cnic_uio_stop();
484
a4636960
MC		 485 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
486
487 mutex_unlock(&cnic_lock);
488 synchronize_rcu();
7fc1ece4
MC		 489 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
490 msleep(100);
491 i++;
492 }
493
494 if (atomic_read(&ulp_ops->ref_count) != 0)
495 printk(KERN_WARNING PFX "%s: Failed waiting for ref count to go"
496 " to zero.\n", dev->netdev->name);
a4636960
MC		 497 return 0;
498
499out_unlock:
500 mutex_unlock(&cnic_lock);
501 return -EINVAL;
502}
503
504static int cnic_start_hw(struct cnic_dev *);
505static void cnic_stop_hw(struct cnic_dev *);
506
507static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
508 void *ulp_ctx)
509{
510 struct cnic_local *cp = dev->cnic_priv;
511 struct cnic_ulp_ops *ulp_ops;
512
0d37f36f 513 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 514 printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
515 ulp_type);
516 return -EINVAL;
517 }
518 mutex_lock(&cnic_lock);
519 if (cnic_ulp_tbl[ulp_type] == NULL) {
520 printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
521 "has not been registered\n", ulp_type);
522 mutex_unlock(&cnic_lock);
523 return -EAGAIN;
524 }
525 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
526 printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
527 "been registered to this device\n", ulp_type);
528 mutex_unlock(&cnic_lock);
529 return -EBUSY;
530 }
531
532 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
533 cp->ulp_handle[ulp_type] = ulp_ctx;
534 ulp_ops = cnic_ulp_tbl[ulp_type];
535 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
536 cnic_hold(dev);
537
538 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
539 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
540 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
541
542 mutex_unlock(&cnic_lock);
543
544 return 0;
545
546}
547EXPORT_SYMBOL(cnic_register_driver);
548
549static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
550{
551 struct cnic_local *cp = dev->cnic_priv;
681dbd71 552 int i = 0;
a4636960 553
0d37f36f 554 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 555 printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
556 ulp_type);
557 return -EINVAL;
558 }
559 mutex_lock(&cnic_lock);
560 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
561 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
562 cnic_put(dev);
563 } else {
564 printk(KERN_ERR PFX "cnic_unregister_device: device not "
565 "registered to this ulp type %d\n", ulp_type);
566 mutex_unlock(&cnic_lock);
567 return -EINVAL;
568 }
569 mutex_unlock(&cnic_lock);
570
571 synchronize_rcu();
572
681dbd71
MC		 573 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
574 i < 20) {
575 msleep(100);
576 i++;
577 }
578 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
579 printk(KERN_WARNING PFX "%s: Failed waiting for ULP up call"
580 " to complete.\n", dev->netdev->name);
581
a4636960
MC		 582 return 0;
583}
584EXPORT_SYMBOL(cnic_unregister_driver);
585
586static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
587{
588 id_tbl->start = start_id;
589 id_tbl->max = size;
590 id_tbl->next = 0;
591 spin_lock_init(&id_tbl->lock);
592 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
593 if (!id_tbl->table)
594 return -ENOMEM;
595
596 return 0;
597}
598
599static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
600{
601 kfree(id_tbl->table);
602 id_tbl->table = NULL;
603}
604
605static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
606{
607 int ret = -1;
608
609 id -= id_tbl->start;
610 if (id >= id_tbl->max)
611 return ret;
612
613 spin_lock(&id_tbl->lock);
614 if (!test_bit(id, id_tbl->table)) {
615 set_bit(id, id_tbl->table);
616 ret = 0;
617 }
618 spin_unlock(&id_tbl->lock);
619 return ret;
620}
621
622/* Returns -1 if not successful */
623static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
624{
625 u32 id;
626
627 spin_lock(&id_tbl->lock);
628 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
629 if (id >= id_tbl->max) {
630 id = -1;
631 if (id_tbl->next != 0) {
632 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
633 if (id >= id_tbl->next)
634 id = -1;
635 }
636 }
637
638 if (id < id_tbl->max) {
639 set_bit(id, id_tbl->table);
640 id_tbl->next = (id + 1) & (id_tbl->max - 1);
641 id += id_tbl->start;
642 }
643
644 spin_unlock(&id_tbl->lock);
645
646 return id;
647}
648
649static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
650{
651 if (id == -1)
652 return;
653
654 id -= id_tbl->start;
655 if (id >= id_tbl->max)
656 return;
657
658 clear_bit(id, id_tbl->table);
659}
660
661static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
662{
663 int i;
664
665 if (!dma->pg_arr)
666 return;
667
668 for (i = 0; i < dma->num_pages; i++) {
669 if (dma->pg_arr[i]) {
670 pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
671 dma->pg_arr[i], dma->pg_map_arr[i]);
672 dma->pg_arr[i] = NULL;
673 }
674 }
675 if (dma->pgtbl) {
676 pci_free_consistent(dev->pcidev, dma->pgtbl_size,
677 dma->pgtbl, dma->pgtbl_map);
678 dma->pgtbl = NULL;
679 }
680 kfree(dma->pg_arr);
681 dma->pg_arr = NULL;
682 dma->num_pages = 0;
683}
684
685static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
686{
687 int i;
688 u32 *page_table = dma->pgtbl;
689
690 for (i = 0; i < dma->num_pages; i++) {
691 /* Each entry needs to be in big endian format. */
692 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
693 page_table++;
694 *page_table = (u32) dma->pg_map_arr[i];
695 page_table++;
696 }
697}
698
71034ba8
MC		 699static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
700{
701 int i;
702 u32 *page_table = dma->pgtbl;
703
704 for (i = 0; i < dma->num_pages; i++) {
705 /* Each entry needs to be in little endian format. */
706 *page_table = dma->pg_map_arr[i] & 0xffffffff;
707 page_table++;
708 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
709 page_table++;
710 }
711}
712
a4636960
MC		 713static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
714 int pages, int use_pg_tbl)
715{
716 int i, size;
717 struct cnic_local *cp = dev->cnic_priv;
718
719 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
720 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
721 if (dma->pg_arr == NULL)
722 return -ENOMEM;
723
724 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
725 dma->num_pages = pages;
726
727 for (i = 0; i < pages; i++) {
728 dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
729 BCM_PAGE_SIZE,
730 &dma->pg_map_arr[i]);
731 if (dma->pg_arr[i] == NULL)
732 goto error;
733 }
734 if (!use_pg_tbl)
735 return 0;
736
737 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
738 ~(BCM_PAGE_SIZE - 1);
739 dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
740 &dma->pgtbl_map);
741 if (dma->pgtbl == NULL)
742 goto error;
743
744 cp->setup_pgtbl(dev, dma);
745
746 return 0;
747
748error:
749 cnic_free_dma(dev, dma);
750 return -ENOMEM;
751}
752
86b53606
MC		 753static void cnic_free_context(struct cnic_dev *dev)
754{
755 struct cnic_local *cp = dev->cnic_priv;
756 int i;
757
758 for (i = 0; i < cp->ctx_blks; i++) {
759 if (cp->ctx_arr[i].ctx) {
760 pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
761 cp->ctx_arr[i].ctx,
762 cp->ctx_arr[i].mapping);
763 cp->ctx_arr[i].ctx = NULL;
764 }
765 }
766}
767
a4636960
MC		 768static void cnic_free_resc(struct cnic_dev *dev)
769{
770 struct cnic_local *cp = dev->cnic_priv;
771 int i = 0;
772
773 if (cp->cnic_uinfo) {
a4636960
MC		 774 while (cp->uio_dev != -1 && i < 15) {
775 msleep(100);
776 i++;
777 }
778 uio_unregister_device(cp->cnic_uinfo);
779 kfree(cp->cnic_uinfo);
780 cp->cnic_uinfo = NULL;
781 }
782
783 if (cp->l2_buf) {
784 pci_free_consistent(dev->pcidev, cp->l2_buf_size,
785 cp->l2_buf, cp->l2_buf_map);
786 cp->l2_buf = NULL;
787 }
788
789 if (cp->l2_ring) {
790 pci_free_consistent(dev->pcidev, cp->l2_ring_size,
791 cp->l2_ring, cp->l2_ring_map);
792 cp->l2_ring = NULL;
793 }
794
86b53606 795 cnic_free_context(dev);
a4636960
MC		 796 kfree(cp->ctx_arr);
797 cp->ctx_arr = NULL;
798 cp->ctx_blks = 0;
799
800 cnic_free_dma(dev, &cp->gbl_buf_info);
801 cnic_free_dma(dev, &cp->conn_buf_info);
802 cnic_free_dma(dev, &cp->kwq_info);
71034ba8 803 cnic_free_dma(dev, &cp->kwq_16_data_info);
a4636960
MC		 804 cnic_free_dma(dev, &cp->kcq_info);
805 kfree(cp->iscsi_tbl);
806 cp->iscsi_tbl = NULL;
807 kfree(cp->ctx_tbl);
808 cp->ctx_tbl = NULL;
809
810 cnic_free_id_tbl(&cp->cid_tbl);
811}
812
813static int cnic_alloc_context(struct cnic_dev *dev)
814{
815 struct cnic_local *cp = dev->cnic_priv;
816
817 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
818 int i, k, arr_size;
819
820 cp->ctx_blk_size = BCM_PAGE_SIZE;
821 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
822 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
823 sizeof(struct cnic_ctx);
824 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
825 if (cp->ctx_arr == NULL)
826 return -ENOMEM;
827
828 k = 0;
829 for (i = 0; i < 2; i++) {
830 u32 j, reg, off, lo, hi;
831
832 if (i == 0)
833 off = BNX2_PG_CTX_MAP;
834 else
835 off = BNX2_ISCSI_CTX_MAP;
836
837 reg = cnic_reg_rd_ind(dev, off);
838 lo = reg >> 16;
839 hi = reg & 0xffff;
840 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
841 cp->ctx_arr[k].cid = j;
842 }
843
844 cp->ctx_blks = k;
845 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
846 cp->ctx_blks = 0;
847 return -ENOMEM;
848 }
849
850 for (i = 0; i < cp->ctx_blks; i++) {
851 cp->ctx_arr[i].ctx =
852 pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
853 &cp->ctx_arr[i].mapping);
854 if (cp->ctx_arr[i].ctx == NULL)
855 return -ENOMEM;
856 }
857 }
858 return 0;
859}
860
ec0248ea
MC		 861static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
862{
863 struct cnic_local *cp = dev->cnic_priv;
864
865 cp->l2_ring_size = pages * BCM_PAGE_SIZE;
866 cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
867 &cp->l2_ring_map);
868 if (!cp->l2_ring)
869 return -ENOMEM;
870
871 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
872 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
873 cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
874 &cp->l2_buf_map);
875 if (!cp->l2_buf)
876 return -ENOMEM;
877
878 return 0;
879}
880
5e9b2dbf 881static int cnic_alloc_uio(struct cnic_dev *dev) {
a4636960
MC		 882 struct cnic_local *cp = dev->cnic_priv;
883 struct uio_info *uinfo;
884 int ret;
885
a4636960
MC		 886 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
887 if (!uinfo)
5e9b2dbf 888 return -ENOMEM;
a4636960
MC		 889
890 uinfo->mem[0].addr = dev->netdev->base_addr;
891 uinfo->mem[0].internal_addr = dev->regview;
892 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
893 uinfo->mem[0].memtype = UIO_MEM_PHYS;
894
5e9b2dbf 895 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
86b53606 896 uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
5e9b2dbf
MC		 897 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
898 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
899 else
900 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
901
902 uinfo->name = "bnx2_cnic";
71034ba8
MC		 903 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
904 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
905 PAGE_MASK;
906 uinfo->mem[1].size = sizeof(struct host_def_status_block);
907
908 uinfo->name = "bnx2x_cnic";
5e9b2dbf
MC		 909 }
910
a4636960
MC		 911 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
912
913 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
914 uinfo->mem[2].size = cp->l2_ring_size;
915 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
916
917 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
918 uinfo->mem[3].size = cp->l2_buf_size;
919 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
920
a4636960
MC		 921 uinfo->version = CNIC_MODULE_VERSION;
922 uinfo->irq = UIO_IRQ_CUSTOM;
923
924 uinfo->open = cnic_uio_open;
925 uinfo->release = cnic_uio_close;
926
927 uinfo->priv = dev;
928
929 ret = uio_register_device(&dev->pcidev->dev, uinfo);
930 if (ret) {
931 kfree(uinfo);
5e9b2dbf 932 return ret;
a4636960
MC		 933 }
934
935 cp->cnic_uinfo = uinfo;
5e9b2dbf
MC		 936 return 0;
937}
938
939static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
940{
941 struct cnic_local *cp = dev->cnic_priv;
942 int ret;
943
944 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
945 if (ret)
946 goto error;
947 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
948
949 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
950 if (ret)
951 goto error;
952 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
953
954 ret = cnic_alloc_context(dev);
955 if (ret)
956 goto error;
957
958 ret = cnic_alloc_l2_rings(dev, 2);
959 if (ret)
960 goto error;
961
962 ret = cnic_alloc_uio(dev);
963 if (ret)
964 goto error;
a4636960
MC		 965
966 return 0;
967
968error:
969 cnic_free_resc(dev);
970 return ret;
971}
972
71034ba8
MC		 973static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
974{
975 struct cnic_local *cp = dev->cnic_priv;
976 struct cnic_eth_dev *ethdev = cp->ethdev;
977 int ctx_blk_size = cp->ethdev->ctx_blk_size;
978 int total_mem, blks, i, cid_space;
979
980 if (BNX2X_ISCSI_START_CID < ethdev->starting_cid)
981 return -EINVAL;
982
983 cid_space = MAX_ISCSI_TBL_SZ +
984 (BNX2X_ISCSI_START_CID - ethdev->starting_cid);
985
986 total_mem = BNX2X_CONTEXT_MEM_SIZE * cid_space;
987 blks = total_mem / ctx_blk_size;
988 if (total_mem % ctx_blk_size)
989 blks++;
990
991 if (blks > cp->ethdev->ctx_tbl_len)
992 return -ENOMEM;
993
994 cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL);
995 if (cp->ctx_arr == NULL)
996 return -ENOMEM;
997
998 cp->ctx_blks = blks;
999 cp->ctx_blk_size = ctx_blk_size;
1000 if (BNX2X_CHIP_IS_E1H(cp->chip_id))
1001 cp->ctx_align = 0;
1002 else
1003 cp->ctx_align = ctx_blk_size;
1004
1005 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1006
1007 for (i = 0; i < blks; i++) {
1008 cp->ctx_arr[i].ctx =
1009 pci_alloc_consistent(dev->pcidev, cp->ctx_blk_size,
1010 &cp->ctx_arr[i].mapping);
1011 if (cp->ctx_arr[i].ctx == NULL)
1012 return -ENOMEM;
1013
1014 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1015 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1016 cnic_free_context(dev);
1017 cp->ctx_blk_size += cp->ctx_align;
1018 i = -1;
1019 continue;
1020 }
1021 }
1022 }
1023 return 0;
1024}
1025
1026static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1027{
1028 struct cnic_local *cp = dev->cnic_priv;
1029 int i, j, n, ret, pages;
1030 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1031
1032 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1033 GFP_KERNEL);
1034 if (!cp->iscsi_tbl)
1035 goto error;
1036
1037 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1038 MAX_CNIC_L5_CONTEXT, GFP_KERNEL);
1039 if (!cp->ctx_tbl)
1040 goto error;
1041
1042 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1043 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1044 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1045 }
1046
1047 pages = PAGE_ALIGN(MAX_CNIC_L5_CONTEXT * CNIC_KWQ16_DATA_SIZE) /
1048 PAGE_SIZE;
1049
1050 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1051 if (ret)
1052 return -ENOMEM;
1053
1054 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1055 for (i = 0, j = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1056 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1057
1058 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1059 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1060 off;
1061
1062 if ((i % n) == (n - 1))
1063 j++;
1064 }
1065
1066 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 0);
1067 if (ret)
1068 goto error;
1069 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
1070
1071 for (i = 0; i < KCQ_PAGE_CNT; i++) {
1072 struct bnx2x_bd_chain_next *next =
1073 (struct bnx2x_bd_chain_next *)
1074 &cp->kcq[i][MAX_KCQE_CNT];
1075 int j = i + 1;
1076
1077 if (j >= KCQ_PAGE_CNT)
1078 j = 0;
1079 next->addr_hi = (u64) cp->kcq_info.pg_map_arr[j] >> 32;
1080 next->addr_lo = cp->kcq_info.pg_map_arr[j] & 0xffffffff;
1081 }
1082
1083 pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1084 BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1085 ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1086 if (ret)
1087 goto error;
1088
1089 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1090 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1091 if (ret)
1092 goto error;
1093
1094 ret = cnic_alloc_bnx2x_context(dev);
1095 if (ret)
1096 goto error;
1097
1098 cp->bnx2x_status_blk = cp->status_blk;
1099 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1100
1101 cp->l2_rx_ring_size = 15;
1102
1103 ret = cnic_alloc_l2_rings(dev, 4);
1104 if (ret)
1105 goto error;
1106
1107 ret = cnic_alloc_uio(dev);
1108 if (ret)
1109 goto error;
1110
1111 return 0;
1112
1113error:
1114 cnic_free_resc(dev);
1115 return -ENOMEM;
1116}
1117
a4636960
MC		 1118static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1119{
1120 return cp->max_kwq_idx -
1121 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1122}
1123
1124static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1125 u32 num_wqes)
1126{
1127 struct cnic_local *cp = dev->cnic_priv;
1128 struct kwqe *prod_qe;
1129 u16 prod, sw_prod, i;
1130
1131 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1132 return -EAGAIN; /* bnx2 is down */
1133
1134 spin_lock_bh(&cp->cnic_ulp_lock);
1135 if (num_wqes > cnic_kwq_avail(cp) &&
1136 !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
1137 spin_unlock_bh(&cp->cnic_ulp_lock);
1138 return -EAGAIN;
1139 }
1140
1141 cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
1142
1143 prod = cp->kwq_prod_idx;
1144 sw_prod = prod & MAX_KWQ_IDX;
1145 for (i = 0; i < num_wqes; i++) {
1146 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1147 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1148 prod++;
1149 sw_prod = prod & MAX_KWQ_IDX;
1150 }
1151 cp->kwq_prod_idx = prod;
1152
1153 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1154
1155 spin_unlock_bh(&cp->cnic_ulp_lock);
1156 return 0;
1157}
1158
71034ba8
MC		 1159static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1160 union l5cm_specific_data *l5_data)
1161{
1162 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1163 dma_addr_t map;
1164
1165 map = ctx->kwqe_data_mapping;
1166 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1167 l5_data->phy_address.hi = (u64) map >> 32;
1168 return ctx->kwqe_data;
1169}
1170
1171static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1172 u32 type, union l5cm_specific_data *l5_data)
1173{
1174 struct cnic_local *cp = dev->cnic_priv;
1175 struct l5cm_spe kwqe;
1176 struct kwqe_16 *kwq[1];
1177 int ret;
1178
1179 kwqe.hdr.conn_and_cmd_data =
1180 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1181 BNX2X_HW_CID(cid, cp->func)));
1182 kwqe.hdr.type = cpu_to_le16(type);
1183 kwqe.hdr.reserved = 0;
1184 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1185 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1186
1187 kwq[0] = (struct kwqe_16 *) &kwqe;
1188
1189 spin_lock_bh(&cp->cnic_ulp_lock);
1190 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1191 spin_unlock_bh(&cp->cnic_ulp_lock);
1192
1193 if (ret == 1)
1194 return 0;
1195
1196 return -EBUSY;
1197}
1198
1199static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1200 struct kcqe *cqes[], u32 num_cqes)
1201{
1202 struct cnic_local *cp = dev->cnic_priv;
1203 struct cnic_ulp_ops *ulp_ops;
1204
1205 rcu_read_lock();
1206 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1207 if (likely(ulp_ops)) {
1208 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1209 cqes, num_cqes);
1210 }
1211 rcu_read_unlock();
1212}
1213
1214static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1215{
1216 struct cnic_local *cp = dev->cnic_priv;
1217 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1218 int func = cp->func, pages;
1219 int hq_bds;
1220
1221 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1222 cp->num_ccells = req1->num_ccells_per_conn;
1223 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1224 cp->num_iscsi_tasks;
1225 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1226 BNX2X_ISCSI_R2TQE_SIZE;
1227 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1228 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1229 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1230 cp->num_cqs = req1->num_cqs;
1231
1232 if (!dev->max_iscsi_conn)
1233 return 0;
1234
1235 /* init Tstorm RAM */
1236 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(func),
1237 req1->rq_num_wqes);
1238 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1239 PAGE_SIZE);
1240 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1241 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1242 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1243 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1244 req1->num_tasks_per_conn);
1245
1246 /* init Ustorm RAM */
1247 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1248 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func),
1249 req1->rq_buffer_size);
1250 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1251 PAGE_SIZE);
1252 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1253 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1254 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1255 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1256 req1->num_tasks_per_conn);
1257 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(func),
1258 req1->rq_num_wqes);
1259 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(func),
1260 req1->cq_num_wqes);
1261 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1262 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1263
1264 /* init Xstorm RAM */
1265 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1266 PAGE_SIZE);
1267 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1268 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1269 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1270 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1271 req1->num_tasks_per_conn);
1272 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1273 hq_bds);
1274 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(func),
1275 req1->num_tasks_per_conn);
1276 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1277 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1278
1279 /* init Cstorm RAM */
1280 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1281 PAGE_SIZE);
1282 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1283 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1284 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1285 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1286 req1->num_tasks_per_conn);
1287 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(func),
1288 req1->cq_num_wqes);
1289 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1290 hq_bds);
1291
1292 return 0;
1293}
1294
1295static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1296{
1297 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1298 struct cnic_local *cp = dev->cnic_priv;
1299 int func = cp->func;
1300 struct iscsi_kcqe kcqe;
1301 struct kcqe *cqes[1];
1302
1303 memset(&kcqe, 0, sizeof(kcqe));
1304 if (!dev->max_iscsi_conn) {
1305 kcqe.completion_status =
1306 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1307 goto done;
1308 }
1309
1310 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1311 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1312 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1313 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1314 req2->error_bit_map[1]);
1315
1316 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1317 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1318 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1319 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1320 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1321 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1322 req2->error_bit_map[1]);
1323
1324 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1325 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1326
1327 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1328
1329done:
1330 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1331 cqes[0] = (struct kcqe *) &kcqe;
1332 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1333
1334 return 0;
1335}
1336
1337static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1338{
1339 struct cnic_local *cp = dev->cnic_priv;
1340 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1341
1342 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1343 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1344
1345 cnic_free_dma(dev, &iscsi->hq_info);
1346 cnic_free_dma(dev, &iscsi->r2tq_info);
1347 cnic_free_dma(dev, &iscsi->task_array_info);
1348 }
1349 cnic_free_id(&cp->cid_tbl, ctx->cid);
1350 ctx->cid = 0;
1351}
1352
1353static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1354{
1355 u32 cid;
1356 int ret, pages;
1357 struct cnic_local *cp = dev->cnic_priv;
1358 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1359 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1360
1361 cid = cnic_alloc_new_id(&cp->cid_tbl);
1362 if (cid == -1) {
1363 ret = -ENOMEM;
1364 goto error;
1365 }
1366
1367 ctx->cid = cid;
1368 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1369
1370 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1371 if (ret)
1372 goto error;
1373
1374 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1375 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1376 if (ret)
1377 goto error;
1378
1379 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1380 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1381 if (ret)
1382 goto error;
1383
1384 return 0;
1385
1386error:
1387 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1388 return ret;
1389}
1390
1391static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1392 struct regpair *ctx_addr)
1393{
1394 struct cnic_local *cp = dev->cnic_priv;
1395 struct cnic_eth_dev *ethdev = cp->ethdev;
1396 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1397 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1398 unsigned long align_off = 0;
1399 dma_addr_t ctx_map;
1400 void *ctx;
1401
1402 if (cp->ctx_align) {
1403 unsigned long mask = cp->ctx_align - 1;
1404
1405 if (cp->ctx_arr[blk].mapping & mask)
1406 align_off = cp->ctx_align -
1407 (cp->ctx_arr[blk].mapping & mask);
1408 }
1409 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1410 (off * BNX2X_CONTEXT_MEM_SIZE);
1411 ctx = cp->ctx_arr[blk].ctx + align_off +
1412 (off * BNX2X_CONTEXT_MEM_SIZE);
1413 if (init)
1414 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1415
1416 ctx_addr->lo = ctx_map & 0xffffffff;
1417 ctx_addr->hi = (u64) ctx_map >> 32;
1418 return ctx;
1419}
1420
1421static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1422 u32 num)
1423{
1424 struct cnic_local *cp = dev->cnic_priv;
1425 struct iscsi_kwqe_conn_offload1 *req1 =
1426 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1427 struct iscsi_kwqe_conn_offload2 *req2 =
1428 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1429 struct iscsi_kwqe_conn_offload3 *req3;
1430 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1431 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1432 u32 cid = ctx->cid;
1433 u32 hw_cid = BNX2X_HW_CID(cid, cp->func);
1434 struct iscsi_context *ictx;
1435 struct regpair context_addr;
1436 int i, j, n = 2, n_max;
1437
1438 ctx->ctx_flags = 0;
1439 if (!req2->num_additional_wqes)
1440 return -EINVAL;
1441
1442 n_max = req2->num_additional_wqes + 2;
1443
1444 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1445 if (ictx == NULL)
1446 return -ENOMEM;
1447
1448 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1449
1450 ictx->xstorm_ag_context.hq_prod = 1;
1451
1452 ictx->xstorm_st_context.iscsi.first_burst_length =
1453 ISCSI_DEF_FIRST_BURST_LEN;
1454 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1455 ISCSI_DEF_MAX_RECV_SEG_LEN;
1456 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1457 req1->sq_page_table_addr_lo;
1458 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1459 req1->sq_page_table_addr_hi;
1460 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1461 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1462 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1463 iscsi->hq_info.pgtbl_map & 0xffffffff;
1464 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1465 (u64) iscsi->hq_info.pgtbl_map >> 32;
1466 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1467 iscsi->hq_info.pgtbl[0];
1468 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1469 iscsi->hq_info.pgtbl[1];
1470 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1471 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1472 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1473 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1474 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1475 iscsi->r2tq_info.pgtbl[0];
1476 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1477 iscsi->r2tq_info.pgtbl[1];
1478 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1479 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1480 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1481 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1482 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1483 BNX2X_ISCSI_PBL_NOT_CACHED;
1484 ictx->xstorm_st_context.iscsi.flags.flags |=
1485 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1486 ictx->xstorm_st_context.iscsi.flags.flags |=
1487 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1488
1489 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1490 /* TSTORM requires the base address of RQ DB & not PTE */
1491 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1492 req2->rq_page_table_addr_lo & PAGE_MASK;
1493 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1494 req2->rq_page_table_addr_hi;
1495 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1496 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1497 ictx->tstorm_st_context.tcp.flags2 |=
1498 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1499
1500 ictx->timers_context.flags |= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1501
1502 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1503 req2->rq_page_table_addr_lo & 0xffffffff;
1504 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1505 (u64) req2->rq_page_table_addr_hi >> 32;
1506 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1507 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1508 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1509 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1510 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1511 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1512 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1513 iscsi->r2tq_info.pgtbl[0];
1514 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1515 iscsi->r2tq_info.pgtbl[1];
1516 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1517 req1->cq_page_table_addr_lo;
1518 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1519 req1->cq_page_table_addr_hi;
1520 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1521 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1522 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1523 ictx->ustorm_st_context.task_pbe_cache_index =
1524 BNX2X_ISCSI_PBL_NOT_CACHED;
1525 ictx->ustorm_st_context.task_pdu_cache_index =
1526 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1527
1528 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1529 if (j == 3) {
1530 if (n >= n_max)
1531 break;
1532 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1533 j = 0;
1534 }
1535 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1536 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1537 req3->qp_first_pte[j].hi;
1538 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1539 req3->qp_first_pte[j].lo;
1540 }
1541
1542 ictx->ustorm_st_context.task_pbl_base.lo =
1543 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1544 ictx->ustorm_st_context.task_pbl_base.hi =
1545 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1546 ictx->ustorm_st_context.tce_phy_addr.lo =
1547 iscsi->task_array_info.pgtbl[0];
1548 ictx->ustorm_st_context.tce_phy_addr.hi =
1549 iscsi->task_array_info.pgtbl[1];
1550 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1551 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1552 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1553 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1554 ISCSI_DEF_MAX_BURST_LEN;
1555 ictx->ustorm_st_context.negotiated_rx |=
1556 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1557 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1558
1559 ictx->cstorm_st_context.hq_pbl_base.lo =
1560 iscsi->hq_info.pgtbl_map & 0xffffffff;
1561 ictx->cstorm_st_context.hq_pbl_base.hi =
1562 (u64) iscsi->hq_info.pgtbl_map >> 32;
1563 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1564 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1565 ictx->cstorm_st_context.task_pbl_base.lo =
1566 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1567 ictx->cstorm_st_context.task_pbl_base.hi =
1568 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1569 /* CSTORM and USTORM initialization is different, CSTORM requires
1570 * CQ DB base & not PTE addr */
1571 ictx->cstorm_st_context.cq_db_base.lo =
1572 req1->cq_page_table_addr_lo & PAGE_MASK;
1573 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1574 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1575 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1576 for (i = 0; i < cp->num_cqs; i++) {
1577 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1578 ISCSI_INITIAL_SN;
1579 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1580 ISCSI_INITIAL_SN;
1581 }
1582
1583 ictx->xstorm_ag_context.cdu_reserved =
1584 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1585 ISCSI_CONNECTION_TYPE);
1586 ictx->ustorm_ag_context.cdu_usage =
1587 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1588 ISCSI_CONNECTION_TYPE);
1589 return 0;
1590
1591}
1592
1593static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1594 u32 num, int *work)
1595{
1596 struct iscsi_kwqe_conn_offload1 *req1;
1597 struct iscsi_kwqe_conn_offload2 *req2;
1598 struct cnic_local *cp = dev->cnic_priv;
1599 struct iscsi_kcqe kcqe;
1600 struct kcqe *cqes[1];
1601 u32 l5_cid;
1602 int ret;
1603
1604 if (num < 2) {
1605 *work = num;
1606 return -EINVAL;
1607 }
1608
1609 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1610 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1611 if ((num - 2) < req2->num_additional_wqes) {
1612 *work = num;
1613 return -EINVAL;
1614 }
1615 *work = 2 + req2->num_additional_wqes;;
1616
1617 l5_cid = req1->iscsi_conn_id;
1618 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1619 return -EINVAL;
1620
1621 memset(&kcqe, 0, sizeof(kcqe));
1622 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1623 kcqe.iscsi_conn_id = l5_cid;
1624 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1625
1626 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1627 atomic_dec(&cp->iscsi_conn);
1628 ret = 0;
1629 goto done;
1630 }
1631 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1632 if (ret) {
1633 atomic_dec(&cp->iscsi_conn);
1634 ret = 0;
1635 goto done;
1636 }
1637 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1638 if (ret < 0) {
1639 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1640 atomic_dec(&cp->iscsi_conn);
1641 goto done;
1642 }
1643
1644 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1645 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp->ctx_tbl[l5_cid].cid,
1646 cp->func);
1647
1648done:
1649 cqes[0] = (struct kcqe *) &kcqe;
1650 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1651 return ret;
1652}
1653
1654
1655static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1656{
1657 struct cnic_local *cp = dev->cnic_priv;
1658 struct iscsi_kwqe_conn_update *req =
1659 (struct iscsi_kwqe_conn_update *) kwqe;
1660 void *data;
1661 union l5cm_specific_data l5_data;
1662 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1663 int ret;
1664
1665 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1666 return -EINVAL;
1667
1668 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1669 if (!data)
1670 return -ENOMEM;
1671
1672 memcpy(data, kwqe, sizeof(struct kwqe));
1673
1674 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1675 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1676 return ret;
1677}
1678
1679static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1680{
1681 struct cnic_local *cp = dev->cnic_priv;
1682 struct iscsi_kwqe_conn_destroy *req =
1683 (struct iscsi_kwqe_conn_destroy *) kwqe;
1684 union l5cm_specific_data l5_data;
1685 u32 l5_cid = req->reserved0;
1686 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1687 int ret = 0;
1688 struct iscsi_kcqe kcqe;
1689 struct kcqe *cqes[1];
1690
1691 if (!(ctx->ctx_flags & CTX_FL_OFFLD_START))
1692 goto skip_cfc_delete;
1693
1694 while (!time_after(jiffies, ctx->timestamp + (2 * HZ)))
1695 msleep(250);
1696
1697 init_waitqueue_head(&ctx->waitq);
1698 ctx->wait_cond = 0;
1699 memset(&l5_data, 0, sizeof(l5_data));
1700 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
1701 req->context_id,
1702 ETH_CONNECTION_TYPE |
1703 (1 << SPE_HDR_COMMON_RAMROD_SHIFT),
1704 &l5_data);
1705 if (ret == 0)
1706 wait_event(ctx->waitq, ctx->wait_cond);
1707
1708skip_cfc_delete:
1709 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1710
1711 atomic_dec(&cp->iscsi_conn);
1712
1713 memset(&kcqe, 0, sizeof(kcqe));
1714 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1715 kcqe.iscsi_conn_id = l5_cid;
1716 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1717 kcqe.iscsi_conn_context_id = req->context_id;
1718
1719 cqes[0] = (struct kcqe *) &kcqe;
1720 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1721
1722 return ret;
1723}
1724
1725static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1726 struct l4_kwq_connect_req1 *kwqe1,
1727 struct l4_kwq_connect_req3 *kwqe3,
1728 struct l5cm_active_conn_buffer *conn_buf)
1729{
1730 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1731 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1732 &conn_buf->xstorm_conn_buffer;
1733 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1734 &conn_buf->tstorm_conn_buffer;
1735 struct regpair context_addr;
1736 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1737 struct in6_addr src_ip, dst_ip;
1738 int i;
1739 u32 *addrp;
1740
1741 addrp = (u32 *) &conn_addr->local_ip_addr;
1742 for (i = 0; i < 4; i++, addrp++)
1743 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1744
1745 addrp = (u32 *) &conn_addr->remote_ip_addr;
1746 for (i = 0; i < 4; i++, addrp++)
1747 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1748
1749 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1750
1751 xstorm_buf->context_addr.hi = context_addr.hi;
1752 xstorm_buf->context_addr.lo = context_addr.lo;
1753 xstorm_buf->mss = 0xffff;
1754 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1755 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1756 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1757 xstorm_buf->pseudo_header_checksum =
1758 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1759
1760 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1761 tstorm_buf->params |=
1762 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1763 if (kwqe3->ka_timeout) {
1764 tstorm_buf->ka_enable = 1;
1765 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1766 tstorm_buf->ka_interval = kwqe3->ka_interval;
1767 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1768 }
1769 tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1770 tstorm_buf->snd_buf = kwqe3->snd_buf;
1771 tstorm_buf->max_rt_time = 0xffffffff;
1772}
1773
1774static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1775{
1776 struct cnic_local *cp = dev->cnic_priv;
1777 int func = CNIC_FUNC(cp);
1778 u8 *mac = dev->mac_addr;
1779
1780 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1781 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func), mac[0]);
1782 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1783 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func), mac[1]);
1784 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1785 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func), mac[2]);
1786 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1787 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func), mac[3]);
1788 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1789 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func), mac[4]);
1790 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1791 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func), mac[5]);
1792
1793 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1794 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func), mac[5]);
1795 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1796 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1797 mac[4]);
1798 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1799 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func), mac[3]);
1800 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1801 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1802 mac[2]);
1803 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1804 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 2,
1805 mac[1]);
1806 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1807 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 3,
1808 mac[0]);
1809}
1810
1811static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1812{
1813 struct cnic_local *cp = dev->cnic_priv;
1814 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1815 u16 tstorm_flags = 0;
1816
1817 if (tcp_ts) {
1818 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1819 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1820 }
1821
1822 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1823 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), xstorm_flags);
1824
1825 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1826 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), tstorm_flags);
1827}
1828
1829static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1830 u32 num, int *work)
1831{
1832 struct cnic_local *cp = dev->cnic_priv;
1833 struct l4_kwq_connect_req1 *kwqe1 =
1834 (struct l4_kwq_connect_req1 *) wqes[0];
1835 struct l4_kwq_connect_req3 *kwqe3;
1836 struct l5cm_active_conn_buffer *conn_buf;
1837 struct l5cm_conn_addr_params *conn_addr;
1838 union l5cm_specific_data l5_data;
1839 u32 l5_cid = kwqe1->pg_cid;
1840 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1841 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1842 int ret;
1843
1844 if (num < 2) {
1845 *work = num;
1846 return -EINVAL;
1847 }
1848
1849 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1850 *work = 3;
1851 else
1852 *work = 2;
1853
1854 if (num < *work) {
1855 *work = num;
1856 return -EINVAL;
1857 }
1858
1859 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
1860 printk(KERN_ERR PFX "%s: conn_buf size too big\n",
1861 dev->netdev->name);
1862 return -ENOMEM;
1863 }
1864 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1865 if (!conn_buf)
1866 return -ENOMEM;
1867
1868 memset(conn_buf, 0, sizeof(*conn_buf));
1869
1870 conn_addr = &conn_buf->conn_addr_buf;
1871 conn_addr->remote_addr_0 = csk->ha[0];
1872 conn_addr->remote_addr_1 = csk->ha[1];
1873 conn_addr->remote_addr_2 = csk->ha[2];
1874 conn_addr->remote_addr_3 = csk->ha[3];
1875 conn_addr->remote_addr_4 = csk->ha[4];
1876 conn_addr->remote_addr_5 = csk->ha[5];
1877
1878 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
1879 struct l4_kwq_connect_req2 *kwqe2 =
1880 (struct l4_kwq_connect_req2 *) wqes[1];
1881
1882 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
1883 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
1884 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
1885
1886 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
1887 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
1888 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
1889 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
1890 }
1891 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
1892
1893 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
1894 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
1895 conn_addr->local_tcp_port = kwqe1->src_port;
1896 conn_addr->remote_tcp_port = kwqe1->dst_port;
1897
1898 conn_addr->pmtu = kwqe3->pmtu;
1899 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
1900
1901 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1902 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->func), csk->vlan_id);
1903
1904 cnic_bnx2x_set_tcp_timestamp(dev,
1905 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
1906
1907 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
1908 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1909 if (!ret)
1910 ctx->ctx_flags |= CTX_FL_OFFLD_START;
1911
1912 return ret;
1913}
1914
1915static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
1916{
1917 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
1918 union l5cm_specific_data l5_data;
1919 int ret;
1920
1921 memset(&l5_data, 0, sizeof(l5_data));
1922 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
1923 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1924 return ret;
1925}
1926
1927static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
1928{
1929 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
1930 union l5cm_specific_data l5_data;
1931 int ret;
1932
1933 memset(&l5_data, 0, sizeof(l5_data));
1934 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
1935 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1936 return ret;
1937}
1938static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1939{
1940 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
1941 struct l4_kcq kcqe;
1942 struct kcqe *cqes[1];
1943
1944 memset(&kcqe, 0, sizeof(kcqe));
1945 kcqe.pg_host_opaque = req->host_opaque;
1946 kcqe.pg_cid = req->host_opaque;
1947 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
1948 cqes[0] = (struct kcqe *) &kcqe;
1949 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1950 return 0;
1951}
1952
1953static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1954{
1955 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
1956 struct l4_kcq kcqe;
1957 struct kcqe *cqes[1];
1958
1959 memset(&kcqe, 0, sizeof(kcqe));
1960 kcqe.pg_host_opaque = req->pg_host_opaque;
1961 kcqe.pg_cid = req->pg_cid;
1962 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
1963 cqes[0] = (struct kcqe *) &kcqe;
1964 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1965 return 0;
1966}
1967
1968static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1969 u32 num_wqes)
1970{
1971 int i, work, ret;
1972 u32 opcode;
1973 struct kwqe *kwqe;
1974
1975 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1976 return -EAGAIN; /* bnx2 is down */
1977
1978 for (i = 0; i < num_wqes; ) {
1979 kwqe = wqes[i];
1980 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
1981 work = 1;
1982
1983 switch (opcode) {
1984 case ISCSI_KWQE_OPCODE_INIT1:
1985 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
1986 break;
1987 case ISCSI_KWQE_OPCODE_INIT2:
1988 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
1989 break;
1990 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
1991 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
1992 num_wqes - i, &work);
1993 break;
1994 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
1995 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
1996 break;
1997 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
1998 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
1999 break;
2000 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2001 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2002 &work);
2003 break;
2004 case L4_KWQE_OPCODE_VALUE_CLOSE:
2005 ret = cnic_bnx2x_close(dev, kwqe);
2006 break;
2007 case L4_KWQE_OPCODE_VALUE_RESET:
2008 ret = cnic_bnx2x_reset(dev, kwqe);
2009 break;
2010 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2011 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2012 break;
2013 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2014 ret = cnic_bnx2x_update_pg(dev, kwqe);
2015 break;
2016 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2017 ret = 0;
2018 break;
2019 default:
2020 ret = 0;
2021 printk(KERN_ERR PFX "%s: Unknown type of KWQE(0x%x)\n",
2022 dev->netdev->name, opcode);
2023 break;
2024 }
2025 if (ret < 0)
2026 printk(KERN_ERR PFX "%s: KWQE(0x%x) failed\n",
2027 dev->netdev->name, opcode);
2028 i += work;
2029 }
2030 return 0;
2031}
2032
a4636960
MC		 2033static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2034{
2035 struct cnic_local *cp = dev->cnic_priv;
2036 int i, j;
2037
2038 i = 0;
2039 j = 1;
2040 while (num_cqes) {
2041 struct cnic_ulp_ops *ulp_ops;
2042 int ulp_type;
2043 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2044 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2045
2046 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2047 cnic_kwq_completion(dev, 1);
2048
2049 while (j < num_cqes) {
2050 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2051
2052 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2053 break;
2054
2055 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2056 cnic_kwq_completion(dev, 1);
2057 j++;
2058 }
2059
2060 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2061 ulp_type = CNIC_ULP_RDMA;
2062 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2063 ulp_type = CNIC_ULP_ISCSI;
2064 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2065 ulp_type = CNIC_ULP_L4;
2066 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2067 goto end;
2068 else {
2069 printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
2070 dev->netdev->name, kcqe_op_flag);
2071 goto end;
2072 }
2073
2074 rcu_read_lock();
2075 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2076 if (likely(ulp_ops)) {
2077 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2078 cp->completed_kcq + i, j);
2079 }
2080 rcu_read_unlock();
2081end:
2082 num_cqes -= j;
2083 i += j;
2084 j = 1;
2085 }
2086 return;
2087}
2088
71034ba8
MC		 2089static u16 cnic_bnx2_next_idx(u16 idx)
2090{
2091 return idx + 1;
2092}
2093
2094static u16 cnic_bnx2_hw_idx(u16 idx)
2095{
2096 return idx;
2097}
2098
2099static u16 cnic_bnx2x_next_idx(u16 idx)
a4636960 2100{
71034ba8
MC		 2101 idx++;
2102 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2103 idx++;
2104
2105 return idx;
a4636960
MC		 2106}
2107
71034ba8 2108static u16 cnic_bnx2x_hw_idx(u16 idx)
a4636960 2109{
71034ba8
MC		 2110 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2111 idx++;
a4636960
MC		 2112 return idx;
2113}
2114
2115static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
2116{
2117 struct cnic_local *cp = dev->cnic_priv;
2118 u16 i, ri, last;
2119 struct kcqe *kcqe;
2120 int kcqe_cnt = 0, last_cnt = 0;
2121
2122 i = ri = last = *sw_prod;
2123 ri &= MAX_KCQ_IDX;
2124
2125 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2126 kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2127 cp->completed_kcq[kcqe_cnt++] = kcqe;
2128 i = cp->next_idx(i);
2129 ri = i & MAX_KCQ_IDX;
2130 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2131 last_cnt = kcqe_cnt;
2132 last = i;
2133 }
2134 }
2135
2136 *sw_prod = last;
2137 return last_cnt;
2138}
2139
86b53606 2140static void cnic_chk_pkt_rings(struct cnic_local *cp)
a4636960
MC		 2141{
2142 u16 rx_cons = *cp->rx_cons_ptr;
2143 u16 tx_cons = *cp->tx_cons_ptr;
2144
2145 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2146 cp->tx_cons = tx_cons;
2147 cp->rx_cons = rx_cons;
71034ba8 2148
a4636960
MC		 2149 uio_event_notify(cp->cnic_uinfo);
2150 }
2151}
2152
2153static int cnic_service_bnx2(void *data, void *status_blk)
2154{
2155 struct cnic_dev *dev = data;
2156 struct status_block *sblk = status_blk;
2157 struct cnic_local *cp = dev->cnic_priv;
2158 u32 status_idx = sblk->status_idx;
2159 u16 hw_prod, sw_prod;
2160 int kcqe_cnt;
2161
2162 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2163 return status_idx;
2164
2165 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2166
2167 hw_prod = sblk->status_completion_producer_index;
2168 sw_prod = cp->kcq_prod_idx;
2169 while (sw_prod != hw_prod) {
2170 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2171 if (kcqe_cnt == 0)
2172 goto done;
2173
2174 service_kcqes(dev, kcqe_cnt);
2175
2176 /* Tell compiler that status_blk fields can change. */
2177 barrier();
2178 if (status_idx != sblk->status_idx) {
2179 status_idx = sblk->status_idx;
2180 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2181 hw_prod = sblk->status_completion_producer_index;
2182 } else
2183 break;
2184 }
2185
2186done:
2187 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2188
2189 cp->kcq_prod_idx = sw_prod;
2190
86b53606 2191 cnic_chk_pkt_rings(cp);
a4636960
MC		 2192 return status_idx;
2193}
2194
2195static void cnic_service_bnx2_msix(unsigned long data)
2196{
2197 struct cnic_dev *dev = (struct cnic_dev *) data;
2198 struct cnic_local *cp = dev->cnic_priv;
2199 struct status_block_msix *status_blk = cp->bnx2_status_blk;
2200 u32 status_idx = status_blk->status_idx;
2201 u16 hw_prod, sw_prod;
2202 int kcqe_cnt;
2203
2204 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2205
2206 hw_prod = status_blk->status_completion_producer_index;
2207 sw_prod = cp->kcq_prod_idx;
2208 while (sw_prod != hw_prod) {
2209 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2210 if (kcqe_cnt == 0)
2211 goto done;
2212
2213 service_kcqes(dev, kcqe_cnt);
2214
2215 /* Tell compiler that status_blk fields can change. */
2216 barrier();
2217 if (status_idx != status_blk->status_idx) {
2218 status_idx = status_blk->status_idx;
2219 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2220 hw_prod = status_blk->status_completion_producer_index;
2221 } else
2222 break;
2223 }
2224
2225done:
2226 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2227 cp->kcq_prod_idx = sw_prod;
2228
86b53606 2229 cnic_chk_pkt_rings(cp);
a4636960
MC		 2230
2231 cp->last_status_idx = status_idx;
2232 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2233 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2234}
2235
2236static irqreturn_t cnic_irq(int irq, void *dev_instance)
2237{
2238 struct cnic_dev *dev = dev_instance;
2239 struct cnic_local *cp = dev->cnic_priv;
2240 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2241
2242 if (cp->ack_int)
2243 cp->ack_int(dev);
2244
2245 prefetch(cp->status_blk);
2246 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2247
2248 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2249 tasklet_schedule(&cp->cnic_irq_task);
2250
2251 return IRQ_HANDLED;
2252}
2253
71034ba8
MC		 2254static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2255 u16 index, u8 op, u8 update)
2256{
2257 struct cnic_local *cp = dev->cnic_priv;
2258 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2259 COMMAND_REG_INT_ACK);
2260 struct igu_ack_register igu_ack;
2261
2262 igu_ack.status_block_index = index;
2263 igu_ack.sb_id_and_flags =
2264 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2265 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2266 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2267 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2268
2269 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2270}
2271
2272static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2273{
2274 struct cnic_local *cp = dev->cnic_priv;
2275
2276 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, 0,
2277 IGU_INT_DISABLE, 0);
2278}
2279
2280static void cnic_service_bnx2x_bh(unsigned long data)
2281{
2282 struct cnic_dev *dev = (struct cnic_dev *) data;
2283 struct cnic_local *cp = dev->cnic_priv;
2284 u16 hw_prod, sw_prod;
2285 struct cstorm_status_block_c *sblk =
2286 &cp->bnx2x_status_blk->c_status_block;
2287 u32 status_idx = sblk->status_block_index;
2288 int kcqe_cnt;
2289
2290 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2291 return;
2292
2293 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2294 hw_prod = cp->hw_idx(hw_prod);
2295 sw_prod = cp->kcq_prod_idx;
2296 while (sw_prod != hw_prod) {
2297 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2298 if (kcqe_cnt == 0)
2299 goto done;
2300
2301 service_kcqes(dev, kcqe_cnt);
2302
2303 /* Tell compiler that sblk fields can change. */
2304 barrier();
2305 if (status_idx == sblk->status_block_index)
2306 break;
2307
2308 status_idx = sblk->status_block_index;
2309 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2310 hw_prod = cp->hw_idx(hw_prod);
2311 }
2312
2313done:
2314 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod + MAX_KCQ_IDX);
2315 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID,
2316 status_idx, IGU_INT_ENABLE, 1);
2317
2318 cp->kcq_prod_idx = sw_prod;
2319 return;
2320}
2321
2322static int cnic_service_bnx2x(void *data, void *status_blk)
2323{
2324 struct cnic_dev *dev = data;
2325 struct cnic_local *cp = dev->cnic_priv;
2326 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2327
2328 prefetch(cp->status_blk);
2329 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2330
2331 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2332 tasklet_schedule(&cp->cnic_irq_task);
2333
2334 cnic_chk_pkt_rings(cp);
2335
2336 return 0;
2337}
2338
a4636960
MC		 2339static void cnic_ulp_stop(struct cnic_dev *dev)
2340{
2341 struct cnic_local *cp = dev->cnic_priv;
2342 int if_type;
2343
6d7760a8
MC		 2344 if (cp->cnic_uinfo)
2345 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2346
a4636960
MC		 2347 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2348 struct cnic_ulp_ops *ulp_ops;
2349
681dbd71
MC		 2350 mutex_lock(&cnic_lock);
2351 ulp_ops = cp->ulp_ops[if_type];
2352 if (!ulp_ops) {
2353 mutex_unlock(&cnic_lock);
a4636960 2354 continue;
681dbd71
MC		 2355 }
2356 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2357 mutex_unlock(&cnic_lock);
a4636960
MC		 2358
2359 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2360 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
681dbd71
MC		 2361
2362 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
a4636960 2363 }
a4636960
MC		 2364}
2365
2366static void cnic_ulp_start(struct cnic_dev *dev)
2367{
2368 struct cnic_local *cp = dev->cnic_priv;
2369 int if_type;
2370
a4636960
MC		 2371 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2372 struct cnic_ulp_ops *ulp_ops;
2373
681dbd71
MC		 2374 mutex_lock(&cnic_lock);
2375 ulp_ops = cp->ulp_ops[if_type];
2376 if (!ulp_ops || !ulp_ops->cnic_start) {
2377 mutex_unlock(&cnic_lock);
a4636960 2378 continue;
681dbd71
MC		 2379 }
2380 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2381 mutex_unlock(&cnic_lock);
a4636960
MC		 2382
2383 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2384 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
681dbd71
MC		 2385
2386 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
a4636960 2387 }
a4636960
MC		 2388}
2389
2390static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2391{
2392 struct cnic_dev *dev = data;
2393
2394 switch (info->cmd) {
2395 case CNIC_CTL_STOP_CMD:
2396 cnic_hold(dev);
a4636960
MC		 2397
2398 cnic_ulp_stop(dev);
2399 cnic_stop_hw(dev);
2400
a4636960
MC		 2401 cnic_put(dev);
2402 break;
2403 case CNIC_CTL_START_CMD:
2404 cnic_hold(dev);
a4636960
MC		 2405
2406 if (!cnic_start_hw(dev))
2407 cnic_ulp_start(dev);
2408
a4636960
MC		 2409 cnic_put(dev);
2410 break;
71034ba8
MC		 2411 case CNIC_CTL_COMPLETION_CMD: {
2412 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2413 u32 l5_cid;
2414 struct cnic_local *cp = dev->cnic_priv;
2415
2416 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2417 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2418
2419 ctx->wait_cond = 1;
2420 wake_up(&ctx->waitq);
2421 }
2422 break;
2423 }
a4636960
MC		 2424 default:
2425 return -EINVAL;
2426 }
2427 return 0;
2428}
2429
2430static void cnic_ulp_init(struct cnic_dev *dev)
2431{
2432 int i;
2433 struct cnic_local *cp = dev->cnic_priv;
2434
a4636960
MC		 2435 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2436 struct cnic_ulp_ops *ulp_ops;
2437
7fc1ece4
MC		 2438 mutex_lock(&cnic_lock);
2439 ulp_ops = cnic_ulp_tbl[i];
2440 if (!ulp_ops || !ulp_ops->cnic_init) {
2441 mutex_unlock(&cnic_lock);
a4636960 2442 continue;
7fc1ece4
MC		 2443 }
2444 ulp_get(ulp_ops);
2445 mutex_unlock(&cnic_lock);
a4636960
MC		 2446
2447 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2448 ulp_ops->cnic_init(dev);
2449
7fc1ece4 2450 ulp_put(ulp_ops);
a4636960 2451 }
a4636960
MC		 2452}
2453
2454static void cnic_ulp_exit(struct cnic_dev *dev)
2455{
2456 int i;
2457 struct cnic_local *cp = dev->cnic_priv;
2458
a4636960
MC		 2459 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2460 struct cnic_ulp_ops *ulp_ops;
2461
7fc1ece4
MC		 2462 mutex_lock(&cnic_lock);
2463 ulp_ops = cnic_ulp_tbl[i];
2464 if (!ulp_ops || !ulp_ops->cnic_exit) {
2465 mutex_unlock(&cnic_lock);
a4636960 2466 continue;
7fc1ece4
MC		 2467 }
2468 ulp_get(ulp_ops);
2469 mutex_unlock(&cnic_lock);
a4636960
MC		 2470
2471 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2472 ulp_ops->cnic_exit(dev);
2473
7fc1ece4 2474 ulp_put(ulp_ops);
a4636960 2475 }
a4636960
MC		 2476}
2477
2478static int cnic_cm_offload_pg(struct cnic_sock *csk)
2479{
2480 struct cnic_dev *dev = csk->dev;
2481 struct l4_kwq_offload_pg *l4kwqe;
2482 struct kwqe *wqes[1];
2483
2484 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2485 memset(l4kwqe, 0, sizeof(*l4kwqe));
2486 wqes[0] = (struct kwqe *) l4kwqe;
2487
2488 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2489 l4kwqe->flags =
2490 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2491 l4kwqe->l2hdr_nbytes = ETH_HLEN;
2492
2493 l4kwqe->da0 = csk->ha[0];
2494 l4kwqe->da1 = csk->ha[1];
2495 l4kwqe->da2 = csk->ha[2];
2496 l4kwqe->da3 = csk->ha[3];
2497 l4kwqe->da4 = csk->ha[4];
2498 l4kwqe->da5 = csk->ha[5];
2499
2500 l4kwqe->sa0 = dev->mac_addr[0];
2501 l4kwqe->sa1 = dev->mac_addr[1];
2502 l4kwqe->sa2 = dev->mac_addr[2];
2503 l4kwqe->sa3 = dev->mac_addr[3];
2504 l4kwqe->sa4 = dev->mac_addr[4];
2505 l4kwqe->sa5 = dev->mac_addr[5];
2506
2507 l4kwqe->etype = ETH_P_IP;
2508 l4kwqe->ipid_count = DEF_IPID_COUNT;
2509 l4kwqe->host_opaque = csk->l5_cid;
2510
2511 if (csk->vlan_id) {
2512 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2513 l4kwqe->vlan_tag = csk->vlan_id;
2514 l4kwqe->l2hdr_nbytes += 4;
2515 }
2516
2517 return dev->submit_kwqes(dev, wqes, 1);
2518}
2519
2520static int cnic_cm_update_pg(struct cnic_sock *csk)
2521{
2522 struct cnic_dev *dev = csk->dev;
2523 struct l4_kwq_update_pg *l4kwqe;
2524 struct kwqe *wqes[1];
2525
2526 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2527 memset(l4kwqe, 0, sizeof(*l4kwqe));
2528 wqes[0] = (struct kwqe *) l4kwqe;
2529
2530 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2531 l4kwqe->flags =
2532 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2533 l4kwqe->pg_cid = csk->pg_cid;
2534
2535 l4kwqe->da0 = csk->ha[0];
2536 l4kwqe->da1 = csk->ha[1];
2537 l4kwqe->da2 = csk->ha[2];
2538 l4kwqe->da3 = csk->ha[3];
2539 l4kwqe->da4 = csk->ha[4];
2540 l4kwqe->da5 = csk->ha[5];
2541
2542 l4kwqe->pg_host_opaque = csk->l5_cid;
2543 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2544
2545 return dev->submit_kwqes(dev, wqes, 1);
2546}
2547
2548static int cnic_cm_upload_pg(struct cnic_sock *csk)
2549{
2550 struct cnic_dev *dev = csk->dev;
2551 struct l4_kwq_upload *l4kwqe;
2552 struct kwqe *wqes[1];
2553
2554 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2555 memset(l4kwqe, 0, sizeof(*l4kwqe));
2556 wqes[0] = (struct kwqe *) l4kwqe;
2557
2558 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2559 l4kwqe->flags =
2560 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2561 l4kwqe->cid = csk->pg_cid;
2562
2563 return dev->submit_kwqes(dev, wqes, 1);
2564}
2565
2566static int cnic_cm_conn_req(struct cnic_sock *csk)
2567{
2568 struct cnic_dev *dev = csk->dev;
2569 struct l4_kwq_connect_req1 *l4kwqe1;
2570 struct l4_kwq_connect_req2 *l4kwqe2;
2571 struct l4_kwq_connect_req3 *l4kwqe3;
2572 struct kwqe *wqes[3];
2573 u8 tcp_flags = 0;
2574 int num_wqes = 2;
2575
2576 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2577 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2578 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2579 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2580 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2581 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2582
2583 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2584 l4kwqe3->flags =
2585 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2586 l4kwqe3->ka_timeout = csk->ka_timeout;
2587 l4kwqe3->ka_interval = csk->ka_interval;
2588 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2589 l4kwqe3->tos = csk->tos;
2590 l4kwqe3->ttl = csk->ttl;
2591 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2592 l4kwqe3->pmtu = csk->mtu;
2593 l4kwqe3->rcv_buf = csk->rcv_buf;
2594 l4kwqe3->snd_buf = csk->snd_buf;
2595 l4kwqe3->seed = csk->seed;
2596
2597 wqes[0] = (struct kwqe *) l4kwqe1;
2598 if (test_bit(SK_F_IPV6, &csk->flags)) {
2599 wqes[1] = (struct kwqe *) l4kwqe2;
2600 wqes[2] = (struct kwqe *) l4kwqe3;
2601 num_wqes = 3;
2602
2603 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2604 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2605 l4kwqe2->flags =
2606 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2607 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2608 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2609 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2610 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2611 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2612 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2613 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2614 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2615 sizeof(struct tcphdr);
2616 } else {
2617 wqes[1] = (struct kwqe *) l4kwqe3;
2618 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2619 sizeof(struct tcphdr);
2620 }
2621
2622 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2623 l4kwqe1->flags =
2624 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2625 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2626 l4kwqe1->cid = csk->cid;
2627 l4kwqe1->pg_cid = csk->pg_cid;
2628 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2629 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2630 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2631 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2632 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2633 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2634 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2635 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2636 if (csk->tcp_flags & SK_TCP_NAGLE)
2637 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2638 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2639 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2640 if (csk->tcp_flags & SK_TCP_SACK)
2641 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2642 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2643 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2644
2645 l4kwqe1->tcp_flags = tcp_flags;
2646
2647 return dev->submit_kwqes(dev, wqes, num_wqes);
2648}
2649
2650static int cnic_cm_close_req(struct cnic_sock *csk)
2651{
2652 struct cnic_dev *dev = csk->dev;
2653 struct l4_kwq_close_req *l4kwqe;
2654 struct kwqe *wqes[1];
2655
2656 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2657 memset(l4kwqe, 0, sizeof(*l4kwqe));
2658 wqes[0] = (struct kwqe *) l4kwqe;
2659
2660 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2661 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2662 l4kwqe->cid = csk->cid;
2663
2664 return dev->submit_kwqes(dev, wqes, 1);
2665}
2666
2667static int cnic_cm_abort_req(struct cnic_sock *csk)
2668{
2669 struct cnic_dev *dev = csk->dev;
2670 struct l4_kwq_reset_req *l4kwqe;
2671 struct kwqe *wqes[1];
2672
2673 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2674 memset(l4kwqe, 0, sizeof(*l4kwqe));
2675 wqes[0] = (struct kwqe *) l4kwqe;
2676
2677 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2678 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2679 l4kwqe->cid = csk->cid;
2680
2681 return dev->submit_kwqes(dev, wqes, 1);
2682}
2683
2684static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2685 u32 l5_cid, struct cnic_sock **csk, void *context)
2686{
2687 struct cnic_local *cp = dev->cnic_priv;
2688 struct cnic_sock *csk1;
2689
2690 if (l5_cid >= MAX_CM_SK_TBL_SZ)
2691 return -EINVAL;
2692
2693 csk1 = &cp->csk_tbl[l5_cid];
2694 if (atomic_read(&csk1->ref_count))
2695 return -EAGAIN;
2696
2697 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2698 return -EBUSY;
2699
2700 csk1->dev = dev;
2701 csk1->cid = cid;
2702 csk1->l5_cid = l5_cid;
2703 csk1->ulp_type = ulp_type;
2704 csk1->context = context;
2705
2706 csk1->ka_timeout = DEF_KA_TIMEOUT;
2707 csk1->ka_interval = DEF_KA_INTERVAL;
2708 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2709 csk1->tos = DEF_TOS;
2710 csk1->ttl = DEF_TTL;
2711 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2712 csk1->rcv_buf = DEF_RCV_BUF;
2713 csk1->snd_buf = DEF_SND_BUF;
2714 csk1->seed = DEF_SEED;
2715
2716 *csk = csk1;
2717 return 0;
2718}
2719
2720static void cnic_cm_cleanup(struct cnic_sock *csk)
2721{
2722 if (csk->src_port) {
2723 struct cnic_dev *dev = csk->dev;
2724 struct cnic_local *cp = dev->cnic_priv;
2725
2726 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
2727 csk->src_port = 0;
2728 }
2729}
2730
2731static void cnic_close_conn(struct cnic_sock *csk)
2732{
2733 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2734 cnic_cm_upload_pg(csk);
2735 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2736 }
2737 cnic_cm_cleanup(csk);
2738}
2739
2740static int cnic_cm_destroy(struct cnic_sock *csk)
2741{
2742 if (!cnic_in_use(csk))
2743 return -EINVAL;
2744
2745 csk_hold(csk);
2746 clear_bit(SK_F_INUSE, &csk->flags);
2747 smp_mb__after_clear_bit();
2748 while (atomic_read(&csk->ref_count) != 1)
2749 msleep(1);
2750 cnic_cm_cleanup(csk);
2751
2752 csk->flags = 0;
2753 csk_put(csk);
2754 return 0;
2755}
2756
2757static inline u16 cnic_get_vlan(struct net_device *dev,
2758 struct net_device **vlan_dev)
2759{
2760 if (dev->priv_flags & IFF_802_1Q_VLAN) {
2761 *vlan_dev = vlan_dev_real_dev(dev);
2762 return vlan_dev_vlan_id(dev);
2763 }
2764 *vlan_dev = dev;
2765 return 0;
2766}
2767
2768static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2769 struct dst_entry **dst)
2770{
faea56c9 2771#if defined(CONFIG_INET)
a4636960
MC		 2772 struct flowi fl;
2773 int err;
2774 struct rtable *rt;
2775
2776 memset(&fl, 0, sizeof(fl));
2777 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2778
2779 err = ip_route_output_key(&init_net, &rt, &fl);
2780 if (!err)
2781 *dst = &rt->u.dst;
2782 return err;
faea56c9
RD		 2783#else
2784 return -ENETUNREACH;
2785#endif
a4636960
MC		 2786}
2787
2788static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2789 struct dst_entry **dst)
2790{
faea56c9 2791#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
a4636960
MC		 2792 struct flowi fl;
2793
2794 memset(&fl, 0, sizeof(fl));
2795 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2796 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2797 fl.oif = dst_addr->sin6_scope_id;
2798
2799 *dst = ip6_route_output(&init_net, NULL, &fl);
2800 if (*dst)
2801 return 0;
2802#endif
2803
2804 return -ENETUNREACH;
2805}
2806
2807static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2808 int ulp_type)
2809{
2810 struct cnic_dev *dev = NULL;
2811 struct dst_entry *dst;
2812 struct net_device *netdev = NULL;
2813 int err = -ENETUNREACH;
2814
2815 if (dst_addr->sin_family == AF_INET)
2816 err = cnic_get_v4_route(dst_addr, &dst);
2817 else if (dst_addr->sin_family == AF_INET6) {
2818 struct sockaddr_in6 *dst_addr6 =
2819 (struct sockaddr_in6 *) dst_addr;
2820
2821 err = cnic_get_v6_route(dst_addr6, &dst);
2822 } else
2823 return NULL;
2824
2825 if (err)
2826 return NULL;
2827
2828 if (!dst->dev)
2829 goto done;
2830
2831 cnic_get_vlan(dst->dev, &netdev);
2832
2833 dev = cnic_from_netdev(netdev);
2834
2835done:
2836 dst_release(dst);
2837 if (dev)
2838 cnic_put(dev);
2839 return dev;
2840}
2841
2842static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2843{
2844 struct cnic_dev *dev = csk->dev;
2845 struct cnic_local *cp = dev->cnic_priv;
2846
2847 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
2848}
2849
2850static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2851{
2852 struct cnic_dev *dev = csk->dev;
2853 struct cnic_local *cp = dev->cnic_priv;
2854 int is_v6, err, rc = -ENETUNREACH;
2855 struct dst_entry *dst;
2856 struct net_device *realdev;
2857 u32 local_port;
2858
2859 if (saddr->local.v6.sin6_family == AF_INET6 &&
2860 saddr->remote.v6.sin6_family == AF_INET6)
2861 is_v6 = 1;
2862 else if (saddr->local.v4.sin_family == AF_INET &&
2863 saddr->remote.v4.sin_family == AF_INET)
2864 is_v6 = 0;
2865 else
2866 return -EINVAL;
2867
2868 clear_bit(SK_F_IPV6, &csk->flags);
2869
2870 if (is_v6) {
faea56c9 2871#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
a4636960
MC		 2872 set_bit(SK_F_IPV6, &csk->flags);
2873 err = cnic_get_v6_route(&saddr->remote.v6, &dst);
2874 if (err)
2875 return err;
2876
2877 if (!dst || dst->error || !dst->dev)
2878 goto err_out;
2879
2880 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
2881 sizeof(struct in6_addr));
2882 csk->dst_port = saddr->remote.v6.sin6_port;
2883 local_port = saddr->local.v6.sin6_port;
2884#else
2885 return rc;
2886#endif
2887
2888 } else {
2889 err = cnic_get_v4_route(&saddr->remote.v4, &dst);
2890 if (err)
2891 return err;
2892
2893 if (!dst || dst->error || !dst->dev)
2894 goto err_out;
2895
2896 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
2897 csk->dst_port = saddr->remote.v4.sin_port;
2898 local_port = saddr->local.v4.sin_port;
2899 }
2900
2901 csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
2902 if (realdev != dev->netdev)
2903 goto err_out;
2904
2905 if (local_port >= CNIC_LOCAL_PORT_MIN &&
2906 local_port < CNIC_LOCAL_PORT_MAX) {
2907 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
2908 local_port = 0;
2909 } else
2910 local_port = 0;
2911
2912 if (!local_port) {
2913 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
2914 if (local_port == -1) {
2915 rc = -ENOMEM;
2916 goto err_out;
2917 }
2918 }
2919 csk->src_port = local_port;
2920
2921 csk->mtu = dst_mtu(dst);
2922 rc = 0;
2923
2924err_out:
2925 dst_release(dst);
2926 return rc;
2927}
2928
2929static void cnic_init_csk_state(struct cnic_sock *csk)
2930{
2931 csk->state = 0;
2932 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
2933 clear_bit(SK_F_CLOSING, &csk->flags);
2934}
2935
2936static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2937{
2938 int err = 0;
2939
2940 if (!cnic_in_use(csk))
2941 return -EINVAL;
2942
2943 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
2944 return -EINVAL;
2945
2946 cnic_init_csk_state(csk);
2947
2948 err = cnic_get_route(csk, saddr);
2949 if (err)
2950 goto err_out;
2951
2952 err = cnic_resolve_addr(csk, saddr);
2953 if (!err)
2954 return 0;
2955
2956err_out:
2957 clear_bit(SK_F_CONNECT_START, &csk->flags);
2958 return err;
2959}
2960
2961static int cnic_cm_abort(struct cnic_sock *csk)
2962{
2963 struct cnic_local *cp = csk->dev->cnic_priv;
2964 u32 opcode;
2965
2966 if (!cnic_in_use(csk))
2967 return -EINVAL;
2968
2969 if (cnic_abort_prep(csk))
2970 return cnic_cm_abort_req(csk);
2971
2972 /* Getting here means that we haven't started connect, or
2973 * connect was not successful.
2974 */
2975
2976 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2977 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
2978 opcode = csk->state;
2979 else
2980 opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
2981 cp->close_conn(csk, opcode);
2982
2983 return 0;
2984}
2985
2986static int cnic_cm_close(struct cnic_sock *csk)
2987{
2988 if (!cnic_in_use(csk))
2989 return -EINVAL;
2990
2991 if (cnic_close_prep(csk)) {
2992 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2993 return cnic_cm_close_req(csk);
2994 }
2995 return 0;
2996}
2997
2998static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
2999 u8 opcode)
3000{
3001 struct cnic_ulp_ops *ulp_ops;
3002 int ulp_type = csk->ulp_type;
3003
3004 rcu_read_lock();
3005 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3006 if (ulp_ops) {
3007 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3008 ulp_ops->cm_connect_complete(csk);
3009 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3010 ulp_ops->cm_close_complete(csk);
3011 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3012 ulp_ops->cm_remote_abort(csk);
3013 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3014 ulp_ops->cm_abort_complete(csk);
3015 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3016 ulp_ops->cm_remote_close(csk);
3017 }
3018 rcu_read_unlock();
3019}
3020
3021static int cnic_cm_set_pg(struct cnic_sock *csk)
3022{
3023 if (cnic_offld_prep(csk)) {
3024 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3025 cnic_cm_update_pg(csk);
3026 else
3027 cnic_cm_offload_pg(csk);
3028 }
3029 return 0;
3030}
3031
3032static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3033{
3034 struct cnic_local *cp = dev->cnic_priv;
3035 u32 l5_cid = kcqe->pg_host_opaque;
3036 u8 opcode = kcqe->op_code;
3037 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3038
3039 csk_hold(csk);
3040 if (!cnic_in_use(csk))
3041 goto done;
3042
3043 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3044 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3045 goto done;
3046 }
3047 csk->pg_cid = kcqe->pg_cid;
3048 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3049 cnic_cm_conn_req(csk);
3050
3051done:
3052 csk_put(csk);
3053}
3054
3055static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3056{
3057 struct cnic_local *cp = dev->cnic_priv;
3058 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3059 u8 opcode = l4kcqe->op_code;
3060 u32 l5_cid;
3061 struct cnic_sock *csk;
3062
3063 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3064 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3065 cnic_cm_process_offld_pg(dev, l4kcqe);
3066 return;
3067 }
3068
3069 l5_cid = l4kcqe->conn_id;
3070 if (opcode & 0x80)
3071 l5_cid = l4kcqe->cid;
3072 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3073 return;
3074
3075 csk = &cp->csk_tbl[l5_cid];
3076 csk_hold(csk);
3077
3078 if (!cnic_in_use(csk)) {
3079 csk_put(csk);
3080 return;
3081 }
3082
3083 switch (opcode) {
3084 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3085 if (l4kcqe->status == 0)
3086 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3087
3088 smp_mb__before_clear_bit();
3089 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3090 cnic_cm_upcall(cp, csk, opcode);
3091 break;
3092
3093 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3094 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
3095 csk->state = opcode;
3096 /* fall through */
3097 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3098 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
71034ba8
MC		 3099 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3100 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
a4636960
MC		 3101 cp->close_conn(csk, opcode);
3102 break;
3103
3104 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3105 cnic_cm_upcall(cp, csk, opcode);
3106 break;
3107 }
3108 csk_put(csk);
3109}
3110
3111static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3112{
3113 struct cnic_dev *dev = data;
3114 int i;
3115
3116 for (i = 0; i < num; i++)
3117 cnic_cm_process_kcqe(dev, kcqe[i]);
3118}
3119
3120static struct cnic_ulp_ops cm_ulp_ops = {
3121 .indicate_kcqes = cnic_cm_indicate_kcqe,
3122};
3123
3124static void cnic_cm_free_mem(struct cnic_dev *dev)
3125{
3126 struct cnic_local *cp = dev->cnic_priv;
3127
3128 kfree(cp->csk_tbl);
3129 cp->csk_tbl = NULL;
3130 cnic_free_id_tbl(&cp->csk_port_tbl);
3131}
3132
3133static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3134{
3135 struct cnic_local *cp = dev->cnic_priv;
3136
3137 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3138 GFP_KERNEL);
3139 if (!cp->csk_tbl)
3140 return -ENOMEM;
3141
3142 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3143 CNIC_LOCAL_PORT_MIN)) {
3144 cnic_cm_free_mem(dev);
3145 return -ENOMEM;
3146 }
3147 return 0;
3148}
3149
3150static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3151{
3152 if ((opcode == csk->state) ||
3153 (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
3154 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
3155 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
3156 return 1;
3157 }
3158 return 0;
3159}
3160
3161static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3162{
3163 struct cnic_dev *dev = csk->dev;
3164 struct cnic_local *cp = dev->cnic_priv;
3165
3166 clear_bit(SK_F_CONNECT_START, &csk->flags);
3167 if (cnic_ready_to_close(csk, opcode)) {
3168 cnic_close_conn(csk);
3169 cnic_cm_upcall(cp, csk, opcode);
3170 }
3171}
3172
3173static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3174{
3175}
3176
3177static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3178{
3179 u32 seed;
3180
3181 get_random_bytes(&seed, 4);
3182 cnic_ctx_wr(dev, 45, 0, seed);
3183 return 0;
3184}
3185
71034ba8
MC		 3186static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3187{
3188 struct cnic_dev *dev = csk->dev;
3189 struct cnic_local *cp = dev->cnic_priv;
3190 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3191 union l5cm_specific_data l5_data;
3192 u32 cmd = 0;
3193 int close_complete = 0;
3194
3195 switch (opcode) {
3196 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3197 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3198 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3199 if (cnic_ready_to_close(csk, opcode))
3200 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3201 break;
3202 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3203 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3204 break;
3205 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3206 close_complete = 1;
3207 break;
3208 }
3209 if (cmd) {
3210 memset(&l5_data, 0, sizeof(l5_data));
3211
3212 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3213 &l5_data);
3214 } else if (close_complete) {
3215 ctx->timestamp = jiffies;
3216 cnic_close_conn(csk);
3217 cnic_cm_upcall(cp, csk, csk->state);
3218 }
3219}
3220
3221static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3222{
3223}
3224
3225static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3226{
3227 struct cnic_local *cp = dev->cnic_priv;
3228 int func = CNIC_FUNC(cp);
3229
3230 cnic_init_bnx2x_mac(dev);
3231 cnic_bnx2x_set_tcp_timestamp(dev, 1);
3232
3233 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3234 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func), 0);
3235
3236 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3237 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func), 1);
3238 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3239 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func),
3240 DEF_MAX_DA_COUNT);
3241
3242 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3243 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func), DEF_TTL);
3244 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3245 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func), DEF_TOS);
3246 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3247 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func), 2);
3248 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3249 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func), DEF_SWS_TIMER);
3250
3251 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(func),
3252 DEF_MAX_CWND);
3253 return 0;
3254}
3255
a4636960
MC		 3256static int cnic_cm_open(struct cnic_dev *dev)
3257{
3258 struct cnic_local *cp = dev->cnic_priv;
3259 int err;
3260
3261 err = cnic_cm_alloc_mem(dev);
3262 if (err)
3263 return err;
3264
3265 err = cp->start_cm(dev);
3266
3267 if (err)
3268 goto err_out;
3269
3270 dev->cm_create = cnic_cm_create;
3271 dev->cm_destroy = cnic_cm_destroy;
3272 dev->cm_connect = cnic_cm_connect;
3273 dev->cm_abort = cnic_cm_abort;
3274 dev->cm_close = cnic_cm_close;
3275 dev->cm_select_dev = cnic_cm_select_dev;
3276
3277 cp->ulp_handle[CNIC_ULP_L4] = dev;
3278 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3279 return 0;
3280
3281err_out:
3282 cnic_cm_free_mem(dev);
3283 return err;
3284}
3285
3286static int cnic_cm_shutdown(struct cnic_dev *dev)
3287{
3288 struct cnic_local *cp = dev->cnic_priv;
3289 int i;
3290
3291 cp->stop_cm(dev);
3292
3293 if (!cp->csk_tbl)
3294 return 0;
3295
3296 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3297 struct cnic_sock *csk = &cp->csk_tbl[i];
3298
3299 clear_bit(SK_F_INUSE, &csk->flags);
3300 cnic_cm_cleanup(csk);
3301 }
3302 cnic_cm_free_mem(dev);
3303
3304 return 0;
3305}
3306
3307static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3308{
3309 struct cnic_local *cp = dev->cnic_priv;
3310 u32 cid_addr;
3311 int i;
3312
3313 if (CHIP_NUM(cp) == CHIP_NUM_5709)
3314 return;
3315
3316 cid_addr = GET_CID_ADDR(cid);
3317
3318 for (i = 0; i < CTX_SIZE; i += 4)
3319 cnic_ctx_wr(dev, cid_addr, i, 0);
3320}
3321
3322static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3323{
3324 struct cnic_local *cp = dev->cnic_priv;
3325 int ret = 0, i;
3326 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3327
3328 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3329 return 0;
3330
3331 for (i = 0; i < cp->ctx_blks; i++) {
3332 int j;
3333 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3334 u32 val;
3335
3336 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3337
3338 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3339 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3340 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3341 (u64) cp->ctx_arr[i].mapping >> 32);
3342 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3343 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3344 for (j = 0; j < 10; j++) {
3345
3346 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3347 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3348 break;
3349 udelay(5);
3350 }
3351 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3352 ret = -EBUSY;
3353 break;
3354 }
3355 }
3356 return ret;
3357}
3358
3359static void cnic_free_irq(struct cnic_dev *dev)
3360{
3361 struct cnic_local *cp = dev->cnic_priv;
3362 struct cnic_eth_dev *ethdev = cp->ethdev;
3363
3364 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3365 cp->disable_int_sync(dev);
3366 tasklet_disable(&cp->cnic_irq_task);
3367 free_irq(ethdev->irq_arr[0].vector, dev);
3368 }
3369}
3370
3371static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3372{
3373 struct cnic_local *cp = dev->cnic_priv;
3374 struct cnic_eth_dev *ethdev = cp->ethdev;
3375
3376 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3377 int err, i = 0;
3378 int sblk_num = cp->status_blk_num;
3379 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3380 BNX2_HC_SB_CONFIG_1;
3381
3382 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3383
3384 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3385 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3386 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3387
3388 cp->bnx2_status_blk = cp->status_blk;
3389 cp->last_status_idx = cp->bnx2_status_blk->status_idx;
164165da 3390 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
a4636960
MC		 3391 (unsigned long) dev);
3392 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3393 "cnic", dev);
3394 if (err) {
3395 tasklet_disable(&cp->cnic_irq_task);
3396 return err;
3397 }
3398 while (cp->bnx2_status_blk->status_completion_producer_index &&
3399 i < 10) {
3400 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3401 1 << (11 + sblk_num));
3402 udelay(10);
3403 i++;
3404 barrier();
3405 }
3406 if (cp->bnx2_status_blk->status_completion_producer_index) {
3407 cnic_free_irq(dev);
3408 goto failed;
3409 }
3410
3411 } else {
3412 struct status_block *sblk = cp->status_blk;
3413 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3414 int i = 0;
3415
3416 while (sblk->status_completion_producer_index && i < 10) {
3417 CNIC_WR(dev, BNX2_HC_COMMAND,
3418 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3419 udelay(10);
3420 i++;
3421 barrier();
3422 }
3423 if (sblk->status_completion_producer_index)
3424 goto failed;
3425
3426 }
3427 return 0;
3428
3429failed:
3430 printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
3431 dev->netdev->name);
3432 return -EBUSY;
3433}
3434
3435static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3436{
3437 struct cnic_local *cp = dev->cnic_priv;
3438 struct cnic_eth_dev *ethdev = cp->ethdev;
3439
3440 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3441 return;
3442
3443 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3444 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3445}
3446
3447static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3448{
3449 struct cnic_local *cp = dev->cnic_priv;
3450 struct cnic_eth_dev *ethdev = cp->ethdev;
3451
3452 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3453 return;
3454
3455 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3456 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3457 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3458 synchronize_irq(ethdev->irq_arr[0].vector);
3459}
3460
3461static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3462{
3463 struct cnic_local *cp = dev->cnic_priv;
3464 struct cnic_eth_dev *ethdev = cp->ethdev;
3465 u32 cid_addr, tx_cid, sb_id;
3466 u32 val, offset0, offset1, offset2, offset3;
3467 int i;
3468 struct tx_bd *txbd;
3469 dma_addr_t buf_map;
3470 struct status_block *s_blk = cp->status_blk;
3471
3472 sb_id = cp->status_blk_num;
3473 tx_cid = 20;
3474 cnic_init_context(dev, tx_cid);
3475 cnic_init_context(dev, tx_cid + 1);
3476 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3477 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3478 struct status_block_msix *sblk = cp->status_blk;
3479
3480 tx_cid = TX_TSS_CID + sb_id - 1;
3481 cnic_init_context(dev, tx_cid);
3482 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3483 (TX_TSS_CID << 7));
3484 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3485 }
3486 cp->tx_cons = *cp->tx_cons_ptr;
3487
3488 cid_addr = GET_CID_ADDR(tx_cid);
3489 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3490 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3491
3492 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3493 cnic_ctx_wr(dev, cid_addr2, i, 0);
3494
3495 offset0 = BNX2_L2CTX_TYPE_XI;
3496 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3497 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3498 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3499 } else {
3500 offset0 = BNX2_L2CTX_TYPE;
3501 offset1 = BNX2_L2CTX_CMD_TYPE;
3502 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3503 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3504 }
3505 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3506 cnic_ctx_wr(dev, cid_addr, offset0, val);
3507
3508 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3509 cnic_ctx_wr(dev, cid_addr, offset1, val);
3510
3511 txbd = (struct tx_bd *) cp->l2_ring;
3512
3513 buf_map = cp->l2_buf_map;
3514 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3515 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3516 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3517 }
3518 val = (u64) cp->l2_ring_map >> 32;
3519 cnic_ctx_wr(dev, cid_addr, offset2, val);
3520 txbd->tx_bd_haddr_hi = val;
3521
3522 val = (u64) cp->l2_ring_map & 0xffffffff;
3523 cnic_ctx_wr(dev, cid_addr, offset3, val);
3524 txbd->tx_bd_haddr_lo = val;
3525}
3526
3527static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3528{
3529 struct cnic_local *cp = dev->cnic_priv;
3530 struct cnic_eth_dev *ethdev = cp->ethdev;
3531 u32 cid_addr, sb_id, val, coal_reg, coal_val;
3532 int i;
3533 struct rx_bd *rxbd;
3534 struct status_block *s_blk = cp->status_blk;
3535
3536 sb_id = cp->status_blk_num;
3537 cnic_init_context(dev, 2);
3538 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3539 coal_reg = BNX2_HC_COMMAND;
3540 coal_val = CNIC_RD(dev, coal_reg);
3541 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3542 struct status_block_msix *sblk = cp->status_blk;
3543
3544 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3545 coal_reg = BNX2_HC_COALESCE_NOW;
3546 coal_val = 1 << (11 + sb_id);
3547 }
3548 i = 0;
3549 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3550 CNIC_WR(dev, coal_reg, coal_val);
3551 udelay(10);
3552 i++;
3553 barrier();
3554 }
3555 cp->rx_cons = *cp->rx_cons_ptr;
3556
3557 cid_addr = GET_CID_ADDR(2);
3558 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3559 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3560 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3561
3562 if (sb_id == 0)
d0549382 3563 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
a4636960 3564 else
d0549382 3565 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
a4636960
MC		 3566 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3567
3568 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
3569 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3570 dma_addr_t buf_map;
3571 int n = (i % cp->l2_rx_ring_size) + 1;
3572
3573 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3574 rxbd->rx_bd_len = cp->l2_single_buf_size;
3575 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3576 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3577 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3578 }
3579 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3580 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3581 rxbd->rx_bd_haddr_hi = val;
3582
3583 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3584 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3585 rxbd->rx_bd_haddr_lo = val;
3586
3587 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3588 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3589}
3590
3591static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3592{
3593 struct kwqe *wqes[1], l2kwqe;
3594
3595 memset(&l2kwqe, 0, sizeof(l2kwqe));
3596 wqes[0] = &l2kwqe;
3597 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3598 (L2_KWQE_OPCODE_VALUE_FLUSH <<
3599 KWQE_OPCODE_SHIFT) | 2;
3600 dev->submit_kwqes(dev, wqes, 1);
3601}
3602
3603static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3604{
3605 struct cnic_local *cp = dev->cnic_priv;
3606 u32 val;
3607
3608 val = cp->func << 2;
3609
3610 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3611
3612 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3613 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3614 dev->mac_addr[0] = (u8) (val >> 8);
3615 dev->mac_addr[1] = (u8) val;
3616
3617 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3618
3619 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3620 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3621 dev->mac_addr[2] = (u8) (val >> 24);
3622 dev->mac_addr[3] = (u8) (val >> 16);
3623 dev->mac_addr[4] = (u8) (val >> 8);
3624 dev->mac_addr[5] = (u8) val;
3625
3626 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3627
3628 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3629 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3630 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3631
3632 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3633 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3634 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3635}
3636
3637static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3638{
3639 struct cnic_local *cp = dev->cnic_priv;
3640 struct cnic_eth_dev *ethdev = cp->ethdev;
3641 struct status_block *sblk = cp->status_blk;
3642 u32 val;
3643 int err;
3644
3645 cnic_set_bnx2_mac(dev);
3646
3647 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3648 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3649 if (BCM_PAGE_BITS > 12)
3650 val |= (12 - 8) << 4;
3651 else
3652 val |= (BCM_PAGE_BITS - 8) << 4;
3653
3654 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3655
3656 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3657 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3658 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3659
3660 err = cnic_setup_5709_context(dev, 1);
3661 if (err)
3662 return err;
3663
3664 cnic_init_context(dev, KWQ_CID);
3665 cnic_init_context(dev, KCQ_CID);
3666
3667 cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
3668 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3669
3670 cp->max_kwq_idx = MAX_KWQ_IDX;
3671 cp->kwq_prod_idx = 0;
3672 cp->kwq_con_idx = 0;
3673 cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
3674
3675 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3676 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3677 else
3678 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3679
3680 /* Initialize the kernel work queue context. */
3681 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3682 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3683 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
3684
3685 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
3686 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3687
3688 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
3689 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3690
3691 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
3692 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3693
3694 val = (u32) cp->kwq_info.pgtbl_map;
3695 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3696
3697 cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3698 cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
3699
3700 cp->kcq_prod_idx = 0;
3701
3702 /* Initialize the kernel complete queue context. */
3703 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3704 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3705 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
3706
3707 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
3708 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3709
3710 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
3711 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3712
3713 val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
3714 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3715
3716 val = (u32) cp->kcq_info.pgtbl_map;
3717 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3718
3719 cp->int_num = 0;
3720 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3721 u32 sb_id = cp->status_blk_num;
d0549382 3722 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
a4636960
MC		 3723
3724 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
3725 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3726 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3727 }
3728
3729 /* Enable Commnad Scheduler notification when we write to the
3730 * host producer index of the kernel contexts. */
3731 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
3732
3733 /* Enable Command Scheduler notification when we write to either
3734 * the Send Queue or Receive Queue producer indexes of the kernel
3735 * bypass contexts. */
3736 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
3737 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
3738
3739 /* Notify COM when the driver post an application buffer. */
3740 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
3741
3742 /* Set the CP and COM doorbells. These two processors polls the
3743 * doorbell for a non zero value before running. This must be done
3744 * after setting up the kernel queue contexts. */
3745 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
3746 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
3747
3748 cnic_init_bnx2_tx_ring(dev);
3749 cnic_init_bnx2_rx_ring(dev);
3750
3751 err = cnic_init_bnx2_irq(dev);
3752 if (err) {
3753 printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
3754 dev->netdev->name);
3755 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
3756 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
3757 return err;
3758 }
3759
3760 return 0;
3761}
3762
71034ba8
MC		 3763static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
3764{
3765 struct cnic_local *cp = dev->cnic_priv;
3766 struct cnic_eth_dev *ethdev = cp->ethdev;
3767 u32 start_offset = ethdev->ctx_tbl_offset;
3768 int i;
3769
3770 for (i = 0; i < cp->ctx_blks; i++) {
3771 struct cnic_ctx *ctx = &cp->ctx_arr[i];
3772 dma_addr_t map = ctx->mapping;
3773
3774 if (cp->ctx_align) {
3775 unsigned long mask = cp->ctx_align - 1;
3776
3777 map = (map + mask) & ~mask;
3778 }
3779
3780 cnic_ctx_tbl_wr(dev, start_offset + i, map);
3781 }
3782}
3783
3784static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
3785{
3786 struct cnic_local *cp = dev->cnic_priv;
3787 struct cnic_eth_dev *ethdev = cp->ethdev;
3788 int err = 0;
3789
164165da 3790 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
71034ba8
MC		 3791 (unsigned long) dev);
3792 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3793 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3794 "cnic", dev);
3795 if (err)
3796 tasklet_disable(&cp->cnic_irq_task);
3797 }
3798 return err;
3799}
3800
3801static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
3802{
3803 struct cnic_local *cp = dev->cnic_priv;
3804 u8 sb_id = cp->status_blk_num;
3805 int port = CNIC_PORT(cp);
3806
3807 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
3808 CSTORM_SB_HC_TIMEOUT_C_OFFSET(port, sb_id,
3809 HC_INDEX_C_ISCSI_EQ_CONS),
3810 64 / 12);
3811 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
3812 CSTORM_SB_HC_DISABLE_C_OFFSET(port, sb_id,
3813 HC_INDEX_C_ISCSI_EQ_CONS), 0);
3814}
3815
3816static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
3817{
3818}
3819
3820static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev)
3821{
3822 struct cnic_local *cp = dev->cnic_priv;
3823 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) cp->l2_ring;
3824 struct eth_context *context;
3825 struct regpair context_addr;
3826 dma_addr_t buf_map;
3827 int func = CNIC_FUNC(cp);
3828 int port = CNIC_PORT(cp);
3829 int i;
3830 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3831 u32 val;
3832
3833 memset(txbd, 0, BCM_PAGE_SIZE);
3834
3835 buf_map = cp->l2_buf_map;
3836 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
3837 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
3838 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
3839
3840 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3841 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3842 reg_bd->addr_hi = start_bd->addr_hi;
3843 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
3844 start_bd->nbytes = cpu_to_le16(0x10);
3845 start_bd->nbd = cpu_to_le16(3);
3846 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3847 start_bd->general_data = (UNICAST_ADDRESS <<
3848 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
3849 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
3850
3851 }
3852 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 1, &context_addr);
3853
3854 val = (u64) cp->l2_ring_map >> 32;
3855 txbd->next_bd.addr_hi = cpu_to_le32(val);
3856
3857 context->xstorm_st_context.tx_bd_page_base_hi = val;
3858
3859 val = (u64) cp->l2_ring_map & 0xffffffff;
3860 txbd->next_bd.addr_lo = cpu_to_le32(val);
3861
3862 context->xstorm_st_context.tx_bd_page_base_lo = val;
3863
3864 context->cstorm_st_context.sb_index_number =
3865 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS;
3866 context->cstorm_st_context.status_block_id = BNX2X_DEF_SB_ID;
3867
3868 context->xstorm_st_context.statistics_data = (cli |
3869 XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE);
3870
3871 context->xstorm_ag_context.cdu_reserved =
3872 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3873 CDU_REGION_NUMBER_XCM_AG,
3874 ETH_CONNECTION_TYPE);
3875
3876 /* reset xstorm per client statistics */
3877 val = BAR_XSTRORM_INTMEM +
3878 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3879 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
3880 CNIC_WR(dev, val + i * 4, 0);
3881
3882 cp->tx_cons_ptr =
3883 &cp->bnx2x_def_status_blk->c_def_status_block.index_values[
3884 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS];
3885}
3886
3887static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev)
3888{
3889 struct cnic_local *cp = dev->cnic_priv;
3890 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (cp->l2_ring +
3891 BCM_PAGE_SIZE);
3892 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
3893 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
3894 struct eth_context *context;
3895 struct regpair context_addr;
3896 int i;
3897 int port = CNIC_PORT(cp);
3898 int func = CNIC_FUNC(cp);
3899 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3900 u32 val;
3901 struct tstorm_eth_client_config tstorm_client = {0};
3902
3903 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
3904 dma_addr_t buf_map;
3905 int n = (i % cp->l2_rx_ring_size) + 1;
3906
3907 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3908 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3909 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3910 }
3911 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 0, &context_addr);
3912
3913 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3914 rxbd->addr_hi = cpu_to_le32(val);
3915
3916 context->ustorm_st_context.common.bd_page_base_hi = val;
3917
3918 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3919 rxbd->addr_lo = cpu_to_le32(val);
3920
3921 context->ustorm_st_context.common.bd_page_base_lo = val;
3922
3923 context->ustorm_st_context.common.sb_index_numbers =
3924 BNX2X_ISCSI_RX_SB_INDEX_NUM;
3925 context->ustorm_st_context.common.clientId = cli;
3926 context->ustorm_st_context.common.status_block_id = BNX2X_DEF_SB_ID;
3927 context->ustorm_st_context.common.flags =
3928 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS;
3929 context->ustorm_st_context.common.statistics_counter_id = cli;
3930 context->ustorm_st_context.common.mc_alignment_log_size = 0;
3931 context->ustorm_st_context.common.bd_buff_size =
3932 cp->l2_single_buf_size;
3933
3934 context->ustorm_ag_context.cdu_usage =
3935 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3936 CDU_REGION_NUMBER_UCM_AG,
3937 ETH_CONNECTION_TYPE);
3938
3939 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
3940 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
3941 rxcqe->addr_hi = cpu_to_le32(val);
3942
3943 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3944 USTORM_CQE_PAGE_BASE_OFFSET(port, cli) + 4, val);
3945
3946 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3947 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli) + 4, val);
3948
3949 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
3950 rxcqe->addr_lo = cpu_to_le32(val);
3951
3952 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3953 USTORM_CQE_PAGE_BASE_OFFSET(port, cli), val);
3954
3955 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3956 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli), val);
3957
3958 /* client tstorm info */
3959 tstorm_client.mtu = cp->l2_single_buf_size - 14;
3960 tstorm_client.config_flags =
3961 (TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE |
3962 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE);
3963 tstorm_client.statistics_counter_id = cli;
3964
3965 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
3966 TSTORM_CLIENT_CONFIG_OFFSET(port, cli),
3967 ((u32 *)&tstorm_client)[0]);
3968 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
3969 TSTORM_CLIENT_CONFIG_OFFSET(port, cli) + 4,
3970 ((u32 *)&tstorm_client)[1]);
3971
3972 /* reset tstorm per client statistics */
3973 val = BAR_TSTRORM_INTMEM +
3974 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3975 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
3976 CNIC_WR(dev, val + i * 4, 0);
3977
3978 /* reset ustorm per client statistics */
3979 val = BAR_USTRORM_INTMEM +
3980 USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3981 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
3982 CNIC_WR(dev, val + i * 4, 0);
3983
3984 cp->rx_cons_ptr =
3985 &cp->bnx2x_def_status_blk->u_def_status_block.index_values[
3986 HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS];
3987}
3988
3989static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
3990{
3991 struct cnic_local *cp = dev->cnic_priv;
3992 u32 base, addr, val;
3993 int port = CNIC_PORT(cp);
3994
3995 dev->max_iscsi_conn = 0;
3996 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
3997 if (base < 0xa0000 || base >= 0xc0000)
3998 return;
3999
4000 val = BNX2X_SHMEM_ADDR(base,
4001 dev_info.port_hw_config[port].iscsi_mac_upper);
4002
4003 dev->mac_addr[0] = (u8) (val >> 8);
4004 dev->mac_addr[1] = (u8) val;
4005
4006 val = BNX2X_SHMEM_ADDR(base,
4007 dev_info.port_hw_config[port].iscsi_mac_lower);
4008
4009 dev->mac_addr[2] = (u8) (val >> 24);
4010 dev->mac_addr[3] = (u8) (val >> 16);
4011 dev->mac_addr[4] = (u8) (val >> 8);
4012 dev->mac_addr[5] = (u8) val;
4013
4014 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4015 val = CNIC_RD(dev, addr);
4016
4017 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4018 u16 val16;
4019
4020 addr = BNX2X_SHMEM_ADDR(base,
4021 drv_lic_key[port].max_iscsi_init_conn);
4022 val16 = CNIC_RD16(dev, addr);
4023
4024 if (val16)
4025 val16 ^= 0x1e1e;
4026 dev->max_iscsi_conn = val16;
4027 }
4028 if (BNX2X_CHIP_IS_E1H(cp->chip_id)) {
4029 int func = CNIC_FUNC(cp);
4030
4031 addr = BNX2X_SHMEM_ADDR(base,
4032 mf_cfg.func_mf_config[func].e1hov_tag);
4033 val = CNIC_RD(dev, addr);
4034 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4035 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4036 addr = BNX2X_SHMEM_ADDR(base,
4037 mf_cfg.func_mf_config[func].config);
4038 val = CNIC_RD(dev, addr);
4039 val &= FUNC_MF_CFG_PROTOCOL_MASK;
4040 if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4041 dev->max_iscsi_conn = 0;
4042 }
4043 }
4044}
4045
4046static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4047{
4048 struct cnic_local *cp = dev->cnic_priv;
4049 int func = CNIC_FUNC(cp), ret, i;
4050 int port = CNIC_PORT(cp);
4051 u16 eq_idx;
4052 u8 sb_id = cp->status_blk_num;
4053
4054 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4055 BNX2X_ISCSI_START_CID);
4056
4057 if (ret)
4058 return -ENOMEM;
4059
4060 cp->kcq_io_addr = BAR_CSTRORM_INTMEM +
4061 CSTORM_ISCSI_EQ_PROD_OFFSET(func, 0);
4062 cp->kcq_prod_idx = 0;
4063
4064 cnic_get_bnx2x_iscsi_info(dev);
4065
4066 /* Only 1 EQ */
4067 CNIC_WR16(dev, cp->kcq_io_addr, MAX_KCQ_IDX);
4068 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4069 CSTORM_ISCSI_EQ_CONS_OFFSET(func, 0), 0);
4070 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4071 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0),
4072 cp->kcq_info.pg_map_arr[1] & 0xffffffff);
4073 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4074 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0) + 4,
4075 (u64) cp->kcq_info.pg_map_arr[1] >> 32);
4076 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4077 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0),
4078 cp->kcq_info.pg_map_arr[0] & 0xffffffff);
4079 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4080 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0) + 4,
4081 (u64) cp->kcq_info.pg_map_arr[0] >> 32);
4082 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4083 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func, 0), 1);
4084 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4085 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func, 0), cp->status_blk_num);
4086 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4087 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func, 0),
4088 HC_INDEX_C_ISCSI_EQ_CONS);
4089
4090 for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4091 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4092 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i),
4093 cp->conn_buf_info.pgtbl[2 * i]);
4094 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4095 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i) + 4,
4096 cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4097 }
4098
4099 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4100 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func),
4101 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4102 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4103 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func) + 4,
4104 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4105
4106 cnic_setup_bnx2x_context(dev);
4107
4108 eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM +
4109 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4110 offsetof(struct cstorm_status_block_c,
4111 index_values[HC_INDEX_C_ISCSI_EQ_CONS]));
4112 if (eq_idx != 0) {
4113 printk(KERN_ERR PFX "%s: EQ cons index %x != 0\n",
4114 dev->netdev->name, eq_idx);
4115 return -EBUSY;
4116 }
4117 ret = cnic_init_bnx2x_irq(dev);
4118 if (ret)
4119 return ret;
4120
4121 cnic_init_bnx2x_tx_ring(dev);
4122 cnic_init_bnx2x_rx_ring(dev);
4123
4124 return 0;
4125}
4126
86b53606
MC		 4127static void cnic_init_rings(struct cnic_dev *dev)
4128{
4129 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4130 cnic_init_bnx2_tx_ring(dev);
4131 cnic_init_bnx2_rx_ring(dev);
71034ba8
MC		 4132 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4133 struct cnic_local *cp = dev->cnic_priv;
71034ba8
MC		 4134 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4135 union l5cm_specific_data l5_data;
4136 struct ustorm_eth_rx_producers rx_prods = {0};
c7596b79 4137 u32 off, i;
71034ba8
MC		 4138
4139 rx_prods.bd_prod = 0;
4140 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4141 barrier();
4142
c7596b79 4143 off = BAR_USTRORM_INTMEM +
71034ba8
MC		 4144 USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp), cli);
4145
4146 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
c7596b79 4147 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
71034ba8
MC		 4148
4149 cnic_init_bnx2x_tx_ring(dev);
4150 cnic_init_bnx2x_rx_ring(dev);
4151
4152 l5_data.phy_address.lo = cli;
4153 l5_data.phy_address.hi = 0;
4154 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4155 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4156 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1);
86b53606
MC		 4157 }
4158}
4159
4160static void cnic_shutdown_rings(struct cnic_dev *dev)
4161{
4162 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4163 cnic_shutdown_bnx2_rx_ring(dev);
71034ba8
MC		 4164 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4165 struct cnic_local *cp = dev->cnic_priv;
4166 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4167
4168 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0);
86b53606
MC		 4169 }
4170}
4171
a3059b12 4172static int cnic_register_netdev(struct cnic_dev *dev)
a4636960
MC		 4173{
4174 struct cnic_local *cp = dev->cnic_priv;
4175 struct cnic_eth_dev *ethdev = cp->ethdev;
4176 int err;
4177
a3059b12
MC		 4178 if (!ethdev)
4179 return -ENODEV;
4180
4181 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4182 return 0;
a4636960
MC		 4183
4184 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
a3059b12 4185 if (err)
a4636960
MC		 4186 printk(KERN_ERR PFX "%s: register_cnic failed\n",
4187 dev->netdev->name);
a3059b12
MC		 4188
4189 return err;
4190}
4191
4192static void cnic_unregister_netdev(struct cnic_dev *dev)
4193{
4194 struct cnic_local *cp = dev->cnic_priv;
4195 struct cnic_eth_dev *ethdev = cp->ethdev;
4196
4197 if (!ethdev)
4198 return;
4199
4200 ethdev->drv_unregister_cnic(dev->netdev);
4201}
4202
4203static int cnic_start_hw(struct cnic_dev *dev)
4204{
4205 struct cnic_local *cp = dev->cnic_priv;
4206 struct cnic_eth_dev *ethdev = cp->ethdev;
4207 int err;
4208
4209 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4210 return -EALREADY;
a4636960
MC		 4211
4212 dev->regview = ethdev->io_base;
4213 cp->chip_id = ethdev->chip_id;
4214 pci_dev_get(dev->pcidev);
4215 cp->func = PCI_FUNC(dev->pcidev->devfn);
4216 cp->status_blk = ethdev->irq_arr[0].status_blk;
4217 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4218
4219 err = cp->alloc_resc(dev);
4220 if (err) {
4221 printk(KERN_ERR PFX "%s: allocate resource failure\n",
4222 dev->netdev->name);
4223 goto err1;
4224 }
4225
4226 err = cp->start_hw(dev);
4227 if (err)
4228 goto err1;
4229
4230 err = cnic_cm_open(dev);
4231 if (err)
4232 goto err1;
4233
4234 set_bit(CNIC_F_CNIC_UP, &dev->flags);
4235
4236 cp->enable_int(dev);
4237
4238 return 0;
4239
4240err1:
a4636960
MC		 4241 cp->free_resc(dev);
4242 pci_dev_put(dev->pcidev);
a4636960
MC		 4243 return err;
4244}
4245
4246static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4247{
a4636960
MC		 4248 cnic_disable_bnx2_int_sync(dev);
4249
4250 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4251 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4252
4253 cnic_init_context(dev, KWQ_CID);
4254 cnic_init_context(dev, KCQ_CID);
4255
4256 cnic_setup_5709_context(dev, 0);
4257 cnic_free_irq(dev);
4258
a4636960
MC		 4259 cnic_free_resc(dev);
4260}
4261
71034ba8
MC		 4262
4263static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4264{
4265 struct cnic_local *cp = dev->cnic_priv;
4266 u8 sb_id = cp->status_blk_num;
4267 int port = CNIC_PORT(cp);
4268
4269 cnic_free_irq(dev);
4270 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4271 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4272 offsetof(struct cstorm_status_block_c,
4273 index_values[HC_INDEX_C_ISCSI_EQ_CONS]),
4274 0);
4275 cnic_free_resc(dev);
4276}
4277
a4636960
MC		 4278static void cnic_stop_hw(struct cnic_dev *dev)
4279{
4280 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4281 struct cnic_local *cp = dev->cnic_priv;
4282
4283 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4284 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4285 synchronize_rcu();
4286 cnic_cm_shutdown(dev);
4287 cp->stop_hw(dev);
4288 pci_dev_put(dev->pcidev);
4289 }
4290}
4291
4292static void cnic_free_dev(struct cnic_dev *dev)
4293{
4294 int i = 0;
4295
4296 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4297 msleep(100);
4298 i++;
4299 }
4300 if (atomic_read(&dev->ref_count) != 0)
4301 printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
4302 " to zero.\n", dev->netdev->name);
4303
4304 printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
4305 dev_put(dev->netdev);
4306 kfree(dev);
4307}
4308
4309static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4310 struct pci_dev *pdev)
4311{
4312 struct cnic_dev *cdev;
4313 struct cnic_local *cp;
4314 int alloc_size;
4315
4316 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4317
4318 cdev = kzalloc(alloc_size , GFP_KERNEL);
4319 if (cdev == NULL) {
4320 printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
4321 dev->name);
4322 return NULL;
4323 }
4324
4325 cdev->netdev = dev;
4326 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4327 cdev->register_device = cnic_register_device;
4328 cdev->unregister_device = cnic_unregister_device;
4329 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4330
4331 cp = cdev->cnic_priv;
4332 cp->dev = cdev;
4333 cp->uio_dev = -1;
4334 cp->l2_single_buf_size = 0x400;
4335 cp->l2_rx_ring_size = 3;
4336
4337 spin_lock_init(&cp->cnic_ulp_lock);
4338
4339 printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
4340
4341 return cdev;
4342}
4343
4344static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4345{
4346 struct pci_dev *pdev;
4347 struct cnic_dev *cdev;
4348 struct cnic_local *cp;
4349 struct cnic_eth_dev *ethdev = NULL;
e2ee3616 4350 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
a4636960 4351
e2ee3616 4352 probe = symbol_get(bnx2_cnic_probe);
a4636960
MC		 4353 if (probe) {
4354 ethdev = (*probe)(dev);
64c64608 4355 symbol_put(bnx2_cnic_probe);
a4636960
MC		 4356 }
4357 if (!ethdev)
4358 return NULL;
4359
4360 pdev = ethdev->pdev;
4361 if (!pdev)
4362 return NULL;
4363
4364 dev_hold(dev);
4365 pci_dev_get(pdev);
4366 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4367 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4368 u8 rev;
4369
4370 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4371 if (rev < 0x10) {
4372 pci_dev_put(pdev);
4373 goto cnic_err;
4374 }
4375 }
4376 pci_dev_put(pdev);
4377
4378 cdev = cnic_alloc_dev(dev, pdev);
4379 if (cdev == NULL)
4380 goto cnic_err;
4381
4382 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4383 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4384
4385 cp = cdev->cnic_priv;
4386 cp->ethdev = ethdev;
4387 cdev->pcidev = pdev;
4388
4389 cp->cnic_ops = &cnic_bnx2_ops;
4390 cp->start_hw = cnic_start_bnx2_hw;
4391 cp->stop_hw = cnic_stop_bnx2_hw;
4392 cp->setup_pgtbl = cnic_setup_page_tbl;
4393 cp->alloc_resc = cnic_alloc_bnx2_resc;
4394 cp->free_resc = cnic_free_resc;
4395 cp->start_cm = cnic_cm_init_bnx2_hw;
4396 cp->stop_cm = cnic_cm_stop_bnx2_hw;
4397 cp->enable_int = cnic_enable_bnx2_int;
4398 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4399 cp->close_conn = cnic_close_bnx2_conn;
4400 cp->next_idx = cnic_bnx2_next_idx;
4401 cp->hw_idx = cnic_bnx2_hw_idx;
4402 return cdev;
4403
4404cnic_err:
4405 dev_put(dev);
4406 return NULL;
4407}
4408
71034ba8
MC		 4409static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4410{
4411 struct pci_dev *pdev;
4412 struct cnic_dev *cdev;
4413 struct cnic_local *cp;
4414 struct cnic_eth_dev *ethdev = NULL;
4415 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4416
4417 probe = symbol_get(bnx2x_cnic_probe);
4418 if (probe) {
4419 ethdev = (*probe)(dev);
4420 symbol_put(bnx2x_cnic_probe);
4421 }
4422 if (!ethdev)
4423 return NULL;
4424
4425 pdev = ethdev->pdev;
4426 if (!pdev)
4427 return NULL;
4428
4429 dev_hold(dev);
4430 cdev = cnic_alloc_dev(dev, pdev);
4431 if (cdev == NULL) {
4432 dev_put(dev);
4433 return NULL;
4434 }
4435
4436 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4437 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4438
4439 cp = cdev->cnic_priv;
4440 cp->ethdev = ethdev;
4441 cdev->pcidev = pdev;
4442
4443 cp->cnic_ops = &cnic_bnx2x_ops;
4444 cp->start_hw = cnic_start_bnx2x_hw;
4445 cp->stop_hw = cnic_stop_bnx2x_hw;
4446 cp->setup_pgtbl = cnic_setup_page_tbl_le;
4447 cp->alloc_resc = cnic_alloc_bnx2x_resc;
4448 cp->free_resc = cnic_free_resc;
4449 cp->start_cm = cnic_cm_init_bnx2x_hw;
4450 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4451 cp->enable_int = cnic_enable_bnx2x_int;
4452 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4453 cp->ack_int = cnic_ack_bnx2x_msix;
4454 cp->close_conn = cnic_close_bnx2x_conn;
4455 cp->next_idx = cnic_bnx2x_next_idx;
4456 cp->hw_idx = cnic_bnx2x_hw_idx;
4457 return cdev;
4458}
4459
a4636960
MC		 4460static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4461{
4462 struct ethtool_drvinfo drvinfo;
4463 struct cnic_dev *cdev = NULL;
4464
4465 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4466 memset(&drvinfo, 0, sizeof(drvinfo));
4467 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4468
4469 if (!strcmp(drvinfo.driver, "bnx2"))
4470 cdev = init_bnx2_cnic(dev);
71034ba8
MC		 4471 if (!strcmp(drvinfo.driver, "bnx2x"))
4472 cdev = init_bnx2x_cnic(dev);
a4636960
MC		 4473 if (cdev) {
4474 write_lock(&cnic_dev_lock);
4475 list_add(&cdev->list, &cnic_dev_list);
4476 write_unlock(&cnic_dev_lock);
4477 }
4478 }
4479 return cdev;
4480}
4481
4482/**
4483 * netdev event handler
4484 */
4485static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4486 void *ptr)
4487{
4488 struct net_device *netdev = ptr;
4489 struct cnic_dev *dev;
4490 int if_type;
4491 int new_dev = 0;
4492
4493 dev = cnic_from_netdev(netdev);
4494
4495 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4496 /* Check for the hot-plug device */
4497 dev = is_cnic_dev(netdev);
4498 if (dev) {
4499 new_dev = 1;
4500 cnic_hold(dev);
4501 }
4502 }
4503 if (dev) {
4504 struct cnic_local *cp = dev->cnic_priv;
4505
4506 if (new_dev)
4507 cnic_ulp_init(dev);
4508 else if (event == NETDEV_UNREGISTER)
4509 cnic_ulp_exit(dev);
6053bbf7
MC		 4510
4511 if (event == NETDEV_UP) {
a3059b12
MC		 4512 if (cnic_register_netdev(dev) != 0) {
4513 cnic_put(dev);
4514 goto done;
4515 }
a4636960
MC		 4516 if (!cnic_start_hw(dev))
4517 cnic_ulp_start(dev);
a4636960
MC		 4518 }
4519
4520 rcu_read_lock();
4521 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4522 struct cnic_ulp_ops *ulp_ops;
4523 void *ctx;
4524
4525 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4526 if (!ulp_ops || !ulp_ops->indicate_netevent)
4527 continue;
4528
4529 ctx = cp->ulp_handle[if_type];
4530
4531 ulp_ops->indicate_netevent(ctx, event);
4532 }
4533 rcu_read_unlock();
4534
4535 if (event == NETDEV_GOING_DOWN) {
a4636960
MC		 4536 cnic_ulp_stop(dev);
4537 cnic_stop_hw(dev);
a3059b12 4538 cnic_unregister_netdev(dev);
a4636960
MC		 4539 } else if (event == NETDEV_UNREGISTER) {
4540 write_lock(&cnic_dev_lock);
4541 list_del_init(&dev->list);
4542 write_unlock(&cnic_dev_lock);
4543
4544 cnic_put(dev);
4545 cnic_free_dev(dev);
4546 goto done;
4547 }
4548 cnic_put(dev);
4549 }
4550done:
4551 return NOTIFY_DONE;
4552}
4553
4554static struct notifier_block cnic_netdev_notifier = {
4555 .notifier_call = cnic_netdev_event
4556};
4557
4558static void cnic_release(void)
4559{
4560 struct cnic_dev *dev;
4561
4562 while (!list_empty(&cnic_dev_list)) {
4563 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4564 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4565 cnic_ulp_stop(dev);
4566 cnic_stop_hw(dev);
4567 }
4568
4569 cnic_ulp_exit(dev);
a3059b12 4570 cnic_unregister_netdev(dev);
a4636960
MC		 4571 list_del_init(&dev->list);
4572 cnic_free_dev(dev);
4573 }
4574}
4575
4576static int __init cnic_init(void)
4577{
4578 int rc = 0;
4579
4580 printk(KERN_INFO "%s", version);
4581
4582 rc = register_netdevice_notifier(&cnic_netdev_notifier);
4583 if (rc) {
4584 cnic_release();
4585 return rc;
4586 }
4587
4588 return 0;
4589}
4590
4591static void __exit cnic_exit(void)
4592{
4593 unregister_netdevice_notifier(&cnic_netdev_notifier);
4594 cnic_release();
4595 return;
4596}
4597
4598module_init(cnic_init);
4599module_exit(cnic_exit);
Clone of davem's net-next-2.6 tree