]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/benet/be_main.c
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
be2net: get rid of be_get_stats()
[net-next-2.6.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94 1/*
294aedcf 2 * Copyright (C) 2005 - 2010 ServerEngines
6b7c5b94
SP		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
ba343c77 29static unsigned int num_vfs;
6b7c5b94 30module_param(rx_frag_size, uint, S_IRUGO);
ba343c77 31module_param(num_vfs, uint, S_IRUGO);
6b7c5b94 32MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
ba343c77 33MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
6b7c5b94 34
6b7c5b94 35static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 36 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 37 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 38 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
39 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
6b7c5b94
SP		 40 { 0 }
41};
42MODULE_DEVICE_TABLE(pci, be_dev_ids);
7c185276
AK		 43/* UE Status Low CSR */
44static char *ue_status_low_desc[] = {
45 "CEV",
46 "CTX",
47 "DBUF",
48 "ERX",
49 "Host",
50 "MPU",
51 "NDMA",
52 "PTC ",
53 "RDMA ",
54 "RXF ",
55 "RXIPS ",
56 "RXULP0 ",
57 "RXULP1 ",
58 "RXULP2 ",
59 "TIM ",
60 "TPOST ",
61 "TPRE ",
62 "TXIPS ",
63 "TXULP0 ",
64 "TXULP1 ",
65 "UC ",
66 "WDMA ",
67 "TXULP2 ",
68 "HOST1 ",
69 "P0_OB_LINK ",
70 "P1_OB_LINK ",
71 "HOST_GPIO ",
72 "MBOX ",
73 "AXGMAC0",
74 "AXGMAC1",
75 "JTAG",
76 "MPU_INTPEND"
77};
78/* UE Status High CSR */
79static char *ue_status_hi_desc[] = {
80 "LPCMEMHOST",
81 "MGMT_MAC",
82 "PCS0ONLINE",
83 "MPU_IRAM",
84 "PCS1ONLINE",
85 "PCTL0",
86 "PCTL1",
87 "PMEM",
88 "RR",
89 "TXPB",
90 "RXPP",
91 "XAUI",
92 "TXP",
93 "ARM",
94 "IPC",
95 "HOST2",
96 "HOST3",
97 "HOST4",
98 "HOST5",
99 "HOST6",
100 "HOST7",
101 "HOST8",
102 "HOST9",
103 "NETC"
104 "Unknown",
105 "Unknown",
106 "Unknown",
107 "Unknown",
108 "Unknown",
109 "Unknown",
110 "Unknown",
111 "Unknown"
112};
6b7c5b94
SP		 113
114static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
115{
116 struct be_dma_mem *mem = &q->dma_mem;
117 if (mem->va)
118 pci_free_consistent(adapter->pdev, mem->size,
119 mem->va, mem->dma);
120}
121
122static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
123 u16 len, u16 entry_size)
124{
125 struct be_dma_mem *mem = &q->dma_mem;
126
127 memset(q, 0, sizeof(*q));
128 q->len = len;
129 q->entry_size = entry_size;
130 mem->size = len * entry_size;
131 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
132 if (!mem->va)
133 return -1;
134 memset(mem->va, 0, mem->size);
135 return 0;
136}
137
8788fdc2 138static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 139{
8788fdc2 140 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 141 u32 reg = ioread32(addr);
142 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 143
cf588477
SP		 144 if (adapter->eeh_err)
145 return;
146
5f0b849e 147 if (!enabled && enable)
6b7c5b94 148 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 149 else if (enabled && !enable)
6b7c5b94 150 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 151 else
6b7c5b94 152 return;
5f0b849e 153
6b7c5b94
SP		 154 iowrite32(reg, addr);
155}
156
8788fdc2 157static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 158{
159 u32 val = 0;
160 val |= qid & DB_RQ_RING_ID_MASK;
161 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
f3eb62d2
SP		 162
163 wmb();
8788fdc2 164 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 165}
166
8788fdc2 167static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 168{
169 u32 val = 0;
170 val |= qid & DB_TXULP_RING_ID_MASK;
171 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
f3eb62d2
SP		 172
173 wmb();
8788fdc2 174 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 175}
176
8788fdc2 177static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 178 bool arm, bool clear_int, u16 num_popped)
179{
180 u32 val = 0;
181 val |= qid & DB_EQ_RING_ID_MASK;
cf588477
SP		 182
183 if (adapter->eeh_err)
184 return;
185
6b7c5b94
SP		 186 if (arm)
187 val |= 1 << DB_EQ_REARM_SHIFT;
188 if (clear_int)
189 val |= 1 << DB_EQ_CLR_SHIFT;
190 val |= 1 << DB_EQ_EVNT_SHIFT;
191 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 192 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 193}
194
8788fdc2 195void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 196{
197 u32 val = 0;
198 val |= qid & DB_CQ_RING_ID_MASK;
cf588477
SP		 199
200 if (adapter->eeh_err)
201 return;
202
6b7c5b94
SP		 203 if (arm)
204 val |= 1 << DB_CQ_REARM_SHIFT;
205 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 206 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 207}
208
6b7c5b94
SP		 209static int be_mac_addr_set(struct net_device *netdev, void *p)
210{
211 struct be_adapter *adapter = netdev_priv(netdev);
212 struct sockaddr *addr = p;
213 int status = 0;
214
ca9e4988
AK		 215 if (!is_valid_ether_addr(addr->sa_data))
216 return -EADDRNOTAVAIL;
217
ba343c77
SB		 218 /* MAC addr configuration will be done in hardware for VFs
219 * by their corresponding PFs. Just copy to netdev addr here
220 */
221 if (!be_physfn(adapter))
222 goto netdev_addr;
223
a65027e4
SP		 224 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
225 if (status)
226 return status;
6b7c5b94 227
a65027e4
SP		 228 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
229 adapter->if_handle, &adapter->pmac_id);
ba343c77 230netdev_addr:
6b7c5b94
SP		 231 if (!status)
232 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
233
234 return status;
235}
236
b31c50a7 237void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 238{
239 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
240 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
241 struct be_port_rxf_stats *port_stats =
242 &rxf_stats->port[adapter->port_num];
78122a52 243 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 244 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94 245
91992e44
AK		 246 dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
247 dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
248 dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
249 dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
6b7c5b94
SP		 250
251 /* bad pkts received */
252 dev_stats->rx_errors = port_stats->rx_crc_errors +
253 port_stats->rx_alignment_symbol_errors +
254 port_stats->rx_in_range_errors +
68110868
SP		 255 port_stats->rx_out_range_errors +
256 port_stats->rx_frame_too_long +
257 port_stats->rx_dropped_too_small +
258 port_stats->rx_dropped_too_short +
259 port_stats->rx_dropped_header_too_small +
260 port_stats->rx_dropped_tcp_length +
261 port_stats->rx_dropped_runt +
262 port_stats->rx_tcp_checksum_errs +
263 port_stats->rx_ip_checksum_errs +
264 port_stats->rx_udp_checksum_errs;
265
266 /* no space in linux buffers: best possible approximation */
01ed30da
SP		 267 dev_stats->rx_dropped =
268 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
6b7c5b94
SP		 269
270 /* detailed rx errors */
271 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 272 port_stats->rx_out_range_errors +
273 port_stats->rx_frame_too_long;
274
6b7c5b94
SP		 275 /* receive ring buffer overflow */
276 dev_stats->rx_over_errors = 0;
68110868 277
6b7c5b94
SP		 278 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
279
280 /* frame alignment errors */
281 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 282
6b7c5b94
SP		 283 /* receiver fifo overrun */
284 /* drops_no_pbuf is no per i/f, it's per BE card */
285 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
286 port_stats->rx_input_fifo_overflow +
287 rxf_stats->rx_drops_no_pbuf;
288 /* receiver missed packetd */
289 dev_stats->rx_missed_errors = 0;
68110868
SP		 290
291 /* packet transmit problems */
292 dev_stats->tx_errors = 0;
293
294 /* no space available in linux */
295 dev_stats->tx_dropped = 0;
296
c5b9b92e 297 dev_stats->multicast = port_stats->rx_multicast_frames;
68110868
SP		 298 dev_stats->collisions = 0;
299
6b7c5b94
SP		 300 /* detailed tx_errors */
301 dev_stats->tx_aborted_errors = 0;
302 dev_stats->tx_carrier_errors = 0;
303 dev_stats->tx_fifo_errors = 0;
304 dev_stats->tx_heartbeat_errors = 0;
305 dev_stats->tx_window_errors = 0;
306}
307
8788fdc2 308void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 309{
6b7c5b94
SP		 310 struct net_device *netdev = adapter->netdev;
311
6b7c5b94 312 /* If link came up or went down */
a8f447bd 313 if (adapter->link_up != link_up) {
0dffc83e 314 adapter->link_speed = -1;
a8f447bd 315 if (link_up) {
6b7c5b94
SP		 316 netif_start_queue(netdev);
317 netif_carrier_on(netdev);
318 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 319 } else {
320 netif_stop_queue(netdev);
321 netif_carrier_off(netdev);
322 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 323 }
a8f447bd 324 adapter->link_up = link_up;
6b7c5b94 325 }
6b7c5b94
SP		 326}
327
328/* Update the EQ delay n BE based on the RX frags consumed / sec */
329static void be_rx_eqd_update(struct be_adapter *adapter)
330{
6b7c5b94
SP		 331 struct be_eq_obj *rx_eq = &adapter->rx_eq;
332 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 333 ulong now = jiffies;
334 u32 eqd;
335
336 if (!rx_eq->enable_aic)
337 return;
338
339 /* Wrapped around */
340 if (time_before(now, stats->rx_fps_jiffies)) {
341 stats->rx_fps_jiffies = now;
342 return;
343 }
6b7c5b94
SP		 344
345 /* Update once a second */
4097f663 346 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 347 return;
348
349 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 350 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 351
4097f663 352 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 353 stats->be_prev_rx_frags = stats->be_rx_frags;
354 eqd = stats->be_rx_fps / 110000;
355 eqd = eqd << 3;
356 if (eqd > rx_eq->max_eqd)
357 eqd = rx_eq->max_eqd;
358 if (eqd < rx_eq->min_eqd)
359 eqd = rx_eq->min_eqd;
360 if (eqd < 10)
361 eqd = 0;
362 if (eqd != rx_eq->cur_eqd)
8788fdc2 363 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 364
365 rx_eq->cur_eqd = eqd;
366}
367
65f71b8b
SH		 368static u32 be_calc_rate(u64 bytes, unsigned long ticks)
369{
370 u64 rate = bytes;
371
372 do_div(rate, ticks / HZ);
373 rate <<= 3; /* bytes/sec -> bits/sec */
374 do_div(rate, 1000000ul); /* MB/Sec */
375
376 return rate;
377}
378
4097f663
SP		 379static void be_tx_rate_update(struct be_adapter *adapter)
380{
381 struct be_drvr_stats *stats = drvr_stats(adapter);
382 ulong now = jiffies;
383
384 /* Wrapped around? */
385 if (time_before(now, stats->be_tx_jiffies)) {
386 stats->be_tx_jiffies = now;
387 return;
388 }
389
390 /* Update tx rate once in two seconds */
391 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 392 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
393 - stats->be_tx_bytes_prev,
394 now - stats->be_tx_jiffies);
4097f663
SP		 395 stats->be_tx_jiffies = now;
396 stats->be_tx_bytes_prev = stats->be_tx_bytes;
397 }
398}
399
6b7c5b94 400static void be_tx_stats_update(struct be_adapter *adapter,
91992e44 401 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
6b7c5b94 402{
4097f663 403 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 404 stats->be_tx_reqs++;
405 stats->be_tx_wrbs += wrb_cnt;
406 stats->be_tx_bytes += copied;
91992e44 407 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
6b7c5b94
SP		 408 if (stopped)
409 stats->be_tx_stops++;
6b7c5b94
SP		 410}
411
412/* Determine number of WRB entries needed to xmit data in an skb */
413static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
414{
ebc8d2ab
DM		 415 int cnt = (skb->len > skb->data_len);
416
417 cnt += skb_shinfo(skb)->nr_frags;
418
6b7c5b94
SP		 419 /* to account for hdr wrb */
420 cnt++;
421 if (cnt & 1) {
422 /* add a dummy to make it an even num */
423 cnt++;
424 *dummy = true;
425 } else
426 *dummy = false;
427 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
428 return cnt;
429}
430
431static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
432{
433 wrb->frag_pa_hi = upper_32_bits(addr);
434 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
435 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
436}
437
438static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
439 bool vlan, u32 wrb_cnt, u32 len)
440{
441 memset(hdr, 0, sizeof(*hdr));
442
443 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
444
49e4b847 445 if (skb_is_gso(skb)) {
6b7c5b94
SP		 446 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
447 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
448 hdr, skb_shinfo(skb)->gso_size);
49e4b847
AK		 449 if (skb_is_gso_v6(skb))
450 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
6b7c5b94
SP		 451 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
452 if (is_tcp_pkt(skb))
453 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
454 else if (is_udp_pkt(skb))
455 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
456 }
457
458 if (vlan && vlan_tx_tag_present(skb)) {
459 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
460 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
461 hdr, vlan_tx_tag_get(skb));
462 }
463
464 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
465 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
466 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
467 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
468}
469
7101e111
SP		 470static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
471 bool unmap_single)
472{
473 dma_addr_t dma;
474
475 be_dws_le_to_cpu(wrb, sizeof(*wrb));
476
477 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
b681ee77 478 if (wrb->frag_len) {
7101e111
SP		 479 if (unmap_single)
480 pci_unmap_single(pdev, dma, wrb->frag_len,
481 PCI_DMA_TODEVICE);
482 else
483 pci_unmap_page(pdev, dma, wrb->frag_len,
484 PCI_DMA_TODEVICE);
485 }
486}
6b7c5b94
SP		 487
488static int make_tx_wrbs(struct be_adapter *adapter,
489 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
490{
7101e111
SP		 491 dma_addr_t busaddr;
492 int i, copied = 0;
6b7c5b94
SP		 493 struct pci_dev *pdev = adapter->pdev;
494 struct sk_buff *first_skb = skb;
495 struct be_queue_info *txq = &adapter->tx_obj.q;
496 struct be_eth_wrb *wrb;
497 struct be_eth_hdr_wrb *hdr;
7101e111
SP		 498 bool map_single = false;
499 u16 map_head;
6b7c5b94 500
6b7c5b94
SP		 501 hdr = queue_head_node(txq);
502 queue_head_inc(txq);
7101e111 503 map_head = txq->head;
6b7c5b94 504
ebc8d2ab 505 if (skb->len > skb->data_len) {
e743d313 506 int len = skb_headlen(skb);
a73b796e
AD		 507 busaddr = pci_map_single(pdev, skb->data, len,
508 PCI_DMA_TODEVICE);
7101e111
SP		 509 if (pci_dma_mapping_error(pdev, busaddr))
510 goto dma_err;
511 map_single = true;
ebc8d2ab
DM		 512 wrb = queue_head_node(txq);
513 wrb_fill(wrb, busaddr, len);
514 be_dws_cpu_to_le(wrb, sizeof(*wrb));
515 queue_head_inc(txq);
516 copied += len;
517 }
6b7c5b94 518
ebc8d2ab
DM		 519 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
520 struct skb_frag_struct *frag =
521 &skb_shinfo(skb)->frags[i];
a73b796e
AD		 522 busaddr = pci_map_page(pdev, frag->page,
523 frag->page_offset,
524 frag->size, PCI_DMA_TODEVICE);
7101e111
SP		 525 if (pci_dma_mapping_error(pdev, busaddr))
526 goto dma_err;
ebc8d2ab
DM		 527 wrb = queue_head_node(txq);
528 wrb_fill(wrb, busaddr, frag->size);
529 be_dws_cpu_to_le(wrb, sizeof(*wrb));
530 queue_head_inc(txq);
531 copied += frag->size;
6b7c5b94
SP		 532 }
533
534 if (dummy_wrb) {
535 wrb = queue_head_node(txq);
536 wrb_fill(wrb, 0, 0);
537 be_dws_cpu_to_le(wrb, sizeof(*wrb));
538 queue_head_inc(txq);
539 }
540
541 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
542 wrb_cnt, copied);
543 be_dws_cpu_to_le(hdr, sizeof(*hdr));
544
545 return copied;
7101e111
SP		 546dma_err:
547 txq->head = map_head;
548 while (copied) {
549 wrb = queue_head_node(txq);
550 unmap_tx_frag(pdev, wrb, map_single);
551 map_single = false;
552 copied -= wrb->frag_len;
553 queue_head_inc(txq);
554 }
555 return 0;
6b7c5b94
SP		 556}
557
61357325 558static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 559 struct net_device *netdev)
6b7c5b94
SP		 560{
561 struct be_adapter *adapter = netdev_priv(netdev);
562 struct be_tx_obj *tx_obj = &adapter->tx_obj;
563 struct be_queue_info *txq = &tx_obj->q;
564 u32 wrb_cnt = 0, copied = 0;
565 u32 start = txq->head;
566 bool dummy_wrb, stopped = false;
567
568 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
569
570 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 571 if (copied) {
572 /* record the sent skb in the sent_skb table */
573 BUG_ON(tx_obj->sent_skb_list[start]);
574 tx_obj->sent_skb_list[start] = skb;
575
576 /* Ensure txq has space for the next skb; Else stop the queue
577 * *BEFORE* ringing the tx doorbell, so that we serialze the
578 * tx compls of the current transmit which'll wake up the queue
579 */
7101e111 580 atomic_add(wrb_cnt, &txq->used);
c190e3c8
AK		 581 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
582 txq->len) {
583 netif_stop_queue(netdev);
584 stopped = true;
585 }
6b7c5b94 586
c190e3c8 587 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 588
91992e44
AK		 589 be_tx_stats_update(adapter, wrb_cnt, copied,
590 skb_shinfo(skb)->gso_segs, stopped);
c190e3c8
AK		 591 } else {
592 txq->head = start;
593 dev_kfree_skb_any(skb);
6b7c5b94 594 }
6b7c5b94
SP		 595 return NETDEV_TX_OK;
596}
597
598static int be_change_mtu(struct net_device *netdev, int new_mtu)
599{
600 struct be_adapter *adapter = netdev_priv(netdev);
601 if (new_mtu < BE_MIN_MTU ||
34a89b8c
AK		 602 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
603 (ETH_HLEN + ETH_FCS_LEN))) {
6b7c5b94
SP		 604 dev_info(&adapter->pdev->dev,
605 "MTU must be between %d and %d bytes\n",
34a89b8c
AK		 606 BE_MIN_MTU,
607 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
6b7c5b94
SP		 608 return -EINVAL;
609 }
610 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
611 netdev->mtu, new_mtu);
612 netdev->mtu = new_mtu;
613 return 0;
614}
615
616/*
82903e4b
AK		 617 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
618 * If the user configures more, place BE in vlan promiscuous mode.
6b7c5b94 619 */
1da87b7f 620static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
6b7c5b94 621{
6b7c5b94
SP		 622 u16 vtag[BE_NUM_VLANS_SUPPORTED];
623 u16 ntags = 0, i;
82903e4b 624 int status = 0;
1da87b7f
AK		 625 u32 if_handle;
626
627 if (vf) {
628 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
629 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
630 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
631 }
6b7c5b94 632
82903e4b 633 if (adapter->vlans_added <= adapter->max_vlans) {
6b7c5b94
SP		 634 /* Construct VLAN Table to give to HW */
635 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
636 if (adapter->vlan_tag[i]) {
637 vtag[ntags] = cpu_to_le16(i);
638 ntags++;
639 }
640 }
b31c50a7
SP		 641 status = be_cmd_vlan_config(adapter, adapter->if_handle,
642 vtag, ntags, 1, 0);
6b7c5b94 643 } else {
b31c50a7
SP		 644 status = be_cmd_vlan_config(adapter, adapter->if_handle,
645 NULL, 0, 1, 1);
6b7c5b94 646 }
1da87b7f 647
b31c50a7 648 return status;
6b7c5b94
SP		 649}
650
651static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
652{
653 struct be_adapter *adapter = netdev_priv(netdev);
654 struct be_eq_obj *rx_eq = &adapter->rx_eq;
655 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 656
8788fdc2
SP		 657 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
658 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 659 adapter->vlan_grp = grp;
8788fdc2
SP		 660 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
661 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 662}
663
664static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
665{
666 struct be_adapter *adapter = netdev_priv(netdev);
667
1da87b7f 668 adapter->vlans_added++;
ba343c77
SB		 669 if (!be_physfn(adapter))
670 return;
671
6b7c5b94 672 adapter->vlan_tag[vid] = 1;
82903e4b 673 if (adapter->vlans_added <= (adapter->max_vlans + 1))
1da87b7f 674 be_vid_config(adapter, false, 0);
6b7c5b94
SP		 675}
676
677static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
678{
679 struct be_adapter *adapter = netdev_priv(netdev);
680
1da87b7f
AK		 681 adapter->vlans_added--;
682 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
683
ba343c77
SB		 684 if (!be_physfn(adapter))
685 return;
686
6b7c5b94 687 adapter->vlan_tag[vid] = 0;
82903e4b 688 if (adapter->vlans_added <= adapter->max_vlans)
1da87b7f 689 be_vid_config(adapter, false, 0);
6b7c5b94
SP		 690}
691
24307eef 692static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 693{
694 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 695
24307eef 696 if (netdev->flags & IFF_PROMISC) {
8788fdc2 697 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 698 adapter->promiscuous = true;
699 goto done;
6b7c5b94
SP		 700 }
701
24307eef
SP		 702 /* BE was previously in promiscous mode; disable it */
703 if (adapter->promiscuous) {
704 adapter->promiscuous = false;
8788fdc2 705 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 706 }
707
e7b909a6 708 /* Enable multicast promisc if num configured exceeds what we support */
4cd24eaf
JP		 709 if (netdev->flags & IFF_ALLMULTI ||
710 netdev_mc_count(netdev) > BE_MAX_MC) {
0ddf477b 711 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
e7b909a6 712 &adapter->mc_cmd_mem);
24307eef 713 goto done;
6b7c5b94 714 }
6b7c5b94 715
0ddf477b 716 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
f31e50a8 717 &adapter->mc_cmd_mem);
24307eef
SP		 718done:
719 return;
6b7c5b94
SP		 720}
721
ba343c77
SB		 722static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
723{
724 struct be_adapter *adapter = netdev_priv(netdev);
725 int status;
726
727 if (!adapter->sriov_enabled)
728 return -EPERM;
729
730 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
731 return -EINVAL;
732
64600ea5
AK		 733 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
734 status = be_cmd_pmac_del(adapter,
735 adapter->vf_cfg[vf].vf_if_handle,
736 adapter->vf_cfg[vf].vf_pmac_id);
ba343c77 737
64600ea5
AK		 738 status = be_cmd_pmac_add(adapter, mac,
739 adapter->vf_cfg[vf].vf_if_handle,
740 &adapter->vf_cfg[vf].vf_pmac_id);
741
742 if (status)
ba343c77
SB		 743 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
744 mac, vf);
64600ea5
AK		 745 else
746 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
747
ba343c77
SB		 748 return status;
749}
750
64600ea5
AK		 751static int be_get_vf_config(struct net_device *netdev, int vf,
752 struct ifla_vf_info *vi)
753{
754 struct be_adapter *adapter = netdev_priv(netdev);
755
756 if (!adapter->sriov_enabled)
757 return -EPERM;
758
759 if (vf >= num_vfs)
760 return -EINVAL;
761
762 vi->vf = vf;
e1d18735 763 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
1da87b7f 764 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
64600ea5
AK		 765 vi->qos = 0;
766 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
767
768 return 0;
769}
770
1da87b7f
AK		 771static int be_set_vf_vlan(struct net_device *netdev,
772 int vf, u16 vlan, u8 qos)
773{
774 struct be_adapter *adapter = netdev_priv(netdev);
775 int status = 0;
776
777 if (!adapter->sriov_enabled)
778 return -EPERM;
779
780 if ((vf >= num_vfs) || (vlan > 4095))
781 return -EINVAL;
782
783 if (vlan) {
784 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
785 adapter->vlans_added++;
786 } else {
787 adapter->vf_cfg[vf].vf_vlan_tag = 0;
788 adapter->vlans_added--;
789 }
790
791 status = be_vid_config(adapter, true, vf);
792
793 if (status)
794 dev_info(&adapter->pdev->dev,
795 "VLAN %d config on VF %d failed\n", vlan, vf);
796 return status;
797}
798
e1d18735
AK		 799static int be_set_vf_tx_rate(struct net_device *netdev,
800 int vf, int rate)
801{
802 struct be_adapter *adapter = netdev_priv(netdev);
803 int status = 0;
804
805 if (!adapter->sriov_enabled)
806 return -EPERM;
807
808 if ((vf >= num_vfs) || (rate < 0))
809 return -EINVAL;
810
811 if (rate > 10000)
812 rate = 10000;
813
814 adapter->vf_cfg[vf].vf_tx_rate = rate;
815 status = be_cmd_set_qos(adapter, rate / 10, vf);
816
817 if (status)
818 dev_info(&adapter->pdev->dev,
819 "tx rate %d on VF %d failed\n", rate, vf);
820 return status;
821}
822
4097f663 823static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 824{
4097f663
SP		 825 struct be_drvr_stats *stats = drvr_stats(adapter);
826 ulong now = jiffies;
6b7c5b94 827
4097f663
SP		 828 /* Wrapped around */
829 if (time_before(now, stats->be_rx_jiffies)) {
830 stats->be_rx_jiffies = now;
831 return;
832 }
6b7c5b94
SP		 833
834 /* Update the rate once in two seconds */
4097f663 835 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 836 return;
837
65f71b8b
SH		 838 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
839 - stats->be_rx_bytes_prev,
840 now - stats->be_rx_jiffies);
4097f663 841 stats->be_rx_jiffies = now;
6b7c5b94
SP		 842 stats->be_rx_bytes_prev = stats->be_rx_bytes;
843}
844
4097f663
SP		 845static void be_rx_stats_update(struct be_adapter *adapter,
846 u32 pktsize, u16 numfrags)
847{
848 struct be_drvr_stats *stats = drvr_stats(adapter);
849
850 stats->be_rx_compl++;
851 stats->be_rx_frags += numfrags;
852 stats->be_rx_bytes += pktsize;
91992e44 853 stats->be_rx_pkts++;
4097f663
SP		 854}
855
728a9972
AK		 856static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
857{
858 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
859
860 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
861 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
862 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
863 if (ip_version) {
864 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
865 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
866 }
867 ipv6_chk = (ip_version && (tcpf || udpf));
868
869 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
870}
871
6b7c5b94
SP		 872static struct be_rx_page_info *
873get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
874{
875 struct be_rx_page_info *rx_page_info;
876 struct be_queue_info *rxq = &adapter->rx_obj.q;
877
878 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
879 BUG_ON(!rx_page_info->page);
880
205859a2 881 if (rx_page_info->last_page_user) {
fac6da5b 882 pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
6b7c5b94 883 adapter->big_page_size, PCI_DMA_FROMDEVICE);
205859a2
AK		 884 rx_page_info->last_page_user = false;
885 }
6b7c5b94
SP		 886
887 atomic_dec(&rxq->used);
888 return rx_page_info;
889}
890
891/* Throwaway the data in the Rx completion */
892static void be_rx_compl_discard(struct be_adapter *adapter,
893 struct be_eth_rx_compl *rxcp)
894{
895 struct be_queue_info *rxq = &adapter->rx_obj.q;
896 struct be_rx_page_info *page_info;
897 u16 rxq_idx, i, num_rcvd;
898
899 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
900 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
901
902 for (i = 0; i < num_rcvd; i++) {
903 page_info = get_rx_page_info(adapter, rxq_idx);
904 put_page(page_info->page);
905 memset(page_info, 0, sizeof(*page_info));
906 index_inc(&rxq_idx, rxq->len);
907 }
908}
909
910/*
911 * skb_fill_rx_data forms a complete skb for an ether frame
912 * indicated by rxcp.
913 */
914static void skb_fill_rx_data(struct be_adapter *adapter,
89420424
SP		 915 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
916 u16 num_rcvd)
6b7c5b94
SP		 917{
918 struct be_queue_info *rxq = &adapter->rx_obj.q;
919 struct be_rx_page_info *page_info;
89420424 920 u16 rxq_idx, i, j;
fa77406a 921 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 922 u8 *start;
923
924 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
925 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
6b7c5b94
SP		 926
927 page_info = get_rx_page_info(adapter, rxq_idx);
928
929 start = page_address(page_info->page) + page_info->page_offset;
930 prefetch(start);
931
932 /* Copy data in the first descriptor of this completion */
933 curr_frag_len = min(pktsize, rx_frag_size);
934
935 /* Copy the header portion into skb_data */
936 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
937 memcpy(skb->data, start, hdr_len);
938 skb->len = curr_frag_len;
939 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
940 /* Complete packet has now been moved to data */
941 put_page(page_info->page);
942 skb->data_len = 0;
943 skb->tail += curr_frag_len;
944 } else {
945 skb_shinfo(skb)->nr_frags = 1;
946 skb_shinfo(skb)->frags[0].page = page_info->page;
947 skb_shinfo(skb)->frags[0].page_offset =
948 page_info->page_offset + hdr_len;
949 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
950 skb->data_len = curr_frag_len - hdr_len;
951 skb->tail += hdr_len;
952 }
205859a2 953 page_info->page = NULL;
6b7c5b94
SP		 954
955 if (pktsize <= rx_frag_size) {
956 BUG_ON(num_rcvd != 1);
76fbb429 957 goto done;
6b7c5b94
SP		 958 }
959
960 /* More frags present for this completion */
fa77406a 961 size = pktsize;
bd46cb6c 962 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 963 size -= curr_frag_len;
6b7c5b94
SP		 964 index_inc(&rxq_idx, rxq->len);
965 page_info = get_rx_page_info(adapter, rxq_idx);
966
fa77406a 967 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 968
bd46cb6c
AK		 969 /* Coalesce all frags from the same physical page in one slot */
970 if (page_info->page_offset == 0) {
971 /* Fresh page */
972 j++;
973 skb_shinfo(skb)->frags[j].page = page_info->page;
974 skb_shinfo(skb)->frags[j].page_offset =
975 page_info->page_offset;
976 skb_shinfo(skb)->frags[j].size = 0;
977 skb_shinfo(skb)->nr_frags++;
978 } else {
979 put_page(page_info->page);
980 }
981
982 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 983 skb->len += curr_frag_len;
984 skb->data_len += curr_frag_len;
6b7c5b94 985
205859a2 986 page_info->page = NULL;
6b7c5b94 987 }
bd46cb6c 988 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 989
76fbb429 990done:
4097f663 991 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 992}
993
5be93b9a 994/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 995static void be_rx_compl_process(struct be_adapter *adapter,
996 struct be_eth_rx_compl *rxcp)
997{
998 struct sk_buff *skb;
dcb9b564 999 u32 vlanf, vid;
89420424 1000 u16 num_rcvd;
dcb9b564 1001 u8 vtm;
6b7c5b94 1002
89420424
SP		 1003 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
1004 /* Is it a flush compl that has no data */
1005 if (unlikely(num_rcvd == 0))
1006 return;
1007
89d71a66 1008 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
a058a632 1009 if (unlikely(!skb)) {
6b7c5b94
SP		 1010 if (net_ratelimit())
1011 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
1012 be_rx_compl_discard(adapter, rxcp);
1013 return;
1014 }
1015
89420424 1016 skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
6b7c5b94 1017
728a9972 1018 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 1019 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 1020 else
1021 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 1022
1023 skb->truesize = skb->len + sizeof(struct sk_buff);
1024 skb->protocol = eth_type_trans(skb, adapter->netdev);
6b7c5b94 1025
a058a632
SP		 1026 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1027 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1028
1029 /* vlanf could be wrongly set in some cards.
1030 * ignore if vtm is not set */
3486be29 1031 if ((adapter->function_mode & 0x400) && !vtm)
a058a632
SP		 1032 vlanf = 0;
1033
1034 if (unlikely(vlanf)) {
82903e4b 1035 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
6b7c5b94
SP		 1036 kfree_skb(skb);
1037 return;
1038 }
1039 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
9cae9e4f 1040 vid = swab16(vid);
6b7c5b94
SP		 1041 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
1042 } else {
1043 netif_receive_skb(skb);
1044 }
6b7c5b94
SP		 1045}
1046
5be93b9a
AK		 1047/* Process the RX completion indicated by rxcp when GRO is enabled */
1048static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1049 struct be_eth_rx_compl *rxcp)
1050{
1051 struct be_rx_page_info *page_info;
5be93b9a 1052 struct sk_buff *skb = NULL;
6b7c5b94 1053 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 1054 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 1055 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 1056 u16 i, rxq_idx = 0, vid, j;
dcb9b564 1057 u8 vtm;
6b7c5b94
SP		 1058
1059 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
89420424
SP		 1060 /* Is it a flush compl that has no data */
1061 if (unlikely(num_rcvd == 0))
1062 return;
1063
6b7c5b94
SP		 1064 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
1065 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1066 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564
AK		 1067 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1068
1069 /* vlanf could be wrongly set in some cards.
1070 * ignore if vtm is not set */
3486be29 1071 if ((adapter->function_mode & 0x400) && !vtm)
dcb9b564 1072 vlanf = 0;
6b7c5b94 1073
5be93b9a
AK		 1074 skb = napi_get_frags(&eq_obj->napi);
1075 if (!skb) {
1076 be_rx_compl_discard(adapter, rxcp);
1077 return;
1078 }
1079
6b7c5b94 1080 remaining = pkt_size;
bd46cb6c 1081 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 1082 page_info = get_rx_page_info(adapter, rxq_idx);
1083
1084 curr_frag_len = min(remaining, rx_frag_size);
1085
bd46cb6c
AK		 1086 /* Coalesce all frags from the same physical page in one slot */
1087 if (i == 0 || page_info->page_offset == 0) {
1088 /* First frag or Fresh page */
1089 j++;
5be93b9a
AK		 1090 skb_shinfo(skb)->frags[j].page = page_info->page;
1091 skb_shinfo(skb)->frags[j].page_offset =
1092 page_info->page_offset;
1093 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 1094 } else {
1095 put_page(page_info->page);
1096 }
5be93b9a 1097 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 1098
bd46cb6c 1099 remaining -= curr_frag_len;
6b7c5b94 1100 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 1101 memset(page_info, 0, sizeof(*page_info));
1102 }
bd46cb6c 1103 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 1104
5be93b9a
AK		 1105 skb_shinfo(skb)->nr_frags = j + 1;
1106 skb->len = pkt_size;
1107 skb->data_len = pkt_size;
1108 skb->truesize += pkt_size;
1109 skb->ip_summed = CHECKSUM_UNNECESSARY;
1110
6b7c5b94 1111 if (likely(!vlanf)) {
5be93b9a 1112 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 1113 } else {
1114 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
9cae9e4f 1115 vid = swab16(vid);
6b7c5b94 1116
82903e4b 1117 if (!adapter->vlan_grp || adapter->vlans_added == 0)
6b7c5b94
SP		 1118 return;
1119
5be93b9a 1120 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 1121 }
1122
4097f663 1123 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 1124}
1125
1126static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
1127{
1128 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
1129
1130 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
1131 return NULL;
1132
f3eb62d2 1133 rmb();
6b7c5b94
SP		 1134 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
1135
6b7c5b94
SP		 1136 queue_tail_inc(&adapter->rx_obj.cq);
1137 return rxcp;
1138}
1139
a7a0ef31
SP		 1140/* To reset the valid bit, we need to reset the whole word as
1141 * when walking the queue the valid entries are little-endian
1142 * and invalid entries are host endian
1143 */
1144static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
1145{
1146 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
1147}
1148
6b7c5b94
SP		 1149static inline struct page *be_alloc_pages(u32 size)
1150{
1151 gfp_t alloc_flags = GFP_ATOMIC;
1152 u32 order = get_order(size);
1153 if (order > 0)
1154 alloc_flags |= __GFP_COMP;
1155 return alloc_pages(alloc_flags, order);
1156}
1157
1158/*
1159 * Allocate a page, split it to fragments of size rx_frag_size and post as
1160 * receive buffers to BE
1161 */
1162static void be_post_rx_frags(struct be_adapter *adapter)
1163{
1164 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
26d92f92 1165 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
6b7c5b94
SP		 1166 struct be_queue_info *rxq = &adapter->rx_obj.q;
1167 struct page *pagep = NULL;
1168 struct be_eth_rx_d *rxd;
1169 u64 page_dmaaddr = 0, frag_dmaaddr;
1170 u32 posted, page_offset = 0;
1171
6b7c5b94
SP		 1172 page_info = &page_info_tbl[rxq->head];
1173 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1174 if (!pagep) {
1175 pagep = be_alloc_pages(adapter->big_page_size);
1176 if (unlikely(!pagep)) {
1177 drvr_stats(adapter)->be_ethrx_post_fail++;
1178 break;
1179 }
1180 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1181 adapter->big_page_size,
1182 PCI_DMA_FROMDEVICE);
1183 page_info->page_offset = 0;
1184 } else {
1185 get_page(pagep);
1186 page_info->page_offset = page_offset + rx_frag_size;
1187 }
1188 page_offset = page_info->page_offset;
1189 page_info->page = pagep;
fac6da5b 1190 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
6b7c5b94
SP		 1191 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1192
1193 rxd = queue_head_node(rxq);
1194 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1195 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 1196
1197 /* Any space left in the current big page for another frag? */
1198 if ((page_offset + rx_frag_size + rx_frag_size) >
1199 adapter->big_page_size) {
1200 pagep = NULL;
1201 page_info->last_page_user = true;
1202 }
26d92f92
SP		 1203
1204 prev_page_info = page_info;
1205 queue_head_inc(rxq);
6b7c5b94
SP		 1206 page_info = &page_info_tbl[rxq->head];
1207 }
1208 if (pagep)
26d92f92 1209 prev_page_info->last_page_user = true;
6b7c5b94
SP		 1210
1211 if (posted) {
6b7c5b94 1212 atomic_add(posted, &rxq->used);
8788fdc2 1213 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 1214 } else if (atomic_read(&rxq->used) == 0) {
1215 /* Let be_worker replenish when memory is available */
1216 adapter->rx_post_starved = true;
6b7c5b94 1217 }
6b7c5b94
SP		 1218}
1219
5fb379ee 1220static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 1221{
6b7c5b94
SP		 1222 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1223
1224 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1225 return NULL;
1226
f3eb62d2 1227 rmb();
6b7c5b94
SP		 1228 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1229
1230 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1231
1232 queue_tail_inc(tx_cq);
1233 return txcp;
1234}
1235
1236static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1237{
1238 struct be_queue_info *txq = &adapter->tx_obj.q;
a73b796e 1239 struct be_eth_wrb *wrb;
6b7c5b94
SP		 1240 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1241 struct sk_buff *sent_skb;
ec43b1a6
SP		 1242 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1243 bool unmap_skb_hdr = true;
6b7c5b94 1244
ec43b1a6 1245 sent_skb = sent_skbs[txq->tail];
6b7c5b94 1246 BUG_ON(!sent_skb);
ec43b1a6
SP		 1247 sent_skbs[txq->tail] = NULL;
1248
1249 /* skip header wrb */
a73b796e 1250 queue_tail_inc(txq);
6b7c5b94 1251
ec43b1a6 1252 do {
6b7c5b94 1253 cur_index = txq->tail;
a73b796e 1254 wrb = queue_tail_node(txq);
ec43b1a6 1255 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
e743d313 1256 skb_headlen(sent_skb)));
ec43b1a6
SP		 1257 unmap_skb_hdr = false;
1258
6b7c5b94
SP		 1259 num_wrbs++;
1260 queue_tail_inc(txq);
ec43b1a6 1261 } while (cur_index != last_index);
6b7c5b94
SP		 1262
1263 atomic_sub(num_wrbs, &txq->used);
a73b796e 1264
6b7c5b94
SP		 1265 kfree_skb(sent_skb);
1266}
1267
859b1e4e
SP		 1268static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1269{
1270 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1271
1272 if (!eqe->evt)
1273 return NULL;
1274
f3eb62d2 1275 rmb();
859b1e4e
SP		 1276 eqe->evt = le32_to_cpu(eqe->evt);
1277 queue_tail_inc(&eq_obj->q);
1278 return eqe;
1279}
1280
1281static int event_handle(struct be_adapter *adapter,
1282 struct be_eq_obj *eq_obj)
1283{
1284 struct be_eq_entry *eqe;
1285 u16 num = 0;
1286
1287 while ((eqe = event_get(eq_obj)) != NULL) {
1288 eqe->evt = 0;
1289 num++;
1290 }
1291
1292 /* Deal with any spurious interrupts that come
1293 * without events
1294 */
1295 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1296 if (num)
1297 napi_schedule(&eq_obj->napi);
1298
1299 return num;
1300}
1301
1302/* Just read and notify events without processing them.
1303 * Used at the time of destroying event queues */
1304static void be_eq_clean(struct be_adapter *adapter,
1305 struct be_eq_obj *eq_obj)
1306{
1307 struct be_eq_entry *eqe;
1308 u16 num = 0;
1309
1310 while ((eqe = event_get(eq_obj)) != NULL) {
1311 eqe->evt = 0;
1312 num++;
1313 }
1314
1315 if (num)
1316 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1317}
1318
6b7c5b94
SP		 1319static void be_rx_q_clean(struct be_adapter *adapter)
1320{
1321 struct be_rx_page_info *page_info;
1322 struct be_queue_info *rxq = &adapter->rx_obj.q;
1323 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1324 struct be_eth_rx_compl *rxcp;
1325 u16 tail;
1326
1327 /* First cleanup pending rx completions */
1328 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1329 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1330 be_rx_compl_reset(rxcp);
8788fdc2 1331 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1332 }
1333
1334 /* Then free posted rx buffer that were not used */
1335 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1336 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1337 page_info = get_rx_page_info(adapter, tail);
1338 put_page(page_info->page);
1339 memset(page_info, 0, sizeof(*page_info));
1340 }
1341 BUG_ON(atomic_read(&rxq->used));
1342}
1343
a8e9179a 1344static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1345{
a8e9179a 1346 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1347 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1348 struct be_eth_tx_compl *txcp;
1349 u16 end_idx, cmpl = 0, timeo = 0;
b03388d6
SP		 1350 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1351 struct sk_buff *sent_skb;
1352 bool dummy_wrb;
a8e9179a
SP		 1353
1354 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1355 do {
1356 while ((txcp = be_tx_compl_get(tx_cq))) {
1357 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1358 wrb_index, txcp);
1359 be_tx_compl_process(adapter, end_idx);
1360 cmpl++;
1361 }
1362 if (cmpl) {
1363 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1364 cmpl = 0;
1365 }
1366
1367 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1368 break;
1369
1370 mdelay(1);
1371 } while (true);
1372
1373 if (atomic_read(&txq->used))
1374 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1375 atomic_read(&txq->used));
b03388d6
SP		 1376
1377 /* free posted tx for which compls will never arrive */
1378 while (atomic_read(&txq->used)) {
1379 sent_skb = sent_skbs[txq->tail];
1380 end_idx = txq->tail;
1381 index_adv(&end_idx,
1382 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
1383 be_tx_compl_process(adapter, end_idx);
1384 }
6b7c5b94
SP		 1385}
1386
5fb379ee
SP		 1387static void be_mcc_queues_destroy(struct be_adapter *adapter)
1388{
1389 struct be_queue_info *q;
5fb379ee 1390
8788fdc2 1391 q = &adapter->mcc_obj.q;
5fb379ee 1392 if (q->created)
8788fdc2 1393 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1394 be_queue_free(adapter, q);
1395
8788fdc2 1396 q = &adapter->mcc_obj.cq;
5fb379ee 1397 if (q->created)
8788fdc2 1398 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1399 be_queue_free(adapter, q);
1400}
1401
1402/* Must be called only after TX qs are created as MCC shares TX EQ */
1403static int be_mcc_queues_create(struct be_adapter *adapter)
1404{
1405 struct be_queue_info *q, *cq;
5fb379ee
SP		 1406
1407 /* Alloc MCC compl queue */
8788fdc2 1408 cq = &adapter->mcc_obj.cq;
5fb379ee 1409 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1410 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1411 goto err;
1412
1413 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1414 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1415 goto mcc_cq_free;
1416
1417 /* Alloc MCC queue */
8788fdc2 1418 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1419 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1420 goto mcc_cq_destroy;
1421
1422 /* Ask BE to create MCC queue */
8788fdc2 1423 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1424 goto mcc_q_free;
1425
1426 return 0;
1427
1428mcc_q_free:
1429 be_queue_free(adapter, q);
1430mcc_cq_destroy:
8788fdc2 1431 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1432mcc_cq_free:
1433 be_queue_free(adapter, cq);
1434err:
1435 return -1;
1436}
1437
6b7c5b94
SP		 1438static void be_tx_queues_destroy(struct be_adapter *adapter)
1439{
1440 struct be_queue_info *q;
1441
1442 q = &adapter->tx_obj.q;
a8e9179a 1443 if (q->created)
8788fdc2 1444 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1445 be_queue_free(adapter, q);
1446
1447 q = &adapter->tx_obj.cq;
1448 if (q->created)
8788fdc2 1449 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1450 be_queue_free(adapter, q);
1451
859b1e4e
SP		 1452 /* Clear any residual events */
1453 be_eq_clean(adapter, &adapter->tx_eq);
1454
6b7c5b94
SP		 1455 q = &adapter->tx_eq.q;
1456 if (q->created)
8788fdc2 1457 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1458 be_queue_free(adapter, q);
1459}
1460
1461static int be_tx_queues_create(struct be_adapter *adapter)
1462{
1463 struct be_queue_info *eq, *q, *cq;
1464
1465 adapter->tx_eq.max_eqd = 0;
1466 adapter->tx_eq.min_eqd = 0;
1467 adapter->tx_eq.cur_eqd = 96;
1468 adapter->tx_eq.enable_aic = false;
1469 /* Alloc Tx Event queue */
1470 eq = &adapter->tx_eq.q;
1471 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1472 return -1;
1473
1474 /* Ask BE to create Tx Event queue */
8788fdc2 1475 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94 1476 goto tx_eq_free;
ba343c77
SB		 1477 adapter->base_eq_id = adapter->tx_eq.q.id;
1478
6b7c5b94
SP		 1479 /* Alloc TX eth compl queue */
1480 cq = &adapter->tx_obj.cq;
1481 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1482 sizeof(struct be_eth_tx_compl)))
1483 goto tx_eq_destroy;
1484
1485 /* Ask BE to create Tx eth compl queue */
8788fdc2 1486 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1487 goto tx_cq_free;
1488
1489 /* Alloc TX eth queue */
1490 q = &adapter->tx_obj.q;
1491 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1492 goto tx_cq_destroy;
1493
1494 /* Ask BE to create Tx eth queue */
8788fdc2 1495 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1496 goto tx_q_free;
1497 return 0;
1498
1499tx_q_free:
1500 be_queue_free(adapter, q);
1501tx_cq_destroy:
8788fdc2 1502 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1503tx_cq_free:
1504 be_queue_free(adapter, cq);
1505tx_eq_destroy:
8788fdc2 1506 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1507tx_eq_free:
1508 be_queue_free(adapter, eq);
1509 return -1;
1510}
1511
1512static void be_rx_queues_destroy(struct be_adapter *adapter)
1513{
1514 struct be_queue_info *q;
1515
1516 q = &adapter->rx_obj.q;
1517 if (q->created) {
8788fdc2 1518 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
89420424
SP		 1519
1520 /* After the rxq is invalidated, wait for a grace time
1521 * of 1ms for all dma to end and the flush compl to arrive
1522 */
1523 mdelay(1);
6b7c5b94
SP		 1524 be_rx_q_clean(adapter);
1525 }
1526 be_queue_free(adapter, q);
1527
1528 q = &adapter->rx_obj.cq;
1529 if (q->created)
8788fdc2 1530 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1531 be_queue_free(adapter, q);
1532
859b1e4e
SP		 1533 /* Clear any residual events */
1534 be_eq_clean(adapter, &adapter->rx_eq);
1535
6b7c5b94
SP		 1536 q = &adapter->rx_eq.q;
1537 if (q->created)
8788fdc2 1538 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1539 be_queue_free(adapter, q);
1540}
1541
1542static int be_rx_queues_create(struct be_adapter *adapter)
1543{
1544 struct be_queue_info *eq, *q, *cq;
1545 int rc;
1546
6b7c5b94
SP		 1547 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1548 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1549 adapter->rx_eq.min_eqd = 0;
1550 adapter->rx_eq.cur_eqd = 0;
1551 adapter->rx_eq.enable_aic = true;
1552
1553 /* Alloc Rx Event queue */
1554 eq = &adapter->rx_eq.q;
1555 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1556 sizeof(struct be_eq_entry));
1557 if (rc)
1558 return rc;
1559
1560 /* Ask BE to create Rx Event queue */
8788fdc2 1561 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1562 if (rc)
1563 goto rx_eq_free;
1564
1565 /* Alloc RX eth compl queue */
1566 cq = &adapter->rx_obj.cq;
1567 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1568 sizeof(struct be_eth_rx_compl));
1569 if (rc)
1570 goto rx_eq_destroy;
1571
1572 /* Ask BE to create Rx eth compl queue */
8788fdc2 1573 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1574 if (rc)
1575 goto rx_cq_free;
1576
1577 /* Alloc RX eth queue */
1578 q = &adapter->rx_obj.q;
1579 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1580 if (rc)
1581 goto rx_cq_destroy;
1582
1583 /* Ask BE to create Rx eth queue */
8788fdc2 1584 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1585 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1586 if (rc)
1587 goto rx_q_free;
1588
1589 return 0;
1590rx_q_free:
1591 be_queue_free(adapter, q);
1592rx_cq_destroy:
8788fdc2 1593 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1594rx_cq_free:
1595 be_queue_free(adapter, cq);
1596rx_eq_destroy:
8788fdc2 1597 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1598rx_eq_free:
1599 be_queue_free(adapter, eq);
1600 return rc;
1601}
6b7c5b94 1602
b628bde2
SP		 1603/* There are 8 evt ids per func. Retruns the evt id's bit number */
1604static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1605{
ba343c77 1606 return eq_id - adapter->base_eq_id;
b628bde2
SP		 1607}
1608
6b7c5b94
SP		 1609static irqreturn_t be_intx(int irq, void *dev)
1610{
1611 struct be_adapter *adapter = dev;
8788fdc2 1612 int isr;
6b7c5b94 1613
8788fdc2 1614 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
55bdeed9 1615 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
c001c213 1616 if (!isr)
8788fdc2 1617 return IRQ_NONE;
6b7c5b94 1618
8788fdc2
SP		 1619 event_handle(adapter, &adapter->tx_eq);
1620 event_handle(adapter, &adapter->rx_eq);
c001c213 1621
8788fdc2 1622 return IRQ_HANDLED;
6b7c5b94
SP		 1623}
1624
1625static irqreturn_t be_msix_rx(int irq, void *dev)
1626{
1627 struct be_adapter *adapter = dev;
1628
8788fdc2 1629 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1630
1631 return IRQ_HANDLED;
1632}
1633
5fb379ee 1634static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1635{
1636 struct be_adapter *adapter = dev;
1637
8788fdc2 1638 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1639
1640 return IRQ_HANDLED;
1641}
1642
5be93b9a 1643static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1644 struct be_eth_rx_compl *rxcp)
1645{
1646 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1647 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1648
1649 if (err)
1650 drvr_stats(adapter)->be_rxcp_err++;
1651
5be93b9a 1652 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1653}
1654
1655int be_poll_rx(struct napi_struct *napi, int budget)
1656{
1657 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1658 struct be_adapter *adapter =
1659 container_of(rx_eq, struct be_adapter, rx_eq);
1660 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1661 struct be_eth_rx_compl *rxcp;
1662 u32 work_done;
1663
b7b83ac3 1664 adapter->stats.drvr_stats.be_rx_polls++;
6b7c5b94
SP		 1665 for (work_done = 0; work_done < budget; work_done++) {
1666 rxcp = be_rx_compl_get(adapter);
1667 if (!rxcp)
1668 break;
1669
5be93b9a
AK		 1670 if (do_gro(adapter, rxcp))
1671 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1672 else
1673 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1674
1675 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1676 }
1677
6b7c5b94
SP		 1678 /* Refill the queue */
1679 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1680 be_post_rx_frags(adapter);
1681
1682 /* All consumed */
1683 if (work_done < budget) {
1684 napi_complete(napi);
8788fdc2 1685 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1686 } else {
1687 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1688 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1689 }
1690 return work_done;
1691}
1692
f31e50a8
SP		 1693/* As TX and MCC share the same EQ check for both TX and MCC completions.
1694 * For TX/MCC we don't honour budget; consume everything
1695 */
1696static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
6b7c5b94 1697{
f31e50a8
SP		 1698 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1699 struct be_adapter *adapter =
1700 container_of(tx_eq, struct be_adapter, tx_eq);
5fb379ee
SP		 1701 struct be_queue_info *txq = &adapter->tx_obj.q;
1702 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1703 struct be_eth_tx_compl *txcp;
f31e50a8 1704 int tx_compl = 0, mcc_compl, status = 0;
6b7c5b94
SP		 1705 u16 end_idx;
1706
5fb379ee 1707 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94 1708 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
f31e50a8 1709 wrb_index, txcp);
6b7c5b94 1710 be_tx_compl_process(adapter, end_idx);
f31e50a8 1711 tx_compl++;
6b7c5b94
SP		 1712 }
1713
f31e50a8
SP		 1714 mcc_compl = be_process_mcc(adapter, &status);
1715
1716 napi_complete(napi);
1717
1718 if (mcc_compl) {
1719 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1720 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1721 }
1722
1723 if (tx_compl) {
1724 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
5fb379ee
SP		 1725
1726 /* As Tx wrbs have been freed up, wake up netdev queue if
1727 * it was stopped due to lack of tx wrbs.
1728 */
1729 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1730 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1731 netif_wake_queue(adapter->netdev);
1732 }
1733
1734 drvr_stats(adapter)->be_tx_events++;
f31e50a8 1735 drvr_stats(adapter)->be_tx_compl += tx_compl;
6b7c5b94 1736 }
6b7c5b94
SP		 1737
1738 return 1;
1739}
1740
7c185276
AK		 1741static inline bool be_detect_ue(struct be_adapter *adapter)
1742{
1743 u32 online0 = 0, online1 = 0;
1744
1745 pci_read_config_dword(adapter->pdev, PCICFG_ONLINE0, &online0);
1746
1747 pci_read_config_dword(adapter->pdev, PCICFG_ONLINE1, &online1);
1748
1749 if (!online0 || !online1) {
1750 adapter->ue_detected = true;
1751 dev_err(&adapter->pdev->dev,
1752 "UE Detected!! online0=%d online1=%d\n",
1753 online0, online1);
1754 return true;
1755 }
1756
1757 return false;
1758}
1759
1760void be_dump_ue(struct be_adapter *adapter)
1761{
1762 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
1763 u32 i;
1764
1765 pci_read_config_dword(adapter->pdev,
1766 PCICFG_UE_STATUS_LOW, &ue_status_lo);
1767 pci_read_config_dword(adapter->pdev,
1768 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
1769 pci_read_config_dword(adapter->pdev,
1770 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
1771 pci_read_config_dword(adapter->pdev,
1772 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
1773
1774 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
1775 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
1776
1777 if (ue_status_lo) {
1778 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
1779 if (ue_status_lo & 1)
1780 dev_err(&adapter->pdev->dev,
1781 "UE: %s bit set\n", ue_status_low_desc[i]);
1782 }
1783 }
1784 if (ue_status_hi) {
1785 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
1786 if (ue_status_hi & 1)
1787 dev_err(&adapter->pdev->dev,
1788 "UE: %s bit set\n", ue_status_hi_desc[i]);
1789 }
1790 }
1791
1792}
1793
ea1dae11
SP		 1794static void be_worker(struct work_struct *work)
1795{
1796 struct be_adapter *adapter =
1797 container_of(work, struct be_adapter, work.work);
ea1dae11 1798
0fc48c37
AK		 1799 if (!adapter->stats_ioctl_sent)
1800 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1801
1802 /* Set EQ delay */
1803 be_rx_eqd_update(adapter);
1804
4097f663
SP		 1805 be_tx_rate_update(adapter);
1806 be_rx_rate_update(adapter);
1807
ea1dae11
SP		 1808 if (adapter->rx_post_starved) {
1809 adapter->rx_post_starved = false;
1810 be_post_rx_frags(adapter);
1811 }
7c185276
AK		 1812 if (!adapter->ue_detected) {
1813 if (be_detect_ue(adapter))
1814 be_dump_ue(adapter);
1815 }
ea1dae11
SP		 1816
1817 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1818}
1819
8d56ff11
SP		 1820static void be_msix_disable(struct be_adapter *adapter)
1821{
1822 if (adapter->msix_enabled) {
1823 pci_disable_msix(adapter->pdev);
1824 adapter->msix_enabled = false;
1825 }
1826}
1827
6b7c5b94
SP		 1828static void be_msix_enable(struct be_adapter *adapter)
1829{
1830 int i, status;
1831
1832 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1833 adapter->msix_entries[i].entry = i;
1834
1835 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1836 BE_NUM_MSIX_VECTORS);
1837 if (status == 0)
1838 adapter->msix_enabled = true;
6b7c5b94
SP		 1839}
1840
ba343c77
SB		 1841static void be_sriov_enable(struct be_adapter *adapter)
1842{
344dbf10 1843 be_check_sriov_fn_type(adapter);
6dedec81 1844#ifdef CONFIG_PCI_IOV
ba343c77 1845 if (be_physfn(adapter) && num_vfs) {
6dedec81
AK		 1846 int status;
1847
ba343c77
SB		 1848 status = pci_enable_sriov(adapter->pdev, num_vfs);
1849 adapter->sriov_enabled = status ? false : true;
1850 }
1851#endif
ba343c77
SB		 1852}
1853
1854static void be_sriov_disable(struct be_adapter *adapter)
1855{
1856#ifdef CONFIG_PCI_IOV
1857 if (adapter->sriov_enabled) {
1858 pci_disable_sriov(adapter->pdev);
1859 adapter->sriov_enabled = false;
1860 }
1861#endif
1862}
1863
6b7c5b94
SP		 1864static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1865{
b628bde2
SP		 1866 return adapter->msix_entries[
1867 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1868}
1869
b628bde2
SP		 1870static int be_request_irq(struct be_adapter *adapter,
1871 struct be_eq_obj *eq_obj,
1872 void *handler, char *desc)
6b7c5b94
SP		 1873{
1874 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1875 int vec;
1876
1877 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1878 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1879 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1880}
1881
1882static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1883{
1884 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1885 free_irq(vec, adapter);
1886}
6b7c5b94 1887
b628bde2
SP		 1888static int be_msix_register(struct be_adapter *adapter)
1889{
1890 int status;
1891
1892 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1893 if (status)
1894 goto err;
1895
b628bde2
SP		 1896 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1897 if (status)
1898 goto free_tx_irq;
1899
6b7c5b94 1900 return 0;
b628bde2
SP		 1901
1902free_tx_irq:
1903 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1904err:
1905 dev_warn(&adapter->pdev->dev,
1906 "MSIX Request IRQ failed - err %d\n", status);
1907 pci_disable_msix(adapter->pdev);
1908 adapter->msix_enabled = false;
1909 return status;
1910}
1911
1912static int be_irq_register(struct be_adapter *adapter)
1913{
1914 struct net_device *netdev = adapter->netdev;
1915 int status;
1916
1917 if (adapter->msix_enabled) {
1918 status = be_msix_register(adapter);
1919 if (status == 0)
1920 goto done;
ba343c77
SB		 1921 /* INTx is not supported for VF */
1922 if (!be_physfn(adapter))
1923 return status;
6b7c5b94
SP		 1924 }
1925
1926 /* INTx */
1927 netdev->irq = adapter->pdev->irq;
1928 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1929 adapter);
1930 if (status) {
1931 dev_err(&adapter->pdev->dev,
1932 "INTx request IRQ failed - err %d\n", status);
1933 return status;
1934 }
1935done:
1936 adapter->isr_registered = true;
1937 return 0;
1938}
1939
1940static void be_irq_unregister(struct be_adapter *adapter)
1941{
1942 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1943
1944 if (!adapter->isr_registered)
1945 return;
1946
1947 /* INTx */
1948 if (!adapter->msix_enabled) {
1949 free_irq(netdev->irq, adapter);
1950 goto done;
1951 }
1952
1953 /* MSIx */
b628bde2
SP		 1954 be_free_irq(adapter, &adapter->tx_eq);
1955 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1956done:
1957 adapter->isr_registered = false;
6b7c5b94
SP		 1958}
1959
889cd4b2
SP		 1960static int be_close(struct net_device *netdev)
1961{
1962 struct be_adapter *adapter = netdev_priv(netdev);
1963 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1964 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1965 int vec;
1966
1967 cancel_delayed_work_sync(&adapter->work);
1968
1969 be_async_mcc_disable(adapter);
1970
1971 netif_stop_queue(netdev);
1972 netif_carrier_off(netdev);
1973 adapter->link_up = false;
1974
1975 be_intr_set(adapter, false);
1976
1977 if (adapter->msix_enabled) {
1978 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1979 synchronize_irq(vec);
1980 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1981 synchronize_irq(vec);
1982 } else {
1983 synchronize_irq(netdev->irq);
1984 }
1985 be_irq_unregister(adapter);
1986
1987 napi_disable(&rx_eq->napi);
1988 napi_disable(&tx_eq->napi);
1989
1990 /* Wait for all pending tx completions to arrive so that
1991 * all tx skbs are freed.
1992 */
1993 be_tx_compl_clean(adapter);
1994
1995 return 0;
1996}
1997
6b7c5b94
SP		 1998static int be_open(struct net_device *netdev)
1999{
2000 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 2001 struct be_eq_obj *rx_eq = &adapter->rx_eq;
2002 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 2003 bool link_up;
2004 int status;
0388f251
SB		 2005 u8 mac_speed;
2006 u16 link_speed;
5fb379ee
SP		 2007
2008 /* First time posting */
2009 be_post_rx_frags(adapter);
2010
2011 napi_enable(&rx_eq->napi);
2012 napi_enable(&tx_eq->napi);
2013
2014 be_irq_register(adapter);
2015
8788fdc2 2016 be_intr_set(adapter, true);
5fb379ee
SP		 2017
2018 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 2019 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
2020 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 2021
2022 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 2023 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 2024
7a1e9b20
SP		 2025 /* Now that interrupts are on we can process async mcc */
2026 be_async_mcc_enable(adapter);
2027
889cd4b2
SP		 2028 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
2029
0388f251
SB		 2030 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
2031 &link_speed);
a8f447bd 2032 if (status)
889cd4b2 2033 goto err;
a8f447bd 2034 be_link_status_update(adapter, link_up);
5fb379ee 2035
889cd4b2 2036 if (be_physfn(adapter)) {
1da87b7f 2037 status = be_vid_config(adapter, false, 0);
889cd4b2
SP		 2038 if (status)
2039 goto err;
4f2aa89c 2040
ba343c77
SB		 2041 status = be_cmd_set_flow_control(adapter,
2042 adapter->tx_fc, adapter->rx_fc);
2043 if (status)
889cd4b2 2044 goto err;
ba343c77 2045 }
4f2aa89c 2046
889cd4b2
SP		 2047 return 0;
2048err:
2049 be_close(adapter->netdev);
2050 return -EIO;
5fb379ee
SP		 2051}
2052
71d8d1b5
AK		 2053static int be_setup_wol(struct be_adapter *adapter, bool enable)
2054{
2055 struct be_dma_mem cmd;
2056 int status = 0;
2057 u8 mac[ETH_ALEN];
2058
2059 memset(mac, 0, ETH_ALEN);
2060
2061 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2062 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
2063 if (cmd.va == NULL)
2064 return -1;
2065 memset(cmd.va, 0, cmd.size);
2066
2067 if (enable) {
2068 status = pci_write_config_dword(adapter->pdev,
2069 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2070 if (status) {
2071 dev_err(&adapter->pdev->dev,
2381a55c 2072 "Could not enable Wake-on-lan\n");
71d8d1b5
AK		 2073 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
2074 cmd.dma);
2075 return status;
2076 }
2077 status = be_cmd_enable_magic_wol(adapter,
2078 adapter->netdev->dev_addr, &cmd);
2079 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2080 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2081 } else {
2082 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2083 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2084 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2085 }
2086
2087 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
2088 return status;
2089}
2090
5fb379ee
SP		 2091static int be_setup(struct be_adapter *adapter)
2092{
5fb379ee 2093 struct net_device *netdev = adapter->netdev;
ba343c77 2094 u32 cap_flags, en_flags, vf = 0;
6b7c5b94 2095 int status;
ba343c77
SB		 2096 u8 mac[ETH_ALEN];
2097
2098 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
6b7c5b94 2099
ba343c77
SB		 2100 if (be_physfn(adapter)) {
2101 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2102 BE_IF_FLAGS_PROMISCUOUS |
2103 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2104 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2105 }
73d540f2
SP		 2106
2107 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2108 netdev->dev_addr, false/* pmac_invalid */,
ba343c77 2109 &adapter->if_handle, &adapter->pmac_id, 0);
6b7c5b94
SP		 2110 if (status != 0)
2111 goto do_none;
2112
ba343c77
SB		 2113 if (be_physfn(adapter)) {
2114 while (vf < num_vfs) {
2115 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
2116 | BE_IF_FLAGS_BROADCAST;
2117 status = be_cmd_if_create(adapter, cap_flags, en_flags,
64600ea5
AK		 2118 mac, true,
2119 &adapter->vf_cfg[vf].vf_if_handle,
ba343c77
SB		 2120 NULL, vf+1);
2121 if (status) {
2122 dev_err(&adapter->pdev->dev,
2123 "Interface Create failed for VF %d\n", vf);
2124 goto if_destroy;
2125 }
64600ea5 2126 adapter->vf_cfg[vf].vf_pmac_id = BE_INVALID_PMAC_ID;
ba343c77 2127 vf++;
84e5b9f7 2128 }
ba343c77
SB		 2129 } else if (!be_physfn(adapter)) {
2130 status = be_cmd_mac_addr_query(adapter, mac,
2131 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2132 if (!status) {
2133 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2134 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2135 }
2136 }
2137
6b7c5b94
SP		 2138 status = be_tx_queues_create(adapter);
2139 if (status != 0)
2140 goto if_destroy;
2141
2142 status = be_rx_queues_create(adapter);
2143 if (status != 0)
2144 goto tx_qs_destroy;
2145
5fb379ee
SP		 2146 status = be_mcc_queues_create(adapter);
2147 if (status != 0)
2148 goto rx_qs_destroy;
6b7c5b94 2149
0dffc83e
AK		 2150 adapter->link_speed = -1;
2151
6b7c5b94
SP		 2152 return 0;
2153
5fb379ee
SP		 2154rx_qs_destroy:
2155 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 2156tx_qs_destroy:
2157 be_tx_queues_destroy(adapter);
2158if_destroy:
ba343c77 2159 for (vf = 0; vf < num_vfs; vf++)
64600ea5
AK		 2160 if (adapter->vf_cfg[vf].vf_if_handle)
2161 be_cmd_if_destroy(adapter,
2162 adapter->vf_cfg[vf].vf_if_handle);
8788fdc2 2163 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 2164do_none:
2165 return status;
2166}
2167
5fb379ee
SP		 2168static int be_clear(struct be_adapter *adapter)
2169{
1a8887d8 2170 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 2171 be_rx_queues_destroy(adapter);
2172 be_tx_queues_destroy(adapter);
2173
8788fdc2 2174 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 2175
2243e2e9
SP		 2176 /* tell fw we're done with firing cmds */
2177 be_cmd_fw_clean(adapter);
5fb379ee
SP		 2178 return 0;
2179}
2180
6b7c5b94 2181
84517482
AK		 2182#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2183char flash_cookie[2][16] = {"*** SE FLAS",
2184 "H DIRECTORY *** "};
fa9a6fed
SB		 2185
2186static bool be_flash_redboot(struct be_adapter *adapter,
3f0d4560
AK		 2187 const u8 *p, u32 img_start, int image_size,
2188 int hdr_size)
fa9a6fed
SB		 2189{
2190 u32 crc_offset;
2191 u8 flashed_crc[4];
2192 int status;
3f0d4560
AK		 2193
2194 crc_offset = hdr_size + img_start + image_size - 4;
2195
fa9a6fed 2196 p += crc_offset;
3f0d4560
AK		 2197
2198 status = be_cmd_get_flash_crc(adapter, flashed_crc,
f510fc64 2199 (image_size - 4));
fa9a6fed
SB		 2200 if (status) {
2201 dev_err(&adapter->pdev->dev,
2202 "could not get crc from flash, not flashing redboot\n");
2203 return false;
2204 }
2205
2206 /*update redboot only if crc does not match*/
2207 if (!memcmp(flashed_crc, p, 4))
2208 return false;
2209 else
2210 return true;
fa9a6fed
SB		 2211}
2212
3f0d4560 2213static int be_flash_data(struct be_adapter *adapter,
84517482 2214 const struct firmware *fw,
3f0d4560
AK		 2215 struct be_dma_mem *flash_cmd, int num_of_images)
2216
84517482 2217{
3f0d4560
AK		 2218 int status = 0, i, filehdr_size = 0;
2219 u32 total_bytes = 0, flash_op;
84517482
AK		 2220 int num_bytes;
2221 const u8 *p = fw->data;
2222 struct be_cmd_write_flashrom *req = flash_cmd->va;
3f0d4560 2223 struct flash_comp *pflashcomp;
9fe96934 2224 int num_comp;
3f0d4560 2225
9fe96934 2226 struct flash_comp gen3_flash_types[9] = {
3f0d4560
AK		 2227 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2228 FLASH_IMAGE_MAX_SIZE_g3},
2229 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2230 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2231 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2232 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2233 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2234 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2235 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2236 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2237 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2238 FLASH_IMAGE_MAX_SIZE_g3},
2239 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2240 FLASH_IMAGE_MAX_SIZE_g3},
2241 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
9fe96934
SB		 2242 FLASH_IMAGE_MAX_SIZE_g3},
2243 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2244 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
3f0d4560
AK		 2245 };
2246 struct flash_comp gen2_flash_types[8] = {
2247 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2248 FLASH_IMAGE_MAX_SIZE_g2},
2249 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2250 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2251 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2252 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2253 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2254 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2255 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2256 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2257 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2258 FLASH_IMAGE_MAX_SIZE_g2},
2259 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2260 FLASH_IMAGE_MAX_SIZE_g2},
2261 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2262 FLASH_IMAGE_MAX_SIZE_g2}
2263 };
2264
2265 if (adapter->generation == BE_GEN3) {
2266 pflashcomp = gen3_flash_types;
2267 filehdr_size = sizeof(struct flash_file_hdr_g3);
9fe96934 2268 num_comp = 9;
3f0d4560
AK		 2269 } else {
2270 pflashcomp = gen2_flash_types;
2271 filehdr_size = sizeof(struct flash_file_hdr_g2);
9fe96934 2272 num_comp = 8;
84517482 2273 }
9fe96934
SB		 2274 for (i = 0; i < num_comp; i++) {
2275 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2276 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2277 continue;
3f0d4560
AK		 2278 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2279 (!be_flash_redboot(adapter, fw->data,
2280 pflashcomp[i].offset, pflashcomp[i].size,
2281 filehdr_size)))
2282 continue;
2283 p = fw->data;
2284 p += filehdr_size + pflashcomp[i].offset
2285 + (num_of_images * sizeof(struct image_hdr));
2286 if (p + pflashcomp[i].size > fw->data + fw->size)
84517482 2287 return -1;
3f0d4560
AK		 2288 total_bytes = pflashcomp[i].size;
2289 while (total_bytes) {
2290 if (total_bytes > 32*1024)
2291 num_bytes = 32*1024;
2292 else
2293 num_bytes = total_bytes;
2294 total_bytes -= num_bytes;
2295
2296 if (!total_bytes)
2297 flash_op = FLASHROM_OPER_FLASH;
2298 else
2299 flash_op = FLASHROM_OPER_SAVE;
2300 memcpy(req->params.data_buf, p, num_bytes);
2301 p += num_bytes;
2302 status = be_cmd_write_flashrom(adapter, flash_cmd,
2303 pflashcomp[i].optype, flash_op, num_bytes);
2304 if (status) {
2305 dev_err(&adapter->pdev->dev,
2306 "cmd to write to flash rom failed.\n");
2307 return -1;
2308 }
2309 yield();
84517482 2310 }
84517482 2311 }
84517482
AK		 2312 return 0;
2313}
2314
3f0d4560
AK		 2315static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2316{
2317 if (fhdr == NULL)
2318 return 0;
2319 if (fhdr->build[0] == '3')
2320 return BE_GEN3;
2321 else if (fhdr->build[0] == '2')
2322 return BE_GEN2;
2323 else
2324 return 0;
2325}
2326
84517482
AK		 2327int be_load_fw(struct be_adapter *adapter, u8 *func)
2328{
2329 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2330 const struct firmware *fw;
3f0d4560
AK		 2331 struct flash_file_hdr_g2 *fhdr;
2332 struct flash_file_hdr_g3 *fhdr3;
2333 struct image_hdr *img_hdr_ptr = NULL;
84517482 2334 struct be_dma_mem flash_cmd;
8b93b710 2335 int status, i = 0, num_imgs = 0;
84517482 2336 const u8 *p;
84517482 2337
84517482
AK		 2338 strcpy(fw_file, func);
2339
2340 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2341 if (status)
2342 goto fw_exit;
2343
2344 p = fw->data;
3f0d4560 2345 fhdr = (struct flash_file_hdr_g2 *) p;
84517482
AK		 2346 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2347
84517482
AK		 2348 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2349 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2350 &flash_cmd.dma);
2351 if (!flash_cmd.va) {
2352 status = -ENOMEM;
2353 dev_err(&adapter->pdev->dev,
2354 "Memory allocation failure while flashing\n");
2355 goto fw_exit;
2356 }
2357
3f0d4560
AK		 2358 if ((adapter->generation == BE_GEN3) &&
2359 (get_ufigen_type(fhdr) == BE_GEN3)) {
2360 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
8b93b710
AK		 2361 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2362 for (i = 0; i < num_imgs; i++) {
3f0d4560
AK		 2363 img_hdr_ptr = (struct image_hdr *) (fw->data +
2364 (sizeof(struct flash_file_hdr_g3) +
8b93b710
AK		 2365 i * sizeof(struct image_hdr)));
2366 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2367 status = be_flash_data(adapter, fw, &flash_cmd,
2368 num_imgs);
3f0d4560
AK		 2369 }
2370 } else if ((adapter->generation == BE_GEN2) &&
2371 (get_ufigen_type(fhdr) == BE_GEN2)) {
2372 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2373 } else {
2374 dev_err(&adapter->pdev->dev,
2375 "UFI and Interface are not compatible for flashing\n");
2376 status = -1;
84517482
AK		 2377 }
2378
2379 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2380 flash_cmd.dma);
2381 if (status) {
2382 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2383 goto fw_exit;
2384 }
2385
af901ca1 2386 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
84517482
AK		 2387
2388fw_exit:
2389 release_firmware(fw);
2390 return status;
2391}
2392
6b7c5b94
SP		 2393static struct net_device_ops be_netdev_ops = {
2394 .ndo_open = be_open,
2395 .ndo_stop = be_close,
2396 .ndo_start_xmit = be_xmit,
6b7c5b94
SP		 2397 .ndo_set_rx_mode = be_set_multicast_list,
2398 .ndo_set_mac_address = be_mac_addr_set,
2399 .ndo_change_mtu = be_change_mtu,
2400 .ndo_validate_addr = eth_validate_addr,
2401 .ndo_vlan_rx_register = be_vlan_register,
2402 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2403 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
64600ea5 2404 .ndo_set_vf_mac = be_set_vf_mac,
1da87b7f 2405 .ndo_set_vf_vlan = be_set_vf_vlan,
e1d18735 2406 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
64600ea5 2407 .ndo_get_vf_config = be_get_vf_config
6b7c5b94
SP		 2408};
2409
2410static void be_netdev_init(struct net_device *netdev)
2411{
2412 struct be_adapter *adapter = netdev_priv(netdev);
2413
2414 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34 2415 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
49e4b847 2416 NETIF_F_GRO | NETIF_F_TSO6;
6b7c5b94 2417
51c59870
AK		 2418 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2419
6b7c5b94
SP		 2420 netdev->flags |= IFF_MULTICAST;
2421
728a9972
AK		 2422 adapter->rx_csum = true;
2423
9e90c961
AK		 2424 /* Default settings for Rx and Tx flow control */
2425 adapter->rx_fc = true;
2426 adapter->tx_fc = true;
2427
c190e3c8
AK		 2428 netif_set_gso_max_size(netdev, 65535);
2429
6b7c5b94
SP		 2430 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2431
2432 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2433
6b7c5b94
SP		 2434 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2435 BE_NAPI_WEIGHT);
5fb379ee 2436 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 2437 BE_NAPI_WEIGHT);
2438
2439 netif_carrier_off(netdev);
2440 netif_stop_queue(netdev);
2441}
2442
2443static void be_unmap_pci_bars(struct be_adapter *adapter)
2444{
8788fdc2
SP		 2445 if (adapter->csr)
2446 iounmap(adapter->csr);
2447 if (adapter->db)
2448 iounmap(adapter->db);
ba343c77 2449 if (adapter->pcicfg && be_physfn(adapter))
8788fdc2 2450 iounmap(adapter->pcicfg);
6b7c5b94
SP		 2451}
2452
2453static int be_map_pci_bars(struct be_adapter *adapter)
2454{
2455 u8 __iomem *addr;
ba343c77 2456 int pcicfg_reg, db_reg;
6b7c5b94 2457
ba343c77
SB		 2458 if (be_physfn(adapter)) {
2459 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2460 pci_resource_len(adapter->pdev, 2));
2461 if (addr == NULL)
2462 return -ENOMEM;
2463 adapter->csr = addr;
2464 }
6b7c5b94 2465
ba343c77 2466 if (adapter->generation == BE_GEN2) {
7b139c83 2467 pcicfg_reg = 1;
ba343c77
SB		 2468 db_reg = 4;
2469 } else {
7b139c83 2470 pcicfg_reg = 0;
ba343c77
SB		 2471 if (be_physfn(adapter))
2472 db_reg = 4;
2473 else
2474 db_reg = 0;
2475 }
2476 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2477 pci_resource_len(adapter->pdev, db_reg));
6b7c5b94
SP		 2478 if (addr == NULL)
2479 goto pci_map_err;
ba343c77
SB		 2480 adapter->db = addr;
2481
2482 if (be_physfn(adapter)) {
2483 addr = ioremap_nocache(
2484 pci_resource_start(adapter->pdev, pcicfg_reg),
2485 pci_resource_len(adapter->pdev, pcicfg_reg));
2486 if (addr == NULL)
2487 goto pci_map_err;
2488 adapter->pcicfg = addr;
2489 } else
2490 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
6b7c5b94
SP		 2491
2492 return 0;
2493pci_map_err:
2494 be_unmap_pci_bars(adapter);
2495 return -ENOMEM;
2496}
2497
2498
2499static void be_ctrl_cleanup(struct be_adapter *adapter)
2500{
8788fdc2 2501 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 2502
2503 be_unmap_pci_bars(adapter);
2504
2505 if (mem->va)
2506 pci_free_consistent(adapter->pdev, mem->size,
2507 mem->va, mem->dma);
e7b909a6
SP		 2508
2509 mem = &adapter->mc_cmd_mem;
2510 if (mem->va)
2511 pci_free_consistent(adapter->pdev, mem->size,
2512 mem->va, mem->dma);
6b7c5b94
SP		 2513}
2514
6b7c5b94
SP		 2515static int be_ctrl_init(struct be_adapter *adapter)
2516{
8788fdc2
SP		 2517 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2518 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
e7b909a6 2519 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
6b7c5b94 2520 int status;
6b7c5b94
SP		 2521
2522 status = be_map_pci_bars(adapter);
2523 if (status)
e7b909a6 2524 goto done;
6b7c5b94
SP		 2525
2526 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2527 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2528 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2529 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 2530 status = -ENOMEM;
2531 goto unmap_pci_bars;
6b7c5b94 2532 }
e7b909a6 2533
6b7c5b94
SP		 2534 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2535 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2536 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2537 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6
SP		 2538
2539 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2540 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2541 &mc_cmd_mem->dma);
2542 if (mc_cmd_mem->va == NULL) {
2543 status = -ENOMEM;
2544 goto free_mbox;
2545 }
2546 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2547
8788fdc2
SP		 2548 spin_lock_init(&adapter->mbox_lock);
2549 spin_lock_init(&adapter->mcc_lock);
2550 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2551
dd131e76 2552 init_completion(&adapter->flash_compl);
cf588477 2553 pci_save_state(adapter->pdev);
6b7c5b94 2554 return 0;
e7b909a6
SP		 2555
2556free_mbox:
2557 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2558 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2559
2560unmap_pci_bars:
2561 be_unmap_pci_bars(adapter);
2562
2563done:
2564 return status;
6b7c5b94
SP		 2565}
2566
2567static void be_stats_cleanup(struct be_adapter *adapter)
2568{
2569 struct be_stats_obj *stats = &adapter->stats;
2570 struct be_dma_mem *cmd = &stats->cmd;
2571
2572 if (cmd->va)
2573 pci_free_consistent(adapter->pdev, cmd->size,
2574 cmd->va, cmd->dma);
2575}
2576
2577static int be_stats_init(struct be_adapter *adapter)
2578{
2579 struct be_stats_obj *stats = &adapter->stats;
2580 struct be_dma_mem *cmd = &stats->cmd;
2581
2582 cmd->size = sizeof(struct be_cmd_req_get_stats);
2583 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2584 if (cmd->va == NULL)
2585 return -1;
d291b9af 2586 memset(cmd->va, 0, cmd->size);
6b7c5b94
SP		 2587 return 0;
2588}
2589
2590static void __devexit be_remove(struct pci_dev *pdev)
2591{
2592 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 2593
6b7c5b94
SP		 2594 if (!adapter)
2595 return;
2596
2597 unregister_netdev(adapter->netdev);
2598
5fb379ee
SP		 2599 be_clear(adapter);
2600
6b7c5b94
SP		 2601 be_stats_cleanup(adapter);
2602
2603 be_ctrl_cleanup(adapter);
2604
ba343c77
SB		 2605 be_sriov_disable(adapter);
2606
8d56ff11 2607 be_msix_disable(adapter);
6b7c5b94
SP		 2608
2609 pci_set_drvdata(pdev, NULL);
2610 pci_release_regions(pdev);
2611 pci_disable_device(pdev);
2612
2613 free_netdev(adapter->netdev);
2614}
2615
2243e2e9 2616static int be_get_config(struct be_adapter *adapter)
6b7c5b94 2617{
6b7c5b94 2618 int status;
2243e2e9 2619 u8 mac[ETH_ALEN];
6b7c5b94 2620
2243e2e9 2621 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2622 if (status)
2623 return status;
2624
2243e2e9 2625 status = be_cmd_query_fw_cfg(adapter,
3486be29 2626 &adapter->port_num, &adapter->function_mode);
43a04fdc
SP		 2627 if (status)
2628 return status;
2629
2243e2e9 2630 memset(mac, 0, ETH_ALEN);
ba343c77
SB		 2631
2632 if (be_physfn(adapter)) {
2633 status = be_cmd_mac_addr_query(adapter, mac,
2243e2e9 2634 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
ca9e4988 2635
ba343c77
SB		 2636 if (status)
2637 return status;
ca9e4988 2638
ba343c77
SB		 2639 if (!is_valid_ether_addr(mac))
2640 return -EADDRNOTAVAIL;
2641
2642 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2643 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2644 }
6b7c5b94 2645
3486be29 2646 if (adapter->function_mode & 0x400)
82903e4b
AK		 2647 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2648 else
2649 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2650
2243e2e9 2651 return 0;
6b7c5b94
SP		 2652}
2653
2654static int __devinit be_probe(struct pci_dev *pdev,
2655 const struct pci_device_id *pdev_id)
2656{
2657 int status = 0;
2658 struct be_adapter *adapter;
2659 struct net_device *netdev;
6b7c5b94 2660
ba343c77 2661
6b7c5b94
SP		 2662 status = pci_enable_device(pdev);
2663 if (status)
2664 goto do_none;
2665
2666 status = pci_request_regions(pdev, DRV_NAME);
2667 if (status)
2668 goto disable_dev;
2669 pci_set_master(pdev);
2670
2671 netdev = alloc_etherdev(sizeof(struct be_adapter));
2672 if (netdev == NULL) {
2673 status = -ENOMEM;
2674 goto rel_reg;
2675 }
2676 adapter = netdev_priv(netdev);
7b139c83
AK		 2677
2678 switch (pdev->device) {
2679 case BE_DEVICE_ID1:
2680 case OC_DEVICE_ID1:
2681 adapter->generation = BE_GEN2;
2682 break;
2683 case BE_DEVICE_ID2:
2684 case OC_DEVICE_ID2:
2685 adapter->generation = BE_GEN3;
2686 break;
2687 default:
2688 adapter->generation = 0;
2689 }
2690
6b7c5b94
SP		 2691 adapter->pdev = pdev;
2692 pci_set_drvdata(pdev, adapter);
2693 adapter->netdev = netdev;
2243e2e9
SP		 2694 be_netdev_init(netdev);
2695 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94
SP		 2696
2697 be_msix_enable(adapter);
2698
e930438c 2699 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2700 if (!status) {
2701 netdev->features |= NETIF_F_HIGHDMA;
2702 } else {
e930438c 2703 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2704 if (status) {
2705 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2706 goto free_netdev;
2707 }
2708 }
2709
ba343c77
SB		 2710 be_sriov_enable(adapter);
2711
6b7c5b94
SP		 2712 status = be_ctrl_init(adapter);
2713 if (status)
2714 goto free_netdev;
2715
2243e2e9 2716 /* sync up with fw's ready state */
ba343c77
SB		 2717 if (be_physfn(adapter)) {
2718 status = be_cmd_POST(adapter);
2719 if (status)
2720 goto ctrl_clean;
ba343c77 2721 }
6b7c5b94 2722
2243e2e9
SP		 2723 /* tell fw we're ready to fire cmds */
2724 status = be_cmd_fw_init(adapter);
6b7c5b94 2725 if (status)
2243e2e9
SP		 2726 goto ctrl_clean;
2727
556ae191
SB		 2728 if (be_physfn(adapter)) {
2729 status = be_cmd_reset_function(adapter);
2730 if (status)
2731 goto ctrl_clean;
2732 }
2733
2243e2e9
SP		 2734 status = be_stats_init(adapter);
2735 if (status)
2736 goto ctrl_clean;
2737
2738 status = be_get_config(adapter);
6b7c5b94
SP		 2739 if (status)
2740 goto stats_clean;
6b7c5b94
SP		 2741
2742 INIT_DELAYED_WORK(&adapter->work, be_worker);
6b7c5b94 2743
5fb379ee
SP		 2744 status = be_setup(adapter);
2745 if (status)
2746 goto stats_clean;
2243e2e9 2747
6b7c5b94
SP		 2748 status = register_netdev(netdev);
2749 if (status != 0)
5fb379ee 2750 goto unsetup;
6b7c5b94 2751
c4ca2374 2752 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2753 return 0;
2754
5fb379ee
SP		 2755unsetup:
2756 be_clear(adapter);
6b7c5b94
SP		 2757stats_clean:
2758 be_stats_cleanup(adapter);
2759ctrl_clean:
2760 be_ctrl_cleanup(adapter);
2761free_netdev:
8d56ff11 2762 be_msix_disable(adapter);
ba343c77 2763 be_sriov_disable(adapter);
6b7c5b94 2764 free_netdev(adapter->netdev);
8d56ff11 2765 pci_set_drvdata(pdev, NULL);
6b7c5b94
SP		 2766rel_reg:
2767 pci_release_regions(pdev);
2768disable_dev:
2769 pci_disable_device(pdev);
2770do_none:
c4ca2374 2771 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2772 return status;
2773}
2774
2775static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2776{
2777 struct be_adapter *adapter = pci_get_drvdata(pdev);
2778 struct net_device *netdev = adapter->netdev;
2779
71d8d1b5
AK		 2780 if (adapter->wol)
2781 be_setup_wol(adapter, true);
2782
6b7c5b94
SP		 2783 netif_device_detach(netdev);
2784 if (netif_running(netdev)) {
2785 rtnl_lock();
2786 be_close(netdev);
2787 rtnl_unlock();
2788 }
9e90c961 2789 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
9b0365f1 2790 be_clear(adapter);
6b7c5b94
SP		 2791
2792 pci_save_state(pdev);
2793 pci_disable_device(pdev);
2794 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2795 return 0;
2796}
2797
2798static int be_resume(struct pci_dev *pdev)
2799{
2800 int status = 0;
2801 struct be_adapter *adapter = pci_get_drvdata(pdev);
2802 struct net_device *netdev = adapter->netdev;
2803
2804 netif_device_detach(netdev);
2805
2806 status = pci_enable_device(pdev);
2807 if (status)
2808 return status;
2809
2810 pci_set_power_state(pdev, 0);
2811 pci_restore_state(pdev);
2812
2243e2e9
SP		 2813 /* tell fw we're ready to fire cmds */
2814 status = be_cmd_fw_init(adapter);
2815 if (status)
2816 return status;
2817
9b0365f1 2818 be_setup(adapter);
6b7c5b94
SP		 2819 if (netif_running(netdev)) {
2820 rtnl_lock();
2821 be_open(netdev);
2822 rtnl_unlock();
2823 }
2824 netif_device_attach(netdev);
71d8d1b5
AK		 2825
2826 if (adapter->wol)
2827 be_setup_wol(adapter, false);
6b7c5b94
SP		 2828 return 0;
2829}
2830
82456b03
SP		 2831/*
2832 * An FLR will stop BE from DMAing any data.
2833 */
2834static void be_shutdown(struct pci_dev *pdev)
2835{
2836 struct be_adapter *adapter = pci_get_drvdata(pdev);
2837 struct net_device *netdev = adapter->netdev;
2838
2839 netif_device_detach(netdev);
2840
2841 be_cmd_reset_function(adapter);
2842
2843 if (adapter->wol)
2844 be_setup_wol(adapter, true);
2845
2846 pci_disable_device(pdev);
82456b03
SP		 2847}
2848
cf588477
SP		 2849static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2850 pci_channel_state_t state)
2851{
2852 struct be_adapter *adapter = pci_get_drvdata(pdev);
2853 struct net_device *netdev = adapter->netdev;
2854
2855 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2856
2857 adapter->eeh_err = true;
2858
2859 netif_device_detach(netdev);
2860
2861 if (netif_running(netdev)) {
2862 rtnl_lock();
2863 be_close(netdev);
2864 rtnl_unlock();
2865 }
2866 be_clear(adapter);
2867
2868 if (state == pci_channel_io_perm_failure)
2869 return PCI_ERS_RESULT_DISCONNECT;
2870
2871 pci_disable_device(pdev);
2872
2873 return PCI_ERS_RESULT_NEED_RESET;
2874}
2875
2876static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2877{
2878 struct be_adapter *adapter = pci_get_drvdata(pdev);
2879 int status;
2880
2881 dev_info(&adapter->pdev->dev, "EEH reset\n");
2882 adapter->eeh_err = false;
2883
2884 status = pci_enable_device(pdev);
2885 if (status)
2886 return PCI_ERS_RESULT_DISCONNECT;
2887
2888 pci_set_master(pdev);
2889 pci_set_power_state(pdev, 0);
2890 pci_restore_state(pdev);
2891
2892 /* Check if card is ok and fw is ready */
2893 status = be_cmd_POST(adapter);
2894 if (status)
2895 return PCI_ERS_RESULT_DISCONNECT;
2896
2897 return PCI_ERS_RESULT_RECOVERED;
2898}
2899
2900static void be_eeh_resume(struct pci_dev *pdev)
2901{
2902 int status = 0;
2903 struct be_adapter *adapter = pci_get_drvdata(pdev);
2904 struct net_device *netdev = adapter->netdev;
2905
2906 dev_info(&adapter->pdev->dev, "EEH resume\n");
2907
2908 pci_save_state(pdev);
2909
2910 /* tell fw we're ready to fire cmds */
2911 status = be_cmd_fw_init(adapter);
2912 if (status)
2913 goto err;
2914
2915 status = be_setup(adapter);
2916 if (status)
2917 goto err;
2918
2919 if (netif_running(netdev)) {
2920 status = be_open(netdev);
2921 if (status)
2922 goto err;
2923 }
2924 netif_device_attach(netdev);
2925 return;
2926err:
2927 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
cf588477
SP		 2928}
2929
2930static struct pci_error_handlers be_eeh_handlers = {
2931 .error_detected = be_eeh_err_detected,
2932 .slot_reset = be_eeh_reset,
2933 .resume = be_eeh_resume,
2934};
2935
6b7c5b94
SP		 2936static struct pci_driver be_driver = {
2937 .name = DRV_NAME,
2938 .id_table = be_dev_ids,
2939 .probe = be_probe,
2940 .remove = be_remove,
2941 .suspend = be_suspend,
cf588477 2942 .resume = be_resume,
82456b03 2943 .shutdown = be_shutdown,
cf588477 2944 .err_handler = &be_eeh_handlers
6b7c5b94
SP		 2945};
2946
2947static int __init be_init_module(void)
2948{
8e95a202
JP		 2949 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2950 rx_frag_size != 2048) {
6b7c5b94
SP		 2951 printk(KERN_WARNING DRV_NAME
2952 " : Module param rx_frag_size must be 2048/4096/8192."
2953 " Using 2048\n");
2954 rx_frag_size = 2048;
2955 }
6b7c5b94 2956
ba343c77
SB		 2957 if (num_vfs > 32) {
2958 printk(KERN_WARNING DRV_NAME
2959 " : Module param num_vfs must not be greater than 32."
2960 "Using 32\n");
2961 num_vfs = 32;
2962 }
2963
6b7c5b94
SP		 2964 return pci_register_driver(&be_driver);
2965}
2966module_init(be_init_module);
2967
2968static void __exit be_exit_module(void)
2969{
2970 pci_unregister_driver(&be_driver);
2971}
2972module_exit(be_exit_module);
Clone of davem's net-next-2.6 tree