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1da177e4 LT |
1 | /* |
2 | * amd76xrom.c | |
3 | * | |
4 | * Normal mappings of chips in physical memory | |
ff3bc4eb | 5 | * $Id: amd76xrom.c,v 1.20 2005/03/18 14:04:35 gleixner Exp $ |
1da177e4 LT |
6 | */ |
7 | ||
8 | #include <linux/module.h> | |
9 | #include <linux/types.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/init.h> | |
12 | #include <asm/io.h> | |
13 | #include <linux/mtd/mtd.h> | |
14 | #include <linux/mtd/map.h> | |
15 | #include <linux/mtd/cfi.h> | |
16 | #include <linux/mtd/flashchip.h> | |
17 | #include <linux/config.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/pci_ids.h> | |
20 | #include <linux/list.h> | |
21 | ||
22 | ||
23 | #define xstr(s) str(s) | |
24 | #define str(s) #s | |
25 | #define MOD_NAME xstr(KBUILD_BASENAME) | |
26 | ||
27 | #define ADDRESS_NAME_LEN 18 | |
28 | ||
29 | #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */ | |
30 | ||
31 | struct amd76xrom_window { | |
32 | void __iomem *virt; | |
33 | unsigned long phys; | |
34 | unsigned long size; | |
35 | struct list_head maps; | |
36 | struct resource rsrc; | |
37 | struct pci_dev *pdev; | |
38 | }; | |
39 | ||
40 | struct amd76xrom_map_info { | |
41 | struct list_head list; | |
42 | struct map_info map; | |
43 | struct mtd_info *mtd; | |
44 | struct resource rsrc; | |
45 | char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN]; | |
46 | }; | |
47 | ||
48 | static struct amd76xrom_window amd76xrom_window = { | |
49 | .maps = LIST_HEAD_INIT(amd76xrom_window.maps), | |
50 | }; | |
51 | ||
52 | static void amd76xrom_cleanup(struct amd76xrom_window *window) | |
53 | { | |
54 | struct amd76xrom_map_info *map, *scratch; | |
55 | u8 byte; | |
56 | ||
57 | if (window->pdev) { | |
58 | /* Disable writes through the rom window */ | |
59 | pci_read_config_byte(window->pdev, 0x40, &byte); | |
60 | pci_write_config_byte(window->pdev, 0x40, byte & ~1); | |
61 | } | |
62 | ||
63 | /* Free all of the mtd devices */ | |
64 | list_for_each_entry_safe(map, scratch, &window->maps, list) { | |
65 | if (map->rsrc.parent) { | |
66 | release_resource(&map->rsrc); | |
67 | } | |
68 | del_mtd_device(map->mtd); | |
69 | map_destroy(map->mtd); | |
70 | list_del(&map->list); | |
71 | kfree(map); | |
72 | } | |
73 | if (window->rsrc.parent) | |
74 | release_resource(&window->rsrc); | |
75 | ||
76 | if (window->virt) { | |
77 | iounmap(window->virt); | |
78 | window->virt = NULL; | |
79 | window->phys = 0; | |
80 | window->size = 0; | |
81 | window->pdev = NULL; | |
82 | } | |
83 | } | |
84 | ||
85 | ||
86 | static int __devinit amd76xrom_init_one (struct pci_dev *pdev, | |
87 | const struct pci_device_id *ent) | |
88 | { | |
89 | static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL }; | |
90 | u8 byte; | |
91 | struct amd76xrom_window *window = &amd76xrom_window; | |
92 | struct amd76xrom_map_info *map = NULL; | |
93 | unsigned long map_top; | |
94 | ||
95 | /* Remember the pci dev I find the window in */ | |
96 | window->pdev = pdev; | |
97 | ||
98 | /* Assume the rom window is properly setup, and find it's size */ | |
99 | pci_read_config_byte(pdev, 0x43, &byte); | |
100 | if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) { | |
101 | window->phys = 0xffb00000; /* 5MiB */ | |
102 | } | |
103 | else if ((byte & (1<<7)) == (1<<7)) { | |
104 | window->phys = 0xffc00000; /* 4MiB */ | |
105 | } | |
106 | else { | |
107 | window->phys = 0xffff0000; /* 64KiB */ | |
108 | } | |
109 | window->size = 0xffffffffUL - window->phys + 1UL; | |
110 | ||
111 | /* | |
112 | * Try to reserve the window mem region. If this fails then | |
113 | * it is likely due to a fragment of the window being | |
114 | * "reseved" by the BIOS. In the case that the | |
115 | * request_mem_region() fails then once the rom size is | |
116 | * discovered we will try to reserve the unreserved fragment. | |
117 | */ | |
118 | window->rsrc.name = MOD_NAME; | |
119 | window->rsrc.start = window->phys; | |
120 | window->rsrc.end = window->phys + window->size - 1; | |
121 | window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
122 | if (request_resource(&iomem_resource, &window->rsrc)) { | |
123 | window->rsrc.parent = NULL; | |
124 | printk(KERN_ERR MOD_NAME | |
125 | " %s(): Unable to register resource" | |
126 | " 0x%.08lx-0x%.08lx - kernel bug?\n", | |
127 | __func__, | |
128 | window->rsrc.start, window->rsrc.end); | |
129 | } | |
130 | ||
131 | #if 0 | |
132 | ||
133 | /* Enable the selected rom window */ | |
134 | pci_read_config_byte(pdev, 0x43, &byte); | |
135 | pci_write_config_byte(pdev, 0x43, byte | rwindow->segen_bits); | |
136 | #endif | |
137 | ||
138 | /* Enable writes through the rom window */ | |
139 | pci_read_config_byte(pdev, 0x40, &byte); | |
140 | pci_write_config_byte(pdev, 0x40, byte | 1); | |
141 | ||
142 | /* FIXME handle registers 0x80 - 0x8C the bios region locks */ | |
143 | ||
144 | /* For write accesses caches are useless */ | |
145 | window->virt = ioremap_nocache(window->phys, window->size); | |
146 | if (!window->virt) { | |
147 | printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", | |
148 | window->phys, window->size); | |
149 | goto out; | |
150 | } | |
151 | ||
152 | /* Get the first address to look for an rom chip at */ | |
153 | map_top = window->phys; | |
154 | #if 1 | |
155 | /* The probe sequence run over the firmware hub lock | |
156 | * registers sets them to 0x7 (no access). | |
157 | * Probe at most the last 4M of the address space. | |
158 | */ | |
159 | if (map_top < 0xffc00000) { | |
160 | map_top = 0xffc00000; | |
161 | } | |
162 | #endif | |
163 | /* Loop through and look for rom chips */ | |
164 | while((map_top - 1) < 0xffffffffUL) { | |
165 | struct cfi_private *cfi; | |
166 | unsigned long offset; | |
167 | int i; | |
168 | ||
169 | if (!map) { | |
170 | map = kmalloc(sizeof(*map), GFP_KERNEL); | |
171 | } | |
172 | if (!map) { | |
173 | printk(KERN_ERR MOD_NAME ": kmalloc failed"); | |
174 | goto out; | |
175 | } | |
176 | memset(map, 0, sizeof(*map)); | |
177 | INIT_LIST_HEAD(&map->list); | |
178 | map->map.name = map->map_name; | |
179 | map->map.phys = map_top; | |
180 | offset = map_top - window->phys; | |
181 | map->map.virt = (void __iomem *) | |
182 | (((unsigned long)(window->virt)) + offset); | |
183 | map->map.size = 0xffffffffUL - map_top + 1UL; | |
184 | /* Set the name of the map to the address I am trying */ | |
185 | sprintf(map->map_name, "%s @%08lx", | |
186 | MOD_NAME, map->map.phys); | |
187 | ||
188 | /* There is no generic VPP support */ | |
189 | for(map->map.bankwidth = 32; map->map.bankwidth; | |
190 | map->map.bankwidth >>= 1) | |
191 | { | |
192 | char **probe_type; | |
193 | /* Skip bankwidths that are not supported */ | |
194 | if (!map_bankwidth_supported(map->map.bankwidth)) | |
195 | continue; | |
196 | ||
197 | /* Setup the map methods */ | |
198 | simple_map_init(&map->map); | |
199 | ||
200 | /* Try all of the probe methods */ | |
201 | probe_type = rom_probe_types; | |
202 | for(; *probe_type; probe_type++) { | |
203 | map->mtd = do_map_probe(*probe_type, &map->map); | |
204 | if (map->mtd) | |
205 | goto found; | |
206 | } | |
207 | } | |
208 | map_top += ROM_PROBE_STEP_SIZE; | |
209 | continue; | |
210 | found: | |
211 | /* Trim the size if we are larger than the map */ | |
212 | if (map->mtd->size > map->map.size) { | |
213 | printk(KERN_WARNING MOD_NAME | |
214 | " rom(%u) larger than window(%lu). fixing...\n", | |
215 | map->mtd->size, map->map.size); | |
216 | map->mtd->size = map->map.size; | |
217 | } | |
218 | if (window->rsrc.parent) { | |
219 | /* | |
220 | * Registering the MTD device in iomem may not be possible | |
221 | * if there is a BIOS "reserved" and BUSY range. If this | |
222 | * fails then continue anyway. | |
223 | */ | |
224 | map->rsrc.name = map->map_name; | |
225 | map->rsrc.start = map->map.phys; | |
226 | map->rsrc.end = map->map.phys + map->mtd->size - 1; | |
227 | map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
228 | if (request_resource(&window->rsrc, &map->rsrc)) { | |
229 | printk(KERN_ERR MOD_NAME | |
230 | ": cannot reserve MTD resource\n"); | |
231 | map->rsrc.parent = NULL; | |
232 | } | |
233 | } | |
234 | ||
235 | /* Make the whole region visible in the map */ | |
236 | map->map.virt = window->virt; | |
237 | map->map.phys = window->phys; | |
238 | cfi = map->map.fldrv_priv; | |
239 | for(i = 0; i < cfi->numchips; i++) { | |
240 | cfi->chips[i].start += offset; | |
241 | } | |
242 | ||
243 | /* Now that the mtd devices is complete claim and export it */ | |
244 | map->mtd->owner = THIS_MODULE; | |
245 | if (add_mtd_device(map->mtd)) { | |
246 | map_destroy(map->mtd); | |
247 | map->mtd = NULL; | |
248 | goto out; | |
249 | } | |
250 | ||
251 | ||
252 | /* Calculate the new value of map_top */ | |
253 | map_top += map->mtd->size; | |
254 | ||
255 | /* File away the map structure */ | |
256 | list_add(&map->list, &window->maps); | |
257 | map = NULL; | |
258 | } | |
259 | ||
260 | out: | |
261 | /* Free any left over map structures */ | |
262 | if (map) { | |
263 | kfree(map); | |
264 | } | |
265 | /* See if I have any map structures */ | |
266 | if (list_empty(&window->maps)) { | |
267 | amd76xrom_cleanup(window); | |
268 | return -ENODEV; | |
269 | } | |
270 | return 0; | |
271 | } | |
272 | ||
273 | ||
274 | static void __devexit amd76xrom_remove_one (struct pci_dev *pdev) | |
275 | { | |
276 | struct amd76xrom_window *window = &amd76xrom_window; | |
277 | ||
278 | amd76xrom_cleanup(window); | |
279 | } | |
280 | ||
281 | static struct pci_device_id amd76xrom_pci_tbl[] = { | |
282 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, | |
283 | PCI_ANY_ID, PCI_ANY_ID, }, | |
284 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440, | |
285 | PCI_ANY_ID, PCI_ANY_ID, }, | |
286 | { PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */ | |
287 | { 0, } | |
288 | }; | |
289 | ||
290 | MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl); | |
291 | ||
292 | #if 0 | |
293 | static struct pci_driver amd76xrom_driver = { | |
294 | .name = MOD_NAME, | |
295 | .id_table = amd76xrom_pci_tbl, | |
296 | .probe = amd76xrom_init_one, | |
297 | .remove = amd76xrom_remove_one, | |
298 | }; | |
299 | #endif | |
300 | ||
301 | static int __init init_amd76xrom(void) | |
302 | { | |
303 | struct pci_dev *pdev; | |
304 | struct pci_device_id *id; | |
305 | pdev = NULL; | |
306 | for(id = amd76xrom_pci_tbl; id->vendor; id++) { | |
307 | pdev = pci_find_device(id->vendor, id->device, NULL); | |
308 | if (pdev) { | |
309 | break; | |
310 | } | |
311 | } | |
312 | if (pdev) { | |
313 | return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]); | |
314 | } | |
315 | return -ENXIO; | |
316 | #if 0 | |
ff3bc4eb | 317 | return pci_register_driver(&amd76xrom_driver); |
1da177e4 LT |
318 | #endif |
319 | } | |
320 | ||
321 | static void __exit cleanup_amd76xrom(void) | |
322 | { | |
323 | amd76xrom_remove_one(amd76xrom_window.pdev); | |
324 | } | |
325 | ||
326 | module_init(init_amd76xrom); | |
327 | module_exit(cleanup_amd76xrom); | |
328 | ||
329 | MODULE_LICENSE("GPL"); | |
330 | MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>"); | |
331 | MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge"); | |
332 |