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1da177e4
LT
1
2/*
3 * Linux driver for Disk-On-Chip Millennium
4 * (c) 1999 Machine Vision Holdings, Inc.
5 * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
1da177e4
LT
6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <asm/errno.h>
11#include <asm/io.h>
12#include <asm/uaccess.h>
1da177e4
LT
13#include <linux/delay.h>
14#include <linux/slab.h>
1da177e4
LT
15#include <linux/init.h>
16#include <linux/types.h>
17#include <linux/bitops.h>
18
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/doc2000.h>
22
23/* #define ECC_DEBUG */
24
25/* I have no idea why some DoC chips can not use memcop_form|to_io().
26 * This may be due to the different revisions of the ASIC controller built-in or
27 * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment
28 * this:*/
29#undef USE_MEMCPY
30
31static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
32 size_t *retlen, u_char *buf);
33static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
34 size_t *retlen, const u_char *buf);
8593fbc6
TG
35static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
36 struct mtd_oob_ops *ops);
37static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
38 struct mtd_oob_ops *ops);
1da177e4
LT
39static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);
40
41static struct mtd_info *docmillist = NULL;
42
43/* Perform the required delay cycles by reading from the NOP register */
44static void DoC_Delay(void __iomem * docptr, unsigned short cycles)
45{
46 volatile char dummy;
47 int i;
48
49 for (i = 0; i < cycles; i++)
50 dummy = ReadDOC(docptr, NOP);
51}
52
53/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
54static int _DoC_WaitReady(void __iomem * docptr)
55{
56 unsigned short c = 0xffff;
57
58 DEBUG(MTD_DEBUG_LEVEL3,
59 "_DoC_WaitReady called for out-of-line wait\n");
60
61 /* Out-of-line routine to wait for chip response */
62 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
63 ;
64
65 if (c == 0)
66 DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
67
68 return (c == 0);
69}
70
71static inline int DoC_WaitReady(void __iomem * docptr)
72{
73 /* This is inline, to optimise the common case, where it's ready instantly */
74 int ret = 0;
75
76 /* 4 read form NOP register should be issued in prior to the read from CDSNControl
77 see Software Requirement 11.4 item 2. */
78 DoC_Delay(docptr, 4);
79
80 if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
81 /* Call the out-of-line routine to wait */
82 ret = _DoC_WaitReady(docptr);
83
84 /* issue 2 read from NOP register after reading from CDSNControl register
85 see Software Requirement 11.4 item 2. */
86 DoC_Delay(docptr, 2);
87
88 return ret;
89}
90
91/* DoC_Command: Send a flash command to the flash chip through the CDSN IO register
92 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
93 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
94
858119e1 95static void DoC_Command(void __iomem * docptr, unsigned char command,
1da177e4
LT
96 unsigned char xtraflags)
97{
98 /* Assert the CLE (Command Latch Enable) line to the flash chip */
99 WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
100 DoC_Delay(docptr, 4);
101
102 /* Send the command */
103 WriteDOC(command, docptr, Mil_CDSN_IO);
104 WriteDOC(0x00, docptr, WritePipeTerm);
105
106 /* Lower the CLE line */
107 WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
108 DoC_Delay(docptr, 4);
109}
110
111/* DoC_Address: Set the current address for the flash chip through the CDSN IO register
112 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
113 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
114
115static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs,
116 unsigned char xtraflags1, unsigned char xtraflags2)
117{
118 /* Assert the ALE (Address Latch Enable) line to the flash chip */
119 WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
120 DoC_Delay(docptr, 4);
121
122 /* Send the address */
123 switch (numbytes)
124 {
125 case 1:
126 /* Send single byte, bits 0-7. */
127 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
128 WriteDOC(0x00, docptr, WritePipeTerm);
129 break;
130 case 2:
131 /* Send bits 9-16 followed by 17-23 */
132 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
133 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
134 WriteDOC(0x00, docptr, WritePipeTerm);
135 break;
136 case 3:
137 /* Send 0-7, 9-16, then 17-23 */
138 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
139 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
140 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
141 WriteDOC(0x00, docptr, WritePipeTerm);
142 break;
143 default:
144 return;
145 }
146
147 /* Lower the ALE line */
148 WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl);
149 DoC_Delay(docptr, 4);
150}
151
152/* DoC_SelectChip: Select a given flash chip within the current floor */
153static int DoC_SelectChip(void __iomem * docptr, int chip)
154{
155 /* Select the individual flash chip requested */
156 WriteDOC(chip, docptr, CDSNDeviceSelect);
157 DoC_Delay(docptr, 4);
158
159 /* Wait for it to be ready */
160 return DoC_WaitReady(docptr);
161}
162
163/* DoC_SelectFloor: Select a given floor (bank of flash chips) */
164static int DoC_SelectFloor(void __iomem * docptr, int floor)
165{
166 /* Select the floor (bank) of chips required */
167 WriteDOC(floor, docptr, FloorSelect);
168
169 /* Wait for the chip to be ready */
170 return DoC_WaitReady(docptr);
171}
172
173/* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
174static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
175{
176 int mfr, id, i, j;
177 volatile char dummy;
178
179 /* Page in the required floor/chip
180 FIXME: is this supported by Millennium ?? */
181 DoC_SelectFloor(doc->virtadr, floor);
182 DoC_SelectChip(doc->virtadr, chip);
183
184 /* Reset the chip, see Software Requirement 11.4 item 1. */
185 DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP);
186 DoC_WaitReady(doc->virtadr);
187
e5580fbe 188 /* Read the NAND chip ID: 1. Send ReadID command */
1da177e4
LT
189 DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP);
190
e5580fbe 191 /* Read the NAND chip ID: 2. Send address byte zero */
1da177e4
LT
192 DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00);
193
194 /* Read the manufacturer and device id codes of the flash device through
195 CDSN IO register see Software Requirement 11.4 item 5.*/
196 dummy = ReadDOC(doc->virtadr, ReadPipeInit);
197 DoC_Delay(doc->virtadr, 2);
198 mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO);
199
200 DoC_Delay(doc->virtadr, 2);
201 id = ReadDOC(doc->virtadr, Mil_CDSN_IO);
202 dummy = ReadDOC(doc->virtadr, LastDataRead);
203
204 /* No response - return failure */
205 if (mfr == 0xff || mfr == 0)
206 return 0;
207
208 /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */
209 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
210 if ( id == nand_flash_ids[i].id) {
211 /* Try to identify manufacturer */
212 for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
213 if (nand_manuf_ids[j].id == mfr)
214 break;
e5580fbe 215 }
1da177e4
LT
216 printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "
217 "Chip ID: %2.2X (%s:%s)\n",
218 mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name);
219 doc->mfr = mfr;
220 doc->id = id;
221 doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;
222 break;
223 }
224 }
225
226 if (nand_flash_ids[i].name == NULL)
227 return 0;
228 else
229 return 1;
230}
231
232/* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
233static void DoC_ScanChips(struct DiskOnChip *this)
234{
235 int floor, chip;
236 int numchips[MAX_FLOORS_MIL];
237 int ret;
238
239 this->numchips = 0;
240 this->mfr = 0;
241 this->id = 0;
242
243 /* For each floor, find the number of valid chips it contains */
244 for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) {
245 numchips[floor] = 0;
246 for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) {
247 ret = DoC_IdentChip(this, floor, chip);
248 if (ret) {
249 numchips[floor]++;
250 this->numchips++;
251 }
252 }
253 }
254 /* If there are none at all that we recognise, bail */
255 if (!this->numchips) {
256 printk("No flash chips recognised.\n");
257 return;
258 }
259
260 /* Allocate an array to hold the information for each chip */
261 this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL);
262 if (!this->chips){
263 printk("No memory for allocating chip info structures\n");
264 return;
265 }
266
e5580fbe 267 /* Fill out the chip array with {floor, chipno} for each
1da177e4
LT
268 * detected chip in the device. */
269 for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) {
270 for (chip = 0 ; chip < numchips[floor] ; chip++) {
271 this->chips[ret].floor = floor;
272 this->chips[ret].chip = chip;
273 this->chips[ret].curadr = 0;
274 this->chips[ret].curmode = 0x50;
275 ret++;
276 }
277 }
278
279 /* Calculate and print the total size of the device */
280 this->totlen = this->numchips * (1 << this->chipshift);
281 printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n",
282 this->numchips ,this->totlen >> 20);
283}
284
285static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2)
286{
287 int tmp1, tmp2, retval;
288
289 if (doc1->physadr == doc2->physadr)
290 return 1;
291
292 /* Use the alias resolution register which was set aside for this
293 * purpose. If it's value is the same on both chips, they might
294 * be the same chip, and we write to one and check for a change in
295 * the other. It's unclear if this register is usuable in the
296 * DoC 2000 (it's in the Millenium docs), but it seems to work. */
297 tmp1 = ReadDOC(doc1->virtadr, AliasResolution);
298 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
299 if (tmp1 != tmp2)
300 return 0;
e5580fbe 301
1da177e4
LT
302 WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution);
303 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
304 if (tmp2 == (tmp1+1) % 0xff)
305 retval = 1;
306 else
307 retval = 0;
308
309 /* Restore register contents. May not be necessary, but do it just to
310 * be safe. */
311 WriteDOC(tmp1, doc1->virtadr, AliasResolution);
312
313 return retval;
314}
315
5e535429
DW
316/* This routine is found from the docprobe code by symbol_get(),
317 * which will bump the use count of this module. */
318void DoCMil_init(struct mtd_info *mtd)
1da177e4
LT
319{
320 struct DiskOnChip *this = mtd->priv;
321 struct DiskOnChip *old = NULL;
322
323 /* We must avoid being called twice for the same device. */
324 if (docmillist)
325 old = docmillist->priv;
326
327 while (old) {
328 if (DoCMil_is_alias(this, old)) {
329 printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at "
330 "0x%lX - already configured\n", this->physadr);
331 iounmap(this->virtadr);
332 kfree(mtd);
333 return;
334 }
335 if (old->nextdoc)
336 old = old->nextdoc->priv;
337 else
338 old = NULL;
339 }
340
341 mtd->name = "DiskOnChip Millennium";
342 printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n",
343 this->physadr);
344
345 mtd->type = MTD_NANDFLASH;
346 mtd->flags = MTD_CAP_NANDFLASH;
1da177e4
LT
347 mtd->size = 0;
348
349 /* FIXME: erase size is not always 8KiB */
350 mtd->erasesize = 0x2000;
351
28318776 352 mtd->writesize = 512;
1da177e4
LT
353 mtd->oobsize = 16;
354 mtd->owner = THIS_MODULE;
355 mtd->erase = doc_erase;
356 mtd->point = NULL;
357 mtd->unpoint = NULL;
358 mtd->read = doc_read;
359 mtd->write = doc_write;
1da177e4
LT
360 mtd->read_oob = doc_read_oob;
361 mtd->write_oob = doc_write_oob;
362 mtd->sync = NULL;
363
364 this->totlen = 0;
365 this->numchips = 0;
366 this->curfloor = -1;
367 this->curchip = -1;
368
369 /* Ident all the chips present. */
370 DoC_ScanChips(this);
371
372 if (!this->totlen) {
373 kfree(mtd);
374 iounmap(this->virtadr);
375 } else {
376 this->nextdoc = docmillist;
377 docmillist = mtd;
378 mtd->size = this->totlen;
379 add_mtd_device(mtd);
380 return;
381 }
382}
f0ad11d0 383EXPORT_SYMBOL_GPL(DoCMil_init);
1da177e4
LT
384
385static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
386 size_t *retlen, u_char *buf)
1da177e4
LT
387{
388 int i, ret;
389 volatile char dummy;
7f8a8940 390 unsigned char syndrome[6], eccbuf[6];
1da177e4
LT
391 struct DiskOnChip *this = mtd->priv;
392 void __iomem *docptr = this->virtadr;
393 struct Nand *mychip = &this->chips[from >> (this->chipshift)];
394
395 /* Don't allow read past end of device */
396 if (from >= this->totlen)
397 return -EINVAL;
398
399 /* Don't allow a single read to cross a 512-byte block boundary */
e5580fbe 400 if (from + len > ((from | 0x1ff) + 1))
1da177e4
LT
401 len = ((from | 0x1ff) + 1) - from;
402
403 /* Find the chip which is to be used and select it */
404 if (this->curfloor != mychip->floor) {
405 DoC_SelectFloor(docptr, mychip->floor);
406 DoC_SelectChip(docptr, mychip->chip);
407 } else if (this->curchip != mychip->chip) {
408 DoC_SelectChip(docptr, mychip->chip);
409 }
410 this->curfloor = mychip->floor;
411 this->curchip = mychip->chip;
412
413 /* issue the Read0 or Read1 command depend on which half of the page
414 we are accessing. Polling the Flash Ready bit after issue 3 bytes
415 address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/
416 DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP);
417 DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00);
418 DoC_WaitReady(docptr);
419
7f8a8940
TG
420 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
421 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
422 WriteDOC (DOC_ECC_EN, docptr, ECCConf);
1da177e4
LT
423
424 /* Read the data via the internal pipeline through CDSN IO register,
425 see Pipelined Read Operations 11.3 */
426 dummy = ReadDOC(docptr, ReadPipeInit);
427#ifndef USE_MEMCPY
428 for (i = 0; i < len-1; i++) {
429 /* N.B. you have to increase the source address in this way or the
430 ECC logic will not work properly */
431 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
432 }
433#else
434 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
435#endif
436 buf[len - 1] = ReadDOC(docptr, LastDataRead);
437
438 /* Let the caller know we completed it */
439 *retlen = len;
440 ret = 0;
441
7f8a8940
TG
442 /* Read the ECC data from Spare Data Area,
443 see Reed-Solomon EDC/ECC 11.1 */
444 dummy = ReadDOC(docptr, ReadPipeInit);
1da177e4 445#ifndef USE_MEMCPY
7f8a8940
TG
446 for (i = 0; i < 5; i++) {
447 /* N.B. you have to increase the source address in this way or the
448 ECC logic will not work properly */
449 eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
450 }
1da177e4 451#else
7f8a8940 452 memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5);
1da177e4 453#endif
7f8a8940 454 eccbuf[5] = ReadDOC(docptr, LastDataRead);
1da177e4 455
7f8a8940
TG
456 /* Flush the pipeline */
457 dummy = ReadDOC(docptr, ECCConf);
458 dummy = ReadDOC(docptr, ECCConf);
1da177e4 459
7f8a8940
TG
460 /* Check the ECC Status */
461 if (ReadDOC(docptr, ECCConf) & 0x80) {
462 int nb_errors;
463 /* There was an ECC error */
1da177e4 464#ifdef ECC_DEBUG
7f8a8940 465 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
1da177e4 466#endif
7f8a8940
TG
467 /* Read the ECC syndrom through the DiskOnChip ECC logic.
468 These syndrome will be all ZERO when there is no error */
469 for (i = 0; i < 6; i++) {
470 syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
471 }
472 nb_errors = doc_decode_ecc(buf, syndrome);
1da177e4 473#ifdef ECC_DEBUG
7f8a8940 474 printk("ECC Errors corrected: %x\n", nb_errors);
1da177e4 475#endif
7f8a8940
TG
476 if (nb_errors < 0) {
477 /* We return error, but have actually done the read. Not that
478 this can be told to user-space, via sys_read(), but at least
479 MTD-aware stuff can know about it by checking *retlen */
480 ret = -EIO;
1da177e4 481 }
7f8a8940 482 }
1da177e4
LT
483
484#ifdef PSYCHO_DEBUG
7f8a8940
TG
485 printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
486 (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
487 eccbuf[4], eccbuf[5]);
1da177e4
LT
488#endif
489
7f8a8940
TG
490 /* disable the ECC engine */
491 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
1da177e4
LT
492
493 return ret;
494}
495
496static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
497 size_t *retlen, const u_char *buf)
1da177e4
LT
498{
499 int i,ret = 0;
7f8a8940 500 char eccbuf[6];
1da177e4
LT
501 volatile char dummy;
502 struct DiskOnChip *this = mtd->priv;
503 void __iomem *docptr = this->virtadr;
504 struct Nand *mychip = &this->chips[to >> (this->chipshift)];
505
506 /* Don't allow write past end of device */
507 if (to >= this->totlen)
508 return -EINVAL;
509
510#if 0
511 /* Don't allow a single write to cross a 512-byte block boundary */
e5580fbe 512 if (to + len > ( (to | 0x1ff) + 1))
1da177e4
LT
513 len = ((to | 0x1ff) + 1) - to;
514#else
515 /* Don't allow writes which aren't exactly one block */
516 if (to & 0x1ff || len != 0x200)
517 return -EINVAL;
518#endif
519
520 /* Find the chip which is to be used and select it */
521 if (this->curfloor != mychip->floor) {
522 DoC_SelectFloor(docptr, mychip->floor);
523 DoC_SelectChip(docptr, mychip->chip);
524 } else if (this->curchip != mychip->chip) {
525 DoC_SelectChip(docptr, mychip->chip);
526 }
527 this->curfloor = mychip->floor;
528 this->curchip = mychip->chip;
529
530 /* Reset the chip, see Software Requirement 11.4 item 1. */
531 DoC_Command(docptr, NAND_CMD_RESET, 0x00);
532 DoC_WaitReady(docptr);
533 /* Set device to main plane of flash */
534 DoC_Command(docptr, NAND_CMD_READ0, 0x00);
535
536 /* issue the Serial Data In command to initial the Page Program process */
537 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
538 DoC_Address(docptr, 3, to, 0x00, 0x00);
539 DoC_WaitReady(docptr);
540
7f8a8940
TG
541 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
542 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
543 WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
1da177e4
LT
544
545 /* Write the data via the internal pipeline through CDSN IO register,
546 see Pipelined Write Operations 11.2 */
547#ifndef USE_MEMCPY
548 for (i = 0; i < len; i++) {
549 /* N.B. you have to increase the source address in this way or the
550 ECC logic will not work properly */
551 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
552 }
553#else
554 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
555#endif
556 WriteDOC(0x00, docptr, WritePipeTerm);
557
7f8a8940
TG
558 /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic
559 see Reed-Solomon EDC/ECC 11.1 */
560 WriteDOC(0, docptr, NOP);
561 WriteDOC(0, docptr, NOP);
562 WriteDOC(0, docptr, NOP);
1da177e4 563
7f8a8940
TG
564 /* Read the ECC data through the DiskOnChip ECC logic */
565 for (i = 0; i < 6; i++) {
566 eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i);
567 }
1da177e4 568
7f8a8940
TG
569 /* ignore the ECC engine */
570 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
1da177e4
LT
571
572#ifndef USE_MEMCPY
7f8a8940
TG
573 /* Write the ECC data to flash */
574 for (i = 0; i < 6; i++) {
575 /* N.B. you have to increase the source address in this way or the
576 ECC logic will not work properly */
577 WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i);
578 }
1da177e4 579#else
7f8a8940 580 memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6);
1da177e4
LT
581#endif
582
7f8a8940
TG
583 /* write the block status BLOCK_USED (0x5555) at the end of ECC data
584 FIXME: this is only a hack for programming the IPL area for LinuxBIOS
585 and should be replace with proper codes in user space utilities */
586 WriteDOC(0x55, docptr, Mil_CDSN_IO);
587 WriteDOC(0x55, docptr, Mil_CDSN_IO + 1);
1da177e4 588
7f8a8940 589 WriteDOC(0x00, docptr, WritePipeTerm);
1da177e4
LT
590
591#ifdef PSYCHO_DEBUG
7f8a8940
TG
592 printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
593 (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
594 eccbuf[4], eccbuf[5]);
1da177e4 595#endif
1da177e4
LT
596
597 /* Commit the Page Program command and wait for ready
598 see Software Requirement 11.4 item 1.*/
599 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
600 DoC_WaitReady(docptr);
601
602 /* Read the status of the flash device through CDSN IO register
603 see Software Requirement 11.4 item 5.*/
604 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
605 dummy = ReadDOC(docptr, ReadPipeInit);
606 DoC_Delay(docptr, 2);
607 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
608 printk("Error programming flash\n");
609 /* Error in programming
610 FIXME: implement Bad Block Replacement (in nftl.c ??) */
611 *retlen = 0;
612 ret = -EIO;
613 }
614 dummy = ReadDOC(docptr, LastDataRead);
615
616 /* Let the caller know we completed it */
617 *retlen = len;
618
619 return ret;
620}
621
8593fbc6
TG
622static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
623 struct mtd_oob_ops *ops)
1da177e4
LT
624{
625#ifndef USE_MEMCPY
626 int i;
627#endif
628 volatile char dummy;
629 struct DiskOnChip *this = mtd->priv;
630 void __iomem *docptr = this->virtadr;
631 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
8593fbc6
TG
632 uint8_t *buf = ops->oobbuf;
633 size_t len = ops->len;
634
635 BUG_ON(ops->mode != MTD_OOB_PLACE);
636
637 ofs += ops->ooboffs;
1da177e4
LT
638
639 /* Find the chip which is to be used and select it */
640 if (this->curfloor != mychip->floor) {
641 DoC_SelectFloor(docptr, mychip->floor);
642 DoC_SelectChip(docptr, mychip->chip);
643 } else if (this->curchip != mychip->chip) {
644 DoC_SelectChip(docptr, mychip->chip);
645 }
646 this->curfloor = mychip->floor;
647 this->curchip = mychip->chip;
648
649 /* disable the ECC engine */
650 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
651 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
652
653 /* issue the Read2 command to set the pointer to the Spare Data Area.
654 Polling the Flash Ready bit after issue 3 bytes address in
655 Sequence Read Mode, see Software Requirement 11.4 item 1.*/
656 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
657 DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00);
658 DoC_WaitReady(docptr);
659
660 /* Read the data out via the internal pipeline through CDSN IO register,
661 see Pipelined Read Operations 11.3 */
662 dummy = ReadDOC(docptr, ReadPipeInit);
663#ifndef USE_MEMCPY
664 for (i = 0; i < len-1; i++) {
665 /* N.B. you have to increase the source address in this way or the
666 ECC logic will not work properly */
667 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
668 }
669#else
670 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
671#endif
672 buf[len - 1] = ReadDOC(docptr, LastDataRead);
673
8593fbc6 674 ops->retlen = len;
1da177e4
LT
675
676 return 0;
677}
678
8593fbc6
TG
679static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
680 struct mtd_oob_ops *ops)
1da177e4
LT
681{
682#ifndef USE_MEMCPY
683 int i;
684#endif
685 volatile char dummy;
686 int ret = 0;
687 struct DiskOnChip *this = mtd->priv;
688 void __iomem *docptr = this->virtadr;
689 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
8593fbc6
TG
690 uint8_t *buf = ops->oobbuf;
691 size_t len = ops->len;
692
693 BUG_ON(ops->mode != MTD_OOB_PLACE);
694
695 ofs += ops->ooboffs;
1da177e4
LT
696
697 /* Find the chip which is to be used and select it */
698 if (this->curfloor != mychip->floor) {
699 DoC_SelectFloor(docptr, mychip->floor);
700 DoC_SelectChip(docptr, mychip->chip);
701 } else if (this->curchip != mychip->chip) {
702 DoC_SelectChip(docptr, mychip->chip);
703 }
704 this->curfloor = mychip->floor;
705 this->curchip = mychip->chip;
706
707 /* disable the ECC engine */
708 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
709 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
710
711 /* Reset the chip, see Software Requirement 11.4 item 1. */
712 DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP);
713 DoC_WaitReady(docptr);
714 /* issue the Read2 command to set the pointer to the Spare Data Area. */
715 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
716
717 /* issue the Serial Data In command to initial the Page Program process */
718 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
719 DoC_Address(docptr, 3, ofs, 0x00, 0x00);
720
721 /* Write the data via the internal pipeline through CDSN IO register,
722 see Pipelined Write Operations 11.2 */
723#ifndef USE_MEMCPY
724 for (i = 0; i < len; i++) {
725 /* N.B. you have to increase the source address in this way or the
726 ECC logic will not work properly */
727 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
728 }
729#else
730 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
731#endif
732 WriteDOC(0x00, docptr, WritePipeTerm);
733
734 /* Commit the Page Program command and wait for ready
735 see Software Requirement 11.4 item 1.*/
736 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
737 DoC_WaitReady(docptr);
738
739 /* Read the status of the flash device through CDSN IO register
740 see Software Requirement 11.4 item 5.*/
741 DoC_Command(docptr, NAND_CMD_STATUS, 0x00);
742 dummy = ReadDOC(docptr, ReadPipeInit);
743 DoC_Delay(docptr, 2);
744 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
745 printk("Error programming oob data\n");
746 /* FIXME: implement Bad Block Replacement (in nftl.c ??) */
8593fbc6 747 ops->retlen = 0;
1da177e4
LT
748 ret = -EIO;
749 }
750 dummy = ReadDOC(docptr, LastDataRead);
751
8593fbc6 752 ops->retlen = len;
1da177e4
LT
753
754 return ret;
755}
756
757int doc_erase (struct mtd_info *mtd, struct erase_info *instr)
758{
759 volatile char dummy;
760 struct DiskOnChip *this = mtd->priv;
761 __u32 ofs = instr->addr;
762 __u32 len = instr->len;
763 void __iomem *docptr = this->virtadr;
764 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
765
e5580fbe 766 if (len != mtd->erasesize)
1da177e4
LT
767 printk(KERN_WARNING "Erase not right size (%x != %x)n",
768 len, mtd->erasesize);
769
770 /* Find the chip which is to be used and select it */
771 if (this->curfloor != mychip->floor) {
772 DoC_SelectFloor(docptr, mychip->floor);
773 DoC_SelectChip(docptr, mychip->chip);
774 } else if (this->curchip != mychip->chip) {
775 DoC_SelectChip(docptr, mychip->chip);
776 }
777 this->curfloor = mychip->floor;
778 this->curchip = mychip->chip;
779
780 instr->state = MTD_ERASE_PENDING;
781
782 /* issue the Erase Setup command */
783 DoC_Command(docptr, NAND_CMD_ERASE1, 0x00);
784 DoC_Address(docptr, 2, ofs, 0x00, 0x00);
785
786 /* Commit the Erase Start command and wait for ready
787 see Software Requirement 11.4 item 1.*/
788 DoC_Command(docptr, NAND_CMD_ERASE2, 0x00);
789 DoC_WaitReady(docptr);
790
791 instr->state = MTD_ERASING;
792
793 /* Read the status of the flash device through CDSN IO register
794 see Software Requirement 11.4 item 5.
795 FIXME: it seems that we are not wait long enough, some blocks are not
796 erased fully */
797 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
798 dummy = ReadDOC(docptr, ReadPipeInit);
799 DoC_Delay(docptr, 2);
800 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
801 printk("Error Erasing at 0x%x\n", ofs);
802 /* There was an error
803 FIXME: implement Bad Block Replacement (in nftl.c ??) */
804 instr->state = MTD_ERASE_FAILED;
805 } else
806 instr->state = MTD_ERASE_DONE;
807 dummy = ReadDOC(docptr, LastDataRead);
808
809 mtd_erase_callback(instr);
810
811 return 0;
812}
813
814/****************************************************************************
815 *
816 * Module stuff
817 *
818 ****************************************************************************/
819
1da177e4
LT
820static void __exit cleanup_doc2001(void)
821{
822 struct mtd_info *mtd;
823 struct DiskOnChip *this;
824
825 while ((mtd=docmillist)) {
826 this = mtd->priv;
827 docmillist = this->nextdoc;
e5580fbe 828
1da177e4 829 del_mtd_device(mtd);
e5580fbe 830
1da177e4
LT
831 iounmap(this->virtadr);
832 kfree(this->chips);
833 kfree(mtd);
834 }
1da177e4
LT
835}
836
837module_exit(cleanup_doc2001);
1da177e4
LT
838
839MODULE_LICENSE("GPL");
840MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
841MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium");