git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| 1f948b43 | 1 | /* |
| 1da177e4 LT |
2 | Common Flash Interface probe code. |
| 3 | (C) 2000 Red Hat. GPL'd. | |
| 1f948b43 | 4 | $Id: jedec_probe.c,v 1.66 2005/11/07 11:14:23 gleixner Exp $ |
| 1da177e4 LT |
5 | See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5) |
| 6 | for the standard this probe goes back to. | |
| 7 | ||
| 8 | Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com | |
| 9 | */ | |
| 10 | ||
| 1da177e4 LT |
11 | #include <linux/module.h> |
| 12 | #include <linux/init.h> | |
| 13 | #include <linux/types.h> | |
| 14 | #include <linux/kernel.h> | |
| 15 | #include <asm/io.h> | |
| 16 | #include <asm/byteorder.h> | |
| 17 | #include <linux/errno.h> | |
| 18 | #include <linux/slab.h> | |
| 19 | #include <linux/interrupt.h> | |
| 1da177e4 LT |
20 | |
| 21 | #include <linux/mtd/mtd.h> | |
| 22 | #include <linux/mtd/map.h> | |
| 23 | #include <linux/mtd/cfi.h> | |
| 24 | #include <linux/mtd/gen_probe.h> | |
| 25 | ||
| 26 | /* Manufacturers */ | |
| 27 | #define MANUFACTURER_AMD 0x0001 | |
| 28 | #define MANUFACTURER_ATMEL 0x001f | |
| 29 | #define MANUFACTURER_FUJITSU 0x0004 | |
| 30 | #define MANUFACTURER_HYUNDAI 0x00AD | |
| 31 | #define MANUFACTURER_INTEL 0x0089 | |
| 32 | #define MANUFACTURER_MACRONIX 0x00C2 | |
| 33 | #define MANUFACTURER_NEC 0x0010 | |
| 34 | #define MANUFACTURER_PMC 0x009D | |
| a63ec1b7 | 35 | #define MANUFACTURER_SHARP 0x00b0 |
| 1da177e4 LT |
36 | #define MANUFACTURER_SST 0x00BF |
| 37 | #define MANUFACTURER_ST 0x0020 | |
| 38 | #define MANUFACTURER_TOSHIBA 0x0098 | |
| 39 | #define MANUFACTURER_WINBOND 0x00da | |
| 40 | ||
| 41 | ||
| 42 | /* AMD */ | |
| 43 | #define AM29DL800BB 0x22C8 | |
| 44 | #define AM29DL800BT 0x224A | |
| 45 | ||
| 46 | #define AM29F800BB 0x2258 | |
| 47 | #define AM29F800BT 0x22D6 | |
| 48 | #define AM29LV400BB 0x22BA | |
| 49 | #define AM29LV400BT 0x22B9 | |
| 50 | #define AM29LV800BB 0x225B | |
| 51 | #define AM29LV800BT 0x22DA | |
| 52 | #define AM29LV160DT 0x22C4 | |
| 53 | #define AM29LV160DB 0x2249 | |
| 54 | #define AM29F017D 0x003D | |
| 55 | #define AM29F016D 0x00AD | |
| 56 | #define AM29F080 0x00D5 | |
| 57 | #define AM29F040 0x00A4 | |
| 58 | #define AM29LV040B 0x004F | |
| 59 | #define AM29F032B 0x0041 | |
| 60 | #define AM29F002T 0x00B0 | |
| 61 | ||
| 62 | /* Atmel */ | |
| 63 | #define AT49BV512 0x0003 | |
| 64 | #define AT29LV512 0x003d | |
| 65 | #define AT49BV16X 0x00C0 | |
| 66 | #define AT49BV16XT 0x00C2 | |
| 67 | #define AT49BV32X 0x00C8 | |
| 68 | #define AT49BV32XT 0x00C9 | |
| 69 | ||
| 70 | /* Fujitsu */ | |
| 71 | #define MBM29F040C 0x00A4 | |
| c9856e39 | 72 | #define MBM29F800BA 0x2258 |
| 1da177e4 LT |
73 | #define MBM29LV650UE 0x22D7 |
| 74 | #define MBM29LV320TE 0x22F6 | |
| 75 | #define MBM29LV320BE 0x22F9 | |
| 76 | #define MBM29LV160TE 0x22C4 | |
| 77 | #define MBM29LV160BE 0x2249 | |
| 78 | #define MBM29LV800BA 0x225B | |
| 79 | #define MBM29LV800TA 0x22DA | |
| 80 | #define MBM29LV400TC 0x22B9 | |
| 81 | #define MBM29LV400BC 0x22BA | |
| 82 | ||
| 83 | /* Hyundai */ | |
| 84 | #define HY29F002T 0x00B0 | |
| 85 | ||
| 86 | /* Intel */ | |
| 87 | #define I28F004B3T 0x00d4 | |
| 88 | #define I28F004B3B 0x00d5 | |
| 89 | #define I28F400B3T 0x8894 | |
| 90 | #define I28F400B3B 0x8895 | |
| 91 | #define I28F008S5 0x00a6 | |
| 92 | #define I28F016S5 0x00a0 | |
| 93 | #define I28F008SA 0x00a2 | |
| 94 | #define I28F008B3T 0x00d2 | |
| 95 | #define I28F008B3B 0x00d3 | |
| 96 | #define I28F800B3T 0x8892 | |
| 97 | #define I28F800B3B 0x8893 | |
| 98 | #define I28F016S3 0x00aa | |
| 99 | #define I28F016B3T 0x00d0 | |
| 100 | #define I28F016B3B 0x00d1 | |
| 101 | #define I28F160B3T 0x8890 | |
| 102 | #define I28F160B3B 0x8891 | |
| 103 | #define I28F320B3T 0x8896 | |
| 104 | #define I28F320B3B 0x8897 | |
| 105 | #define I28F640B3T 0x8898 | |
| 106 | #define I28F640B3B 0x8899 | |
| 107 | #define I82802AB 0x00ad | |
| 108 | #define I82802AC 0x00ac | |
| 109 | ||
| 110 | /* Macronix */ | |
| 111 | #define MX29LV040C 0x004F | |
| 112 | #define MX29LV160T 0x22C4 | |
| 113 | #define MX29LV160B 0x2249 | |
| c4e6952f | 114 | #define MX29F040 0x00A4 |
| 1da177e4 LT |
115 | #define MX29F016 0x00AD |
| 116 | #define MX29F002T 0x00B0 | |
| 117 | #define MX29F004T 0x0045 | |
| 118 | #define MX29F004B 0x0046 | |
| 119 | ||
| 120 | /* NEC */ | |
| 121 | #define UPD29F064115 0x221C | |
| 122 | ||
| 123 | /* PMC */ | |
| 124 | #define PM49FL002 0x006D | |
| 125 | #define PM49FL004 0x006E | |
| 126 | #define PM49FL008 0x006A | |
| 127 | ||
| a63ec1b7 PM |
128 | /* Sharp */ |
| 129 | #define LH28F640BF 0x00b0 | |
| 130 | ||
| 1da177e4 | 131 | /* ST - www.st.com */ |
| c9856e39 | 132 | #define M29F800AB 0x0058 |
| 1da177e4 LT |
133 | #define M29W800DT 0x00D7 |
| 134 | #define M29W800DB 0x005B | |
| 135 | #define M29W160DT 0x22C4 | |
| 136 | #define M29W160DB 0x2249 | |
| 137 | #define M29W040B 0x00E3 | |
| 138 | #define M50FW040 0x002C | |
| 139 | #define M50FW080 0x002D | |
| 140 | #define M50FW016 0x002E | |
| 141 | #define M50LPW080 0x002F | |
| 142 | ||
| 143 | /* SST */ | |
| 144 | #define SST29EE020 0x0010 | |
| 145 | #define SST29LE020 0x0012 | |
| 146 | #define SST29EE512 0x005d | |
| 147 | #define SST29LE512 0x003d | |
| 148 | #define SST39LF800 0x2781 | |
| 149 | #define SST39LF160 0x2782 | |
| 88ec7c50 | 150 | #define SST39VF1601 0x234b |
| 1da177e4 LT |
151 | #define SST39LF512 0x00D4 |
| 152 | #define SST39LF010 0x00D5 | |
| 153 | #define SST39LF020 0x00D6 | |
| 154 | #define SST39LF040 0x00D7 | |
| 155 | #define SST39SF010A 0x00B5 | |
| 156 | #define SST39SF020A 0x00B6 | |
| 157 | #define SST49LF004B 0x0060 | |
| 89072ef9 | 158 | #define SST49LF040B 0x0050 |
| 1da177e4 LT |
159 | #define SST49LF008A 0x005a |
| 160 | #define SST49LF030A 0x001C | |
| 161 | #define SST49LF040A 0x0051 | |
| 162 | #define SST49LF080A 0x005B | |
| 163 | ||
| 164 | /* Toshiba */ | |
| 165 | #define TC58FVT160 0x00C2 | |
| 166 | #define TC58FVB160 0x0043 | |
| 167 | #define TC58FVT321 0x009A | |
| 168 | #define TC58FVB321 0x009C | |
| 169 | #define TC58FVT641 0x0093 | |
| 170 | #define TC58FVB641 0x0095 | |
| 171 | ||
| 172 | /* Winbond */ | |
| 173 | #define W49V002A 0x00b0 | |
| 174 | ||
| 175 | ||
| 176 | /* | |
| 177 | * Unlock address sets for AMD command sets. | |
| 178 | * Intel command sets use the MTD_UADDR_UNNECESSARY. | |
| 179 | * Each identifier, except MTD_UADDR_UNNECESSARY, and | |
| 180 | * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[]. | |
| 181 | * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure | |
| 182 | * initialization need not require initializing all of the | |
| 183 | * unlock addresses for all bit widths. | |
| 184 | */ | |
| 185 | enum uaddr { | |
| 186 | MTD_UADDR_NOT_SUPPORTED = 0, /* data width not supported */ | |
| 187 | MTD_UADDR_0x0555_0x02AA, | |
| 188 | MTD_UADDR_0x0555_0x0AAA, | |
| 189 | MTD_UADDR_0x5555_0x2AAA, | |
| 190 | MTD_UADDR_0x0AAA_0x0555, | |
| 191 | MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */ | |
| 192 | MTD_UADDR_UNNECESSARY, /* Does not require any address */ | |
| 193 | }; | |
| 194 | ||
| 195 | ||
| 196 | struct unlock_addr { | |
| 5d3cce3b DW |
197 | uint32_t addr1; |
| 198 | uint32_t addr2; | |
| 1da177e4 LT |
199 | }; |
| 200 | ||
| 201 | ||
| 202 | /* | |
| 203 | * I don't like the fact that the first entry in unlock_addrs[] | |
| 204 | * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore, | |
| 205 | * should not be used. The problem is that structures with | |
| 206 | * initializers have extra fields initialized to 0. It is _very_ | |
| 207 | * desireable to have the unlock address entries for unsupported | |
| 208 | * data widths automatically initialized - that means that | |
| 209 | * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here | |
| 210 | * must go unused. | |
| 211 | */ | |
| 212 | static const struct unlock_addr unlock_addrs[] = { | |
| 213 | [MTD_UADDR_NOT_SUPPORTED] = { | |
| 214 | .addr1 = 0xffff, | |
| 215 | .addr2 = 0xffff | |
| 216 | }, | |
| 217 | ||
| 218 | [MTD_UADDR_0x0555_0x02AA] = { | |
| 219 | .addr1 = 0x0555, | |
| 220 | .addr2 = 0x02aa | |
| 221 | }, | |
| 222 | ||
| 223 | [MTD_UADDR_0x0555_0x0AAA] = { | |
| 224 | .addr1 = 0x0555, | |
| 225 | .addr2 = 0x0aaa | |
| 226 | }, | |
| 227 | ||
| 228 | [MTD_UADDR_0x5555_0x2AAA] = { | |
| 229 | .addr1 = 0x5555, | |
| 230 | .addr2 = 0x2aaa | |
| 231 | }, | |
| 232 | ||
| 233 | [MTD_UADDR_0x0AAA_0x0555] = { | |
| 234 | .addr1 = 0x0AAA, | |
| 235 | .addr2 = 0x0555 | |
| 236 | }, | |
| 237 | ||
| 238 | [MTD_UADDR_DONT_CARE] = { | |
| 239 | .addr1 = 0x0000, /* Doesn't matter which address */ | |
| 240 | .addr2 = 0x0000 /* is used - must be last entry */ | |
| 241 | }, | |
| 242 | ||
| 243 | [MTD_UADDR_UNNECESSARY] = { | |
| 244 | .addr1 = 0x0000, | |
| 245 | .addr2 = 0x0000 | |
| 246 | } | |
| 247 | }; | |
| 248 | ||
| 1da177e4 | 249 | struct amd_flash_info { |
| 1da177e4 | 250 | const char *name; |
| 5d3cce3b DW |
251 | const uint16_t mfr_id; |
| 252 | const uint16_t dev_id; | |
| 253 | const uint8_t dev_size; | |
| 254 | const uint8_t nr_regions; | |
| 255 | const uint16_t cmd_set; | |
| 256 | const uint32_t regions[6]; | |
| 257 | const uint8_t devtypes; /* Bitmask for x8, x16 etc. */ | |
| 258 | const uint8_t uaddr; /* unlock addrs for 8, 16, 32, 64 */ | |
| 1da177e4 LT |
259 | }; |
| 260 | ||
| 261 | #define ERASEINFO(size,blocks) (size<<8)|(blocks-1) | |
| 262 | ||
| 263 | #define SIZE_64KiB 16 | |
| 264 | #define SIZE_128KiB 17 | |
| 265 | #define SIZE_256KiB 18 | |
| 266 | #define SIZE_512KiB 19 | |
| 267 | #define SIZE_1MiB 20 | |
| 268 | #define SIZE_2MiB 21 | |
| 269 | #define SIZE_4MiB 22 | |
| 270 | #define SIZE_8MiB 23 | |
| 271 | ||
| 272 | ||
| 273 | /* | |
| 274 | * Please keep this list ordered by manufacturer! | |
| 275 | * Fortunately, the list isn't searched often and so a | |
| 276 | * slow, linear search isn't so bad. | |
| 277 | */ | |
| 278 | static const struct amd_flash_info jedec_table[] = { | |
| 279 | { | |
| 280 | .mfr_id = MANUFACTURER_AMD, | |
| 281 | .dev_id = AM29F032B, | |
| 282 | .name = "AMD AM29F032B", | |
| 5d3cce3b DW |
283 | .uaddr = MTD_UADDR_0x0555_0x02AA, |
| 284 | .devtypes = CFI_DEVICETYPE_X8, | |
| 285 | .dev_size = SIZE_4MiB, | |
| 286 | .cmd_set = P_ID_AMD_STD, | |
| 287 | .nr_regions = 1, | |
| 1da177e4 LT |
288 | .regions = { |
| 289 | ERASEINFO(0x10000,64) | |
| 290 | } | |
| 291 | }, { | |
| 292 | .mfr_id = MANUFACTURER_AMD, | |
| 293 | .dev_id = AM29LV160DT, | |
| 294 | .name = "AMD AM29LV160DT", | |
| 5d3cce3b DW |
295 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 296 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 297 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 298 | .dev_size = SIZE_2MiB, | |
| 299 | .cmd_set = P_ID_AMD_STD, | |
| 300 | .nr_regions = 4, | |
| 1da177e4 LT |
301 | .regions = { |
| 302 | ERASEINFO(0x10000,31), | |
| 303 | ERASEINFO(0x08000,1), | |
| 304 | ERASEINFO(0x02000,2), | |
| 305 | ERASEINFO(0x04000,1) | |
| 306 | } | |
| 307 | }, { | |
| 308 | .mfr_id = MANUFACTURER_AMD, | |
| 309 | .dev_id = AM29LV160DB, | |
| 310 | .name = "AMD AM29LV160DB", | |
| 5d3cce3b DW |
311 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 312 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 313 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 314 | .dev_size = SIZE_2MiB, | |
| 315 | .cmd_set = P_ID_AMD_STD, | |
| 316 | .nr_regions = 4, | |
| 1da177e4 LT |
317 | .regions = { |
| 318 | ERASEINFO(0x04000,1), | |
| 319 | ERASEINFO(0x02000,2), | |
| 320 | ERASEINFO(0x08000,1), | |
| 321 | ERASEINFO(0x10000,31) | |
| 322 | } | |
| 323 | }, { | |
| 324 | .mfr_id = MANUFACTURER_AMD, | |
| 325 | .dev_id = AM29LV400BB, | |
| 326 | .name = "AMD AM29LV400BB", | |
| 5d3cce3b DW |
327 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 328 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 329 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 330 | .dev_size = SIZE_512KiB, | |
| 331 | .cmd_set = P_ID_AMD_STD, | |
| 332 | .nr_regions = 4, | |
| 1da177e4 LT |
333 | .regions = { |
| 334 | ERASEINFO(0x04000,1), | |
| 335 | ERASEINFO(0x02000,2), | |
| 336 | ERASEINFO(0x08000,1), | |
| 337 | ERASEINFO(0x10000,7) | |
| 338 | } | |
| 339 | }, { | |
| 340 | .mfr_id = MANUFACTURER_AMD, | |
| 341 | .dev_id = AM29LV400BT, | |
| 342 | .name = "AMD AM29LV400BT", | |
| 5d3cce3b DW |
343 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 344 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 345 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 346 | .dev_size = SIZE_512KiB, | |
| 347 | .cmd_set = P_ID_AMD_STD, | |
| 348 | .nr_regions = 4, | |
| 1da177e4 LT |
349 | .regions = { |
| 350 | ERASEINFO(0x10000,7), | |
| 351 | ERASEINFO(0x08000,1), | |
| 352 | ERASEINFO(0x02000,2), | |
| 353 | ERASEINFO(0x04000,1) | |
| 354 | } | |
| 355 | }, { | |
| 356 | .mfr_id = MANUFACTURER_AMD, | |
| 357 | .dev_id = AM29LV800BB, | |
| 358 | .name = "AMD AM29LV800BB", | |
| 5d3cce3b DW |
359 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 360 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 361 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 362 | .dev_size = SIZE_1MiB, | |
| 363 | .cmd_set = P_ID_AMD_STD, | |
| 364 | .nr_regions = 4, | |
| 1da177e4 LT |
365 | .regions = { |
| 366 | ERASEINFO(0x04000,1), | |
| 367 | ERASEINFO(0x02000,2), | |
| 368 | ERASEINFO(0x08000,1), | |
| 369 | ERASEINFO(0x10000,15), | |
| 370 | } | |
| 371 | }, { | |
| 372 | /* add DL */ | |
| 373 | .mfr_id = MANUFACTURER_AMD, | |
| 374 | .dev_id = AM29DL800BB, | |
| 375 | .name = "AMD AM29DL800BB", | |
| 5d3cce3b DW |
376 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 377 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 378 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 379 | .dev_size = SIZE_1MiB, | |
| 380 | .cmd_set = P_ID_AMD_STD, | |
| 381 | .nr_regions = 6, | |
| 1da177e4 LT |
382 | .regions = { |
| 383 | ERASEINFO(0x04000,1), | |
| 384 | ERASEINFO(0x08000,1), | |
| 385 | ERASEINFO(0x02000,4), | |
| 386 | ERASEINFO(0x08000,1), | |
| 387 | ERASEINFO(0x04000,1), | |
| 388 | ERASEINFO(0x10000,14) | |
| 389 | } | |
| 390 | }, { | |
| 391 | .mfr_id = MANUFACTURER_AMD, | |
| 392 | .dev_id = AM29DL800BT, | |
| 393 | .name = "AMD AM29DL800BT", | |
| 5d3cce3b DW |
394 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 395 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 396 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 397 | .dev_size = SIZE_1MiB, | |
| 398 | .cmd_set = P_ID_AMD_STD, | |
| 399 | .nr_regions = 6, | |
| 1da177e4 LT |
400 | .regions = { |
| 401 | ERASEINFO(0x10000,14), | |
| 402 | ERASEINFO(0x04000,1), | |
| 403 | ERASEINFO(0x08000,1), | |
| 404 | ERASEINFO(0x02000,4), | |
| 405 | ERASEINFO(0x08000,1), | |
| 406 | ERASEINFO(0x04000,1) | |
| 407 | } | |
| 408 | }, { | |
| 409 | .mfr_id = MANUFACTURER_AMD, | |
| 410 | .dev_id = AM29F800BB, | |
| 411 | .name = "AMD AM29F800BB", | |
| 5d3cce3b DW |
412 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 413 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 414 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 415 | .dev_size = SIZE_1MiB, | |
| 416 | .cmd_set = P_ID_AMD_STD, | |
| 417 | .nr_regions = 4, | |
| 1da177e4 LT |
418 | .regions = { |
| 419 | ERASEINFO(0x04000,1), | |
| 420 | ERASEINFO(0x02000,2), | |
| 421 | ERASEINFO(0x08000,1), | |
| 422 | ERASEINFO(0x10000,15), | |
| 423 | } | |
| 424 | }, { | |
| 425 | .mfr_id = MANUFACTURER_AMD, | |
| 426 | .dev_id = AM29LV800BT, | |
| 427 | .name = "AMD AM29LV800BT", | |
| 5d3cce3b DW |
428 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 429 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 430 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 431 | .dev_size = SIZE_1MiB, | |
| 432 | .cmd_set = P_ID_AMD_STD, | |
| 433 | .nr_regions = 4, | |
| 1da177e4 LT |
434 | .regions = { |
| 435 | ERASEINFO(0x10000,15), | |
| 436 | ERASEINFO(0x08000,1), | |
| 437 | ERASEINFO(0x02000,2), | |
| 438 | ERASEINFO(0x04000,1) | |
| 439 | } | |
| 440 | }, { | |
| 441 | .mfr_id = MANUFACTURER_AMD, | |
| 442 | .dev_id = AM29F800BT, | |
| 443 | .name = "AMD AM29F800BT", | |
| 5d3cce3b DW |
444 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 445 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 446 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 447 | .dev_size = SIZE_1MiB, | |
| 448 | .cmd_set = P_ID_AMD_STD, | |
| 449 | .nr_regions = 4, | |
| 1da177e4 LT |
450 | .regions = { |
| 451 | ERASEINFO(0x10000,15), | |
| 452 | ERASEINFO(0x08000,1), | |
| 453 | ERASEINFO(0x02000,2), | |
| 454 | ERASEINFO(0x04000,1) | |
| 455 | } | |
| 456 | }, { | |
| 457 | .mfr_id = MANUFACTURER_AMD, | |
| 458 | .dev_id = AM29F017D, | |
| 459 | .name = "AMD AM29F017D", | |
| 5d3cce3b DW |
460 | .devtypes = CFI_DEVICETYPE_X8, |
| 461 | .uaddr = MTD_UADDR_DONT_CARE, | |
| 462 | .dev_size = SIZE_2MiB, | |
| 463 | .cmd_set = P_ID_AMD_STD, | |
| 464 | .nr_regions = 1, | |
| 1da177e4 LT |
465 | .regions = { |
| 466 | ERASEINFO(0x10000,32), | |
| 467 | } | |
| 468 | }, { | |
| 469 | .mfr_id = MANUFACTURER_AMD, | |
| 470 | .dev_id = AM29F016D, | |
| 471 | .name = "AMD AM29F016D", | |
| 5d3cce3b DW |
472 | .devtypes = CFI_DEVICETYPE_X8, |
| 473 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 474 | .dev_size = SIZE_2MiB, | |
| 475 | .cmd_set = P_ID_AMD_STD, | |
| 476 | .nr_regions = 1, | |
| 1da177e4 LT |
477 | .regions = { |
| 478 | ERASEINFO(0x10000,32), | |
| 479 | } | |
| 480 | }, { | |
| 481 | .mfr_id = MANUFACTURER_AMD, | |
| 482 | .dev_id = AM29F080, | |
| 483 | .name = "AMD AM29F080", | |
| 5d3cce3b DW |
484 | .devtypes = CFI_DEVICETYPE_X8, |
| 485 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 486 | .dev_size = SIZE_1MiB, | |
| 487 | .cmd_set = P_ID_AMD_STD, | |
| 488 | .nr_regions = 1, | |
| 1da177e4 LT |
489 | .regions = { |
| 490 | ERASEINFO(0x10000,16), | |
| 491 | } | |
| 492 | }, { | |
| 493 | .mfr_id = MANUFACTURER_AMD, | |
| 494 | .dev_id = AM29F040, | |
| 495 | .name = "AMD AM29F040", | |
| 5d3cce3b DW |
496 | .devtypes = CFI_DEVICETYPE_X8, |
| 497 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 498 | .dev_size = SIZE_512KiB, | |
| 499 | .cmd_set = P_ID_AMD_STD, | |
| 500 | .nr_regions = 1, | |
| 1da177e4 LT |
501 | .regions = { |
| 502 | ERASEINFO(0x10000,8), | |
| 503 | } | |
| 504 | }, { | |
| 505 | .mfr_id = MANUFACTURER_AMD, | |
| 506 | .dev_id = AM29LV040B, | |
| 507 | .name = "AMD AM29LV040B", | |
| 5d3cce3b DW |
508 | .devtypes = CFI_DEVICETYPE_X8, |
| 509 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 510 | .dev_size = SIZE_512KiB, | |
| 511 | .cmd_set = P_ID_AMD_STD, | |
| 512 | .nr_regions = 1, | |
| 1da177e4 LT |
513 | .regions = { |
| 514 | ERASEINFO(0x10000,8), | |
| 515 | } | |
| 516 | }, { | |
| 517 | .mfr_id = MANUFACTURER_AMD, | |
| 518 | .dev_id = AM29F002T, | |
| 519 | .name = "AMD AM29F002T", | |
| 5d3cce3b DW |
520 | .devtypes = CFI_DEVICETYPE_X8, |
| 521 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 522 | .dev_size = SIZE_256KiB, | |
| 523 | .cmd_set = P_ID_AMD_STD, | |
| 524 | .nr_regions = 4, | |
| 1da177e4 LT |
525 | .regions = { |
| 526 | ERASEINFO(0x10000,3), | |
| 527 | ERASEINFO(0x08000,1), | |
| 528 | ERASEINFO(0x02000,2), | |
| 529 | ERASEINFO(0x04000,1), | |
| 530 | } | |
| 531 | }, { | |
| 532 | .mfr_id = MANUFACTURER_ATMEL, | |
| 533 | .dev_id = AT49BV512, | |
| 534 | .name = "Atmel AT49BV512", | |
| 5d3cce3b DW |
535 | .devtypes = CFI_DEVICETYPE_X8, |
| 536 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 537 | .dev_size = SIZE_64KiB, | |
| 538 | .cmd_set = P_ID_AMD_STD, | |
| 539 | .nr_regions = 1, | |
| 1da177e4 LT |
540 | .regions = { |
| 541 | ERASEINFO(0x10000,1) | |
| 542 | } | |
| 543 | }, { | |
| 544 | .mfr_id = MANUFACTURER_ATMEL, | |
| 545 | .dev_id = AT29LV512, | |
| 546 | .name = "Atmel AT29LV512", | |
| 5d3cce3b DW |
547 | .devtypes = CFI_DEVICETYPE_X8, |
| 548 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 549 | .dev_size = SIZE_64KiB, | |
| 550 | .cmd_set = P_ID_AMD_STD, | |
| 551 | .nr_regions = 1, | |
| 1da177e4 LT |
552 | .regions = { |
| 553 | ERASEINFO(0x80,256), | |
| 554 | ERASEINFO(0x80,256) | |
| 555 | } | |
| 556 | }, { | |
| 557 | .mfr_id = MANUFACTURER_ATMEL, | |
| 558 | .dev_id = AT49BV16X, | |
| 559 | .name = "Atmel AT49BV16X", | |
| 5d3cce3b DW |
560 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 561 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | |
| 562 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | |
| 563 | .dev_size = SIZE_2MiB, | |
| 564 | .cmd_set = P_ID_AMD_STD, | |
| 565 | .nr_regions = 2, | |
| 1da177e4 LT |
566 | .regions = { |
| 567 | ERASEINFO(0x02000,8), | |
| 568 | ERASEINFO(0x10000,31) | |
| 569 | } | |
| 570 | }, { | |
| 571 | .mfr_id = MANUFACTURER_ATMEL, | |
| 572 | .dev_id = AT49BV16XT, | |
| 573 | .name = "Atmel AT49BV16XT", | |
| 5d3cce3b DW |
574 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 575 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | |
| 576 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | |
| 577 | .dev_size = SIZE_2MiB, | |
| 578 | .cmd_set = P_ID_AMD_STD, | |
| 579 | .nr_regions = 2, | |
| 1da177e4 LT |
580 | .regions = { |
| 581 | ERASEINFO(0x10000,31), | |
| 582 | ERASEINFO(0x02000,8) | |
| 583 | } | |
| 584 | }, { | |
| 585 | .mfr_id = MANUFACTURER_ATMEL, | |
| 586 | .dev_id = AT49BV32X, | |
| 587 | .name = "Atmel AT49BV32X", | |
| 5d3cce3b DW |
588 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 589 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | |
| 590 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | |
| 591 | .dev_size = SIZE_4MiB, | |
| 592 | .cmd_set = P_ID_AMD_STD, | |
| 593 | .nr_regions = 2, | |
| 1da177e4 LT |
594 | .regions = { |
| 595 | ERASEINFO(0x02000,8), | |
| 596 | ERASEINFO(0x10000,63) | |
| 597 | } | |
| 598 | }, { | |
| 599 | .mfr_id = MANUFACTURER_ATMEL, | |
| 600 | .dev_id = AT49BV32XT, | |
| 601 | .name = "Atmel AT49BV32XT", | |
| 5d3cce3b DW |
602 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 603 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | |
| 604 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | |
| 605 | .dev_size = SIZE_4MiB, | |
| 606 | .cmd_set = P_ID_AMD_STD, | |
| 607 | .nr_regions = 2, | |
| 1da177e4 LT |
608 | .regions = { |
| 609 | ERASEINFO(0x10000,63), | |
| 610 | ERASEINFO(0x02000,8) | |
| 611 | } | |
| 612 | }, { | |
| 613 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 614 | .dev_id = MBM29F040C, | |
| 615 | .name = "Fujitsu MBM29F040C", | |
| 5d3cce3b DW |
616 | .devtypes = CFI_DEVICETYPE_X8, |
| 617 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 618 | .dev_size = SIZE_512KiB, | |
| 619 | .cmd_set = P_ID_AMD_STD, | |
| 620 | .nr_regions = 1, | |
| 1da177e4 LT |
621 | .regions = { |
| 622 | ERASEINFO(0x10000,8) | |
| 623 | } | |
| c9856e39 PDM |
624 | }, { |
| 625 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 626 | .dev_id = MBM29F800BA, | |
| 627 | .name = "Fujitsu MBM29F800BA", | |
| 5d3cce3b DW |
628 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 629 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 630 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 631 | .dev_size = SIZE_1MiB, | |
| 632 | .cmd_set = P_ID_AMD_STD, | |
| 633 | .nr_regions = 4, | |
| c9856e39 PDM |
634 | .regions = { |
| 635 | ERASEINFO(0x04000,1), | |
| 636 | ERASEINFO(0x02000,2), | |
| 637 | ERASEINFO(0x08000,1), | |
| 638 | ERASEINFO(0x10000,15), | |
| 639 | } | |
| 1da177e4 LT |
640 | }, { |
| 641 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 642 | .dev_id = MBM29LV650UE, | |
| 643 | .name = "Fujitsu MBM29LV650UE", | |
| 5d3cce3b DW |
644 | .devtypes = CFI_DEVICETYPE_X8, |
| 645 | .uaddr = MTD_UADDR_DONT_CARE, | |
| 646 | .dev_size = SIZE_8MiB, | |
| 647 | .cmd_set = P_ID_AMD_STD, | |
| 648 | .nr_regions = 1, | |
| 1da177e4 LT |
649 | .regions = { |
| 650 | ERASEINFO(0x10000,128) | |
| 651 | } | |
| 652 | }, { | |
| 653 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 654 | .dev_id = MBM29LV320TE, | |
| 655 | .name = "Fujitsu MBM29LV320TE", | |
| 5d3cce3b DW |
656 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 657 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 658 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 659 | .dev_size = SIZE_4MiB, | |
| 660 | .cmd_set = P_ID_AMD_STD, | |
| 661 | .nr_regions = 2, | |
| 1da177e4 LT |
662 | .regions = { |
| 663 | ERASEINFO(0x10000,63), | |
| 664 | ERASEINFO(0x02000,8) | |
| 665 | } | |
| 666 | }, { | |
| 667 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 668 | .dev_id = MBM29LV320BE, | |
| 669 | .name = "Fujitsu MBM29LV320BE", | |
| 5d3cce3b DW |
670 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 671 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 672 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 673 | .dev_size = SIZE_4MiB, | |
| 674 | .cmd_set = P_ID_AMD_STD, | |
| 675 | .nr_regions = 2, | |
| 1da177e4 LT |
676 | .regions = { |
| 677 | ERASEINFO(0x02000,8), | |
| 678 | ERASEINFO(0x10000,63) | |
| 679 | } | |
| 680 | }, { | |
| 681 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 682 | .dev_id = MBM29LV160TE, | |
| 683 | .name = "Fujitsu MBM29LV160TE", | |
| 5d3cce3b DW |
684 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 685 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 686 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 687 | .dev_size = SIZE_2MiB, | |
| 688 | .cmd_set = P_ID_AMD_STD, | |
| 689 | .nr_regions = 4, | |
| 1da177e4 LT |
690 | .regions = { |
| 691 | ERASEINFO(0x10000,31), | |
| 692 | ERASEINFO(0x08000,1), | |
| 693 | ERASEINFO(0x02000,2), | |
| 694 | ERASEINFO(0x04000,1) | |
| 695 | } | |
| 696 | }, { | |
| 697 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 698 | .dev_id = MBM29LV160BE, | |
| 699 | .name = "Fujitsu MBM29LV160BE", | |
| 5d3cce3b DW |
700 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 701 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 702 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 703 | .dev_size = SIZE_2MiB, | |
| 704 | .cmd_set = P_ID_AMD_STD, | |
| 705 | .nr_regions = 4, | |
| 1da177e4 LT |
706 | .regions = { |
| 707 | ERASEINFO(0x04000,1), | |
| 708 | ERASEINFO(0x02000,2), | |
| 709 | ERASEINFO(0x08000,1), | |
| 710 | ERASEINFO(0x10000,31) | |
| 711 | } | |
| 712 | }, { | |
| 713 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 714 | .dev_id = MBM29LV800BA, | |
| 715 | .name = "Fujitsu MBM29LV800BA", | |
| 5d3cce3b DW |
716 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 717 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 718 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 719 | .dev_size = SIZE_1MiB, | |
| 720 | .cmd_set = P_ID_AMD_STD, | |
| 721 | .nr_regions = 4, | |
| 1da177e4 LT |
722 | .regions = { |
| 723 | ERASEINFO(0x04000,1), | |
| 724 | ERASEINFO(0x02000,2), | |
| 725 | ERASEINFO(0x08000,1), | |
| 726 | ERASEINFO(0x10000,15) | |
| 727 | } | |
| 728 | }, { | |
| 729 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 730 | .dev_id = MBM29LV800TA, | |
| 731 | .name = "Fujitsu MBM29LV800TA", | |
| 5d3cce3b DW |
732 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 733 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 734 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 735 | .dev_size = SIZE_1MiB, | |
| 736 | .cmd_set = P_ID_AMD_STD, | |
| 737 | .nr_regions = 4, | |
| 1da177e4 LT |
738 | .regions = { |
| 739 | ERASEINFO(0x10000,15), | |
| 740 | ERASEINFO(0x08000,1), | |
| 741 | ERASEINFO(0x02000,2), | |
| 742 | ERASEINFO(0x04000,1) | |
| 743 | } | |
| 744 | }, { | |
| 745 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 746 | .dev_id = MBM29LV400BC, | |
| 747 | .name = "Fujitsu MBM29LV400BC", | |
| 5d3cce3b DW |
748 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 749 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 750 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 751 | .dev_size = SIZE_512KiB, | |
| 752 | .cmd_set = P_ID_AMD_STD, | |
| 753 | .nr_regions = 4, | |
| 1da177e4 LT |
754 | .regions = { |
| 755 | ERASEINFO(0x04000,1), | |
| 756 | ERASEINFO(0x02000,2), | |
| 757 | ERASEINFO(0x08000,1), | |
| 758 | ERASEINFO(0x10000,7) | |
| 759 | } | |
| 760 | }, { | |
| 761 | .mfr_id = MANUFACTURER_FUJITSU, | |
| 762 | .dev_id = MBM29LV400TC, | |
| 763 | .name = "Fujitsu MBM29LV400TC", | |
| 5d3cce3b DW |
764 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 765 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 766 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 767 | .dev_size = SIZE_512KiB, | |
| 768 | .cmd_set = P_ID_AMD_STD, | |
| 769 | .nr_regions = 4, | |
| 1da177e4 LT |
770 | .regions = { |
| 771 | ERASEINFO(0x10000,7), | |
| 772 | ERASEINFO(0x08000,1), | |
| 773 | ERASEINFO(0x02000,2), | |
| 774 | ERASEINFO(0x04000,1) | |
| 775 | } | |
| 776 | }, { | |
| 777 | .mfr_id = MANUFACTURER_HYUNDAI, | |
| 778 | .dev_id = HY29F002T, | |
| 779 | .name = "Hyundai HY29F002T", | |
| 5d3cce3b DW |
780 | .devtypes = CFI_DEVICETYPE_X8, |
| 781 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 782 | .dev_size = SIZE_256KiB, | |
| 783 | .cmd_set = P_ID_AMD_STD, | |
| 784 | .nr_regions = 4, | |
| 1da177e4 LT |
785 | .regions = { |
| 786 | ERASEINFO(0x10000,3), | |
| 787 | ERASEINFO(0x08000,1), | |
| 788 | ERASEINFO(0x02000,2), | |
| 789 | ERASEINFO(0x04000,1), | |
| 790 | } | |
| 791 | }, { | |
| 792 | .mfr_id = MANUFACTURER_INTEL, | |
| 793 | .dev_id = I28F004B3B, | |
| 794 | .name = "Intel 28F004B3B", | |
| 5d3cce3b DW |
795 | .devtypes = CFI_DEVICETYPE_X8, |
| 796 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 797 | .dev_size = SIZE_512KiB, | |
| 798 | .cmd_set = P_ID_INTEL_STD, | |
| 799 | .nr_regions = 2, | |
| 1da177e4 LT |
800 | .regions = { |
| 801 | ERASEINFO(0x02000, 8), | |
| 802 | ERASEINFO(0x10000, 7), | |
| 803 | } | |
| 804 | }, { | |
| 805 | .mfr_id = MANUFACTURER_INTEL, | |
| 806 | .dev_id = I28F004B3T, | |
| 807 | .name = "Intel 28F004B3T", | |
| 5d3cce3b DW |
808 | .devtypes = CFI_DEVICETYPE_X8, |
| 809 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 810 | .dev_size = SIZE_512KiB, | |
| 811 | .cmd_set = P_ID_INTEL_STD, | |
| 812 | .nr_regions = 2, | |
| 1da177e4 LT |
813 | .regions = { |
| 814 | ERASEINFO(0x10000, 7), | |
| 815 | ERASEINFO(0x02000, 8), | |
| 816 | } | |
| 817 | }, { | |
| 818 | .mfr_id = MANUFACTURER_INTEL, | |
| 819 | .dev_id = I28F400B3B, | |
| 820 | .name = "Intel 28F400B3B", | |
| 5d3cce3b DW |
821 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 822 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 823 | /* XX: Maybe MTD_UADDR_UNNECESSARY ? */ | |
| 824 | .dev_size = SIZE_512KiB, | |
| 825 | .cmd_set = P_ID_INTEL_STD, | |
| 826 | .nr_regions = 2, | |
| 1da177e4 LT |
827 | .regions = { |
| 828 | ERASEINFO(0x02000, 8), | |
| 829 | ERASEINFO(0x10000, 7), | |
| 830 | } | |
| 831 | }, { | |
| 832 | .mfr_id = MANUFACTURER_INTEL, | |
| 833 | .dev_id = I28F400B3T, | |
| 834 | .name = "Intel 28F400B3T", | |
| 5d3cce3b DW |
835 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 836 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 837 | /* XX: Maybe MTD_UADDR_UNNECESSARY ? */ | |
| 838 | .dev_size = SIZE_512KiB, | |
| 839 | .cmd_set = P_ID_INTEL_STD, | |
| 840 | .nr_regions = 2, | |
| 1da177e4 LT |
841 | .regions = { |
| 842 | ERASEINFO(0x10000, 7), | |
| 843 | ERASEINFO(0x02000, 8), | |
| 844 | } | |
| 845 | }, { | |
| 846 | .mfr_id = MANUFACTURER_INTEL, | |
| 847 | .dev_id = I28F008B3B, | |
| 848 | .name = "Intel 28F008B3B", | |
| 5d3cce3b DW |
849 | .devtypes = CFI_DEVICETYPE_X8, |
| 850 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 851 | .dev_size = SIZE_1MiB, | |
| 852 | .cmd_set = P_ID_INTEL_STD, | |
| 853 | .nr_regions = 2, | |
| 1da177e4 LT |
854 | .regions = { |
| 855 | ERASEINFO(0x02000, 8), | |
| 856 | ERASEINFO(0x10000, 15), | |
| 857 | } | |
| 858 | }, { | |
| 859 | .mfr_id = MANUFACTURER_INTEL, | |
| 860 | .dev_id = I28F008B3T, | |
| 861 | .name = "Intel 28F008B3T", | |
| 5d3cce3b DW |
862 | .devtypes = CFI_DEVICETYPE_X8, |
| 863 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 864 | .dev_size = SIZE_1MiB, | |
| 865 | .cmd_set = P_ID_INTEL_STD, | |
| 866 | .nr_regions = 2, | |
| 1da177e4 LT |
867 | .regions = { |
| 868 | ERASEINFO(0x10000, 15), | |
| 869 | ERASEINFO(0x02000, 8), | |
| 870 | } | |
| 871 | }, { | |
| 872 | .mfr_id = MANUFACTURER_INTEL, | |
| 873 | .dev_id = I28F008S5, | |
| 874 | .name = "Intel 28F008S5", | |
| 5d3cce3b DW |
875 | .devtypes = CFI_DEVICETYPE_X8, |
| 876 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 877 | .dev_size = SIZE_1MiB, | |
| 878 | .cmd_set = P_ID_INTEL_EXT, | |
| 879 | .nr_regions = 1, | |
| 1da177e4 LT |
880 | .regions = { |
| 881 | ERASEINFO(0x10000,16), | |
| 882 | } | |
| 883 | }, { | |
| 884 | .mfr_id = MANUFACTURER_INTEL, | |
| 885 | .dev_id = I28F016S5, | |
| 886 | .name = "Intel 28F016S5", | |
| 5d3cce3b DW |
887 | .devtypes = CFI_DEVICETYPE_X8, |
| 888 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 889 | .dev_size = SIZE_2MiB, | |
| 890 | .cmd_set = P_ID_INTEL_EXT, | |
| 891 | .nr_regions = 1, | |
| 1da177e4 LT |
892 | .regions = { |
| 893 | ERASEINFO(0x10000,32), | |
| 894 | } | |
| 895 | }, { | |
| 896 | .mfr_id = MANUFACTURER_INTEL, | |
| 897 | .dev_id = I28F008SA, | |
| 898 | .name = "Intel 28F008SA", | |
| 5d3cce3b DW |
899 | .devtypes = CFI_DEVICETYPE_X8, |
| 900 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 901 | .dev_size = SIZE_1MiB, | |
| 902 | .cmd_set = P_ID_INTEL_STD, | |
| 903 | .nr_regions = 1, | |
| 1da177e4 LT |
904 | .regions = { |
| 905 | ERASEINFO(0x10000, 16), | |
| 906 | } | |
| 907 | }, { | |
| 908 | .mfr_id = MANUFACTURER_INTEL, | |
| 909 | .dev_id = I28F800B3B, | |
| 910 | .name = "Intel 28F800B3B", | |
| 5d3cce3b DW |
911 | .devtypes = CFI_DEVICETYPE_X16, |
| 912 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 913 | .dev_size = SIZE_1MiB, | |
| 914 | .cmd_set = P_ID_INTEL_STD, | |
| 915 | .nr_regions = 2, | |
| 1da177e4 LT |
916 | .regions = { |
| 917 | ERASEINFO(0x02000, 8), | |
| 918 | ERASEINFO(0x10000, 15), | |
| 919 | } | |
| 920 | }, { | |
| 921 | .mfr_id = MANUFACTURER_INTEL, | |
| 922 | .dev_id = I28F800B3T, | |
| 923 | .name = "Intel 28F800B3T", | |
| 5d3cce3b DW |
924 | .devtypes = CFI_DEVICETYPE_X16, |
| 925 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 926 | .dev_size = SIZE_1MiB, | |
| 927 | .cmd_set = P_ID_INTEL_STD, | |
| 928 | .nr_regions = 2, | |
| 1da177e4 LT |
929 | .regions = { |
| 930 | ERASEINFO(0x10000, 15), | |
| 931 | ERASEINFO(0x02000, 8), | |
| 932 | } | |
| 933 | }, { | |
| 934 | .mfr_id = MANUFACTURER_INTEL, | |
| 935 | .dev_id = I28F016B3B, | |
| 936 | .name = "Intel 28F016B3B", | |
| 5d3cce3b DW |
937 | .devtypes = CFI_DEVICETYPE_X8, |
| 938 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 939 | .dev_size = SIZE_2MiB, | |
| 940 | .cmd_set = P_ID_INTEL_STD, | |
| 941 | .nr_regions = 2, | |
| 1da177e4 LT |
942 | .regions = { |
| 943 | ERASEINFO(0x02000, 8), | |
| 944 | ERASEINFO(0x10000, 31), | |
| 945 | } | |
| 946 | }, { | |
| 947 | .mfr_id = MANUFACTURER_INTEL, | |
| 948 | .dev_id = I28F016S3, | |
| 949 | .name = "Intel I28F016S3", | |
| 5d3cce3b DW |
950 | .devtypes = CFI_DEVICETYPE_X8, |
| 951 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 952 | .dev_size = SIZE_2MiB, | |
| 953 | .cmd_set = P_ID_INTEL_STD, | |
| 954 | .nr_regions = 1, | |
| 1da177e4 LT |
955 | .regions = { |
| 956 | ERASEINFO(0x10000, 32), | |
| 957 | } | |
| 958 | }, { | |
| 959 | .mfr_id = MANUFACTURER_INTEL, | |
| 960 | .dev_id = I28F016B3T, | |
| 961 | .name = "Intel 28F016B3T", | |
| 5d3cce3b DW |
962 | .devtypes = CFI_DEVICETYPE_X8, |
| 963 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 964 | .dev_size = SIZE_2MiB, | |
| 965 | .cmd_set = P_ID_INTEL_STD, | |
| 966 | .nr_regions = 2, | |
| 1da177e4 LT |
967 | .regions = { |
| 968 | ERASEINFO(0x10000, 31), | |
| 969 | ERASEINFO(0x02000, 8), | |
| 970 | } | |
| 971 | }, { | |
| 972 | .mfr_id = MANUFACTURER_INTEL, | |
| 973 | .dev_id = I28F160B3B, | |
| 974 | .name = "Intel 28F160B3B", | |
| 5d3cce3b DW |
975 | .devtypes = CFI_DEVICETYPE_X16, |
| 976 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 977 | .dev_size = SIZE_2MiB, | |
| 978 | .cmd_set = P_ID_INTEL_STD, | |
| 979 | .nr_regions = 2, | |
| 1da177e4 LT |
980 | .regions = { |
| 981 | ERASEINFO(0x02000, 8), | |
| 982 | ERASEINFO(0x10000, 31), | |
| 983 | } | |
| 984 | }, { | |
| 985 | .mfr_id = MANUFACTURER_INTEL, | |
| 986 | .dev_id = I28F160B3T, | |
| 987 | .name = "Intel 28F160B3T", | |
| 5d3cce3b DW |
988 | .devtypes = CFI_DEVICETYPE_X16, |
| 989 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 990 | .dev_size = SIZE_2MiB, | |
| 991 | .cmd_set = P_ID_INTEL_STD, | |
| 992 | .nr_regions = 2, | |
| 1da177e4 LT |
993 | .regions = { |
| 994 | ERASEINFO(0x10000, 31), | |
| 995 | ERASEINFO(0x02000, 8), | |
| 996 | } | |
| 997 | }, { | |
| 998 | .mfr_id = MANUFACTURER_INTEL, | |
| 999 | .dev_id = I28F320B3B, | |
| 1000 | .name = "Intel 28F320B3B", | |
| 5d3cce3b DW |
1001 | .devtypes = CFI_DEVICETYPE_X16, |
| 1002 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1003 | .dev_size = SIZE_4MiB, | |
| 1004 | .cmd_set = P_ID_INTEL_STD, | |
| 1005 | .nr_regions = 2, | |
| 1da177e4 LT |
1006 | .regions = { |
| 1007 | ERASEINFO(0x02000, 8), | |
| 1008 | ERASEINFO(0x10000, 63), | |
| 1009 | } | |
| 1010 | }, { | |
| 1011 | .mfr_id = MANUFACTURER_INTEL, | |
| 1012 | .dev_id = I28F320B3T, | |
| 1013 | .name = "Intel 28F320B3T", | |
| 5d3cce3b DW |
1014 | .devtypes = CFI_DEVICETYPE_X16, |
| 1015 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1016 | .dev_size = SIZE_4MiB, | |
| 1017 | .cmd_set = P_ID_INTEL_STD, | |
| 1018 | .nr_regions = 2, | |
| 1da177e4 LT |
1019 | .regions = { |
| 1020 | ERASEINFO(0x10000, 63), | |
| 1021 | ERASEINFO(0x02000, 8), | |
| 1022 | } | |
| 1023 | }, { | |
| 1024 | .mfr_id = MANUFACTURER_INTEL, | |
| 1025 | .dev_id = I28F640B3B, | |
| 1026 | .name = "Intel 28F640B3B", | |
| 5d3cce3b DW |
1027 | .devtypes = CFI_DEVICETYPE_X16, |
| 1028 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1029 | .dev_size = SIZE_8MiB, | |
| 1030 | .cmd_set = P_ID_INTEL_STD, | |
| 1031 | .nr_regions = 2, | |
| 1da177e4 LT |
1032 | .regions = { |
| 1033 | ERASEINFO(0x02000, 8), | |
| 1034 | ERASEINFO(0x10000, 127), | |
| 1035 | } | |
| 1036 | }, { | |
| 1037 | .mfr_id = MANUFACTURER_INTEL, | |
| 1038 | .dev_id = I28F640B3T, | |
| 1039 | .name = "Intel 28F640B3T", | |
| 5d3cce3b DW |
1040 | .devtypes = CFI_DEVICETYPE_X16, |
| 1041 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1042 | .dev_size = SIZE_8MiB, | |
| 1043 | .cmd_set = P_ID_INTEL_STD, | |
| 1044 | .nr_regions = 2, | |
| 1da177e4 LT |
1045 | .regions = { |
| 1046 | ERASEINFO(0x10000, 127), | |
| 1047 | ERASEINFO(0x02000, 8), | |
| 1048 | } | |
| 1049 | }, { | |
| 1050 | .mfr_id = MANUFACTURER_INTEL, | |
| 1051 | .dev_id = I82802AB, | |
| 1052 | .name = "Intel 82802AB", | |
| 5d3cce3b DW |
1053 | .devtypes = CFI_DEVICETYPE_X8, |
| 1054 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1055 | .dev_size = SIZE_512KiB, | |
| 1056 | .cmd_set = P_ID_INTEL_EXT, | |
| 1057 | .nr_regions = 1, | |
| 1da177e4 LT |
1058 | .regions = { |
| 1059 | ERASEINFO(0x10000,8), | |
| 1060 | } | |
| 1061 | }, { | |
| 1062 | .mfr_id = MANUFACTURER_INTEL, | |
| 1063 | .dev_id = I82802AC, | |
| 1064 | .name = "Intel 82802AC", | |
| 5d3cce3b DW |
1065 | .devtypes = CFI_DEVICETYPE_X8, |
| 1066 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1067 | .dev_size = SIZE_1MiB, | |
| 1068 | .cmd_set = P_ID_INTEL_EXT, | |
| 1069 | .nr_regions = 1, | |
| 1da177e4 LT |
1070 | .regions = { |
| 1071 | ERASEINFO(0x10000,16), | |
| 1072 | } | |
| 1073 | }, { | |
| 1074 | .mfr_id = MANUFACTURER_MACRONIX, | |
| 1075 | .dev_id = MX29LV040C, | |
| 1076 | .name = "Macronix MX29LV040C", | |
| 5d3cce3b DW |
1077 | .devtypes = CFI_DEVICETYPE_X8, |
| 1078 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1079 | .dev_size = SIZE_512KiB, | |
| 1080 | .cmd_set = P_ID_AMD_STD, | |
| 1081 | .nr_regions = 1, | |
| 1da177e4 LT |
1082 | .regions = { |
| 1083 | ERASEINFO(0x10000,8), | |
| 1084 | } | |
| 1085 | }, { | |
| 1086 | .mfr_id = MANUFACTURER_MACRONIX, | |
| 1087 | .dev_id = MX29LV160T, | |
| 1088 | .name = "MXIC MX29LV160T", | |
| 5d3cce3b DW |
1089 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1090 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1091 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1092 | .dev_size = SIZE_2MiB, | |
| 1093 | .cmd_set = P_ID_AMD_STD, | |
| 1094 | .nr_regions = 4, | |
| 1da177e4 LT |
1095 | .regions = { |
| 1096 | ERASEINFO(0x10000,31), | |
| 1097 | ERASEINFO(0x08000,1), | |
| 1098 | ERASEINFO(0x02000,2), | |
| 1099 | ERASEINFO(0x04000,1) | |
| 1100 | } | |
| 1101 | }, { | |
| 1102 | .mfr_id = MANUFACTURER_NEC, | |
| 1103 | .dev_id = UPD29F064115, | |
| 1104 | .name = "NEC uPD29F064115", | |
| 5d3cce3b DW |
1105 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1106 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1107 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1108 | .dev_size = SIZE_8MiB, | |
| 1109 | .cmd_set = P_ID_AMD_STD, | |
| 1110 | .nr_regions = 3, | |
| 1da177e4 LT |
1111 | .regions = { |
| 1112 | ERASEINFO(0x2000,8), | |
| 1113 | ERASEINFO(0x10000,126), | |
| 1114 | ERASEINFO(0x2000,8), | |
| 1115 | } | |
| 1116 | }, { | |
| 1117 | .mfr_id = MANUFACTURER_MACRONIX, | |
| 1118 | .dev_id = MX29LV160B, | |
| 1119 | .name = "MXIC MX29LV160B", | |
| 5d3cce3b DW |
1120 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1121 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1122 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1123 | .dev_size = SIZE_2MiB, | |
| 1124 | .cmd_set = P_ID_AMD_STD, | |
| 1125 | .nr_regions = 4, | |
| 1da177e4 LT |
1126 | .regions = { |
| 1127 | ERASEINFO(0x04000,1), | |
| 1128 | ERASEINFO(0x02000,2), | |
| 1129 | ERASEINFO(0x08000,1), | |
| 1130 | ERASEINFO(0x10000,31) | |
| 1131 | } | |
| 1132 | }, { | |
| c4e6952f TY |
1133 | .mfr_id = MANUFACTURER_MACRONIX, |
| 1134 | .dev_id = MX29F040, | |
| 1135 | .name = "Macronix MX29F040", | |
| 5d3cce3b DW |
1136 | .devtypes = CFI_DEVICETYPE_X8, |
| 1137 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1138 | .dev_size = SIZE_512KiB, | |
| 1139 | .cmd_set = P_ID_AMD_STD, | |
| 1140 | .nr_regions = 1, | |
| c4e6952f TY |
1141 | .regions = { |
| 1142 | ERASEINFO(0x10000,8), | |
| 1143 | } | |
| 1144 | }, { | |
| 1da177e4 LT |
1145 | .mfr_id = MANUFACTURER_MACRONIX, |
| 1146 | .dev_id = MX29F016, | |
| 1147 | .name = "Macronix MX29F016", | |
| 5d3cce3b DW |
1148 | .devtypes = CFI_DEVICETYPE_X8, |
| 1149 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1150 | .dev_size = SIZE_2MiB, | |
| 1151 | .cmd_set = P_ID_AMD_STD, | |
| 1152 | .nr_regions = 1, | |
| 1da177e4 LT |
1153 | .regions = { |
| 1154 | ERASEINFO(0x10000,32), | |
| 1155 | } | |
| 1156 | }, { | |
| 1157 | .mfr_id = MANUFACTURER_MACRONIX, | |
| 1158 | .dev_id = MX29F004T, | |
| 1159 | .name = "Macronix MX29F004T", | |
| 5d3cce3b DW |
1160 | .devtypes = CFI_DEVICETYPE_X8, |
| 1161 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1162 | .dev_size = SIZE_512KiB, | |
| 1163 | .cmd_set = P_ID_AMD_STD, | |
| 1164 | .nr_regions = 4, | |
| 1da177e4 LT |
1165 | .regions = { |
| 1166 | ERASEINFO(0x10000,7), | |
| 1167 | ERASEINFO(0x08000,1), | |
| 1168 | ERASEINFO(0x02000,2), | |
| 1169 | ERASEINFO(0x04000,1), | |
| 1170 | } | |
| 1171 | }, { | |
| 1172 | .mfr_id = MANUFACTURER_MACRONIX, | |
| 1173 | .dev_id = MX29F004B, | |
| 1174 | .name = "Macronix MX29F004B", | |
| 5d3cce3b DW |
1175 | .devtypes = CFI_DEVICETYPE_X8, |
| 1176 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1177 | .dev_size = SIZE_512KiB, | |
| 1178 | .cmd_set = P_ID_AMD_STD, | |
| 1179 | .nr_regions = 4, | |
| 1da177e4 LT |
1180 | .regions = { |
| 1181 | ERASEINFO(0x04000,1), | |
| 1182 | ERASEINFO(0x02000,2), | |
| 1183 | ERASEINFO(0x08000,1), | |
| 1184 | ERASEINFO(0x10000,7), | |
| 1185 | } | |
| 1186 | }, { | |
| 1187 | .mfr_id = MANUFACTURER_MACRONIX, | |
| 1188 | .dev_id = MX29F002T, | |
| 1189 | .name = "Macronix MX29F002T", | |
| 5d3cce3b DW |
1190 | .devtypes = CFI_DEVICETYPE_X8, |
| 1191 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1192 | .dev_size = SIZE_256KiB, | |
| 1193 | .cmd_set = P_ID_AMD_STD, | |
| 1194 | .nr_regions = 4, | |
| 1da177e4 LT |
1195 | .regions = { |
| 1196 | ERASEINFO(0x10000,3), | |
| 1197 | ERASEINFO(0x08000,1), | |
| 1198 | ERASEINFO(0x02000,2), | |
| 1199 | ERASEINFO(0x04000,1), | |
| 1200 | } | |
| 1201 | }, { | |
| 1202 | .mfr_id = MANUFACTURER_PMC, | |
| 1203 | .dev_id = PM49FL002, | |
| 1204 | .name = "PMC Pm49FL002", | |
| 5d3cce3b DW |
1205 | .devtypes = CFI_DEVICETYPE_X8, |
| 1206 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1207 | .dev_size = SIZE_256KiB, | |
| 1208 | .cmd_set = P_ID_AMD_STD, | |
| 1209 | .nr_regions = 1, | |
| 1da177e4 LT |
1210 | .regions = { |
| 1211 | ERASEINFO( 0x01000, 64 ) | |
| 1212 | } | |
| 1213 | }, { | |
| 1214 | .mfr_id = MANUFACTURER_PMC, | |
| 1215 | .dev_id = PM49FL004, | |
| 1216 | .name = "PMC Pm49FL004", | |
| 5d3cce3b DW |
1217 | .devtypes = CFI_DEVICETYPE_X8, |
| 1218 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1219 | .dev_size = SIZE_512KiB, | |
| 1220 | .cmd_set = P_ID_AMD_STD, | |
| 1221 | .nr_regions = 1, | |
| 1da177e4 LT |
1222 | .regions = { |
| 1223 | ERASEINFO( 0x01000, 128 ) | |
| 1224 | } | |
| 1225 | }, { | |
| 1226 | .mfr_id = MANUFACTURER_PMC, | |
| 1227 | .dev_id = PM49FL008, | |
| 1228 | .name = "PMC Pm49FL008", | |
| 5d3cce3b DW |
1229 | .devtypes = CFI_DEVICETYPE_X8, |
| 1230 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1231 | .dev_size = SIZE_1MiB, | |
| 1232 | .cmd_set = P_ID_AMD_STD, | |
| 1233 | .nr_regions = 1, | |
| 1da177e4 LT |
1234 | .regions = { |
| 1235 | ERASEINFO( 0x01000, 256 ) | |
| 1236 | } | |
| a63ec1b7 PM |
1237 | }, { |
| 1238 | .mfr_id = MANUFACTURER_SHARP, | |
| 1239 | .dev_id = LH28F640BF, | |
| 1240 | .name = "LH28F640BF", | |
| 5d3cce3b DW |
1241 | .devtypes = CFI_DEVICETYPE_X8, |
| 1242 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1243 | .dev_size = SIZE_4MiB, | |
| 1244 | .cmd_set = P_ID_INTEL_STD, | |
| 1245 | .nr_regions = 1, | |
| 1246 | .regions = { | |
| a63ec1b7 PM |
1247 | ERASEINFO(0x40000,16), |
| 1248 | } | |
| 1da177e4 LT |
1249 | }, { |
| 1250 | .mfr_id = MANUFACTURER_SST, | |
| 1251 | .dev_id = SST39LF512, | |
| 1252 | .name = "SST 39LF512", | |
| 5d3cce3b DW |
1253 | .devtypes = CFI_DEVICETYPE_X8, |
| 1254 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1255 | .dev_size = SIZE_64KiB, | |
| 1256 | .cmd_set = P_ID_AMD_STD, | |
| 1257 | .nr_regions = 1, | |
| 1da177e4 LT |
1258 | .regions = { |
| 1259 | ERASEINFO(0x01000,16), | |
| 1260 | } | |
| 1261 | }, { | |
| 1262 | .mfr_id = MANUFACTURER_SST, | |
| 1263 | .dev_id = SST39LF010, | |
| 1264 | .name = "SST 39LF010", | |
| 5d3cce3b DW |
1265 | .devtypes = CFI_DEVICETYPE_X8, |
| 1266 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1267 | .dev_size = SIZE_128KiB, | |
| 1268 | .cmd_set = P_ID_AMD_STD, | |
| 1269 | .nr_regions = 1, | |
| 1da177e4 LT |
1270 | .regions = { |
| 1271 | ERASEINFO(0x01000,32), | |
| 1272 | } | |
| 1273 | }, { | |
| 1274 | .mfr_id = MANUFACTURER_SST, | |
| 1275 | .dev_id = SST29EE020, | |
| 1276 | .name = "SST 29EE020", | |
| 5d3cce3b DW |
1277 | .devtypes = CFI_DEVICETYPE_X8, |
| 1278 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1279 | .dev_size = SIZE_256KiB, | |
| 1280 | .cmd_set = P_ID_SST_PAGE, | |
| 1281 | .nr_regions = 1, | |
| 1282 | .regions = {ERASEINFO(0x01000,64), | |
| 1283 | } | |
| 1284 | }, { | |
| 1da177e4 LT |
1285 | .mfr_id = MANUFACTURER_SST, |
| 1286 | .dev_id = SST29LE020, | |
| 1287 | .name = "SST 29LE020", | |
| 5d3cce3b DW |
1288 | .devtypes = CFI_DEVICETYPE_X8, |
| 1289 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1290 | .dev_size = SIZE_256KiB, | |
| 1291 | .cmd_set = P_ID_SST_PAGE, | |
| 1292 | .nr_regions = 1, | |
| 1293 | .regions = {ERASEINFO(0x01000,64), | |
| 1294 | } | |
| 1da177e4 LT |
1295 | }, { |
| 1296 | .mfr_id = MANUFACTURER_SST, | |
| 1297 | .dev_id = SST39LF020, | |
| 1298 | .name = "SST 39LF020", | |
| 5d3cce3b DW |
1299 | .devtypes = CFI_DEVICETYPE_X8, |
| 1300 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1301 | .dev_size = SIZE_256KiB, | |
| 1302 | .cmd_set = P_ID_AMD_STD, | |
| 1303 | .nr_regions = 1, | |
| 1da177e4 LT |
1304 | .regions = { |
| 1305 | ERASEINFO(0x01000,64), | |
| 1306 | } | |
| 1307 | }, { | |
| 1308 | .mfr_id = MANUFACTURER_SST, | |
| 1309 | .dev_id = SST39LF040, | |
| 1310 | .name = "SST 39LF040", | |
| 5d3cce3b DW |
1311 | .devtypes = CFI_DEVICETYPE_X8, |
| 1312 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1313 | .dev_size = SIZE_512KiB, | |
| 1314 | .cmd_set = P_ID_AMD_STD, | |
| 1315 | .nr_regions = 1, | |
| 1da177e4 LT |
1316 | .regions = { |
| 1317 | ERASEINFO(0x01000,128), | |
| 1318 | } | |
| 1319 | }, { | |
| 1320 | .mfr_id = MANUFACTURER_SST, | |
| 1321 | .dev_id = SST39SF010A, | |
| 1322 | .name = "SST 39SF010A", | |
| 5d3cce3b DW |
1323 | .devtypes = CFI_DEVICETYPE_X8, |
| 1324 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1325 | .dev_size = SIZE_128KiB, | |
| 1326 | .cmd_set = P_ID_AMD_STD, | |
| 1327 | .nr_regions = 1, | |
| 1da177e4 LT |
1328 | .regions = { |
| 1329 | ERASEINFO(0x01000,32), | |
| 1330 | } | |
| 1331 | }, { | |
| 1332 | .mfr_id = MANUFACTURER_SST, | |
| 1333 | .dev_id = SST39SF020A, | |
| 1334 | .name = "SST 39SF020A", | |
| 5d3cce3b DW |
1335 | .devtypes = CFI_DEVICETYPE_X8, |
| 1336 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1337 | .dev_size = SIZE_256KiB, | |
| 1338 | .cmd_set = P_ID_AMD_STD, | |
| 1339 | .nr_regions = 1, | |
| 1da177e4 LT |
1340 | .regions = { |
| 1341 | ERASEINFO(0x01000,64), | |
| 1342 | } | |
| 1343 | }, { | |
| 89072ef9 | 1344 | .mfr_id = MANUFACTURER_SST, |
| 5d3cce3b DW |
1345 | .dev_id = SST49LF040B, |
| 1346 | .name = "SST 49LF040B", | |
| 1347 | .devtypes = CFI_DEVICETYPE_X8, | |
| 1348 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1349 | .dev_size = SIZE_512KiB, | |
| 1350 | .cmd_set = P_ID_AMD_STD, | |
| 1351 | .nr_regions = 1, | |
| 1352 | .regions = { | |
| 89072ef9 RJ |
1353 | ERASEINFO(0x01000,128), |
| 1354 | } | |
| 1355 | }, { | |
| 1356 | ||
| 1da177e4 LT |
1357 | .mfr_id = MANUFACTURER_SST, |
| 1358 | .dev_id = SST49LF004B, | |
| 1359 | .name = "SST 49LF004B", | |
| 5d3cce3b DW |
1360 | .devtypes = CFI_DEVICETYPE_X8, |
| 1361 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1362 | .dev_size = SIZE_512KiB, | |
| 1363 | .cmd_set = P_ID_AMD_STD, | |
| 1364 | .nr_regions = 1, | |
| 1da177e4 LT |
1365 | .regions = { |
| 1366 | ERASEINFO(0x01000,128), | |
| 1367 | } | |
| 1368 | }, { | |
| 1369 | .mfr_id = MANUFACTURER_SST, | |
| 1370 | .dev_id = SST49LF008A, | |
| 1371 | .name = "SST 49LF008A", | |
| 5d3cce3b DW |
1372 | .devtypes = CFI_DEVICETYPE_X8, |
| 1373 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1374 | .dev_size = SIZE_1MiB, | |
| 1375 | .cmd_set = P_ID_AMD_STD, | |
| 1376 | .nr_regions = 1, | |
| 1da177e4 LT |
1377 | .regions = { |
| 1378 | ERASEINFO(0x01000,256), | |
| 1379 | } | |
| 1380 | }, { | |
| 1381 | .mfr_id = MANUFACTURER_SST, | |
| 1382 | .dev_id = SST49LF030A, | |
| 1383 | .name = "SST 49LF030A", | |
| 5d3cce3b DW |
1384 | .devtypes = CFI_DEVICETYPE_X8, |
| 1385 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1386 | .dev_size = SIZE_512KiB, | |
| 1387 | .cmd_set = P_ID_AMD_STD, | |
| 1388 | .nr_regions = 1, | |
| 1da177e4 LT |
1389 | .regions = { |
| 1390 | ERASEINFO(0x01000,96), | |
| 1391 | } | |
| 1392 | }, { | |
| 1393 | .mfr_id = MANUFACTURER_SST, | |
| 1394 | .dev_id = SST49LF040A, | |
| 1395 | .name = "SST 49LF040A", | |
| 5d3cce3b DW |
1396 | .devtypes = CFI_DEVICETYPE_X8, |
| 1397 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1398 | .dev_size = SIZE_512KiB, | |
| 1399 | .cmd_set = P_ID_AMD_STD, | |
| 1400 | .nr_regions = 1, | |
| 1da177e4 LT |
1401 | .regions = { |
| 1402 | ERASEINFO(0x01000,128), | |
| 1403 | } | |
| 1404 | }, { | |
| 1405 | .mfr_id = MANUFACTURER_SST, | |
| 1406 | .dev_id = SST49LF080A, | |
| 1407 | .name = "SST 49LF080A", | |
| 5d3cce3b DW |
1408 | .devtypes = CFI_DEVICETYPE_X8, |
| 1409 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1410 | .dev_size = SIZE_1MiB, | |
| 1411 | .cmd_set = P_ID_AMD_STD, | |
| 1412 | .nr_regions = 1, | |
| 1da177e4 LT |
1413 | .regions = { |
| 1414 | ERASEINFO(0x01000,256), | |
| 1415 | } | |
| 1416 | }, { | |
| 5d3cce3b DW |
1417 | .mfr_id = MANUFACTURER_SST, /* should be CFI */ |
| 1418 | .dev_id = SST39LF160, | |
| 1419 | .name = "SST 39LF160", | |
| 1420 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
| 1421 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1422 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | |
| 1423 | .dev_size = SIZE_2MiB, | |
| 1424 | .cmd_set = P_ID_AMD_STD, | |
| 1425 | .nr_regions = 2, | |
| 1426 | .regions = { | |
| 1427 | ERASEINFO(0x1000,256), | |
| 1428 | ERASEINFO(0x1000,256) | |
| 1429 | } | |
| 1430 | }, { | |
| 1431 | .mfr_id = MANUFACTURER_SST, /* should be CFI */ | |
| 1432 | .dev_id = SST39VF1601, | |
| 1433 | .name = "SST 39VF1601", | |
| 1434 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
| 1435 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1436 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | |
| 1437 | .dev_size = SIZE_2MiB, | |
| 1438 | .cmd_set = P_ID_AMD_STD, | |
| 1439 | .nr_regions = 2, | |
| 1440 | .regions = { | |
| 1441 | ERASEINFO(0x1000,256), | |
| 1442 | ERASEINFO(0x1000,256) | |
| 1443 | } | |
| c9856e39 PDM |
1444 | }, { |
| 1445 | .mfr_id = MANUFACTURER_ST, | |
| 1446 | .dev_id = M29F800AB, | |
| 1447 | .name = "ST M29F800AB", | |
| 5d3cce3b DW |
1448 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1449 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1450 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1451 | .dev_size = SIZE_1MiB, | |
| 1452 | .cmd_set = P_ID_AMD_STD, | |
| 1453 | .nr_regions = 4, | |
| c9856e39 PDM |
1454 | .regions = { |
| 1455 | ERASEINFO(0x04000,1), | |
| 1456 | ERASEINFO(0x02000,2), | |
| 1457 | ERASEINFO(0x08000,1), | |
| 1458 | ERASEINFO(0x10000,15), | |
| 1459 | } | |
| 1da177e4 LT |
1460 | }, { |
| 1461 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
| 1462 | .dev_id = M29W800DT, | |
| 1463 | .name = "ST M29W800DT", | |
| 5d3cce3b DW |
1464 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1465 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1466 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | |
| 1467 | .dev_size = SIZE_1MiB, | |
| 1468 | .cmd_set = P_ID_AMD_STD, | |
| 1469 | .nr_regions = 4, | |
| 1da177e4 LT |
1470 | .regions = { |
| 1471 | ERASEINFO(0x10000,15), | |
| 1472 | ERASEINFO(0x08000,1), | |
| 1473 | ERASEINFO(0x02000,2), | |
| 1474 | ERASEINFO(0x04000,1) | |
| 1475 | } | |
| 1476 | }, { | |
| 1477 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
| 1478 | .dev_id = M29W800DB, | |
| 1479 | .name = "ST M29W800DB", | |
| 5d3cce3b DW |
1480 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1481 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1482 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | |
| 1483 | .dev_size = SIZE_1MiB, | |
| 1484 | .cmd_set = P_ID_AMD_STD, | |
| 1485 | .nr_regions = 4, | |
| 1da177e4 LT |
1486 | .regions = { |
| 1487 | ERASEINFO(0x04000,1), | |
| 1488 | ERASEINFO(0x02000,2), | |
| 1489 | ERASEINFO(0x08000,1), | |
| 1490 | ERASEINFO(0x10000,15) | |
| 1491 | } | |
| 1492 | }, { | |
| 1493 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
| 1494 | .dev_id = M29W160DT, | |
| 1495 | .name = "ST M29W160DT", | |
| 5d3cce3b DW |
1496 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1497 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1498 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1499 | .dev_size = SIZE_2MiB, | |
| 1500 | .cmd_set = P_ID_AMD_STD, | |
| 1501 | .nr_regions = 4, | |
| 1da177e4 LT |
1502 | .regions = { |
| 1503 | ERASEINFO(0x10000,31), | |
| 1504 | ERASEINFO(0x08000,1), | |
| 1505 | ERASEINFO(0x02000,2), | |
| 1506 | ERASEINFO(0x04000,1) | |
| 1507 | } | |
| 1508 | }, { | |
| 1509 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
| 1510 | .dev_id = M29W160DB, | |
| 1511 | .name = "ST M29W160DB", | |
| 5d3cce3b DW |
1512 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1513 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1514 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1515 | .dev_size = SIZE_2MiB, | |
| 1516 | .cmd_set = P_ID_AMD_STD, | |
| 1517 | .nr_regions = 4, | |
| 1da177e4 LT |
1518 | .regions = { |
| 1519 | ERASEINFO(0x04000,1), | |
| 1520 | ERASEINFO(0x02000,2), | |
| 1521 | ERASEINFO(0x08000,1), | |
| 1522 | ERASEINFO(0x10000,31) | |
| 1523 | } | |
| 1524 | }, { | |
| 1525 | .mfr_id = MANUFACTURER_ST, | |
| 1526 | .dev_id = M29W040B, | |
| 1527 | .name = "ST M29W040B", | |
| 5d3cce3b DW |
1528 | .devtypes = CFI_DEVICETYPE_X8, |
| 1529 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
| 1530 | .dev_size = SIZE_512KiB, | |
| 1531 | .cmd_set = P_ID_AMD_STD, | |
| 1532 | .nr_regions = 1, | |
| 1da177e4 LT |
1533 | .regions = { |
| 1534 | ERASEINFO(0x10000,8), | |
| 1535 | } | |
| 1536 | }, { | |
| 1537 | .mfr_id = MANUFACTURER_ST, | |
| 1538 | .dev_id = M50FW040, | |
| 1539 | .name = "ST M50FW040", | |
| 5d3cce3b DW |
1540 | .devtypes = CFI_DEVICETYPE_X8, |
| 1541 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1542 | .dev_size = SIZE_512KiB, | |
| 1543 | .cmd_set = P_ID_INTEL_EXT, | |
| 1544 | .nr_regions = 1, | |
| 1da177e4 LT |
1545 | .regions = { |
| 1546 | ERASEINFO(0x10000,8), | |
| 1547 | } | |
| 1548 | }, { | |
| 1549 | .mfr_id = MANUFACTURER_ST, | |
| 1550 | .dev_id = M50FW080, | |
| 1551 | .name = "ST M50FW080", | |
| 5d3cce3b DW |
1552 | .devtypes = CFI_DEVICETYPE_X8, |
| 1553 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1554 | .dev_size = SIZE_1MiB, | |
| 1555 | .cmd_set = P_ID_INTEL_EXT, | |
| 1556 | .nr_regions = 1, | |
| 1da177e4 LT |
1557 | .regions = { |
| 1558 | ERASEINFO(0x10000,16), | |
| 1559 | } | |
| 1560 | }, { | |
| 1561 | .mfr_id = MANUFACTURER_ST, | |
| 1562 | .dev_id = M50FW016, | |
| 1563 | .name = "ST M50FW016", | |
| 5d3cce3b DW |
1564 | .devtypes = CFI_DEVICETYPE_X8, |
| 1565 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1566 | .dev_size = SIZE_2MiB, | |
| 1567 | .cmd_set = P_ID_INTEL_EXT, | |
| 1568 | .nr_regions = 1, | |
| 1da177e4 LT |
1569 | .regions = { |
| 1570 | ERASEINFO(0x10000,32), | |
| 1571 | } | |
| 1572 | }, { | |
| 1573 | .mfr_id = MANUFACTURER_ST, | |
| 1574 | .dev_id = M50LPW080, | |
| 1575 | .name = "ST M50LPW080", | |
| 5d3cce3b DW |
1576 | .devtypes = CFI_DEVICETYPE_X8, |
| 1577 | .uaddr = MTD_UADDR_UNNECESSARY, | |
| 1578 | .dev_size = SIZE_1MiB, | |
| 1579 | .cmd_set = P_ID_INTEL_EXT, | |
| 1580 | .nr_regions = 1, | |
| 1da177e4 LT |
1581 | .regions = { |
| 1582 | ERASEINFO(0x10000,16), | |
| 1583 | } | |
| 1584 | }, { | |
| 1585 | .mfr_id = MANUFACTURER_TOSHIBA, | |
| 1586 | .dev_id = TC58FVT160, | |
| 1587 | .name = "Toshiba TC58FVT160", | |
| 5d3cce3b DW |
1588 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1589 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1590 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1591 | .dev_size = SIZE_2MiB, | |
| 1592 | .cmd_set = P_ID_AMD_STD, | |
| 1593 | .nr_regions = 4, | |
| 1da177e4 LT |
1594 | .regions = { |
| 1595 | ERASEINFO(0x10000,31), | |
| 1596 | ERASEINFO(0x08000,1), | |
| 1597 | ERASEINFO(0x02000,2), | |
| 1598 | ERASEINFO(0x04000,1) | |
| 1599 | } | |
| 1600 | }, { | |
| 1601 | .mfr_id = MANUFACTURER_TOSHIBA, | |
| 1602 | .dev_id = TC58FVB160, | |
| 1603 | .name = "Toshiba TC58FVB160", | |
| 5d3cce3b DW |
1604 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1605 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1606 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1607 | .dev_size = SIZE_2MiB, | |
| 1608 | .cmd_set = P_ID_AMD_STD, | |
| 1609 | .nr_regions = 4, | |
| 1da177e4 LT |
1610 | .regions = { |
| 1611 | ERASEINFO(0x04000,1), | |
| 1612 | ERASEINFO(0x02000,2), | |
| 1613 | ERASEINFO(0x08000,1), | |
| 1614 | ERASEINFO(0x10000,31) | |
| 1615 | } | |
| 1616 | }, { | |
| 1617 | .mfr_id = MANUFACTURER_TOSHIBA, | |
| 1618 | .dev_id = TC58FVB321, | |
| 1619 | .name = "Toshiba TC58FVB321", | |
| 5d3cce3b DW |
1620 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1621 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1622 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1623 | .dev_size = SIZE_4MiB, | |
| 1624 | .cmd_set = P_ID_AMD_STD, | |
| 1625 | .nr_regions = 2, | |
| 1da177e4 LT |
1626 | .regions = { |
| 1627 | ERASEINFO(0x02000,8), | |
| 1628 | ERASEINFO(0x10000,63) | |
| 1629 | } | |
| 1630 | }, { | |
| 1631 | .mfr_id = MANUFACTURER_TOSHIBA, | |
| 1632 | .dev_id = TC58FVT321, | |
| 1633 | .name = "Toshiba TC58FVT321", | |
| 5d3cce3b DW |
1634 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1635 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1636 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1637 | .dev_size = SIZE_4MiB, | |
| 1638 | .cmd_set = P_ID_AMD_STD, | |
| 1639 | .nr_regions = 2, | |
| 1da177e4 LT |
1640 | .regions = { |
| 1641 | ERASEINFO(0x10000,63), | |
| 1642 | ERASEINFO(0x02000,8) | |
| 1643 | } | |
| 1644 | }, { | |
| 1645 | .mfr_id = MANUFACTURER_TOSHIBA, | |
| 1646 | .dev_id = TC58FVB641, | |
| 1647 | .name = "Toshiba TC58FVB641", | |
| 5d3cce3b DW |
1648 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1649 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1650 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1651 | .dev_size = SIZE_8MiB, | |
| 1652 | .cmd_set = P_ID_AMD_STD, | |
| 1653 | .nr_regions = 2, | |
| 1da177e4 LT |
1654 | .regions = { |
| 1655 | ERASEINFO(0x02000,8), | |
| 1656 | ERASEINFO(0x10000,127) | |
| 1657 | } | |
| 1658 | }, { | |
| 1659 | .mfr_id = MANUFACTURER_TOSHIBA, | |
| 1660 | .dev_id = TC58FVT641, | |
| 1661 | .name = "Toshiba TC58FVT641", | |
| 5d3cce3b DW |
1662 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
| 1663 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
| 1664 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | |
| 1665 | .dev_size = SIZE_8MiB, | |
| 1666 | .cmd_set = P_ID_AMD_STD, | |
| 1667 | .nr_regions = 2, | |
| 1da177e4 LT |
1668 | .regions = { |
| 1669 | ERASEINFO(0x10000,127), | |
| 1670 | ERASEINFO(0x02000,8) | |
| 1671 | } | |
| 1672 | }, { | |
| 1673 | .mfr_id = MANUFACTURER_WINBOND, | |
| 1674 | .dev_id = W49V002A, | |
| 1675 | .name = "Winbond W49V002A", | |
| 5d3cce3b DW |
1676 | .devtypes = CFI_DEVICETYPE_X8, |
| 1677 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
| 1678 | .dev_size = SIZE_256KiB, | |
| 1679 | .cmd_set = P_ID_AMD_STD, | |
| 1680 | .nr_regions = 4, | |
| 1da177e4 LT |
1681 | .regions = { |
| 1682 | ERASEINFO(0x10000, 3), | |
| 1683 | ERASEINFO(0x08000, 1), | |
| 1684 | ERASEINFO(0x02000, 2), | |
| 1685 | ERASEINFO(0x04000, 1), | |
| 1686 | } | |
| 1687 | } | |
| 1688 | }; | |
| 1689 | ||
| 1690 | ||
| 1691 | static int cfi_jedec_setup(struct cfi_private *p_cfi, int index); | |
| 1692 | ||
| 5d3cce3b | 1693 | static int jedec_probe_chip(struct map_info *map, uint32_t base, |
| 1da177e4 LT |
1694 | unsigned long *chip_map, struct cfi_private *cfi); |
| 1695 | ||
| 1696 | static struct mtd_info *jedec_probe(struct map_info *map); | |
| 1697 | ||
| 5d3cce3b | 1698 | static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base, |
| 1da177e4 LT |
1699 | struct cfi_private *cfi) |
| 1700 | { | |
| 1701 | map_word result; | |
| 1702 | unsigned long mask; | |
| 1703 | u32 ofs = cfi_build_cmd_addr(0, cfi_interleave(cfi), cfi->device_type); | |
| 1704 | mask = (1 << (cfi->device_type * 8)) -1; | |
| 1705 | result = map_read(map, base + ofs); | |
| 1706 | return result.x[0] & mask; | |
| 1707 | } | |
| 1708 | ||
| 5d3cce3b | 1709 | static inline u32 jedec_read_id(struct map_info *map, uint32_t base, |
| 1da177e4 LT |
1710 | struct cfi_private *cfi) |
| 1711 | { | |
| 1712 | map_word result; | |
| 1713 | unsigned long mask; | |
| 1714 | u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type); | |
| 1715 | mask = (1 << (cfi->device_type * 8)) -1; | |
| 1716 | result = map_read(map, base + ofs); | |
| 1717 | return result.x[0] & mask; | |
| 1718 | } | |
| 1719 | ||
| 1f948b43 | 1720 | static inline void jedec_reset(u32 base, struct map_info *map, |
| 1da177e4 LT |
1721 | struct cfi_private *cfi) |
| 1722 | { | |
| 1723 | /* Reset */ | |
| 1724 | ||
| 1725 | /* after checking the datasheets for SST, MACRONIX and ATMEL | |
| 1726 | * (oh and incidentaly the jedec spec - 3.5.3.3) the reset | |
| 1727 | * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at | |
| 1728 | * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips | |
| 1729 | * as they will ignore the writes and dont care what address | |
| 1730 | * the F0 is written to */ | |
| 1731 | if(cfi->addr_unlock1) { | |
| 1732 | DEBUG( MTD_DEBUG_LEVEL3, | |
| 1733 | "reset unlock called %x %x \n", | |
| 1734 | cfi->addr_unlock1,cfi->addr_unlock2); | |
| 1735 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
| 1736 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
| 1737 | } | |
| 1738 | ||
| 1739 | cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
| 1740 | /* Some misdesigned intel chips do not respond for 0xF0 for a reset, | |
| 1741 | * so ensure we're in read mode. Send both the Intel and the AMD command | |
| 1742 | * for this. Intel uses 0xff for this, AMD uses 0xff for NOP, so | |
| 1743 | * this should be safe. | |
| 1f948b43 | 1744 | */ |
| 1da177e4 LT |
1745 | cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); |
| 1746 | /* FIXME - should have reset delay before continuing */ | |
| 1747 | } | |
| 1748 | ||
| 1749 | ||
| 1da177e4 LT |
1750 | static int cfi_jedec_setup(struct cfi_private *p_cfi, int index) |
| 1751 | { | |
| 1752 | int i,num_erase_regions; | |
| 5d3cce3b DW |
1753 | uint8_t uaddr; |
| 1754 | ||
| 1755 | if (! (jedec_table[index].devtypes & p_cfi->device_type)) { | |
| 1756 | DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n", | |
| 1757 | jedec_table[index].name, 4 * (1<<p_cfi->device_type)); | |
| 1758 | return 0; | |
| 1759 | } | |
| 1da177e4 | 1760 | |
| 5d3cce3b | 1761 | printk(KERN_INFO "Found: %s\n",jedec_table[index].name); |
| 1da177e4 | 1762 | |
| 5d3cce3b | 1763 | num_erase_regions = jedec_table[index].nr_regions; |
| 1f948b43 | 1764 | |
| 1da177e4 LT |
1765 | p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); |
| 1766 | if (!p_cfi->cfiq) { | |
| 1767 | //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name); | |
| 1768 | return 0; | |
| 1769 | } | |
| 1770 | ||
| 1f948b43 | 1771 | memset(p_cfi->cfiq,0,sizeof(struct cfi_ident)); |
| 1da177e4 | 1772 | |
| 5d3cce3b DW |
1773 | p_cfi->cfiq->P_ID = jedec_table[index].cmd_set; |
| 1774 | p_cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions; | |
| 1775 | p_cfi->cfiq->DevSize = jedec_table[index].dev_size; | |
| 1da177e4 LT |
1776 | p_cfi->cfi_mode = CFI_MODE_JEDEC; |
| 1777 | ||
| 1778 | for (i=0; i<num_erase_regions; i++){ | |
| 1779 | p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i]; | |
| 1780 | } | |
| 1781 | p_cfi->cmdset_priv = NULL; | |
| 1782 | ||
| 1783 | /* This may be redundant for some cases, but it doesn't hurt */ | |
| 1784 | p_cfi->mfr = jedec_table[index].mfr_id; | |
| 1785 | p_cfi->id = jedec_table[index].dev_id; | |
| 1786 | ||
| 5d3cce3b | 1787 | uaddr = jedec_table[index].uaddr; |
| 1da177e4 LT |
1788 | |
| 1789 | p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1; | |
| 1790 | p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2; | |
| 1791 | ||
| 1792 | return 1; /* ok */ | |
| 1793 | } | |
| 1794 | ||
| 1795 | ||
| 1796 | /* | |
| f33686b5 | 1797 | * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing |
| 1da177e4 LT |
1798 | * the mapped address, unlock addresses, and proper chip ID. This function |
| 1799 | * attempts to minimize errors. It is doubtfull that this probe will ever | |
| 1800 | * be perfect - consequently there should be some module parameters that | |
| 1801 | * could be manually specified to force the chip info. | |
| 1802 | */ | |
| 5d3cce3b | 1803 | static inline int jedec_match( uint32_t base, |
| 1da177e4 LT |
1804 | struct map_info *map, |
| 1805 | struct cfi_private *cfi, | |
| 1806 | const struct amd_flash_info *finfo ) | |
| 1807 | { | |
| 1808 | int rc = 0; /* failure until all tests pass */ | |
| 1809 | u32 mfr, id; | |
| 5d3cce3b | 1810 | uint8_t uaddr; |
| 1da177e4 LT |
1811 | |
| 1812 | /* | |
| 1813 | * The IDs must match. For X16 and X32 devices operating in | |
| 1814 | * a lower width ( X8 or X16 ), the device ID's are usually just | |
| 1815 | * the lower byte(s) of the larger device ID for wider mode. If | |
| 1816 | * a part is found that doesn't fit this assumption (device id for | |
| 1817 | * smaller width mode is completely unrealated to full-width mode) | |
| 1818 | * then the jedec_table[] will have to be augmented with the IDs | |
| 1819 | * for different widths. | |
| 1820 | */ | |
| 1821 | switch (cfi->device_type) { | |
| 1822 | case CFI_DEVICETYPE_X8: | |
| 5d3cce3b DW |
1823 | mfr = (uint8_t)finfo->mfr_id; |
| 1824 | id = (uint8_t)finfo->dev_id; | |
| 011b2a36 BD |
1825 | |
| 1826 | /* bjd: it seems that if we do this, we can end up | |
| 1827 | * detecting 16bit flashes as an 8bit device, even though | |
| 1828 | * there aren't. | |
| 1829 | */ | |
| 1830 | if (finfo->dev_id > 0xff) { | |
| 1831 | DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n", | |
| 1832 | __func__); | |
| 1833 | goto match_done; | |
| 1834 | } | |
| 1da177e4 LT |
1835 | break; |
| 1836 | case CFI_DEVICETYPE_X16: | |
| 5d3cce3b DW |
1837 | mfr = (uint16_t)finfo->mfr_id; |
| 1838 | id = (uint16_t)finfo->dev_id; | |
| 1da177e4 LT |
1839 | break; |
| 1840 | case CFI_DEVICETYPE_X32: | |
| 5d3cce3b DW |
1841 | mfr = (uint16_t)finfo->mfr_id; |
| 1842 | id = (uint32_t)finfo->dev_id; | |
| 1da177e4 LT |
1843 | break; |
| 1844 | default: | |
| 1845 | printk(KERN_WARNING | |
| 1846 | "MTD %s(): Unsupported device type %d\n", | |
| 1847 | __func__, cfi->device_type); | |
| 1848 | goto match_done; | |
| 1849 | } | |
| 1850 | if ( cfi->mfr != mfr || cfi->id != id ) { | |
| 1851 | goto match_done; | |
| 1852 | } | |
| 1853 | ||
| 1854 | /* the part size must fit in the memory window */ | |
| 1855 | DEBUG( MTD_DEBUG_LEVEL3, | |
| 1856 | "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n", | |
| 5d3cce3b DW |
1857 | __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) ); |
| 1858 | if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) { | |
| 1da177e4 LT |
1859 | DEBUG( MTD_DEBUG_LEVEL3, |
| 1860 | "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n", | |
| 1861 | __func__, finfo->mfr_id, finfo->dev_id, | |
| 5d3cce3b | 1862 | 1 << finfo->dev_size ); |
| 1da177e4 LT |
1863 | goto match_done; |
| 1864 | } | |
| 1865 | ||
| 5d3cce3b | 1866 | if (! (finfo->devtypes & cfi->device_type)) |
| 1da177e4 | 1867 | goto match_done; |
| 5d3cce3b DW |
1868 | |
| 1869 | uaddr = finfo->uaddr; | |
| 1da177e4 LT |
1870 | |
| 1871 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n", | |
| 1872 | __func__, cfi->addr_unlock1, cfi->addr_unlock2 ); | |
| 1873 | if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr | |
| 1874 | && ( unlock_addrs[uaddr].addr1 != cfi->addr_unlock1 || | |
| 1875 | unlock_addrs[uaddr].addr2 != cfi->addr_unlock2 ) ) { | |
| 1876 | DEBUG( MTD_DEBUG_LEVEL3, | |
| 1877 | "MTD %s(): 0x%.4x 0x%.4x did not match\n", | |
| 1878 | __func__, | |
| 1879 | unlock_addrs[uaddr].addr1, | |
| 1880 | unlock_addrs[uaddr].addr2); | |
| 1881 | goto match_done; | |
| 1882 | } | |
| 1883 | ||
| 1884 | /* | |
| 1885 | * Make sure the ID's dissappear when the device is taken out of | |
| 1886 | * ID mode. The only time this should fail when it should succeed | |
| 1887 | * is when the ID's are written as data to the same | |
| 1888 | * addresses. For this rare and unfortunate case the chip | |
| 1889 | * cannot be probed correctly. | |
| 1890 | * FIXME - write a driver that takes all of the chip info as | |
| 1891 | * module parameters, doesn't probe but forces a load. | |
| 1892 | */ | |
| 1893 | DEBUG( MTD_DEBUG_LEVEL3, | |
| 1894 | "MTD %s(): check ID's disappear when not in ID mode\n", | |
| 1895 | __func__ ); | |
| 1896 | jedec_reset( base, map, cfi ); | |
| 1897 | mfr = jedec_read_mfr( map, base, cfi ); | |
| 1898 | id = jedec_read_id( map, base, cfi ); | |
| 1899 | if ( mfr == cfi->mfr && id == cfi->id ) { | |
| 1900 | DEBUG( MTD_DEBUG_LEVEL3, | |
| 1901 | "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n" | |
| 1902 | "You might need to manually specify JEDEC parameters.\n", | |
| 1903 | __func__, cfi->mfr, cfi->id ); | |
| 1904 | goto match_done; | |
| 1905 | } | |
| 1906 | ||
| 1907 | /* all tests passed - mark as success */ | |
| 1908 | rc = 1; | |
| 1909 | ||
| 1910 | /* | |
| 1911 | * Put the device back in ID mode - only need to do this if we | |
| 1912 | * were truly frobbing a real device. | |
| 1913 | */ | |
| 1914 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ ); | |
| 1915 | if(cfi->addr_unlock1) { | |
| 1916 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
| 1917 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
| 1918 | } | |
| 1919 | cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
| 1920 | /* FIXME - should have a delay before continuing */ | |
| 1921 | ||
| 1f948b43 | 1922 | match_done: |
| 1da177e4 LT |
1923 | return rc; |
| 1924 | } | |
| 1925 | ||
| 1926 | ||
| 1927 | static int jedec_probe_chip(struct map_info *map, __u32 base, | |
| 1928 | unsigned long *chip_map, struct cfi_private *cfi) | |
| 1929 | { | |
| 1930 | int i; | |
| 1931 | enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED; | |
| 1932 | u32 probe_offset1, probe_offset2; | |
| 1933 | ||
| 1934 | retry: | |
| 1935 | if (!cfi->numchips) { | |
| 1936 | uaddr_idx++; | |
| 1937 | ||
| 1938 | if (MTD_UADDR_UNNECESSARY == uaddr_idx) | |
| 1939 | return 0; | |
| 1940 | ||
| 1941 | cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1; | |
| 1942 | cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2; | |
| 1943 | } | |
| 1944 | ||
| 1945 | /* Make certain we aren't probing past the end of map */ | |
| 1946 | if (base >= map->size) { | |
| 1947 | printk(KERN_NOTICE | |
| 1948 | "Probe at base(0x%08x) past the end of the map(0x%08lx)\n", | |
| 1949 | base, map->size -1); | |
| 1950 | return 0; | |
| 1f948b43 | 1951 | |
| 1da177e4 LT |
1952 | } |
| 1953 | /* Ensure the unlock addresses we try stay inside the map */ | |
| 5d3cce3b | 1954 | probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type); |
| f6f0f818 | 1955 | probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, cfi_interleave(cfi), cfi->device_type); |
| 1da177e4 LT |
1956 | if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) || |
| 1957 | ((base + probe_offset2 + map_bankwidth(map)) >= map->size)) | |
| 1da177e4 | 1958 | goto retry; |
| 1f948b43 | 1959 | |
| 1da177e4 LT |
1960 | /* Reset */ |
| 1961 | jedec_reset(base, map, cfi); | |
| 1962 | ||
| 1963 | /* Autoselect Mode */ | |
| 1964 | if(cfi->addr_unlock1) { | |
| 1965 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
| 1966 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
| 1967 | } | |
| 1968 | cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
| 1969 | /* FIXME - should have a delay before continuing */ | |
| 1970 | ||
| 1971 | if (!cfi->numchips) { | |
| 1f948b43 | 1972 | /* This is the first time we're called. Set up the CFI |
| 1da177e4 | 1973 | stuff accordingly and return */ |
| 1f948b43 | 1974 | |
| 1da177e4 LT |
1975 | cfi->mfr = jedec_read_mfr(map, base, cfi); |
| 1976 | cfi->id = jedec_read_id(map, base, cfi); | |
| 1977 | DEBUG(MTD_DEBUG_LEVEL3, | |
| 1f948b43 | 1978 | "Search for id:(%02x %02x) interleave(%d) type(%d)\n", |
| 1da177e4 | 1979 | cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type); |
| 87d10f3c | 1980 | for (i = 0; i < ARRAY_SIZE(jedec_table); i++) { |
| 1da177e4 LT |
1981 | if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) { |
| 1982 | DEBUG( MTD_DEBUG_LEVEL3, | |
| 1983 | "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n", | |
| 1984 | __func__, cfi->mfr, cfi->id, | |
| 1985 | cfi->addr_unlock1, cfi->addr_unlock2 ); | |
| 1986 | if (!cfi_jedec_setup(cfi, i)) | |
| 1987 | return 0; | |
| 1988 | goto ok_out; | |
| 1989 | } | |
| 1990 | } | |
| 1991 | goto retry; | |
| 1992 | } else { | |
| 5d3cce3b DW |
1993 | uint16_t mfr; |
| 1994 | uint16_t id; | |
| 1da177e4 LT |
1995 | |
| 1996 | /* Make sure it is a chip of the same manufacturer and id */ | |
| 1997 | mfr = jedec_read_mfr(map, base, cfi); | |
| 1998 | id = jedec_read_id(map, base, cfi); | |
| 1999 | ||
| 2000 | if ((mfr != cfi->mfr) || (id != cfi->id)) { | |
| 2001 | printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n", | |
| 2002 | map->name, mfr, id, base); | |
| 2003 | jedec_reset(base, map, cfi); | |
| 2004 | return 0; | |
| 2005 | } | |
| 2006 | } | |
| 1f948b43 | 2007 | |
| 1da177e4 LT |
2008 | /* Check each previous chip locations to see if it's an alias */ |
| 2009 | for (i=0; i < (base >> cfi->chipshift); i++) { | |
| 2010 | unsigned long start; | |
| 2011 | if(!test_bit(i, chip_map)) { | |
| 2012 | continue; /* Skip location; no valid chip at this address */ | |
| 2013 | } | |
| 2014 | start = i << cfi->chipshift; | |
| 2015 | if (jedec_read_mfr(map, start, cfi) == cfi->mfr && | |
| 2016 | jedec_read_id(map, start, cfi) == cfi->id) { | |
| 2017 | /* Eep. This chip also looks like it's in autoselect mode. | |
| 2018 | Is it an alias for the new one? */ | |
| 2019 | jedec_reset(start, map, cfi); | |
| 2020 | ||
| 2021 | /* If the device IDs go away, it's an alias */ | |
| 2022 | if (jedec_read_mfr(map, base, cfi) != cfi->mfr || | |
| 2023 | jedec_read_id(map, base, cfi) != cfi->id) { | |
| 2024 | printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", | |
| 2025 | map->name, base, start); | |
| 2026 | return 0; | |
| 2027 | } | |
| 1f948b43 | 2028 | |
| 1da177e4 LT |
2029 | /* Yes, it's actually got the device IDs as data. Most |
| 2030 | * unfortunate. Stick the new chip in read mode | |
| 2031 | * too and if it's the same, assume it's an alias. */ | |
| 2032 | /* FIXME: Use other modes to do a proper check */ | |
| 2033 | jedec_reset(base, map, cfi); | |
| 2034 | if (jedec_read_mfr(map, base, cfi) == cfi->mfr && | |
| 2035 | jedec_read_id(map, base, cfi) == cfi->id) { | |
| 2036 | printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", | |
| 2037 | map->name, base, start); | |
| 2038 | return 0; | |
| 2039 | } | |
| 2040 | } | |
| 2041 | } | |
| 1f948b43 | 2042 | |
| 1da177e4 LT |
2043 | /* OK, if we got to here, then none of the previous chips appear to |
| 2044 | be aliases for the current one. */ | |
| 2045 | set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */ | |
| 2046 | cfi->numchips++; | |
| 1f948b43 | 2047 | |
| 1da177e4 LT |
2048 | ok_out: |
| 2049 | /* Put it back into Read Mode */ | |
| 2050 | jedec_reset(base, map, cfi); | |
| 2051 | ||
| 2052 | printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", | |
| 1f948b43 | 2053 | map->name, cfi_interleave(cfi), cfi->device_type*8, base, |
| 1da177e4 | 2054 | map->bankwidth*8); |
| 1f948b43 | 2055 | |
| 1da177e4 LT |
2056 | return 1; |
| 2057 | } | |
| 2058 | ||
| 2059 | static struct chip_probe jedec_chip_probe = { | |
| 2060 | .name = "JEDEC", | |
| 2061 | .probe_chip = jedec_probe_chip | |
| 2062 | }; | |
| 2063 | ||
| 2064 | static struct mtd_info *jedec_probe(struct map_info *map) | |
| 2065 | { | |
| 2066 | /* | |
| 2067 | * Just use the generic probe stuff to call our CFI-specific | |
| 2068 | * chip_probe routine in all the possible permutations, etc. | |
| 2069 | */ | |
| 2070 | return mtd_do_chip_probe(map, &jedec_chip_probe); | |
| 2071 | } | |
| 2072 | ||
| 2073 | static struct mtd_chip_driver jedec_chipdrv = { | |
| 2074 | .probe = jedec_probe, | |
| 2075 | .name = "jedec_probe", | |
| 2076 | .module = THIS_MODULE | |
| 2077 | }; | |
| 2078 | ||
| 2079 | static int __init jedec_probe_init(void) | |
| 2080 | { | |
| 2081 | register_mtd_chip_driver(&jedec_chipdrv); | |
| 2082 | return 0; | |
| 2083 | } | |
| 2084 | ||
| 2085 | static void __exit jedec_probe_exit(void) | |
| 2086 | { | |
| 2087 | unregister_mtd_chip_driver(&jedec_chipdrv); | |
| 2088 | } | |
| 2089 | ||
| 2090 | module_init(jedec_probe_init); | |
| 2091 | module_exit(jedec_probe_exit); | |
| 2092 | ||
| 2093 | MODULE_LICENSE("GPL"); | |
| 2094 | MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al."); | |
| 2095 | MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips"); |