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mmc: Add support for SDHC cards
[net-next-2.6.git] / drivers / mmc / tifm_sd.c
CommitLineData
4020f2d7
AD		 1/*
2 * tifm_sd.c - TI FlashMedia driver
3 *
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12
13#include <linux/tifm.h>
14#include <linux/mmc/protocol.h>
15#include <linux/mmc/host.h>
16#include <linux/highmem.h>
2099c99e 17#include <asm/io.h>
4020f2d7
AD		 18
19#define DRIVER_NAME "tifm_sd"
20#define DRIVER_VERSION "0.6"
21
22static int no_dma = 0;
23static int fixed_timeout = 0;
24module_param(no_dma, bool, 0644);
25module_param(fixed_timeout, bool, 0644);
26
27/* Constants here are mostly from OMAP5912 datasheet */
28#define TIFM_MMCSD_RESET 0x0002
29#define TIFM_MMCSD_CLKMASK 0x03ff
30#define TIFM_MMCSD_POWER 0x0800
31#define TIFM_MMCSD_4BBUS 0x8000
32#define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
33#define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
34#define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
35#define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
36#define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
37#define TIFM_MMCSD_READ 0x8000
38
39#define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
40#define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
41#define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42#define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43#define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44#define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45#define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46#define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47#define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48#define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49#define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50#define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51#define TIFM_MMCSD_CERR 0x4000 /* card status error */
52
53#define TIFM_MMCSD_FIFO_SIZE 0x0020
54
55#define TIFM_MMCSD_RSP_R0 0x0000
56#define TIFM_MMCSD_RSP_R1 0x0100
57#define TIFM_MMCSD_RSP_R2 0x0200
58#define TIFM_MMCSD_RSP_R3 0x0300
59#define TIFM_MMCSD_RSP_R4 0x0400
60#define TIFM_MMCSD_RSP_R5 0x0500
61#define TIFM_MMCSD_RSP_R6 0x0600
62
63#define TIFM_MMCSD_RSP_BUSY 0x0800
64
65#define TIFM_MMCSD_CMD_BC 0x0000
66#define TIFM_MMCSD_CMD_BCR 0x1000
67#define TIFM_MMCSD_CMD_AC 0x2000
68#define TIFM_MMCSD_CMD_ADTC 0x3000
69
70typedef enum {
71 IDLE = 0,
72 CMD, /* main command ended */
73 BRS, /* block transfer finished */
74 SCMD, /* stop command ended */
75 CARD, /* card left busy state */
76 FIFO, /* FIFO operation completed (uncertain) */
77 READY
78} card_state_t;
79
80enum {
81 FIFO_RDY = 0x0001, /* hardware dependent value */
82 HOST_REG = 0x0002,
83 EJECT = 0x0004,
84 EJECT_DONE = 0x0008,
85 CARD_BUSY = 0x0010,
86 OPENDRAIN = 0x0040, /* hardware dependent value */
87 CARD_EVENT = 0x0100, /* hardware dependent value */
88 CARD_RO = 0x0200, /* hardware dependent value */
89 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
90
91struct tifm_sd {
92 struct tifm_dev *dev;
93
94 unsigned int flags;
95 card_state_t state;
96 unsigned int clk_freq;
97 unsigned int clk_div;
98 unsigned long timeout_jiffies; // software timeout - 2 sec
99
100 struct mmc_request *req;
101 struct work_struct cmd_handler;
c4028958 102 struct delayed_work abort_handler;
4020f2d7
AD		 103 wait_queue_head_t can_eject;
104
105 size_t written_blocks;
106 char *buffer;
107 size_t buffer_size;
108 size_t buffer_pos;
109
110};
111
112static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
113 unsigned int host_status)
114{
115 struct mmc_command *cmd = host->req->cmd;
116 unsigned int t_val = 0, cnt = 0;
117
118 if (host_status & TIFM_MMCSD_BRS) {
119 /* in non-dma rx mode BRS fires when fifo is still not empty */
120 if (host->buffer && (cmd->data->flags & MMC_DATA_READ)) {
121 while (host->buffer_size > host->buffer_pos) {
122 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
123 host->buffer[host->buffer_pos++] = t_val & 0xff;
124 host->buffer[host->buffer_pos++] =
125 (t_val >> 8) & 0xff;
126 }
127 }
128 return 1;
129 } else if (host->buffer) {
130 if ((cmd->data->flags & MMC_DATA_READ) &&
131 (host_status & TIFM_MMCSD_AF)) {
132 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
133 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
134 if (host->buffer_size > host->buffer_pos) {
135 host->buffer[host->buffer_pos++] =
136 t_val & 0xff;
137 host->buffer[host->buffer_pos++] =
138 (t_val >> 8) & 0xff;
139 }
140 }
141 } else if ((cmd->data->flags & MMC_DATA_WRITE)
142 && (host_status & TIFM_MMCSD_AE)) {
143 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
144 if (host->buffer_size > host->buffer_pos) {
145 t_val = host->buffer[host->buffer_pos++] & 0x00ff;
146 t_val |= ((host->buffer[host->buffer_pos++]) << 8)
147 & 0xff00;
148 writel(t_val,
149 sock->addr + SOCK_MMCSD_DATA);
150 }
151 }
152 }
153 }
154 return 0;
155}
156
157static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
158{
159 unsigned int rc = 0;
160
161 switch (mmc_resp_type(cmd)) {
162 case MMC_RSP_NONE:
163 rc |= TIFM_MMCSD_RSP_R0;
164 break;
165 case MMC_RSP_R1B:
166 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
167 case MMC_RSP_R1:
168 rc |= TIFM_MMCSD_RSP_R1;
169 break;
170 case MMC_RSP_R2:
171 rc |= TIFM_MMCSD_RSP_R2;
172 break;
173 case MMC_RSP_R3:
174 rc |= TIFM_MMCSD_RSP_R3;
175 break;
4020f2d7
AD		 176 default:
177 BUG();
178 }
179
180 switch (mmc_cmd_type(cmd)) {
181 case MMC_CMD_BC:
182 rc |= TIFM_MMCSD_CMD_BC;
183 break;
184 case MMC_CMD_BCR:
185 rc |= TIFM_MMCSD_CMD_BCR;
186 break;
187 case MMC_CMD_AC:
188 rc |= TIFM_MMCSD_CMD_AC;
189 break;
190 case MMC_CMD_ADTC:
191 rc |= TIFM_MMCSD_CMD_ADTC;
192 break;
193 default:
194 BUG();
195 }
196 return rc;
197}
198
199static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
200{
201 struct tifm_dev *sock = host->dev;
202 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
203 (host->flags & OPENDRAIN);
204
205 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
206 cmd_mask |= TIFM_MMCSD_READ;
207
208 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
209 cmd->opcode, cmd->arg, cmd_mask);
210
211 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
212 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
213 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
214}
215
216static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
217{
218 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
219 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
220 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
221 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
222 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
223 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
224 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
225 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
226}
227
228static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
229 unsigned int host_status)
230{
231 struct mmc_command *cmd = host->req->cmd;
232
233change_state:
234 switch (host->state) {
235 case IDLE:
236 return;
237 case CMD:
238 if (host_status & TIFM_MMCSD_EOC) {
239 tifm_sd_fetch_resp(cmd, sock);
240 if (cmd->data) {
241 host->state = BRS;
242 } else
243 host->state = READY;
244 goto change_state;
245 }
246 break;
247 case BRS:
248 if (tifm_sd_transfer_data(sock, host, host_status)) {
249 if (!host->req->stop) {
250 if (cmd->data->flags & MMC_DATA_WRITE) {
251 host->state = CARD;
252 } else {
253 host->state =
254 host->buffer ? READY : FIFO;
255 }
256 goto change_state;
257 }
258 tifm_sd_exec(host, host->req->stop);
259 host->state = SCMD;
260 }
261 break;
262 case SCMD:
263 if (host_status & TIFM_MMCSD_EOC) {
264 tifm_sd_fetch_resp(host->req->stop, sock);
265 if (cmd->error) {
266 host->state = READY;
267 } else if (cmd->data->flags & MMC_DATA_WRITE) {
268 host->state = CARD;
269 } else {
270 host->state = host->buffer ? READY : FIFO;
271 }
272 goto change_state;
273 }
274 break;
275 case CARD:
276 if (!(host->flags & CARD_BUSY)
277 && (host->written_blocks == cmd->data->blocks)) {
278 host->state = host->buffer ? READY : FIFO;
279 goto change_state;
280 }
281 break;
282 case FIFO:
283 if (host->flags & FIFO_RDY) {
284 host->state = READY;
285 host->flags &= ~FIFO_RDY;
286 goto change_state;
287 }
288 break;
289 case READY:
290 queue_work(sock->wq, &host->cmd_handler);
291 return;
292 }
293
294 queue_delayed_work(sock->wq, &host->abort_handler,
295 host->timeout_jiffies);
296}
297
298/* Called from interrupt handler */
299static unsigned int tifm_sd_signal_irq(struct tifm_dev *sock,
300 unsigned int sock_irq_status)
301{
302 struct tifm_sd *host;
303 unsigned int host_status = 0, fifo_status = 0;
304 int error_code = 0;
305
306 spin_lock(&sock->lock);
307 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
308 cancel_delayed_work(&host->abort_handler);
309
310 if (sock_irq_status & FIFO_EVENT) {
311 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
312 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
313
314 host->flags |= fifo_status & FIFO_RDY;
315 }
316
317 if (sock_irq_status & CARD_EVENT) {
318 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
319 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
320
321 if (!(host->flags & HOST_REG))
322 queue_work(sock->wq, &host->cmd_handler);
323 if (!host->req)
324 goto done;
325
326 if (host_status & TIFM_MMCSD_ERRMASK) {
327 if (host_status & TIFM_MMCSD_CERR)
328 error_code = MMC_ERR_FAILED;
329 else if (host_status &
330 (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
331 error_code = MMC_ERR_TIMEOUT;
332 else if (host_status &
333 (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
334 error_code = MMC_ERR_BADCRC;
335
336 writel(TIFM_FIFO_INT_SETALL,
337 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
338 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
339
340 if (host->req->stop) {
341 if (host->state == SCMD) {
342 host->req->stop->error = error_code;
343 } else if(host->state == BRS) {
344 host->req->cmd->error = error_code;
345 tifm_sd_exec(host, host->req->stop);
346 queue_delayed_work(sock->wq,
347 &host->abort_handler,
348 host->timeout_jiffies);
349 host->state = SCMD;
350 goto done;
351 } else {
352 host->req->cmd->error = error_code;
353 }
354 } else {
355 host->req->cmd->error = error_code;
356 }
357 host->state = READY;
358 }
359
360 if (host_status & TIFM_MMCSD_CB)
361 host->flags |= CARD_BUSY;
362 if ((host_status & TIFM_MMCSD_EOFB) &&
363 (host->flags & CARD_BUSY)) {
364 host->written_blocks++;
365 host->flags &= ~CARD_BUSY;
366 }
367 }
368
369 if (host->req)
370 tifm_sd_process_cmd(sock, host, host_status);
371done:
372 dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
373 host_status, fifo_status);
374 spin_unlock(&sock->lock);
375 return sock_irq_status;
376}
377
378static void tifm_sd_prepare_data(struct tifm_sd *card, struct mmc_command *cmd)
379{
380 struct tifm_dev *sock = card->dev;
381 unsigned int dest_cnt;
382
383 /* DMA style IO */
384
385 writel(TIFM_FIFO_INT_SETALL,
386 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
f0d1b0b3 387 writel(ilog2(cmd->data->blksz) - 2,
4020f2d7
AD		 388 sock->addr + SOCK_FIFO_PAGE_SIZE);
389 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
390 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
391
392 dest_cnt = (cmd->data->blocks) << 8;
393
394 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
395
396 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
397 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
398
399 if (cmd->data->flags & MMC_DATA_WRITE) {
400 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
401 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
402 sock->addr + SOCK_DMA_CONTROL);
403 } else {
404 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
405 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
406 }
407}
408
409static void tifm_sd_set_data_timeout(struct tifm_sd *host,
410 struct mmc_data *data)
411{
412 struct tifm_dev *sock = host->dev;
413 unsigned int data_timeout = data->timeout_clks;
414
415 if (fixed_timeout)
416 return;
417
418 data_timeout += data->timeout_ns /
419 ((1000000000 / host->clk_freq) * host->clk_div);
420 data_timeout *= 10; // call it fudge factor for now
421
422 if (data_timeout < 0xffff) {
423 writel((~TIFM_MMCSD_DPE) &
424 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
425 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
426 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
427 } else {
428 writel(TIFM_MMCSD_DPE |
429 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
430 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
431 data_timeout = (data_timeout >> 10) + 1;
432 if(data_timeout > 0xffff)
433 data_timeout = 0; /* set to unlimited */
434 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
435 }
436}
437
438static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
439{
440 struct tifm_sd *host = mmc_priv(mmc);
441 struct tifm_dev *sock = host->dev;
442 unsigned long flags;
443 int sg_count = 0;
444 struct mmc_data *r_data = mrq->cmd->data;
445
446 spin_lock_irqsave(&sock->lock, flags);
447 if (host->flags & EJECT) {
448 spin_unlock_irqrestore(&sock->lock, flags);
449 goto err_out;
450 }
451
452 if (host->req) {
453 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
454 spin_unlock_irqrestore(&sock->lock, flags);
455 goto err_out;
456 }
457
458 if (r_data) {
459 tifm_sd_set_data_timeout(host, r_data);
460
461 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
462 mrq->cmd->flags & MMC_DATA_WRITE
463 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
464 if (sg_count != 1) {
465 printk(KERN_ERR DRIVER_NAME
466 ": scatterlist map failed\n");
467 spin_unlock_irqrestore(&sock->lock, flags);
468 goto err_out;
469 }
470
471 host->written_blocks = 0;
472 host->flags &= ~CARD_BUSY;
473 tifm_sd_prepare_data(host, mrq->cmd);
474 }
475
476 host->req = mrq;
477 host->state = CMD;
478 queue_delayed_work(sock->wq, &host->abort_handler,
479 host->timeout_jiffies);
480 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
481 sock->addr + SOCK_CONTROL);
482 tifm_sd_exec(host, mrq->cmd);
483 spin_unlock_irqrestore(&sock->lock, flags);
484 return;
485
486err_out:
487 if (sg_count > 0)
488 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
489 (r_data->flags & MMC_DATA_WRITE)
490 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
491
492 mrq->cmd->error = MMC_ERR_TIMEOUT;
493 mmc_request_done(mmc, mrq);
494}
495
c4028958 496static void tifm_sd_end_cmd(struct work_struct *work)
4020f2d7 497{
c4028958 498 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
4020f2d7
AD		 499 struct tifm_dev *sock = host->dev;
500 struct mmc_host *mmc = tifm_get_drvdata(sock);
501 struct mmc_request *mrq;
e069d79d 502 struct mmc_data *r_data = NULL;
4020f2d7
AD		 503 unsigned long flags;
504
505 spin_lock_irqsave(&sock->lock, flags);
506
507 mrq = host->req;
e069d79d 508 host->req = NULL;
4020f2d7
AD		 509 host->state = IDLE;
510
511 if (!mrq) {
512 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
513 spin_unlock_irqrestore(&sock->lock, flags);
514 return;
515 }
516
517 r_data = mrq->cmd->data;
518 if (r_data) {
519 if (r_data->flags & MMC_DATA_WRITE) {
520 r_data->bytes_xfered = host->written_blocks *
521 r_data->blksz;
522 } else {
523 r_data->bytes_xfered = r_data->blocks -
524 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
525 r_data->bytes_xfered *= r_data->blksz;
526 r_data->bytes_xfered += r_data->blksz -
527 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
528 }
529 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
530 (r_data->flags & MMC_DATA_WRITE)
531 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
532 }
533
534 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
535 sock->addr + SOCK_CONTROL);
536
537 spin_unlock_irqrestore(&sock->lock, flags);
538 mmc_request_done(mmc, mrq);
539}
540
541static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
542{
543 struct tifm_sd *host = mmc_priv(mmc);
544 struct tifm_dev *sock = host->dev;
545 unsigned long flags;
546 struct mmc_data *r_data = mrq->cmd->data;
e069d79d 547 char *t_buffer = NULL;
4020f2d7
AD		 548
549 if (r_data) {
550 t_buffer = kmap(r_data->sg->page);
551 if (!t_buffer) {
552 printk(KERN_ERR DRIVER_NAME ": kmap failed\n");
553 goto err_out;
554 }
555 }
556
557 spin_lock_irqsave(&sock->lock, flags);
558 if (host->flags & EJECT) {
559 spin_unlock_irqrestore(&sock->lock, flags);
560 goto err_out;
561 }
562
563 if (host->req) {
564 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
565 spin_unlock_irqrestore(&sock->lock, flags);
566 goto err_out;
567 }
568
569 if (r_data) {
570 tifm_sd_set_data_timeout(host, r_data);
571
572 host->buffer = t_buffer + r_data->sg->offset;
573 host->buffer_size = mrq->cmd->data->blocks *
574 mrq->cmd->data->blksz;
575
576 writel(TIFM_MMCSD_BUFINT |
577 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
578 sock->addr + SOCK_MMCSD_INT_ENABLE);
579 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) |
580 (TIFM_MMCSD_FIFO_SIZE - 1),
581 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
582
583 host->written_blocks = 0;
584 host->flags &= ~CARD_BUSY;
585 host->buffer_pos = 0;
586 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
587 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
588 }
589
590 host->req = mrq;
591 host->state = CMD;
592 queue_delayed_work(sock->wq, &host->abort_handler,
593 host->timeout_jiffies);
594 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
595 sock->addr + SOCK_CONTROL);
596 tifm_sd_exec(host, mrq->cmd);
597 spin_unlock_irqrestore(&sock->lock, flags);
598 return;
599
600err_out:
601 if (t_buffer)
602 kunmap(r_data->sg->page);
603
604 mrq->cmd->error = MMC_ERR_TIMEOUT;
605 mmc_request_done(mmc, mrq);
606}
607
c4028958 608static void tifm_sd_end_cmd_nodma(struct work_struct *work)
4020f2d7 609{
c4028958 610 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
4020f2d7
AD		 611 struct tifm_dev *sock = host->dev;
612 struct mmc_host *mmc = tifm_get_drvdata(sock);
613 struct mmc_request *mrq;
e069d79d 614 struct mmc_data *r_data = NULL;
4020f2d7
AD		 615 unsigned long flags;
616
617 spin_lock_irqsave(&sock->lock, flags);
618
619 mrq = host->req;
e069d79d 620 host->req = NULL;
4020f2d7
AD		 621 host->state = IDLE;
622
623 if (!mrq) {
624 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
625 spin_unlock_irqrestore(&sock->lock, flags);
626 return;
627 }
628
629 r_data = mrq->cmd->data;
630 if (r_data) {
631 writel((~TIFM_MMCSD_BUFINT) &
632 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
633 sock->addr + SOCK_MMCSD_INT_ENABLE);
634
635 if (r_data->flags & MMC_DATA_WRITE) {
636 r_data->bytes_xfered = host->written_blocks *
637 r_data->blksz;
638 } else {
639 r_data->bytes_xfered = r_data->blocks -
640 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
641 r_data->bytes_xfered *= r_data->blksz;
642 r_data->bytes_xfered += r_data->blksz -
643 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
644 }
e069d79d 645 host->buffer = NULL;
4020f2d7
AD		 646 host->buffer_pos = 0;
647 host->buffer_size = 0;
648 }
649
650 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
651 sock->addr + SOCK_CONTROL);
652
653 spin_unlock_irqrestore(&sock->lock, flags);
654
655 if (r_data)
656 kunmap(r_data->sg->page);
657
658 mmc_request_done(mmc, mrq);
659}
660
c4028958 661static void tifm_sd_abort(struct work_struct *work)
4020f2d7 662{
c4028958
DH		 663 struct tifm_sd *host =
664 container_of(work, struct tifm_sd, abort_handler.work);
665
4020f2d7
AD		 666 printk(KERN_ERR DRIVER_NAME
667 ": card failed to respond for a long period of time");
c4028958 668 tifm_eject(host->dev);
4020f2d7
AD		 669}
670
671static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
672{
673 struct tifm_sd *host = mmc_priv(mmc);
674 struct tifm_dev *sock = host->dev;
675 unsigned int clk_div1, clk_div2;
676 unsigned long flags;
677
678 spin_lock_irqsave(&sock->lock, flags);
679
680 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
681 ios->power_mode);
682 if (ios->bus_width == MMC_BUS_WIDTH_4) {
683 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
684 sock->addr + SOCK_MMCSD_CONFIG);
685 } else {
686 writel((~TIFM_MMCSD_4BBUS) &
687 readl(sock->addr + SOCK_MMCSD_CONFIG),
688 sock->addr + SOCK_MMCSD_CONFIG);
689 }
690
691 if (ios->clock) {
692 clk_div1 = 20000000 / ios->clock;
693 if (!clk_div1)
694 clk_div1 = 1;
695
696 clk_div2 = 24000000 / ios->clock;
697 if (!clk_div2)
698 clk_div2 = 1;
699
700 if ((20000000 / clk_div1) > ios->clock)
701 clk_div1++;
702 if ((24000000 / clk_div2) > ios->clock)
703 clk_div2++;
704 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
705 host->clk_freq = 20000000;
706 host->clk_div = clk_div1;
707 writel((~TIFM_CTRL_FAST_CLK) &
708 readl(sock->addr + SOCK_CONTROL),
709 sock->addr + SOCK_CONTROL);
710 } else {
711 host->clk_freq = 24000000;
712 host->clk_div = clk_div2;
713 writel(TIFM_CTRL_FAST_CLK |
714 readl(sock->addr + SOCK_CONTROL),
715 sock->addr + SOCK_CONTROL);
716 }
717 } else {
718 host->clk_div = 0;
719 }
720 host->clk_div &= TIFM_MMCSD_CLKMASK;
721 writel(host->clk_div | ((~TIFM_MMCSD_CLKMASK) &
722 readl(sock->addr + SOCK_MMCSD_CONFIG)),
723 sock->addr + SOCK_MMCSD_CONFIG);
724
725 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
726 host->flags |= OPENDRAIN;
727 else
728 host->flags &= ~OPENDRAIN;
729
730 /* chip_select : maybe later */
731 //vdd
732 //power is set before probe / after remove
733 //I believe, power_off when already marked for eject is sufficient to
734 // allow removal.
735 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
736 host->flags |= EJECT_DONE;
737 wake_up_all(&host->can_eject);
738 }
739
740 spin_unlock_irqrestore(&sock->lock, flags);
741}
742
743static int tifm_sd_ro(struct mmc_host *mmc)
744{
745 int rc;
746 struct tifm_sd *host = mmc_priv(mmc);
747 struct tifm_dev *sock = host->dev;
748 unsigned long flags;
749
750 spin_lock_irqsave(&sock->lock, flags);
751
752 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
753 rc = (host->flags & CARD_RO) ? 1 : 0;
754
755 spin_unlock_irqrestore(&sock->lock, flags);
756 return rc;
757}
758
759static struct mmc_host_ops tifm_sd_ops = {
760 .request = tifm_sd_request,
761 .set_ios = tifm_sd_ios,
762 .get_ro = tifm_sd_ro
763};
764
c4028958 765static void tifm_sd_register_host(struct work_struct *work)
4020f2d7 766{
c4028958 767 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
4020f2d7
AD		 768 struct tifm_dev *sock = host->dev;
769 struct mmc_host *mmc = tifm_get_drvdata(sock);
770 unsigned long flags;
771
772 spin_lock_irqsave(&sock->lock, flags);
773 host->flags |= HOST_REG;
774 PREPARE_WORK(&host->cmd_handler,
c4028958 775 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd);
4020f2d7
AD		 776 spin_unlock_irqrestore(&sock->lock, flags);
777 dev_dbg(&sock->dev, "adding host\n");
778 mmc_add_host(mmc);
779}
780
781static int tifm_sd_probe(struct tifm_dev *sock)
782{
783 struct mmc_host *mmc;
784 struct tifm_sd *host;
785 int rc = -EIO;
786
787 if (!(TIFM_SOCK_STATE_OCCUPIED &
788 readl(sock->addr + SOCK_PRESENT_STATE))) {
789 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
790 return rc;
791 }
792
793 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
794 if (!mmc)
795 return -ENOMEM;
796
797 host = mmc_priv(mmc);
798 host->dev = sock;
799 host->clk_div = 61;
800 init_waitqueue_head(&host->can_eject);
c4028958
DH		 801 INIT_WORK(&host->cmd_handler, tifm_sd_register_host);
802 INIT_DELAYED_WORK(&host->abort_handler, tifm_sd_abort);
4020f2d7
AD		 803
804 tifm_set_drvdata(sock, mmc);
805 sock->signal_irq = tifm_sd_signal_irq;
806
807 host->clk_freq = 20000000;
808 host->timeout_jiffies = msecs_to_jiffies(1000);
809
810 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
811 mmc->ops = &tifm_sd_ops;
812 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
813 mmc->caps = MMC_CAP_4_BIT_DATA;
814 mmc->f_min = 20000000 / 60;
815 mmc->f_max = 24000000;
816 mmc->max_hw_segs = 1;
817 mmc->max_phys_segs = 1;
818 mmc->max_sectors = 127;
819 mmc->max_seg_size = mmc->max_sectors << 11; //2k maximum hw block length
820
821 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
822 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
823 writel(host->clk_div | TIFM_MMCSD_POWER,
824 sock->addr + SOCK_MMCSD_CONFIG);
825
826 for (rc = 0; rc < 50; rc++) {
827 /* Wait for reset ack */
828 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
829 rc = 0;
830 break;
831 }
832 msleep(10);
833 }
834
835 if (rc) {
836 printk(KERN_ERR DRIVER_NAME
837 ": card not ready - probe failed\n");
838 mmc_free_host(mmc);
839 return -ENODEV;
840 }
841
842 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
843 writel(host->clk_div | TIFM_MMCSD_POWER,
844 sock->addr + SOCK_MMCSD_CONFIG);
845 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
846 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
847 sock->addr + SOCK_MMCSD_INT_ENABLE);
848
849 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); // command timeout 64 clocks for now
850 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
851 writel(host->clk_div | TIFM_MMCSD_POWER,
852 sock->addr + SOCK_MMCSD_CONFIG);
853
854 queue_delayed_work(sock->wq, &host->abort_handler,
855 host->timeout_jiffies);
856
857 return 0;
858}
859
860static int tifm_sd_host_is_down(struct tifm_dev *sock)
861{
862 struct mmc_host *mmc = tifm_get_drvdata(sock);
863 struct tifm_sd *host = mmc_priv(mmc);
864 unsigned long flags;
865 int rc = 0;
866
867 spin_lock_irqsave(&sock->lock, flags);
868 rc = (host->flags & EJECT_DONE);
869 spin_unlock_irqrestore(&sock->lock, flags);
870 return rc;
871}
872
873static void tifm_sd_remove(struct tifm_dev *sock)
874{
875 struct mmc_host *mmc = tifm_get_drvdata(sock);
876 struct tifm_sd *host = mmc_priv(mmc);
877 unsigned long flags;
878
879 spin_lock_irqsave(&sock->lock, flags);
880 host->flags |= EJECT;
881 if (host->req)
882 queue_work(sock->wq, &host->cmd_handler);
883 spin_unlock_irqrestore(&sock->lock, flags);
884 wait_event_timeout(host->can_eject, tifm_sd_host_is_down(sock),
885 host->timeout_jiffies);
886
887 if (host->flags & HOST_REG)
888 mmc_remove_host(mmc);
889
890 /* The meaning of the bit majority in this constant is unknown. */
891 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
892 sock->addr + SOCK_CONTROL);
893 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
894 writel(TIFM_FIFO_INT_SETALL,
895 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
896 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
897
e069d79d 898 tifm_set_drvdata(sock, NULL);
4020f2d7
AD		 899 mmc_free_host(mmc);
900}
901
902static tifm_media_id tifm_sd_id_tbl[] = {
903 FM_SD, 0
904};
905
906static struct tifm_driver tifm_sd_driver = {
907 .driver = {
908 .name = DRIVER_NAME,
909 .owner = THIS_MODULE
910 },
911 .id_table = tifm_sd_id_tbl,
912 .probe = tifm_sd_probe,
913 .remove = tifm_sd_remove
914};
915
916static int __init tifm_sd_init(void)
917{
918 return tifm_register_driver(&tifm_sd_driver);
919}
920
921static void __exit tifm_sd_exit(void)
922{
923 tifm_unregister_driver(&tifm_sd_driver);
924}
925
926MODULE_AUTHOR("Alex Dubov");
927MODULE_DESCRIPTION("TI FlashMedia SD driver");
928MODULE_LICENSE("GPL");
929MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
930MODULE_VERSION(DRIVER_VERSION);
931
932module_init(tifm_sd_init);
933module_exit(tifm_sd_exit);
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