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tifm_sd: alter order of the states in the command handler
[net-next-2.6.git] / drivers / mmc / tifm_sd.c
CommitLineData
4020f2d7
AD		 1/*
2 * tifm_sd.c - TI FlashMedia driver
3 *
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12
13#include <linux/tifm.h>
14#include <linux/mmc/protocol.h>
15#include <linux/mmc/host.h>
16#include <linux/highmem.h>
2099c99e 17#include <asm/io.h>
4020f2d7
AD		 18
19#define DRIVER_NAME "tifm_sd"
1289335a 20#define DRIVER_VERSION "0.7"
4020f2d7
AD		 21
22static int no_dma = 0;
23static int fixed_timeout = 0;
24module_param(no_dma, bool, 0644);
25module_param(fixed_timeout, bool, 0644);
26
27/* Constants here are mostly from OMAP5912 datasheet */
28#define TIFM_MMCSD_RESET 0x0002
29#define TIFM_MMCSD_CLKMASK 0x03ff
30#define TIFM_MMCSD_POWER 0x0800
31#define TIFM_MMCSD_4BBUS 0x8000
32#define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
33#define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
34#define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
35#define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
36#define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
37#define TIFM_MMCSD_READ 0x8000
38
39#define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
40#define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
41#define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42#define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43#define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44#define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45#define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46#define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47#define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48#define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49#define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50#define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51#define TIFM_MMCSD_CERR 0x4000 /* card status error */
52
53#define TIFM_MMCSD_FIFO_SIZE 0x0020
54
55#define TIFM_MMCSD_RSP_R0 0x0000
56#define TIFM_MMCSD_RSP_R1 0x0100
57#define TIFM_MMCSD_RSP_R2 0x0200
58#define TIFM_MMCSD_RSP_R3 0x0300
59#define TIFM_MMCSD_RSP_R4 0x0400
60#define TIFM_MMCSD_RSP_R5 0x0500
61#define TIFM_MMCSD_RSP_R6 0x0600
62
63#define TIFM_MMCSD_RSP_BUSY 0x0800
64
65#define TIFM_MMCSD_CMD_BC 0x0000
66#define TIFM_MMCSD_CMD_BCR 0x1000
67#define TIFM_MMCSD_CMD_AC 0x2000
68#define TIFM_MMCSD_CMD_ADTC 0x3000
69
70typedef enum {
71 IDLE = 0,
72 CMD, /* main command ended */
73 BRS, /* block transfer finished */
74 SCMD, /* stop command ended */
75 CARD, /* card left busy state */
76 FIFO, /* FIFO operation completed (uncertain) */
77 READY
78} card_state_t;
79
80enum {
81 FIFO_RDY = 0x0001, /* hardware dependent value */
82 HOST_REG = 0x0002,
83 EJECT = 0x0004,
84 EJECT_DONE = 0x0008,
85 CARD_BUSY = 0x0010,
86 OPENDRAIN = 0x0040, /* hardware dependent value */
87 CARD_EVENT = 0x0100, /* hardware dependent value */
88 CARD_RO = 0x0200, /* hardware dependent value */
89 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
90
91struct tifm_sd {
92 struct tifm_dev *dev;
93
94 unsigned int flags;
95 card_state_t state;
96 unsigned int clk_freq;
97 unsigned int clk_div;
98 unsigned long timeout_jiffies; // software timeout - 2 sec
99
100 struct mmc_request *req;
101 struct work_struct cmd_handler;
c4028958 102 struct delayed_work abort_handler;
4020f2d7
AD		 103 wait_queue_head_t can_eject;
104
105 size_t written_blocks;
106 char *buffer;
107 size_t buffer_size;
108 size_t buffer_pos;
109
110};
111
112static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
113 unsigned int host_status)
114{
115 struct mmc_command *cmd = host->req->cmd;
116 unsigned int t_val = 0, cnt = 0;
117
118 if (host_status & TIFM_MMCSD_BRS) {
119 /* in non-dma rx mode BRS fires when fifo is still not empty */
120 if (host->buffer && (cmd->data->flags & MMC_DATA_READ)) {
121 while (host->buffer_size > host->buffer_pos) {
122 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
123 host->buffer[host->buffer_pos++] = t_val & 0xff;
124 host->buffer[host->buffer_pos++] =
125 (t_val >> 8) & 0xff;
126 }
127 }
128 return 1;
129 } else if (host->buffer) {
130 if ((cmd->data->flags & MMC_DATA_READ) &&
131 (host_status & TIFM_MMCSD_AF)) {
132 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
133 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
134 if (host->buffer_size > host->buffer_pos) {
135 host->buffer[host->buffer_pos++] =
136 t_val & 0xff;
137 host->buffer[host->buffer_pos++] =
138 (t_val >> 8) & 0xff;
139 }
140 }
141 } else if ((cmd->data->flags & MMC_DATA_WRITE)
142 && (host_status & TIFM_MMCSD_AE)) {
143 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
144 if (host->buffer_size > host->buffer_pos) {
145 t_val = host->buffer[host->buffer_pos++] & 0x00ff;
146 t_val |= ((host->buffer[host->buffer_pos++]) << 8)
147 & 0xff00;
148 writel(t_val,
149 sock->addr + SOCK_MMCSD_DATA);
150 }
151 }
152 }
153 }
154 return 0;
155}
156
157static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
158{
159 unsigned int rc = 0;
160
161 switch (mmc_resp_type(cmd)) {
162 case MMC_RSP_NONE:
163 rc |= TIFM_MMCSD_RSP_R0;
164 break;
165 case MMC_RSP_R1B:
166 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
167 case MMC_RSP_R1:
168 rc |= TIFM_MMCSD_RSP_R1;
169 break;
170 case MMC_RSP_R2:
171 rc |= TIFM_MMCSD_RSP_R2;
172 break;
173 case MMC_RSP_R3:
174 rc |= TIFM_MMCSD_RSP_R3;
175 break;
4020f2d7
AD		 176 default:
177 BUG();
178 }
179
180 switch (mmc_cmd_type(cmd)) {
181 case MMC_CMD_BC:
182 rc |= TIFM_MMCSD_CMD_BC;
183 break;
184 case MMC_CMD_BCR:
185 rc |= TIFM_MMCSD_CMD_BCR;
186 break;
187 case MMC_CMD_AC:
188 rc |= TIFM_MMCSD_CMD_AC;
189 break;
190 case MMC_CMD_ADTC:
191 rc |= TIFM_MMCSD_CMD_ADTC;
192 break;
193 default:
194 BUG();
195 }
196 return rc;
197}
198
199static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
200{
201 struct tifm_dev *sock = host->dev;
202 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
203 (host->flags & OPENDRAIN);
204
205 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
206 cmd_mask |= TIFM_MMCSD_READ;
207
208 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
209 cmd->opcode, cmd->arg, cmd_mask);
210
211 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
212 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
213 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
214}
215
216static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
217{
218 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
219 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
220 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
221 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
222 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
223 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
224 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
225 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
226}
227
228static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
229 unsigned int host_status)
230{
231 struct mmc_command *cmd = host->req->cmd;
232
233change_state:
234 switch (host->state) {
235 case IDLE:
236 return;
237 case CMD:
238 if (host_status & TIFM_MMCSD_EOC) {
239 tifm_sd_fetch_resp(cmd, sock);
240 if (cmd->data) {
241 host->state = BRS;
1289335a 242 } else {
4020f2d7 243 host->state = READY;
1289335a 244 }
4020f2d7
AD		 245 goto change_state;
246 }
247 break;
248 case BRS:
249 if (tifm_sd_transfer_data(sock, host, host_status)) {
1289335a
AD		 250 if (cmd->data->flags & MMC_DATA_WRITE) {
251 host->state = CARD;
252 } else {
253 if (no_dma) {
254 if (host->req->stop) {
255 tifm_sd_exec(host, host->req->stop);
256 host->state = SCMD;
257 } else {
258 host->state = READY;
259 }
4020f2d7 260 } else {
1289335a 261 host->state = FIFO;
4020f2d7 262 }
4020f2d7 263 }
1289335a 264 goto change_state;
4020f2d7
AD		 265 }
266 break;
267 case SCMD:
268 if (host_status & TIFM_MMCSD_EOC) {
269 tifm_sd_fetch_resp(host->req->stop, sock);
1289335a 270 host->state = READY;
4020f2d7
AD		 271 goto change_state;
272 }
273 break;
274 case CARD:
1289335a
AD		 275 dev_dbg(&sock->dev, "waiting for CARD, have %zd blocks\n",
276 host->written_blocks);
4020f2d7
AD		 277 if (!(host->flags & CARD_BUSY)
278 && (host->written_blocks == cmd->data->blocks)) {
1289335a
AD		 279 if (no_dma) {
280 if (host->req->stop) {
281 tifm_sd_exec(host, host->req->stop);
282 host->state = SCMD;
283 } else {
284 host->state = READY;
285 }
286 } else {
287 host->state = FIFO;
288 }
4020f2d7
AD		 289 goto change_state;
290 }
291 break;
292 case FIFO:
293 if (host->flags & FIFO_RDY) {
4020f2d7 294 host->flags &= ~FIFO_RDY;
1289335a
AD		 295 if (host->req->stop) {
296 tifm_sd_exec(host, host->req->stop);
297 host->state = SCMD;
298 } else {
299 host->state = READY;
300 }
4020f2d7
AD		 301 goto change_state;
302 }
303 break;
304 case READY:
305 queue_work(sock->wq, &host->cmd_handler);
306 return;
307 }
308
309 queue_delayed_work(sock->wq, &host->abort_handler,
310 host->timeout_jiffies);
311}
312
313/* Called from interrupt handler */
314static unsigned int tifm_sd_signal_irq(struct tifm_dev *sock,
315 unsigned int sock_irq_status)
316{
317 struct tifm_sd *host;
318 unsigned int host_status = 0, fifo_status = 0;
319 int error_code = 0;
320
321 spin_lock(&sock->lock);
322 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
323 cancel_delayed_work(&host->abort_handler);
324
325 if (sock_irq_status & FIFO_EVENT) {
326 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
327 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
328
329 host->flags |= fifo_status & FIFO_RDY;
330 }
331
332 if (sock_irq_status & CARD_EVENT) {
333 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
334 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
335
336 if (!(host->flags & HOST_REG))
337 queue_work(sock->wq, &host->cmd_handler);
338 if (!host->req)
339 goto done;
340
341 if (host_status & TIFM_MMCSD_ERRMASK) {
342 if (host_status & TIFM_MMCSD_CERR)
343 error_code = MMC_ERR_FAILED;
344 else if (host_status &
345 (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
346 error_code = MMC_ERR_TIMEOUT;
347 else if (host_status &
348 (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
349 error_code = MMC_ERR_BADCRC;
350
351 writel(TIFM_FIFO_INT_SETALL,
352 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
353 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
354
355 if (host->req->stop) {
356 if (host->state == SCMD) {
357 host->req->stop->error = error_code;
1289335a
AD		 358 } else if (host->state == BRS
359 || host->state == CARD
360 || host->state == FIFO) {
4020f2d7
AD		 361 host->req->cmd->error = error_code;
362 tifm_sd_exec(host, host->req->stop);
363 queue_delayed_work(sock->wq,
364 &host->abort_handler,
365 host->timeout_jiffies);
366 host->state = SCMD;
367 goto done;
368 } else {
369 host->req->cmd->error = error_code;
370 }
371 } else {
372 host->req->cmd->error = error_code;
373 }
374 host->state = READY;
375 }
376
377 if (host_status & TIFM_MMCSD_CB)
378 host->flags |= CARD_BUSY;
379 if ((host_status & TIFM_MMCSD_EOFB) &&
380 (host->flags & CARD_BUSY)) {
381 host->written_blocks++;
382 host->flags &= ~CARD_BUSY;
383 }
384 }
385
386 if (host->req)
387 tifm_sd_process_cmd(sock, host, host_status);
388done:
389 dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
390 host_status, fifo_status);
391 spin_unlock(&sock->lock);
392 return sock_irq_status;
393}
394
395static void tifm_sd_prepare_data(struct tifm_sd *card, struct mmc_command *cmd)
396{
397 struct tifm_dev *sock = card->dev;
398 unsigned int dest_cnt;
399
400 /* DMA style IO */
401
402 writel(TIFM_FIFO_INT_SETALL,
403 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
f0d1b0b3 404 writel(ilog2(cmd->data->blksz) - 2,
4020f2d7
AD		 405 sock->addr + SOCK_FIFO_PAGE_SIZE);
406 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
407 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
408
409 dest_cnt = (cmd->data->blocks) << 8;
410
411 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
412
413 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
414 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
415
416 if (cmd->data->flags & MMC_DATA_WRITE) {
417 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
418 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
419 sock->addr + SOCK_DMA_CONTROL);
420 } else {
421 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
422 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
423 }
424}
425
426static void tifm_sd_set_data_timeout(struct tifm_sd *host,
427 struct mmc_data *data)
428{
429 struct tifm_dev *sock = host->dev;
430 unsigned int data_timeout = data->timeout_clks;
431
432 if (fixed_timeout)
433 return;
434
435 data_timeout += data->timeout_ns /
436 ((1000000000 / host->clk_freq) * host->clk_div);
437 data_timeout *= 10; // call it fudge factor for now
438
439 if (data_timeout < 0xffff) {
440 writel((~TIFM_MMCSD_DPE) &
441 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
442 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
443 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
444 } else {
445 writel(TIFM_MMCSD_DPE |
446 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
447 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
448 data_timeout = (data_timeout >> 10) + 1;
449 if(data_timeout > 0xffff)
450 data_timeout = 0; /* set to unlimited */
451 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
452 }
453}
454
455static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
456{
457 struct tifm_sd *host = mmc_priv(mmc);
458 struct tifm_dev *sock = host->dev;
459 unsigned long flags;
460 int sg_count = 0;
461 struct mmc_data *r_data = mrq->cmd->data;
462
463 spin_lock_irqsave(&sock->lock, flags);
464 if (host->flags & EJECT) {
465 spin_unlock_irqrestore(&sock->lock, flags);
466 goto err_out;
467 }
468
469 if (host->req) {
470 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
471 spin_unlock_irqrestore(&sock->lock, flags);
472 goto err_out;
473 }
474
475 if (r_data) {
476 tifm_sd_set_data_timeout(host, r_data);
477
478 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
479 mrq->cmd->flags & MMC_DATA_WRITE
480 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
481 if (sg_count != 1) {
482 printk(KERN_ERR DRIVER_NAME
483 ": scatterlist map failed\n");
484 spin_unlock_irqrestore(&sock->lock, flags);
485 goto err_out;
486 }
487
488 host->written_blocks = 0;
489 host->flags &= ~CARD_BUSY;
490 tifm_sd_prepare_data(host, mrq->cmd);
491 }
492
493 host->req = mrq;
494 host->state = CMD;
495 queue_delayed_work(sock->wq, &host->abort_handler,
496 host->timeout_jiffies);
497 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
498 sock->addr + SOCK_CONTROL);
499 tifm_sd_exec(host, mrq->cmd);
500 spin_unlock_irqrestore(&sock->lock, flags);
501 return;
502
503err_out:
504 if (sg_count > 0)
505 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
506 (r_data->flags & MMC_DATA_WRITE)
507 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
508
509 mrq->cmd->error = MMC_ERR_TIMEOUT;
510 mmc_request_done(mmc, mrq);
511}
512
c4028958 513static void tifm_sd_end_cmd(struct work_struct *work)
4020f2d7 514{
c4028958 515 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
4020f2d7
AD		 516 struct tifm_dev *sock = host->dev;
517 struct mmc_host *mmc = tifm_get_drvdata(sock);
518 struct mmc_request *mrq;
e069d79d 519 struct mmc_data *r_data = NULL;
4020f2d7
AD		 520 unsigned long flags;
521
522 spin_lock_irqsave(&sock->lock, flags);
523
524 mrq = host->req;
e069d79d 525 host->req = NULL;
4020f2d7
AD		 526 host->state = IDLE;
527
528 if (!mrq) {
529 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
530 spin_unlock_irqrestore(&sock->lock, flags);
531 return;
532 }
533
534 r_data = mrq->cmd->data;
535 if (r_data) {
536 if (r_data->flags & MMC_DATA_WRITE) {
537 r_data->bytes_xfered = host->written_blocks *
538 r_data->blksz;
539 } else {
540 r_data->bytes_xfered = r_data->blocks -
541 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
542 r_data->bytes_xfered *= r_data->blksz;
543 r_data->bytes_xfered += r_data->blksz -
544 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
545 }
546 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
547 (r_data->flags & MMC_DATA_WRITE)
548 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
549 }
550
551 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
552 sock->addr + SOCK_CONTROL);
553
554 spin_unlock_irqrestore(&sock->lock, flags);
555 mmc_request_done(mmc, mrq);
556}
557
558static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
559{
560 struct tifm_sd *host = mmc_priv(mmc);
561 struct tifm_dev *sock = host->dev;
562 unsigned long flags;
563 struct mmc_data *r_data = mrq->cmd->data;
e069d79d 564 char *t_buffer = NULL;
4020f2d7
AD		 565
566 if (r_data) {
567 t_buffer = kmap(r_data->sg->page);
568 if (!t_buffer) {
569 printk(KERN_ERR DRIVER_NAME ": kmap failed\n");
570 goto err_out;
571 }
572 }
573
574 spin_lock_irqsave(&sock->lock, flags);
575 if (host->flags & EJECT) {
576 spin_unlock_irqrestore(&sock->lock, flags);
577 goto err_out;
578 }
579
580 if (host->req) {
581 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
582 spin_unlock_irqrestore(&sock->lock, flags);
583 goto err_out;
584 }
585
586 if (r_data) {
587 tifm_sd_set_data_timeout(host, r_data);
588
589 host->buffer = t_buffer + r_data->sg->offset;
590 host->buffer_size = mrq->cmd->data->blocks *
591 mrq->cmd->data->blksz;
592
593 writel(TIFM_MMCSD_BUFINT |
594 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
595 sock->addr + SOCK_MMCSD_INT_ENABLE);
596 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) |
597 (TIFM_MMCSD_FIFO_SIZE - 1),
598 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
599
600 host->written_blocks = 0;
601 host->flags &= ~CARD_BUSY;
602 host->buffer_pos = 0;
603 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
604 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
605 }
606
607 host->req = mrq;
608 host->state = CMD;
609 queue_delayed_work(sock->wq, &host->abort_handler,
610 host->timeout_jiffies);
611 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
612 sock->addr + SOCK_CONTROL);
613 tifm_sd_exec(host, mrq->cmd);
614 spin_unlock_irqrestore(&sock->lock, flags);
615 return;
616
617err_out:
618 if (t_buffer)
619 kunmap(r_data->sg->page);
620
621 mrq->cmd->error = MMC_ERR_TIMEOUT;
622 mmc_request_done(mmc, mrq);
623}
624
c4028958 625static void tifm_sd_end_cmd_nodma(struct work_struct *work)
4020f2d7 626{
c4028958 627 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
4020f2d7
AD		 628 struct tifm_dev *sock = host->dev;
629 struct mmc_host *mmc = tifm_get_drvdata(sock);
630 struct mmc_request *mrq;
e069d79d 631 struct mmc_data *r_data = NULL;
4020f2d7
AD		 632 unsigned long flags;
633
634 spin_lock_irqsave(&sock->lock, flags);
635
636 mrq = host->req;
e069d79d 637 host->req = NULL;
4020f2d7
AD		 638 host->state = IDLE;
639
640 if (!mrq) {
641 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
642 spin_unlock_irqrestore(&sock->lock, flags);
643 return;
644 }
645
646 r_data = mrq->cmd->data;
647 if (r_data) {
648 writel((~TIFM_MMCSD_BUFINT) &
649 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
650 sock->addr + SOCK_MMCSD_INT_ENABLE);
651
652 if (r_data->flags & MMC_DATA_WRITE) {
653 r_data->bytes_xfered = host->written_blocks *
654 r_data->blksz;
655 } else {
656 r_data->bytes_xfered = r_data->blocks -
657 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
658 r_data->bytes_xfered *= r_data->blksz;
659 r_data->bytes_xfered += r_data->blksz -
660 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
661 }
e069d79d 662 host->buffer = NULL;
4020f2d7
AD		 663 host->buffer_pos = 0;
664 host->buffer_size = 0;
665 }
666
667 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
668 sock->addr + SOCK_CONTROL);
669
670 spin_unlock_irqrestore(&sock->lock, flags);
671
672 if (r_data)
673 kunmap(r_data->sg->page);
674
675 mmc_request_done(mmc, mrq);
676}
677
c4028958 678static void tifm_sd_abort(struct work_struct *work)
4020f2d7 679{
c4028958
DH		 680 struct tifm_sd *host =
681 container_of(work, struct tifm_sd, abort_handler.work);
682
4020f2d7
AD		 683 printk(KERN_ERR DRIVER_NAME
684 ": card failed to respond for a long period of time");
c4028958 685 tifm_eject(host->dev);
4020f2d7
AD		 686}
687
688static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
689{
690 struct tifm_sd *host = mmc_priv(mmc);
691 struct tifm_dev *sock = host->dev;
692 unsigned int clk_div1, clk_div2;
693 unsigned long flags;
694
695 spin_lock_irqsave(&sock->lock, flags);
696
697 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
698 ios->power_mode);
699 if (ios->bus_width == MMC_BUS_WIDTH_4) {
700 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
701 sock->addr + SOCK_MMCSD_CONFIG);
702 } else {
703 writel((~TIFM_MMCSD_4BBUS) &
704 readl(sock->addr + SOCK_MMCSD_CONFIG),
705 sock->addr + SOCK_MMCSD_CONFIG);
706 }
707
708 if (ios->clock) {
709 clk_div1 = 20000000 / ios->clock;
710 if (!clk_div1)
711 clk_div1 = 1;
712
713 clk_div2 = 24000000 / ios->clock;
714 if (!clk_div2)
715 clk_div2 = 1;
716
717 if ((20000000 / clk_div1) > ios->clock)
718 clk_div1++;
719 if ((24000000 / clk_div2) > ios->clock)
720 clk_div2++;
721 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
722 host->clk_freq = 20000000;
723 host->clk_div = clk_div1;
724 writel((~TIFM_CTRL_FAST_CLK) &
725 readl(sock->addr + SOCK_CONTROL),
726 sock->addr + SOCK_CONTROL);
727 } else {
728 host->clk_freq = 24000000;
729 host->clk_div = clk_div2;
730 writel(TIFM_CTRL_FAST_CLK |
731 readl(sock->addr + SOCK_CONTROL),
732 sock->addr + SOCK_CONTROL);
733 }
734 } else {
735 host->clk_div = 0;
736 }
737 host->clk_div &= TIFM_MMCSD_CLKMASK;
738 writel(host->clk_div | ((~TIFM_MMCSD_CLKMASK) &
739 readl(sock->addr + SOCK_MMCSD_CONFIG)),
740 sock->addr + SOCK_MMCSD_CONFIG);
741
742 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
743 host->flags |= OPENDRAIN;
744 else
745 host->flags &= ~OPENDRAIN;
746
747 /* chip_select : maybe later */
748 //vdd
749 //power is set before probe / after remove
750 //I believe, power_off when already marked for eject is sufficient to
751 // allow removal.
752 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
753 host->flags |= EJECT_DONE;
754 wake_up_all(&host->can_eject);
755 }
756
757 spin_unlock_irqrestore(&sock->lock, flags);
758}
759
760static int tifm_sd_ro(struct mmc_host *mmc)
761{
762 int rc;
763 struct tifm_sd *host = mmc_priv(mmc);
764 struct tifm_dev *sock = host->dev;
765 unsigned long flags;
766
767 spin_lock_irqsave(&sock->lock, flags);
768
769 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
770 rc = (host->flags & CARD_RO) ? 1 : 0;
771
772 spin_unlock_irqrestore(&sock->lock, flags);
773 return rc;
774}
775
776static struct mmc_host_ops tifm_sd_ops = {
777 .request = tifm_sd_request,
778 .set_ios = tifm_sd_ios,
779 .get_ro = tifm_sd_ro
780};
781
c4028958 782static void tifm_sd_register_host(struct work_struct *work)
4020f2d7 783{
c4028958 784 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
4020f2d7
AD		 785 struct tifm_dev *sock = host->dev;
786 struct mmc_host *mmc = tifm_get_drvdata(sock);
787 unsigned long flags;
788
789 spin_lock_irqsave(&sock->lock, flags);
790 host->flags |= HOST_REG;
791 PREPARE_WORK(&host->cmd_handler,
c4028958 792 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd);
4020f2d7
AD		 793 spin_unlock_irqrestore(&sock->lock, flags);
794 dev_dbg(&sock->dev, "adding host\n");
795 mmc_add_host(mmc);
796}
797
798static int tifm_sd_probe(struct tifm_dev *sock)
799{
800 struct mmc_host *mmc;
801 struct tifm_sd *host;
802 int rc = -EIO;
803
804 if (!(TIFM_SOCK_STATE_OCCUPIED &
805 readl(sock->addr + SOCK_PRESENT_STATE))) {
806 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
807 return rc;
808 }
809
810 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
811 if (!mmc)
812 return -ENOMEM;
813
814 host = mmc_priv(mmc);
815 host->dev = sock;
816 host->clk_div = 61;
817 init_waitqueue_head(&host->can_eject);
c4028958
DH		 818 INIT_WORK(&host->cmd_handler, tifm_sd_register_host);
819 INIT_DELAYED_WORK(&host->abort_handler, tifm_sd_abort);
4020f2d7
AD		 820
821 tifm_set_drvdata(sock, mmc);
822 sock->signal_irq = tifm_sd_signal_irq;
823
824 host->clk_freq = 20000000;
825 host->timeout_jiffies = msecs_to_jiffies(1000);
826
827 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
828 mmc->ops = &tifm_sd_ops;
829 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
830 mmc->caps = MMC_CAP_4_BIT_DATA;
831 mmc->f_min = 20000000 / 60;
832 mmc->f_max = 24000000;
833 mmc->max_hw_segs = 1;
834 mmc->max_phys_segs = 1;
835 mmc->max_sectors = 127;
836 mmc->max_seg_size = mmc->max_sectors << 11; //2k maximum hw block length
837
838 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
839 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
840 writel(host->clk_div | TIFM_MMCSD_POWER,
841 sock->addr + SOCK_MMCSD_CONFIG);
842
843 for (rc = 0; rc < 50; rc++) {
844 /* Wait for reset ack */
845 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
846 rc = 0;
847 break;
848 }
849 msleep(10);
850 }
851
852 if (rc) {
853 printk(KERN_ERR DRIVER_NAME
854 ": card not ready - probe failed\n");
855 mmc_free_host(mmc);
856 return -ENODEV;
857 }
858
859 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
860 writel(host->clk_div | TIFM_MMCSD_POWER,
861 sock->addr + SOCK_MMCSD_CONFIG);
862 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
863 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
864 sock->addr + SOCK_MMCSD_INT_ENABLE);
865
866 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); // command timeout 64 clocks for now
867 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
868 writel(host->clk_div | TIFM_MMCSD_POWER,
869 sock->addr + SOCK_MMCSD_CONFIG);
870
871 queue_delayed_work(sock->wq, &host->abort_handler,
872 host->timeout_jiffies);
873
874 return 0;
875}
876
877static int tifm_sd_host_is_down(struct tifm_dev *sock)
878{
879 struct mmc_host *mmc = tifm_get_drvdata(sock);
880 struct tifm_sd *host = mmc_priv(mmc);
881 unsigned long flags;
882 int rc = 0;
883
884 spin_lock_irqsave(&sock->lock, flags);
885 rc = (host->flags & EJECT_DONE);
886 spin_unlock_irqrestore(&sock->lock, flags);
887 return rc;
888}
889
890static void tifm_sd_remove(struct tifm_dev *sock)
891{
892 struct mmc_host *mmc = tifm_get_drvdata(sock);
893 struct tifm_sd *host = mmc_priv(mmc);
894 unsigned long flags;
895
896 spin_lock_irqsave(&sock->lock, flags);
897 host->flags |= EJECT;
898 if (host->req)
899 queue_work(sock->wq, &host->cmd_handler);
900 spin_unlock_irqrestore(&sock->lock, flags);
901 wait_event_timeout(host->can_eject, tifm_sd_host_is_down(sock),
902 host->timeout_jiffies);
903
904 if (host->flags & HOST_REG)
905 mmc_remove_host(mmc);
906
907 /* The meaning of the bit majority in this constant is unknown. */
908 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
909 sock->addr + SOCK_CONTROL);
910 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
911 writel(TIFM_FIFO_INT_SETALL,
912 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
913 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
914
e069d79d 915 tifm_set_drvdata(sock, NULL);
4020f2d7
AD		 916 mmc_free_host(mmc);
917}
918
919static tifm_media_id tifm_sd_id_tbl[] = {
920 FM_SD, 0
921};
922
923static struct tifm_driver tifm_sd_driver = {
924 .driver = {
925 .name = DRIVER_NAME,
926 .owner = THIS_MODULE
927 },
928 .id_table = tifm_sd_id_tbl,
929 .probe = tifm_sd_probe,
930 .remove = tifm_sd_remove
931};
932
933static int __init tifm_sd_init(void)
934{
935 return tifm_register_driver(&tifm_sd_driver);
936}
937
938static void __exit tifm_sd_exit(void)
939{
940 tifm_unregister_driver(&tifm_sd_driver);
941}
942
943MODULE_AUTHOR("Alex Dubov");
944MODULE_DESCRIPTION("TI FlashMedia SD driver");
945MODULE_LICENSE("GPL");
946MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
947MODULE_VERSION(DRIVER_VERSION);
948
949module_init(tifm_sd_init);
950module_exit(tifm_sd_exit);
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