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[MMC] sdhci: check controller version
[net-next-2.6.git] / drivers / mmc / sdhci.c
CommitLineData
d129bceb
PO		 1/*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
d129bceb
PO		 11#include <linux/delay.h>
12#include <linux/highmem.h>
13#include <linux/pci.h>
14#include <linux/dma-mapping.h>
15
16#include <linux/mmc/host.h>
17#include <linux/mmc/protocol.h>
18
19#include <asm/scatterlist.h>
20
21#include "sdhci.h"
22
23#define DRIVER_NAME "sdhci"
24#define DRIVER_VERSION "0.11"
25
26#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
27
d129bceb 28#define DBG(f, x...) \
c6563178 29 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
d129bceb
PO		 30
31static const struct pci_device_id pci_ids[] __devinitdata = {
32 /* handle any SD host controller */
33 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
34 { /* end: all zeroes */ },
35};
36
37MODULE_DEVICE_TABLE(pci, pci_ids);
38
39static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
40static void sdhci_finish_data(struct sdhci_host *);
41
42static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
43static void sdhci_finish_command(struct sdhci_host *);
44
45static void sdhci_dumpregs(struct sdhci_host *host)
46{
47 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
48
49 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
50 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
51 readw(host->ioaddr + SDHCI_HOST_VERSION));
52 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
53 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
54 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
55 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
56 readl(host->ioaddr + SDHCI_ARGUMENT),
57 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
58 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
59 readl(host->ioaddr + SDHCI_PRESENT_STATE),
60 readb(host->ioaddr + SDHCI_HOST_CONTROL));
61 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
62 readb(host->ioaddr + SDHCI_POWER_CONTROL),
63 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
64 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
65 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
66 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
67 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
68 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
69 readl(host->ioaddr + SDHCI_INT_STATUS));
70 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
71 readl(host->ioaddr + SDHCI_INT_ENABLE),
72 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
73 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
74 readw(host->ioaddr + SDHCI_ACMD12_ERR),
75 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
76 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
77 readl(host->ioaddr + SDHCI_CAPABILITIES),
78 readl(host->ioaddr + SDHCI_MAX_CURRENT));
79
80 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
81}
82
83/*****************************************************************************\
84 * *
85 * Low level functions *
86 * *
87\*****************************************************************************/
88
89static void sdhci_reset(struct sdhci_host *host, u8 mask)
90{
e16514d8
PO		 91 unsigned long timeout;
92
d129bceb
PO		 93 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
94
e16514d8 95 if (mask & SDHCI_RESET_ALL)
d129bceb
PO		 96 host->clock = 0;
97
e16514d8
PO		 98 /* Wait max 100 ms */
99 timeout = 100;
100
101 /* hw clears the bit when it's done */
102 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
103 if (timeout == 0) {
104 printk(KERN_ERR "%s: Reset 0x%x never completed. "
105 "Please report this to " BUGMAIL ".\n",
106 mmc_hostname(host->mmc), (int)mask);
107 sdhci_dumpregs(host);
108 return;
109 }
110 timeout--;
111 mdelay(1);
d129bceb
PO		 112 }
113}
114
115static void sdhci_init(struct sdhci_host *host)
116{
117 u32 intmask;
118
119 sdhci_reset(host, SDHCI_RESET_ALL);
120
3192a28f
PO		 121 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
122 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
123 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
124 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
a406f5a3 125 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
3192a28f 126 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
d129bceb
PO		 127
128 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
129 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb
PO		 130}
131
132static void sdhci_activate_led(struct sdhci_host *host)
133{
134 u8 ctrl;
135
136 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
137 ctrl |= SDHCI_CTRL_LED;
138 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
139}
140
141static void sdhci_deactivate_led(struct sdhci_host *host)
142{
143 u8 ctrl;
144
145 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
146 ctrl &= ~SDHCI_CTRL_LED;
147 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
148}
149
150/*****************************************************************************\
151 * *
152 * Core functions *
153 * *
154\*****************************************************************************/
155
156static inline char* sdhci_kmap_sg(struct sdhci_host* host)
157{
158 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
159 return host->mapped_sg + host->cur_sg->offset;
160}
161
162static inline void sdhci_kunmap_sg(struct sdhci_host* host)
163{
164 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
165}
166
167static inline int sdhci_next_sg(struct sdhci_host* host)
168{
169 /*
170 * Skip to next SG entry.
171 */
172 host->cur_sg++;
173 host->num_sg--;
174
175 /*
176 * Any entries left?
177 */
178 if (host->num_sg > 0) {
179 host->offset = 0;
180 host->remain = host->cur_sg->length;
181 }
182
183 return host->num_sg;
184}
185
a406f5a3 186static void sdhci_read_block_pio(struct sdhci_host *host)
d129bceb 187{
a406f5a3
PO		 188 int blksize, chunk_remain;
189 u32 data;
d129bceb 190 char *buffer;
a406f5a3 191 int size;
d129bceb 192
a406f5a3 193 DBG("PIO reading\n");
d129bceb 194
a406f5a3
PO		 195 blksize = host->data->blksz;
196 chunk_remain = 0;
197 data = 0;
d129bceb
PO		 198
199 buffer = sdhci_kmap_sg(host) + host->offset;
200
a406f5a3
PO		 201 while (blksize) {
202 if (chunk_remain == 0) {
203 data = readl(host->ioaddr + SDHCI_BUFFER);
204 chunk_remain = min(blksize, 4);
205 }
d129bceb 206
a406f5a3
PO		 207 size = min(host->size, host->remain);
208 size = min(size, chunk_remain);
d129bceb 209
a406f5a3
PO		 210 chunk_remain -= size;
211 blksize -= size;
212 host->offset += size;
213 host->remain -= size;
214 host->size -= size;
215 while (size) {
216 *buffer = data & 0xFF;
217 buffer++;
218 data >>= 8;
219 size--;
220 }
d129bceb 221
a406f5a3
PO		 222 if (host->remain == 0) {
223 sdhci_kunmap_sg(host);
224 if (sdhci_next_sg(host) == 0) {
225 BUG_ON(blksize != 0);
226 return;
227 }
228 buffer = sdhci_kmap_sg(host);
d129bceb 229 }
a406f5a3 230 }
d129bceb 231
a406f5a3
PO		 232 sdhci_kunmap_sg(host);
233}
d129bceb 234
a406f5a3
PO		 235static void sdhci_write_block_pio(struct sdhci_host *host)
236{
237 int blksize, chunk_remain;
238 u32 data;
239 char *buffer;
240 int bytes, size;
d129bceb 241
a406f5a3
PO		 242 DBG("PIO writing\n");
243
244 blksize = host->data->blksz;
245 chunk_remain = 4;
246 data = 0;
247
248 bytes = 0;
249 buffer = sdhci_kmap_sg(host) + host->offset;
d129bceb 250
a406f5a3
PO		 251 while (blksize) {
252 size = min(host->size, host->remain);
253 size = min(size, chunk_remain);
254
255 chunk_remain -= size;
256 blksize -= size;
d129bceb
PO		 257 host->offset += size;
258 host->remain -= size;
d129bceb 259 host->size -= size;
a406f5a3
PO		 260 while (size) {
261 data >>= 8;
262 data |= (u32)*buffer << 24;
263 buffer++;
264 size--;
265 }
266
267 if (chunk_remain == 0) {
268 writel(data, host->ioaddr + SDHCI_BUFFER);
269 chunk_remain = min(blksize, 4);
270 }
d129bceb
PO		 271
272 if (host->remain == 0) {
273 sdhci_kunmap_sg(host);
274 if (sdhci_next_sg(host) == 0) {
a406f5a3 275 BUG_ON(blksize != 0);
d129bceb
PO		 276 return;
277 }
278 buffer = sdhci_kmap_sg(host);
279 }
280 }
281
282 sdhci_kunmap_sg(host);
a406f5a3
PO		 283}
284
285static void sdhci_transfer_pio(struct sdhci_host *host)
286{
287 u32 mask;
288
289 BUG_ON(!host->data);
290
291 if (host->size == 0)
292 return;
293
294 if (host->data->flags & MMC_DATA_READ)
295 mask = SDHCI_DATA_AVAILABLE;
296 else
297 mask = SDHCI_SPACE_AVAILABLE;
298
299 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
300 if (host->data->flags & MMC_DATA_READ)
301 sdhci_read_block_pio(host);
302 else
303 sdhci_write_block_pio(host);
304
305 if (host->size == 0)
306 break;
307
308 BUG_ON(host->num_sg == 0);
309 }
d129bceb 310
a406f5a3 311 DBG("PIO transfer complete.\n");
d129bceb
PO		 312}
313
314static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
315{
1c8cde92
PO		 316 u8 count;
317 unsigned target_timeout, current_timeout;
d129bceb
PO		 318
319 WARN_ON(host->data);
320
c7fa9963 321 if (data == NULL)
d129bceb 322 return;
d129bceb
PO		 323
324 DBG("blksz %04x blks %04x flags %08x\n",
a3fd4a1b 325 data->blksz, data->blocks, data->flags);
d129bceb
PO		 326 DBG("tsac %d ms nsac %d clk\n",
327 data->timeout_ns / 1000000, data->timeout_clks);
328
bab76961
PO		 329 /* Sanity checks */
330 BUG_ON(data->blksz * data->blocks > 524288);
1d676e02
PO		 331 BUG_ON(data->blksz > host->max_block);
332 BUG_ON(data->blocks > 65535);
bab76961 333
1c8cde92
PO		 334 /* timeout in us */
335 target_timeout = data->timeout_ns / 1000 +
336 data->timeout_clks / host->clock;
337
338 /*
339 * Figure out needed cycles.
340 * We do this in steps in order to fit inside a 32 bit int.
341 * The first step is the minimum timeout, which will have a
342 * minimum resolution of 6 bits:
343 * (1) 2^13*1000 > 2^22,
344 * (2) host->timeout_clk < 2^16
345 * =>
346 * (1) / (2) > 2^6
347 */
348 count = 0;
349 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
350 while (current_timeout < target_timeout) {
351 count++;
352 current_timeout <<= 1;
353 if (count >= 0xF)
354 break;
355 }
356
357 if (count >= 0xF) {
358 printk(KERN_WARNING "%s: Too large timeout requested!\n",
359 mmc_hostname(host->mmc));
360 count = 0xE;
361 }
362
363 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
364
d129bceb
PO		 365 if (host->flags & SDHCI_USE_DMA) {
366 int count;
367
368 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
369 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
370 BUG_ON(count != 1);
371
372 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
373 } else {
a3fd4a1b 374 host->size = data->blksz * data->blocks;
d129bceb
PO		 375
376 host->cur_sg = data->sg;
377 host->num_sg = data->sg_len;
378
379 host->offset = 0;
380 host->remain = host->cur_sg->length;
381 }
c7fa9963 382
bab76961
PO		 383 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
384 writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
385 host->ioaddr + SDHCI_BLOCK_SIZE);
c7fa9963
PO		 386 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
387}
388
389static void sdhci_set_transfer_mode(struct sdhci_host *host,
390 struct mmc_data *data)
391{
392 u16 mode;
393
394 WARN_ON(host->data);
395
396 if (data == NULL)
397 return;
398
399 mode = SDHCI_TRNS_BLK_CNT_EN;
400 if (data->blocks > 1)
401 mode |= SDHCI_TRNS_MULTI;
402 if (data->flags & MMC_DATA_READ)
403 mode |= SDHCI_TRNS_READ;
404 if (host->flags & SDHCI_USE_DMA)
405 mode |= SDHCI_TRNS_DMA;
406
407 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
d129bceb
PO		 408}
409
410static void sdhci_finish_data(struct sdhci_host *host)
411{
412 struct mmc_data *data;
d129bceb
PO		 413 u16 blocks;
414
415 BUG_ON(!host->data);
416
417 data = host->data;
418 host->data = NULL;
419
420 if (host->flags & SDHCI_USE_DMA) {
421 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
422 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
d129bceb
PO		 423 }
424
425 /*
426 * Controller doesn't count down when in single block mode.
427 */
428 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
429 blocks = 0;
430 else
431 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
a3fd4a1b 432 data->bytes_xfered = data->blksz * (data->blocks - blocks);
d129bceb
PO		 433
434 if ((data->error == MMC_ERR_NONE) && blocks) {
435 printk(KERN_ERR "%s: Controller signalled completion even "
436 "though there were blocks left. Please report this "
437 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
438 data->error = MMC_ERR_FAILED;
439 }
440
441 if (host->size != 0) {
442 printk(KERN_ERR "%s: %d bytes were left untransferred. "
443 "Please report this to " BUGMAIL ".\n",
444 mmc_hostname(host->mmc), host->size);
445 data->error = MMC_ERR_FAILED;
446 }
447
448 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
449
450 if (data->stop) {
451 /*
452 * The controller needs a reset of internal state machines
453 * upon error conditions.
454 */
455 if (data->error != MMC_ERR_NONE) {
456 sdhci_reset(host, SDHCI_RESET_CMD);
457 sdhci_reset(host, SDHCI_RESET_DATA);
458 }
459
460 sdhci_send_command(host, data->stop);
461 } else
462 tasklet_schedule(&host->finish_tasklet);
463}
464
465static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
466{
467 int flags;
fd2208d7 468 u32 mask;
7cb2c76f 469 unsigned long timeout;
d129bceb
PO		 470
471 WARN_ON(host->cmd);
472
473 DBG("Sending cmd (%x)\n", cmd->opcode);
474
475 /* Wait max 10 ms */
7cb2c76f 476 timeout = 10;
fd2208d7
PO		 477
478 mask = SDHCI_CMD_INHIBIT;
479 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
480 mask |= SDHCI_DATA_INHIBIT;
481
482 /* We shouldn't wait for data inihibit for stop commands, even
483 though they might use busy signaling */
484 if (host->mrq->data && (cmd == host->mrq->data->stop))
485 mask &= ~SDHCI_DATA_INHIBIT;
486
487 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
7cb2c76f 488 if (timeout == 0) {
d129bceb 489 printk(KERN_ERR "%s: Controller never released "
fd2208d7 490 "inhibit bit(s). Please report this to "
d129bceb
PO		 491 BUGMAIL ".\n", mmc_hostname(host->mmc));
492 sdhci_dumpregs(host);
493 cmd->error = MMC_ERR_FAILED;
494 tasklet_schedule(&host->finish_tasklet);
495 return;
496 }
7cb2c76f
PO		 497 timeout--;
498 mdelay(1);
499 }
d129bceb
PO		 500
501 mod_timer(&host->timer, jiffies + 10 * HZ);
502
503 host->cmd = cmd;
504
505 sdhci_prepare_data(host, cmd->data);
506
507 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
508
c7fa9963
PO		 509 sdhci_set_transfer_mode(host, cmd->data);
510
d129bceb
PO		 511 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
512 printk(KERN_ERR "%s: Unsupported response type! "
513 "Please report this to " BUGMAIL ".\n",
514 mmc_hostname(host->mmc));
515 cmd->error = MMC_ERR_INVALID;
516 tasklet_schedule(&host->finish_tasklet);
517 return;
518 }
519
520 if (!(cmd->flags & MMC_RSP_PRESENT))
521 flags = SDHCI_CMD_RESP_NONE;
522 else if (cmd->flags & MMC_RSP_136)
523 flags = SDHCI_CMD_RESP_LONG;
524 else if (cmd->flags & MMC_RSP_BUSY)
525 flags = SDHCI_CMD_RESP_SHORT_BUSY;
526 else
527 flags = SDHCI_CMD_RESP_SHORT;
528
529 if (cmd->flags & MMC_RSP_CRC)
530 flags |= SDHCI_CMD_CRC;
531 if (cmd->flags & MMC_RSP_OPCODE)
532 flags |= SDHCI_CMD_INDEX;
533 if (cmd->data)
534 flags |= SDHCI_CMD_DATA;
535
536 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
537 host->ioaddr + SDHCI_COMMAND);
538}
539
540static void sdhci_finish_command(struct sdhci_host *host)
541{
542 int i;
543
544 BUG_ON(host->cmd == NULL);
545
546 if (host->cmd->flags & MMC_RSP_PRESENT) {
547 if (host->cmd->flags & MMC_RSP_136) {
548 /* CRC is stripped so we need to do some shifting. */
549 for (i = 0;i < 4;i++) {
550 host->cmd->resp[i] = readl(host->ioaddr +
551 SDHCI_RESPONSE + (3-i)*4) << 8;
552 if (i != 3)
553 host->cmd->resp[i] |=
554 readb(host->ioaddr +
555 SDHCI_RESPONSE + (3-i)*4-1);
556 }
557 } else {
558 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
559 }
560 }
561
562 host->cmd->error = MMC_ERR_NONE;
563
564 DBG("Ending cmd (%x)\n", host->cmd->opcode);
565
3192a28f 566 if (host->cmd->data)
d129bceb 567 host->data = host->cmd->data;
3192a28f 568 else
d129bceb
PO		 569 tasklet_schedule(&host->finish_tasklet);
570
571 host->cmd = NULL;
572}
573
574static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
575{
576 int div;
577 u16 clk;
7cb2c76f 578 unsigned long timeout;
d129bceb
PO		 579
580 if (clock == host->clock)
581 return;
582
583 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
584
585 if (clock == 0)
586 goto out;
587
588 for (div = 1;div < 256;div *= 2) {
589 if ((host->max_clk / div) <= clock)
590 break;
591 }
592 div >>= 1;
593
594 clk = div << SDHCI_DIVIDER_SHIFT;
595 clk |= SDHCI_CLOCK_INT_EN;
596 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
597
598 /* Wait max 10 ms */
7cb2c76f
PO		 599 timeout = 10;
600 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
601 & SDHCI_CLOCK_INT_STABLE)) {
602 if (timeout == 0) {
d129bceb
PO		 603 printk(KERN_ERR "%s: Internal clock never stabilised. "
604 "Please report this to " BUGMAIL ".\n",
605 mmc_hostname(host->mmc));
606 sdhci_dumpregs(host);
607 return;
608 }
7cb2c76f
PO		 609 timeout--;
610 mdelay(1);
611 }
d129bceb
PO		 612
613 clk |= SDHCI_CLOCK_CARD_EN;
614 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
615
616out:
617 host->clock = clock;
618}
619
146ad66e
PO		 620static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
621{
622 u8 pwr;
623
624 if (host->power == power)
625 return;
626
627 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
628
629 if (power == (unsigned short)-1)
630 goto out;
631
632 pwr = SDHCI_POWER_ON;
633
634 switch (power) {
635 case MMC_VDD_170:
636 case MMC_VDD_180:
637 case MMC_VDD_190:
638 pwr |= SDHCI_POWER_180;
639 break;
640 case MMC_VDD_290:
641 case MMC_VDD_300:
642 case MMC_VDD_310:
643 pwr |= SDHCI_POWER_300;
644 break;
645 case MMC_VDD_320:
646 case MMC_VDD_330:
647 case MMC_VDD_340:
648 pwr |= SDHCI_POWER_330;
649 break;
650 default:
651 BUG();
652 }
653
654 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
655
656out:
657 host->power = power;
658}
659
d129bceb
PO		 660/*****************************************************************************\
661 * *
662 * MMC callbacks *
663 * *
664\*****************************************************************************/
665
666static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
667{
668 struct sdhci_host *host;
669 unsigned long flags;
670
671 host = mmc_priv(mmc);
672
673 spin_lock_irqsave(&host->lock, flags);
674
675 WARN_ON(host->mrq != NULL);
676
677 sdhci_activate_led(host);
678
679 host->mrq = mrq;
680
681 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
682 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
683 tasklet_schedule(&host->finish_tasklet);
684 } else
685 sdhci_send_command(host, mrq->cmd);
686
687 spin_unlock_irqrestore(&host->lock, flags);
688}
689
690static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
691{
692 struct sdhci_host *host;
693 unsigned long flags;
694 u8 ctrl;
695
696 host = mmc_priv(mmc);
697
698 spin_lock_irqsave(&host->lock, flags);
699
d129bceb
PO		 700 /*
701 * Reset the chip on each power off.
702 * Should clear out any weird states.
703 */
704 if (ios->power_mode == MMC_POWER_OFF) {
705 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb 706 sdhci_init(host);
d129bceb
PO		 707 }
708
709 sdhci_set_clock(host, ios->clock);
710
711 if (ios->power_mode == MMC_POWER_OFF)
146ad66e 712 sdhci_set_power(host, -1);
d129bceb 713 else
146ad66e 714 sdhci_set_power(host, ios->vdd);
d129bceb
PO		 715
716 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
717 if (ios->bus_width == MMC_BUS_WIDTH_4)
718 ctrl |= SDHCI_CTRL_4BITBUS;
719 else
720 ctrl &= ~SDHCI_CTRL_4BITBUS;
721 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
722
723 spin_unlock_irqrestore(&host->lock, flags);
724}
725
726static int sdhci_get_ro(struct mmc_host *mmc)
727{
728 struct sdhci_host *host;
729 unsigned long flags;
730 int present;
731
732 host = mmc_priv(mmc);
733
734 spin_lock_irqsave(&host->lock, flags);
735
736 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
737
738 spin_unlock_irqrestore(&host->lock, flags);
739
740 return !(present & SDHCI_WRITE_PROTECT);
741}
742
743static struct mmc_host_ops sdhci_ops = {
744 .request = sdhci_request,
745 .set_ios = sdhci_set_ios,
746 .get_ro = sdhci_get_ro,
747};
748
749/*****************************************************************************\
750 * *
751 * Tasklets *
752 * *
753\*****************************************************************************/
754
755static void sdhci_tasklet_card(unsigned long param)
756{
757 struct sdhci_host *host;
758 unsigned long flags;
759
760 host = (struct sdhci_host*)param;
761
762 spin_lock_irqsave(&host->lock, flags);
763
764 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
765 if (host->mrq) {
766 printk(KERN_ERR "%s: Card removed during transfer!\n",
767 mmc_hostname(host->mmc));
768 printk(KERN_ERR "%s: Resetting controller.\n",
769 mmc_hostname(host->mmc));
770
771 sdhci_reset(host, SDHCI_RESET_CMD);
772 sdhci_reset(host, SDHCI_RESET_DATA);
773
774 host->mrq->cmd->error = MMC_ERR_FAILED;
775 tasklet_schedule(&host->finish_tasklet);
776 }
777 }
778
779 spin_unlock_irqrestore(&host->lock, flags);
780
781 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
782}
783
784static void sdhci_tasklet_finish(unsigned long param)
785{
786 struct sdhci_host *host;
787 unsigned long flags;
788 struct mmc_request *mrq;
789
790 host = (struct sdhci_host*)param;
791
792 spin_lock_irqsave(&host->lock, flags);
793
794 del_timer(&host->timer);
795
796 mrq = host->mrq;
797
798 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
799
800 /*
801 * The controller needs a reset of internal state machines
802 * upon error conditions.
803 */
804 if ((mrq->cmd->error != MMC_ERR_NONE) ||
805 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
806 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
807 sdhci_reset(host, SDHCI_RESET_CMD);
808 sdhci_reset(host, SDHCI_RESET_DATA);
809 }
810
811 host->mrq = NULL;
812 host->cmd = NULL;
813 host->data = NULL;
814
815 sdhci_deactivate_led(host);
816
817 spin_unlock_irqrestore(&host->lock, flags);
818
819 mmc_request_done(host->mmc, mrq);
820}
821
822static void sdhci_timeout_timer(unsigned long data)
823{
824 struct sdhci_host *host;
825 unsigned long flags;
826
827 host = (struct sdhci_host*)data;
828
829 spin_lock_irqsave(&host->lock, flags);
830
831 if (host->mrq) {
832 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
833 "Please report this to " BUGMAIL ".\n",
834 mmc_hostname(host->mmc));
835 sdhci_dumpregs(host);
836
837 if (host->data) {
838 host->data->error = MMC_ERR_TIMEOUT;
839 sdhci_finish_data(host);
840 } else {
841 if (host->cmd)
842 host->cmd->error = MMC_ERR_TIMEOUT;
843 else
844 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
845
846 tasklet_schedule(&host->finish_tasklet);
847 }
848 }
849
850 spin_unlock_irqrestore(&host->lock, flags);
851}
852
853/*****************************************************************************\
854 * *
855 * Interrupt handling *
856 * *
857\*****************************************************************************/
858
859static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
860{
861 BUG_ON(intmask == 0);
862
863 if (!host->cmd) {
864 printk(KERN_ERR "%s: Got command interrupt even though no "
865 "command operation was in progress.\n",
866 mmc_hostname(host->mmc));
867 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
868 mmc_hostname(host->mmc));
869 sdhci_dumpregs(host);
870 return;
871 }
872
873 if (intmask & SDHCI_INT_RESPONSE)
874 sdhci_finish_command(host);
875 else {
876 if (intmask & SDHCI_INT_TIMEOUT)
877 host->cmd->error = MMC_ERR_TIMEOUT;
878 else if (intmask & SDHCI_INT_CRC)
879 host->cmd->error = MMC_ERR_BADCRC;
880 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
881 host->cmd->error = MMC_ERR_FAILED;
882 else
883 host->cmd->error = MMC_ERR_INVALID;
884
885 tasklet_schedule(&host->finish_tasklet);
886 }
887}
888
889static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
890{
891 BUG_ON(intmask == 0);
892
893 if (!host->data) {
894 /*
895 * A data end interrupt is sent together with the response
896 * for the stop command.
897 */
898 if (intmask & SDHCI_INT_DATA_END)
899 return;
900
901 printk(KERN_ERR "%s: Got data interrupt even though no "
902 "data operation was in progress.\n",
903 mmc_hostname(host->mmc));
904 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
905 mmc_hostname(host->mmc));
906 sdhci_dumpregs(host);
907
908 return;
909 }
910
911 if (intmask & SDHCI_INT_DATA_TIMEOUT)
912 host->data->error = MMC_ERR_TIMEOUT;
913 else if (intmask & SDHCI_INT_DATA_CRC)
914 host->data->error = MMC_ERR_BADCRC;
915 else if (intmask & SDHCI_INT_DATA_END_BIT)
916 host->data->error = MMC_ERR_FAILED;
917
918 if (host->data->error != MMC_ERR_NONE)
919 sdhci_finish_data(host);
920 else {
a406f5a3 921 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
d129bceb
PO		 922 sdhci_transfer_pio(host);
923
924 if (intmask & SDHCI_INT_DATA_END)
925 sdhci_finish_data(host);
926 }
927}
928
929static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
930{
931 irqreturn_t result;
932 struct sdhci_host* host = dev_id;
933 u32 intmask;
934
935 spin_lock(&host->lock);
936
937 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
938
939 if (!intmask) {
940 result = IRQ_NONE;
941 goto out;
942 }
943
944 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
945
3192a28f
PO		 946 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
947 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
948 host->ioaddr + SDHCI_INT_STATUS);
d129bceb 949 tasklet_schedule(&host->card_tasklet);
3192a28f 950 }
d129bceb 951
3192a28f 952 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
d129bceb 953
3192a28f 954 if (intmask & SDHCI_INT_CMD_MASK) {
d129bceb
PO		 955 writel(intmask & SDHCI_INT_CMD_MASK,
956 host->ioaddr + SDHCI_INT_STATUS);
3192a28f 957 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
d129bceb
PO		 958 }
959
960 if (intmask & SDHCI_INT_DATA_MASK) {
d129bceb
PO		 961 writel(intmask & SDHCI_INT_DATA_MASK,
962 host->ioaddr + SDHCI_INT_STATUS);
3192a28f 963 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
d129bceb
PO		 964 }
965
966 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
967
d129bceb 968 if (intmask & SDHCI_INT_BUS_POWER) {
3192a28f 969 printk(KERN_ERR "%s: Card is consuming too much power!\n",
d129bceb 970 mmc_hostname(host->mmc));
3192a28f 971 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
d129bceb
PO		 972 }
973
3192a28f
PO		 974 intmask &= SDHCI_INT_BUS_POWER;
975
976 if (intmask) {
977 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
d129bceb 978 "report this to " BUGMAIL ".\n",
3192a28f 979 mmc_hostname(host->mmc), intmask);
d129bceb
PO		 980 sdhci_dumpregs(host);
981
d129bceb 982 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
3192a28f 983 }
d129bceb
PO		 984
985 result = IRQ_HANDLED;
986
987out:
988 spin_unlock(&host->lock);
989
990 return result;
991}
992
993/*****************************************************************************\
994 * *
995 * Suspend/resume *
996 * *
997\*****************************************************************************/
998
999#ifdef CONFIG_PM
1000
1001static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1002{
1003 struct sdhci_chip *chip;
1004 int i, ret;
1005
1006 chip = pci_get_drvdata(pdev);
1007 if (!chip)
1008 return 0;
1009
1010 DBG("Suspending...\n");
1011
1012 for (i = 0;i < chip->num_slots;i++) {
1013 if (!chip->hosts[i])
1014 continue;
1015 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1016 if (ret) {
1017 for (i--;i >= 0;i--)
1018 mmc_resume_host(chip->hosts[i]->mmc);
1019 return ret;
1020 }
1021 }
1022
1023 pci_save_state(pdev);
1024 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1025 pci_disable_device(pdev);
1026 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1027
1028 return 0;
1029}
1030
1031static int sdhci_resume (struct pci_dev *pdev)
1032{
1033 struct sdhci_chip *chip;
1034 int i, ret;
1035
1036 chip = pci_get_drvdata(pdev);
1037 if (!chip)
1038 return 0;
1039
1040 DBG("Resuming...\n");
1041
1042 pci_set_power_state(pdev, PCI_D0);
1043 pci_restore_state(pdev);
1044 pci_enable_device(pdev);
1045
1046 for (i = 0;i < chip->num_slots;i++) {
1047 if (!chip->hosts[i])
1048 continue;
1049 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1050 pci_set_master(pdev);
1051 sdhci_init(chip->hosts[i]);
1052 ret = mmc_resume_host(chip->hosts[i]->mmc);
1053 if (ret)
1054 return ret;
1055 }
1056
1057 return 0;
1058}
1059
1060#else /* CONFIG_PM */
1061
1062#define sdhci_suspend NULL
1063#define sdhci_resume NULL
1064
1065#endif /* CONFIG_PM */
1066
1067/*****************************************************************************\
1068 * *
1069 * Device probing/removal *
1070 * *
1071\*****************************************************************************/
1072
1073static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1074{
1075 int ret;
4a965505 1076 unsigned int version;
d129bceb
PO		 1077 struct sdhci_chip *chip;
1078 struct mmc_host *mmc;
1079 struct sdhci_host *host;
1080
1081 u8 first_bar;
1082 unsigned int caps;
1083
1084 chip = pci_get_drvdata(pdev);
1085 BUG_ON(!chip);
1086
1087 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1088 if (ret)
1089 return ret;
1090
1091 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1092
1093 if (first_bar > 5) {
1094 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1095 return -ENODEV;
1096 }
1097
1098 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1099 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1100 return -ENODEV;
1101 }
1102
1103 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1104 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1105 return -ENODEV;
1106 }
1107
1108 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1109 if (!mmc)
1110 return -ENOMEM;
1111
1112 host = mmc_priv(mmc);
1113 host->mmc = mmc;
1114
1115 host->bar = first_bar + slot;
1116
1117 host->addr = pci_resource_start(pdev, host->bar);
1118 host->irq = pdev->irq;
1119
1120 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1121
1122 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1123
1124 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1125 if (ret)
1126 goto free;
1127
1128 host->ioaddr = ioremap_nocache(host->addr,
1129 pci_resource_len(pdev, host->bar));
1130 if (!host->ioaddr) {
1131 ret = -ENOMEM;
1132 goto release;
1133 }
1134
4a965505
PO		 1135 version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1136 version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1137 if (version != 0) {
1138 printk(KERN_ERR "%s: Unknown controller version (%d). "
1139 "Cowardly refusing to continue.\n", host->slot_descr,
1140 version);
1141 ret = -ENODEV;
1142 goto unmap;
1143 }
1144
d129bceb
PO		 1145 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1146
1147 if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01))
1148 host->flags |= SDHCI_USE_DMA;
1149
1150 if (host->flags & SDHCI_USE_DMA) {
1151 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1152 printk(KERN_WARNING "%s: No suitable DMA available. "
1153 "Falling back to PIO.\n", host->slot_descr);
1154 host->flags &= ~SDHCI_USE_DMA;
1155 }
1156 }
1157
1158 if (host->flags & SDHCI_USE_DMA)
1159 pci_set_master(pdev);
1160 else /* XXX: Hack to get MMC layer to avoid highmem */
1161 pdev->dma_mask = 0;
1162
8ef1a143
PO		 1163 host->max_clk =
1164 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1165 if (host->max_clk == 0) {
1166 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1167 "frequency.\n", host->slot_descr);
1168 ret = -ENODEV;
1169 goto unmap;
1170 }
d129bceb 1171 host->max_clk *= 1000000;
1c8cde92
PO		 1172
1173 host->timeout_clk =
1174 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1175 if (host->timeout_clk == 0) {
1176 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1177 "frequency.\n", host->slot_descr);
1178 ret = -ENODEV;
1179 goto unmap;
1180 }
1181 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1182 host->timeout_clk *= 1000;
d129bceb 1183
1d676e02
PO		 1184 host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1185 if (host->max_block >= 3) {
1186 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1187 host->slot_descr);
1188 ret = -ENODEV;
1189 goto unmap;
1190 }
1191 host->max_block = 512 << host->max_block;
1192
d129bceb
PO		 1193 /*
1194 * Set host parameters.
1195 */
1196 mmc->ops = &sdhci_ops;
1197 mmc->f_min = host->max_clk / 256;
1198 mmc->f_max = host->max_clk;
d129bceb
PO		 1199 mmc->caps = MMC_CAP_4_BIT_DATA;
1200
146ad66e
PO		 1201 mmc->ocr_avail = 0;
1202 if (caps & SDHCI_CAN_VDD_330)
1203 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1204 else if (caps & SDHCI_CAN_VDD_300)
1205 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1206 else if (caps & SDHCI_CAN_VDD_180)
1207 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1208
1209 if (mmc->ocr_avail == 0) {
1210 printk(KERN_ERR "%s: Hardware doesn't report any "
1211 "support voltages.\n", host->slot_descr);
1212 ret = -ENODEV;
1213 goto unmap;
1214 }
1215
d129bceb
PO		 1216 spin_lock_init(&host->lock);
1217
1218 /*
1219 * Maximum number of segments. Hardware cannot do scatter lists.
1220 */
1221 if (host->flags & SDHCI_USE_DMA)
1222 mmc->max_hw_segs = 1;
1223 else
1224 mmc->max_hw_segs = 16;
1225 mmc->max_phys_segs = 16;
1226
1227 /*
bab76961
PO		 1228 * Maximum number of sectors in one transfer. Limited by DMA boundary
1229 * size (512KiB), which means (512 KiB/512=) 1024 entries.
d129bceb 1230 */
bab76961 1231 mmc->max_sectors = 1024;
d129bceb
PO		 1232
1233 /*
1234 * Maximum segment size. Could be one segment with the maximum number
1235 * of sectors.
1236 */
1237 mmc->max_seg_size = mmc->max_sectors * 512;
1238
1239 /*
1240 * Init tasklets.
1241 */
1242 tasklet_init(&host->card_tasklet,
1243 sdhci_tasklet_card, (unsigned long)host);
1244 tasklet_init(&host->finish_tasklet,
1245 sdhci_tasklet_finish, (unsigned long)host);
1246
e474c66b 1247 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
d129bceb
PO		 1248
1249 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1250 host->slot_descr, host);
1251 if (ret)
8ef1a143 1252 goto untasklet;
d129bceb
PO		 1253
1254 sdhci_init(host);
1255
1256#ifdef CONFIG_MMC_DEBUG
1257 sdhci_dumpregs(host);
1258#endif
1259
1260 host->chip = chip;
1261 chip->hosts[slot] = host;
1262
1263 mmc_add_host(mmc);
1264
1265 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1266 host->addr, host->irq,
1267 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1268
1269 return 0;
1270
8ef1a143 1271untasklet:
d129bceb
PO		 1272 tasklet_kill(&host->card_tasklet);
1273 tasklet_kill(&host->finish_tasklet);
8ef1a143 1274unmap:
d129bceb
PO		 1275 iounmap(host->ioaddr);
1276release:
1277 pci_release_region(pdev, host->bar);
1278free:
1279 mmc_free_host(mmc);
1280
1281 return ret;
1282}
1283
1284static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1285{
1286 struct sdhci_chip *chip;
1287 struct mmc_host *mmc;
1288 struct sdhci_host *host;
1289
1290 chip = pci_get_drvdata(pdev);
1291 host = chip->hosts[slot];
1292 mmc = host->mmc;
1293
1294 chip->hosts[slot] = NULL;
1295
1296 mmc_remove_host(mmc);
1297
1298 sdhci_reset(host, SDHCI_RESET_ALL);
1299
1300 free_irq(host->irq, host);
1301
1302 del_timer_sync(&host->timer);
1303
1304 tasklet_kill(&host->card_tasklet);
1305 tasklet_kill(&host->finish_tasklet);
1306
1307 iounmap(host->ioaddr);
1308
1309 pci_release_region(pdev, host->bar);
1310
1311 mmc_free_host(mmc);
1312}
1313
1314static int __devinit sdhci_probe(struct pci_dev *pdev,
1315 const struct pci_device_id *ent)
1316{
1317 int ret, i;
51f82bc0 1318 u8 slots, rev;
d129bceb
PO		 1319 struct sdhci_chip *chip;
1320
1321 BUG_ON(pdev == NULL);
1322 BUG_ON(ent == NULL);
1323
51f82bc0
PO		 1324 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1325
1326 printk(KERN_INFO DRIVER_NAME
1327 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1328 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1329 (int)rev);
d129bceb
PO		 1330
1331 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1332 if (ret)
1333 return ret;
1334
1335 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1336 DBG("found %d slot(s)\n", slots);
1337 if (slots == 0)
1338 return -ENODEV;
1339
1340 ret = pci_enable_device(pdev);
1341 if (ret)
1342 return ret;
1343
1344 chip = kzalloc(sizeof(struct sdhci_chip) +
1345 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1346 if (!chip) {
1347 ret = -ENOMEM;
1348 goto err;
1349 }
1350
1351 chip->pdev = pdev;
1352
1353 chip->num_slots = slots;
1354 pci_set_drvdata(pdev, chip);
1355
1356 for (i = 0;i < slots;i++) {
1357 ret = sdhci_probe_slot(pdev, i);
1358 if (ret) {
1359 for (i--;i >= 0;i--)
1360 sdhci_remove_slot(pdev, i);
1361 goto free;
1362 }
1363 }
1364
1365 return 0;
1366
1367free:
1368 pci_set_drvdata(pdev, NULL);
1369 kfree(chip);
1370
1371err:
1372 pci_disable_device(pdev);
1373 return ret;
1374}
1375
1376static void __devexit sdhci_remove(struct pci_dev *pdev)
1377{
1378 int i;
1379 struct sdhci_chip *chip;
1380
1381 chip = pci_get_drvdata(pdev);
1382
1383 if (chip) {
1384 for (i = 0;i < chip->num_slots;i++)
1385 sdhci_remove_slot(pdev, i);
1386
1387 pci_set_drvdata(pdev, NULL);
1388
1389 kfree(chip);
1390 }
1391
1392 pci_disable_device(pdev);
1393}
1394
1395static struct pci_driver sdhci_driver = {
1396 .name = DRIVER_NAME,
1397 .id_table = pci_ids,
1398 .probe = sdhci_probe,
1399 .remove = __devexit_p(sdhci_remove),
1400 .suspend = sdhci_suspend,
1401 .resume = sdhci_resume,
1402};
1403
1404/*****************************************************************************\
1405 * *
1406 * Driver init/exit *
1407 * *
1408\*****************************************************************************/
1409
1410static int __init sdhci_drv_init(void)
1411{
1412 printk(KERN_INFO DRIVER_NAME
1413 ": Secure Digital Host Controller Interface driver, "
1414 DRIVER_VERSION "\n");
1415 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1416
1417 return pci_register_driver(&sdhci_driver);
1418}
1419
1420static void __exit sdhci_drv_exit(void)
1421{
1422 DBG("Exiting\n");
1423
1424 pci_unregister_driver(&sdhci_driver);
1425}
1426
1427module_init(sdhci_drv_init);
1428module_exit(sdhci_drv_exit);
1429
1430MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1431MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1432MODULE_VERSION(DRIVER_VERSION);
1433MODULE_LICENSE("GPL");
Clone of davem's net-next-2.6 tree