]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/mmc/host/tmio_mmc.h
sh: prepare the SDHI MFD driver to pass DMA configuration to tmio_mmc.c
[net-next-2.6.git] / drivers / mmc / host / tmio_mmc.h
CommitLineData
4a48998f
IM
1/* Definitons for use with the tmio_mmc.c
2 *
3 * (c) 2004 Ian Molton <spyro@f2s.com>
4 * (c) 2007 Ian Molton <spyro@f2s.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
4cb32906
AB
11
12#include <linux/highmem.h>
13
4a48998f
IM
14#define CTL_SD_CMD 0x00
15#define CTL_ARG_REG 0x04
16#define CTL_STOP_INTERNAL_ACTION 0x08
17#define CTL_XFER_BLK_COUNT 0xa
18#define CTL_RESPONSE 0x0c
19#define CTL_STATUS 0x1c
20#define CTL_IRQ_MASK 0x20
21#define CTL_SD_CARD_CLK_CTL 0x24
22#define CTL_SD_XFER_LEN 0x26
23#define CTL_SD_MEM_CARD_OPT 0x28
24#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
25#define CTL_SD_DATA_PORT 0x30
26#define CTL_TRANSACTION_CTL 0x34
27#define CTL_RESET_SD 0xe0
28#define CTL_SDIO_REGS 0x100
29#define CTL_CLK_AND_WAIT_CTL 0x138
30#define CTL_RESET_SDIO 0x1e0
31
32/* Definitions for values the CTRL_STATUS register can take. */
33#define TMIO_STAT_CMDRESPEND 0x00000001
34#define TMIO_STAT_DATAEND 0x00000004
35#define TMIO_STAT_CARD_REMOVE 0x00000008
36#define TMIO_STAT_CARD_INSERT 0x00000010
37#define TMIO_STAT_SIGSTATE 0x00000020
38#define TMIO_STAT_WRPROTECT 0x00000080
39#define TMIO_STAT_CARD_REMOVE_A 0x00000100
40#define TMIO_STAT_CARD_INSERT_A 0x00000200
41#define TMIO_STAT_SIGSTATE_A 0x00000400
42#define TMIO_STAT_CMD_IDX_ERR 0x00010000
43#define TMIO_STAT_CRCFAIL 0x00020000
44#define TMIO_STAT_STOPBIT_ERR 0x00040000
45#define TMIO_STAT_DATATIMEOUT 0x00080000
46#define TMIO_STAT_RXOVERFLOW 0x00100000
47#define TMIO_STAT_TXUNDERRUN 0x00200000
48#define TMIO_STAT_CMDTIMEOUT 0x00400000
49#define TMIO_STAT_RXRDY 0x01000000
50#define TMIO_STAT_TXRQ 0x02000000
51#define TMIO_STAT_ILL_FUNC 0x20000000
52#define TMIO_STAT_CMD_BUSY 0x40000000
53#define TMIO_STAT_ILL_ACCESS 0x80000000
54
55/* Define some IRQ masks */
56/* This is the mask used at reset by the chip */
57#define TMIO_MASK_ALL 0x837f031d
a8c39d8d
GL
58#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
59#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
4a48998f
IM
60#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
61 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
62#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
63
5e74672c
PZ
64
65#define enable_mmc_irqs(host, i) \
4a48998f
IM
66 do { \
67 u32 mask;\
5e74672c 68 mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
4a48998f 69 mask &= ~((i) & TMIO_MASK_IRQ); \
5e74672c 70 sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
4a48998f
IM
71 } while (0)
72
5e74672c 73#define disable_mmc_irqs(host, i) \
4a48998f
IM
74 do { \
75 u32 mask;\
5e74672c 76 mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
4a48998f 77 mask |= ((i) & TMIO_MASK_IRQ); \
5e74672c 78 sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
4a48998f
IM
79 } while (0)
80
5e74672c 81#define ack_mmc_irqs(host, i) \
4a48998f
IM
82 do { \
83 u32 mask;\
5e74672c 84 mask = sd_ctrl_read32((host), CTL_STATUS); \
4a48998f 85 mask &= ~((i) & TMIO_MASK_IRQ); \
5e74672c 86 sd_ctrl_write32((host), CTL_STATUS, mask); \
4a48998f
IM
87 } while (0)
88
89
90struct tmio_mmc_host {
4a48998f 91 void __iomem *ctl;
5e74672c 92 unsigned long bus_shift;
4a48998f
IM
93 struct mmc_command *cmd;
94 struct mmc_request *mrq;
95 struct mmc_data *data;
96 struct mmc_host *mmc;
97 int irq;
98
64e8867b
IM
99 /* Callbacks for clock / power control */
100 void (*set_pwr)(struct platform_device *host, int state);
101 void (*set_clk_div)(struct platform_device *host, int state);
102
4a48998f
IM
103 /* pio related stuff */
104 struct scatterlist *sg_ptr;
105 unsigned int sg_len;
106 unsigned int sg_off;
64e8867b
IM
107
108 struct platform_device *pdev;
4a48998f
IM
109};
110
5e74672c
PZ
111#include <linux/io.h>
112
113static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
114{
115 return readw(host->ctl + (addr << host->bus_shift));
116}
117
118static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
119 u16 *buf, int count)
120{
121 readsw(host->ctl + (addr << host->bus_shift), buf, count);
122}
123
124static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
125{
126 return readw(host->ctl + (addr << host->bus_shift)) |
127 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
128}
129
130static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
131 u16 val)
132{
133 writew(val, host->ctl + (addr << host->bus_shift));
134}
135
136static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
137 u16 *buf, int count)
138{
139 writesw(host->ctl + (addr << host->bus_shift), buf, count);
140}
141
142static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
143 u32 val)
144{
145 writew(val, host->ctl + (addr << host->bus_shift));
146 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
147}
148
4a48998f
IM
149#include <linux/scatterlist.h>
150#include <linux/blkdev.h>
151
152static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
153 struct mmc_data *data)
154{
155 host->sg_len = data->sg_len;
156 host->sg_ptr = data->sg;
157 host->sg_off = 0;
158}
159
160static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
161{
162 host->sg_ptr = sg_next(host->sg_ptr);
163 host->sg_off = 0;
164 return --host->sg_len;
165}
166
167static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host,
168 unsigned long *flags)
169{
170 struct scatterlist *sg = host->sg_ptr;
171
172 local_irq_save(*flags);
173 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
174}
175
176static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
177 unsigned long *flags)
178{
179 kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
180 local_irq_restore(*flags);
181}
182
183#ifdef CONFIG_MMC_DEBUG
184
185#define STATUS_TO_TEXT(a) \
186 do { \
187 if (status & TMIO_STAT_##a) \
fe246eb0 188 printk(#a); \
4a48998f
IM
189 } while (0)
190
fe246eb0 191void pr_debug_status(u32 status)
4a48998f
IM
192{
193 printk(KERN_DEBUG "status: %08x = ", status);
194 STATUS_TO_TEXT(CARD_REMOVE);
195 STATUS_TO_TEXT(CARD_INSERT);
196 STATUS_TO_TEXT(SIGSTATE);
197 STATUS_TO_TEXT(WRPROTECT);
198 STATUS_TO_TEXT(CARD_REMOVE_A);
199 STATUS_TO_TEXT(CARD_INSERT_A);
200 STATUS_TO_TEXT(SIGSTATE_A);
201 STATUS_TO_TEXT(CMD_IDX_ERR);
202 STATUS_TO_TEXT(STOPBIT_ERR);
203 STATUS_TO_TEXT(ILL_FUNC);
204 STATUS_TO_TEXT(CMD_BUSY);
205 STATUS_TO_TEXT(CMDRESPEND);
206 STATUS_TO_TEXT(DATAEND);
207 STATUS_TO_TEXT(CRCFAIL);
208 STATUS_TO_TEXT(DATATIMEOUT);
209 STATUS_TO_TEXT(CMDTIMEOUT);
210 STATUS_TO_TEXT(RXOVERFLOW);
211 STATUS_TO_TEXT(TXUNDERRUN);
212 STATUS_TO_TEXT(RXRDY);
213 STATUS_TO_TEXT(TXRQ);
214 STATUS_TO_TEXT(ILL_ACCESS);
215 printk("\n");
216}
217
218#else
219#define pr_debug_status(s) do { } while (0)
220#endif