[net-next-2.6.git] / drivers / mmc / host / tmio_mmc.c

/*
 *  linux/drivers/mmc/tmio_mmc.c
 *
 *  Copyright (C) 2004 Ian Molton
 *  Copyright (C) 2007 Ian Molton
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Driver for the MMC / SD / SDIO cell found in:
 *
 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
 *
 * This driver draws mainly on scattered spec sheets, Reverse engineering
 * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
 * support). (Further 4 bit support from a later datasheet).
 *
 * TODO:
 *   Investigate using a workqueue for PIO transfers
 *   Eliminate FIXMEs
 *   SDIO support
 *   Better Power management
 *   Handle MMC errors better
 *   double buffer support
 *
 */
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/mmc/host.h>
#include <linux/mfd/core.h>
#include <linux/mfd/tmio.h>

#include "tmio_mmc.h"

static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
{
	u32 clk = 0, clock;

	if (new_clock) {
		for (clock = host->mmc->f_min, clk = 0x80000080;
			new_clock >= (clock<<1); clk >>= 1)
			clock <<= 1;
		clk |= 0x100;
	}

	if (host->set_clk_div)
		host->set_clk_div(host->pdev, (clk>>22) & 1);

	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
}

static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
{
	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
	msleep(10);
	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
	msleep(10);
}

static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
{
	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
	msleep(10);
	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
	msleep(10);
}

static void reset(struct tmio_mmc_host *host)
{
	/* FIXME - should we set stop clock reg here */
	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
	msleep(10);
	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
	msleep(10);
}

static void
tmio_mmc_finish_request(struct tmio_mmc_host *host)
{
	struct mmc_request *mrq = host->mrq;

	host->mrq = NULL;
	host->cmd = NULL;
	host->data = NULL;

	mmc_request_done(host->mmc, mrq);
}

/* These are the bitmasks the tmio chip requires to implement the MMC response
 * types. Note that R1 and R6 are the same in this scheme. */
#define APP_CMD        0x0040
#define RESP_NONE      0x0300
#define RESP_R1        0x0400
#define RESP_R1B       0x0500
#define RESP_R2        0x0600
#define RESP_R3        0x0700
#define DATA_PRESENT   0x0800
#define TRANSFER_READ  0x1000
#define TRANSFER_MULTI 0x2000
#define SECURITY_CMD   0x4000

static int
tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
{
	struct mmc_data *data = host->data;
	int c = cmd->opcode;

	/* Command 12 is handled by hardware */
	if (cmd->opcode == 12 && !cmd->arg) {
		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
		return 0;
	}

	switch (mmc_resp_type(cmd)) {
	case MMC_RSP_NONE: c |= RESP_NONE; break;
	case MMC_RSP_R1:   c |= RESP_R1;   break;
	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
	case MMC_RSP_R2:   c |= RESP_R2;   break;
	case MMC_RSP_R3:   c |= RESP_R3;   break;
	default:
		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
		return -EINVAL;
	}

	host->cmd = cmd;

/* FIXME - this seems to be ok comented out but the spec suggest this bit should
 *         be set when issuing app commands.
 *	if(cmd->flags & MMC_FLAG_ACMD)
 *		c |= APP_CMD;
 */
	if (data) {
		c |= DATA_PRESENT;
		if (data->blocks > 1) {
			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
			c |= TRANSFER_MULTI;
		}
		if (data->flags & MMC_DATA_READ)
			c |= TRANSFER_READ;
	}

	enable_mmc_irqs(host, TMIO_MASK_CMD);

	/* Fire off the command */
	sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
	sd_ctrl_write16(host, CTL_SD_CMD, c);

	return 0;
}

/* This chip always returns (at least?) as much data as you ask for.
 * I'm unsure what happens if you ask for less than a block. This should be
 * looked into to ensure that a funny length read doesnt hose the controller.
 *
 */
static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	unsigned short *buf;
	unsigned int count;
	unsigned long flags;

	if (!data) {
		pr_debug("Spurious PIO IRQ\n");
		return;
	}

	buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
	      host->sg_off);

	count = host->sg_ptr->length - host->sg_off;
	if (count > data->blksz)
		count = data->blksz;

	pr_debug("count: %08x offset: %08x flags %08x\n",
	    count, host->sg_off, data->flags);

	/* Transfer the data */
	if (data->flags & MMC_DATA_READ)
		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
	else
		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);

	host->sg_off += count;

	tmio_mmc_kunmap_atomic(host, &flags);

	if (host->sg_off == host->sg_ptr->length)
		tmio_mmc_next_sg(host);

	return;
}

static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	struct mmc_command *stop;

	host->data = NULL;

	if (!data) {
		pr_debug("Spurious data end IRQ\n");
		return;
	}
	stop = data->stop;

	/* FIXME - return correct transfer count on errors */
	if (!data->error)
		data->bytes_xfered = data->blocks * data->blksz;
	else
		data->bytes_xfered = 0;

	pr_debug("Completed data request\n");

	/*FIXME - other drivers allow an optional stop command of any given type
	 *        which we dont do, as the chip can auto generate them.
	 *        Perhaps we can be smarter about when to use auto CMD12 and
	 *        only issue the auto request when we know this is the desired
	 *        stop command, allowing fallback to the stop command the
	 *        upper layers expect. For now, we do what works.
	 */

	if (data->flags & MMC_DATA_READ)
		disable_mmc_irqs(host, TMIO_MASK_READOP);
	else
		disable_mmc_irqs(host, TMIO_MASK_WRITEOP);

	if (stop) {
		if (stop->opcode == 12 && !stop->arg)
			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
		else
			BUG();
	}

	tmio_mmc_finish_request(host);
}

static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
	unsigned int stat)
{
	struct mmc_command *cmd = host->cmd;
	int i, addr;

	if (!host->cmd) {
		pr_debug("Spurious CMD irq\n");
		return;
	}

	host->cmd = NULL;

	/* This controller is sicker than the PXA one. Not only do we need to
	 * drop the top 8 bits of the first response word, we also need to
	 * modify the order of the response for short response command types.
	 */

	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
		cmd->resp[i] = sd_ctrl_read32(host, addr);

	if (cmd->flags &  MMC_RSP_136) {
		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
		cmd->resp[3] <<= 8;
	} else if (cmd->flags & MMC_RSP_R3) {
		cmd->resp[0] = cmd->resp[3];
	}

	if (stat & TMIO_STAT_CMDTIMEOUT)
		cmd->error = -ETIMEDOUT;
	else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
		cmd->error = -EILSEQ;

	/* If there is data to handle we enable data IRQs here, and
	 * we will ultimatley finish the request in the data_end handler.
	 * If theres no data or we encountered an error, finish now.
	 */
	if (host->data && !cmd->error) {
		if (host->data->flags & MMC_DATA_READ)
			enable_mmc_irqs(host, TMIO_MASK_READOP);
		else
			enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
	} else {
		tmio_mmc_finish_request(host);
	}

	return;
}


static irqreturn_t tmio_mmc_irq(int irq, void *devid)
{
	struct tmio_mmc_host *host = devid;
	unsigned int ireg, irq_mask, status;

	pr_debug("MMC IRQ begin\n");

	status = sd_ctrl_read32(host, CTL_STATUS);
	irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
	ireg = status & TMIO_MASK_IRQ & ~irq_mask;

	pr_debug_status(status);
	pr_debug_status(ireg);

	if (!ireg) {
		disable_mmc_irqs(host, status & ~irq_mask);

		pr_debug("tmio_mmc: Spurious irq, disabling! "
			"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
		pr_debug_status(status);

		goto out;
	}

	while (ireg) {
		/* Card insert / remove attempts */
		if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
			ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
				TMIO_STAT_CARD_REMOVE);
			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
		}

		/* CRC and other errors */
/*		if (ireg & TMIO_STAT_ERR_IRQ)
 *			handled |= tmio_error_irq(host, irq, stat);
 */

		/* Command completion */
		if (ireg & TMIO_MASK_CMD) {
			ack_mmc_irqs(host, TMIO_MASK_CMD);
			tmio_mmc_cmd_irq(host, status);
		}

		/* Data transfer */
		if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
			ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
			tmio_mmc_pio_irq(host);
		}

		/* Data transfer completion */
		if (ireg & TMIO_STAT_DATAEND) {
			ack_mmc_irqs(host, TMIO_STAT_DATAEND);
			tmio_mmc_data_irq(host);
		}

		/* Check status - keep going until we've handled it all */
		status = sd_ctrl_read32(host, CTL_STATUS);
		irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
		ireg = status & TMIO_MASK_IRQ & ~irq_mask;

		pr_debug("Status at end of loop: %08x\n", status);
		pr_debug_status(status);
	}
	pr_debug("MMC IRQ end\n");

out:
	return IRQ_HANDLED;
}

static int tmio_mmc_start_data(struct tmio_mmc_host *host,
	struct mmc_data *data)
{
	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
	    data->blksz, data->blocks);

	/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
	if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
		printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
			mmc_hostname(host->mmc), data->blksz);
		return -EINVAL;
	}

	tmio_mmc_init_sg(host, data);
	host->data = data;

	/* Set transfer length / blocksize */
	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);

	return 0;
}

/* Process requests from the MMC layer */
static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
	int ret;

	if (host->mrq)
		pr_debug("request not null\n");

	host->mrq = mrq;

	if (mrq->data) {
		ret = tmio_mmc_start_data(host, mrq->data);
		if (ret)
			goto fail;
	}

	ret = tmio_mmc_start_command(host, mrq->cmd);

	if (!ret)
		return;

fail:
	mrq->cmd->error = ret;
	mmc_request_done(mmc, mrq);
}

/* Set MMC clock / power.
 * Note: This controller uses a simple divider scheme therefore it cannot
 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
 * slowest setting.
 */
static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	if (ios->clock)
		tmio_mmc_set_clock(host, ios->clock);

	/* Power sequence - OFF -> ON -> UP */
	switch (ios->power_mode) {
	case MMC_POWER_OFF: /* power down SD bus */
		if (host->set_pwr)
			host->set_pwr(host->pdev, 0);
		tmio_mmc_clk_stop(host);
		break;
	case MMC_POWER_ON: /* power up SD bus */
		if (host->set_pwr)
			host->set_pwr(host->pdev, 1);
		break;
	case MMC_POWER_UP: /* start bus clock */
		tmio_mmc_clk_start(host);
		break;
	}

	switch (ios->bus_width) {
	case MMC_BUS_WIDTH_1:
		sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
	break;
	case MMC_BUS_WIDTH_4:
		sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
	break;
	}

	/* Let things settle. delay taken from winCE driver */
	udelay(140);
}

static int tmio_mmc_get_ro(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
}

static struct mmc_host_ops tmio_mmc_ops = {
	.request	= tmio_mmc_request,
	.set_ios	= tmio_mmc_set_ios,
	.get_ro         = tmio_mmc_get_ro,
};

#ifdef CONFIG_PM
static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
{
	struct mfd_cell	*cell = (struct mfd_cell *)dev->dev.platform_data;
	struct mmc_host *mmc = platform_get_drvdata(dev);
	int ret;

	ret = mmc_suspend_host(mmc, state);

	/* Tell MFD core it can disable us now.*/
	if (!ret && cell->disable)
		cell->disable(dev);

	return ret;
}

static int tmio_mmc_resume(struct platform_device *dev)
{
	struct mfd_cell	*cell = (struct mfd_cell *)dev->dev.platform_data;
	struct mmc_host *mmc = platform_get_drvdata(dev);
	int ret = 0;

	/* Tell the MFD core we are ready to be enabled */
	if (cell->resume) {
		ret = cell->resume(dev);
		if (ret)
			goto out;
	}

	mmc_resume_host(mmc);

out:
	return ret;
}
#else
#define tmio_mmc_suspend NULL
#define tmio_mmc_resume NULL
#endif

static int __devinit tmio_mmc_probe(struct platform_device *dev)
{
	struct mfd_cell	*cell = (struct mfd_cell *)dev->dev.platform_data;
	struct tmio_mmc_data *pdata;
	struct resource *res_ctl;
	struct tmio_mmc_host *host;
	struct mmc_host *mmc;
	int ret = -EINVAL;

	if (dev->num_resources != 2)
		goto out;

	res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!res_ctl)
		goto out;

	pdata = cell->driver_data;
	if (!pdata || !pdata->hclk)
		goto out;

	ret = -ENOMEM;

	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
	if (!mmc)
		goto out;

	host = mmc_priv(mmc);
	host->mmc = mmc;
	host->pdev = dev;
	platform_set_drvdata(dev, mmc);

	host->set_pwr = pdata->set_pwr;
	host->set_clk_div = pdata->set_clk_div;

	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
	host->bus_shift = resource_size(res_ctl) >> 10;

	host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
	if (!host->ctl)
		goto host_free;

	mmc->ops = &tmio_mmc_ops;
	mmc->caps = MMC_CAP_4_BIT_DATA;
	mmc->caps |= pdata->capabilities;
	mmc->f_max = pdata->hclk;
	mmc->f_min = mmc->f_max / 512;
	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;

	/* Tell the MFD core we are ready to be enabled */
	if (cell->enable) {
		ret = cell->enable(dev);
		if (ret)
			goto unmap_ctl;
	}

	tmio_mmc_clk_stop(host);
	reset(host);

	ret = platform_get_irq(dev, 0);
	if (ret >= 0)
		host->irq = ret;
	else
		goto unmap_ctl;

	disable_mmc_irqs(host, TMIO_MASK_ALL);

	ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
		IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host);
	if (ret)
		goto unmap_ctl;

	mmc_add_host(mmc);

	printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
	       (unsigned long)host->ctl, host->irq);

	/* Unmask the IRQs we want to know about */
	enable_mmc_irqs(host, TMIO_MASK_IRQ);

	return 0;

unmap_ctl:
	iounmap(host->ctl);
host_free:
	mmc_free_host(mmc);
out:
	return ret;
}

static int __devexit tmio_mmc_remove(struct platform_device *dev)
{
	struct mmc_host *mmc = platform_get_drvdata(dev);

	platform_set_drvdata(dev, NULL);

	if (mmc) {
		struct tmio_mmc_host *host = mmc_priv(mmc);
		mmc_remove_host(mmc);
		free_irq(host->irq, host);
		iounmap(host->ctl);
		mmc_free_host(mmc);
	}

	return 0;
}

/* ------------------- device registration ----------------------- */

static struct platform_driver tmio_mmc_driver = {
	.driver = {
		.name = "tmio-mmc",
		.owner = THIS_MODULE,
	},
	.probe = tmio_mmc_probe,
	.remove = __devexit_p(tmio_mmc_remove),
	.suspend = tmio_mmc_suspend,
	.resume = tmio_mmc_resume,
};


static int __init tmio_mmc_init(void)
{
	return platform_driver_register(&tmio_mmc_driver);
}

static void __exit tmio_mmc_exit(void)
{
	platform_driver_unregister(&tmio_mmc_driver);
}

module_init(tmio_mmc_init);
module_exit(tmio_mmc_exit);

MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:tmio-mmc");
Commit	Line	Data
4a48998f IM	1	/*
	2	* linux/drivers/mmc/tmio_mmc.c
	3	*
	4	* Copyright (C) 2004 Ian Molton
	5	* Copyright (C) 2007 Ian Molton
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* Driver for the MMC / SD / SDIO cell found in:
	12	*
e6f2c7ad	13	* TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
4a48998f IM	14	*
	15	* This driver draws mainly on scattered spec sheets, Reverse engineering
	16	* of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
	17	* support). (Further 4 bit support from a later datasheet).
	18	*
	19	* TODO:
	20	* Investigate using a workqueue for PIO transfers
	21	* Eliminate FIXMEs
	22	* SDIO support
	23	* Better Power management
	24	* Handle MMC errors better
	25	* double buffer support
	26	*
	27	*/
	28	#include <linux/module.h>
	29	#include <linux/irq.h>
	30	#include <linux/device.h>
	31	#include <linux/delay.h>
	32	#include <linux/mmc/host.h>
	33	#include <linux/mfd/core.h>
	34	#include <linux/mfd/tmio.h>
	35
	36	#include "tmio_mmc.h"
	37
4a48998f IM	38	static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
4a48998f IM	39	{
da46a0bd	40	u32 clk = 0, clock;
4a48998f IM	41
4a48998f IM	42	if (new_clock) {
da46a0bd IM	43	for (clock = host->mmc->f_min, clk = 0x80000080;
da46a0bd IM	44	new_clock >= (clock<<1); clk >>= 1)
4a48998f	45	clock <<= 1;
4a48998f IM	46	clk \|= 0x100;
	47	}
	48
64e8867b IM	49	if (host->set_clk_div)
	50	host->set_clk_div(host->pdev, (clk>>22) & 1);
	51
da46a0bd	52	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
4a48998f IM	53	}
	54
	55	static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
	56	{
5e74672c	57	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
4a48998f	58	msleep(10);
5e74672c PZ	59	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
5e74672c PZ	60	sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
4a48998f IM	61	msleep(10);
	62	}
	63
	64	static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
	65	{
5e74672c PZ	66	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 \|
5e74672c PZ	67	sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
4a48998f	68	msleep(10);
5e74672c	69	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
4a48998f IM	70	msleep(10);
	71	}
	72
	73	static void reset(struct tmio_mmc_host *host)
	74	{
4a48998f	75	/* FIXME - should we set stop clock reg here */
5e74672c PZ	76	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
5e74672c PZ	77	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
4a48998f	78	msleep(10);
5e74672c PZ	79	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
5e74672c PZ	80	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
4a48998f IM	81	msleep(10);
	82	}
	83
	84	static void
	85	tmio_mmc_finish_request(struct tmio_mmc_host *host)
	86	{
	87	struct mmc_request *mrq = host->mrq;
	88
	89	host->mrq = NULL;
	90	host->cmd = NULL;
	91	host->data = NULL;
	92
	93	mmc_request_done(host->mmc, mrq);
	94	}
	95
	96	/* These are the bitmasks the tmio chip requires to implement the MMC response
	97	* types. Note that R1 and R6 are the same in this scheme. */
	98	#define APP_CMD 0x0040
	99	#define RESP_NONE 0x0300
	100	#define RESP_R1 0x0400
	101	#define RESP_R1B 0x0500
	102	#define RESP_R2 0x0600
	103	#define RESP_R3 0x0700
	104	#define DATA_PRESENT 0x0800
	105	#define TRANSFER_READ 0x1000
	106	#define TRANSFER_MULTI 0x2000
	107	#define SECURITY_CMD 0x4000
	108
	109	static int
	110	tmio_mmc_start_command(struct tmio_mmc_host host, struct mmc_command cmd)
	111	{
4a48998f IM	112	struct mmc_data *data = host->data;
	113	int c = cmd->opcode;
	114
	115	/* Command 12 is handled by hardware */
	116	if (cmd->opcode == 12 && !cmd->arg) {
5e74672c	117	sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
4a48998f IM	118	return 0;
	119	}
	120
	121	switch (mmc_resp_type(cmd)) {
	122	case MMC_RSP_NONE: c \|= RESP_NONE; break;
	123	case MMC_RSP_R1: c \|= RESP_R1; break;
	124	case MMC_RSP_R1B: c \|= RESP_R1B; break;
	125	case MMC_RSP_R2: c \|= RESP_R2; break;
	126	case MMC_RSP_R3: c \|= RESP_R3; break;
	127	default:
	128	pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
	129	return -EINVAL;
	130	}
	131
	132	host->cmd = cmd;
	133
	134	/* FIXME - this seems to be ok comented out but the spec suggest this bit should
	135	* be set when issuing app commands.
	136	* if(cmd->flags & MMC_FLAG_ACMD)
	137	* c \|= APP_CMD;
	138	*/
	139	if (data) {
	140	c \|= DATA_PRESENT;
	141	if (data->blocks > 1) {
5e74672c	142	sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
4a48998f IM	143	c \|= TRANSFER_MULTI;
	144	}
	145	if (data->flags & MMC_DATA_READ)
	146	c \|= TRANSFER_READ;
	147	}
	148
5e74672c	149	enable_mmc_irqs(host, TMIO_MASK_CMD);
4a48998f IM	150
4a48998f IM	151	/* Fire off the command */
5e74672c PZ	152	sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
5e74672c PZ	153	sd_ctrl_write16(host, CTL_SD_CMD, c);
4a48998f IM	154
	155	return 0;
	156	}
	157
	158	/* This chip always returns (at least?) as much data as you ask for.
	159	* I'm unsure what happens if you ask for less than a block. This should be
	160	* looked into to ensure that a funny length read doesnt hose the controller.
	161	*
	162	*/
	163	static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
	164	{
4a48998f IM	165	struct mmc_data *data = host->data;
	166	unsigned short *buf;
	167	unsigned int count;
	168	unsigned long flags;
	169
	170	if (!data) {
	171	pr_debug("Spurious PIO IRQ\n");
	172	return;
	173	}
	174
	175	buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
	176	host->sg_off);
	177
	178	count = host->sg_ptr->length - host->sg_off;
	179	if (count > data->blksz)
	180	count = data->blksz;
	181
	182	pr_debug("count: %08x offset: %08x flags %08x\n",
	183	count, host->sg_off, data->flags);
	184
	185	/* Transfer the data */
	186	if (data->flags & MMC_DATA_READ)
5e74672c	187	sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
4a48998f	188	else
5e74672c	189	sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
4a48998f IM	190
	191	host->sg_off += count;
	192
	193	tmio_mmc_kunmap_atomic(host, &flags);
	194
	195	if (host->sg_off == host->sg_ptr->length)
	196	tmio_mmc_next_sg(host);
	197
	198	return;
	199	}
	200
	201	static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
	202	{
4a48998f	203	struct mmc_data *data = host->data;
a0d045ca	204	struct mmc_command *stop;
4a48998f IM	205
	206	host->data = NULL;
	207
	208	if (!data) {
	209	pr_debug("Spurious data end IRQ\n");
	210	return;
	211	}
a0d045ca	212	stop = data->stop;
4a48998f IM	213
	214	/* FIXME - return correct transfer count on errors */
	215	if (!data->error)
	216	data->bytes_xfered = data->blocks * data->blksz;
	217	else
	218	data->bytes_xfered = 0;
	219
	220	pr_debug("Completed data request\n");
	221
	222	/*FIXME - other drivers allow an optional stop command of any given type
	223	* which we dont do, as the chip can auto generate them.
	224	* Perhaps we can be smarter about when to use auto CMD12 and
	225	* only issue the auto request when we know this is the desired
	226	* stop command, allowing fallback to the stop command the
	227	* upper layers expect. For now, we do what works.
	228	*/
	229
	230	if (data->flags & MMC_DATA_READ)
5e74672c	231	disable_mmc_irqs(host, TMIO_MASK_READOP);
4a48998f	232	else
5e74672c	233	disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
4a48998f IM	234
	235	if (stop) {
	236	if (stop->opcode == 12 && !stop->arg)
5e74672c	237	sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
4a48998f IM	238	else
	239	BUG();
	240	}
	241
	242	tmio_mmc_finish_request(host);
	243	}
	244
	245	static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
	246	unsigned int stat)
	247	{
4a48998f	248	struct mmc_command *cmd = host->cmd;
5e74672c	249	int i, addr;
4a48998f IM	250
	251	if (!host->cmd) {
	252	pr_debug("Spurious CMD irq\n");
	253	return;
	254	}
	255
	256	host->cmd = NULL;
	257
	258	/* This controller is sicker than the PXA one. Not only do we need to
	259	* drop the top 8 bits of the first response word, we also need to
	260	* modify the order of the response for short response command types.
	261	*/
	262
5e74672c PZ	263	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
5e74672c PZ	264	cmd->resp[i] = sd_ctrl_read32(host, addr);
4a48998f IM	265
	266	if (cmd->flags & MMC_RSP_136) {
	267	cmd->resp[0] = (cmd->resp[0] << 8) \| (cmd->resp[1] >> 24);
	268	cmd->resp[1] = (cmd->resp[1] << 8) \| (cmd->resp[2] >> 24);
	269	cmd->resp[2] = (cmd->resp[2] << 8) \| (cmd->resp[3] >> 24);
	270	cmd->resp[3] <<= 8;
	271	} else if (cmd->flags & MMC_RSP_R3) {
	272	cmd->resp[0] = cmd->resp[3];
	273	}
	274
	275	if (stat & TMIO_STAT_CMDTIMEOUT)
	276	cmd->error = -ETIMEDOUT;
	277	else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
	278	cmd->error = -EILSEQ;
	279
	280	/* If there is data to handle we enable data IRQs here, and
	281	* we will ultimatley finish the request in the data_end handler.
	282	* If theres no data or we encountered an error, finish now.
	283	*/
	284	if (host->data && !cmd->error) {
	285	if (host->data->flags & MMC_DATA_READ)
5e74672c	286	enable_mmc_irqs(host, TMIO_MASK_READOP);
4a48998f	287	else
5e74672c	288	enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
4a48998f IM	289	} else {
	290	tmio_mmc_finish_request(host);
	291	}
	292
	293	return;
	294	}
	295
	296
	297	static irqreturn_t tmio_mmc_irq(int irq, void *devid)
	298	{
	299	struct tmio_mmc_host *host = devid;
4a48998f IM	300	unsigned int ireg, irq_mask, status;
	301
	302	pr_debug("MMC IRQ begin\n");
	303
5e74672c PZ	304	status = sd_ctrl_read32(host, CTL_STATUS);
5e74672c PZ	305	irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
4a48998f IM	306	ireg = status & TMIO_MASK_IRQ & ~irq_mask;
	307
	308	pr_debug_status(status);
	309	pr_debug_status(ireg);
	310
	311	if (!ireg) {
5e74672c	312	disable_mmc_irqs(host, status & ~irq_mask);
4a48998f IM	313
	314	pr_debug("tmio_mmc: Spurious irq, disabling! "
	315	"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
	316	pr_debug_status(status);
	317
	318	goto out;
	319	}
	320
	321	while (ireg) {
	322	/* Card insert / remove attempts */
	323	if (ireg & (TMIO_STAT_CARD_INSERT \| TMIO_STAT_CARD_REMOVE)) {
5e74672c	324	ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT \|
4a48998f	325	TMIO_STAT_CARD_REMOVE);
6d9af5af	326	mmc_detect_change(host->mmc, msecs_to_jiffies(100));
4a48998f IM	327	}
	328
	329	/* CRC and other errors */
	330	/* if (ireg & TMIO_STAT_ERR_IRQ)
	331	* handled \|= tmio_error_irq(host, irq, stat);
	332	*/
	333
	334	/* Command completion */
	335	if (ireg & TMIO_MASK_CMD) {
5e74672c	336	ack_mmc_irqs(host, TMIO_MASK_CMD);
4a48998f IM	337	tmio_mmc_cmd_irq(host, status);
	338	}
	339
	340	/* Data transfer */
	341	if (ireg & (TMIO_STAT_RXRDY \| TMIO_STAT_TXRQ)) {
5e74672c	342	ack_mmc_irqs(host, TMIO_STAT_RXRDY \| TMIO_STAT_TXRQ);
4a48998f IM	343	tmio_mmc_pio_irq(host);
	344	}
	345
	346	/* Data transfer completion */
	347	if (ireg & TMIO_STAT_DATAEND) {
5e74672c	348	ack_mmc_irqs(host, TMIO_STAT_DATAEND);
4a48998f IM	349	tmio_mmc_data_irq(host);
	350	}
	351
	352	/* Check status - keep going until we've handled it all */
5e74672c PZ	353	status = sd_ctrl_read32(host, CTL_STATUS);
5e74672c PZ	354	irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
4a48998f IM	355	ireg = status & TMIO_MASK_IRQ & ~irq_mask;
	356
	357	pr_debug("Status at end of loop: %08x\n", status);
	358	pr_debug_status(status);
	359	}
	360	pr_debug("MMC IRQ end\n");
	361
	362	out:
	363	return IRQ_HANDLED;
	364	}
	365
	366	static int tmio_mmc_start_data(struct tmio_mmc_host *host,
	367	struct mmc_data *data)
	368	{
4a48998f IM	369	pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
	370	data->blksz, data->blocks);
	371
	372	/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
	373	if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
	374	printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
	375	mmc_hostname(host->mmc), data->blksz);
	376	return -EINVAL;
	377	}
	378
	379	tmio_mmc_init_sg(host, data);
	380	host->data = data;
	381
	382	/* Set transfer length / blocksize */
5e74672c PZ	383	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
5e74672c PZ	384	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
4a48998f IM	385
	386	return 0;
	387	}
	388
	389	/* Process requests from the MMC layer */
	390	static void tmio_mmc_request(struct mmc_host mmc, struct mmc_request mrq)
	391	{
	392	struct tmio_mmc_host *host = mmc_priv(mmc);
	393	int ret;
	394
	395	if (host->mrq)
	396	pr_debug("request not null\n");
	397
	398	host->mrq = mrq;
	399
	400	if (mrq->data) {
	401	ret = tmio_mmc_start_data(host, mrq->data);
	402	if (ret)
	403	goto fail;
	404	}
	405
	406	ret = tmio_mmc_start_command(host, mrq->cmd);
	407
	408	if (!ret)
	409	return;
	410
	411	fail:
	412	mrq->cmd->error = ret;
	413	mmc_request_done(mmc, mrq);
	414	}
	415
	416	/* Set MMC clock / power.
	417	* Note: This controller uses a simple divider scheme therefore it cannot
	418	* run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
	419	* MMC wont run that fast, it has to be clocked at 12MHz which is the next
	420	* slowest setting.
	421	*/
	422	static void tmio_mmc_set_ios(struct mmc_host mmc, struct mmc_ios ios)
	423	{
	424	struct tmio_mmc_host *host = mmc_priv(mmc);
4a48998f IM	425
	426	if (ios->clock)
	427	tmio_mmc_set_clock(host, ios->clock);
	428
	429	/* Power sequence - OFF -> ON -> UP */
	430	switch (ios->power_mode) {
	431	case MMC_POWER_OFF: /* power down SD bus */
64e8867b IM	432	if (host->set_pwr)
64e8867b IM	433	host->set_pwr(host->pdev, 0);
4a48998f IM	434	tmio_mmc_clk_stop(host);
	435	break;
	436	case MMC_POWER_ON: /* power up SD bus */
64e8867b IM	437	if (host->set_pwr)
64e8867b IM	438	host->set_pwr(host->pdev, 1);
4a48998f IM	439	break;
	440	case MMC_POWER_UP: /* start bus clock */
	441	tmio_mmc_clk_start(host);
	442	break;
	443	}
	444
	445	switch (ios->bus_width) {
	446	case MMC_BUS_WIDTH_1:
5e74672c	447	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
4a48998f IM	448	break;
4a48998f IM	449	case MMC_BUS_WIDTH_4:
5e74672c	450	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
4a48998f IM	451	break;
	452	}
	453
	454	/* Let things settle. delay taken from winCE driver */
	455	udelay(140);
	456	}
	457
	458	static int tmio_mmc_get_ro(struct mmc_host *mmc)
	459	{
	460	struct tmio_mmc_host *host = mmc_priv(mmc);
4a48998f	461
5e74672c	462	return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
4a48998f IM	463	}
	464
	465	static struct mmc_host_ops tmio_mmc_ops = {
	466	.request = tmio_mmc_request,
	467	.set_ios = tmio_mmc_set_ios,
	468	.get_ro = tmio_mmc_get_ro,
	469	};
	470
	471	#ifdef CONFIG_PM
	472	static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
	473	{
	474	struct mfd_cell cell = (struct mfd_cell )dev->dev.platform_data;
	475	struct mmc_host *mmc = platform_get_drvdata(dev);
	476	int ret;
	477
	478	ret = mmc_suspend_host(mmc, state);
	479
	480	/* Tell MFD core it can disable us now.*/
	481	if (!ret && cell->disable)
	482	cell->disable(dev);
	483
	484	return ret;
	485	}
	486
	487	static int tmio_mmc_resume(struct platform_device *dev)
	488	{
	489	struct mfd_cell cell = (struct mfd_cell )dev->dev.platform_data;
	490	struct mmc_host *mmc = platform_get_drvdata(dev);
4a48998f IM	491	int ret = 0;
4a48998f IM	492
4a48998f	493	/* Tell the MFD core we are ready to be enabled */
64e8867b IM	494	if (cell->resume) {
64e8867b IM	495	ret = cell->resume(dev);
4a48998f IM	496	if (ret)
	497	goto out;
	498	}
	499
	500	mmc_resume_host(mmc);
	501
	502	out:
	503	return ret;
	504	}
	505	#else
	506	#define tmio_mmc_suspend NULL
	507	#define tmio_mmc_resume NULL
	508	#endif
	509
	510	static int __devinit tmio_mmc_probe(struct platform_device *dev)
	511	{
	512	struct mfd_cell cell = (struct mfd_cell )dev->dev.platform_data;
f0e46cc4	513	struct tmio_mmc_data *pdata;
64e8867b	514	struct resource *res_ctl;
4a48998f IM	515	struct tmio_mmc_host *host;
4a48998f IM	516	struct mmc_host *mmc;
d6c9b5ed	517	int ret = -EINVAL;
4a48998f	518
64e8867b	519	if (dev->num_resources != 2)
4a48998f IM	520	goto out;
	521
	522	res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
64e8867b	523	if (!res_ctl)
4a48998f	524	goto out;
4a48998f	525
f0e46cc4	526	pdata = cell->driver_data;
d6c9b5ed	527	if (!pdata \|\| !pdata->hclk)
f0e46cc4	528	goto out;
d6c9b5ed PZ	529
d6c9b5ed PZ	530	ret = -ENOMEM;
f0e46cc4	531
4a48998f IM	532	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
	533	if (!mmc)
	534	goto out;
	535
	536	host = mmc_priv(mmc);
	537	host->mmc = mmc;
64e8867b	538	host->pdev = dev;
4a48998f IM	539	platform_set_drvdata(dev, mmc);
4a48998f IM	540
64e8867b IM	541	host->set_pwr = pdata->set_pwr;
	542	host->set_clk_div = pdata->set_clk_div;
	543
5e74672c PZ	544	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
	545	host->bus_shift = resource_size(res_ctl) >> 10;
	546
bc6772a0	547	host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
4a48998f IM	548	if (!host->ctl)
	549	goto host_free;
	550
4a48998f IM	551	mmc->ops = &tmio_mmc_ops;
4a48998f IM	552	mmc->caps = MMC_CAP_4_BIT_DATA;
b741d440	553	mmc->caps \|= pdata->capabilities;
f0e46cc4 PZ	554	mmc->f_max = pdata->hclk;
f0e46cc4 PZ	555	mmc->f_min = mmc->f_max / 512;
4a48998f IM	556	mmc->ocr_avail = MMC_VDD_32_33 \| MMC_VDD_33_34;
4a48998f IM	557
4a48998f IM	558	/* Tell the MFD core we are ready to be enabled */
	559	if (cell->enable) {
	560	ret = cell->enable(dev);
	561	if (ret)
64e8867b	562	goto unmap_ctl;
4a48998f IM	563	}
4a48998f IM	564
4a48998f IM	565	tmio_mmc_clk_stop(host);
	566	reset(host);
	567
	568	ret = platform_get_irq(dev, 0);
	569	if (ret >= 0)
	570	host->irq = ret;
	571	else
64e8867b	572	goto unmap_ctl;
4a48998f	573
5e74672c	574	disable_mmc_irqs(host, TMIO_MASK_ALL);
4a48998f	575
6c413cc7	576	ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED \|
14f1b75b	577	IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host);
4a48998f	578	if (ret)
64e8867b	579	goto unmap_ctl;
4a48998f	580
4a48998f IM	581	mmc_add_host(mmc);
	582
	583	printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
	584	(unsigned long)host->ctl, host->irq);
	585
	586	/* Unmask the IRQs we want to know about */
5e74672c	587	enable_mmc_irqs(host, TMIO_MASK_IRQ);
4a48998f IM	588
	589	return 0;
	590
4a48998f IM	591	unmap_ctl:
	592	iounmap(host->ctl);
	593	host_free:
	594	mmc_free_host(mmc);
	595	out:
	596	return ret;
	597	}
	598
	599	static int __devexit tmio_mmc_remove(struct platform_device *dev)
	600	{
	601	struct mmc_host *mmc = platform_get_drvdata(dev);
	602
	603	platform_set_drvdata(dev, NULL);
	604
	605	if (mmc) {
	606	struct tmio_mmc_host *host = mmc_priv(mmc);
	607	mmc_remove_host(mmc);
4a48998f IM	608	free_irq(host->irq, host);
4a48998f IM	609	iounmap(host->ctl);
bedcc45c	610	mmc_free_host(mmc);
4a48998f IM	611	}
	612
	613	return 0;
	614	}
	615
	616	/* ------------------- device registration ----------------------- */
	617
	618	static struct platform_driver tmio_mmc_driver = {
	619	.driver = {
	620	.name = "tmio-mmc",
	621	.owner = THIS_MODULE,
	622	},
	623	.probe = tmio_mmc_probe,
	624	.remove = __devexit_p(tmio_mmc_remove),
	625	.suspend = tmio_mmc_suspend,
	626	.resume = tmio_mmc_resume,
	627	};
	628
	629
	630	static int __init tmio_mmc_init(void)
	631	{
	632	return platform_driver_register(&tmio_mmc_driver);
	633	}
	634
	635	static void __exit tmio_mmc_exit(void)
	636	{
	637	platform_driver_unregister(&tmio_mmc_driver);
	638	}
	639
	640	module_init(tmio_mmc_init);
	641	module_exit(tmio_mmc_exit);
	642
	643	MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
	644	MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
	645	MODULE_LICENSE("GPL v2");
	646	MODULE_ALIAS("platform:tmio-mmc");