[net-next-2.6.git] / drivers / misc / phantom.c

/*
 *  Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  You need a userspace library to cooperate with this driver. It (and other
 *  info) may be obtained here:
 *  http://www.fi.muni.cz/~xslaby/phantom.html
 *  or alternatively, you might use OpenHaptics provided by Sensable.
 */

#include <linux/compat.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/pci.h>
#include <linux/fs.h>
#include <linux/poll.h>
#include <linux/interrupt.h>
#include <linux/cdev.h>
#include <linux/slab.h>
#include <linux/phantom.h>
#include <linux/sched.h>
#include <linux/smp_lock.h>

#include <asm/atomic.h>
#include <asm/io.h>

#define PHANTOM_VERSION		"n0.9.8"

#define PHANTOM_MAX_MINORS	8

#define PHN_IRQCTL		0x4c    /* irq control in caddr space */

#define PHB_RUNNING		1
#define PHB_NOT_OH		2

static struct class *phantom_class;
static int phantom_major;

struct phantom_device {
	unsigned int opened;
	void __iomem *caddr;
	u32 __iomem *iaddr;
	u32 __iomem *oaddr;
	unsigned long status;
	atomic_t counter;

	wait_queue_head_t wait;
	struct cdev cdev;

	struct mutex open_lock;
	spinlock_t regs_lock;

	/* used in NOT_OH mode */
	struct phm_regs oregs;
	u32 ctl_reg;
};

static unsigned char phantom_devices[PHANTOM_MAX_MINORS];

static int phantom_status(struct phantom_device *dev, unsigned long newstat)
{
	pr_debug("phantom_status %lx %lx\n", dev->status, newstat);

	if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
		atomic_set(&dev->counter, 0);
		iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
		iowrite32(0x43, dev->caddr + PHN_IRQCTL);
		ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
	} else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
		iowrite32(0, dev->caddr + PHN_IRQCTL);
		ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
	}

	dev->status = newstat;

	return 0;
}

/*
 * File ops
 */

static long phantom_ioctl(struct file *file, unsigned int cmd,
		unsigned long arg)
{
	struct phantom_device *dev = file->private_data;
	struct phm_regs rs;
	struct phm_reg r;
	void __user *argp = (void __user *)arg;
	unsigned long flags;
	unsigned int i;

	switch (cmd) {
	case PHN_SETREG:
	case PHN_SET_REG:
		if (copy_from_user(&r, argp, sizeof(r)))
			return -EFAULT;

		if (r.reg > 7)
			return -EINVAL;

		spin_lock_irqsave(&dev->regs_lock, flags);
		if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
				phantom_status(dev, dev->status | PHB_RUNNING)){
			spin_unlock_irqrestore(&dev->regs_lock, flags);
			return -ENODEV;
		}

		pr_debug("phantom: writing %x to %u\n", r.value, r.reg);

		/* preserve amp bit (don't allow to change it when in NOT_OH) */
		if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
			r.value &= ~PHN_CTL_AMP;
			r.value |= dev->ctl_reg & PHN_CTL_AMP;
			dev->ctl_reg = r.value;
		}

		iowrite32(r.value, dev->iaddr + r.reg);
		ioread32(dev->iaddr); /* PCI posting */

		if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
			phantom_status(dev, dev->status & ~PHB_RUNNING);
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	case PHN_SETREGS:
	case PHN_SET_REGS:
		if (copy_from_user(&rs, argp, sizeof(rs)))
			return -EFAULT;

		pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
		spin_lock_irqsave(&dev->regs_lock, flags);
		if (dev->status & PHB_NOT_OH)
			memcpy(&dev->oregs, &rs, sizeof(rs));
		else {
			u32 m = min(rs.count, 8U);
			for (i = 0; i < m; i++)
				if (rs.mask & BIT(i))
					iowrite32(rs.values[i], dev->oaddr + i);
			ioread32(dev->iaddr); /* PCI posting */
		}
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	case PHN_GETREG:
	case PHN_GET_REG:
		if (copy_from_user(&r, argp, sizeof(r)))
			return -EFAULT;

		if (r.reg > 7)
			return -EINVAL;

		r.value = ioread32(dev->iaddr + r.reg);

		if (copy_to_user(argp, &r, sizeof(r)))
			return -EFAULT;
		break;
	case PHN_GETREGS:
	case PHN_GET_REGS: {
		u32 m;

		if (copy_from_user(&rs, argp, sizeof(rs)))
			return -EFAULT;

		m = min(rs.count, 8U);

		pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
		spin_lock_irqsave(&dev->regs_lock, flags);
		for (i = 0; i < m; i++)
			if (rs.mask & BIT(i))
				rs.values[i] = ioread32(dev->iaddr + i);
		atomic_set(&dev->counter, 0);
		spin_unlock_irqrestore(&dev->regs_lock, flags);

		if (copy_to_user(argp, &rs, sizeof(rs)))
			return -EFAULT;
		break;
	} case PHN_NOT_OH:
		spin_lock_irqsave(&dev->regs_lock, flags);
		if (dev->status & PHB_RUNNING) {
			printk(KERN_ERR "phantom: you need to set NOT_OH "
					"before you start the device!\n");
			spin_unlock_irqrestore(&dev->regs_lock, flags);
			return -EINVAL;
		}
		dev->status |= PHB_NOT_OH;
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	default:
		return -ENOTTY;
	}

	return 0;
}

#ifdef CONFIG_COMPAT
static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
		unsigned long arg)
{
	if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
		cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
		cmd |= sizeof(void *) << _IOC_SIZESHIFT;
	}
	return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
}
#else
#define phantom_compat_ioctl NULL
#endif

static int phantom_open(struct inode *inode, struct file *file)
{
	struct phantom_device *dev = container_of(inode->i_cdev,
			struct phantom_device, cdev);

	lock_kernel();
	nonseekable_open(inode, file);

	if (mutex_lock_interruptible(&dev->open_lock)) {
		unlock_kernel();
		return -ERESTARTSYS;
	}

	if (dev->opened) {
		mutex_unlock(&dev->open_lock);
		unlock_kernel();
		return -EINVAL;
	}

	WARN_ON(dev->status & PHB_NOT_OH);

	file->private_data = dev;

	atomic_set(&dev->counter, 0);
	dev->opened++;
	mutex_unlock(&dev->open_lock);
	unlock_kernel();
	return 0;
}

static int phantom_release(struct inode *inode, struct file *file)
{
	struct phantom_device *dev = file->private_data;

	mutex_lock(&dev->open_lock);

	dev->opened = 0;
	phantom_status(dev, dev->status & ~PHB_RUNNING);
	dev->status &= ~PHB_NOT_OH;

	mutex_unlock(&dev->open_lock);

	return 0;
}

static unsigned int phantom_poll(struct file *file, poll_table *wait)
{
	struct phantom_device *dev = file->private_data;
	unsigned int mask = 0;

	pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
	poll_wait(file, &dev->wait, wait);

	if (!(dev->status & PHB_RUNNING))
		mask = POLLERR;
	else if (atomic_read(&dev->counter))
		mask = POLLIN | POLLRDNORM;

	pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));

	return mask;
}

static const struct file_operations phantom_file_ops = {
	.open = phantom_open,
	.release = phantom_release,
	.unlocked_ioctl = phantom_ioctl,
	.compat_ioctl = phantom_compat_ioctl,
	.poll = phantom_poll,
	.llseek = no_llseek,
};

static irqreturn_t phantom_isr(int irq, void *data)
{
	struct phantom_device *dev = data;
	unsigned int i;
	u32 ctl;

	spin_lock(&dev->regs_lock);
	ctl = ioread32(dev->iaddr + PHN_CONTROL);
	if (!(ctl & PHN_CTL_IRQ)) {
		spin_unlock(&dev->regs_lock);
		return IRQ_NONE;
	}

	iowrite32(0, dev->iaddr);
	iowrite32(0xc0, dev->iaddr);

	if (dev->status & PHB_NOT_OH) {
		struct phm_regs *r = &dev->oregs;
		u32 m = min(r->count, 8U);

		for (i = 0; i < m; i++)
			if (r->mask & BIT(i))
				iowrite32(r->values[i], dev->oaddr + i);

		dev->ctl_reg ^= PHN_CTL_AMP;
		iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
	}
	spin_unlock(&dev->regs_lock);

	ioread32(dev->iaddr); /* PCI posting */

	atomic_inc(&dev->counter);
	wake_up_interruptible(&dev->wait);

	return IRQ_HANDLED;
}

/*
 * Init and deinit driver
 */

static unsigned int __devinit phantom_get_free(void)
{
	unsigned int i;

	for (i = 0; i < PHANTOM_MAX_MINORS; i++)
		if (phantom_devices[i] == 0)
			break;

	return i;
}

static int __devinit phantom_probe(struct pci_dev *pdev,
	const struct pci_device_id *pci_id)
{
	struct phantom_device *pht;
	unsigned int minor;
	int retval;

	retval = pci_enable_device(pdev);
	if (retval)
		goto err;

	minor = phantom_get_free();
	if (minor == PHANTOM_MAX_MINORS) {
		dev_err(&pdev->dev, "too many devices found!\n");
		retval = -EIO;
		goto err_dis;
	}

	phantom_devices[minor] = 1;

	retval = pci_request_regions(pdev, "phantom");
	if (retval)
		goto err_null;

	retval = -ENOMEM;
	pht = kzalloc(sizeof(*pht), GFP_KERNEL);
	if (pht == NULL) {
		dev_err(&pdev->dev, "unable to allocate device\n");
		goto err_reg;
	}

	pht->caddr = pci_iomap(pdev, 0, 0);
	if (pht->caddr == NULL) {
		dev_err(&pdev->dev, "can't remap conf space\n");
		goto err_fr;
	}
	pht->iaddr = pci_iomap(pdev, 2, 0);
	if (pht->iaddr == NULL) {
		dev_err(&pdev->dev, "can't remap input space\n");
		goto err_unmc;
	}
	pht->oaddr = pci_iomap(pdev, 3, 0);
	if (pht->oaddr == NULL) {
		dev_err(&pdev->dev, "can't remap output space\n");
		goto err_unmi;
	}

	mutex_init(&pht->open_lock);
	spin_lock_init(&pht->regs_lock);
	init_waitqueue_head(&pht->wait);
	cdev_init(&pht->cdev, &phantom_file_ops);
	pht->cdev.owner = THIS_MODULE;

	iowrite32(0, pht->caddr + PHN_IRQCTL);
	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
	retval = request_irq(pdev->irq, phantom_isr,
			IRQF_SHARED | IRQF_DISABLED, "phantom", pht);
	if (retval) {
		dev_err(&pdev->dev, "can't establish ISR\n");
		goto err_unmo;
	}

	retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
	if (retval) {
		dev_err(&pdev->dev, "chardev registration failed\n");
		goto err_irq;
	}

	if (IS_ERR(device_create(phantom_class, &pdev->dev,
				 MKDEV(phantom_major, minor), NULL,
				 "phantom%u", minor)))
		dev_err(&pdev->dev, "can't create device\n");

	pci_set_drvdata(pdev, pht);

	return 0;
err_irq:
	free_irq(pdev->irq, pht);
err_unmo:
	pci_iounmap(pdev, pht->oaddr);
err_unmi:
	pci_iounmap(pdev, pht->iaddr);
err_unmc:
	pci_iounmap(pdev, pht->caddr);
err_fr:
	kfree(pht);
err_reg:
	pci_release_regions(pdev);
err_null:
	phantom_devices[minor] = 0;
err_dis:
	pci_disable_device(pdev);
err:
	return retval;
}

static void __devexit phantom_remove(struct pci_dev *pdev)
{
	struct phantom_device *pht = pci_get_drvdata(pdev);
	unsigned int minor = MINOR(pht->cdev.dev);

	device_destroy(phantom_class, MKDEV(phantom_major, minor));

	cdev_del(&pht->cdev);

	iowrite32(0, pht->caddr + PHN_IRQCTL);
	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
	free_irq(pdev->irq, pht);

	pci_iounmap(pdev, pht->oaddr);
	pci_iounmap(pdev, pht->iaddr);
	pci_iounmap(pdev, pht->caddr);

	kfree(pht);

	pci_release_regions(pdev);

	phantom_devices[minor] = 0;

	pci_disable_device(pdev);
}

#ifdef CONFIG_PM
static int phantom_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct phantom_device *dev = pci_get_drvdata(pdev);

	iowrite32(0, dev->caddr + PHN_IRQCTL);
	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */

	synchronize_irq(pdev->irq);

	return 0;
}

static int phantom_resume(struct pci_dev *pdev)
{
	struct phantom_device *dev = pci_get_drvdata(pdev);

	iowrite32(0, dev->caddr + PHN_IRQCTL);

	return 0;
}
#else
#define phantom_suspend	NULL
#define phantom_resume	NULL
#endif

static struct pci_device_id phantom_pci_tbl[] __devinitdata = {
	{ .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
	  .subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
	  .class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);

static struct pci_driver phantom_pci_driver = {
	.name = "phantom",
	.id_table = phantom_pci_tbl,
	.probe = phantom_probe,
	.remove = __devexit_p(phantom_remove),
	.suspend = phantom_suspend,
	.resume = phantom_resume
};

static CLASS_ATTR_STRING(version, 0444, PHANTOM_VERSION);

static int __init phantom_init(void)
{
	int retval;
	dev_t dev;

	phantom_class = class_create(THIS_MODULE, "phantom");
	if (IS_ERR(phantom_class)) {
		retval = PTR_ERR(phantom_class);
		printk(KERN_ERR "phantom: can't register phantom class\n");
		goto err;
	}
	retval = class_create_file(phantom_class, &class_attr_version.attr);
	if (retval) {
		printk(KERN_ERR "phantom: can't create sysfs version file\n");
		goto err_class;
	}

	retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
	if (retval) {
		printk(KERN_ERR "phantom: can't register character device\n");
		goto err_attr;
	}
	phantom_major = MAJOR(dev);

	retval = pci_register_driver(&phantom_pci_driver);
	if (retval) {
		printk(KERN_ERR "phantom: can't register pci driver\n");
		goto err_unchr;
	}

	printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
			"init OK\n");

	return 0;
err_unchr:
	unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
err_attr:
	class_remove_file(phantom_class, &class_attr_version.attr);
err_class:
	class_destroy(phantom_class);
err:
	return retval;
}

static void __exit phantom_exit(void)
{
	pci_unregister_driver(&phantom_pci_driver);

	unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);

	class_remove_file(phantom_class, &class_attr_version.attr);
	class_destroy(phantom_class);

	pr_debug("phantom: module successfully removed\n");
}

module_init(phantom_init);
module_exit(phantom_exit);

MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
MODULE_LICENSE("GPL");
MODULE_VERSION(PHANTOM_VERSION);
Commit	Line	Data
cef2cf07 JS	1	/*
	2	* Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
0211a9c8	9	* You need a userspace library to cooperate with this driver. It (and other
cef2cf07 JS	10	* info) may be obtained here:
cef2cf07 JS	11	* http://www.fi.muni.cz/~xslaby/phantom.html
b2afe331	12	* or alternatively, you might use OpenHaptics provided by Sensable.
cef2cf07 JS	13	*/
cef2cf07 JS	14
7e4e8e68	15	#include <linux/compat.h>
cef2cf07 JS	16	#include <linux/kernel.h>
	17	#include <linux/module.h>
	18	#include <linux/device.h>
	19	#include <linux/pci.h>
	20	#include <linux/fs.h>
	21	#include <linux/poll.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/cdev.h>
5a0e3ad6	24	#include <linux/slab.h>
cef2cf07	25	#include <linux/phantom.h>
d43c36dc	26	#include <linux/sched.h>
4541b5ec	27	#include <linux/smp_lock.h>
cef2cf07 JS	28
	29	#include <asm/atomic.h>
	30	#include <asm/io.h>
	31
82f56087	32	#define PHANTOM_VERSION "n0.9.8"
cef2cf07 JS	33
	34	#define PHANTOM_MAX_MINORS 8
	35
	36	#define PHN_IRQCTL 0x4c /* irq control in caddr space */
	37
	38	#define PHB_RUNNING 1
bc552f77	39	#define PHB_NOT_OH 2
cef2cf07 JS	40
	41	static struct class *phantom_class;
	42	static int phantom_major;
	43
	44	struct phantom_device {
	45	unsigned int opened;
	46	void __iomem *caddr;
	47	u32 __iomem *iaddr;
	48	u32 __iomem *oaddr;
	49	unsigned long status;
	50	atomic_t counter;
	51
	52	wait_queue_head_t wait;
	53	struct cdev cdev;
	54
	55	struct mutex open_lock;
bc552f77 JS	56	spinlock_t regs_lock;
	57
	58	/* used in NOT_OH mode */
	59	struct phm_regs oregs;
	60	u32 ctl_reg;
cef2cf07 JS	61	};
	62
	63	static unsigned char phantom_devices[PHANTOM_MAX_MINORS];
	64
	65	static int phantom_status(struct phantom_device *dev, unsigned long newstat)
	66	{
	67	pr_debug("phantom_status %lx %lx\n", dev->status, newstat);
	68
	69	if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
	70	atomic_set(&dev->counter, 0);
	71	iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
	72	iowrite32(0x43, dev->caddr + PHN_IRQCTL);
c8511f94 JS	73	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
c8511f94 JS	74	} else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
cef2cf07	75	iowrite32(0, dev->caddr + PHN_IRQCTL);
c8511f94 JS	76	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
c8511f94 JS	77	}
cef2cf07 JS	78
	79	dev->status = newstat;
	80
	81	return 0;
	82	}
	83
	84	/*
	85	* File ops
	86	*/
	87
c15395c0 JS	88	static long phantom_ioctl(struct file *file, unsigned int cmd,
c15395c0 JS	89	unsigned long arg)
cef2cf07 JS	90	{
	91	struct phantom_device *dev = file->private_data;
	92	struct phm_regs rs;
	93	struct phm_reg r;
	94	void __user argp = (void __user )arg;
bc552f77	95	unsigned long flags;
cef2cf07 JS	96	unsigned int i;
cef2cf07 JS	97
cef2cf07	98	switch (cmd) {
7e4e8e68	99	case PHN_SETREG:
cef2cf07 JS	100	case PHN_SET_REG:
	101	if (copy_from_user(&r, argp, sizeof(r)))
	102	return -EFAULT;
	103
	104	if (r.reg > 7)
	105	return -EINVAL;
	106
bc552f77	107	spin_lock_irqsave(&dev->regs_lock, flags);
cef2cf07	108	if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
c15395c0	109	phantom_status(dev, dev->status \| PHB_RUNNING)){
bc552f77	110	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	111	return -ENODEV;
c15395c0	112	}
cef2cf07 JS	113
cef2cf07 JS	114	pr_debug("phantom: writing %x to %u\n", r.value, r.reg);
bc552f77 JS	115
	116	/* preserve amp bit (don't allow to change it when in NOT_OH) */
	117	if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
	118	r.value &= ~PHN_CTL_AMP;
	119	r.value \|= dev->ctl_reg & PHN_CTL_AMP;
	120	dev->ctl_reg = r.value;
	121	}
	122
cef2cf07	123	iowrite32(r.value, dev->iaddr + r.reg);
c8511f94	124	ioread32(dev->iaddr); /* PCI posting */
cef2cf07 JS	125
	126	if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
	127	phantom_status(dev, dev->status & ~PHB_RUNNING);
bc552f77	128	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	129	break;
7e4e8e68	130	case PHN_SETREGS:
cef2cf07 JS	131	case PHN_SET_REGS:
	132	if (copy_from_user(&rs, argp, sizeof(rs)))
	133	return -EFAULT;
	134
	135	pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
bc552f77 JS	136	spin_lock_irqsave(&dev->regs_lock, flags);
	137	if (dev->status & PHB_NOT_OH)
	138	memcpy(&dev->oregs, &rs, sizeof(rs));
	139	else {
	140	u32 m = min(rs.count, 8U);
	141	for (i = 0; i < m; i++)
	142	if (rs.mask & BIT(i))
	143	iowrite32(rs.values[i], dev->oaddr + i);
	144	ioread32(dev->iaddr); /* PCI posting */
	145	}
	146	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	147	break;
7e4e8e68	148	case PHN_GETREG:
cef2cf07 JS	149	case PHN_GET_REG:
	150	if (copy_from_user(&r, argp, sizeof(r)))
	151	return -EFAULT;
	152
	153	if (r.reg > 7)
	154	return -EINVAL;
	155
	156	r.value = ioread32(dev->iaddr + r.reg);
	157
	158	if (copy_to_user(argp, &r, sizeof(r)))
	159	return -EFAULT;
	160	break;
7e4e8e68	161	case PHN_GETREGS:
bc552f77 JS	162	case PHN_GET_REGS: {
	163	u32 m;
	164
cef2cf07 JS	165	if (copy_from_user(&rs, argp, sizeof(rs)))
	166	return -EFAULT;
	167
bc552f77 JS	168	m = min(rs.count, 8U);
bc552f77 JS	169
cef2cf07	170	pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
bc552f77 JS	171	spin_lock_irqsave(&dev->regs_lock, flags);
	172	for (i = 0; i < m; i++)
	173	if (rs.mask & BIT(i))
cef2cf07	174	rs.values[i] = ioread32(dev->iaddr + i);
7d4f9f09	175	atomic_set(&dev->counter, 0);
bc552f77	176	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07 JS	177
	178	if (copy_to_user(argp, &rs, sizeof(rs)))
	179	return -EFAULT;
	180	break;
bc552f77 JS	181	} case PHN_NOT_OH:
	182	spin_lock_irqsave(&dev->regs_lock, flags);
	183	if (dev->status & PHB_RUNNING) {
	184	printk(KERN_ERR "phantom: you need to set NOT_OH "
	185	"before you start the device!\n");
	186	spin_unlock_irqrestore(&dev->regs_lock, flags);
	187	return -EINVAL;
	188	}
	189	dev->status \|= PHB_NOT_OH;
	190	spin_unlock_irqrestore(&dev->regs_lock, flags);
	191	break;
cef2cf07 JS	192	default:
	193	return -ENOTTY;
	194	}
	195
	196	return 0;
	197	}
	198
7e4e8e68 JS	199	#ifdef CONFIG_COMPAT
	200	static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
	201	unsigned long arg)
	202	{
	203	if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
	204	cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
	205	cmd \|= sizeof(void *) << _IOC_SIZESHIFT;
	206	}
	207	return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
	208	}
	209	#else
	210	#define phantom_compat_ioctl NULL
	211	#endif
	212
cef2cf07 JS	213	static int phantom_open(struct inode inode, struct file file)
	214	{
	215	struct phantom_device *dev = container_of(inode->i_cdev,
	216	struct phantom_device, cdev);
	217
4541b5ec	218	lock_kernel();
cef2cf07 JS	219	nonseekable_open(inode, file);
cef2cf07 JS	220
4541b5ec JC	221	if (mutex_lock_interruptible(&dev->open_lock)) {
4541b5ec JC	222	unlock_kernel();
cef2cf07	223	return -ERESTARTSYS;
4541b5ec	224	}
cef2cf07 JS	225
	226	if (dev->opened) {
	227	mutex_unlock(&dev->open_lock);
4541b5ec	228	unlock_kernel();
cef2cf07 JS	229	return -EINVAL;
	230	}
	231
bc552f77 JS	232	WARN_ON(dev->status & PHB_NOT_OH);
bc552f77 JS	233
cef2cf07 JS	234	file->private_data = dev;
cef2cf07 JS	235
bc552f77	236	atomic_set(&dev->counter, 0);
cef2cf07 JS	237	dev->opened++;
cef2cf07 JS	238	mutex_unlock(&dev->open_lock);
4541b5ec	239	unlock_kernel();
cef2cf07 JS	240	return 0;
	241	}
	242
	243	static int phantom_release(struct inode inode, struct file file)
	244	{
	245	struct phantom_device *dev = file->private_data;
	246
	247	mutex_lock(&dev->open_lock);
	248
	249	dev->opened = 0;
	250	phantom_status(dev, dev->status & ~PHB_RUNNING);
bc552f77	251	dev->status &= ~PHB_NOT_OH;
cef2cf07 JS	252
	253	mutex_unlock(&dev->open_lock);
	254
	255	return 0;
	256	}
	257
	258	static unsigned int phantom_poll(struct file file, poll_table wait)
	259	{
	260	struct phantom_device *dev = file->private_data;
	261	unsigned int mask = 0;
	262
	263	pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
	264	poll_wait(file, &dev->wait, wait);
7d4f9f09 JS	265
	266	if (!(dev->status & PHB_RUNNING))
	267	mask = POLLERR;
	268	else if (atomic_read(&dev->counter))
cef2cf07	269	mask = POLLIN \| POLLRDNORM;
7d4f9f09	270
cef2cf07 JS	271	pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));
	272
	273	return mask;
	274	}
	275
828c0950	276	static const struct file_operations phantom_file_ops = {
cef2cf07 JS	277	.open = phantom_open,
cef2cf07 JS	278	.release = phantom_release,
c15395c0	279	.unlocked_ioctl = phantom_ioctl,
7e4e8e68	280	.compat_ioctl = phantom_compat_ioctl,
cef2cf07	281	.poll = phantom_poll,
6038f373	282	.llseek = no_llseek,
cef2cf07 JS	283	};
	284
	285	static irqreturn_t phantom_isr(int irq, void *data)
	286	{
	287	struct phantom_device *dev = data;
bc552f77 JS	288	unsigned int i;
bc552f77 JS	289	u32 ctl;
cef2cf07	290
bc552f77 JS	291	spin_lock(&dev->regs_lock);
	292	ctl = ioread32(dev->iaddr + PHN_CONTROL);
	293	if (!(ctl & PHN_CTL_IRQ)) {
	294	spin_unlock(&dev->regs_lock);
cef2cf07	295	return IRQ_NONE;
bc552f77	296	}
cef2cf07 JS	297
	298	iowrite32(0, dev->iaddr);
	299	iowrite32(0xc0, dev->iaddr);
bc552f77 JS	300
	301	if (dev->status & PHB_NOT_OH) {
	302	struct phm_regs *r = &dev->oregs;
	303	u32 m = min(r->count, 8U);
	304
	305	for (i = 0; i < m; i++)
	306	if (r->mask & BIT(i))
	307	iowrite32(r->values[i], dev->oaddr + i);
	308
	309	dev->ctl_reg ^= PHN_CTL_AMP;
	310	iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
	311	}
	312	spin_unlock(&dev->regs_lock);
	313
c8511f94	314	ioread32(dev->iaddr); /* PCI posting */
cef2cf07 JS	315
	316	atomic_inc(&dev->counter);
	317	wake_up_interruptible(&dev->wait);
	318
	319	return IRQ_HANDLED;
	320	}
	321
	322	/*
	323	* Init and deinit driver
	324	*/
	325
	326	static unsigned int __devinit phantom_get_free(void)
	327	{
	328	unsigned int i;
	329
	330	for (i = 0; i < PHANTOM_MAX_MINORS; i++)
	331	if (phantom_devices[i] == 0)
	332	break;
	333
	334	return i;
	335	}
	336
	337	static int __devinit phantom_probe(struct pci_dev *pdev,
	338	const struct pci_device_id *pci_id)
	339	{
	340	struct phantom_device *pht;
	341	unsigned int minor;
	342	int retval;
	343
	344	retval = pci_enable_device(pdev);
	345	if (retval)
	346	goto err;
	347
	348	minor = phantom_get_free();
	349	if (minor == PHANTOM_MAX_MINORS) {
	350	dev_err(&pdev->dev, "too many devices found!\n");
	351	retval = -EIO;
	352	goto err_dis;
	353	}
	354
	355	phantom_devices[minor] = 1;
	356
	357	retval = pci_request_regions(pdev, "phantom");
	358	if (retval)
	359	goto err_null;
	360
	361	retval = -ENOMEM;
	362	pht = kzalloc(sizeof(*pht), GFP_KERNEL);
	363	if (pht == NULL) {
	364	dev_err(&pdev->dev, "unable to allocate device\n");
	365	goto err_reg;
	366	}
	367
	368	pht->caddr = pci_iomap(pdev, 0, 0);
	369	if (pht->caddr == NULL) {
	370	dev_err(&pdev->dev, "can't remap conf space\n");
	371	goto err_fr;
	372	}
	373	pht->iaddr = pci_iomap(pdev, 2, 0);
	374	if (pht->iaddr == NULL) {
	375	dev_err(&pdev->dev, "can't remap input space\n");
	376	goto err_unmc;
	377	}
	378	pht->oaddr = pci_iomap(pdev, 3, 0);
379	if (pht->oaddr == NULL) {
380	dev_err(&pdev->dev, "can't remap output space\n");
381	goto err_unmi;
382	}
383
384	mutex_init(&pht->open_lock);
bc552f77	385	spin_lock_init(&pht->regs_lock);
cef2cf07 JS	386	init_waitqueue_head(&pht->wait);
	387	cdev_init(&pht->cdev, &phantom_file_ops);
	388	pht->cdev.owner = THIS_MODULE;
	389
	390	iowrite32(0, pht->caddr + PHN_IRQCTL);
c8511f94	391	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07 JS	392	retval = request_irq(pdev->irq, phantom_isr,
	393	IRQF_SHARED \| IRQF_DISABLED, "phantom", pht);
	394	if (retval) {
	395	dev_err(&pdev->dev, "can't establish ISR\n");
	396	goto err_unmo;
	397	}
	398
	399	retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
	400	if (retval) {
	401	dev_err(&pdev->dev, "chardev registration failed\n");
	402	goto err_irq;
	403	}
	404
a9b12619 GKH	405	if (IS_ERR(device_create(phantom_class, &pdev->dev,
	406	MKDEV(phantom_major, minor), NULL,
	407	"phantom%u", minor)))
cef2cf07 JS	408	dev_err(&pdev->dev, "can't create device\n");
	409
	410	pci_set_drvdata(pdev, pht);
	411
	412	return 0;
	413	err_irq:
	414	free_irq(pdev->irq, pht);
	415	err_unmo:
	416	pci_iounmap(pdev, pht->oaddr);
	417	err_unmi:
	418	pci_iounmap(pdev, pht->iaddr);
	419	err_unmc:
	420	pci_iounmap(pdev, pht->caddr);
	421	err_fr:
	422	kfree(pht);
	423	err_reg:
	424	pci_release_regions(pdev);
	425	err_null:
	426	phantom_devices[minor] = 0;
	427	err_dis:
	428	pci_disable_device(pdev);
	429	err:
	430	return retval;
	431	}
	432
	433	static void __devexit phantom_remove(struct pci_dev *pdev)
	434	{
	435	struct phantom_device *pht = pci_get_drvdata(pdev);
	436	unsigned int minor = MINOR(pht->cdev.dev);
	437
	438	device_destroy(phantom_class, MKDEV(phantom_major, minor));
	439
	440	cdev_del(&pht->cdev);
	441
	442	iowrite32(0, pht->caddr + PHN_IRQCTL);
c8511f94	443	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07 JS	444	free_irq(pdev->irq, pht);
	445
	446	pci_iounmap(pdev, pht->oaddr);
	447	pci_iounmap(pdev, pht->iaddr);
	448	pci_iounmap(pdev, pht->caddr);
	449
	450	kfree(pht);
	451
	452	pci_release_regions(pdev);
	453
	454	phantom_devices[minor] = 0;
	455
	456	pci_disable_device(pdev);
	457	}
	458
	459	#ifdef CONFIG_PM
	460	static int phantom_suspend(struct pci_dev *pdev, pm_message_t state)
	461	{
	462	struct phantom_device *dev = pci_get_drvdata(pdev);
	463
	464	iowrite32(0, dev->caddr + PHN_IRQCTL);
c8511f94	465	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07	466
aee8447c JS	467	synchronize_irq(pdev->irq);
aee8447c JS	468
cef2cf07 JS	469	return 0;
	470	}
	471
	472	static int phantom_resume(struct pci_dev *pdev)
	473	{
	474	struct phantom_device *dev = pci_get_drvdata(pdev);
	475
	476	iowrite32(0, dev->caddr + PHN_IRQCTL);
	477
	478	return 0;
	479	}
	480	#else
	481	#define phantom_suspend NULL
	482	#define phantom_resume NULL
	483	#endif
	484
	485	static struct pci_device_id phantom_pci_tbl[] __devinitdata = {
82f56087 JS	486	{ .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
	487	.subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
	488	.class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
cef2cf07 JS	489	{ 0, }
	490	};
	491	MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);
	492
	493	static struct pci_driver phantom_pci_driver = {
	494	.name = "phantom",
	495	.id_table = phantom_pci_tbl,
	496	.probe = phantom_probe,
	497	.remove = __devexit_p(phantom_remove),
	498	.suspend = phantom_suspend,
	499	.resume = phantom_resume
	500	};
	501
0933e2d9	502	static CLASS_ATTR_STRING(version, 0444, PHANTOM_VERSION);
cef2cf07 JS	503
	504	static int __init phantom_init(void)
	505	{
	506	int retval;
	507	dev_t dev;
	508
	509	phantom_class = class_create(THIS_MODULE, "phantom");
	510	if (IS_ERR(phantom_class)) {
	511	retval = PTR_ERR(phantom_class);
	512	printk(KERN_ERR "phantom: can't register phantom class\n");
	513	goto err;
	514	}
0933e2d9	515	retval = class_create_file(phantom_class, &class_attr_version.attr);
cef2cf07 JS	516	if (retval) {
	517	printk(KERN_ERR "phantom: can't create sysfs version file\n");
	518	goto err_class;
	519	}
	520
	521	retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
	522	if (retval) {
	523	printk(KERN_ERR "phantom: can't register character device\n");
	524	goto err_attr;
	525	}
	526	phantom_major = MAJOR(dev);
	527
	528	retval = pci_register_driver(&phantom_pci_driver);
	529	if (retval) {
	530	printk(KERN_ERR "phantom: can't register pci driver\n");
	531	goto err_unchr;
	532	}
	533
	534	printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
	535	"init OK\n");
	536
	537	return 0;
	538	err_unchr:
	539	unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
	540	err_attr:
0933e2d9	541	class_remove_file(phantom_class, &class_attr_version.attr);
cef2cf07 JS	542	err_class:
	543	class_destroy(phantom_class);
	544	err:
	545	return retval;
	546	}
	547
	548	static void __exit phantom_exit(void)
	549	{
	550	pci_unregister_driver(&phantom_pci_driver);
	551
	552	unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);
	553
0933e2d9	554	class_remove_file(phantom_class, &class_attr_version.attr);
cef2cf07 JS	555	class_destroy(phantom_class);
	556
	557	pr_debug("phantom: module successfully removed\n");
	558	}
	559
	560	module_init(phantom_init);
	561	module_exit(phantom_exit);
	562
	563	MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
ec905a18	564	MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
cef2cf07 JS	565	MODULE_LICENSE("GPL");
cef2cf07 JS	566	MODULE_VERSION(PHANTOM_VERSION);