[net-next-2.6.git] / drivers / misc / phantom.c

/*
 *  Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  You need a userspace library to cooperate with this driver. It (and other
 *  info) may be obtained here:
 *  http://www.fi.muni.cz/~xslaby/phantom.html
 *  or alternatively, you might use OpenHaptics provided by Sensable.
 */

#include <linux/compat.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/pci.h>
#include <linux/fs.h>
#include <linux/poll.h>
#include <linux/interrupt.h>
#include <linux/cdev.h>
#include <linux/slab.h>
#include <linux/phantom.h>
#include <linux/sched.h>
#include <linux/mutex.h>

#include <asm/atomic.h>
#include <asm/io.h>

#define PHANTOM_VERSION		"n0.9.8"

#define PHANTOM_MAX_MINORS	8

#define PHN_IRQCTL		0x4c    /* irq control in caddr space */

#define PHB_RUNNING		1
#define PHB_NOT_OH		2

static DEFINE_MUTEX(phantom_mutex);
static struct class *phantom_class;
static int phantom_major;

struct phantom_device {
	unsigned int opened;
	void __iomem *caddr;
	u32 __iomem *iaddr;
	u32 __iomem *oaddr;
	unsigned long status;
	atomic_t counter;

	wait_queue_head_t wait;
	struct cdev cdev;

	struct mutex open_lock;
	spinlock_t regs_lock;

	/* used in NOT_OH mode */
	struct phm_regs oregs;
	u32 ctl_reg;
};

static unsigned char phantom_devices[PHANTOM_MAX_MINORS];

static int phantom_status(struct phantom_device *dev, unsigned long newstat)
{
	pr_debug("phantom_status %lx %lx\n", dev->status, newstat);

	if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
		atomic_set(&dev->counter, 0);
		iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
		iowrite32(0x43, dev->caddr + PHN_IRQCTL);
		ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
	} else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
		iowrite32(0, dev->caddr + PHN_IRQCTL);
		ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
	}

	dev->status = newstat;

	return 0;
}

/*
 * File ops
 */

static long phantom_ioctl(struct file *file, unsigned int cmd,
		unsigned long arg)
{
	struct phantom_device *dev = file->private_data;
	struct phm_regs rs;
	struct phm_reg r;
	void __user *argp = (void __user *)arg;
	unsigned long flags;
	unsigned int i;

	switch (cmd) {
	case PHN_SETREG:
	case PHN_SET_REG:
		if (copy_from_user(&r, argp, sizeof(r)))
			return -EFAULT;

		if (r.reg > 7)
			return -EINVAL;

		spin_lock_irqsave(&dev->regs_lock, flags);
		if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
				phantom_status(dev, dev->status | PHB_RUNNING)){
			spin_unlock_irqrestore(&dev->regs_lock, flags);
			return -ENODEV;
		}

		pr_debug("phantom: writing %x to %u\n", r.value, r.reg);

		/* preserve amp bit (don't allow to change it when in NOT_OH) */
		if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
			r.value &= ~PHN_CTL_AMP;
			r.value |= dev->ctl_reg & PHN_CTL_AMP;
			dev->ctl_reg = r.value;
		}

		iowrite32(r.value, dev->iaddr + r.reg);
		ioread32(dev->iaddr); /* PCI posting */

		if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
			phantom_status(dev, dev->status & ~PHB_RUNNING);
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	case PHN_SETREGS:
	case PHN_SET_REGS:
		if (copy_from_user(&rs, argp, sizeof(rs)))
			return -EFAULT;

		pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
		spin_lock_irqsave(&dev->regs_lock, flags);
		if (dev->status & PHB_NOT_OH)
			memcpy(&dev->oregs, &rs, sizeof(rs));
		else {
			u32 m = min(rs.count, 8U);
			for (i = 0; i < m; i++)
				if (rs.mask & BIT(i))
					iowrite32(rs.values[i], dev->oaddr + i);
			ioread32(dev->iaddr); /* PCI posting */
		}
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	case PHN_GETREG:
	case PHN_GET_REG:
		if (copy_from_user(&r, argp, sizeof(r)))
			return -EFAULT;

		if (r.reg > 7)
			return -EINVAL;

		r.value = ioread32(dev->iaddr + r.reg);

		if (copy_to_user(argp, &r, sizeof(r)))
			return -EFAULT;
		break;
	case PHN_GETREGS:
	case PHN_GET_REGS: {
		u32 m;

		if (copy_from_user(&rs, argp, sizeof(rs)))
			return -EFAULT;

		m = min(rs.count, 8U);

		pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
		spin_lock_irqsave(&dev->regs_lock, flags);
		for (i = 0; i < m; i++)
			if (rs.mask & BIT(i))
				rs.values[i] = ioread32(dev->iaddr + i);
		atomic_set(&dev->counter, 0);
		spin_unlock_irqrestore(&dev->regs_lock, flags);

		if (copy_to_user(argp, &rs, sizeof(rs)))
			return -EFAULT;
		break;
	} case PHN_NOT_OH:
		spin_lock_irqsave(&dev->regs_lock, flags);
		if (dev->status & PHB_RUNNING) {
			printk(KERN_ERR "phantom: you need to set NOT_OH "
					"before you start the device!\n");
			spin_unlock_irqrestore(&dev->regs_lock, flags);
			return -EINVAL;
		}
		dev->status |= PHB_NOT_OH;
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	default:
		return -ENOTTY;
	}

	return 0;
}

#ifdef CONFIG_COMPAT
static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
		unsigned long arg)
{
	if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
		cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
		cmd |= sizeof(void *) << _IOC_SIZESHIFT;
	}
	return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
}
#else
#define phantom_compat_ioctl NULL
#endif

static int phantom_open(struct inode *inode, struct file *file)
{
	struct phantom_device *dev = container_of(inode->i_cdev,
			struct phantom_device, cdev);

	mutex_lock(&phantom_mutex);
	nonseekable_open(inode, file);

	if (mutex_lock_interruptible(&dev->open_lock)) {
		mutex_unlock(&phantom_mutex);
		return -ERESTARTSYS;
	}

	if (dev->opened) {
		mutex_unlock(&dev->open_lock);
		mutex_unlock(&phantom_mutex);
		return -EINVAL;
	}

	WARN_ON(dev->status & PHB_NOT_OH);

	file->private_data = dev;

	atomic_set(&dev->counter, 0);
	dev->opened++;
	mutex_unlock(&dev->open_lock);
	mutex_unlock(&phantom_mutex);
	return 0;
}

static int phantom_release(struct inode *inode, struct file *file)
{
	struct phantom_device *dev = file->private_data;

	mutex_lock(&dev->open_lock);

	dev->opened = 0;
	phantom_status(dev, dev->status & ~PHB_RUNNING);
	dev->status &= ~PHB_NOT_OH;

	mutex_unlock(&dev->open_lock);

	return 0;
}

static unsigned int phantom_poll(struct file *file, poll_table *wait)
{
	struct phantom_device *dev = file->private_data;
	unsigned int mask = 0;

	pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
	poll_wait(file, &dev->wait, wait);

	if (!(dev->status & PHB_RUNNING))
		mask = POLLERR;
	else if (atomic_read(&dev->counter))
		mask = POLLIN | POLLRDNORM;

	pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));

	return mask;
}

static const struct file_operations phantom_file_ops = {
	.open = phantom_open,
	.release = phantom_release,
	.unlocked_ioctl = phantom_ioctl,
	.compat_ioctl = phantom_compat_ioctl,
	.poll = phantom_poll,
	.llseek = no_llseek,
};

static irqreturn_t phantom_isr(int irq, void *data)
{
	struct phantom_device *dev = data;
	unsigned int i;
	u32 ctl;

	spin_lock(&dev->regs_lock);
	ctl = ioread32(dev->iaddr + PHN_CONTROL);
	if (!(ctl & PHN_CTL_IRQ)) {
		spin_unlock(&dev->regs_lock);
		return IRQ_NONE;
	}

	iowrite32(0, dev->iaddr);
	iowrite32(0xc0, dev->iaddr);

	if (dev->status & PHB_NOT_OH) {
		struct phm_regs *r = &dev->oregs;
		u32 m = min(r->count, 8U);

		for (i = 0; i < m; i++)
			if (r->mask & BIT(i))
				iowrite32(r->values[i], dev->oaddr + i);

		dev->ctl_reg ^= PHN_CTL_AMP;
		iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
	}
	spin_unlock(&dev->regs_lock);

	ioread32(dev->iaddr); /* PCI posting */

	atomic_inc(&dev->counter);
	wake_up_interruptible(&dev->wait);

	return IRQ_HANDLED;
}

/*
 * Init and deinit driver
 */

static unsigned int __devinit phantom_get_free(void)
{
	unsigned int i;

	for (i = 0; i < PHANTOM_MAX_MINORS; i++)
		if (phantom_devices[i] == 0)
			break;

	return i;
}

static int __devinit phantom_probe(struct pci_dev *pdev,
	const struct pci_device_id *pci_id)
{
	struct phantom_device *pht;
	unsigned int minor;
	int retval;

	retval = pci_enable_device(pdev);
	if (retval) {
		dev_err(&pdev->dev, "pci_enable_device failed!\n");
		goto err;
	}

	minor = phantom_get_free();
	if (minor == PHANTOM_MAX_MINORS) {
		dev_err(&pdev->dev, "too many devices found!\n");
		retval = -EIO;
		goto err_dis;
	}

	phantom_devices[minor] = 1;

	retval = pci_request_regions(pdev, "phantom");
	if (retval) {
		dev_err(&pdev->dev, "pci_request_regions failed!\n");
		goto err_null;
	}

	retval = -ENOMEM;
	pht = kzalloc(sizeof(*pht), GFP_KERNEL);
	if (pht == NULL) {
		dev_err(&pdev->dev, "unable to allocate device\n");
		goto err_reg;
	}

	pht->caddr = pci_iomap(pdev, 0, 0);
	if (pht->caddr == NULL) {
		dev_err(&pdev->dev, "can't remap conf space\n");
		goto err_fr;
	}
	pht->iaddr = pci_iomap(pdev, 2, 0);
	if (pht->iaddr == NULL) {
		dev_err(&pdev->dev, "can't remap input space\n");
		goto err_unmc;
	}
	pht->oaddr = pci_iomap(pdev, 3, 0);
	if (pht->oaddr == NULL) {
		dev_err(&pdev->dev, "can't remap output space\n");
		goto err_unmi;
	}

	mutex_init(&pht->open_lock);
	spin_lock_init(&pht->regs_lock);
	init_waitqueue_head(&pht->wait);
	cdev_init(&pht->cdev, &phantom_file_ops);
	pht->cdev.owner = THIS_MODULE;

	iowrite32(0, pht->caddr + PHN_IRQCTL);
	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
	retval = request_irq(pdev->irq, phantom_isr,
			IRQF_SHARED | IRQF_DISABLED, "phantom", pht);
	if (retval) {
		dev_err(&pdev->dev, "can't establish ISR\n");
		goto err_unmo;
	}

	retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
	if (retval) {
		dev_err(&pdev->dev, "chardev registration failed\n");
		goto err_irq;
	}

	if (IS_ERR(device_create(phantom_class, &pdev->dev,
				 MKDEV(phantom_major, minor), NULL,
				 "phantom%u", minor)))
		dev_err(&pdev->dev, "can't create device\n");

	pci_set_drvdata(pdev, pht);

	return 0;
err_irq:
	free_irq(pdev->irq, pht);
err_unmo:
	pci_iounmap(pdev, pht->oaddr);
err_unmi:
	pci_iounmap(pdev, pht->iaddr);
err_unmc:
	pci_iounmap(pdev, pht->caddr);
err_fr:
	kfree(pht);
err_reg:
	pci_release_regions(pdev);
err_null:
	phantom_devices[minor] = 0;
err_dis:
	pci_disable_device(pdev);
err:
	return retval;
}

static void __devexit phantom_remove(struct pci_dev *pdev)
{
	struct phantom_device *pht = pci_get_drvdata(pdev);
	unsigned int minor = MINOR(pht->cdev.dev);

	device_destroy(phantom_class, MKDEV(phantom_major, minor));

	cdev_del(&pht->cdev);

	iowrite32(0, pht->caddr + PHN_IRQCTL);
	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
	free_irq(pdev->irq, pht);

	pci_iounmap(pdev, pht->oaddr);
	pci_iounmap(pdev, pht->iaddr);
	pci_iounmap(pdev, pht->caddr);

	kfree(pht);

	pci_release_regions(pdev);

	phantom_devices[minor] = 0;

	pci_disable_device(pdev);
}

#ifdef CONFIG_PM
static int phantom_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct phantom_device *dev = pci_get_drvdata(pdev);

	iowrite32(0, dev->caddr + PHN_IRQCTL);
	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */

	synchronize_irq(pdev->irq);

	return 0;
}

static int phantom_resume(struct pci_dev *pdev)
{
	struct phantom_device *dev = pci_get_drvdata(pdev);

	iowrite32(0, dev->caddr + PHN_IRQCTL);

	return 0;
}
#else
#define phantom_suspend	NULL
#define phantom_resume	NULL
#endif

static struct pci_device_id phantom_pci_tbl[] __devinitdata = {
	{ .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
	  .subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
	  .class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);

static struct pci_driver phantom_pci_driver = {
	.name = "phantom",
	.id_table = phantom_pci_tbl,
	.probe = phantom_probe,
	.remove = __devexit_p(phantom_remove),
	.suspend = phantom_suspend,
	.resume = phantom_resume
};

static CLASS_ATTR_STRING(version, 0444, PHANTOM_VERSION);

static int __init phantom_init(void)
{
	int retval;
	dev_t dev;

	phantom_class = class_create(THIS_MODULE, "phantom");
	if (IS_ERR(phantom_class)) {
		retval = PTR_ERR(phantom_class);
		printk(KERN_ERR "phantom: can't register phantom class\n");
		goto err;
	}
	retval = class_create_file(phantom_class, &class_attr_version.attr);
	if (retval) {
		printk(KERN_ERR "phantom: can't create sysfs version file\n");
		goto err_class;
	}

	retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
	if (retval) {
		printk(KERN_ERR "phantom: can't register character device\n");
		goto err_attr;
	}
	phantom_major = MAJOR(dev);

	retval = pci_register_driver(&phantom_pci_driver);
	if (retval) {
		printk(KERN_ERR "phantom: can't register pci driver\n");
		goto err_unchr;
	}

	printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
			"init OK\n");

	return 0;
err_unchr:
	unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
err_attr:
	class_remove_file(phantom_class, &class_attr_version.attr);
err_class:
	class_destroy(phantom_class);
err:
	return retval;
}

static void __exit phantom_exit(void)
{
	pci_unregister_driver(&phantom_pci_driver);

	unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);

	class_remove_file(phantom_class, &class_attr_version.attr);
	class_destroy(phantom_class);

	pr_debug("phantom: module successfully removed\n");
}

module_init(phantom_init);
module_exit(phantom_exit);

MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
MODULE_LICENSE("GPL");
MODULE_VERSION(PHANTOM_VERSION);
Commit	Line	Data
cef2cf07 JS	1	/*
	2	* Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
0211a9c8	9	* You need a userspace library to cooperate with this driver. It (and other
cef2cf07 JS	10	* info) may be obtained here:
cef2cf07 JS	11	* http://www.fi.muni.cz/~xslaby/phantom.html
b2afe331	12	* or alternatively, you might use OpenHaptics provided by Sensable.
cef2cf07 JS	13	*/
cef2cf07 JS	14
7e4e8e68	15	#include <linux/compat.h>
cef2cf07 JS	16	#include <linux/kernel.h>
	17	#include <linux/module.h>
	18	#include <linux/device.h>
	19	#include <linux/pci.h>
	20	#include <linux/fs.h>
	21	#include <linux/poll.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/cdev.h>
5a0e3ad6	24	#include <linux/slab.h>
cef2cf07	25	#include <linux/phantom.h>
d43c36dc	26	#include <linux/sched.h>
613655fa	27	#include <linux/mutex.h>
cef2cf07 JS	28
	29	#include <asm/atomic.h>
	30	#include <asm/io.h>
	31
82f56087	32	#define PHANTOM_VERSION "n0.9.8"
cef2cf07 JS	33
	34	#define PHANTOM_MAX_MINORS 8
	35
	36	#define PHN_IRQCTL 0x4c /* irq control in caddr space */
	37
	38	#define PHB_RUNNING 1
bc552f77	39	#define PHB_NOT_OH 2
cef2cf07	40
613655fa	41	static DEFINE_MUTEX(phantom_mutex);
cef2cf07 JS	42	static struct class *phantom_class;
	43	static int phantom_major;
	44
	45	struct phantom_device {
	46	unsigned int opened;
	47	void __iomem *caddr;
	48	u32 __iomem *iaddr;
	49	u32 __iomem *oaddr;
	50	unsigned long status;
	51	atomic_t counter;
	52
	53	wait_queue_head_t wait;
	54	struct cdev cdev;
	55
	56	struct mutex open_lock;
bc552f77 JS	57	spinlock_t regs_lock;
	58
	59	/* used in NOT_OH mode */
	60	struct phm_regs oregs;
	61	u32 ctl_reg;
cef2cf07 JS	62	};
	63
	64	static unsigned char phantom_devices[PHANTOM_MAX_MINORS];
	65
	66	static int phantom_status(struct phantom_device *dev, unsigned long newstat)
	67	{
	68	pr_debug("phantom_status %lx %lx\n", dev->status, newstat);
	69
	70	if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
	71	atomic_set(&dev->counter, 0);
	72	iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
	73	iowrite32(0x43, dev->caddr + PHN_IRQCTL);
c8511f94 JS	74	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
c8511f94 JS	75	} else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
cef2cf07	76	iowrite32(0, dev->caddr + PHN_IRQCTL);
c8511f94 JS	77	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
c8511f94 JS	78	}
cef2cf07 JS	79
	80	dev->status = newstat;
	81
	82	return 0;
	83	}
	84
	85	/*
	86	* File ops
	87	*/
	88
c15395c0 JS	89	static long phantom_ioctl(struct file *file, unsigned int cmd,
c15395c0 JS	90	unsigned long arg)
cef2cf07 JS	91	{
	92	struct phantom_device *dev = file->private_data;
	93	struct phm_regs rs;
	94	struct phm_reg r;
	95	void __user argp = (void __user )arg;
bc552f77	96	unsigned long flags;
cef2cf07 JS	97	unsigned int i;
cef2cf07 JS	98
cef2cf07	99	switch (cmd) {
7e4e8e68	100	case PHN_SETREG:
cef2cf07 JS	101	case PHN_SET_REG:
	102	if (copy_from_user(&r, argp, sizeof(r)))
	103	return -EFAULT;
	104
	105	if (r.reg > 7)
	106	return -EINVAL;
	107
bc552f77	108	spin_lock_irqsave(&dev->regs_lock, flags);
cef2cf07	109	if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
c15395c0	110	phantom_status(dev, dev->status \| PHB_RUNNING)){
bc552f77	111	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	112	return -ENODEV;
c15395c0	113	}
cef2cf07 JS	114
cef2cf07 JS	115	pr_debug("phantom: writing %x to %u\n", r.value, r.reg);
bc552f77 JS	116
	117	/* preserve amp bit (don't allow to change it when in NOT_OH) */
	118	if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
	119	r.value &= ~PHN_CTL_AMP;
	120	r.value \|= dev->ctl_reg & PHN_CTL_AMP;
	121	dev->ctl_reg = r.value;
	122	}
	123
cef2cf07	124	iowrite32(r.value, dev->iaddr + r.reg);
c8511f94	125	ioread32(dev->iaddr); /* PCI posting */
cef2cf07 JS	126
	127	if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
	128	phantom_status(dev, dev->status & ~PHB_RUNNING);
bc552f77	129	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	130	break;
7e4e8e68	131	case PHN_SETREGS:
cef2cf07 JS	132	case PHN_SET_REGS:
	133	if (copy_from_user(&rs, argp, sizeof(rs)))
	134	return -EFAULT;
	135
	136	pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
bc552f77 JS	137	spin_lock_irqsave(&dev->regs_lock, flags);
	138	if (dev->status & PHB_NOT_OH)
	139	memcpy(&dev->oregs, &rs, sizeof(rs));
	140	else {
	141	u32 m = min(rs.count, 8U);
	142	for (i = 0; i < m; i++)
	143	if (rs.mask & BIT(i))
	144	iowrite32(rs.values[i], dev->oaddr + i);
	145	ioread32(dev->iaddr); /* PCI posting */
	146	}
	147	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	148	break;
7e4e8e68	149	case PHN_GETREG:
cef2cf07 JS	150	case PHN_GET_REG:
	151	if (copy_from_user(&r, argp, sizeof(r)))
	152	return -EFAULT;
	153
	154	if (r.reg > 7)
	155	return -EINVAL;
	156
	157	r.value = ioread32(dev->iaddr + r.reg);
	158
	159	if (copy_to_user(argp, &r, sizeof(r)))
	160	return -EFAULT;
	161	break;
7e4e8e68	162	case PHN_GETREGS:
bc552f77 JS	163	case PHN_GET_REGS: {
	164	u32 m;
	165
cef2cf07 JS	166	if (copy_from_user(&rs, argp, sizeof(rs)))
	167	return -EFAULT;
	168
bc552f77 JS	169	m = min(rs.count, 8U);
bc552f77 JS	170
cef2cf07	171	pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
bc552f77 JS	172	spin_lock_irqsave(&dev->regs_lock, flags);
	173	for (i = 0; i < m; i++)
	174	if (rs.mask & BIT(i))
cef2cf07	175	rs.values[i] = ioread32(dev->iaddr + i);
7d4f9f09	176	atomic_set(&dev->counter, 0);
bc552f77	177	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07 JS	178
	179	if (copy_to_user(argp, &rs, sizeof(rs)))
	180	return -EFAULT;
	181	break;
bc552f77 JS	182	} case PHN_NOT_OH:
	183	spin_lock_irqsave(&dev->regs_lock, flags);
	184	if (dev->status & PHB_RUNNING) {
	185	printk(KERN_ERR "phantom: you need to set NOT_OH "
	186	"before you start the device!\n");
	187	spin_unlock_irqrestore(&dev->regs_lock, flags);
	188	return -EINVAL;
	189	}
	190	dev->status \|= PHB_NOT_OH;
	191	spin_unlock_irqrestore(&dev->regs_lock, flags);
	192	break;
cef2cf07 JS	193	default:
	194	return -ENOTTY;
	195	}
	196
	197	return 0;
	198	}
	199
7e4e8e68 JS	200	#ifdef CONFIG_COMPAT
	201	static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
	202	unsigned long arg)
	203	{
	204	if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
	205	cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
	206	cmd \|= sizeof(void *) << _IOC_SIZESHIFT;
	207	}
	208	return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
	209	}
	210	#else
	211	#define phantom_compat_ioctl NULL
	212	#endif
	213
cef2cf07 JS	214	static int phantom_open(struct inode inode, struct file file)
	215	{
	216	struct phantom_device *dev = container_of(inode->i_cdev,
	217	struct phantom_device, cdev);
	218
613655fa	219	mutex_lock(&phantom_mutex);
cef2cf07 JS	220	nonseekable_open(inode, file);
cef2cf07 JS	221
4541b5ec	222	if (mutex_lock_interruptible(&dev->open_lock)) {
613655fa	223	mutex_unlock(&phantom_mutex);
cef2cf07	224	return -ERESTARTSYS;
4541b5ec	225	}
cef2cf07 JS	226
	227	if (dev->opened) {
	228	mutex_unlock(&dev->open_lock);
613655fa	229	mutex_unlock(&phantom_mutex);
cef2cf07 JS	230	return -EINVAL;
	231	}
	232
bc552f77 JS	233	WARN_ON(dev->status & PHB_NOT_OH);
bc552f77 JS	234
cef2cf07 JS	235	file->private_data = dev;
cef2cf07 JS	236
bc552f77	237	atomic_set(&dev->counter, 0);
cef2cf07 JS	238	dev->opened++;
cef2cf07 JS	239	mutex_unlock(&dev->open_lock);
613655fa	240	mutex_unlock(&phantom_mutex);
cef2cf07 JS	241	return 0;
	242	}
	243
	244	static int phantom_release(struct inode inode, struct file file)
	245	{
	246	struct phantom_device *dev = file->private_data;
	247
	248	mutex_lock(&dev->open_lock);
	249
	250	dev->opened = 0;
	251	phantom_status(dev, dev->status & ~PHB_RUNNING);
bc552f77	252	dev->status &= ~PHB_NOT_OH;
cef2cf07 JS	253
	254	mutex_unlock(&dev->open_lock);
	255
	256	return 0;
	257	}
	258
	259	static unsigned int phantom_poll(struct file file, poll_table wait)
	260	{
	261	struct phantom_device *dev = file->private_data;
	262	unsigned int mask = 0;
	263
	264	pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
	265	poll_wait(file, &dev->wait, wait);
7d4f9f09 JS	266
	267	if (!(dev->status & PHB_RUNNING))
	268	mask = POLLERR;
	269	else if (atomic_read(&dev->counter))
cef2cf07	270	mask = POLLIN \| POLLRDNORM;
7d4f9f09	271
cef2cf07 JS	272	pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));
	273
	274	return mask;
	275	}
	276
828c0950	277	static const struct file_operations phantom_file_ops = {
cef2cf07 JS	278	.open = phantom_open,
cef2cf07 JS	279	.release = phantom_release,
c15395c0	280	.unlocked_ioctl = phantom_ioctl,
7e4e8e68	281	.compat_ioctl = phantom_compat_ioctl,
cef2cf07	282	.poll = phantom_poll,
6038f373	283	.llseek = no_llseek,
cef2cf07 JS	284	};
	285
	286	static irqreturn_t phantom_isr(int irq, void *data)
	287	{
	288	struct phantom_device *dev = data;
bc552f77 JS	289	unsigned int i;
bc552f77 JS	290	u32 ctl;
cef2cf07	291
bc552f77 JS	292	spin_lock(&dev->regs_lock);
	293	ctl = ioread32(dev->iaddr + PHN_CONTROL);
	294	if (!(ctl & PHN_CTL_IRQ)) {
	295	spin_unlock(&dev->regs_lock);
cef2cf07	296	return IRQ_NONE;
bc552f77	297	}
cef2cf07 JS	298
	299	iowrite32(0, dev->iaddr);
	300	iowrite32(0xc0, dev->iaddr);
bc552f77 JS	301
	302	if (dev->status & PHB_NOT_OH) {
	303	struct phm_regs *r = &dev->oregs;
	304	u32 m = min(r->count, 8U);
	305
	306	for (i = 0; i < m; i++)
	307	if (r->mask & BIT(i))
	308	iowrite32(r->values[i], dev->oaddr + i);
	309
	310	dev->ctl_reg ^= PHN_CTL_AMP;
	311	iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
	312	}
	313	spin_unlock(&dev->regs_lock);
	314
c8511f94	315	ioread32(dev->iaddr); /* PCI posting */
cef2cf07 JS	316
	317	atomic_inc(&dev->counter);
	318	wake_up_interruptible(&dev->wait);
	319
	320	return IRQ_HANDLED;
	321	}
	322
	323	/*
	324	* Init and deinit driver
	325	*/
	326
	327	static unsigned int __devinit phantom_get_free(void)
	328	{
	329	unsigned int i;
	330
	331	for (i = 0; i < PHANTOM_MAX_MINORS; i++)
	332	if (phantom_devices[i] == 0)
	333	break;
	334
	335	return i;
	336	}
	337
	338	static int __devinit phantom_probe(struct pci_dev *pdev,
	339	const struct pci_device_id *pci_id)
	340	{
	341	struct phantom_device *pht;
	342	unsigned int minor;
	343	int retval;
	344
	345	retval = pci_enable_device(pdev);
10ad5278 RR	346	if (retval) {
10ad5278 RR	347	dev_err(&pdev->dev, "pci_enable_device failed!\n");
cef2cf07	348	goto err;
10ad5278	349	}
cef2cf07 JS	350
	351	minor = phantom_get_free();
	352	if (minor == PHANTOM_MAX_MINORS) {
	353	dev_err(&pdev->dev, "too many devices found!\n");
	354	retval = -EIO;
	355	goto err_dis;
	356	}
	357
	358	phantom_devices[minor] = 1;
	359
	360	retval = pci_request_regions(pdev, "phantom");
10ad5278 RR	361	if (retval) {
10ad5278 RR	362	dev_err(&pdev->dev, "pci_request_regions failed!\n");
cef2cf07	363	goto err_null;
10ad5278	364	}
cef2cf07 JS	365
	366	retval = -ENOMEM;
	367	pht = kzalloc(sizeof(*pht), GFP_KERNEL);
	368	if (pht == NULL) {
	369	dev_err(&pdev->dev, "unable to allocate device\n");
	370	goto err_reg;
	371	}
	372
	373	pht->caddr = pci_iomap(pdev, 0, 0);
	374	if (pht->caddr == NULL) {
	375	dev_err(&pdev->dev, "can't remap conf space\n");
	376	goto err_fr;
	377	}
	378	pht->iaddr = pci_iomap(pdev, 2, 0);
	379	if (pht->iaddr == NULL) {
	380	dev_err(&pdev->dev, "can't remap input space\n");
	381	goto err_unmc;
	382	}
	383	pht->oaddr = pci_iomap(pdev, 3, 0);
	384	if (pht->oaddr == NULL) {
	385	dev_err(&pdev->dev, "can't remap output space\n");
	386	goto err_unmi;
	387	}
	388
	389	mutex_init(&pht->open_lock);
bc552f77	390	spin_lock_init(&pht->regs_lock);
cef2cf07 JS	391	init_waitqueue_head(&pht->wait);
	392	cdev_init(&pht->cdev, &phantom_file_ops);
	393	pht->cdev.owner = THIS_MODULE;
	394
	395	iowrite32(0, pht->caddr + PHN_IRQCTL);
c8511f94	396	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07 JS	397	retval = request_irq(pdev->irq, phantom_isr,
	398	IRQF_SHARED \| IRQF_DISABLED, "phantom", pht);
	399	if (retval) {
	400	dev_err(&pdev->dev, "can't establish ISR\n");
	401	goto err_unmo;
	402	}
	403
	404	retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
	405	if (retval) {
	406	dev_err(&pdev->dev, "chardev registration failed\n");
	407	goto err_irq;
	408	}
	409
a9b12619 GKH	410	if (IS_ERR(device_create(phantom_class, &pdev->dev,
	411	MKDEV(phantom_major, minor), NULL,
	412	"phantom%u", minor)))
cef2cf07 JS	413	dev_err(&pdev->dev, "can't create device\n");
	414
	415	pci_set_drvdata(pdev, pht);
	416
	417	return 0;
	418	err_irq:
	419	free_irq(pdev->irq, pht);
	420	err_unmo:
	421	pci_iounmap(pdev, pht->oaddr);
	422	err_unmi:
	423	pci_iounmap(pdev, pht->iaddr);
	424	err_unmc:
	425	pci_iounmap(pdev, pht->caddr);
	426	err_fr:
	427	kfree(pht);
	428	err_reg:
	429	pci_release_regions(pdev);
	430	err_null:
	431	phantom_devices[minor] = 0;
	432	err_dis:
	433	pci_disable_device(pdev);
	434	err:
	435	return retval;
	436	}
	437
	438	static void __devexit phantom_remove(struct pci_dev *pdev)
	439	{
	440	struct phantom_device *pht = pci_get_drvdata(pdev);
	441	unsigned int minor = MINOR(pht->cdev.dev);
	442
	443	device_destroy(phantom_class, MKDEV(phantom_major, minor));
	444
	445	cdev_del(&pht->cdev);
	446
	447	iowrite32(0, pht->caddr + PHN_IRQCTL);
c8511f94	448	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07 JS	449	free_irq(pdev->irq, pht);
	450
	451	pci_iounmap(pdev, pht->oaddr);
	452	pci_iounmap(pdev, pht->iaddr);
	453	pci_iounmap(pdev, pht->caddr);
	454
	455	kfree(pht);
	456
	457	pci_release_regions(pdev);
	458
	459	phantom_devices[minor] = 0;
	460
	461	pci_disable_device(pdev);
	462	}
	463
	464	#ifdef CONFIG_PM
	465	static int phantom_suspend(struct pci_dev *pdev, pm_message_t state)
	466	{
	467	struct phantom_device *dev = pci_get_drvdata(pdev);
	468
	469	iowrite32(0, dev->caddr + PHN_IRQCTL);
c8511f94	470	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07	471
aee8447c JS	472	synchronize_irq(pdev->irq);
aee8447c JS	473
cef2cf07 JS	474	return 0;
	475	}
	476
	477	static int phantom_resume(struct pci_dev *pdev)
	478	{
	479	struct phantom_device *dev = pci_get_drvdata(pdev);
	480
	481	iowrite32(0, dev->caddr + PHN_IRQCTL);
	482
	483	return 0;
	484	}
	485	#else
	486	#define phantom_suspend NULL
	487	#define phantom_resume NULL
	488	#endif
	489
	490	static struct pci_device_id phantom_pci_tbl[] __devinitdata = {
82f56087 JS	491	{ .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
	492	.subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
	493	.class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
cef2cf07 JS	494	{ 0, }
	495	};
	496	MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);
	497
	498	static struct pci_driver phantom_pci_driver = {
	499	.name = "phantom",
	500	.id_table = phantom_pci_tbl,
	501	.probe = phantom_probe,
	502	.remove = __devexit_p(phantom_remove),
	503	.suspend = phantom_suspend,
	504	.resume = phantom_resume
	505	};
	506
0933e2d9	507	static CLASS_ATTR_STRING(version, 0444, PHANTOM_VERSION);
cef2cf07 JS	508
	509	static int __init phantom_init(void)
	510	{
	511	int retval;
	512	dev_t dev;
	513
	514	phantom_class = class_create(THIS_MODULE, "phantom");
	515	if (IS_ERR(phantom_class)) {
	516	retval = PTR_ERR(phantom_class);
	517	printk(KERN_ERR "phantom: can't register phantom class\n");
	518	goto err;
	519	}
0933e2d9	520	retval = class_create_file(phantom_class, &class_attr_version.attr);
cef2cf07 JS	521	if (retval) {
	522	printk(KERN_ERR "phantom: can't create sysfs version file\n");
	523	goto err_class;
	524	}
	525
	526	retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
	527	if (retval) {
	528	printk(KERN_ERR "phantom: can't register character device\n");
	529	goto err_attr;
	530	}
	531	phantom_major = MAJOR(dev);
	532
	533	retval = pci_register_driver(&phantom_pci_driver);
	534	if (retval) {
	535	printk(KERN_ERR "phantom: can't register pci driver\n");
	536	goto err_unchr;
	537	}
	538
	539	printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
	540	"init OK\n");
	541
	542	return 0;
	543	err_unchr:
	544	unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
	545	err_attr:
0933e2d9	546	class_remove_file(phantom_class, &class_attr_version.attr);
cef2cf07 JS	547	err_class:
	548	class_destroy(phantom_class);
	549	err:
	550	return retval;
	551	}
	552
	553	static void __exit phantom_exit(void)
	554	{
	555	pci_unregister_driver(&phantom_pci_driver);
	556
	557	unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);
	558
0933e2d9	559	class_remove_file(phantom_class, &class_attr_version.attr);
cef2cf07 JS	560	class_destroy(phantom_class);
	561
	562	pr_debug("phantom: module successfully removed\n");
	563	}
	564
	565	module_init(phantom_init);
	566	module_exit(phantom_exit);
	567
	568	MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
ec905a18	569	MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
cef2cf07 JS	570	MODULE_LICENSE("GPL");
cef2cf07 JS	571	MODULE_VERSION(PHANTOM_VERSION);