[net-next-2.6.git] / drivers / misc / ioc4.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2005-2006 Silicon Graphics, Inc.  All Rights Reserved.
 */

/* This file contains the master driver module for use by SGI IOC4 subdrivers.
 *
 * It allocates any resources shared between multiple subdevices, and
 * provides accessor functions (where needed) and the like for those
 * resources.  It also provides a mechanism for the subdevice modules
 * to support loading and unloading.
 *
 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
 * alias, serial port and UART registers) are handled by the subdevice
 * modules themselves.
 *
 * This is all necessary because IOC4 is not implemented as a multi-function
 * PCI device, but an amalgamation of disparate registers for several
 * types of device (ATA, serial, external interrupts).  The normal
 * resource management in the kernel doesn't have quite the right interfaces
 * to handle this situation (e.g. multiple modules can't claim the same
 * PCI ID), thus this IOC4 master module.
 */

#include <linux/errno.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ioc4.h>
#include <linux/ktime.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/time.h>
#include <asm/io.h>

/***************
 * Definitions *
 ***************/

/* Tweakable values */

/* PCI bus speed detection/calibration */
#define IOC4_CALIBRATE_COUNT 63		/* Calibration cycle period */
#define IOC4_CALIBRATE_CYCLES 256	/* Average over this many cycles */
#define IOC4_CALIBRATE_DISCARD 2	/* Discard first few cycles */
#define IOC4_CALIBRATE_LOW_MHZ 25	/* Lower bound on bus speed sanity */
#define IOC4_CALIBRATE_HIGH_MHZ 75	/* Upper bound on bus speed sanity */
#define IOC4_CALIBRATE_DEFAULT_MHZ 66	/* Assumed if sanity check fails */

/************************
 * Submodule management *
 ************************/

static DEFINE_MUTEX(ioc4_mutex);

static LIST_HEAD(ioc4_devices);
static LIST_HEAD(ioc4_submodules);

/* Register an IOC4 submodule */
int
ioc4_register_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;

	mutex_lock(&ioc4_mutex);
	list_add(&is->is_list, &ioc4_submodules);

	/* Initialize submodule for each IOC4 */
	if (!is->is_probe)
		goto out;

	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s probe failed "
			       "for pci_dev %s",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
	return 0;
}

/* Unregister an IOC4 submodule */
void
ioc4_unregister_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;

	mutex_lock(&ioc4_mutex);
	list_del(&is->is_list);

	/* Remove submodule for each IOC4 */
	if (!is->is_remove)
		goto out;

	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s remove failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
}

/*********************
 * Device management *
 *********************/

#define IOC4_CALIBRATE_LOW_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
#define IOC4_CALIBRATE_HIGH_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
#define IOC4_CALIBRATE_DEFAULT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)

#define IOC4_CALIBRATE_END \
	(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)

#define IOC4_INT_OUT_MODE_TOGGLE 0x7	/* Toggle INT_OUT every COUNT+1 ticks */

/* Determines external interrupt output clock period of the PCI bus an
 * IOC4 is attached to.  This value can be used to determine the PCI
 * bus speed.
 *
 * IOC4 has a design feature that various internal timers are derived from
 * the PCI bus clock.  This causes IOC4 device drivers to need to take the
 * bus speed into account when setting various register values (e.g. INT_OUT
 * register COUNT field, UART divisors, etc).  Since this information is
 * needed by several subdrivers, it is determined by the main IOC4 driver,
 * even though the following code utilizes external interrupt registers
 * to perform the speed calculation.
 */
static void __devinit
ioc4_clock_calibrate(struct ioc4_driver_data *idd)
{
	union ioc4_int_out int_out;
	union ioc4_gpcr gpcr;
	unsigned int state, last_state = 1;
	struct timespec start_ts, end_ts;
	uint64_t start, end, period;
	unsigned int count = 0;

	/* Enable output */
	gpcr.raw = 0;
	gpcr.fields.dir = IOC4_GPCR_DIR_0;
	gpcr.fields.int_out_en = 1;
	writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);

	/* Reset to power-on state */
	writel(0, &idd->idd_misc_regs->int_out.raw);
	mmiowb();

	/* Set up square wave */
	int_out.raw = 0;
	int_out.fields.count = IOC4_CALIBRATE_COUNT;
	int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
	int_out.fields.diag = 0;
	writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
	mmiowb();

	/* Check square wave period averaged over some number of cycles */
	do {
		int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
		state = int_out.fields.int_out;
		if (!last_state && state) {
			count++;
			if (count == IOC4_CALIBRATE_END) {
				ktime_get_ts(&end_ts);
				break;
			} else if (count == IOC4_CALIBRATE_DISCARD)
				ktime_get_ts(&start_ts);
		}
		last_state = state;
	} while (1);

	/* Calculation rearranged to preserve intermediate precision.
	 * Logically:
	 * 1. "end - start" gives us the measurement period over all
	 *    the square wave cycles.
	 * 2. Divide by number of square wave cycles to get the period
	 *    of a square wave cycle.
	 * 3. Divide by 2*(int_out.fields.count+1), which is the formula
	 *    by which the IOC4 generates the square wave, to get the
	 *    period of an IOC4 INT_OUT count.
	 */
	end = end_ts.tv_sec * NSEC_PER_SEC + end_ts.tv_nsec;
	start = start_ts.tv_sec * NSEC_PER_SEC + start_ts.tv_nsec;
	period = (end - start) /
		(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));

	/* Bounds check the result. */
	if (period > IOC4_CALIBRATE_LOW_LIMIT ||
	    period < IOC4_CALIBRATE_HIGH_LIMIT) {
		printk(KERN_INFO
		       "IOC4 %s: Clock calibration failed.  Assuming"
		       "PCI clock is %d ns.\n",
		       pci_name(idd->idd_pdev),
		       IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
		period = IOC4_CALIBRATE_DEFAULT;
	} else {
		u64 ns = period;

		do_div(ns, IOC4_EXTINT_COUNT_DIVISOR);
		printk(KERN_DEBUG
		       "IOC4 %s: PCI clock is %llu ns.\n",
		       pci_name(idd->idd_pdev), (unsigned long long)ns);
	}

	/* Remember results.  We store the extint clock period rather
	 * than the PCI clock period so that greater precision is
	 * retained.  Divide by IOC4_EXTINT_COUNT_DIVISOR to get
	 * PCI clock period.
	 */
	idd->count_period = period;
}

/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
 * Each brings out different combinations of IOC4 signals, thus.
 * the IOC4 subdrivers need to know to which we're attached.
 *
 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
 * If neither is present, it's a PCI-RT.
 */
static unsigned int __devinit
ioc4_variant(struct ioc4_driver_data *idd)
{
	struct pci_dev *pdev = NULL;
	int found = 0;

	/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
				      PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
	} while (pdev && !found);
	if (NULL != pdev) {
		pci_dev_put(pdev);
		return IOC4_VARIANT_IO9;
	}

	/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
	pdev = NULL;
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
				      PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
	} while (pdev && !found);
	if (NULL != pdev) {
		pci_dev_put(pdev);
		return IOC4_VARIANT_IO10;
	}

	/* PCI-RT: No SCSI/SATA controller will be present */
	return IOC4_VARIANT_PCI_RT;
}

static void __devinit
ioc4_load_modules(struct work_struct *work)
{
	/* arg just has to be freed */

	request_module("sgiioc4");

	kfree(work);
}

/* Adds a new instance of an IOC4 card */
static int __devinit
ioc4_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
{
	struct ioc4_driver_data *idd;
	struct ioc4_submodule *is;
	uint32_t pcmd;
	int ret;

	/* Enable IOC4 and take ownership of it */
	if ((ret = pci_enable_device(pdev))) {
		printk(KERN_WARNING
		       "%s: Failed to enable IOC4 device for pci_dev %s.\n",
		       __func__, pci_name(pdev));
		goto out;
	}
	pci_set_master(pdev);

	/* Set up per-IOC4 data */
	idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
	if (!idd) {
		printk(KERN_WARNING
		       "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
		       __func__, pci_name(pdev));
		ret = -ENODEV;
		goto out_idd;
	}
	idd->idd_pdev = pdev;
	idd->idd_pci_id = pci_id;

	/* Map IOC4 misc registers.  These are shared between subdevices
	 * so the main IOC4 module manages them.
	 */
	idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to find IOC4 misc resource "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	if (!request_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
			    "ioc4_misc")) {
		printk(KERN_WARNING
		       "%s: Unable to request IOC4 misc region "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	idd->idd_misc_regs = ioremap(idd->idd_bar0,
				     sizeof(struct ioc4_misc_regs));
	if (!idd->idd_misc_regs) {
		printk(KERN_WARNING
		       "%s: Unable to remap IOC4 misc region "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_misc_region;
	}

	/* Failsafe portion of per-IOC4 initialization */

	/* Detect card variant */
	idd->idd_variant = ioc4_variant(idd);
	printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
	       idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
	       idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
	       idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");

	/* Initialize IOC4 */
	pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
	pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
			       pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);

	/* Determine PCI clock */
	ioc4_clock_calibrate(idd);

	/* Disable/clear all interrupts.  Need to do this here lest
	 * one submodule request the shared IOC4 IRQ, but interrupt
	 * is generated by a different subdevice.
	 */
	/* Disable */
	writel(~0, &idd->idd_misc_regs->other_iec.raw);
	writel(~0, &idd->idd_misc_regs->sio_iec);
	/* Clear (i.e. acknowledge) */
	writel(~0, &idd->idd_misc_regs->other_ir.raw);
	writel(~0, &idd->idd_misc_regs->sio_ir);

	/* Track PCI-device specific data */
	idd->idd_serial_data = NULL;
	pci_set_drvdata(idd->idd_pdev, idd);

	mutex_lock(&ioc4_mutex);
	list_add_tail(&idd->idd_list, &ioc4_devices);

	/* Add this IOC4 to all submodules */
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_probe && is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s probe failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);

	/* Request sgiioc4 IDE driver on boards that bring that functionality
	 * off of IOC4.  The root filesystem may be hosted on a drive connected
	 * to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
	 * won't be picked up by modprobes due to the ioc4 module owning the
	 * PCI device.
	 */
	if (idd->idd_variant != IOC4_VARIANT_PCI_RT) {
		struct work_struct *work;
		work = kzalloc(sizeof(struct work_struct), GFP_KERNEL);
		if (!work) {
			printk(KERN_WARNING
			       "%s: IOC4 unable to allocate memory for "
			       "load of sub-modules.\n", __func__);
		} else {
			/* Request the module from a work procedure as the
			 * modprobe goes out to a userland helper and that
			 * will hang if done directly from ioc4_probe().
			 */
			printk(KERN_INFO "IOC4 loading sgiioc4 submodule\n");
			INIT_WORK(work, ioc4_load_modules);
			schedule_work(work);
		}
	}

	return 0;

out_misc_region:
	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
out_pci:
	kfree(idd);
out_idd:
	pci_disable_device(pdev);
out:
	return ret;
}

/* Removes a particular instance of an IOC4 card. */
static void __devexit
ioc4_remove(struct pci_dev *pdev)
{
	struct ioc4_submodule *is;
	struct ioc4_driver_data *idd;

	idd = pci_get_drvdata(pdev);

	/* Remove this IOC4 from all submodules */
	mutex_lock(&ioc4_mutex);
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_remove && is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s remove failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);

	/* Release resources */
	iounmap(idd->idd_misc_regs);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
		       "Device removal may be incomplete.\n",
		       __func__, pci_name(idd->idd_pdev));
	}
	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));

	/* Disable IOC4 and relinquish */
	pci_disable_device(pdev);

	/* Remove and free driver data */
	mutex_lock(&ioc4_mutex);
	list_del(&idd->idd_list);
	mutex_unlock(&ioc4_mutex);
	kfree(idd);
}

static struct pci_device_id ioc4_id_table[] = {
	{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
	 PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
	{0}
};

static struct pci_driver ioc4_driver = {
	.name = "IOC4",
	.id_table = ioc4_id_table,
	.probe = ioc4_probe,
	.remove = __devexit_p(ioc4_remove),
};

MODULE_DEVICE_TABLE(pci, ioc4_id_table);

/*********************
 * Module management *
 *********************/

/* Module load */
static int __init
ioc4_init(void)
{
	return pci_register_driver(&ioc4_driver);
}

/* Module unload */
static void __exit
ioc4_exit(void)
{
	/* Ensure ioc4_load_modules() has completed before exiting */
	flush_scheduled_work();
	pci_unregister_driver(&ioc4_driver);
}

module_init(ioc4_init);
module_exit(ioc4_exit);

MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(ioc4_register_submodule);
EXPORT_SYMBOL(ioc4_unregister_submodule);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
107d5a72	6	* Copyright (C) 2005-2006 Silicon Graphics, Inc. All Rights Reserved.
1da177e4 LT	7	*/
1da177e4 LT	8
22329b51 BC	9	/* This file contains the master driver module for use by SGI IOC4 subdrivers.
	10	*
	11	* It allocates any resources shared between multiple subdevices, and
	12	* provides accessor functions (where needed) and the like for those
	13	* resources. It also provides a mechanism for the subdevice modules
	14	* to support loading and unloading.
	15	*
	16	* Non-shared resources (e.g. external interrupt A_INT_OUT register page
	17	* alias, serial port and UART registers) are handled by the subdevice
	18	* modules themselves.
	19	*
	20	* This is all necessary because IOC4 is not implemented as a multi-function
	21	* PCI device, but an amalgamation of disparate registers for several
	22	* types of device (ATA, serial, external interrupts). The normal
	23	* resource management in the kernel doesn't have quite the right interfaces
	24	* to handle this situation (e.g. multiple modules can't claim the same
	25	* PCI ID), thus this IOC4 master module.
1da177e4 LT	26	*/
	27
	28	#include <linux/errno.h>
	29	#include <linux/module.h>
	30	#include <linux/pci.h>
22329b51	31	#include <linux/ioc4.h>
107d5a72	32	#include <linux/ktime.h>
5a0e3ad6	33	#include <linux/slab.h>
6e586f32	34	#include <linux/mutex.h>
107d5a72	35	#include <linux/time.h>
2099c99e	36	#include <asm/io.h>
d4c477ca BC	37
	38	/***************
	39	* Definitions *
	40	***************/
	41
	42	/* Tweakable values */
	43
	44	/* PCI bus speed detection/calibration */
107d5a72	45	#define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
d4c477ca BC	46	#define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
	47	#define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
	48	#define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
	49	#define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
	50	#define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
1da177e4	51
22329b51 BC	52	/************************
	53	* Submodule management *
	54	************************/
1da177e4	55
6e586f32	56	static DEFINE_MUTEX(ioc4_mutex);
22329b51	57
6e586f32	58	static LIST_HEAD(ioc4_devices);
22329b51	59	static LIST_HEAD(ioc4_submodules);
22329b51 BC	60
	61	/* Register an IOC4 submodule */
	62	int
	63	ioc4_register_submodule(struct ioc4_submodule *is)
	64	{
	65	struct ioc4_driver_data *idd;
	66
6e586f32	67	mutex_lock(&ioc4_mutex);
22329b51	68	list_add(&is->is_list, &ioc4_submodules);
22329b51 BC	69
	70	/* Initialize submodule for each IOC4 */
	71	if (!is->is_probe)
6e586f32	72	goto out;
22329b51	73
22329b51 BC	74	list_for_each_entry(idd, &ioc4_devices, idd_list) {
	75	if (is->is_probe(idd)) {
	76	printk(KERN_WARNING
	77	"%s: IOC4 submodule %s probe failed "
	78	"for pci_dev %s",
6e574195	79	__func__, module_name(is->is_owner),
22329b51 BC	80	pci_name(idd->idd_pdev));
	81	}
	82	}
6e586f32 JS	83	out:
6e586f32 JS	84	mutex_unlock(&ioc4_mutex);
22329b51 BC	85	return 0;
	86	}
	87
	88	/* Unregister an IOC4 submodule */
	89	void
	90	ioc4_unregister_submodule(struct ioc4_submodule *is)
1da177e4	91	{
22329b51 BC	92	struct ioc4_driver_data *idd;
22329b51 BC	93
6e586f32	94	mutex_lock(&ioc4_mutex);
22329b51	95	list_del(&is->is_list);
22329b51 BC	96
	97	/* Remove submodule for each IOC4 */
	98	if (!is->is_remove)
6e586f32	99	goto out;
22329b51	100
22329b51 BC	101	list_for_each_entry(idd, &ioc4_devices, idd_list) {
	102	if (is->is_remove(idd)) {
	103	printk(KERN_WARNING
	104	"%s: IOC4 submodule %s remove failed "
	105	"for pci_dev %s.\n",
6e574195	106	__func__, module_name(is->is_owner),
22329b51 BC	107	pci_name(idd->idd_pdev));
	108	}
	109	}
6e586f32 JS	110	out:
6e586f32 JS	111	mutex_unlock(&ioc4_mutex);
22329b51 BC	112	}
	113
	114	/*********************
	115	* Device management *
	116	*********************/
	117
d4c477ca BC	118	#define IOC4_CALIBRATE_LOW_LIMIT \
	119	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
	120	#define IOC4_CALIBRATE_HIGH_LIMIT \
	121	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
	122	#define IOC4_CALIBRATE_DEFAULT \
	123	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
	124
	125	#define IOC4_CALIBRATE_END \
	126	(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
	127
	128	#define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
	129
	130	/* Determines external interrupt output clock period of the PCI bus an
	131	* IOC4 is attached to. This value can be used to determine the PCI
	132	* bus speed.
	133	*
	134	* IOC4 has a design feature that various internal timers are derived from
	135	* the PCI bus clock. This causes IOC4 device drivers to need to take the
	136	* bus speed into account when setting various register values (e.g. INT_OUT
	137	* register COUNT field, UART divisors, etc). Since this information is
	138	* needed by several subdrivers, it is determined by the main IOC4 driver,
	139	* even though the following code utilizes external interrupt registers
	140	* to perform the speed calculation.
	141	*/
2ea5d35a	142	static void __devinit
d4c477ca BC	143	ioc4_clock_calibrate(struct ioc4_driver_data *idd)
d4c477ca BC	144	{
d4c477ca BC	145	union ioc4_int_out int_out;
	146	union ioc4_gpcr gpcr;
	147	unsigned int state, last_state = 1;
107d5a72 BC	148	struct timespec start_ts, end_ts;
107d5a72 BC	149	uint64_t start, end, period;
d4c477ca BC	150	unsigned int count = 0;
	151
	152	/* Enable output */
	153	gpcr.raw = 0;
	154	gpcr.fields.dir = IOC4_GPCR_DIR_0;
	155	gpcr.fields.int_out_en = 1;
	156	writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);
	157
	158	/* Reset to power-on state */
	159	writel(0, &idd->idd_misc_regs->int_out.raw);
	160	mmiowb();
	161
d4c477ca BC	162	/* Set up square wave */
	163	int_out.raw = 0;
	164	int_out.fields.count = IOC4_CALIBRATE_COUNT;
	165	int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
	166	int_out.fields.diag = 0;
	167	writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
	168	mmiowb();
	169
	170	/* Check square wave period averaged over some number of cycles */
	171	do {
	172	int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
	173	state = int_out.fields.int_out;
	174	if (!last_state && state) {
	175	count++;
	176	if (count == IOC4_CALIBRATE_END) {
107d5a72	177	ktime_get_ts(&end_ts);
d4c477ca BC	178	break;
d4c477ca BC	179	} else if (count == IOC4_CALIBRATE_DISCARD)
107d5a72	180	ktime_get_ts(&start_ts);
d4c477ca BC	181	}
	182	last_state = state;
	183	} while (1);
	184
	185	/* Calculation rearranged to preserve intermediate precision.
	186	* Logically:
107d5a72 BC	187	* 1. "end - start" gives us the measurement period over all
	188	* the square wave cycles.
	189	* 2. Divide by number of square wave cycles to get the period
	190	* of a square wave cycle.
d4c477ca BC	191	* 3. Divide by 2*(int_out.fields.count+1), which is the formula
d4c477ca BC	192	* by which the IOC4 generates the square wave, to get the
107d5a72	193	* period of an IOC4 INT_OUT count.
d4c477ca	194	*/
107d5a72 BC	195	end = end_ts.tv_sec * NSEC_PER_SEC + end_ts.tv_nsec;
	196	start = start_ts.tv_sec * NSEC_PER_SEC + start_ts.tv_nsec;
	197	period = (end - start) /
	198	(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));
d4c477ca BC	199
	200	/* Bounds check the result. */
	201	if (period > IOC4_CALIBRATE_LOW_LIMIT \|\|
	202	period < IOC4_CALIBRATE_HIGH_LIMIT) {
f5befceb BC	203	printk(KERN_INFO
	204	"IOC4 %s: Clock calibration failed. Assuming"
	205	"PCI clock is %d ns.\n",
	206	pci_name(idd->idd_pdev),
d4c477ca BC	207	IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
	208	period = IOC4_CALIBRATE_DEFAULT;
	209	} else {
59f14800 BC	210	u64 ns = period;
	211
	212	do_div(ns, IOC4_EXTINT_COUNT_DIVISOR);
f5befceb	213	printk(KERN_DEBUG
760fe9ad RD	214	"IOC4 %s: PCI clock is %llu ns.\n",
760fe9ad RD	215	pci_name(idd->idd_pdev), (unsigned long long)ns);
d4c477ca BC	216	}
	217
	218	/* Remember results. We store the extint clock period rather
	219	* than the PCI clock period so that greater precision is
	220	* retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
	221	* PCI clock period.
	222	*/
	223	idd->count_period = period;
	224	}
	225
f5befceb BC	226	/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
	227	* Each brings out different combinations of IOC4 signals, thus.
	228	* the IOC4 subdrivers need to know to which we're attached.
	229	*
	230	* We look for the presence of a SCSI (IO9) or SATA (IO10) controller
	231	* on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
	232	* If neither is present, it's a PCI-RT.
	233	*/
2ea5d35a	234	static unsigned int __devinit
f5befceb BC	235	ioc4_variant(struct ioc4_driver_data *idd)
	236	{
	237	struct pci_dev *pdev = NULL;
	238	int found = 0;
	239
	240	/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
	241	do {
	242	pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
	243	PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
	244	if (pdev &&
	245	idd->idd_pdev->bus->number == pdev->bus->number &&
	246	3 == PCI_SLOT(pdev->devfn))
	247	found = 1;
f5befceb	248	} while (pdev && !found);
90d8dabf JL	249	if (NULL != pdev) {
90d8dabf JL	250	pci_dev_put(pdev);
f5befceb	251	return IOC4_VARIANT_IO9;
90d8dabf	252	}
f5befceb BC	253
	254	/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
	255	pdev = NULL;
	256	do {
	257	pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
	258	PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
	259	if (pdev &&
	260	idd->idd_pdev->bus->number == pdev->bus->number &&
	261	3 == PCI_SLOT(pdev->devfn))
	262	found = 1;
f5befceb	263	} while (pdev && !found);
90d8dabf JL	264	if (NULL != pdev) {
90d8dabf JL	265	pci_dev_put(pdev);
f5befceb	266	return IOC4_VARIANT_IO10;
90d8dabf	267	}
f5befceb BC	268
	269	/* PCI-RT: No SCSI/SATA controller will be present */
	270	return IOC4_VARIANT_PCI_RT;
	271	}
	272
2ea5d35a	273	static void __devinit
08adefd4 BC	274	ioc4_load_modules(struct work_struct *work)
	275	{
	276	/* arg just has to be freed */
	277
	278	request_module("sgiioc4");
	279
	280	kfree(work);
	281	}
	282
22329b51	283	/* Adds a new instance of an IOC4 card */
2ea5d35a	284	static int __devinit
22329b51 BC	285	ioc4_probe(struct pci_dev pdev, const struct pci_device_id pci_id)
	286	{
	287	struct ioc4_driver_data *idd;
	288	struct ioc4_submodule *is;
	289	uint32_t pcmd;
1da177e4 LT	290	int ret;
1da177e4 LT	291
22329b51	292	/* Enable IOC4 and take ownership of it */
1da177e4 LT	293	if ((ret = pci_enable_device(pdev))) {
1da177e4 LT	294	printk(KERN_WARNING
22329b51	295	"%s: Failed to enable IOC4 device for pci_dev %s.\n",
6e574195	296	__func__, pci_name(pdev));
22329b51	297	goto out;
1da177e4 LT	298	}
	299	pci_set_master(pdev);
	300
22329b51 BC	301	/* Set up per-IOC4 data */
	302	idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
	303	if (!idd) {
	304	printk(KERN_WARNING
	305	"%s: Failed to allocate IOC4 data for pci_dev %s.\n",
6e574195	306	__func__, pci_name(pdev));
22329b51 BC	307	ret = -ENODEV;
	308	goto out_idd;
	309	}
	310	idd->idd_pdev = pdev;
	311	idd->idd_pci_id = pci_id;
	312
	313	/* Map IOC4 misc registers. These are shared between subdevices
	314	* so the main IOC4 module manages them.
	315	*/
	316	idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
	317	if (!idd->idd_bar0) {
	318	printk(KERN_WARNING
	319	"%s: Unable to find IOC4 misc resource "
	320	"for pci_dev %s.\n",
6e574195	321	__func__, pci_name(idd->idd_pdev));
22329b51 BC	322	ret = -ENODEV;
	323	goto out_pci;
	324	}
52c9ae0a	325	if (!request_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
22329b51 BC	326	"ioc4_misc")) {
	327	printk(KERN_WARNING
	328	"%s: Unable to request IOC4 misc region "
	329	"for pci_dev %s.\n",
6e574195	330	__func__, pci_name(idd->idd_pdev));
22329b51 BC	331	ret = -ENODEV;
	332	goto out_pci;
	333	}
	334	idd->idd_misc_regs = ioremap(idd->idd_bar0,
	335	sizeof(struct ioc4_misc_regs));
	336	if (!idd->idd_misc_regs) {
	337	printk(KERN_WARNING
	338	"%s: Unable to remap IOC4 misc region "
	339	"for pci_dev %s.\n",
6e574195	340	__func__, pci_name(idd->idd_pdev));
22329b51 BC	341	ret = -ENODEV;
	342	goto out_misc_region;
	343	}
	344
	345	/* Failsafe portion of per-IOC4 initialization */
	346
f5befceb BC	347	/* Detect card variant */
	348	idd->idd_variant = ioc4_variant(idd);
	349	printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
	350	idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
	351	idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
	352	idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");
	353
22329b51 BC	354	/* Initialize IOC4 */
	355	pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
	356	pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
	357	pcmd \| PCI_COMMAND_PARITY \| PCI_COMMAND_SERR);
	358
d4c477ca BC	359	/* Determine PCI clock */
	360	ioc4_clock_calibrate(idd);
	361
22329b51 BC	362	/* Disable/clear all interrupts. Need to do this here lest
	363	* one submodule request the shared IOC4 IRQ, but interrupt
	364	* is generated by a different subdevice.
	365	*/
	366	/* Disable */
	367	writel(~0, &idd->idd_misc_regs->other_iec.raw);
	368	writel(~0, &idd->idd_misc_regs->sio_iec);
	369	/* Clear (i.e. acknowledge) */
	370	writel(~0, &idd->idd_misc_regs->other_ir.raw);
	371	writel(~0, &idd->idd_misc_regs->sio_ir);
	372
	373	/* Track PCI-device specific data */
	374	idd->idd_serial_data = NULL;
	375	pci_set_drvdata(idd->idd_pdev, idd);
6e586f32 JS	376
6e586f32 JS	377	mutex_lock(&ioc4_mutex);
8683dc99	378	list_add_tail(&idd->idd_list, &ioc4_devices);
22329b51 BC	379
22329b51 BC	380	/* Add this IOC4 to all submodules */
22329b51 BC	381	list_for_each_entry(is, &ioc4_submodules, is_list) {
	382	if (is->is_probe && is->is_probe(idd)) {
	383	printk(KERN_WARNING
	384	"%s: IOC4 submodule 0x%s probe failed "
	385	"for pci_dev %s.\n",
6e574195	386	__func__, module_name(is->is_owner),
22329b51 BC	387	pci_name(idd->idd_pdev));
	388	}
	389	}
6e586f32	390	mutex_unlock(&ioc4_mutex);
22329b51	391
08adefd4 BC	392	/* Request sgiioc4 IDE driver on boards that bring that functionality
	393	* off of IOC4. The root filesystem may be hosted on a drive connected
	394	* to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
	395	* won't be picked up by modprobes due to the ioc4 module owning the
	396	* PCI device.
	397	*/
	398	if (idd->idd_variant != IOC4_VARIANT_PCI_RT) {
	399	struct work_struct *work;
	400	work = kzalloc(sizeof(struct work_struct), GFP_KERNEL);
	401	if (!work) {
	402	printk(KERN_WARNING
	403	"%s: IOC4 unable to allocate memory for "
	404	"load of sub-modules.\n", __func__);
	405	} else {
	406	/* Request the module from a work procedure as the
	407	* modprobe goes out to a userland helper and that
	408	* will hang if done directly from ioc4_probe().
	409	*/
	410	printk(KERN_INFO "IOC4 loading sgiioc4 submodule\n");
	411	INIT_WORK(work, ioc4_load_modules);
	412	schedule_work(work);
	413	}
	414	}
	415
22329b51 BC	416	return 0;
	417
	418	out_misc_region:
52c9ae0a	419	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
22329b51 BC	420	out_pci:
	421	kfree(idd);
	422	out_idd:
	423	pci_disable_device(pdev);
	424	out:
	425	return ret;
1da177e4 LT	426	}
1da177e4 LT	427
22329b51	428	/* Removes a particular instance of an IOC4 card. */
2ea5d35a	429	static void __devexit
22329b51 BC	430	ioc4_remove(struct pci_dev *pdev)
	431	{
	432	struct ioc4_submodule *is;
	433	struct ioc4_driver_data *idd;
	434
	435	idd = pci_get_drvdata(pdev);
	436
	437	/* Remove this IOC4 from all submodules */
6e586f32	438	mutex_lock(&ioc4_mutex);
22329b51 BC	439	list_for_each_entry(is, &ioc4_submodules, is_list) {
	440	if (is->is_remove && is->is_remove(idd)) {
	441	printk(KERN_WARNING
	442	"%s: IOC4 submodule 0x%s remove failed "
	443	"for pci_dev %s.\n",
6e574195	444	__func__, module_name(is->is_owner),
22329b51 BC	445	pci_name(idd->idd_pdev));
	446	}
	447	}
6e586f32	448	mutex_unlock(&ioc4_mutex);
22329b51 BC	449
	450	/* Release resources */
	451	iounmap(idd->idd_misc_regs);
	452	if (!idd->idd_bar0) {
	453	printk(KERN_WARNING
	454	"%s: Unable to get IOC4 misc mapping for pci_dev %s. "
	455	"Device removal may be incomplete.\n",
6e574195	456	__func__, pci_name(idd->idd_pdev));
22329b51	457	}
52c9ae0a	458	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
22329b51 BC	459
	460	/* Disable IOC4 and relinquish */
	461	pci_disable_device(pdev);
	462
	463	/* Remove and free driver data */
6e586f32	464	mutex_lock(&ioc4_mutex);
22329b51	465	list_del(&idd->idd_list);
6e586f32	466	mutex_unlock(&ioc4_mutex);
22329b51 BC	467	kfree(idd);
	468	}
	469
	470	static struct pci_device_id ioc4_id_table[] = {
1da177e4 LT	471	{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
	472	PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
	473	{0}
	474	};
1da177e4	475
85bd8434	476	static struct pci_driver ioc4_driver = {
22329b51 BC	477	.name = "IOC4",
	478	.id_table = ioc4_id_table,
	479	.probe = ioc4_probe,
2ea5d35a	480	.remove = __devexit_p(ioc4_remove),
1da177e4 LT	481	};
1da177e4 LT	482
22329b51 BC	483	MODULE_DEVICE_TABLE(pci, ioc4_id_table);
	484
	485	/*********************
	486	* Module management *
	487	*********************/
	488
	489	/* Module load */
2ea5d35a	490	static int __init
22329b51	491	ioc4_init(void)
1da177e4	492	{
22329b51 BC	493	return pci_register_driver(&ioc4_driver);
22329b51 BC	494	}
1da177e4	495
22329b51	496	/* Module unload */
2ea5d35a	497	static void __exit
22329b51 BC	498	ioc4_exit(void)
22329b51 BC	499	{
08adefd4 BC	500	/* Ensure ioc4_load_modules() has completed before exiting */
08adefd4 BC	501	flush_scheduled_work();
22329b51	502	pci_unregister_driver(&ioc4_driver);
1da177e4	503	}
1da177e4	504
22329b51 BC	505	module_init(ioc4_init);
	506	module_exit(ioc4_exit);
	507
	508	MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
	509	MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
1da177e4	510	MODULE_LICENSE("GPL");
22329b51 BC	511
	512	EXPORT_SYMBOL(ioc4_register_submodule);
	513	EXPORT_SYMBOL(ioc4_unregister_submodule);