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Commit | Line | Data |
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a603a7fa | 1 | /* |
fc7b92fc B |
2 | * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM |
3 | * and audio CODEC devices | |
a603a7fa DB |
4 | * |
5 | * Copyright (C) 2005-2006 Texas Instruments, Inc. | |
6 | * | |
7 | * Modifications to defer interrupt handling to a kernel thread: | |
8 | * Copyright (C) 2006 MontaVista Software, Inc. | |
9 | * | |
10 | * Based on tlv320aic23.c: | |
11 | * Copyright (c) by Kai Svahn <kai.svahn@nokia.com> | |
12 | * | |
13 | * Code cleanup and modifications to IRQ handler. | |
14 | * by syed khasim <x0khasim@ti.com> | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or modify | |
17 | * it under the terms of the GNU General Public License as published by | |
18 | * the Free Software Foundation; either version 2 of the License, or | |
19 | * (at your option) any later version. | |
20 | * | |
21 | * This program is distributed in the hope that it will be useful, | |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
24 | * GNU General Public License for more details. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License | |
27 | * along with this program; if not, write to the Free Software | |
28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
29 | */ | |
30 | ||
a603a7fa DB |
31 | #include <linux/init.h> |
32 | #include <linux/mutex.h> | |
a603a7fa DB |
33 | #include <linux/platform_device.h> |
34 | #include <linux/clk.h> | |
a30d46c0 | 35 | #include <linux/err.h> |
a603a7fa | 36 | |
dad759ff DB |
37 | #include <linux/regulator/machine.h> |
38 | ||
a603a7fa | 39 | #include <linux/i2c.h> |
b07682b6 | 40 | #include <linux/i2c/twl.h> |
a603a7fa | 41 | |
a313d758 | 42 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
ce491cf8 | 43 | #include <plat/cpu.h> |
b29c06ae | 44 | #endif |
a603a7fa DB |
45 | |
46 | /* | |
47 | * The TWL4030 "Triton 2" is one of a family of a multi-function "Power | |
48 | * Management and System Companion Device" chips originally designed for | |
49 | * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C, | |
50 | * often at around 3 Mbit/sec, including for interrupt handling. | |
51 | * | |
52 | * This driver core provides genirq support for the interrupts emitted, | |
53 | * by the various modules, and exports register access primitives. | |
54 | * | |
55 | * FIXME this driver currently requires use of the first interrupt line | |
56 | * (and associated registers). | |
57 | */ | |
58 | ||
fc7b92fc | 59 | #define DRIVER_NAME "twl" |
a603a7fa | 60 | |
a603a7fa DB |
61 | #if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE) |
62 | #define twl_has_keypad() true | |
63 | #else | |
64 | #define twl_has_keypad() false | |
65 | #endif | |
66 | ||
67 | #if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE) | |
68 | #define twl_has_gpio() true | |
69 | #else | |
70 | #define twl_has_gpio() false | |
71 | #endif | |
72 | ||
dad759ff DB |
73 | #if defined(CONFIG_REGULATOR_TWL4030) \ |
74 | || defined(CONFIG_REGULATOR_TWL4030_MODULE) | |
75 | #define twl_has_regulator() true | |
76 | #else | |
77 | #define twl_has_regulator() false | |
78 | #endif | |
79 | ||
a603a7fa DB |
80 | #if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE) |
81 | #define twl_has_madc() true | |
82 | #else | |
83 | #define twl_has_madc() false | |
84 | #endif | |
85 | ||
ebf0bd36 AK |
86 | #ifdef CONFIG_TWL4030_POWER |
87 | #define twl_has_power() true | |
88 | #else | |
89 | #define twl_has_power() false | |
90 | #endif | |
91 | ||
a603a7fa DB |
92 | #if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE) |
93 | #define twl_has_rtc() true | |
94 | #else | |
95 | #define twl_has_rtc() false | |
96 | #endif | |
97 | ||
98 | #if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) | |
99 | #define twl_has_usb() true | |
100 | #else | |
101 | #define twl_has_usb() false | |
102 | #endif | |
103 | ||
80e45b1e TK |
104 | #if defined(CONFIG_TWL4030_WATCHDOG) || \ |
105 | defined(CONFIG_TWL4030_WATCHDOG_MODULE) | |
106 | #define twl_has_watchdog() true | |
107 | #else | |
108 | #define twl_has_watchdog() false | |
109 | #endif | |
a603a7fa | 110 | |
d62abe56 | 111 | #if defined(CONFIG_TWL4030_CODEC) || defined(CONFIG_TWL4030_CODEC_MODULE) ||\ |
6a1c7b7e | 112 | defined(CONFIG_SND_SOC_TWL6040) || defined(CONFIG_SND_SOC_TWL6040_MODULE) |
0b83ddeb PU |
113 | #define twl_has_codec() true |
114 | #else | |
115 | #define twl_has_codec() false | |
116 | #endif | |
117 | ||
11c39c4b GI |
118 | #if defined(CONFIG_CHARGER_TWL4030) || defined(CONFIG_CHARGER_TWL4030_MODULE) |
119 | #define twl_has_bci() true | |
120 | #else | |
121 | #define twl_has_bci() false | |
122 | #endif | |
123 | ||
a603a7fa DB |
124 | /* Triton Core internal information (BEGIN) */ |
125 | ||
126 | /* Last - for index max*/ | |
127 | #define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG | |
128 | ||
fc7b92fc | 129 | #define TWL_NUM_SLAVES 4 |
a603a7fa | 130 | |
9c3664dd | 131 | #if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \ |
14e5c82c | 132 | || defined(CONFIG_INPUT_TWL4030_PWRBUTTON_MODULE) |
9c3664dd FB |
133 | #define twl_has_pwrbutton() true |
134 | #else | |
135 | #define twl_has_pwrbutton() false | |
136 | #endif | |
a603a7fa | 137 | |
fc7b92fc B |
138 | #define SUB_CHIP_ID0 0 |
139 | #define SUB_CHIP_ID1 1 | |
140 | #define SUB_CHIP_ID2 2 | |
141 | #define SUB_CHIP_ID3 3 | |
142 | ||
143 | #define TWL_MODULE_LAST TWL4030_MODULE_LAST | |
144 | ||
a603a7fa DB |
145 | /* Base Address defns for twl4030_map[] */ |
146 | ||
147 | /* subchip/slave 0 - USB ID */ | |
148 | #define TWL4030_BASEADD_USB 0x0000 | |
149 | ||
150 | /* subchip/slave 1 - AUD ID */ | |
151 | #define TWL4030_BASEADD_AUDIO_VOICE 0x0000 | |
152 | #define TWL4030_BASEADD_GPIO 0x0098 | |
153 | #define TWL4030_BASEADD_INTBR 0x0085 | |
154 | #define TWL4030_BASEADD_PIH 0x0080 | |
155 | #define TWL4030_BASEADD_TEST 0x004C | |
156 | ||
157 | /* subchip/slave 2 - AUX ID */ | |
158 | #define TWL4030_BASEADD_INTERRUPTS 0x00B9 | |
159 | #define TWL4030_BASEADD_LED 0x00EE | |
160 | #define TWL4030_BASEADD_MADC 0x0000 | |
161 | #define TWL4030_BASEADD_MAIN_CHARGE 0x0074 | |
162 | #define TWL4030_BASEADD_PRECHARGE 0x00AA | |
163 | #define TWL4030_BASEADD_PWM0 0x00F8 | |
164 | #define TWL4030_BASEADD_PWM1 0x00FB | |
165 | #define TWL4030_BASEADD_PWMA 0x00EF | |
166 | #define TWL4030_BASEADD_PWMB 0x00F1 | |
167 | #define TWL4030_BASEADD_KEYPAD 0x00D2 | |
168 | ||
1920a61e IK |
169 | #define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */ |
170 | #define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's | |
171 | one */ | |
172 | ||
a603a7fa DB |
173 | /* subchip/slave 3 - POWER ID */ |
174 | #define TWL4030_BASEADD_BACKUP 0x0014 | |
175 | #define TWL4030_BASEADD_INT 0x002E | |
176 | #define TWL4030_BASEADD_PM_MASTER 0x0036 | |
177 | #define TWL4030_BASEADD_PM_RECEIVER 0x005B | |
178 | #define TWL4030_BASEADD_RTC 0x001C | |
179 | #define TWL4030_BASEADD_SECURED_REG 0x0000 | |
180 | ||
181 | /* Triton Core internal information (END) */ | |
182 | ||
183 | ||
e8deb28c B |
184 | /* subchip/slave 0 0x48 - POWER */ |
185 | #define TWL6030_BASEADD_RTC 0x0000 | |
186 | #define TWL6030_BASEADD_MEM 0x0017 | |
187 | #define TWL6030_BASEADD_PM_MASTER 0x001F | |
188 | #define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */ | |
189 | #define TWL6030_BASEADD_PM_MISC 0x00E2 | |
190 | #define TWL6030_BASEADD_PM_PUPD 0x00F0 | |
191 | ||
192 | /* subchip/slave 1 0x49 - FEATURE */ | |
193 | #define TWL6030_BASEADD_USB 0x0000 | |
194 | #define TWL6030_BASEADD_GPADC_CTRL 0x002E | |
195 | #define TWL6030_BASEADD_AUX 0x0090 | |
196 | #define TWL6030_BASEADD_PWM 0x00BA | |
197 | #define TWL6030_BASEADD_GASGAUGE 0x00C0 | |
198 | #define TWL6030_BASEADD_PIH 0x00D0 | |
199 | #define TWL6030_BASEADD_CHARGER 0x00E0 | |
200 | ||
201 | /* subchip/slave 2 0x4A - DFT */ | |
202 | #define TWL6030_BASEADD_DIEID 0x00C0 | |
203 | ||
204 | /* subchip/slave 3 0x4B - AUDIO */ | |
205 | #define TWL6030_BASEADD_AUDIO 0x0000 | |
206 | #define TWL6030_BASEADD_RSV 0x0000 | |
fa0d9762 | 207 | #define TWL6030_BASEADD_ZERO 0x0000 |
e8deb28c | 208 | |
a603a7fa DB |
209 | /* Few power values */ |
210 | #define R_CFG_BOOT 0x05 | |
a603a7fa DB |
211 | |
212 | /* some fields in R_CFG_BOOT */ | |
213 | #define HFCLK_FREQ_19p2_MHZ (1 << 0) | |
214 | #define HFCLK_FREQ_26_MHZ (2 << 0) | |
215 | #define HFCLK_FREQ_38p4_MHZ (3 << 0) | |
216 | #define HIGH_PERF_SQ (1 << 3) | |
38a68496 | 217 | #define CK32K_LOWPWR_EN (1 << 7) |
a603a7fa DB |
218 | |
219 | ||
dad759ff DB |
220 | /* chip-specific feature flags, for i2c_device_id.driver_data */ |
221 | #define TWL4030_VAUX2 BIT(0) /* pre-5030 voltage ranges */ | |
222 | #define TPS_SUBSET BIT(1) /* tps659[23]0 have fewer LDOs */ | |
1920a61e | 223 | #define TWL5031 BIT(2) /* twl5031 has different registers */ |
e8deb28c | 224 | #define TWL6030_CLASS BIT(3) /* TWL6030 class */ |
dad759ff | 225 | |
a603a7fa DB |
226 | /*----------------------------------------------------------------------*/ |
227 | ||
a603a7fa DB |
228 | /* is driver active, bound to a chip? */ |
229 | static bool inuse; | |
230 | ||
e8deb28c B |
231 | static unsigned int twl_id; |
232 | unsigned int twl_rev(void) | |
233 | { | |
234 | return twl_id; | |
235 | } | |
236 | EXPORT_SYMBOL(twl_rev); | |
237 | ||
238 | /* Structure for each TWL4030/TWL6030 Slave */ | |
fc7b92fc | 239 | struct twl_client { |
a603a7fa DB |
240 | struct i2c_client *client; |
241 | u8 address; | |
242 | ||
243 | /* max numb of i2c_msg required is for read =2 */ | |
244 | struct i2c_msg xfer_msg[2]; | |
245 | ||
246 | /* To lock access to xfer_msg */ | |
247 | struct mutex xfer_lock; | |
248 | }; | |
249 | ||
fc7b92fc | 250 | static struct twl_client twl_modules[TWL_NUM_SLAVES]; |
a603a7fa DB |
251 | |
252 | ||
253 | /* mapping the module id to slave id and base address */ | |
fc7b92fc | 254 | struct twl_mapping { |
a603a7fa DB |
255 | unsigned char sid; /* Slave ID */ |
256 | unsigned char base; /* base address */ | |
257 | }; | |
2cfcce18 | 258 | static struct twl_mapping *twl_map; |
a603a7fa | 259 | |
fc7b92fc | 260 | static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = { |
a603a7fa DB |
261 | /* |
262 | * NOTE: don't change this table without updating the | |
e8deb28c | 263 | * <linux/i2c/twl.h> defines for TWL4030_MODULE_* |
a603a7fa DB |
264 | * so they continue to match the order in this table. |
265 | */ | |
266 | ||
267 | { 0, TWL4030_BASEADD_USB }, | |
268 | ||
269 | { 1, TWL4030_BASEADD_AUDIO_VOICE }, | |
270 | { 1, TWL4030_BASEADD_GPIO }, | |
271 | { 1, TWL4030_BASEADD_INTBR }, | |
272 | { 1, TWL4030_BASEADD_PIH }, | |
273 | { 1, TWL4030_BASEADD_TEST }, | |
274 | ||
275 | { 2, TWL4030_BASEADD_KEYPAD }, | |
276 | { 2, TWL4030_BASEADD_MADC }, | |
277 | { 2, TWL4030_BASEADD_INTERRUPTS }, | |
278 | { 2, TWL4030_BASEADD_LED }, | |
279 | { 2, TWL4030_BASEADD_MAIN_CHARGE }, | |
280 | { 2, TWL4030_BASEADD_PRECHARGE }, | |
281 | { 2, TWL4030_BASEADD_PWM0 }, | |
282 | { 2, TWL4030_BASEADD_PWM1 }, | |
283 | { 2, TWL4030_BASEADD_PWMA }, | |
284 | { 2, TWL4030_BASEADD_PWMB }, | |
1920a61e IK |
285 | { 2, TWL5031_BASEADD_ACCESSORY }, |
286 | { 2, TWL5031_BASEADD_INTERRUPTS }, | |
a603a7fa DB |
287 | |
288 | { 3, TWL4030_BASEADD_BACKUP }, | |
289 | { 3, TWL4030_BASEADD_INT }, | |
290 | { 3, TWL4030_BASEADD_PM_MASTER }, | |
291 | { 3, TWL4030_BASEADD_PM_RECEIVER }, | |
292 | { 3, TWL4030_BASEADD_RTC }, | |
293 | { 3, TWL4030_BASEADD_SECURED_REG }, | |
294 | }; | |
295 | ||
e8deb28c B |
296 | static struct twl_mapping twl6030_map[] = { |
297 | /* | |
298 | * NOTE: don't change this table without updating the | |
299 | * <linux/i2c/twl.h> defines for TWL4030_MODULE_* | |
300 | * so they continue to match the order in this table. | |
301 | */ | |
302 | { SUB_CHIP_ID1, TWL6030_BASEADD_USB }, | |
303 | { SUB_CHIP_ID3, TWL6030_BASEADD_AUDIO }, | |
304 | { SUB_CHIP_ID2, TWL6030_BASEADD_DIEID }, | |
305 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, | |
306 | { SUB_CHIP_ID1, TWL6030_BASEADD_PIH }, | |
307 | ||
308 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, | |
309 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, | |
310 | { SUB_CHIP_ID1, TWL6030_BASEADD_GPADC_CTRL }, | |
311 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, | |
312 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, | |
313 | ||
314 | { SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER }, | |
315 | { SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE }, | |
316 | { SUB_CHIP_ID1, TWL6030_BASEADD_PWM }, | |
fa0d9762 B |
317 | { SUB_CHIP_ID0, TWL6030_BASEADD_ZERO }, |
318 | { SUB_CHIP_ID1, TWL6030_BASEADD_ZERO }, | |
e8deb28c | 319 | |
fa0d9762 B |
320 | { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO }, |
321 | { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO }, | |
e8deb28c B |
322 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, |
323 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, | |
324 | { SUB_CHIP_ID2, TWL6030_BASEADD_RSV }, | |
325 | { SUB_CHIP_ID0, TWL6030_BASEADD_PM_MASTER }, | |
326 | { SUB_CHIP_ID0, TWL6030_BASEADD_PM_SLAVE_MISC }, | |
327 | ||
328 | { SUB_CHIP_ID0, TWL6030_BASEADD_RTC }, | |
329 | { SUB_CHIP_ID0, TWL6030_BASEADD_MEM }, | |
330 | }; | |
331 | ||
a603a7fa DB |
332 | /*----------------------------------------------------------------------*/ |
333 | ||
a603a7fa DB |
334 | /* Exported Functions */ |
335 | ||
336 | /** | |
fc7b92fc | 337 | * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0 |
a603a7fa DB |
338 | * @mod_no: module number |
339 | * @value: an array of num_bytes+1 containing data to write | |
340 | * @reg: register address (just offset will do) | |
341 | * @num_bytes: number of bytes to transfer | |
342 | * | |
343 | * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and | |
344 | * valid data starts at Offset 1. | |
345 | * | |
346 | * Returns the result of operation - 0 is success | |
347 | */ | |
fc7b92fc | 348 | int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) |
a603a7fa DB |
349 | { |
350 | int ret; | |
351 | int sid; | |
fc7b92fc | 352 | struct twl_client *twl; |
a603a7fa DB |
353 | struct i2c_msg *msg; |
354 | ||
fc7b92fc | 355 | if (unlikely(mod_no > TWL_MODULE_LAST)) { |
a603a7fa DB |
356 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); |
357 | return -EPERM; | |
358 | } | |
e8deb28c | 359 | sid = twl_map[mod_no].sid; |
fc7b92fc | 360 | twl = &twl_modules[sid]; |
a603a7fa DB |
361 | |
362 | if (unlikely(!inuse)) { | |
363 | pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); | |
364 | return -EPERM; | |
365 | } | |
366 | mutex_lock(&twl->xfer_lock); | |
367 | /* | |
368 | * [MSG1]: fill the register address data | |
369 | * fill the data Tx buffer | |
370 | */ | |
371 | msg = &twl->xfer_msg[0]; | |
372 | msg->addr = twl->address; | |
373 | msg->len = num_bytes + 1; | |
374 | msg->flags = 0; | |
375 | msg->buf = value; | |
376 | /* over write the first byte of buffer with the register address */ | |
e8deb28c | 377 | *value = twl_map[mod_no].base + reg; |
a603a7fa DB |
378 | ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1); |
379 | mutex_unlock(&twl->xfer_lock); | |
380 | ||
147e0847 AK |
381 | /* i2c_transfer returns number of messages transferred */ |
382 | if (ret != 1) { | |
383 | pr_err("%s: i2c_write failed to transfer all messages\n", | |
384 | DRIVER_NAME); | |
385 | if (ret < 0) | |
386 | return ret; | |
387 | else | |
388 | return -EIO; | |
389 | } else { | |
390 | return 0; | |
391 | } | |
a603a7fa | 392 | } |
fc7b92fc | 393 | EXPORT_SYMBOL(twl_i2c_write); |
a603a7fa DB |
394 | |
395 | /** | |
fc7b92fc | 396 | * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0 |
a603a7fa DB |
397 | * @mod_no: module number |
398 | * @value: an array of num_bytes containing data to be read | |
399 | * @reg: register address (just offset will do) | |
400 | * @num_bytes: number of bytes to transfer | |
401 | * | |
402 | * Returns result of operation - num_bytes is success else failure. | |
403 | */ | |
fc7b92fc | 404 | int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) |
a603a7fa DB |
405 | { |
406 | int ret; | |
407 | u8 val; | |
408 | int sid; | |
fc7b92fc | 409 | struct twl_client *twl; |
a603a7fa DB |
410 | struct i2c_msg *msg; |
411 | ||
fc7b92fc | 412 | if (unlikely(mod_no > TWL_MODULE_LAST)) { |
a603a7fa DB |
413 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); |
414 | return -EPERM; | |
415 | } | |
e8deb28c | 416 | sid = twl_map[mod_no].sid; |
fc7b92fc | 417 | twl = &twl_modules[sid]; |
a603a7fa DB |
418 | |
419 | if (unlikely(!inuse)) { | |
420 | pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); | |
421 | return -EPERM; | |
422 | } | |
423 | mutex_lock(&twl->xfer_lock); | |
424 | /* [MSG1] fill the register address data */ | |
425 | msg = &twl->xfer_msg[0]; | |
426 | msg->addr = twl->address; | |
427 | msg->len = 1; | |
428 | msg->flags = 0; /* Read the register value */ | |
e8deb28c | 429 | val = twl_map[mod_no].base + reg; |
a603a7fa DB |
430 | msg->buf = &val; |
431 | /* [MSG2] fill the data rx buffer */ | |
432 | msg = &twl->xfer_msg[1]; | |
433 | msg->addr = twl->address; | |
434 | msg->flags = I2C_M_RD; /* Read the register value */ | |
435 | msg->len = num_bytes; /* only n bytes */ | |
436 | msg->buf = value; | |
437 | ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2); | |
438 | mutex_unlock(&twl->xfer_lock); | |
439 | ||
147e0847 AK |
440 | /* i2c_transfer returns number of messages transferred */ |
441 | if (ret != 2) { | |
442 | pr_err("%s: i2c_read failed to transfer all messages\n", | |
443 | DRIVER_NAME); | |
444 | if (ret < 0) | |
445 | return ret; | |
446 | else | |
447 | return -EIO; | |
448 | } else { | |
449 | return 0; | |
450 | } | |
a603a7fa | 451 | } |
fc7b92fc | 452 | EXPORT_SYMBOL(twl_i2c_read); |
a603a7fa DB |
453 | |
454 | /** | |
fc7b92fc | 455 | * twl_i2c_write_u8 - Writes a 8 bit register in TWL4030/TWL5030/TWL60X0 |
a603a7fa DB |
456 | * @mod_no: module number |
457 | * @value: the value to be written 8 bit | |
458 | * @reg: register address (just offset will do) | |
459 | * | |
460 | * Returns result of operation - 0 is success | |
461 | */ | |
fc7b92fc | 462 | int twl_i2c_write_u8(u8 mod_no, u8 value, u8 reg) |
a603a7fa DB |
463 | { |
464 | ||
465 | /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */ | |
466 | u8 temp_buffer[2] = { 0 }; | |
467 | /* offset 1 contains the data */ | |
468 | temp_buffer[1] = value; | |
fc7b92fc | 469 | return twl_i2c_write(mod_no, temp_buffer, reg, 1); |
a603a7fa | 470 | } |
fc7b92fc | 471 | EXPORT_SYMBOL(twl_i2c_write_u8); |
a603a7fa DB |
472 | |
473 | /** | |
fc7b92fc | 474 | * twl_i2c_read_u8 - Reads a 8 bit register from TWL4030/TWL5030/TWL60X0 |
a603a7fa DB |
475 | * @mod_no: module number |
476 | * @value: the value read 8 bit | |
477 | * @reg: register address (just offset will do) | |
478 | * | |
479 | * Returns result of operation - 0 is success | |
480 | */ | |
fc7b92fc | 481 | int twl_i2c_read_u8(u8 mod_no, u8 *value, u8 reg) |
a603a7fa | 482 | { |
fc7b92fc | 483 | return twl_i2c_read(mod_no, value, reg, 1); |
a603a7fa | 484 | } |
fc7b92fc | 485 | EXPORT_SYMBOL(twl_i2c_read_u8); |
a603a7fa DB |
486 | |
487 | /*----------------------------------------------------------------------*/ | |
488 | ||
dad759ff DB |
489 | static struct device * |
490 | add_numbered_child(unsigned chip, const char *name, int num, | |
5725d66b DB |
491 | void *pdata, unsigned pdata_len, |
492 | bool can_wakeup, int irq0, int irq1) | |
a603a7fa | 493 | { |
5725d66b | 494 | struct platform_device *pdev; |
fc7b92fc | 495 | struct twl_client *twl = &twl_modules[chip]; |
5725d66b DB |
496 | int status; |
497 | ||
dad759ff | 498 | pdev = platform_device_alloc(name, num); |
5725d66b DB |
499 | if (!pdev) { |
500 | dev_dbg(&twl->client->dev, "can't alloc dev\n"); | |
501 | status = -ENOMEM; | |
502 | goto err; | |
503 | } | |
a603a7fa | 504 | |
5725d66b DB |
505 | device_init_wakeup(&pdev->dev, can_wakeup); |
506 | pdev->dev.parent = &twl->client->dev; | |
a603a7fa | 507 | |
5725d66b DB |
508 | if (pdata) { |
509 | status = platform_device_add_data(pdev, pdata, pdata_len); | |
510 | if (status < 0) { | |
511 | dev_dbg(&pdev->dev, "can't add platform_data\n"); | |
a603a7fa DB |
512 | goto err; |
513 | } | |
5725d66b | 514 | } |
a603a7fa | 515 | |
5725d66b DB |
516 | if (irq0) { |
517 | struct resource r[2] = { | |
518 | { .start = irq0, .flags = IORESOURCE_IRQ, }, | |
519 | { .start = irq1, .flags = IORESOURCE_IRQ, }, | |
520 | }; | |
a603a7fa | 521 | |
5725d66b | 522 | status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1); |
a603a7fa | 523 | if (status < 0) { |
5725d66b | 524 | dev_dbg(&pdev->dev, "can't add irqs\n"); |
a603a7fa DB |
525 | goto err; |
526 | } | |
527 | } | |
528 | ||
5725d66b | 529 | status = platform_device_add(pdev); |
a603a7fa | 530 | |
5725d66b DB |
531 | err: |
532 | if (status < 0) { | |
533 | platform_device_put(pdev); | |
534 | dev_err(&twl->client->dev, "can't add %s dev\n", name); | |
535 | return ERR_PTR(status); | |
536 | } | |
537 | return &pdev->dev; | |
538 | } | |
a603a7fa | 539 | |
dad759ff DB |
540 | static inline struct device *add_child(unsigned chip, const char *name, |
541 | void *pdata, unsigned pdata_len, | |
542 | bool can_wakeup, int irq0, int irq1) | |
543 | { | |
544 | return add_numbered_child(chip, name, -1, pdata, pdata_len, | |
545 | can_wakeup, irq0, irq1); | |
546 | } | |
547 | ||
548 | static struct device * | |
549 | add_regulator_linked(int num, struct regulator_init_data *pdata, | |
550 | struct regulator_consumer_supply *consumers, | |
551 | unsigned num_consumers) | |
552 | { | |
e8deb28c | 553 | unsigned sub_chip_id; |
dad759ff DB |
554 | /* regulator framework demands init_data ... */ |
555 | if (!pdata) | |
556 | return NULL; | |
557 | ||
b73eac78 | 558 | if (consumers) { |
dad759ff DB |
559 | pdata->consumer_supplies = consumers; |
560 | pdata->num_consumer_supplies = num_consumers; | |
561 | } | |
562 | ||
563 | /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */ | |
e8deb28c B |
564 | sub_chip_id = twl_map[TWL_MODULE_PM_MASTER].sid; |
565 | return add_numbered_child(sub_chip_id, "twl_reg", num, | |
dad759ff DB |
566 | pdata, sizeof(*pdata), false, 0, 0); |
567 | } | |
568 | ||
569 | static struct device * | |
570 | add_regulator(int num, struct regulator_init_data *pdata) | |
571 | { | |
572 | return add_regulator_linked(num, pdata, NULL, 0); | |
573 | } | |
574 | ||
5725d66b DB |
575 | /* |
576 | * NOTE: We know the first 8 IRQs after pdata->base_irq are | |
577 | * for the PIH, and the next are for the PWR_INT SIH, since | |
578 | * that's how twl_init_irq() sets things up. | |
579 | */ | |
a603a7fa | 580 | |
dad759ff DB |
581 | static int |
582 | add_children(struct twl4030_platform_data *pdata, unsigned long features) | |
5725d66b DB |
583 | { |
584 | struct device *child; | |
e8deb28c | 585 | unsigned sub_chip_id; |
a603a7fa | 586 | |
5725d66b | 587 | if (twl_has_gpio() && pdata->gpio) { |
fc7b92fc | 588 | child = add_child(SUB_CHIP_ID1, "twl4030_gpio", |
5725d66b | 589 | pdata->gpio, sizeof(*pdata->gpio), |
fc7b92fc | 590 | false, pdata->irq_base + GPIO_INTR_OFFSET, 0); |
5725d66b DB |
591 | if (IS_ERR(child)) |
592 | return PTR_ERR(child); | |
a603a7fa DB |
593 | } |
594 | ||
595 | if (twl_has_keypad() && pdata->keypad) { | |
fc7b92fc | 596 | child = add_child(SUB_CHIP_ID2, "twl4030_keypad", |
5725d66b | 597 | pdata->keypad, sizeof(*pdata->keypad), |
fc7b92fc | 598 | true, pdata->irq_base + KEYPAD_INTR_OFFSET, 0); |
5725d66b DB |
599 | if (IS_ERR(child)) |
600 | return PTR_ERR(child); | |
a603a7fa DB |
601 | } |
602 | ||
603 | if (twl_has_madc() && pdata->madc) { | |
5725d66b DB |
604 | child = add_child(2, "twl4030_madc", |
605 | pdata->madc, sizeof(*pdata->madc), | |
fc7b92fc | 606 | true, pdata->irq_base + MADC_INTR_OFFSET, 0); |
5725d66b DB |
607 | if (IS_ERR(child)) |
608 | return PTR_ERR(child); | |
a603a7fa DB |
609 | } |
610 | ||
611 | if (twl_has_rtc()) { | |
a603a7fa | 612 | /* |
5725d66b | 613 | * REVISIT platform_data here currently might expose the |
a603a7fa | 614 | * "msecure" line ... but for now we just expect board |
5725d66b | 615 | * setup to tell the chip "it's always ok to SET_TIME". |
a603a7fa DB |
616 | * Eventually, Linux might become more aware of such |
617 | * HW security concerns, and "least privilege". | |
618 | */ | |
e8deb28c B |
619 | sub_chip_id = twl_map[TWL_MODULE_RTC].sid; |
620 | child = add_child(sub_chip_id, "twl_rtc", | |
5725d66b | 621 | NULL, 0, |
fc7b92fc | 622 | true, pdata->irq_base + RTC_INTR_OFFSET, 0); |
5725d66b DB |
623 | if (IS_ERR(child)) |
624 | return PTR_ERR(child); | |
a603a7fa DB |
625 | } |
626 | ||
9da66539 | 627 | if (twl_has_usb() && pdata->usb && twl_class_is_4030()) { |
f8ebdff0 RQ |
628 | |
629 | static struct regulator_consumer_supply usb1v5 = { | |
630 | .supply = "usb1v5", | |
631 | }; | |
632 | static struct regulator_consumer_supply usb1v8 = { | |
633 | .supply = "usb1v8", | |
634 | }; | |
635 | static struct regulator_consumer_supply usb3v1 = { | |
636 | .supply = "usb3v1", | |
637 | }; | |
638 | ||
639 | /* First add the regulators so that they can be used by transceiver */ | |
640 | if (twl_has_regulator()) { | |
641 | /* this is a template that gets copied */ | |
642 | struct regulator_init_data usb_fixed = { | |
643 | .constraints.valid_modes_mask = | |
644 | REGULATOR_MODE_NORMAL | |
645 | | REGULATOR_MODE_STANDBY, | |
646 | .constraints.valid_ops_mask = | |
647 | REGULATOR_CHANGE_MODE | |
648 | | REGULATOR_CHANGE_STATUS, | |
649 | }; | |
650 | ||
651 | child = add_regulator_linked(TWL4030_REG_VUSB1V5, | |
652 | &usb_fixed, &usb1v5, 1); | |
653 | if (IS_ERR(child)) | |
654 | return PTR_ERR(child); | |
655 | ||
656 | child = add_regulator_linked(TWL4030_REG_VUSB1V8, | |
657 | &usb_fixed, &usb1v8, 1); | |
658 | if (IS_ERR(child)) | |
659 | return PTR_ERR(child); | |
660 | ||
661 | child = add_regulator_linked(TWL4030_REG_VUSB3V1, | |
662 | &usb_fixed, &usb3v1, 1); | |
663 | if (IS_ERR(child)) | |
664 | return PTR_ERR(child); | |
665 | ||
666 | } | |
667 | ||
5725d66b DB |
668 | child = add_child(0, "twl4030_usb", |
669 | pdata->usb, sizeof(*pdata->usb), | |
670 | true, | |
671 | /* irq0 = USB_PRES, irq1 = USB */ | |
fc7b92fc B |
672 | pdata->irq_base + USB_PRES_INTR_OFFSET, |
673 | pdata->irq_base + USB_INTR_OFFSET); | |
f8ebdff0 | 674 | |
5725d66b DB |
675 | if (IS_ERR(child)) |
676 | return PTR_ERR(child); | |
dad759ff DB |
677 | |
678 | /* we need to connect regulators to this transceiver */ | |
f8ebdff0 RQ |
679 | if (twl_has_regulator() && child) { |
680 | usb1v5.dev = child; | |
681 | usb1v8.dev = child; | |
682 | usb3v1.dev = child; | |
683 | } | |
dad759ff DB |
684 | } |
685 | ||
80e45b1e TK |
686 | if (twl_has_watchdog()) { |
687 | child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0); | |
688 | if (IS_ERR(child)) | |
9c3664dd FB |
689 | return PTR_ERR(child); |
690 | } | |
691 | ||
692 | if (twl_has_pwrbutton()) { | |
693 | child = add_child(1, "twl4030_pwrbutton", | |
694 | NULL, 0, true, pdata->irq_base + 8 + 0, 0); | |
695 | if (IS_ERR(child)) | |
80e45b1e TK |
696 | return PTR_ERR(child); |
697 | } | |
698 | ||
d62abe56 MLC |
699 | if (twl_has_codec() && pdata->codec && twl_class_is_4030()) { |
700 | sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid; | |
f0fba2ad | 701 | child = add_child(sub_chip_id, "twl4030-audio", |
d62abe56 MLC |
702 | pdata->codec, sizeof(*pdata->codec), |
703 | false, 0, 0); | |
704 | if (IS_ERR(child)) | |
705 | return PTR_ERR(child); | |
706 | } | |
707 | ||
f0fba2ad | 708 | /* Phoenix codec driver is probed directly atm */ |
d62abe56 MLC |
709 | if (twl_has_codec() && pdata->codec && twl_class_is_6030()) { |
710 | sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid; | |
f0fba2ad | 711 | child = add_child(sub_chip_id, "twl6040-codec", |
0b83ddeb PU |
712 | pdata->codec, sizeof(*pdata->codec), |
713 | false, 0, 0); | |
714 | if (IS_ERR(child)) | |
715 | return PTR_ERR(child); | |
716 | } | |
717 | ||
9da66539 RN |
718 | /* twl4030 regulators */ |
719 | if (twl_has_regulator() && twl_class_is_4030()) { | |
dad759ff DB |
720 | child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1); |
721 | if (IS_ERR(child)) | |
722 | return PTR_ERR(child); | |
ab4abe05 JKS |
723 | |
724 | child = add_regulator(TWL4030_REG_VIO, pdata->vio); | |
725 | if (IS_ERR(child)) | |
726 | return PTR_ERR(child); | |
727 | ||
728 | child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1); | |
729 | if (IS_ERR(child)) | |
730 | return PTR_ERR(child); | |
731 | ||
732 | child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2); | |
733 | if (IS_ERR(child)) | |
734 | return PTR_ERR(child); | |
dad759ff DB |
735 | |
736 | child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1); | |
737 | if (IS_ERR(child)) | |
738 | return PTR_ERR(child); | |
739 | ||
740 | child = add_regulator(TWL4030_REG_VDAC, pdata->vdac); | |
741 | if (IS_ERR(child)) | |
742 | return PTR_ERR(child); | |
743 | ||
744 | child = add_regulator((features & TWL4030_VAUX2) | |
745 | ? TWL4030_REG_VAUX2_4030 | |
746 | : TWL4030_REG_VAUX2, | |
747 | pdata->vaux2); | |
748 | if (IS_ERR(child)) | |
749 | return PTR_ERR(child); | |
ab4abe05 JKS |
750 | |
751 | child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1); | |
752 | if (IS_ERR(child)) | |
753 | return PTR_ERR(child); | |
754 | ||
755 | child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2); | |
756 | if (IS_ERR(child)) | |
757 | return PTR_ERR(child); | |
758 | ||
759 | child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig); | |
760 | if (IS_ERR(child)) | |
761 | return PTR_ERR(child); | |
dad759ff DB |
762 | } |
763 | ||
dad759ff | 764 | /* maybe add LDOs that are omitted on cost-reduced parts */ |
9da66539 RN |
765 | if (twl_has_regulator() && !(features & TPS_SUBSET) |
766 | && twl_class_is_4030()) { | |
dad759ff DB |
767 | child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2); |
768 | if (IS_ERR(child)) | |
769 | return PTR_ERR(child); | |
dad759ff DB |
770 | |
771 | child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2); | |
772 | if (IS_ERR(child)) | |
773 | return PTR_ERR(child); | |
774 | ||
775 | child = add_regulator(TWL4030_REG_VSIM, pdata->vsim); | |
776 | if (IS_ERR(child)) | |
777 | return PTR_ERR(child); | |
778 | ||
779 | child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1); | |
780 | if (IS_ERR(child)) | |
781 | return PTR_ERR(child); | |
782 | ||
783 | child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3); | |
784 | if (IS_ERR(child)) | |
785 | return PTR_ERR(child); | |
786 | ||
787 | child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4); | |
788 | if (IS_ERR(child)) | |
789 | return PTR_ERR(child); | |
a603a7fa DB |
790 | } |
791 | ||
9da66539 RN |
792 | /* twl6030 regulators */ |
793 | if (twl_has_regulator() && twl_class_is_6030()) { | |
794 | child = add_regulator(TWL6030_REG_VMMC, pdata->vmmc); | |
795 | if (IS_ERR(child)) | |
796 | return PTR_ERR(child); | |
797 | ||
798 | child = add_regulator(TWL6030_REG_VPP, pdata->vpp); | |
799 | if (IS_ERR(child)) | |
800 | return PTR_ERR(child); | |
801 | ||
802 | child = add_regulator(TWL6030_REG_VUSIM, pdata->vusim); | |
803 | if (IS_ERR(child)) | |
804 | return PTR_ERR(child); | |
805 | ||
806 | child = add_regulator(TWL6030_REG_VANA, pdata->vana); | |
807 | if (IS_ERR(child)) | |
808 | return PTR_ERR(child); | |
809 | ||
810 | child = add_regulator(TWL6030_REG_VCXIO, pdata->vcxio); | |
811 | if (IS_ERR(child)) | |
812 | return PTR_ERR(child); | |
813 | ||
814 | child = add_regulator(TWL6030_REG_VDAC, pdata->vdac); | |
815 | if (IS_ERR(child)) | |
816 | return PTR_ERR(child); | |
817 | ||
818 | child = add_regulator(TWL6030_REG_VUSB, pdata->vusb); | |
819 | if (IS_ERR(child)) | |
820 | return PTR_ERR(child); | |
821 | ||
822 | child = add_regulator(TWL6030_REG_VAUX1_6030, pdata->vaux1); | |
823 | if (IS_ERR(child)) | |
824 | return PTR_ERR(child); | |
825 | ||
826 | child = add_regulator(TWL6030_REG_VAUX2_6030, pdata->vaux2); | |
827 | if (IS_ERR(child)) | |
828 | return PTR_ERR(child); | |
829 | ||
830 | child = add_regulator(TWL6030_REG_VAUX3_6030, pdata->vaux3); | |
831 | if (IS_ERR(child)) | |
832 | return PTR_ERR(child); | |
833 | } | |
834 | ||
11c39c4b GI |
835 | if (twl_has_bci() && pdata->bci && |
836 | !(features & (TPS_SUBSET | TWL5031))) { | |
837 | child = add_child(3, "twl4030_bci", | |
838 | pdata->bci, sizeof(*pdata->bci), false, | |
839 | /* irq0 = CHG_PRES, irq1 = BCI */ | |
840 | pdata->irq_base + BCI_PRES_INTR_OFFSET, | |
841 | pdata->irq_base + BCI_INTR_OFFSET); | |
842 | if (IS_ERR(child)) | |
843 | return PTR_ERR(child); | |
844 | } | |
845 | ||
5725d66b | 846 | return 0; |
a603a7fa DB |
847 | } |
848 | ||
849 | /*----------------------------------------------------------------------*/ | |
850 | ||
851 | /* | |
852 | * These three functions initialize the on-chip clock framework, | |
853 | * letting it generate the right frequencies for USB, MADC, and | |
854 | * other purposes. | |
855 | */ | |
856 | static inline int __init protect_pm_master(void) | |
857 | { | |
858 | int e = 0; | |
859 | ||
49e6f87e FB |
860 | e = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, |
861 | TWL4030_PM_MASTER_PROTECT_KEY); | |
a603a7fa DB |
862 | return e; |
863 | } | |
864 | ||
865 | static inline int __init unprotect_pm_master(void) | |
866 | { | |
867 | int e = 0; | |
868 | ||
49e6f87e FB |
869 | e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, |
870 | TWL4030_PM_MASTER_KEY_CFG1, | |
871 | TWL4030_PM_MASTER_PROTECT_KEY); | |
872 | e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, | |
873 | TWL4030_PM_MASTER_KEY_CFG2, | |
874 | TWL4030_PM_MASTER_PROTECT_KEY); | |
875 | ||
a603a7fa DB |
876 | return e; |
877 | } | |
878 | ||
38a68496 IK |
879 | static void clocks_init(struct device *dev, |
880 | struct twl4030_clock_init_data *clock) | |
a603a7fa DB |
881 | { |
882 | int e = 0; | |
883 | struct clk *osc; | |
884 | u32 rate; | |
885 | u8 ctrl = HFCLK_FREQ_26_MHZ; | |
886 | ||
887 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | |
888 | if (cpu_is_omap2430()) | |
e6b50c8d | 889 | osc = clk_get(dev, "osc_ck"); |
a603a7fa | 890 | else |
e6b50c8d | 891 | osc = clk_get(dev, "osc_sys_ck"); |
6354ab5c | 892 | |
a603a7fa | 893 | if (IS_ERR(osc)) { |
fc7b92fc | 894 | printk(KERN_WARNING "Skipping twl internal clock init and " |
a603a7fa DB |
895 | "using bootloader value (unknown osc rate)\n"); |
896 | return; | |
897 | } | |
898 | ||
899 | rate = clk_get_rate(osc); | |
900 | clk_put(osc); | |
901 | ||
6354ab5c SO |
902 | #else |
903 | /* REVISIT for non-OMAP systems, pass the clock rate from | |
904 | * board init code, using platform_data. | |
905 | */ | |
906 | osc = ERR_PTR(-EIO); | |
907 | ||
fc7b92fc | 908 | printk(KERN_WARNING "Skipping twl internal clock init and " |
6354ab5c SO |
909 | "using bootloader value (unknown osc rate)\n"); |
910 | ||
911 | return; | |
912 | #endif | |
913 | ||
a603a7fa DB |
914 | switch (rate) { |
915 | case 19200000: | |
916 | ctrl = HFCLK_FREQ_19p2_MHZ; | |
917 | break; | |
918 | case 26000000: | |
919 | ctrl = HFCLK_FREQ_26_MHZ; | |
920 | break; | |
921 | case 38400000: | |
922 | ctrl = HFCLK_FREQ_38p4_MHZ; | |
923 | break; | |
924 | } | |
925 | ||
926 | ctrl |= HIGH_PERF_SQ; | |
38a68496 IK |
927 | if (clock && clock->ck32k_lowpwr_enable) |
928 | ctrl |= CK32K_LOWPWR_EN; | |
929 | ||
a603a7fa DB |
930 | e |= unprotect_pm_master(); |
931 | /* effect->MADC+USB ck en */ | |
fc7b92fc | 932 | e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); |
a603a7fa DB |
933 | e |= protect_pm_master(); |
934 | ||
935 | if (e < 0) | |
936 | pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e); | |
937 | } | |
938 | ||
939 | /*----------------------------------------------------------------------*/ | |
940 | ||
e8deb28c B |
941 | int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end); |
942 | int twl4030_exit_irq(void); | |
943 | int twl4030_init_chip_irq(const char *chip); | |
944 | int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end); | |
945 | int twl6030_exit_irq(void); | |
a603a7fa | 946 | |
fc7b92fc | 947 | static int twl_remove(struct i2c_client *client) |
a603a7fa DB |
948 | { |
949 | unsigned i; | |
a30d46c0 | 950 | int status; |
a603a7fa | 951 | |
e8deb28c B |
952 | if (twl_class_is_4030()) |
953 | status = twl4030_exit_irq(); | |
954 | else | |
955 | status = twl6030_exit_irq(); | |
956 | ||
a30d46c0 DB |
957 | if (status < 0) |
958 | return status; | |
a603a7fa | 959 | |
fc7b92fc B |
960 | for (i = 0; i < TWL_NUM_SLAVES; i++) { |
961 | struct twl_client *twl = &twl_modules[i]; | |
a603a7fa DB |
962 | |
963 | if (twl->client && twl->client != client) | |
964 | i2c_unregister_device(twl->client); | |
fc7b92fc | 965 | twl_modules[i].client = NULL; |
a603a7fa DB |
966 | } |
967 | inuse = false; | |
968 | return 0; | |
969 | } | |
970 | ||
971 | /* NOTE: this driver only handles a single twl4030/tps659x0 chip */ | |
b5e102cd | 972 | static int __init |
fc7b92fc | 973 | twl_probe(struct i2c_client *client, const struct i2c_device_id *id) |
a603a7fa DB |
974 | { |
975 | int status; | |
976 | unsigned i; | |
977 | struct twl4030_platform_data *pdata = client->dev.platform_data; | |
a29aaf55 | 978 | u8 temp; |
a603a7fa DB |
979 | |
980 | if (!pdata) { | |
981 | dev_dbg(&client->dev, "no platform data?\n"); | |
982 | return -EINVAL; | |
983 | } | |
984 | ||
985 | if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) { | |
986 | dev_dbg(&client->dev, "can't talk I2C?\n"); | |
987 | return -EIO; | |
988 | } | |
989 | ||
a30d46c0 | 990 | if (inuse) { |
a603a7fa DB |
991 | dev_dbg(&client->dev, "driver is already in use\n"); |
992 | return -EBUSY; | |
993 | } | |
994 | ||
fc7b92fc B |
995 | for (i = 0; i < TWL_NUM_SLAVES; i++) { |
996 | struct twl_client *twl = &twl_modules[i]; | |
a603a7fa DB |
997 | |
998 | twl->address = client->addr + i; | |
999 | if (i == 0) | |
1000 | twl->client = client; | |
1001 | else { | |
1002 | twl->client = i2c_new_dummy(client->adapter, | |
1003 | twl->address); | |
1004 | if (!twl->client) { | |
a8643430 | 1005 | dev_err(&client->dev, |
a603a7fa DB |
1006 | "can't attach client %d\n", i); |
1007 | status = -ENOMEM; | |
1008 | goto fail; | |
1009 | } | |
a603a7fa DB |
1010 | } |
1011 | mutex_init(&twl->xfer_lock); | |
1012 | } | |
1013 | inuse = true; | |
e8deb28c B |
1014 | if ((id->driver_data) & TWL6030_CLASS) { |
1015 | twl_id = TWL6030_CLASS_ID; | |
1016 | twl_map = &twl6030_map[0]; | |
1017 | } else { | |
1018 | twl_id = TWL4030_CLASS_ID; | |
1019 | twl_map = &twl4030_map[0]; | |
1020 | } | |
a603a7fa DB |
1021 | |
1022 | /* setup clock framework */ | |
38a68496 | 1023 | clocks_init(&client->dev, pdata->clock); |
a603a7fa | 1024 | |
ebf0bd36 AK |
1025 | /* load power event scripts */ |
1026 | if (twl_has_power() && pdata->power) | |
1027 | twl4030_power_init(pdata->power); | |
1028 | ||
a603a7fa DB |
1029 | /* Maybe init the T2 Interrupt subsystem */ |
1030 | if (client->irq | |
1031 | && pdata->irq_base | |
1032 | && pdata->irq_end > pdata->irq_base) { | |
e8deb28c B |
1033 | if (twl_class_is_4030()) { |
1034 | twl4030_init_chip_irq(id->name); | |
1035 | status = twl4030_init_irq(client->irq, pdata->irq_base, | |
1036 | pdata->irq_end); | |
1037 | } else { | |
1038 | status = twl6030_init_irq(client->irq, pdata->irq_base, | |
1039 | pdata->irq_end); | |
1040 | } | |
1041 | ||
a30d46c0 DB |
1042 | if (status < 0) |
1043 | goto fail; | |
a603a7fa DB |
1044 | } |
1045 | ||
a29aaf55 MS |
1046 | /* Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface. |
1047 | * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0, | |
1048 | * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0. | |
1049 | */ | |
1050 | ||
1051 | if (twl_class_is_4030()) { | |
1052 | twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1); | |
1053 | temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \ | |
1054 | I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU); | |
1055 | twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1); | |
1056 | } | |
1057 | ||
dad759ff | 1058 | status = add_children(pdata, id->driver_data); |
a603a7fa DB |
1059 | fail: |
1060 | if (status < 0) | |
fc7b92fc | 1061 | twl_remove(client); |
a603a7fa DB |
1062 | return status; |
1063 | } | |
1064 | ||
fc7b92fc | 1065 | static const struct i2c_device_id twl_ids[] = { |
dad759ff DB |
1066 | { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */ |
1067 | { "twl5030", 0 }, /* T2 updated */ | |
1920a61e | 1068 | { "twl5031", TWL5031 }, /* TWL5030 updated */ |
dad759ff DB |
1069 | { "tps65950", 0 }, /* catalog version of twl5030 */ |
1070 | { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */ | |
1071 | { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */ | |
e8deb28c | 1072 | { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */ |
a603a7fa DB |
1073 | { /* end of list */ }, |
1074 | }; | |
fc7b92fc | 1075 | MODULE_DEVICE_TABLE(i2c, twl_ids); |
a603a7fa DB |
1076 | |
1077 | /* One Client Driver , 4 Clients */ | |
fc7b92fc | 1078 | static struct i2c_driver twl_driver = { |
a603a7fa | 1079 | .driver.name = DRIVER_NAME, |
fc7b92fc B |
1080 | .id_table = twl_ids, |
1081 | .probe = twl_probe, | |
1082 | .remove = twl_remove, | |
a603a7fa DB |
1083 | }; |
1084 | ||
fc7b92fc | 1085 | static int __init twl_init(void) |
a603a7fa | 1086 | { |
fc7b92fc | 1087 | return i2c_add_driver(&twl_driver); |
a603a7fa | 1088 | } |
fc7b92fc | 1089 | subsys_initcall(twl_init); |
a603a7fa | 1090 | |
fc7b92fc | 1091 | static void __exit twl_exit(void) |
a603a7fa | 1092 | { |
fc7b92fc | 1093 | i2c_del_driver(&twl_driver); |
a603a7fa | 1094 | } |
fc7b92fc | 1095 | module_exit(twl_exit); |
a603a7fa DB |
1096 | |
1097 | MODULE_AUTHOR("Texas Instruments, Inc."); | |
fc7b92fc | 1098 | MODULE_DESCRIPTION("I2C Core interface for TWL"); |
a603a7fa | 1099 | MODULE_LICENSE("GPL"); |