[net-next-2.6.git] / drivers / mfd / htc-egpio.c

/*
 * Support for the GPIO/IRQ expander chips present on several HTC phones.
 * These are implemented in CPLD chips present on the board.
 *
 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
 *
 * This file may be distributed under the terms of the GNU GPL license.
 */

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/mfd/htc-egpio.h>

struct egpio_chip {
	int              reg_start;
	int              cached_values;
	unsigned long    is_out;
	struct device    *dev;
	struct gpio_chip chip;
};

struct egpio_info {
	spinlock_t        lock;

	/* iomem info */
	void __iomem      *base_addr;
	int               bus_shift;	/* byte shift */
	int               reg_shift;	/* bit shift */
	int               reg_mask;

	/* irq info */
	int               ack_register;
	int               ack_write;
	u16               irqs_enabled;
	uint              irq_start;
	int               nirqs;
	uint              chained_irq;

	/* egpio info */
	struct egpio_chip *chip;
	int               nchips;
};

static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
{
	writew(value, ei->base_addr + (reg << ei->bus_shift));
}

static inline u16 egpio_readw(struct egpio_info *ei, int reg)
{
	return readw(ei->base_addr + (reg << ei->bus_shift));
}

/*
 * IRQs
 */

static inline void ack_irqs(struct egpio_info *ei)
{
	egpio_writew(ei->ack_write, ei, ei->ack_register);
	pr_debug("EGPIO ack - write %x to base+%x\n",
			ei->ack_write, ei->ack_register << ei->bus_shift);
}

static void egpio_ack(unsigned int irq)
{
}

/* There does not appear to be a way to proactively mask interrupts
 * on the egpio chip itself.  So, we simply ignore interrupts that
 * aren't desired. */
static void egpio_mask(unsigned int irq)
{
	struct egpio_info *ei = get_irq_chip_data(irq);
	ei->irqs_enabled &= ~(1 << (irq - ei->irq_start));
	pr_debug("EGPIO mask %d %04x\n", irq, ei->irqs_enabled);
}
static void egpio_unmask(unsigned int irq)
{
	struct egpio_info *ei = get_irq_chip_data(irq);
	ei->irqs_enabled |= 1 << (irq - ei->irq_start);
	pr_debug("EGPIO unmask %d %04x\n", irq, ei->irqs_enabled);
}

static struct irq_chip egpio_muxed_chip = {
	.name   = "htc-egpio",
	.ack	= egpio_ack,
	.mask   = egpio_mask,
	.unmask = egpio_unmask,
};

static void egpio_handler(unsigned int irq, struct irq_desc *desc)
{
	struct egpio_info *ei = get_irq_data(irq);
	int irqpin;

	/* Read current pins. */
	unsigned long readval = egpio_readw(ei, ei->ack_register);
	pr_debug("IRQ reg: %x\n", (unsigned int)readval);
	/* Ack/unmask interrupts. */
	ack_irqs(ei);
	/* Process all set pins. */
	readval &= ei->irqs_enabled;
	for_each_set_bit(irqpin, &readval, ei->nirqs) {
		/* Run irq handler */
		pr_debug("got IRQ %d\n", irqpin);
		irq = ei->irq_start + irqpin;
		desc = irq_to_desc(irq);
		desc->handle_irq(irq, desc);
	}
}

int htc_egpio_get_wakeup_irq(struct device *dev)
{
	struct egpio_info *ei = dev_get_drvdata(dev);

	/* Read current pins. */
	u16 readval = egpio_readw(ei, ei->ack_register);
	/* Ack/unmask interrupts. */
	ack_irqs(ei);
	/* Return first set pin. */
	readval &= ei->irqs_enabled;
	return ei->irq_start + ffs(readval) - 1;
}
EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);

static inline int egpio_pos(struct egpio_info *ei, int bit)
{
	return bit >> ei->reg_shift;
}

static inline int egpio_bit(struct egpio_info *ei, int bit)
{
	return 1 << (bit & ((1 << ei->reg_shift)-1));
}

/*
 * Input pins
 */

static int egpio_get(struct gpio_chip *chip, unsigned offset)
{
	struct egpio_chip *egpio;
	struct egpio_info *ei;
	unsigned           bit;
	int                reg;
	int                value;

	pr_debug("egpio_get_value(%d)\n", chip->base + offset);

	egpio = container_of(chip, struct egpio_chip, chip);
	ei    = dev_get_drvdata(egpio->dev);
	bit   = egpio_bit(ei, offset);
	reg   = egpio->reg_start + egpio_pos(ei, offset);

	value = egpio_readw(ei, reg);
	pr_debug("readw(%p + %x) = %x\n",
			ei->base_addr, reg << ei->bus_shift, value);
	return value & bit;
}

static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
	struct egpio_chip *egpio;

	egpio = container_of(chip, struct egpio_chip, chip);
	return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
}


/*
 * Output pins
 */

static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
	unsigned long     flag;
	struct egpio_chip *egpio;
	struct egpio_info *ei;
	unsigned          bit;
	int               pos;
	int               reg;
	int               shift;

	pr_debug("egpio_set(%s, %d(%d), %d)\n",
			chip->label, offset, offset+chip->base, value);

	egpio = container_of(chip, struct egpio_chip, chip);
	ei    = dev_get_drvdata(egpio->dev);
	bit   = egpio_bit(ei, offset);
	pos   = egpio_pos(ei, offset);
	reg   = egpio->reg_start + pos;
	shift = pos << ei->reg_shift;

	pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
			reg, (egpio->cached_values >> shift) & ei->reg_mask);

	spin_lock_irqsave(&ei->lock, flag);
	if (value)
		egpio->cached_values |= (1 << offset);
	else
		egpio->cached_values &= ~(1 << offset);
	egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
	spin_unlock_irqrestore(&ei->lock, flag);
}

static int egpio_direction_output(struct gpio_chip *chip,
					unsigned offset, int value)
{
	struct egpio_chip *egpio;

	egpio = container_of(chip, struct egpio_chip, chip);
	if (test_bit(offset, &egpio->is_out)) {
		egpio_set(chip, offset, value);
		return 0;
	} else {
		return -EINVAL;
	}
}

static void egpio_write_cache(struct egpio_info *ei)
{
	int               i;
	struct egpio_chip *egpio;
	int               shift;

	for (i = 0; i < ei->nchips; i++) {
		egpio = &(ei->chip[i]);
		if (!egpio->is_out)
			continue;

		for (shift = 0; shift < egpio->chip.ngpio;
				shift += (1<<ei->reg_shift)) {

			int reg = egpio->reg_start + egpio_pos(ei, shift);

			if (!((egpio->is_out >> shift) & ei->reg_mask))
				continue;

			pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
				(egpio->cached_values >> shift) & ei->reg_mask,
				egpio_readw(ei, reg));

			egpio_writew((egpio->cached_values >> shift)
					& ei->reg_mask, ei, reg);
		}
	}
}


/*
 * Setup
 */

static int __init egpio_probe(struct platform_device *pdev)
{
	struct htc_egpio_platform_data *pdata = pdev->dev.platform_data;
	struct resource   *res;
	struct egpio_info *ei;
	struct gpio_chip  *chip;
	unsigned int      irq, irq_end;
	int               i;
	int               ret;

	/* Initialize ei data structure. */
	ei = kzalloc(sizeof(*ei), GFP_KERNEL);
	if (!ei)
		return -ENOMEM;

	spin_lock_init(&ei->lock);

	/* Find chained irq */
	ret = -EINVAL;
	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (res)
		ei->chained_irq = res->start;

	/* Map egpio chip into virtual address space. */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		goto fail;
	ei->base_addr = ioremap_nocache(res->start, resource_size(res));
	if (!ei->base_addr)
		goto fail;
	pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);

	if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
		goto fail;
	ei->bus_shift = fls(pdata->bus_width - 1) - 3;
	pr_debug("bus_shift = %d\n", ei->bus_shift);

	if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
		goto fail;
	ei->reg_shift = fls(pdata->reg_width - 1);
	pr_debug("reg_shift = %d\n", ei->reg_shift);

	ei->reg_mask = (1 << pdata->reg_width) - 1;

	platform_set_drvdata(pdev, ei);

	ei->nchips = pdata->num_chips;
	ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL);
	if (!ei->chip) {
		ret = -ENOMEM;
		goto fail;
	}
	for (i = 0; i < ei->nchips; i++) {
		ei->chip[i].reg_start = pdata->chip[i].reg_start;
		ei->chip[i].cached_values = pdata->chip[i].initial_values;
		ei->chip[i].is_out = pdata->chip[i].direction;
		ei->chip[i].dev = &(pdev->dev);
		chip = &(ei->chip[i].chip);
		chip->label           = "htc-egpio";
		chip->dev             = &pdev->dev;
		chip->owner           = THIS_MODULE;
		chip->get             = egpio_get;
		chip->set             = egpio_set;
		chip->direction_input = egpio_direction_input;
		chip->direction_output = egpio_direction_output;
		chip->base            = pdata->chip[i].gpio_base;
		chip->ngpio           = pdata->chip[i].num_gpios;

		gpiochip_add(chip);
	}

	/* Set initial pin values */
	egpio_write_cache(ei);

	ei->irq_start = pdata->irq_base;
	ei->nirqs = pdata->num_irqs;
	ei->ack_register = pdata->ack_register;

	if (ei->chained_irq) {
		/* Setup irq handlers */
		ei->ack_write = 0xFFFF;
		if (pdata->invert_acks)
			ei->ack_write = 0;
		irq_end = ei->irq_start + ei->nirqs;
		for (irq = ei->irq_start; irq < irq_end; irq++) {
			set_irq_chip(irq, &egpio_muxed_chip);
			set_irq_chip_data(irq, ei);
			set_irq_handler(irq, handle_simple_irq);
			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
		}
		set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
		set_irq_data(ei->chained_irq, ei);
		set_irq_chained_handler(ei->chained_irq, egpio_handler);
		ack_irqs(ei);

		device_init_wakeup(&pdev->dev, 1);
	}

	return 0;

fail:
	printk(KERN_ERR "EGPIO failed to setup\n");
	kfree(ei);
	return ret;
}

static int __exit egpio_remove(struct platform_device *pdev)
{
	struct egpio_info *ei = platform_get_drvdata(pdev);
	unsigned int      irq, irq_end;

	if (ei->chained_irq) {
		irq_end = ei->irq_start + ei->nirqs;
		for (irq = ei->irq_start; irq < irq_end; irq++) {
			set_irq_chip(irq, NULL);
			set_irq_handler(irq, NULL);
			set_irq_flags(irq, 0);
		}
		set_irq_chained_handler(ei->chained_irq, NULL);
		device_init_wakeup(&pdev->dev, 0);
	}
	iounmap(ei->base_addr);
	kfree(ei->chip);
	kfree(ei);

	return 0;
}

#ifdef CONFIG_PM
static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
{
	struct egpio_info *ei = platform_get_drvdata(pdev);

	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
		enable_irq_wake(ei->chained_irq);
	return 0;
}

static int egpio_resume(struct platform_device *pdev)
{
	struct egpio_info *ei = platform_get_drvdata(pdev);

	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
		disable_irq_wake(ei->chained_irq);

	/* Update registers from the cache, in case
	   the CPLD was powered off during suspend */
	egpio_write_cache(ei);
	return 0;
}
#else
#define egpio_suspend NULL
#define egpio_resume NULL
#endif


static struct platform_driver egpio_driver = {
	.driver = {
		.name = "htc-egpio",
	},
	.remove       = __exit_p(egpio_remove),
	.suspend      = egpio_suspend,
	.resume       = egpio_resume,
};

static int __init egpio_init(void)
{
	return platform_driver_probe(&egpio_driver, egpio_probe);
}

static void __exit egpio_exit(void)
{
	platform_driver_unregister(&egpio_driver);
}

/* start early for dependencies */
subsys_initcall(egpio_init);
module_exit(egpio_exit)

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");
Commit	Line	Data
a1635b8f PZ	1	/*
	2	* Support for the GPIO/IRQ expander chips present on several HTC phones.
	3	* These are implemented in CPLD chips present on the board.
	4	*
	5	* Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
	6	* Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
	7	*
	8	* This file may be distributed under the terms of the GNU GPL license.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/errno.h>
	13	#include <linux/interrupt.h>
	14	#include <linux/irq.h>
	15	#include <linux/io.h>
	16	#include <linux/spinlock.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/module.h>
	19	#include <linux/mfd/htc-egpio.h>
	20
	21	struct egpio_chip {
	22	int reg_start;
	23	int cached_values;
	24	unsigned long is_out;
	25	struct device *dev;
	26	struct gpio_chip chip;
	27	};
	28
	29	struct egpio_info {
	30	spinlock_t lock;
	31
	32	/* iomem info */
	33	void __iomem *base_addr;
	34	int bus_shift; /* byte shift */
	35	int reg_shift; /* bit shift */
	36	int reg_mask;
	37
	38	/* irq info */
	39	int ack_register;
	40	int ack_write;
	41	u16 irqs_enabled;
	42	uint irq_start;
	43	int nirqs;
	44	uint chained_irq;
	45
	46	/* egpio info */
	47	struct egpio_chip *chip;
	48	int nchips;
	49	};
	50
	51	static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
	52	{
	53	writew(value, ei->base_addr + (reg << ei->bus_shift));
	54	}
	55
	56	static inline u16 egpio_readw(struct egpio_info *ei, int reg)
	57	{
	58	return readw(ei->base_addr + (reg << ei->bus_shift));
	59	}
	60
	61	/*
	62	* IRQs
	63	*/
	64
65	static inline void ack_irqs(struct egpio_info *ei)
66	{
67	egpio_writew(ei->ack_write, ei, ei->ack_register);
68	pr_debug("EGPIO ack - write %x to base+%x\n",
69	ei->ack_write, ei->ack_register << ei->bus_shift);
70	}
71
72	static void egpio_ack(unsigned int irq)
73	{
74	}
75
76	/* There does not appear to be a way to proactively mask interrupts
77	* on the egpio chip itself. So, we simply ignore interrupts that
78	* aren't desired. */
79	static void egpio_mask(unsigned int irq)
80	{
81	struct egpio_info *ei = get_irq_chip_data(irq);
82	ei->irqs_enabled &= ~(1 << (irq - ei->irq_start));
83	pr_debug("EGPIO mask %d %04x\n", irq, ei->irqs_enabled);
84	}
85	static void egpio_unmask(unsigned int irq)
86	{
87	struct egpio_info *ei = get_irq_chip_data(irq);
88	ei->irqs_enabled \|= 1 << (irq - ei->irq_start);
89	pr_debug("EGPIO unmask %d %04x\n", irq, ei->irqs_enabled);
90	}
91
92	static struct irq_chip egpio_muxed_chip = {
93	.name = "htc-egpio",
94	.ack = egpio_ack,
95	.mask = egpio_mask,
96	.unmask = egpio_unmask,
97	};
98
99	static void egpio_handler(unsigned int irq, struct irq_desc *desc)
100	{
101	struct egpio_info *ei = get_irq_data(irq);
102	int irqpin;
103
104	/* Read current pins. */
105	unsigned long readval = egpio_readw(ei, ei->ack_register);
106	pr_debug("IRQ reg: %x\n", (unsigned int)readval);
107	/* Ack/unmask interrupts. */
108	ack_irqs(ei);
109	/* Process all set pins. */
110	readval &= ei->irqs_enabled;
984b3f57	111	for_each_set_bit(irqpin, &readval, ei->nirqs) {
a1635b8f PZ	112	/* Run irq handler */
	113	pr_debug("got IRQ %d\n", irqpin);
	114	irq = ei->irq_start + irqpin;
08678b08	115	desc = irq_to_desc(irq);
a1635b8f PZ	116	desc->handle_irq(irq, desc);
	117	}
	118	}
	119
	120	int htc_egpio_get_wakeup_irq(struct device *dev)
	121	{
	122	struct egpio_info *ei = dev_get_drvdata(dev);
	123
	124	/* Read current pins. */
	125	u16 readval = egpio_readw(ei, ei->ack_register);
	126	/* Ack/unmask interrupts. */
	127	ack_irqs(ei);
	128	/* Return first set pin. */
	129	readval &= ei->irqs_enabled;
	130	return ei->irq_start + ffs(readval) - 1;
	131	}
	132	EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
	133
	134	static inline int egpio_pos(struct egpio_info *ei, int bit)
	135	{
	136	return bit >> ei->reg_shift;
	137	}
	138
	139	static inline int egpio_bit(struct egpio_info *ei, int bit)
	140	{
	141	return 1 << (bit & ((1 << ei->reg_shift)-1));
	142	}
	143
	144	/*
	145	* Input pins
	146	*/
	147
	148	static int egpio_get(struct gpio_chip *chip, unsigned offset)
	149	{
	150	struct egpio_chip *egpio;
	151	struct egpio_info *ei;
	152	unsigned bit;
	153	int reg;
	154	int value;
	155
	156	pr_debug("egpio_get_value(%d)\n", chip->base + offset);
	157
	158	egpio = container_of(chip, struct egpio_chip, chip);
	159	ei = dev_get_drvdata(egpio->dev);
	160	bit = egpio_bit(ei, offset);
	161	reg = egpio->reg_start + egpio_pos(ei, offset);
	162
	163	value = egpio_readw(ei, reg);
	164	pr_debug("readw(%p + %x) = %x\n",
	165	ei->base_addr, reg << ei->bus_shift, value);
	166	return value & bit;
	167	}
	168
	169	static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
	170	{
	171	struct egpio_chip *egpio;
	172
	173	egpio = container_of(chip, struct egpio_chip, chip);
	174	return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
	175	}
	176
	177
	178	/*
	179	* Output pins
180	*/
181
182	static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
183	{
184	unsigned long flag;
185	struct egpio_chip *egpio;
186	struct egpio_info *ei;
187	unsigned bit;
188	int pos;
189	int reg;
190	int shift;
191
192	pr_debug("egpio_set(%s, %d(%d), %d)\n",
193	chip->label, offset, offset+chip->base, value);
194
195	egpio = container_of(chip, struct egpio_chip, chip);
196	ei = dev_get_drvdata(egpio->dev);
197	bit = egpio_bit(ei, offset);
198	pos = egpio_pos(ei, offset);
199	reg = egpio->reg_start + pos;
200	shift = pos << ei->reg_shift;
201
202	pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
203	reg, (egpio->cached_values >> shift) & ei->reg_mask);
204
205	spin_lock_irqsave(&ei->lock, flag);
206	if (value)
207	egpio->cached_values \|= (1 << offset);
208	else
209	egpio->cached_values &= ~(1 << offset);
210	egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
211	spin_unlock_irqrestore(&ei->lock, flag);
212	}
213
214	static int egpio_direction_output(struct gpio_chip *chip,
215	unsigned offset, int value)
216	{
217	struct egpio_chip *egpio;
218
219	egpio = container_of(chip, struct egpio_chip, chip);
220	if (test_bit(offset, &egpio->is_out)) {
221	egpio_set(chip, offset, value);
222	return 0;
223	} else {
224	return -EINVAL;
225	}
226	}
227
228	static void egpio_write_cache(struct egpio_info *ei)
229	{
230	int i;
231	struct egpio_chip *egpio;
232	int shift;
233
234	for (i = 0; i < ei->nchips; i++) {
235	egpio = &(ei->chip[i]);
236	if (!egpio->is_out)
237	continue;
238
239	for (shift = 0; shift < egpio->chip.ngpio;
240	shift += (1<<ei->reg_shift)) {
241
242	int reg = egpio->reg_start + egpio_pos(ei, shift);
243
244	if (!((egpio->is_out >> shift) & ei->reg_mask))
245	continue;
246
247	pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
248	(egpio->cached_values >> shift) & ei->reg_mask,
249	egpio_readw(ei, reg));
250
251	egpio_writew((egpio->cached_values >> shift)
252	& ei->reg_mask, ei, reg);
253	}
254	}
255	}
256
257
258	/*
259	* Setup
260	*/
261
262	static int __init egpio_probe(struct platform_device *pdev)
263	{
264	struct htc_egpio_platform_data *pdata = pdev->dev.platform_data;
265	struct resource *res;
266	struct egpio_info *ei;
267	struct gpio_chip *chip;
268	unsigned int irq, irq_end;
269	int i;
270	int ret;
271
272	/* Initialize ei data structure. */
273	ei = kzalloc(sizeof(*ei), GFP_KERNEL);
274	if (!ei)
275	return -ENOMEM;
276
277	spin_lock_init(&ei->lock);
278
279	/* Find chained irq */
280	ret = -EINVAL;
281	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
282	if (res)
283	ei->chained_irq = res->start;
284
285	/* Map egpio chip into virtual address space. */
286	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
287	if (!res)
288	goto fail;
9427c34b	289	ei->base_addr = ioremap_nocache(res->start, resource_size(res));
a1635b8f PZ	290	if (!ei->base_addr)
a1635b8f PZ	291	goto fail;
504f97f8	292	pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
a1635b8f PZ	293
	294	if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
	295	goto fail;
	296	ei->bus_shift = fls(pdata->bus_width - 1) - 3;
	297	pr_debug("bus_shift = %d\n", ei->bus_shift);
	298
	299	if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
	300	goto fail;
	301	ei->reg_shift = fls(pdata->reg_width - 1);
	302	pr_debug("reg_shift = %d\n", ei->reg_shift);
	303
	304	ei->reg_mask = (1 << pdata->reg_width) - 1;
	305
	306	platform_set_drvdata(pdev, ei);
	307
	308	ei->nchips = pdata->num_chips;
	309	ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL);
720fd66d	310	if (!ei->chip) {
a1635b8f PZ	311	ret = -ENOMEM;
	312	goto fail;
	313	}
	314	for (i = 0; i < ei->nchips; i++) {
	315	ei->chip[i].reg_start = pdata->chip[i].reg_start;
	316	ei->chip[i].cached_values = pdata->chip[i].initial_values;
	317	ei->chip[i].is_out = pdata->chip[i].direction;
	318	ei->chip[i].dev = &(pdev->dev);
	319	chip = &(ei->chip[i].chip);
	320	chip->label = "htc-egpio";
d8f388d8 DB	321	chip->dev = &pdev->dev;
d8f388d8 DB	322	chip->owner = THIS_MODULE;
a1635b8f PZ	323	chip->get = egpio_get;
	324	chip->set = egpio_set;
	325	chip->direction_input = egpio_direction_input;
	326	chip->direction_output = egpio_direction_output;
	327	chip->base = pdata->chip[i].gpio_base;
	328	chip->ngpio = pdata->chip[i].num_gpios;
	329
	330	gpiochip_add(chip);
	331	}
	332
	333	/* Set initial pin values */
	334	egpio_write_cache(ei);
	335
	336	ei->irq_start = pdata->irq_base;
	337	ei->nirqs = pdata->num_irqs;
	338	ei->ack_register = pdata->ack_register;
	339
	340	if (ei->chained_irq) {
	341	/* Setup irq handlers */
	342	ei->ack_write = 0xFFFF;
	343	if (pdata->invert_acks)
	344	ei->ack_write = 0;
	345	irq_end = ei->irq_start + ei->nirqs;
	346	for (irq = ei->irq_start; irq < irq_end; irq++) {
	347	set_irq_chip(irq, &egpio_muxed_chip);
	348	set_irq_chip_data(irq, ei);
	349	set_irq_handler(irq, handle_simple_irq);
	350	set_irq_flags(irq, IRQF_VALID \| IRQF_PROBE);
	351	}
	352	set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
	353	set_irq_data(ei->chained_irq, ei);
	354	set_irq_chained_handler(ei->chained_irq, egpio_handler);
	355	ack_irqs(ei);
	356
	357	device_init_wakeup(&pdev->dev, 1);
	358	}
	359
	360	return 0;
	361
	362	fail:
	363	printk(KERN_ERR "EGPIO failed to setup\n");
	364	kfree(ei);
	365	return ret;
	366	}
	367
	368	static int __exit egpio_remove(struct platform_device *pdev)
	369	{
	370	struct egpio_info *ei = platform_get_drvdata(pdev);
	371	unsigned int irq, irq_end;
	372
	373	if (ei->chained_irq) {
	374	irq_end = ei->irq_start + ei->nirqs;
	375	for (irq = ei->irq_start; irq < irq_end; irq++) {
	376	set_irq_chip(irq, NULL);
	377	set_irq_handler(irq, NULL);
	378	set_irq_flags(irq, 0);
	379	}
	380	set_irq_chained_handler(ei->chained_irq, NULL);
	381	device_init_wakeup(&pdev->dev, 0);
	382	}
	383	iounmap(ei->base_addr);
	384	kfree(ei->chip);
	385	kfree(ei);
	386
387	return 0;
388	}
389
390	#ifdef CONFIG_PM
391	static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
392	{
393	struct egpio_info *ei = platform_get_drvdata(pdev);
394
395	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
396	enable_irq_wake(ei->chained_irq);
397	return 0;
398	}
399
400	static int egpio_resume(struct platform_device *pdev)
401	{
402	struct egpio_info *ei = platform_get_drvdata(pdev);
403
404	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
405	disable_irq_wake(ei->chained_irq);
406
407	/* Update registers from the cache, in case
408	the CPLD was powered off during suspend */
409	egpio_write_cache(ei);
410	return 0;
411	}
412	#else
413	#define egpio_suspend NULL
414	#define egpio_resume NULL
415	#endif
416
417
418	static struct platform_driver egpio_driver = {
419	.driver = {
420	.name = "htc-egpio",
421	},
422	.remove = __exit_p(egpio_remove),
423	.suspend = egpio_suspend,
424	.resume = egpio_resume,
425	};
426
427	static int __init egpio_init(void)
428	{
429	return platform_driver_probe(&egpio_driver, egpio_probe);
430	}
431
432	static void __exit egpio_exit(void)
433	{
434	platform_driver_unregister(&egpio_driver);
435	}
436
437	/* start early for dependencies */
438	subsys_initcall(egpio_init);
439	module_exit(egpio_exit)
440
441	MODULE_LICENSE("GPL");
442	MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");