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Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[net-next-2.6.git] / drivers / media / video / mx3_camera.c
CommitLineData
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1/*
2 * V4L2 Driver for i.MX3x camera host
3 *
4 * Copyright (C) 2008
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/version.h>
15#include <linux/videodev2.h>
16#include <linux/platform_device.h>
17#include <linux/clk.h>
18#include <linux/vmalloc.h>
19#include <linux/interrupt.h>
f39c1ab3 20#include <linux/sched.h>
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21
22#include <media/v4l2-common.h>
23#include <media/v4l2-dev.h>
24#include <media/videobuf-dma-contig.h>
25#include <media/soc_camera.h>
760697be 26#include <media/soc_mediabus.h>
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27
28#include <mach/ipu.h>
29#include <mach/mx3_camera.h>
30
31#define MX3_CAM_DRV_NAME "mx3-camera"
32
33/* CMOS Sensor Interface Registers */
34#define CSI_REG_START 0x60
35
36#define CSI_SENS_CONF (0x60 - CSI_REG_START)
37#define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
38#define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
39#define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
40#define CSI_TST_CTRL (0x70 - CSI_REG_START)
41#define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
42#define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
43#define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
44#define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
45#define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
46
47#define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
48#define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
49#define CSI_SENS_CONF_DATA_POL_SHIFT 2
50#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
51#define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
52#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
53#define CSI_SENS_CONF_DATA_FMT_SHIFT 8
54#define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
55#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
56#define CSI_SENS_CONF_DIVRATIO_SHIFT 16
57
58#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
59#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
61
62#define MAX_VIDEO_MEM 16
63
64struct mx3_camera_buffer {
65 /* common v4l buffer stuff -- must be first */
66 struct videobuf_buffer vb;
760697be 67 enum v4l2_mbus_pixelcode code;
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68
69 /* One descriptot per scatterlist (per frame) */
70 struct dma_async_tx_descriptor *txd;
71
72 /* We have to "build" a scatterlist ourselves - one element per frame */
73 struct scatterlist sg;
74};
75
76/**
77 * struct mx3_camera_dev - i.MX3x camera (CSI) object
78 * @dev: camera device, to which the coherent buffer is attached
79 * @icd: currently attached camera sensor
80 * @clk: pointer to clock
81 * @base: remapped register base address
82 * @pdata: platform data
83 * @platform_flags: platform flags
84 * @mclk: master clock frequency in Hz
85 * @capture: list of capture videobuffers
86 * @lock: protects video buffer lists
87 * @active: active video buffer
88 * @idmac_channel: array of pointers to IPU DMAC DMA channels
89 * @soc_host: embedded soc_host object
90 */
91struct mx3_camera_dev {
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92 /*
93 * i.MX3x is only supposed to handle one camera on its Camera Sensor
94 * Interface. If anyone ever builds hardware to enable more than one
95 * camera _simultaneously_, they will have to modify this driver too
96 */
97 struct soc_camera_device *icd;
98 struct clk *clk;
99
100 void __iomem *base;
101
102 struct mx3_camera_pdata *pdata;
103
104 unsigned long platform_flags;
105 unsigned long mclk;
106
107 struct list_head capture;
108 spinlock_t lock; /* Protects video buffer lists */
109 struct mx3_camera_buffer *active;
110
111 /* IDMAC / dmaengine interface */
112 struct idmac_channel *idmac_channel[1]; /* We need one channel */
113
114 struct soc_camera_host soc_host;
115};
116
117struct dma_chan_request {
118 struct mx3_camera_dev *mx3_cam;
119 enum ipu_channel id;
120};
121
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122static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
123{
124 return __raw_readl(mx3->base + reg);
125}
126
127static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
128{
129 __raw_writel(value, mx3->base + reg);
130}
131
132/* Called from the IPU IDMAC ISR */
133static void mx3_cam_dma_done(void *arg)
134{
135 struct idmac_tx_desc *desc = to_tx_desc(arg);
136 struct dma_chan *chan = desc->txd.chan;
137 struct idmac_channel *ichannel = to_idmac_chan(chan);
138 struct mx3_camera_dev *mx3_cam = ichannel->client;
139 struct videobuf_buffer *vb;
140
141 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
142 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
143
144 spin_lock(&mx3_cam->lock);
145 if (mx3_cam->active) {
146 vb = &mx3_cam->active->vb;
147
148 list_del_init(&vb->queue);
149 vb->state = VIDEOBUF_DONE;
150 do_gettimeofday(&vb->ts);
151 vb->field_count++;
152 wake_up(&vb->done);
153 }
154
155 if (list_empty(&mx3_cam->capture)) {
156 mx3_cam->active = NULL;
157 spin_unlock(&mx3_cam->lock);
158
159 /*
160 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
161 * not get updated
162 */
163 return;
164 }
165
166 mx3_cam->active = list_entry(mx3_cam->capture.next,
167 struct mx3_camera_buffer, vb.queue);
168 mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
169 spin_unlock(&mx3_cam->lock);
170}
171
172static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
173{
174 struct soc_camera_device *icd = vq->priv_data;
175 struct videobuf_buffer *vb = &buf->vb;
176 struct dma_async_tx_descriptor *txd = buf->txd;
177 struct idmac_channel *ichan;
178
179 BUG_ON(in_interrupt());
180
0166b743 181 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
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182 vb, vb->baddr, vb->bsize);
183
184 /*
185 * This waits until this buffer is out of danger, i.e., until it is no
186 * longer in STATE_QUEUED or STATE_ACTIVE
187 */
0e0809a5 188 videobuf_waiton(vq, vb, 0, 0);
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189 if (txd) {
190 ichan = to_idmac_chan(txd->chan);
191 async_tx_ack(txd);
192 }
193 videobuf_dma_contig_free(vq, vb);
194 buf->txd = NULL;
195
196 vb->state = VIDEOBUF_NEEDS_INIT;
197}
198
199/*
200 * Videobuf operations
201 */
202
203/*
204 * Calculate the __buffer__ (not data) size and number of buffers.
205 * Called with .vb_lock held
206 */
207static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
208 unsigned int *size)
209{
210 struct soc_camera_device *icd = vq->priv_data;
211 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
212 struct mx3_camera_dev *mx3_cam = ici->priv;
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213 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
214 icd->current_fmt->host_fmt);
215
216 if (bytes_per_line < 0)
217 return bytes_per_line;
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218
219 if (!mx3_cam->idmac_channel[0])
220 return -EINVAL;
221
760697be 222 *size = bytes_per_line * icd->user_height;
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223
224 if (!*count)
225 *count = 32;
226
227 if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
228 *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
229
230 return 0;
231}
232
233/* Called with .vb_lock held */
234static int mx3_videobuf_prepare(struct videobuf_queue *vq,
235 struct videobuf_buffer *vb, enum v4l2_field field)
236{
237 struct soc_camera_device *icd = vq->priv_data;
238 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
239 struct mx3_camera_dev *mx3_cam = ici->priv;
240 struct mx3_camera_buffer *buf =
241 container_of(vb, struct mx3_camera_buffer, vb);
760697be 242 size_t new_size;
4f67130a 243 int ret;
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244 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
245 icd->current_fmt->host_fmt);
246
247 if (bytes_per_line < 0)
248 return bytes_per_line;
249
250 new_size = bytes_per_line * icd->user_height;
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251
252 /*
253 * I think, in buf_prepare you only have to protect global data,
254 * the actual buffer is yours
255 */
256
760697be 257 if (buf->code != icd->current_fmt->code ||
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258 vb->width != icd->user_width ||
259 vb->height != icd->user_height ||
4f67130a 260 vb->field != field) {
760697be 261 buf->code = icd->current_fmt->code;
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262 vb->width = icd->user_width;
263 vb->height = icd->user_height;
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264 vb->field = field;
265 if (vb->state != VIDEOBUF_NEEDS_INIT)
266 free_buffer(vq, buf);
267 }
268
269 if (vb->baddr && vb->bsize < new_size) {
270 /* User provided buffer, but it is too small */
271 ret = -ENOMEM;
272 goto out;
273 }
274
275 if (vb->state == VIDEOBUF_NEEDS_INIT) {
276 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
277 struct scatterlist *sg = &buf->sg;
278
279 /*
280 * The total size of video-buffers that will be allocated / mapped.
281 * *size that we calculated in videobuf_setup gets assigned to
282 * vb->bsize, and now we use the same calculation to get vb->size.
283 */
284 vb->size = new_size;
285
286 /* This actually (allocates and) maps buffers */
287 ret = videobuf_iolock(vq, vb, NULL);
288 if (ret)
289 goto fail;
290
291 /*
292 * We will have to configure the IDMAC channel. It has two slots
293 * for DMA buffers, we shall enter the first two buffers there,
294 * and then submit new buffers in DMA-ready interrupts
295 */
296 sg_init_table(sg, 1);
297 sg_dma_address(sg) = videobuf_to_dma_contig(vb);
298 sg_dma_len(sg) = vb->size;
299
300 buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
301 &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
302 DMA_PREP_INTERRUPT);
303 if (!buf->txd) {
304 ret = -EIO;
305 goto fail;
306 }
307
308 buf->txd->callback_param = buf->txd;
309 buf->txd->callback = mx3_cam_dma_done;
310
311 vb->state = VIDEOBUF_PREPARED;
312 }
313
314 return 0;
315
316fail:
317 free_buffer(vq, buf);
318out:
319 return ret;
320}
321
322static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
323{
324 /* Add more formats as need arises and test possibilities appear... */
325 switch (fourcc) {
326 case V4L2_PIX_FMT_RGB565:
327 return IPU_PIX_FMT_RGB565;
328 case V4L2_PIX_FMT_RGB24:
329 return IPU_PIX_FMT_RGB24;
330 case V4L2_PIX_FMT_RGB332:
331 return IPU_PIX_FMT_RGB332;
332 case V4L2_PIX_FMT_YUV422P:
333 return IPU_PIX_FMT_YVU422P;
334 default:
335 return IPU_PIX_FMT_GENERIC;
336 }
337}
338
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339/*
340 * Called with .vb_lock mutex held and
341 * under spinlock_irqsave(&mx3_cam->lock, ...)
342 */
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343static void mx3_videobuf_queue(struct videobuf_queue *vq,
344 struct videobuf_buffer *vb)
345{
346 struct soc_camera_device *icd = vq->priv_data;
347 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
348 struct mx3_camera_dev *mx3_cam = ici->priv;
349 struct mx3_camera_buffer *buf =
350 container_of(vb, struct mx3_camera_buffer, vb);
351 struct dma_async_tx_descriptor *txd = buf->txd;
352 struct idmac_channel *ichan = to_idmac_chan(txd->chan);
353 struct idmac_video_param *video = &ichan->params.video;
4f67130a 354 dma_cookie_t cookie;
760697be 355 u32 fourcc = icd->current_fmt->host_fmt->fourcc;
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356
357 BUG_ON(!irqs_disabled());
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358
359 /* This is the configuration of one sg-element */
760697be 360 video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
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361 video->out_width = icd->user_width;
362 video->out_height = icd->user_height;
363 video->out_stride = icd->user_width;
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364
365#ifdef DEBUG
366 /* helps to see what DMA actually has written */
367 memset((void *)vb->baddr, 0xaa, vb->bsize);
368#endif
369
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370 list_add_tail(&vb->queue, &mx3_cam->capture);
371
372 if (!mx3_cam->active) {
373 mx3_cam->active = buf;
374 vb->state = VIDEOBUF_ACTIVE;
375 } else {
376 vb->state = VIDEOBUF_QUEUED;
377 }
378
2dd54a54 379 spin_unlock_irq(&mx3_cam->lock);
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380
381 cookie = txd->tx_submit(txd);
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382 dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n",
383 cookie, sg_dma_address(&buf->sg));
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384
385 spin_lock_irq(&mx3_cam->lock);
386
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387 if (cookie >= 0)
388 return;
389
390 /* Submit error */
391 vb->state = VIDEOBUF_PREPARED;
392
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393 list_del_init(&vb->queue);
394
395 if (mx3_cam->active == buf)
396 mx3_cam->active = NULL;
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397}
398
399/* Called with .vb_lock held */
400static void mx3_videobuf_release(struct videobuf_queue *vq,
401 struct videobuf_buffer *vb)
402{
403 struct soc_camera_device *icd = vq->priv_data;
404 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
405 struct mx3_camera_dev *mx3_cam = ici->priv;
406 struct mx3_camera_buffer *buf =
407 container_of(vb, struct mx3_camera_buffer, vb);
408 unsigned long flags;
409
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410 dev_dbg(icd->dev.parent,
411 "Release%s DMA 0x%08x (state %d), queue %sempty\n",
4f67130a 412 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
0166b743 413 vb->state, list_empty(&vb->queue) ? "" : "not ");
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414 spin_lock_irqsave(&mx3_cam->lock, flags);
415 if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
416 !list_empty(&vb->queue)) {
417 vb->state = VIDEOBUF_ERROR;
418
419 list_del_init(&vb->queue);
420 if (mx3_cam->active == buf)
421 mx3_cam->active = NULL;
422 }
423 spin_unlock_irqrestore(&mx3_cam->lock, flags);
424 free_buffer(vq, buf);
425}
426
427static struct videobuf_queue_ops mx3_videobuf_ops = {
428 .buf_setup = mx3_videobuf_setup,
429 .buf_prepare = mx3_videobuf_prepare,
430 .buf_queue = mx3_videobuf_queue,
431 .buf_release = mx3_videobuf_release,
432};
433
434static void mx3_camera_init_videobuf(struct videobuf_queue *q,
435 struct soc_camera_device *icd)
436{
437 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
438 struct mx3_camera_dev *mx3_cam = ici->priv;
439
979ea1dd 440 videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, icd->dev.parent,
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441 &mx3_cam->lock,
442 V4L2_BUF_TYPE_VIDEO_CAPTURE,
443 V4L2_FIELD_NONE,
e3cfd447
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444 sizeof(struct mx3_camera_buffer), icd,
445 NULL);
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446}
447
448/* First part of ipu_csi_init_interface() */
449static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
450 struct soc_camera_device *icd)
451{
452 u32 conf;
453 long rate;
454
455 /* Set default size: ipu_csi_set_window_size() */
456 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
457 /* ...and position to 0:0: ipu_csi_set_window_pos() */
458 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
459 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
460
461 /* We use only gated clock synchronisation mode so far */
462 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
463
464 /* Set generic data, platform-biggest bus-width */
465 conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
466
467 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
468 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
469 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
470 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
471 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
472 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
473 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
474 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
475
476 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
477 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
478 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
479 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
480 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
481 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
482 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
483 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
484 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
485 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
486 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
487 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
488
489 /* ipu_csi_init_interface() */
490 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
491
492 clk_enable(mx3_cam->clk);
493 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
0166b743 494 dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
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495 if (rate)
496 clk_set_rate(mx3_cam->clk, rate);
497}
498
499/* Called with .video_lock held */
500static int mx3_camera_add_device(struct soc_camera_device *icd)
501{
502 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
503 struct mx3_camera_dev *mx3_cam = ici->priv;
4f67130a 504
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505 if (mx3_cam->icd)
506 return -EBUSY;
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507
508 mx3_camera_activate(mx3_cam, icd);
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509
510 mx3_cam->icd = icd;
511
0166b743 512 dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n",
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513 icd->devnum);
514
515 return 0;
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516}
517
518/* Called with .video_lock held */
519static void mx3_camera_remove_device(struct soc_camera_device *icd)
520{
521 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
522 struct mx3_camera_dev *mx3_cam = ici->priv;
523 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
524
525 BUG_ON(icd != mx3_cam->icd);
526
527 if (*ichan) {
528 dma_release_channel(&(*ichan)->dma_chan);
529 *ichan = NULL;
530 }
531
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532 clk_disable(mx3_cam->clk);
533
534 mx3_cam->icd = NULL;
535
0166b743 536 dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n",
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537 icd->devnum);
538}
539
540static bool channel_change_requested(struct soc_camera_device *icd,
09e231b3 541 struct v4l2_rect *rect)
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542{
543 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
544 struct mx3_camera_dev *mx3_cam = ici->priv;
545 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
546
09e231b3 547 /* Do buffers have to be re-allocated or channel re-configured? */
a0705b07 548 return ichan && rect->width * rect->height >
6a6c8786 549 icd->user_width * icd->user_height;
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550}
551
552static int test_platform_param(struct mx3_camera_dev *mx3_cam,
553 unsigned char buswidth, unsigned long *flags)
554{
555 /*
556 * Platform specified synchronization and pixel clock polarities are
557 * only a recommendation and are only used during probing. MX3x
558 * camera interface only works in master mode, i.e., uses HSYNC and
559 * VSYNC signals from the sensor
560 */
561 *flags = SOCAM_MASTER |
562 SOCAM_HSYNC_ACTIVE_HIGH |
563 SOCAM_HSYNC_ACTIVE_LOW |
564 SOCAM_VSYNC_ACTIVE_HIGH |
565 SOCAM_VSYNC_ACTIVE_LOW |
566 SOCAM_PCLK_SAMPLE_RISING |
567 SOCAM_PCLK_SAMPLE_FALLING |
568 SOCAM_DATA_ACTIVE_HIGH |
569 SOCAM_DATA_ACTIVE_LOW;
570
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571 /*
572 * If requested data width is supported by the platform, use it or any
573 * possible lower value - i.MX31 is smart enough to schift bits
574 */
760697be
GL
575 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
576 *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
577 SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
578 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
579 *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
580 SOCAM_DATAWIDTH_4;
581 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
582 *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
583 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
584 *flags |= SOCAM_DATAWIDTH_4;
585
4f67130a
GL
586 switch (buswidth) {
587 case 15:
760697be 588 if (!(*flags & SOCAM_DATAWIDTH_15))
4f67130a 589 return -EINVAL;
4f67130a
GL
590 break;
591 case 10:
760697be 592 if (!(*flags & SOCAM_DATAWIDTH_10))
4f67130a 593 return -EINVAL;
4f67130a
GL
594 break;
595 case 8:
760697be 596 if (!(*flags & SOCAM_DATAWIDTH_8))
4f67130a 597 return -EINVAL;
4f67130a
GL
598 break;
599 case 4:
760697be 600 if (!(*flags & SOCAM_DATAWIDTH_4))
4f67130a 601 return -EINVAL;
4f67130a
GL
602 break;
603 default:
6a6c8786
GL
604 dev_warn(mx3_cam->soc_host.v4l2_dev.dev,
605 "Unsupported bus width %d\n", buswidth);
4f67130a
GL
606 return -EINVAL;
607 }
608
609 return 0;
610}
611
612static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
613 const unsigned int depth)
614{
615 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
616 struct mx3_camera_dev *mx3_cam = ici->priv;
617 unsigned long bus_flags, camera_flags;
618 int ret = test_platform_param(mx3_cam, depth, &bus_flags);
619
6a6c8786 620 dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret);
4f67130a
GL
621
622 if (ret < 0)
623 return ret;
624
625 camera_flags = icd->ops->query_bus_param(icd);
626
627 ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
628 if (ret < 0)
0166b743
GL
629 dev_warn(icd->dev.parent,
630 "Flags incompatible: camera %lx, host %lx\n",
4f67130a
GL
631 camera_flags, bus_flags);
632
633 return ret;
634}
635
636static bool chan_filter(struct dma_chan *chan, void *arg)
637{
638 struct dma_chan_request *rq = arg;
639 struct mx3_camera_pdata *pdata;
640
641 if (!rq)
642 return false;
643
979ea1dd 644 pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
4f67130a
GL
645
646 return rq->id == chan->chan_id &&
647 pdata->dma_dev == chan->device->dev;
648}
649
760697be 650static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
4f67130a 651 {
760697be
GL
652 .fourcc = V4L2_PIX_FMT_SBGGR8,
653 .name = "Bayer BGGR (sRGB) 8 bit",
654 .bits_per_sample = 8,
655 .packing = SOC_MBUS_PACKING_NONE,
656 .order = SOC_MBUS_ORDER_LE,
4f67130a 657 }, {
760697be
GL
658 .fourcc = V4L2_PIX_FMT_GREY,
659 .name = "Monochrome 8 bit",
660 .bits_per_sample = 8,
661 .packing = SOC_MBUS_PACKING_NONE,
662 .order = SOC_MBUS_ORDER_LE,
4f67130a
GL
663 },
664};
665
760697be
GL
666/* This will be corrected as we get more formats */
667static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
4f67130a 668{
760697be
GL
669 return fmt->packing == SOC_MBUS_PACKING_NONE ||
670 (fmt->bits_per_sample == 8 &&
671 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
672 (fmt->bits_per_sample > 8 &&
673 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
4f67130a
GL
674}
675
3805f201 676static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx,
4f67130a
GL
677 struct soc_camera_format_xlate *xlate)
678{
760697be
GL
679 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
680 struct device *dev = icd->dev.parent;
681 int formats = 0, ret;
682 enum v4l2_mbus_pixelcode code;
683 const struct soc_mbus_pixelfmt *fmt;
4f67130a 684
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GL
685 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
686 if (ret < 0)
687 /* No more formats */
688 return 0;
4f67130a 689
760697be
GL
690 fmt = soc_mbus_get_fmtdesc(code);
691 if (!fmt) {
692 dev_err(icd->dev.parent,
3805f201 693 "Invalid format code #%u: %d\n", idx, code);
4f67130a 694 return 0;
760697be 695 }
4f67130a 696
760697be
GL
697 /* This also checks support for the requested bits-per-sample */
698 ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
4f67130a
GL
699 if (ret < 0)
700 return 0;
701
760697be
GL
702 switch (code) {
703 case V4L2_MBUS_FMT_SBGGR10_1X10:
4f67130a
GL
704 formats++;
705 if (xlate) {
760697be
GL
706 xlate->host_fmt = &mx3_camera_formats[0];
707 xlate->code = code;
4f67130a 708 xlate++;
760697be
GL
709 dev_dbg(dev, "Providing format %s using code %d\n",
710 mx3_camera_formats[0].name, code);
4f67130a 711 }
760697be
GL
712 break;
713 case V4L2_MBUS_FMT_Y10_1X10:
4f67130a
GL
714 formats++;
715 if (xlate) {
760697be
GL
716 xlate->host_fmt = &mx3_camera_formats[1];
717 xlate->code = code;
4f67130a 718 xlate++;
760697be
GL
719 dev_dbg(dev, "Providing format %s using code %d\n",
720 mx3_camera_formats[1].name, code);
4f67130a 721 }
760697be 722 break;
4f67130a 723 default:
760697be
GL
724 if (!mx3_camera_packing_supported(fmt))
725 return 0;
726 }
727
728 /* Generic pass-through */
729 formats++;
730 if (xlate) {
731 xlate->host_fmt = fmt;
732 xlate->code = code;
733 xlate++;
734 dev_dbg(dev, "Providing format %x in pass-through mode\n",
735 xlate->host_fmt->fourcc);
4f67130a
GL
736 }
737
738 return formats;
739}
740
09e231b3 741static void configure_geometry(struct mx3_camera_dev *mx3_cam,
6a6c8786 742 unsigned int width, unsigned int height)
4f67130a 743{
4f67130a 744 u32 ctrl, width_field, height_field;
4f67130a
GL
745
746 /* Setup frame size - this cannot be changed on-the-fly... */
6a6c8786
GL
747 width_field = width - 1;
748 height_field = height - 1;
4f67130a
GL
749 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
750
751 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
752 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
753
754 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
755
756 /* ...and position */
757 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
758 /* Sensor does the cropping */
759 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
09e231b3
GL
760}
761
762static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
763{
764 dma_cap_mask_t mask;
765 struct dma_chan *chan;
766 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
767 /* We have to use IDMAC_IC_7 for Bayer / generic data */
768 struct dma_chan_request rq = {.mx3_cam = mx3_cam,
769 .id = IDMAC_IC_7};
770
771 if (*ichan) {
772 struct videobuf_buffer *vb, *_vb;
773 dma_release_channel(&(*ichan)->dma_chan);
774 *ichan = NULL;
775 mx3_cam->active = NULL;
776 list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
777 list_del_init(&vb->queue);
778 vb->state = VIDEOBUF_ERROR;
779 wake_up(&vb->done);
780 }
781 }
782
783 dma_cap_zero(mask);
784 dma_cap_set(DMA_SLAVE, mask);
785 dma_cap_set(DMA_PRIVATE, mask);
786 chan = dma_request_channel(mask, chan_filter, &rq);
787 if (!chan)
788 return -EBUSY;
789
790 *ichan = to_idmac_chan(chan);
791 (*ichan)->client = mx3_cam;
792
793 return 0;
794}
795
6a6c8786
GL
796/*
797 * FIXME: learn to use stride != width, then we can keep stride properly aligned
798 * and support arbitrary (even) widths.
799 */
e26b3144 800static inline void stride_align(__u32 *width)
6a6c8786
GL
801{
802 if (((*width + 7) & ~7) < 4096)
803 *width = (*width + 7) & ~7;
804 else
805 *width = *width & ~7;
806}
807
808/*
809 * As long as we don't implement host-side cropping and scaling, we can use
810 * default g_crop and cropcap from soc_camera.c
811 */
09e231b3 812static int mx3_camera_set_crop(struct soc_camera_device *icd,
08590b96 813 struct v4l2_crop *a)
09e231b3 814{
08590b96 815 struct v4l2_rect *rect = &a->c;
09e231b3
GL
816 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
817 struct mx3_camera_dev *mx3_cam = ici->priv;
c9c1f1c0 818 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
760697be 819 struct v4l2_mbus_framefmt mf;
6a6c8786 820 int ret;
09e231b3 821
6a6c8786
GL
822 soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
823 soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
824
825 ret = v4l2_subdev_call(sd, video, s_crop, a);
826 if (ret < 0)
827 return ret;
828
829 /* The capture device might have changed its output */
760697be 830 ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
6a6c8786
GL
831 if (ret < 0)
832 return ret;
833
760697be 834 if (mf.width & 7) {
6a6c8786 835 /* Ouch! We can only handle 8-byte aligned width... */
760697be
GL
836 stride_align(&mf.width);
837 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
09e231b3
GL
838 if (ret < 0)
839 return ret;
840 }
841
760697be 842 if (mf.width != icd->user_width || mf.height != icd->user_height) {
6a6c8786
GL
843 /*
844 * We now know pixel formats and can decide upon DMA-channel(s)
845 * So far only direct camera-to-memory is supported
846 */
847 if (channel_change_requested(icd, rect)) {
e26b3144 848 ret = acquire_dma_channel(mx3_cam);
6a6c8786
GL
849 if (ret < 0)
850 return ret;
851 }
09e231b3 852
760697be 853 configure_geometry(mx3_cam, mf.width, mf.height);
6a6c8786
GL
854 }
855
856 dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
760697be 857 mf.width, mf.height);
6a6c8786 858
760697be
GL
859 icd->user_width = mf.width;
860 icd->user_height = mf.height;
6a6c8786
GL
861
862 return ret;
09e231b3
GL
863}
864
865static int mx3_camera_set_fmt(struct soc_camera_device *icd,
866 struct v4l2_format *f)
867{
868 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
869 struct mx3_camera_dev *mx3_cam = ici->priv;
c9c1f1c0 870 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
09e231b3
GL
871 const struct soc_camera_format_xlate *xlate;
872 struct v4l2_pix_format *pix = &f->fmt.pix;
760697be 873 struct v4l2_mbus_framefmt mf;
09e231b3
GL
874 int ret;
875
876 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
877 if (!xlate) {
0166b743
GL
878 dev_warn(icd->dev.parent, "Format %x not found\n",
879 pix->pixelformat);
09e231b3
GL
880 return -EINVAL;
881 }
882
6a6c8786
GL
883 stride_align(&pix->width);
884 dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height);
885
09e231b3
GL
886 ret = acquire_dma_channel(mx3_cam);
887 if (ret < 0)
888 return ret;
889
890 /*
891 * Might have to perform a complete interface initialisation like in
892 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
893 * mxc_v4l2_s_fmt()
894 */
895
6a6c8786 896 configure_geometry(mx3_cam, pix->width, pix->height);
4f67130a 897
760697be
GL
898 mf.width = pix->width;
899 mf.height = pix->height;
900 mf.field = pix->field;
901 mf.colorspace = pix->colorspace;
902 mf.code = xlate->code;
903
904 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
905 if (ret < 0)
906 return ret;
907
908 if (mf.code != xlate->code)
909 return -EINVAL;
910
911 pix->width = mf.width;
912 pix->height = mf.height;
913 pix->field = mf.field;
914 pix->colorspace = mf.colorspace;
915 icd->current_fmt = xlate;
4f67130a 916
6a6c8786
GL
917 dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height);
918
4f67130a
GL
919 return ret;
920}
921
922static int mx3_camera_try_fmt(struct soc_camera_device *icd,
923 struct v4l2_format *f)
924{
c9c1f1c0 925 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
4f67130a
GL
926 const struct soc_camera_format_xlate *xlate;
927 struct v4l2_pix_format *pix = &f->fmt.pix;
760697be 928 struct v4l2_mbus_framefmt mf;
4f67130a 929 __u32 pixfmt = pix->pixelformat;
4f67130a
GL
930 int ret;
931
932 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
933 if (pixfmt && !xlate) {
979ea1dd 934 dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
4f67130a
GL
935 return -EINVAL;
936 }
937
938 /* limit to MX3 hardware capabilities */
939 if (pix->height > 4096)
940 pix->height = 4096;
941 if (pix->width > 4096)
942 pix->width = 4096;
943
760697be
GL
944 pix->bytesperline = soc_mbus_bytes_per_line(pix->width,
945 xlate->host_fmt);
946 if (pix->bytesperline < 0)
947 return pix->bytesperline;
4f67130a
GL
948 pix->sizeimage = pix->height * pix->bytesperline;
949
4f67130a 950 /* limit to sensor capabilities */
760697be
GL
951 mf.width = pix->width;
952 mf.height = pix->height;
953 mf.field = pix->field;
954 mf.colorspace = pix->colorspace;
955 mf.code = xlate->code;
4f67130a 956
760697be
GL
957 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
958 if (ret < 0)
959 return ret;
4f67130a 960
760697be
GL
961 pix->width = mf.width;
962 pix->height = mf.height;
963 pix->colorspace = mf.colorspace;
964
965 switch (mf.field) {
966 case V4L2_FIELD_ANY:
4f67130a 967 pix->field = V4L2_FIELD_NONE;
760697be
GL
968 break;
969 case V4L2_FIELD_NONE:
970 break;
971 default:
972 dev_err(icd->dev.parent, "Field type %d unsupported.\n",
973 mf.field);
974 ret = -EINVAL;
4f67130a
GL
975 }
976
977 return ret;
978}
979
57bee29d 980static int mx3_camera_reqbufs(struct soc_camera_device *icd,
4f67130a
GL
981 struct v4l2_requestbuffers *p)
982{
983 return 0;
984}
985
986static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
987{
57bee29d 988 struct soc_camera_device *icd = file->private_data;
4f67130a 989
57bee29d 990 return videobuf_poll_stream(file, &icd->vb_vidq, pt);
4f67130a
GL
991}
992
993static int mx3_camera_querycap(struct soc_camera_host *ici,
994 struct v4l2_capability *cap)
995{
996 /* cap->name is set by the firendly caller:-> */
997 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
998 cap->version = KERNEL_VERSION(0, 2, 2);
999 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
1000
1001 return 0;
1002}
1003
1004static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
1005{
1006 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
1007 struct mx3_camera_dev *mx3_cam = ici->priv;
1008 unsigned long bus_flags, camera_flags, common_flags;
1009 u32 dw, sens_conf;
760697be
GL
1010 const struct soc_mbus_pixelfmt *fmt;
1011 int buswidth;
1012 int ret;
4f67130a 1013 const struct soc_camera_format_xlate *xlate;
0166b743 1014 struct device *dev = icd->dev.parent;
4f67130a 1015
760697be
GL
1016 fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
1017 if (!fmt)
1018 return -EINVAL;
1019
1020 buswidth = fmt->bits_per_sample;
1021 ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
1022
4f67130a
GL
1023 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
1024 if (!xlate) {
0166b743 1025 dev_warn(dev, "Format %x not found\n", pixfmt);
4f67130a
GL
1026 return -EINVAL;
1027 }
1028
760697be 1029 dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
4f67130a
GL
1030
1031 if (ret < 0)
1032 return ret;
1033
1034 camera_flags = icd->ops->query_bus_param(icd);
1035
1036 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
0166b743 1037 dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
40e2e092 1038 camera_flags, bus_flags, common_flags);
4f67130a 1039 if (!common_flags) {
0166b743 1040 dev_dbg(dev, "no common flags");
4f67130a
GL
1041 return -EINVAL;
1042 }
1043
1044 /* Make choices, based on platform preferences */
1045 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
1046 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
1047 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
1048 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
1049 else
1050 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
1051 }
1052
1053 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
1054 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
1055 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
1056 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
1057 else
1058 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
1059 }
1060
1061 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
1062 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
1063 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
1064 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
1065 else
1066 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
1067 }
1068
1069 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
1070 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
1071 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
1072 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
1073 else
1074 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
1075 }
1076
5d28d525
GL
1077 /*
1078 * Make the camera work in widest common mode, we'll take care of
1079 * the rest
1080 */
4f67130a
GL
1081 if (common_flags & SOCAM_DATAWIDTH_15)
1082 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1083 SOCAM_DATAWIDTH_15;
1084 else if (common_flags & SOCAM_DATAWIDTH_10)
1085 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1086 SOCAM_DATAWIDTH_10;
1087 else if (common_flags & SOCAM_DATAWIDTH_8)
1088 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1089 SOCAM_DATAWIDTH_8;
1090 else
1091 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1092 SOCAM_DATAWIDTH_4;
1093
1094 ret = icd->ops->set_bus_param(icd, common_flags);
40e2e092 1095 if (ret < 0) {
0166b743 1096 dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n",
40e2e092 1097 common_flags, ret);
4f67130a 1098 return ret;
40e2e092 1099 }
4f67130a
GL
1100
1101 /*
1102 * So far only gated clock mode is supported. Add a line
1103 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1104 * below and select the required mode when supporting other
1105 * synchronisation protocols.
1106 */
1107 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1108 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1109 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1110 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1111 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1112 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1113 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1114
1115 /* TODO: Support RGB and YUV formats */
1116
1117 /* This has been set in mx3_camera_activate(), but we clear it above */
1118 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1119
1120 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
1121 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1122 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
1123 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1124 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
1125 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1126 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
1127 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1128
1129 /* Just do what we're asked to do */
760697be 1130 switch (xlate->host_fmt->bits_per_sample) {
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1131 case 4:
1132 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1133 break;
1134 case 8:
1135 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1136 break;
1137 case 10:
1138 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1139 break;
1140 default:
1141 /*
1142 * Actually it can only be 15 now, default is just to silence
1143 * compiler warnings
1144 */
1145 case 15:
1146 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1147 }
1148
1149 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1150
0166b743 1151 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
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1152
1153 return 0;
1154}
1155
1156static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1157 .owner = THIS_MODULE,
1158 .add = mx3_camera_add_device,
1159 .remove = mx3_camera_remove_device,
09e231b3 1160 .set_crop = mx3_camera_set_crop,
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1161 .set_fmt = mx3_camera_set_fmt,
1162 .try_fmt = mx3_camera_try_fmt,
1163 .get_formats = mx3_camera_get_formats,
1164 .init_videobuf = mx3_camera_init_videobuf,
1165 .reqbufs = mx3_camera_reqbufs,
1166 .poll = mx3_camera_poll,
1167 .querycap = mx3_camera_querycap,
1168 .set_bus_param = mx3_camera_set_bus_param,
1169};
1170
e36bc31f 1171static int __devinit mx3_camera_probe(struct platform_device *pdev)
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1172{
1173 struct mx3_camera_dev *mx3_cam;
1174 struct resource *res;
1175 void __iomem *base;
1176 int err = 0;
1177 struct soc_camera_host *soc_host;
1178
1179 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1180 if (!res) {
1181 err = -ENODEV;
1182 goto egetres;
1183 }
1184
1185 mx3_cam = vmalloc(sizeof(*mx3_cam));
1186 if (!mx3_cam) {
1187 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1188 err = -ENOMEM;
1189 goto ealloc;
1190 }
1191 memset(mx3_cam, 0, sizeof(*mx3_cam));
1192
b71df97a 1193 mx3_cam->clk = clk_get(&pdev->dev, NULL);
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1194 if (IS_ERR(mx3_cam->clk)) {
1195 err = PTR_ERR(mx3_cam->clk);
1196 goto eclkget;
1197 }
1198
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1199 mx3_cam->pdata = pdev->dev.platform_data;
1200 mx3_cam->platform_flags = mx3_cam->pdata->flags;
1201 if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
1202 MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
1203 MX3_CAMERA_DATAWIDTH_15))) {
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1204 /*
1205 * Platform hasn't set available data widths. This is bad.
1206 * Warn and use a default.
1207 */
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1208 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1209 "data widths, using default 8 bit\n");
1210 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1211 }
1212
1213 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
1214 if (!mx3_cam->mclk) {
1215 dev_warn(&pdev->dev,
1216 "mclk_10khz == 0! Please, fix your platform data. "
1217 "Using default 20MHz\n");
1218 mx3_cam->mclk = 20000000;
1219 }
1220
1221 /* list of video-buffers */
1222 INIT_LIST_HEAD(&mx3_cam->capture);
1223 spin_lock_init(&mx3_cam->lock);
1224
40e2e092 1225 base = ioremap(res->start, resource_size(res));
4f67130a 1226 if (!base) {
40e2e092 1227 pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
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1228 err = -ENOMEM;
1229 goto eioremap;
1230 }
1231
1232 mx3_cam->base = base;
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1233
1234 soc_host = &mx3_cam->soc_host;
1235 soc_host->drv_name = MX3_CAM_DRV_NAME;
1236 soc_host->ops = &mx3_soc_camera_host_ops;
1237 soc_host->priv = mx3_cam;
979ea1dd 1238 soc_host->v4l2_dev.dev = &pdev->dev;
4f67130a 1239 soc_host->nr = pdev->id;
eff505fa 1240
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1241 err = soc_camera_host_register(soc_host);
1242 if (err)
1243 goto ecamhostreg;
1244
1245 /* IDMAC interface */
1246 dmaengine_get();
1247
1248 return 0;
1249
1250ecamhostreg:
1251 iounmap(base);
1252eioremap:
1253 clk_put(mx3_cam->clk);
1254eclkget:
1255 vfree(mx3_cam);
1256ealloc:
1257egetres:
1258 return err;
1259}
1260
1261static int __devexit mx3_camera_remove(struct platform_device *pdev)
1262{
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1263 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1264 struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1265 struct mx3_camera_dev, soc_host);
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1266
1267 clk_put(mx3_cam->clk);
1268
eff505fa 1269 soc_camera_host_unregister(soc_host);
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1270
1271 iounmap(mx3_cam->base);
1272
1273 /*
1274 * The channel has either not been allocated,
1275 * or should have been released
1276 */
1277 if (WARN_ON(mx3_cam->idmac_channel[0]))
1278 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1279
1280 vfree(mx3_cam);
1281
1282 dmaengine_put();
1283
1284 dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
1285
1286 return 0;
1287}
1288
1289static struct platform_driver mx3_camera_driver = {
1290 .driver = {
1291 .name = MX3_CAM_DRV_NAME,
1292 },
1293 .probe = mx3_camera_probe,
e36bc31f 1294 .remove = __devexit_p(mx3_camera_remove),
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1295};
1296
1297
e36bc31f 1298static int __init mx3_camera_init(void)
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1299{
1300 return platform_driver_register(&mx3_camera_driver);
1301}
1302
1303static void __exit mx3_camera_exit(void)
1304{
1305 platform_driver_unregister(&mx3_camera_driver);
1306}
1307
1308module_init(mx3_camera_init);
1309module_exit(mx3_camera_exit);
1310
1311MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1312MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1313MODULE_LICENSE("GPL v2");
40e2e092 1314MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);