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V4L/DVB (13553): v4l: Use the video_is_registered function in device drivers
[net-next-2.6.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
405f5571 34#include <linux/smp_lock.h>
1da177e4 35#include <linux/interrupt.h>
c24228da 36#include <linux/dma-mapping.h>
1da177e4
LT		 37#include <linux/delay.h>
38#include <linux/kthread.h>
39#include <asm/div64.h>
40
41#include "cx88.h"
5e453dc7 42#include <media/v4l2-common.h>
35ea11ff 43#include <media/v4l2-ioctl.h>
1da177e4
LT		 44
45MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
46MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
47MODULE_LICENSE("GPL");
48
49/* ------------------------------------------------------------------ */
50
51static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
53static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
54
55module_param_array(video_nr, int, NULL, 0444);
56module_param_array(vbi_nr, int, NULL, 0444);
57module_param_array(radio_nr, int, NULL, 0444);
58
59MODULE_PARM_DESC(video_nr,"video device numbers");
60MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
61MODULE_PARM_DESC(radio_nr,"radio device numbers");
62
ff699e6b 63static unsigned int video_debug;
1da177e4
LT		 64module_param(video_debug,int,0644);
65MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
66
ff699e6b 67static unsigned int irq_debug;
1da177e4
LT		 68module_param(irq_debug,int,0644);
69MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
70
71static unsigned int vid_limit = 16;
72module_param(vid_limit,int,0644);
73MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
74
75#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 76 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 77
78/* ------------------------------------------------------------------ */
79
80static LIST_HEAD(cx8800_devlist);
81
82/* ------------------------------------------------------------------- */
83/* static data */
84
1da177e4
LT		 85static struct cx8800_fmt formats[] = {
86 {
87 .name = "8 bpp, gray",
88 .fourcc = V4L2_PIX_FMT_GREY,
89 .cxformat = ColorFormatY8,
90 .depth = 8,
91 .flags = FORMAT_FLAGS_PACKED,
92 },{
93 .name = "15 bpp RGB, le",
94 .fourcc = V4L2_PIX_FMT_RGB555,
95 .cxformat = ColorFormatRGB15,
96 .depth = 16,
97 .flags = FORMAT_FLAGS_PACKED,
98 },{
99 .name = "15 bpp RGB, be",
100 .fourcc = V4L2_PIX_FMT_RGB555X,
101 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
102 .depth = 16,
103 .flags = FORMAT_FLAGS_PACKED,
104 },{
105 .name = "16 bpp RGB, le",
106 .fourcc = V4L2_PIX_FMT_RGB565,
107 .cxformat = ColorFormatRGB16,
108 .depth = 16,
109 .flags = FORMAT_FLAGS_PACKED,
110 },{
111 .name = "16 bpp RGB, be",
112 .fourcc = V4L2_PIX_FMT_RGB565X,
113 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
114 .depth = 16,
115 .flags = FORMAT_FLAGS_PACKED,
116 },{
117 .name = "24 bpp RGB, le",
118 .fourcc = V4L2_PIX_FMT_BGR24,
119 .cxformat = ColorFormatRGB24,
120 .depth = 24,
121 .flags = FORMAT_FLAGS_PACKED,
122 },{
123 .name = "32 bpp RGB, le",
124 .fourcc = V4L2_PIX_FMT_BGR32,
125 .cxformat = ColorFormatRGB32,
126 .depth = 32,
127 .flags = FORMAT_FLAGS_PACKED,
128 },{
129 .name = "32 bpp RGB, be",
130 .fourcc = V4L2_PIX_FMT_RGB32,
131 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
132 .depth = 32,
133 .flags = FORMAT_FLAGS_PACKED,
134 },{
135 .name = "4:2:2, packed, YUYV",
136 .fourcc = V4L2_PIX_FMT_YUYV,
137 .cxformat = ColorFormatYUY2,
138 .depth = 16,
139 .flags = FORMAT_FLAGS_PACKED,
140 },{
141 .name = "4:2:2, packed, UYVY",
142 .fourcc = V4L2_PIX_FMT_UYVY,
143 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
144 .depth = 16,
145 .flags = FORMAT_FLAGS_PACKED,
146 },
147};
148
149static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
150{
151 unsigned int i;
152
153 for (i = 0; i < ARRAY_SIZE(formats); i++)
154 if (formats[i].fourcc == fourcc)
155 return formats+i;
156 return NULL;
157}
158
159/* ------------------------------------------------------------------- */
160
161static const struct v4l2_queryctrl no_ctl = {
162 .name = "42",
163 .flags = V4L2_CTRL_FLAG_DISABLED,
164};
165
166static struct cx88_ctrl cx8800_ctls[] = {
167 /* --- video --- */
168 {
169 .v = {
170 .id = V4L2_CID_BRIGHTNESS,
171 .name = "Brightness",
172 .minimum = 0x00,
173 .maximum = 0xff,
174 .step = 1,
9f9c907f 175 .default_value = 0x7f,
1da177e4
LT		 176 .type = V4L2_CTRL_TYPE_INTEGER,
177 },
178 .off = 128,
179 .reg = MO_CONTR_BRIGHT,
180 .mask = 0x00ff,
181 .shift = 0,
182 },{
183 .v = {
184 .id = V4L2_CID_CONTRAST,
185 .name = "Contrast",
186 .minimum = 0,
187 .maximum = 0xff,
188 .step = 1,
70f00044 189 .default_value = 0x3f,
1da177e4
LT		 190 .type = V4L2_CTRL_TYPE_INTEGER,
191 },
41ef7c1e 192 .off = 0,
1da177e4
LT		 193 .reg = MO_CONTR_BRIGHT,
194 .mask = 0xff00,
195 .shift = 8,
196 },{
197 .v = {
198 .id = V4L2_CID_HUE,
199 .name = "Hue",
200 .minimum = 0,
201 .maximum = 0xff,
202 .step = 1,
9f9c907f 203 .default_value = 0x7f,
1da177e4
LT		 204 .type = V4L2_CTRL_TYPE_INTEGER,
205 },
9ac4c158 206 .off = 128,
1da177e4
LT		 207 .reg = MO_HUE,
208 .mask = 0x00ff,
209 .shift = 0,
210 },{
211 /* strictly, this only describes only U saturation.
212 * V saturation is handled specially through code.
213 */
214 .v = {
215 .id = V4L2_CID_SATURATION,
216 .name = "Saturation",
217 .minimum = 0,
218 .maximum = 0xff,
219 .step = 1,
70f00044 220 .default_value = 0x7f,
1da177e4
LT		 221 .type = V4L2_CTRL_TYPE_INTEGER,
222 },
223 .off = 0,
224 .reg = MO_UV_SATURATION,
225 .mask = 0x00ff,
226 .shift = 0,
227 },{
6d04203c
FD		 228 .v = {
229 .id = V4L2_CID_CHROMA_AGC,
230 .name = "Chroma AGC",
231 .minimum = 0,
232 .maximum = 1,
87a17389 233 .default_value = 0x1,
6d04203c
FD		 234 .type = V4L2_CTRL_TYPE_BOOLEAN,
235 },
236 .reg = MO_INPUT_FORMAT,
237 .mask = 1 << 10,
238 .shift = 10,
1b879c43
FD		 239 }, {
240 .v = {
241 .id = V4L2_CID_COLOR_KILLER,
242 .name = "Color killer",
243 .minimum = 0,
244 .maximum = 1,
0b5afdd2 245 .default_value = 0x1,
1b879c43
FD		 246 .type = V4L2_CTRL_TYPE_BOOLEAN,
247 },
248 .reg = MO_INPUT_FORMAT,
249 .mask = 1 << 9,
250 .shift = 9,
6d04203c 251 }, {
1da177e4
LT		 252 /* --- audio --- */
253 .v = {
254 .id = V4L2_CID_AUDIO_MUTE,
255 .name = "Mute",
256 .minimum = 0,
257 .maximum = 1,
70f00044 258 .default_value = 1,
1da177e4
LT		 259 .type = V4L2_CTRL_TYPE_BOOLEAN,
260 },
261 .reg = AUD_VOL_CTL,
262 .sreg = SHADOW_AUD_VOL_CTL,
263 .mask = (1 << 6),
264 .shift = 6,
265 },{
266 .v = {
267 .id = V4L2_CID_AUDIO_VOLUME,
268 .name = "Volume",
269 .minimum = 0,
270 .maximum = 0x3f,
271 .step = 1,
9f9c907f 272 .default_value = 0x3f,
1da177e4
LT		 273 .type = V4L2_CTRL_TYPE_INTEGER,
274 },
275 .reg = AUD_VOL_CTL,
276 .sreg = SHADOW_AUD_VOL_CTL,
277 .mask = 0x3f,
278 .shift = 0,
279 },{
280 .v = {
281 .id = V4L2_CID_AUDIO_BALANCE,
282 .name = "Balance",
283 .minimum = 0,
284 .maximum = 0x7f,
285 .step = 1,
286 .default_value = 0x40,
287 .type = V4L2_CTRL_TYPE_INTEGER,
288 },
289 .reg = AUD_BAL_CTL,
290 .sreg = SHADOW_AUD_BAL_CTL,
291 .mask = 0x7f,
292 .shift = 0,
293 }
294};
408b664a 295static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 296
2ba58894 297/* Must be sorted from low to high control ID! */
38a2713a
MK		 298const u32 cx88_user_ctrls[] = {
299 V4L2_CID_USER_CLASS,
300 V4L2_CID_BRIGHTNESS,
301 V4L2_CID_CONTRAST,
302 V4L2_CID_SATURATION,
303 V4L2_CID_HUE,
304 V4L2_CID_AUDIO_VOLUME,
305 V4L2_CID_AUDIO_BALANCE,
306 V4L2_CID_AUDIO_MUTE,
6d04203c 307 V4L2_CID_CHROMA_AGC,
1b879c43 308 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 309 0
310};
311EXPORT_SYMBOL(cx88_user_ctrls);
312
313static const u32 *ctrl_classes[] = {
314 cx88_user_ctrls,
315 NULL
316};
317
6d04203c 318int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 319{
320 int i;
321
322 if (qctrl->id < V4L2_CID_BASE ||
323 qctrl->id >= V4L2_CID_LASTP1)
324 return -EINVAL;
325 for (i = 0; i < CX8800_CTLS; i++)
326 if (cx8800_ctls[i].v.id == qctrl->id)
327 break;
328 if (i == CX8800_CTLS) {
329 *qctrl = no_ctl;
330 return 0;
331 }
332 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 333 /* Report chroma AGC as inactive when SECAM is selected */
334 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
335 core->tvnorm & V4L2_STD_SECAM)
336 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
337
38a2713a
MK		 338 return 0;
339}
340EXPORT_SYMBOL(cx8800_ctrl_query);
341
1da177e4
LT		 342/* ------------------------------------------------------------------- */
343/* resource management */
344
345static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
346{
e52e98a7 347 struct cx88_core *core = dev->core;
1da177e4
LT		 348 if (fh->resources & bit)
349 /* have it already allocated */
350 return 1;
351
352 /* is it free? */
3593cab5 353 mutex_lock(&core->lock);
1da177e4
LT		 354 if (dev->resources & bit) {
355 /* no, someone else uses it */
3593cab5 356 mutex_unlock(&core->lock);
1da177e4
LT		 357 return 0;
358 }
359 /* it's free, grab it */
360 fh->resources |= bit;
361 dev->resources |= bit;
362 dprintk(1,"res: get %d\n",bit);
3593cab5 363 mutex_unlock(&core->lock);
1da177e4
LT		 364 return 1;
365}
366
367static
368int res_check(struct cx8800_fh *fh, unsigned int bit)
369{
370 return (fh->resources & bit);
371}
372
373static
374int res_locked(struct cx8800_dev *dev, unsigned int bit)
375{
376 return (dev->resources & bit);
377}
378
379static
380void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
381{
e52e98a7 382 struct cx88_core *core = dev->core;
ae24601b 383 BUG_ON((fh->resources & bits) != bits);
1da177e4 384
3593cab5 385 mutex_lock(&core->lock);
1da177e4
LT		 386 fh->resources &= ~bits;
387 dev->resources &= ~bits;
388 dprintk(1,"res: put %d\n",bits);
3593cab5 389 mutex_unlock(&core->lock);
1da177e4
LT		 390}
391
392/* ------------------------------------------------------------------ */
393
e90311a1 394int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 395{
e52e98a7 396 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 397
398 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 399 input, INPUT(input).vmux,
400 INPUT(input).gpio0,INPUT(input).gpio1,
401 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 402 core->input = input;
6a59d64c
TP		 403 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
404 cx_write(MO_GP3_IO, INPUT(input).gpio3);
405 cx_write(MO_GP0_IO, INPUT(input).gpio0);
406 cx_write(MO_GP1_IO, INPUT(input).gpio1);
407 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 408
6a59d64c 409 switch (INPUT(input).type) {
1da177e4
LT		 410 case CX88_VMUX_SVIDEO:
411 cx_set(MO_AFECFG_IO, 0x00000001);
412 cx_set(MO_INPUT_FORMAT, 0x00010010);
413 cx_set(MO_FILTER_EVEN, 0x00002020);
414 cx_set(MO_FILTER_ODD, 0x00002020);
415 break;
416 default:
417 cx_clear(MO_AFECFG_IO, 0x00000001);
418 cx_clear(MO_INPUT_FORMAT, 0x00010010);
419 cx_clear(MO_FILTER_EVEN, 0x00002020);
420 cx_clear(MO_FILTER_ODD, 0x00002020);
421 break;
422 }
f24546a9 423
66e6fbdf
RC		 424 /* if there are audioroutes defined, we have an external
425 ADC to deal with audio */
66e6fbdf 426 if (INPUT(input).audioroute) {
66e6fbdf
RC		 427 /* The wm8775 module has the "2" route hardwired into
428 the initialization. Some boards may use different
429 routes for different inputs. HVR-1300 surely does */
430 if (core->board.audio_chip &&
38f9d308 431 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 432 call_all(core, audio, s_routing,
433 INPUT(input).audioroute, 0, 0);
66e6fbdf 434 }
430189da
DB		 435 /* cx2388's C-ADC is connected to the tuner only.
436 When used with S-Video, that ADC is busy dealing with
437 chroma, so an external must be used for baseband audio */
438 if (INPUT(input).type != CX88_VMUX_TELEVISION ) {
439 /* "I2S ADC mode" */
440 core->tvaudio = WW_I2SADC;
441 cx88_set_tvaudio(core);
442 } else {
443 /* Normal mode */
444 cx_write(AUD_I2SCNTL, 0x0);
445 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
446 }
f24546a9 447 }
66e6fbdf 448
1da177e4
LT		 449 return 0;
450}
e90311a1 451EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 452
453/* ------------------------------------------------------------------ */
454
455static int start_video_dma(struct cx8800_dev *dev,
456 struct cx88_dmaqueue *q,
457 struct cx88_buffer *buf)
458{
459 struct cx88_core *core = dev->core;
460
461 /* setup fifo + format */
e52e98a7 462 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 463 buf->bpl, buf->risc.dma);
e52e98a7 464 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 465 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
466
467 /* reset counter */
468 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
469 q->count = 1;
470
471 /* enable irqs */
8ddac9ee 472 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 473
474 /* Enables corresponding bits at PCI_INT_STAT:
475 bits 0 to 4: video, audio, transport stream, VIP, Host
476 bit 7: timer
477 bits 8 and 9: DMA complete for: SRC, DST
478 bits 10 and 11: BERR signal asserted for RISC: RD, WR
479 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
480 */
1da177e4
LT		 481 cx_set(MO_VID_INTMSK, 0x0f0011);
482
483 /* enable capture */
484 cx_set(VID_CAPTURE_CONTROL,0x06);
485
486 /* start dma */
487 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 488 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 489
490 return 0;
491}
492
17bc98a4 493#ifdef CONFIG_PM
1da177e4
LT		 494static int stop_video_dma(struct cx8800_dev *dev)
495{
496 struct cx88_core *core = dev->core;
497
498 /* stop dma */
499 cx_clear(MO_VID_DMACNTRL, 0x11);
500
501 /* disable capture */
502 cx_clear(VID_CAPTURE_CONTROL,0x06);
503
504 /* disable irqs */
8ddac9ee 505 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 506 cx_clear(MO_VID_INTMSK, 0x0f0011);
507 return 0;
508}
17bc98a4 509#endif
1da177e4
LT		 510
511static int restart_video_queue(struct cx8800_dev *dev,
512 struct cx88_dmaqueue *q)
513{
e52e98a7 514 struct cx88_core *core = dev->core;
1da177e4 515 struct cx88_buffer *buf, *prev;
1da177e4
LT		 516
517 if (!list_empty(&q->active)) {
4ac97914 518 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 519 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
520 buf, buf->vb.i);
521 start_video_dma(dev, q, buf);
8bb629e2
TP		 522 list_for_each_entry(buf, &q->active, vb.queue)
523 buf->count = q->count++;
1da177e4
LT		 524 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
525 return 0;
526 }
527
528 prev = NULL;
529 for (;;) {
530 if (list_empty(&q->queued))
531 return 0;
4ac97914 532 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 533 if (NULL == prev) {
179e0917 534 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 535 start_video_dma(dev, q, buf);
0fc0686e 536 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 537 buf->count = q->count++;
538 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
539 dprintk(2,"[%p/%d] restart_queue - first active\n",
540 buf,buf->vb.i);
541
542 } else if (prev->vb.width == buf->vb.width &&
543 prev->vb.height == buf->vb.height &&
544 prev->fmt == buf->fmt) {
179e0917 545 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 546 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 547 buf->count = q->count++;
548 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
549 dprintk(2,"[%p/%d] restart_queue - move to active\n",
550 buf,buf->vb.i);
551 } else {
552 return 0;
553 }
554 prev = buf;
555 }
556}
557
558/* ------------------------------------------------------------------ */
559
560static int
561buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
562{
563 struct cx8800_fh *fh = q->priv_data;
564
565 *size = fh->fmt->depth*fh->width*fh->height >> 3;
566 if (0 == *count)
567 *count = 32;
568 while (*size * *count > vid_limit * 1024 * 1024)
569 (*count)--;
570 return 0;
571}
572
573static int
574buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
575 enum v4l2_field field)
576{
577 struct cx8800_fh *fh = q->priv_data;
578 struct cx8800_dev *dev = fh->dev;
e52e98a7 579 struct cx88_core *core = dev->core;
1da177e4 580 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 581 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 582 int rc, init_buffer = 0;
583
584 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 585 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
586 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 587 return -EINVAL;
588 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
589 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
590 return -EINVAL;
591
592 if (buf->fmt != fh->fmt ||
593 buf->vb.width != fh->width ||
594 buf->vb.height != fh->height ||
595 buf->vb.field != field) {
596 buf->fmt = fh->fmt;
597 buf->vb.width = fh->width;
598 buf->vb.height = fh->height;
599 buf->vb.field = field;
600 init_buffer = 1;
601 }
602
0fc0686e 603 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 604 init_buffer = 1;
c7b0ac05 605 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 606 goto fail;
607 }
608
609 if (init_buffer) {
610 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
611 switch (buf->vb.field) {
612 case V4L2_FIELD_TOP:
613 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 614 dma->sglist, 0, UNSET,
1da177e4
LT		 615 buf->bpl, 0, buf->vb.height);
616 break;
617 case V4L2_FIELD_BOTTOM:
618 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 619 dma->sglist, UNSET, 0,
1da177e4
LT		 620 buf->bpl, 0, buf->vb.height);
621 break;
622 case V4L2_FIELD_INTERLACED:
623 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 624 dma->sglist, 0, buf->bpl,
1da177e4
LT		 625 buf->bpl, buf->bpl,
626 buf->vb.height >> 1);
627 break;
628 case V4L2_FIELD_SEQ_TB:
629 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 630 dma->sglist,
1da177e4
LT		 631 0, buf->bpl * (buf->vb.height >> 1),
632 buf->bpl, 0,
633 buf->vb.height >> 1);
634 break;
635 case V4L2_FIELD_SEQ_BT:
636 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 637 dma->sglist,
1da177e4
LT		 638 buf->bpl * (buf->vb.height >> 1), 0,
639 buf->bpl, 0,
640 buf->vb.height >> 1);
641 break;
642 default:
643 BUG();
644 }
645 }
646 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
647 buf, buf->vb.i,
648 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
649 (unsigned long)buf->risc.dma);
650
0fc0686e 651 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 652 return 0;
653
654 fail:
c7b0ac05 655 cx88_free_buffer(q,buf);
1da177e4
LT		 656 return rc;
657}
658
659static void
660buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
661{
662 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
663 struct cx88_buffer *prev;
664 struct cx8800_fh *fh = vq->priv_data;
665 struct cx8800_dev *dev = fh->dev;
e52e98a7 666 struct cx88_core *core = dev->core;
1da177e4
LT		 667 struct cx88_dmaqueue *q = &dev->vidq;
668
669 /* add jump to stopper */
670 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
671 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
672
673 if (!list_empty(&q->queued)) {
674 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 675 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 676 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
677 buf, buf->vb.i);
678
679 } else if (list_empty(&q->active)) {
680 list_add_tail(&buf->vb.queue,&q->active);
681 start_video_dma(dev, q, buf);
0fc0686e 682 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 683 buf->count = q->count++;
684 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
685 dprintk(2,"[%p/%d] buffer_queue - first active\n",
686 buf, buf->vb.i);
687
688 } else {
689 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
690 if (prev->vb.width == buf->vb.width &&
691 prev->vb.height == buf->vb.height &&
692 prev->fmt == buf->fmt) {
693 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 694 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 695 buf->count = q->count++;
696 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
697 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
698 buf, buf->vb.i);
699
700 } else {
701 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 702 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 703 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
704 buf, buf->vb.i);
705 }
706 }
707}
708
709static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
710{
711 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 712
c7b0ac05 713 cx88_free_buffer(q,buf);
1da177e4
LT		 714}
715
408b664a 716static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 717 .buf_setup = buffer_setup,
718 .buf_prepare = buffer_prepare,
719 .buf_queue = buffer_queue,
720 .buf_release = buffer_release,
721};
722
723/* ------------------------------------------------------------------ */
724
1da177e4
LT		 725
726/* ------------------------------------------------------------------ */
727
728static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
729{
730 switch (fh->type) {
731 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
732 return &fh->vidq;
733 case V4L2_BUF_TYPE_VBI_CAPTURE:
734 return &fh->vbiq;
735 default:
736 BUG();
737 return NULL;
738 }
739}
740
741static int get_ressource(struct cx8800_fh *fh)
742{
743 switch (fh->type) {
744 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
745 return RESOURCE_VIDEO;
746 case V4L2_BUF_TYPE_VBI_CAPTURE:
747 return RESOURCE_VBI;
748 default:
749 BUG();
750 return 0;
751 }
752}
753
bec43661 754static int video_open(struct file *file)
1da177e4 755{
bec43661 756 int minor = video_devdata(file)->minor;
1da177e4 757 struct cx8800_dev *h,*dev = NULL;
e52e98a7 758 struct cx88_core *core;
1da177e4 759 struct cx8800_fh *fh;
1da177e4
LT		 760 enum v4l2_buf_type type = 0;
761 int radio = 0;
762
d56dc612 763 lock_kernel();
8bb629e2 764 list_for_each_entry(h, &cx8800_devlist, devlist) {
1da177e4
LT		 765 if (h->video_dev->minor == minor) {
766 dev = h;
767 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
768 }
769 if (h->vbi_dev->minor == minor) {
770 dev = h;
771 type = V4L2_BUF_TYPE_VBI_CAPTURE;
772 }
773 if (h->radio_dev &&
774 h->radio_dev->minor == minor) {
775 radio = 1;
776 dev = h;
777 }
778 }
d56dc612
HV		 779 if (NULL == dev) {
780 unlock_kernel();
1da177e4 781 return -ENODEV;
d56dc612 782 }
1da177e4 783
e52e98a7
MCC		 784 core = dev->core;
785
1da177e4
LT		 786 dprintk(1,"open minor=%d radio=%d type=%s\n",
787 minor,radio,v4l2_type_names[type]);
788
789 /* allocate + initialize per filehandle data */
7408187d 790 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
d56dc612
HV		 791 if (NULL == fh) {
792 unlock_kernel();
1da177e4 793 return -ENOMEM;
d56dc612 794 }
1da177e4
LT		 795 file->private_data = fh;
796 fh->dev = dev;
797 fh->radio = radio;
798 fh->type = type;
799 fh->width = 320;
800 fh->height = 240;
801 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
802
0705135e
GL		 803 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
804 &dev->pci->dev, &dev->slock,
1da177e4
LT		 805 V4L2_BUF_TYPE_VIDEO_CAPTURE,
806 V4L2_FIELD_INTERLACED,
807 sizeof(struct cx88_buffer),
808 fh);
0705135e
GL		 809 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
810 &dev->pci->dev, &dev->slock,
1da177e4
LT		 811 V4L2_BUF_TYPE_VBI_CAPTURE,
812 V4L2_FIELD_SEQ_TB,
813 sizeof(struct cx88_buffer),
814 fh);
815
816 if (fh->radio) {
1da177e4 817 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 818 cx_write(MO_GP3_IO, core->board.radio.gpio3);
819 cx_write(MO_GP0_IO, core->board.radio.gpio0);
820 cx_write(MO_GP1_IO, core->board.radio.gpio1);
821 cx_write(MO_GP2_IO, core->board.radio.gpio2);
430189da
DB		 822 if (core->board.radio.audioroute) {
823 if(core->board.audio_chip &&
824 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 825 call_all(core, audio, s_routing,
826 core->board.radio.audioroute, 0, 0);
430189da
DB		 827 }
828 /* "I2S ADC mode" */
829 core->tvaudio = WW_I2SADC;
830 cx88_set_tvaudio(core);
831 } else {
832 /* FM Mode */
833 core->tvaudio = WW_FM;
834 cx88_set_tvaudio(core);
835 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
836 }
b8341e1d 837 call_all(core, tuner, s_radio);
1da177e4 838 }
d56dc612 839 unlock_kernel();
1da177e4 840
3e010845
DB		 841 atomic_inc(&core->users);
842
4ac97914 843 return 0;
1da177e4
LT		 844}
845
846static ssize_t
f9e7a020 847video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 848{
849 struct cx8800_fh *fh = file->private_data;
850
851 switch (fh->type) {
852 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
853 if (res_locked(fh->dev,RESOURCE_VIDEO))
854 return -EBUSY;
855 return videobuf_read_one(&fh->vidq, data, count, ppos,
856 file->f_flags & O_NONBLOCK);
857 case V4L2_BUF_TYPE_VBI_CAPTURE:
858 if (!res_get(fh->dev,fh,RESOURCE_VBI))
859 return -EBUSY;
860 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
861 file->f_flags & O_NONBLOCK);
862 default:
863 BUG();
864 return 0;
865 }
866}
867
868static unsigned int
869video_poll(struct file *file, struct poll_table_struct *wait)
870{
871 struct cx8800_fh *fh = file->private_data;
872 struct cx88_buffer *buf;
9fd6418a 873 unsigned int rc = POLLERR;
1da177e4
LT		 874
875 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
876 if (!res_get(fh->dev,fh,RESOURCE_VBI))
877 return POLLERR;
878 return videobuf_poll_stream(file, &fh->vbiq, wait);
879 }
880
9fd6418a 881 mutex_lock(&fh->vidq.vb_lock);
1da177e4
LT		 882 if (res_check(fh,RESOURCE_VIDEO)) {
883 /* streaming capture */
884 if (list_empty(&fh->vidq.stream))
9fd6418a 885 goto done;
1da177e4
LT		 886 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
887 } else {
888 /* read() capture */
889 buf = (struct cx88_buffer*)fh->vidq.read_buf;
890 if (NULL == buf)
9fd6418a 891 goto done;
1da177e4
LT		 892 }
893 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 894 if (buf->vb.state == VIDEOBUF_DONE ||
895 buf->vb.state == VIDEOBUF_ERROR)
9fd6418a
F		 896 rc = POLLIN|POLLRDNORM;
897 else
898 rc = 0;
899done:
900 mutex_unlock(&fh->vidq.vb_lock);
901 return rc;
1da177e4
LT		 902}
903
bec43661 904static int video_release(struct file *file)
1da177e4
LT		 905{
906 struct cx8800_fh *fh = file->private_data;
907 struct cx8800_dev *dev = fh->dev;
908
909 /* turn off overlay */
910 if (res_check(fh, RESOURCE_OVERLAY)) {
911 /* FIXME */
912 res_free(dev,fh,RESOURCE_OVERLAY);
913 }
914
915 /* stop video capture */
916 if (res_check(fh, RESOURCE_VIDEO)) {
917 videobuf_queue_cancel(&fh->vidq);
918 res_free(dev,fh,RESOURCE_VIDEO);
919 }
920 if (fh->vidq.read_buf) {
921 buffer_release(&fh->vidq,fh->vidq.read_buf);
922 kfree(fh->vidq.read_buf);
923 }
924
925 /* stop vbi capture */
926 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 927 videobuf_stop(&fh->vbiq);
1da177e4
LT		 928 res_free(dev,fh,RESOURCE_VBI);
929 }
930
931 videobuf_mmap_free(&fh->vidq);
932 videobuf_mmap_free(&fh->vbiq);
933 file->private_data = NULL;
934 kfree(fh);
e52e98a7 935
06f837ca 936 mutex_lock(&dev->core->lock);
3e010845 937 if(atomic_dec_and_test(&dev->core->users))
622b828a 938 call_all(dev->core, core, s_power, 0);
06f837ca 939 mutex_unlock(&dev->core->lock);
e52e98a7 940
1da177e4
LT		 941 return 0;
942}
943
944static int
945video_mmap(struct file *file, struct vm_area_struct * vma)
946{
947 struct cx8800_fh *fh = file->private_data;
948
949 return videobuf_mmap_mapper(get_queue(fh), vma);
950}
951
952/* ------------------------------------------------------------------ */
8d87cb9f 953/* VIDEO CTRL IOCTLS */
1da177e4 954
54da49f5 955int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 956{
8d87cb9f 957 struct cx88_ctrl *c = NULL;
1da177e4
LT		 958 u32 value;
959 int i;
960
961 for (i = 0; i < CX8800_CTLS; i++)
962 if (cx8800_ctls[i].v.id == ctl->id)
963 c = &cx8800_ctls[i];
8d87cb9f 964 if (unlikely(NULL == c))
1da177e4
LT		 965 return -EINVAL;
966
967 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
968 switch (ctl->id) {
969 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 970 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
971 : (0x7f - (value & 0x7f));
1da177e4
LT		 972 break;
973 case V4L2_CID_AUDIO_VOLUME:
974 ctl->value = 0x3f - (value & 0x3f);
975 break;
976 default:
977 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
978 break;
979 }
6457af5f
IP		 980 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
981 ctl->id, c->v.name, ctl->value, c->reg,
982 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 983 return 0;
984}
54da49f5 985EXPORT_SYMBOL(cx88_get_control);
1da177e4 986
54da49f5 987int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 988{
1da177e4 989 struct cx88_ctrl *c = NULL;
70f00044 990 u32 value,mask;
1da177e4 991 int i;
8d87cb9f 992
70f00044
MCC		 993 for (i = 0; i < CX8800_CTLS; i++) {
994 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 995 c = &cx8800_ctls[i];
70f00044
MCC		 996 }
997 }
8d87cb9f 998 if (unlikely(NULL == c))
1da177e4
LT		 999 return -EINVAL;
1000
1001 if (ctl->value < c->v.minimum)
e52e98a7 1002 ctl->value = c->v.minimum;
1da177e4 1003 if (ctl->value > c->v.maximum)
e52e98a7 1004 ctl->value = c->v.maximum;
70f00044 1005 mask=c->mask;
1da177e4
LT		 1006 switch (ctl->id) {
1007 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 1008 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 1009 break;
1010 case V4L2_CID_AUDIO_VOLUME:
1011 value = 0x3f - (ctl->value & 0x3f);
1012 break;
1013 case V4L2_CID_SATURATION:
1014 /* special v_sat handling */
70f00044
MCC		 1015
1016 value = ((ctl->value - c->off) << c->shift) & c->mask;
1017
63ab1bdc 1018 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1019 /* For SECAM, both U and V sat should be equal */
1020 value=value<<8|value;
1021 } else {
1022 /* Keeps U Saturation proportional to V Sat */
1023 value=(value*0x5a)/0x7f<<8|value;
1024 }
1025 mask=0xffff;
1026 break;
6d04203c
FD		 1027 case V4L2_CID_CHROMA_AGC:
1028 /* Do not allow chroma AGC to be enabled for SECAM */
1029 value = ((ctl->value - c->off) << c->shift) & c->mask;
1030 if (core->tvnorm & V4L2_STD_SECAM && value)
1031 return -EINVAL;
1032 break;
1da177e4
LT		 1033 default:
1034 value = ((ctl->value - c->off) << c->shift) & c->mask;
1035 break;
1036 }
6457af5f
IP		 1037 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1038 ctl->id, c->v.name, ctl->value, c->reg, value,
1039 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1040 if (c->sreg) {
70f00044 1041 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1042 } else {
70f00044 1043 cx_andor(c->reg, mask, value);
1da177e4
LT		 1044 }
1045 return 0;
1046}
54da49f5 1047EXPORT_SYMBOL(cx88_set_control);
1da177e4 1048
e52e98a7 1049static void init_controls(struct cx88_core *core)
1da177e4 1050{
70f00044
MCC		 1051 struct v4l2_control ctrl;
1052 int i;
1da177e4 1053
70f00044
MCC		 1054 for (i = 0; i < CX8800_CTLS; i++) {
1055 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1056 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1057
54da49f5 1058 cx88_set_control(core, &ctrl);
70f00044 1059 }
1da177e4
LT		 1060}
1061
1062/* ------------------------------------------------------------------ */
8d87cb9f 1063/* VIDEO IOCTLS */
1da177e4 1064
78b526a4 1065static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1066 struct v4l2_format *f)
1da177e4 1067{
8d87cb9f
MCC		 1068 struct cx8800_fh *fh = priv;
1069
1070 f->fmt.pix.width = fh->width;
1071 f->fmt.pix.height = fh->height;
1072 f->fmt.pix.field = fh->vidq.field;
1073 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1074 f->fmt.pix.bytesperline =
1075 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1076 f->fmt.pix.sizeimage =
1077 f->fmt.pix.height * f->fmt.pix.bytesperline;
1078 return 0;
1da177e4
LT		 1079}
1080
78b526a4 1081static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1082 struct v4l2_format *f)
1da177e4 1083{
8d87cb9f
MCC		 1084 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1085 struct cx8800_fmt *fmt;
1086 enum v4l2_field field;
1087 unsigned int maxw, maxh;
e52e98a7 1088
8d87cb9f
MCC		 1089 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1090 if (NULL == fmt)
1091 return -EINVAL;
1da177e4 1092
8d87cb9f
MCC		 1093 field = f->fmt.pix.field;
1094 maxw = norm_maxw(core->tvnorm);
1095 maxh = norm_maxh(core->tvnorm);
1da177e4 1096
8d87cb9f
MCC		 1097 if (V4L2_FIELD_ANY == field) {
1098 field = (f->fmt.pix.height > maxh/2)
1099 ? V4L2_FIELD_INTERLACED
1100 : V4L2_FIELD_BOTTOM;
1da177e4 1101 }
8d87cb9f
MCC		 1102
1103 switch (field) {
1104 case V4L2_FIELD_TOP:
1105 case V4L2_FIELD_BOTTOM:
1106 maxh = maxh / 2;
1107 break;
1108 case V4L2_FIELD_INTERLACED:
1109 break;
1da177e4
LT		 1110 default:
1111 return -EINVAL;
1112 }
8d87cb9f
MCC		 1113
1114 f->fmt.pix.field = field;
4b89945e
TP		 1115 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
1116 &f->fmt.pix.height, 32, maxh, 0, 0);
8d87cb9f
MCC		 1117 f->fmt.pix.bytesperline =
1118 (f->fmt.pix.width * fmt->depth) >> 3;
1119 f->fmt.pix.sizeimage =
1120 f->fmt.pix.height * f->fmt.pix.bytesperline;
1121
1122 return 0;
1da177e4
LT		 1123}
1124
78b526a4 1125static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1126 struct v4l2_format *f)
1da177e4 1127{
8d87cb9f 1128 struct cx8800_fh *fh = priv;
78b526a4 1129 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1130
1131 if (0 != err)
1132 return err;
1133 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1134 fh->width = f->fmt.pix.width;
1135 fh->height = f->fmt.pix.height;
1136 fh->vidq.field = f->fmt.pix.field;
1137 return 0;
1da177e4
LT		 1138}
1139
8d87cb9f
MCC		 1140static int vidioc_querycap (struct file *file, void *priv,
1141 struct v4l2_capability *cap)
1da177e4 1142{
8d87cb9f 1143 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1144 struct cx88_core *core = dev->core;
1da177e4 1145
8d87cb9f 1146 strcpy(cap->driver, "cx8800");
6a59d64c 1147 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1148 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1149 cap->version = CX88_VERSION_CODE;
1150 cap->capabilities =
1151 V4L2_CAP_VIDEO_CAPTURE |
1152 V4L2_CAP_READWRITE |
1153 V4L2_CAP_STREAMING |
1154 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1155 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1156 cap->capabilities |= V4L2_CAP_TUNER;
1157 return 0;
1158}
e52e98a7 1159
78b526a4 1160static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1161 struct v4l2_fmtdesc *f)
1162{
1163 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1164 return -EINVAL;
1165
1166 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1167 f->pixelformat = formats[f->index].fourcc;
1168
1169 return 0;
1170}
1da177e4 1171
0dfa9abd 1172#ifdef CONFIG_VIDEO_V4L1_COMPAT
8d87cb9f
MCC		 1173static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1174{
c1accaa2 1175 struct cx8800_fh *fh = priv;
8d87cb9f 1176
c1accaa2 1177 return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
8d87cb9f 1178}
79436633 1179#endif
e52e98a7 1180
8d87cb9f
MCC		 1181static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1182{
1183 struct cx8800_fh *fh = priv;
1184 return (videobuf_reqbufs(get_queue(fh), p));
1185}
e52e98a7 1186
8d87cb9f
MCC		 1187static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1188{
1189 struct cx8800_fh *fh = priv;
1190 return (videobuf_querybuf(get_queue(fh), p));
1191}
e52e98a7 1192
8d87cb9f
MCC		 1193static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1194{
1195 struct cx8800_fh *fh = priv;
1196 return (videobuf_qbuf(get_queue(fh), p));
1197}
e52e98a7 1198
8d87cb9f
MCC		 1199static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1200{
1201 struct cx8800_fh *fh = priv;
1202 return (videobuf_dqbuf(get_queue(fh), p,
1203 file->f_flags & O_NONBLOCK));
1204}
e52e98a7 1205
8d87cb9f
MCC		 1206static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1207{
1208 struct cx8800_fh *fh = priv;
1209 struct cx8800_dev *dev = fh->dev;
1210
b058e3f3
RD		 1211 /* We should remember that this driver also supports teletext, */
1212 /* so we have to test if the v4l2_buf_type is VBI capture data. */
1213 if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1214 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
8d87cb9f 1215 return -EINVAL;
b058e3f3 1216
8d87cb9f
MCC		 1217 if (unlikely(i != fh->type))
1218 return -EINVAL;
1219
1220 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1221 return -EBUSY;
1222 return videobuf_streamon(get_queue(fh));
1223}
1224
1225static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1226{
1227 struct cx8800_fh *fh = priv;
1228 struct cx8800_dev *dev = fh->dev;
1229 int err, res;
1230
b058e3f3
RD		 1231 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1232 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
8d87cb9f 1233 return -EINVAL;
b058e3f3 1234
8d87cb9f
MCC		 1235 if (i != fh->type)
1236 return -EINVAL;
1237
1238 res = get_ressource(fh);
1239 err = videobuf_streamoff(get_queue(fh));
1240 if (err < 0)
1241 return err;
1242 res_free(dev,fh,res);
e52e98a7
MCC		 1243 return 0;
1244}
1245
63ab1bdc 1246static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1247{
8d87cb9f 1248 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1249
8d87cb9f 1250 mutex_lock(&core->lock);
63ab1bdc 1251 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1252 mutex_unlock(&core->lock);
63ab1bdc 1253
8d87cb9f
MCC		 1254 return 0;
1255}
1da177e4 1256
8d87cb9f 1257/* only one input in this sample driver */
54da49f5 1258int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1259{
8d87cb9f
MCC		 1260 static const char *iname[] = {
1261 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1262 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1263 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1264 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1265 [ CX88_VMUX_SVIDEO ] = "S-Video",
1266 [ CX88_VMUX_TELEVISION ] = "Television",
1267 [ CX88_VMUX_CABLE ] = "Cable TV",
1268 [ CX88_VMUX_DVB ] = "DVB",
1269 [ CX88_VMUX_DEBUG ] = "for debug only",
1270 };
f3334bcb 1271 unsigned int n = i->index;
1da177e4 1272
8d87cb9f
MCC		 1273 if (n >= 4)
1274 return -EINVAL;
6a59d64c 1275 if (0 == INPUT(n).type)
8d87cb9f 1276 return -EINVAL;
8d87cb9f 1277 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1278 strcpy(i->name,iname[INPUT(n).type]);
1279 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
1280 (CX88_VMUX_CABLE == INPUT(n).type))
8d87cb9f 1281 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1282 i->std = CX88_NORMS;
8d87cb9f
MCC		 1283 return 0;
1284}
54da49f5
MCC		 1285EXPORT_SYMBOL(cx88_enum_input);
1286
1287static int vidioc_enum_input (struct file *file, void *priv,
1288 struct v4l2_input *i)
1289{
1290 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1291 return cx88_enum_input (core,i);
1292}
1da177e4 1293
8d87cb9f
MCC		 1294static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1295{
1296 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1297
8d87cb9f
MCC		 1298 *i = core->input;
1299 return 0;
1300}
1da177e4 1301
8d87cb9f
MCC		 1302static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1303{
1304 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1305
8d87cb9f
MCC		 1306 if (i >= 4)
1307 return -EINVAL;
1da177e4 1308
8d87cb9f
MCC		 1309 mutex_lock(&core->lock);
1310 cx88_newstation(core);
e90311a1 1311 cx88_video_mux(core,i);
8d87cb9f
MCC		 1312 mutex_unlock(&core->lock);
1313 return 0;
1314}
1da177e4 1315
1da177e4 1316
1da177e4 1317
8d87cb9f
MCC		 1318static int vidioc_queryctrl (struct file *file, void *priv,
1319 struct v4l2_queryctrl *qctrl)
1320{
6d04203c
FD		 1321 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1322
8d87cb9f
MCC		 1323 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1324 if (unlikely(qctrl->id == 0))
1325 return -EINVAL;
6d04203c 1326 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1327}
1da177e4 1328
54da49f5 1329static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1330 struct v4l2_control *ctl)
1331{
1332 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1333 return
1334 cx88_get_control(core,ctl);
1335}
1da177e4 1336
54da49f5
MCC		 1337static int vidioc_s_ctrl (struct file *file, void *priv,
1338 struct v4l2_control *ctl)
1339{
1340 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1341 return
54da49f5 1342 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1343}
1344
1345static int vidioc_g_tuner (struct file *file, void *priv,
1346 struct v4l2_tuner *t)
1347{
1348 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1349 u32 reg;
1da177e4 1350
6a59d64c 1351 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1352 return -EINVAL;
243d8c0f
MCC		 1353 if (0 != t->index)
1354 return -EINVAL;
a82decf6 1355
8d87cb9f
MCC		 1356 strcpy(t->name, "Television");
1357 t->type = V4L2_TUNER_ANALOG_TV;
1358 t->capability = V4L2_TUNER_CAP_NORM;
1359 t->rangehigh = 0xffffffffUL;
a82decf6 1360
8d87cb9f
MCC		 1361 cx88_get_stereo(core ,t);
1362 reg = cx_read(MO_DEVICE_STATUS);
1363 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1364 return 0;
1365}
41ef7c1e 1366
8d87cb9f
MCC		 1367static int vidioc_s_tuner (struct file *file, void *priv,
1368 struct v4l2_tuner *t)
1369{
1370 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1371
6a59d64c 1372 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1373 return -EINVAL;
1374 if (0 != t->index)
1375 return -EINVAL;
c5287ba1 1376
8d87cb9f
MCC		 1377 cx88_set_stereo(core, t->audmode, 1);
1378 return 0;
1379}
902fc997 1380
8d87cb9f
MCC		 1381static int vidioc_g_frequency (struct file *file, void *priv,
1382 struct v4l2_frequency *f)
1383{
1384 struct cx8800_fh *fh = priv;
1385 struct cx88_core *core = fh->dev->core;
902fc997 1386
6a59d64c 1387 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1388 return -EINVAL;
1389
1390 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1391 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1392 f->frequency = core->freq;
1393
b8341e1d 1394 call_all(core, tuner, g_frequency, f);
1da177e4 1395
1da177e4
LT		 1396 return 0;
1397}
1398
54da49f5 1399int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1400 struct v4l2_frequency *f)
1da177e4 1401{
6a59d64c 1402 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1403 return -EINVAL;
1404 if (unlikely(f->tuner != 0))
1405 return -EINVAL;
54da49f5 1406
8d87cb9f
MCC		 1407 mutex_lock(&core->lock);
1408 core->freq = f->frequency;
1409 cx88_newstation(core);
b8341e1d 1410 call_all(core, tuner, s_frequency, f);
c7b0ac05 1411
8d87cb9f
MCC		 1412 /* When changing channels it is required to reset TVAUDIO */
1413 msleep (10);
1414 cx88_set_tvaudio(core);
c7b0ac05 1415
8d87cb9f 1416 mutex_unlock(&core->lock);
54da49f5 1417
8d87cb9f 1418 return 0;
1da177e4 1419}
54da49f5
MCC		 1420EXPORT_SYMBOL(cx88_set_freq);
1421
1422static int vidioc_s_frequency (struct file *file, void *priv,
1423 struct v4l2_frequency *f)
1424{
1425 struct cx8800_fh *fh = priv;
1426 struct cx88_core *core = fh->dev->core;
1427
1428 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1429 return -EINVAL;
1430 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1431 return -EINVAL;
1432
1433 return
1434 cx88_set_freq (core,f);
1435}
1da177e4 1436
dbbff48f
TP		 1437#ifdef CONFIG_VIDEO_ADV_DEBUG
1438static int vidioc_g_register (struct file *file, void *fh,
aecde8b5 1439 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1440{
1441 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1442
aecde8b5 1443 if (!v4l2_chip_match_host(&reg->match))
dbbff48f
TP		 1444 return -EINVAL;
1445 /* cx2388x has a 24-bit register space */
aecde8b5
HV		 1446 reg->val = cx_read(reg->reg & 0xffffff);
1447 reg->size = 4;
dbbff48f
TP		 1448 return 0;
1449}
1450
1451static int vidioc_s_register (struct file *file, void *fh,
aecde8b5 1452 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1453{
1454 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1455
aecde8b5 1456 if (!v4l2_chip_match_host(&reg->match))
dbbff48f 1457 return -EINVAL;
aecde8b5 1458 cx_write(reg->reg & 0xffffff, reg->val);
dbbff48f
TP		 1459 return 0;
1460}
1461#endif
8d87cb9f
MCC		 1462
1463/* ----------------------------------------------------------- */
1464/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1465/* ----------------------------------------------------------- */
1466
8d87cb9f
MCC		 1467static int radio_querycap (struct file *file, void *priv,
1468 struct v4l2_capability *cap)
1da177e4 1469{
8d87cb9f 1470 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1471 struct cx88_core *core = dev->core;
1472
8d87cb9f 1473 strcpy(cap->driver, "cx8800");
6a59d64c 1474 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1475 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1476 cap->version = CX88_VERSION_CODE;
1477 cap->capabilities = V4L2_CAP_TUNER;
1478 return 0;
1479}
1da177e4 1480
8d87cb9f
MCC		 1481static int radio_g_tuner (struct file *file, void *priv,
1482 struct v4l2_tuner *t)
1483{
1484 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1485
8d87cb9f
MCC		 1486 if (unlikely(t->index > 0))
1487 return -EINVAL;
1da177e4 1488
8d87cb9f
MCC		 1489 strcpy(t->name, "Radio");
1490 t->type = V4L2_TUNER_RADIO;
1da177e4 1491
b8341e1d 1492 call_all(core, tuner, g_tuner, t);
8d87cb9f
MCC		 1493 return 0;
1494}
1da177e4 1495
8d87cb9f
MCC		 1496static int radio_enum_input (struct file *file, void *priv,
1497 struct v4l2_input *i)
1498{
1499 if (i->index != 0)
1500 return -EINVAL;
1501 strcpy(i->name,"Radio");
1502 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1503
8d87cb9f
MCC		 1504 return 0;
1505}
a82decf6 1506
8d87cb9f
MCC		 1507static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1508{
1509 if (unlikely(a->index))
1510 return -EINVAL;
a82decf6 1511
8d87cb9f
MCC		 1512 strcpy(a->name,"Radio");
1513 return 0;
1514}
a82decf6 1515
8d87cb9f 1516/* FIXME: Should add a standard for radio */
a82decf6 1517
8d87cb9f
MCC		 1518static int radio_s_tuner (struct file *file, void *priv,
1519 struct v4l2_tuner *t)
1520{
1521 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1522
8d87cb9f
MCC		 1523 if (0 != t->index)
1524 return -EINVAL;
1da177e4 1525
b8341e1d 1526 call_all(core, tuner, s_tuner, t);
1da177e4 1527
8d87cb9f
MCC		 1528 return 0;
1529}
1da177e4 1530
8d87cb9f
MCC		 1531static int radio_s_audio (struct file *file, void *fh,
1532 struct v4l2_audio *a)
1533{
1534 return 0;
1535}
1da177e4 1536
8d87cb9f
MCC		 1537static int radio_s_input (struct file *file, void *fh, unsigned int i)
1538{
1da177e4 1539 return 0;
8d87cb9f 1540}
1da177e4 1541
8d87cb9f
MCC		 1542static int radio_queryctrl (struct file *file, void *priv,
1543 struct v4l2_queryctrl *c)
1da177e4 1544{
8d87cb9f
MCC		 1545 int i;
1546
1547 if (c->id < V4L2_CID_BASE ||
1548 c->id >= V4L2_CID_LASTP1)
1549 return -EINVAL;
1550 if (c->id == V4L2_CID_AUDIO_MUTE) {
1551 for (i = 0; i < CX8800_CTLS; i++)
1552 if (cx8800_ctls[i].v.id == c->id)
1553 break;
1554 *c = cx8800_ctls[i].v;
1555 } else
1556 *c = no_ctl;
1557 return 0;
1558}
1da177e4
LT		 1559
1560/* ----------------------------------------------------------- */
1561
1562static void cx8800_vid_timeout(unsigned long data)
1563{
1564 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1565 struct cx88_core *core = dev->core;
1566 struct cx88_dmaqueue *q = &dev->vidq;
1567 struct cx88_buffer *buf;
1568 unsigned long flags;
1569
e52e98a7 1570 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1571
1572 cx_clear(MO_VID_DMACNTRL, 0x11);
1573 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1574
1575 spin_lock_irqsave(&dev->slock,flags);
1576 while (!list_empty(&q->active)) {
1577 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1578 list_del(&buf->vb.queue);
0fc0686e 1579 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1580 wake_up(&buf->vb.done);
1581 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1582 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1583 }
1584 restart_video_queue(dev,q);
1585 spin_unlock_irqrestore(&dev->slock,flags);
1586}
1587
41ef7c1e
MCC		 1588static char *cx88_vid_irqs[32] = {
1589 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1590 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1591 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1592 "y_sync", "u_sync", "v_sync", "vbi_sync",
1593 "opc_err", "par_err", "rip_err", "pci_abort",
1594};
1595
1da177e4
LT		 1596static void cx8800_vid_irq(struct cx8800_dev *dev)
1597{
1598 struct cx88_core *core = dev->core;
1599 u32 status, mask, count;
1600
1601 status = cx_read(MO_VID_INTSTAT);
1602 mask = cx_read(MO_VID_INTMSK);
1603 if (0 == (status & mask))
1604 return;
1605 cx_write(MO_VID_INTSTAT, status);
1606 if (irq_debug || (status & mask & ~0xff))
1607 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1608 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1609 status, mask);
1da177e4
LT		 1610
1611 /* risc op code error */
1612 if (status & (1 << 16)) {
1613 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1614 cx_clear(MO_VID_DMACNTRL, 0x11);
1615 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1616 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1617 }
1618
1619 /* risc1 y */
1620 if (status & 0x01) {
1621 spin_lock(&dev->slock);
1622 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1623 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1624 spin_unlock(&dev->slock);
1625 }
1626
1627 /* risc1 vbi */
1628 if (status & 0x08) {
1629 spin_lock(&dev->slock);
1630 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1631 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1632 spin_unlock(&dev->slock);
1633 }
1634
1635 /* risc2 y */
1636 if (status & 0x10) {
1637 dprintk(2,"stopper video\n");
1638 spin_lock(&dev->slock);
1639 restart_video_queue(dev,&dev->vidq);
1640 spin_unlock(&dev->slock);
1641 }
1642
1643 /* risc2 vbi */
1644 if (status & 0x80) {
1645 dprintk(2,"stopper vbi\n");
1646 spin_lock(&dev->slock);
1647 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1648 spin_unlock(&dev->slock);
1649 }
1650}
1651
7d12e780 1652static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1653{
1654 struct cx8800_dev *dev = dev_id;
1655 struct cx88_core *core = dev->core;
1656 u32 status;
1657 int loop, handled = 0;
1658
1659 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1660 status = cx_read(MO_PCI_INTSTAT) &
1661 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1662 if (0 == status)
1663 goto out;
1664 cx_write(MO_PCI_INTSTAT, status);
1665 handled = 1;
1666
1667 if (status & core->pci_irqmask)
1668 cx88_core_irq(core,status);
8ddac9ee 1669 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1670 cx8800_vid_irq(dev);
1671 };
1672 if (10 == loop) {
1673 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1674 core->name);
1675 cx_write(MO_PCI_INTMSK,0);
1676 }
1677
1678 out:
1679 return IRQ_RETVAL(handled);
1680}
1681
1682/* ----------------------------------------------------------- */
1683/* exported stuff */
1684
bec43661 1685static const struct v4l2_file_operations video_fops =
1da177e4
LT		 1686{
1687 .owner = THIS_MODULE,
1688 .open = video_open,
1689 .release = video_release,
1690 .read = video_read,
1691 .poll = video_poll,
1692 .mmap = video_mmap,
8d87cb9f 1693 .ioctl = video_ioctl2,
1da177e4
LT		 1694};
1695
a399810c 1696static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1697 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1698 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1699 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1700 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1701 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1702 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1703 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1704 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1705 .vidioc_reqbufs = vidioc_reqbufs,
1706 .vidioc_querybuf = vidioc_querybuf,
1707 .vidioc_qbuf = vidioc_qbuf,
1708 .vidioc_dqbuf = vidioc_dqbuf,
1709 .vidioc_s_std = vidioc_s_std,
1710 .vidioc_enum_input = vidioc_enum_input,
1711 .vidioc_g_input = vidioc_g_input,
1712 .vidioc_s_input = vidioc_s_input,
1713 .vidioc_queryctrl = vidioc_queryctrl,
1714 .vidioc_g_ctrl = vidioc_g_ctrl,
1715 .vidioc_s_ctrl = vidioc_s_ctrl,
1716 .vidioc_streamon = vidioc_streamon,
1717 .vidioc_streamoff = vidioc_streamoff,
1718#ifdef CONFIG_VIDEO_V4L1_COMPAT
1719 .vidiocgmbuf = vidiocgmbuf,
1720#endif
1721 .vidioc_g_tuner = vidioc_g_tuner,
1722 .vidioc_s_tuner = vidioc_s_tuner,
1723 .vidioc_g_frequency = vidioc_g_frequency,
1724 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1725#ifdef CONFIG_VIDEO_ADV_DEBUG
1726 .vidioc_g_register = vidioc_g_register,
1727 .vidioc_s_register = vidioc_s_register,
1728#endif
a399810c
HV		 1729};
1730
1731static struct video_device cx8800_vbi_template;
1732
1733static struct video_device cx8800_video_template = {
1734 .name = "cx8800-video",
a399810c
HV		 1735 .fops = &video_fops,
1736 .minor = -1,
1737 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1738 .tvnorms = CX88_NORMS,
dbbff48f 1739 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1740};
1741
bec43661 1742static const struct v4l2_file_operations radio_fops =
1da177e4
LT		 1743{
1744 .owner = THIS_MODULE,
1745 .open = video_open,
1746 .release = video_release,
8d87cb9f 1747 .ioctl = video_ioctl2,
1da177e4
LT		 1748};
1749
a399810c 1750static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1751 .vidioc_querycap = radio_querycap,
1752 .vidioc_g_tuner = radio_g_tuner,
1753 .vidioc_enum_input = radio_enum_input,
1754 .vidioc_g_audio = radio_g_audio,
1755 .vidioc_s_tuner = radio_s_tuner,
1756 .vidioc_s_audio = radio_s_audio,
1757 .vidioc_s_input = radio_s_input,
1758 .vidioc_queryctrl = radio_queryctrl,
1759 .vidioc_g_ctrl = vidioc_g_ctrl,
1760 .vidioc_s_ctrl = vidioc_s_ctrl,
1761 .vidioc_g_frequency = vidioc_g_frequency,
1762 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1763#ifdef CONFIG_VIDEO_ADV_DEBUG
1764 .vidioc_g_register = vidioc_g_register,
1765 .vidioc_s_register = vidioc_s_register,
1766#endif
1da177e4
LT		 1767};
1768
a399810c
HV		 1769static struct video_device cx8800_radio_template = {
1770 .name = "cx8800-radio",
a399810c
HV		 1771 .fops = &radio_fops,
1772 .minor = -1,
1773 .ioctl_ops = &radio_ioctl_ops,
1774};
1775
1da177e4
LT		 1776/* ----------------------------------------------------------- */
1777
1778static void cx8800_unregister_video(struct cx8800_dev *dev)
1779{
1780 if (dev->radio_dev) {
f0813b4c 1781 if (video_is_registered(dev->radio_dev))
1da177e4
LT		 1782 video_unregister_device(dev->radio_dev);
1783 else
1784 video_device_release(dev->radio_dev);
1785 dev->radio_dev = NULL;
1786 }
1787 if (dev->vbi_dev) {
f0813b4c 1788 if (video_is_registered(dev->vbi_dev))
1da177e4
LT		 1789 video_unregister_device(dev->vbi_dev);
1790 else
1791 video_device_release(dev->vbi_dev);
1792 dev->vbi_dev = NULL;
1793 }
1794 if (dev->video_dev) {
f0813b4c 1795 if (video_is_registered(dev->video_dev))
1da177e4
LT		 1796 video_unregister_device(dev->video_dev);
1797 else
1798 video_device_release(dev->video_dev);
1799 dev->video_dev = NULL;
1800 }
1801}
1802
1803static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1804 const struct pci_device_id *pci_id)
1805{
1806 struct cx8800_dev *dev;
1807 struct cx88_core *core;
8d87cb9f 1808
1da177e4
LT		 1809 int err;
1810
7408187d 1811 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1812 if (NULL == dev)
1813 return -ENOMEM;
1da177e4
LT		 1814
1815 /* pci init */
1816 dev->pci = pci_dev;
1817 if (pci_enable_device(pci_dev)) {
1818 err = -EIO;
1819 goto fail_free;
1820 }
1821 core = cx88_core_get(dev->pci);
1822 if (NULL == core) {
1823 err = -EINVAL;
1824 goto fail_free;
1825 }
1826 dev->core = core;
1827
1828 /* print pci info */
1829 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1830 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1831 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1832 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1833 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1834 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1835
1836 pci_set_master(pci_dev);
284901a9 1837 if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
1da177e4
LT		 1838 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1839 err = -EIO;
1840 goto fail_core;
1841 }
1842
8d87cb9f
MCC		 1843 /* Initialize VBI template */
1844 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1845 sizeof(cx8800_vbi_template) );
1846 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
8d87cb9f 1847
1da177e4 1848 /* initialize driver struct */
1da177e4 1849 spin_lock_init(&dev->slock);
63ab1bdc 1850 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1851
1852 /* init video dma queues */
1853 INIT_LIST_HEAD(&dev->vidq.active);
1854 INIT_LIST_HEAD(&dev->vidq.queued);
1855 dev->vidq.timeout.function = cx8800_vid_timeout;
1856 dev->vidq.timeout.data = (unsigned long)dev;
1857 init_timer(&dev->vidq.timeout);
1858 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1859 MO_VID_DMACNTRL,0x11,0x00);
1860
1861 /* init vbi dma queues */
1862 INIT_LIST_HEAD(&dev->vbiq.active);
1863 INIT_LIST_HEAD(&dev->vbiq.queued);
1864 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1865 dev->vbiq.timeout.data = (unsigned long)dev;
1866 init_timer(&dev->vbiq.timeout);
1867 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1868 MO_VID_DMACNTRL,0x88,0x00);
1869
1870 /* get irq */
1871 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1872 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1873 if (err < 0) {
5772f813 1874 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1875 core->name,pci_dev->irq);
1876 goto fail_core;
1877 }
1878 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1879
1880 /* load and configure helper modules */
e52e98a7 1881
38f9d308 1882 if (core->board.audio_chip == V4L2_IDENT_WM8775)
e6574f2f 1883 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
53dacb15 1884 "wm8775", "wm8775", 0x36 >> 1, NULL);
b8341e1d
HV		 1885
1886 if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
1887 /* This probes for a tda9874 as is used on some
1888 Pixelview Ultra boards. */
53dacb15 1889 v4l2_i2c_new_subdev(&core->v4l2_dev,
1792f68b 1890 &core->i2c_adap,
53dacb15 1891 "tvaudio", "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
b8341e1d 1892 }
3057906d 1893
6fcecce7
MK		 1894 switch (core->boardnr) {
1895 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
b8341e1d
HV		 1896 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1897 static struct i2c_board_info rtc_info = {
1898 I2C_BOARD_INFO("isl1208", 0x6f)
1899 };
1900
6fcecce7 1901 request_module("rtc-isl1208");
b8341e1d
HV		 1902 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1903 }
8efd2e28
MK		 1904 /* break intentionally omitted */
1905 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1906 request_module("ir-kbd-i2c");
6fcecce7
MK		 1907 }
1908
1da177e4
LT		 1909 /* register v4l devices */
1910 dev->video_dev = cx88_vdev_init(core,dev->pci,
1911 &cx8800_video_template,"video");
1912 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1913 video_nr[core->nr]);
1914 if (err < 0) {
5772f813 1915 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1916 core->name);
1917 goto fail_unreg;
1918 }
38c7c036
LP		 1919 printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
1920 core->name, video_device_node_name(dev->video_dev));
1da177e4
LT		 1921
1922 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1923 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1924 vbi_nr[core->nr]);
1925 if (err < 0) {
5772f813 1926 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1927 core->name);
1928 goto fail_unreg;
1929 }
38c7c036
LP		 1930 printk(KERN_INFO "%s/0: registered device %s\n",
1931 core->name, video_device_node_name(dev->vbi_dev));
1da177e4 1932
6a59d64c 1933 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1934 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1935 &cx8800_radio_template,"radio");
1936 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1937 radio_nr[core->nr]);
1938 if (err < 0) {
5772f813 1939 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1940 core->name);
1941 goto fail_unreg;
1942 }
38c7c036
LP		 1943 printk(KERN_INFO "%s/0: registered device %s\n",
1944 core->name, video_device_node_name(dev->radio_dev));
1da177e4
LT		 1945 }
1946
1947 /* everything worked */
1948 list_add_tail(&dev->devlist,&cx8800_devlist);
1949 pci_set_drvdata(pci_dev,dev);
1950
1951 /* initial device configuration */
3593cab5 1952 mutex_lock(&core->lock);
63ab1bdc 1953 cx88_set_tvnorm(core,core->tvnorm);
70f00044 1954 init_controls(core);
e90311a1 1955 cx88_video_mux(core,0);
3593cab5 1956 mutex_unlock(&core->lock);
1da177e4
LT		 1957
1958 /* start tvaudio thread */
6a59d64c 1959 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1960 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1961 if (IS_ERR(core->kthread)) {
1962 err = PTR_ERR(core->kthread);
5772f813
TP		 1963 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1964 core->name, err);
32b78de7
CG		 1965 }
1966 }
1da177e4
LT		 1967 return 0;
1968
1969fail_unreg:
1970 cx8800_unregister_video(dev);
1971 free_irq(pci_dev->irq, dev);
1972fail_core:
1973 cx88_core_put(core,dev->pci);
1974fail_free:
1975 kfree(dev);
1976 return err;
1977}
1978
1979static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1980{
4ac97914 1981 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1982 struct cx88_core *core = dev->core;
1da177e4
LT		 1983
1984 /* stop thread */
e52e98a7
MCC		 1985 if (core->kthread) {
1986 kthread_stop(core->kthread);
1987 core->kthread = NULL;
1da177e4
LT		 1988 }
1989
b12203d2
MB		 1990 if (core->ir)
1991 cx88_ir_stop(core, core->ir);
1992
e52e98a7 1993 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1994 pci_disable_device(pci_dev);
1995
1996 /* unregister stuff */
1997
1998 free_irq(pci_dev->irq, dev);
1999 cx8800_unregister_video(dev);
2000 pci_set_drvdata(pci_dev, NULL);
2001
2002 /* free memory */
2003 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
2004 list_del(&dev->devlist);
e52e98a7 2005 cx88_core_put(core,dev->pci);
1da177e4
LT		 2006 kfree(dev);
2007}
2008
17bc98a4 2009#ifdef CONFIG_PM
1da177e4
LT		 2010static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
2011{
b45009b0 2012 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2013 struct cx88_core *core = dev->core;
2014
2015 /* stop video+vbi capture */
2016 spin_lock(&dev->slock);
2017 if (!list_empty(&dev->vidq.active)) {
5772f813 2018 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 2019 stop_video_dma(dev);
2020 del_timer(&dev->vidq.timeout);
2021 }
2022 if (!list_empty(&dev->vbiq.active)) {
5772f813 2023 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2024 cx8800_stop_vbi_dma(dev);
2025 del_timer(&dev->vbiq.timeout);
2026 }
2027 spin_unlock(&dev->slock);
2028
13595a51
MCC		 2029 if (core->ir)
2030 cx88_ir_stop(core, core->ir);
1da177e4 2031 /* FIXME -- shutdown device */
e52e98a7 2032 cx88_shutdown(core);
1da177e4
LT		 2033
2034 pci_save_state(pci_dev);
2035 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2036 pci_disable_device(pci_dev);
2037 dev->state.disabled = 1;
2038 }
2039 return 0;
2040}
2041
2042static int cx8800_resume(struct pci_dev *pci_dev)
2043{
b45009b0 2044 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2045 struct cx88_core *core = dev->core;
08adb9e2 2046 int err;
1da177e4
LT		 2047
2048 if (dev->state.disabled) {
08adb9e2
MCC		 2049 err=pci_enable_device(pci_dev);
2050 if (err) {
5772f813
TP		 2051 printk(KERN_ERR "%s/0: can't enable device\n",
2052 core->name);
08adb9e2
MCC		 2053 return err;
2054 }
2055
1da177e4
LT		 2056 dev->state.disabled = 0;
2057 }
08adb9e2
MCC		 2058 err= pci_set_power_state(pci_dev, PCI_D0);
2059 if (err) {
5772f813 2060 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2061 pci_disable_device(pci_dev);
2062 dev->state.disabled = 1;
2063
2064 return err;
2065 }
1da177e4
LT		 2066 pci_restore_state(pci_dev);
2067
1da177e4 2068 /* FIXME: re-initialize hardware */
e52e98a7 2069 cx88_reset(core);
13595a51
MCC		 2070 if (core->ir)
2071 cx88_ir_start(core, core->ir);
2072
2073 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2074
2075 /* restart video+vbi capture */
2076 spin_lock(&dev->slock);
2077 if (!list_empty(&dev->vidq.active)) {
5772f813 2078 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2079 restart_video_queue(dev,&dev->vidq);
2080 }
2081 if (!list_empty(&dev->vbiq.active)) {
5772f813 2082 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2083 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2084 }
2085 spin_unlock(&dev->slock);
2086
2087 return 0;
2088}
17bc98a4 2089#endif
1da177e4
LT		 2090
2091/* ----------------------------------------------------------- */
2092
408b664a 2093static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2094 {
2095 .vendor = 0x14f1,
2096 .device = 0x8800,
b45009b0
MCC		 2097 .subvendor = PCI_ANY_ID,
2098 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2099 },{
2100 /* --- end of list --- */
2101 }
2102};
2103MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2104
2105static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2106 .name = "cx8800",
2107 .id_table = cx8800_pci_tbl,
2108 .probe = cx8800_initdev,
2109 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2110#ifdef CONFIG_PM
1da177e4
LT		 2111 .suspend = cx8800_suspend,
2112 .resume = cx8800_resume,
17bc98a4 2113#endif
1da177e4
LT		 2114};
2115
31d0f845 2116static int __init cx8800_init(void)
1da177e4 2117{
5772f813 2118 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2119 (CX88_VERSION_CODE >> 16) & 0xff,
2120 (CX88_VERSION_CODE >> 8) & 0xff,
2121 CX88_VERSION_CODE & 0xff);
2122#ifdef SNAPSHOT
2123 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2124 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2125#endif
2126 return pci_register_driver(&cx8800_pci_driver);
2127}
2128
31d0f845 2129static void __exit cx8800_fini(void)
1da177e4
LT		 2130{
2131 pci_unregister_driver(&cx8800_pci_driver);
2132}
2133
2134module_init(cx8800_init);
2135module_exit(cx8800_fini);
2136
2137/* ----------------------------------------------------------- */
2138/*
2139 * Local variables:
2140 * c-basic-offset: 8
2141 * End:
b45009b0 2142 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2143 */
Clone of davem's net-next-2.6 tree