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V4L/DVB (10140): gp8psk: fix incorrect return code (EINVAL instead of -EINVAL)
[net-next-2.6.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
c24228da 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
5e453dc7 41#include <media/v4l2-common.h>
35ea11ff 42#include <media/v4l2-ioctl.h>
1da177e4 43
cd41e28e 44#ifdef CONFIG_VIDEO_V4L1_COMPAT
79436633
MCC		 45/* Include V4L1 specific functions. Should be removed soon */
46#include <linux/videodev.h>
cd41e28e 47#endif
79436633 48
1da177e4
LT		 49MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
50MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
51MODULE_LICENSE("GPL");
52
53/* ------------------------------------------------------------------ */
54
55static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
56static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
57static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
58
59module_param_array(video_nr, int, NULL, 0444);
60module_param_array(vbi_nr, int, NULL, 0444);
61module_param_array(radio_nr, int, NULL, 0444);
62
63MODULE_PARM_DESC(video_nr,"video device numbers");
64MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
65MODULE_PARM_DESC(radio_nr,"radio device numbers");
66
ff699e6b 67static unsigned int video_debug;
1da177e4
LT		 68module_param(video_debug,int,0644);
69MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
70
ff699e6b 71static unsigned int irq_debug;
1da177e4
LT		 72module_param(irq_debug,int,0644);
73MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
74
75static unsigned int vid_limit = 16;
76module_param(vid_limit,int,0644);
77MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
78
79#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 80 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 81
82/* ------------------------------------------------------------------ */
83
84static LIST_HEAD(cx8800_devlist);
85
86/* ------------------------------------------------------------------- */
87/* static data */
88
1da177e4
LT		 89static struct cx8800_fmt formats[] = {
90 {
91 .name = "8 bpp, gray",
92 .fourcc = V4L2_PIX_FMT_GREY,
93 .cxformat = ColorFormatY8,
94 .depth = 8,
95 .flags = FORMAT_FLAGS_PACKED,
96 },{
97 .name = "15 bpp RGB, le",
98 .fourcc = V4L2_PIX_FMT_RGB555,
99 .cxformat = ColorFormatRGB15,
100 .depth = 16,
101 .flags = FORMAT_FLAGS_PACKED,
102 },{
103 .name = "15 bpp RGB, be",
104 .fourcc = V4L2_PIX_FMT_RGB555X,
105 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
106 .depth = 16,
107 .flags = FORMAT_FLAGS_PACKED,
108 },{
109 .name = "16 bpp RGB, le",
110 .fourcc = V4L2_PIX_FMT_RGB565,
111 .cxformat = ColorFormatRGB16,
112 .depth = 16,
113 .flags = FORMAT_FLAGS_PACKED,
114 },{
115 .name = "16 bpp RGB, be",
116 .fourcc = V4L2_PIX_FMT_RGB565X,
117 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
118 .depth = 16,
119 .flags = FORMAT_FLAGS_PACKED,
120 },{
121 .name = "24 bpp RGB, le",
122 .fourcc = V4L2_PIX_FMT_BGR24,
123 .cxformat = ColorFormatRGB24,
124 .depth = 24,
125 .flags = FORMAT_FLAGS_PACKED,
126 },{
127 .name = "32 bpp RGB, le",
128 .fourcc = V4L2_PIX_FMT_BGR32,
129 .cxformat = ColorFormatRGB32,
130 .depth = 32,
131 .flags = FORMAT_FLAGS_PACKED,
132 },{
133 .name = "32 bpp RGB, be",
134 .fourcc = V4L2_PIX_FMT_RGB32,
135 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
136 .depth = 32,
137 .flags = FORMAT_FLAGS_PACKED,
138 },{
139 .name = "4:2:2, packed, YUYV",
140 .fourcc = V4L2_PIX_FMT_YUYV,
141 .cxformat = ColorFormatYUY2,
142 .depth = 16,
143 .flags = FORMAT_FLAGS_PACKED,
144 },{
145 .name = "4:2:2, packed, UYVY",
146 .fourcc = V4L2_PIX_FMT_UYVY,
147 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
148 .depth = 16,
149 .flags = FORMAT_FLAGS_PACKED,
150 },
151};
152
153static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
154{
155 unsigned int i;
156
157 for (i = 0; i < ARRAY_SIZE(formats); i++)
158 if (formats[i].fourcc == fourcc)
159 return formats+i;
160 return NULL;
161}
162
163/* ------------------------------------------------------------------- */
164
165static const struct v4l2_queryctrl no_ctl = {
166 .name = "42",
167 .flags = V4L2_CTRL_FLAG_DISABLED,
168};
169
170static struct cx88_ctrl cx8800_ctls[] = {
171 /* --- video --- */
172 {
173 .v = {
174 .id = V4L2_CID_BRIGHTNESS,
175 .name = "Brightness",
176 .minimum = 0x00,
177 .maximum = 0xff,
178 .step = 1,
9f9c907f 179 .default_value = 0x7f,
1da177e4
LT		 180 .type = V4L2_CTRL_TYPE_INTEGER,
181 },
182 .off = 128,
183 .reg = MO_CONTR_BRIGHT,
184 .mask = 0x00ff,
185 .shift = 0,
186 },{
187 .v = {
188 .id = V4L2_CID_CONTRAST,
189 .name = "Contrast",
190 .minimum = 0,
191 .maximum = 0xff,
192 .step = 1,
70f00044 193 .default_value = 0x3f,
1da177e4
LT		 194 .type = V4L2_CTRL_TYPE_INTEGER,
195 },
41ef7c1e 196 .off = 0,
1da177e4
LT		 197 .reg = MO_CONTR_BRIGHT,
198 .mask = 0xff00,
199 .shift = 8,
200 },{
201 .v = {
202 .id = V4L2_CID_HUE,
203 .name = "Hue",
204 .minimum = 0,
205 .maximum = 0xff,
206 .step = 1,
9f9c907f 207 .default_value = 0x7f,
1da177e4
LT		 208 .type = V4L2_CTRL_TYPE_INTEGER,
209 },
9ac4c158 210 .off = 128,
1da177e4
LT		 211 .reg = MO_HUE,
212 .mask = 0x00ff,
213 .shift = 0,
214 },{
215 /* strictly, this only describes only U saturation.
216 * V saturation is handled specially through code.
217 */
218 .v = {
219 .id = V4L2_CID_SATURATION,
220 .name = "Saturation",
221 .minimum = 0,
222 .maximum = 0xff,
223 .step = 1,
70f00044 224 .default_value = 0x7f,
1da177e4
LT		 225 .type = V4L2_CTRL_TYPE_INTEGER,
226 },
227 .off = 0,
228 .reg = MO_UV_SATURATION,
229 .mask = 0x00ff,
230 .shift = 0,
231 },{
6d04203c
FD		 232 .v = {
233 .id = V4L2_CID_CHROMA_AGC,
234 .name = "Chroma AGC",
235 .minimum = 0,
236 .maximum = 1,
87a17389 237 .default_value = 0x1,
6d04203c
FD		 238 .type = V4L2_CTRL_TYPE_BOOLEAN,
239 },
240 .reg = MO_INPUT_FORMAT,
241 .mask = 1 << 10,
242 .shift = 10,
1b879c43
FD		 243 }, {
244 .v = {
245 .id = V4L2_CID_COLOR_KILLER,
246 .name = "Color killer",
247 .minimum = 0,
248 .maximum = 1,
0b5afdd2 249 .default_value = 0x1,
1b879c43
FD		 250 .type = V4L2_CTRL_TYPE_BOOLEAN,
251 },
252 .reg = MO_INPUT_FORMAT,
253 .mask = 1 << 9,
254 .shift = 9,
6d04203c 255 }, {
1da177e4
LT		 256 /* --- audio --- */
257 .v = {
258 .id = V4L2_CID_AUDIO_MUTE,
259 .name = "Mute",
260 .minimum = 0,
261 .maximum = 1,
70f00044 262 .default_value = 1,
1da177e4
LT		 263 .type = V4L2_CTRL_TYPE_BOOLEAN,
264 },
265 .reg = AUD_VOL_CTL,
266 .sreg = SHADOW_AUD_VOL_CTL,
267 .mask = (1 << 6),
268 .shift = 6,
269 },{
270 .v = {
271 .id = V4L2_CID_AUDIO_VOLUME,
272 .name = "Volume",
273 .minimum = 0,
274 .maximum = 0x3f,
275 .step = 1,
9f9c907f 276 .default_value = 0x3f,
1da177e4
LT		 277 .type = V4L2_CTRL_TYPE_INTEGER,
278 },
279 .reg = AUD_VOL_CTL,
280 .sreg = SHADOW_AUD_VOL_CTL,
281 .mask = 0x3f,
282 .shift = 0,
283 },{
284 .v = {
285 .id = V4L2_CID_AUDIO_BALANCE,
286 .name = "Balance",
287 .minimum = 0,
288 .maximum = 0x7f,
289 .step = 1,
290 .default_value = 0x40,
291 .type = V4L2_CTRL_TYPE_INTEGER,
292 },
293 .reg = AUD_BAL_CTL,
294 .sreg = SHADOW_AUD_BAL_CTL,
295 .mask = 0x7f,
296 .shift = 0,
297 }
298};
408b664a 299static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 300
38a2713a
MK		 301const u32 cx88_user_ctrls[] = {
302 V4L2_CID_USER_CLASS,
303 V4L2_CID_BRIGHTNESS,
304 V4L2_CID_CONTRAST,
305 V4L2_CID_SATURATION,
306 V4L2_CID_HUE,
307 V4L2_CID_AUDIO_VOLUME,
308 V4L2_CID_AUDIO_BALANCE,
309 V4L2_CID_AUDIO_MUTE,
6d04203c 310 V4L2_CID_CHROMA_AGC,
1b879c43 311 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 312 0
313};
314EXPORT_SYMBOL(cx88_user_ctrls);
315
316static const u32 *ctrl_classes[] = {
317 cx88_user_ctrls,
318 NULL
319};
320
6d04203c 321int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 322{
323 int i;
324
325 if (qctrl->id < V4L2_CID_BASE ||
326 qctrl->id >= V4L2_CID_LASTP1)
327 return -EINVAL;
328 for (i = 0; i < CX8800_CTLS; i++)
329 if (cx8800_ctls[i].v.id == qctrl->id)
330 break;
331 if (i == CX8800_CTLS) {
332 *qctrl = no_ctl;
333 return 0;
334 }
335 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 336 /* Report chroma AGC as inactive when SECAM is selected */
337 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
338 core->tvnorm & V4L2_STD_SECAM)
339 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
340
38a2713a
MK		 341 return 0;
342}
343EXPORT_SYMBOL(cx8800_ctrl_query);
344
1da177e4
LT		 345/* ------------------------------------------------------------------- */
346/* resource management */
347
348static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
349{
e52e98a7 350 struct cx88_core *core = dev->core;
1da177e4
LT		 351 if (fh->resources & bit)
352 /* have it already allocated */
353 return 1;
354
355 /* is it free? */
3593cab5 356 mutex_lock(&core->lock);
1da177e4
LT		 357 if (dev->resources & bit) {
358 /* no, someone else uses it */
3593cab5 359 mutex_unlock(&core->lock);
1da177e4
LT		 360 return 0;
361 }
362 /* it's free, grab it */
363 fh->resources |= bit;
364 dev->resources |= bit;
365 dprintk(1,"res: get %d\n",bit);
3593cab5 366 mutex_unlock(&core->lock);
1da177e4
LT		 367 return 1;
368}
369
370static
371int res_check(struct cx8800_fh *fh, unsigned int bit)
372{
373 return (fh->resources & bit);
374}
375
376static
377int res_locked(struct cx8800_dev *dev, unsigned int bit)
378{
379 return (dev->resources & bit);
380}
381
382static
383void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
384{
e52e98a7 385 struct cx88_core *core = dev->core;
ae24601b 386 BUG_ON((fh->resources & bits) != bits);
1da177e4 387
3593cab5 388 mutex_lock(&core->lock);
1da177e4
LT		 389 fh->resources &= ~bits;
390 dev->resources &= ~bits;
391 dprintk(1,"res: put %d\n",bits);
3593cab5 392 mutex_unlock(&core->lock);
1da177e4
LT		 393}
394
395/* ------------------------------------------------------------------ */
396
e90311a1 397int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 398{
e52e98a7 399 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 400
401 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 402 input, INPUT(input).vmux,
403 INPUT(input).gpio0,INPUT(input).gpio1,
404 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 405 core->input = input;
6a59d64c
TP		 406 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
407 cx_write(MO_GP3_IO, INPUT(input).gpio3);
408 cx_write(MO_GP0_IO, INPUT(input).gpio0);
409 cx_write(MO_GP1_IO, INPUT(input).gpio1);
410 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 411
6a59d64c 412 switch (INPUT(input).type) {
1da177e4
LT		 413 case CX88_VMUX_SVIDEO:
414 cx_set(MO_AFECFG_IO, 0x00000001);
415 cx_set(MO_INPUT_FORMAT, 0x00010010);
416 cx_set(MO_FILTER_EVEN, 0x00002020);
417 cx_set(MO_FILTER_ODD, 0x00002020);
418 break;
419 default:
420 cx_clear(MO_AFECFG_IO, 0x00000001);
421 cx_clear(MO_INPUT_FORMAT, 0x00010010);
422 cx_clear(MO_FILTER_EVEN, 0x00002020);
423 cx_clear(MO_FILTER_ODD, 0x00002020);
424 break;
425 }
f24546a9 426
66e6fbdf
RC		 427 /* if there are audioroutes defined, we have an external
428 ADC to deal with audio */
66e6fbdf 429 if (INPUT(input).audioroute) {
66e6fbdf
RC		 430 /* The wm8775 module has the "2" route hardwired into
431 the initialization. Some boards may use different
432 routes for different inputs. HVR-1300 surely does */
433 if (core->board.audio_chip &&
38f9d308 434 core->board.audio_chip == V4L2_IDENT_WM8775) {
66e6fbdf
RC		 435 struct v4l2_routing route;
436
437 route.input = INPUT(input).audioroute;
438 cx88_call_i2c_clients(core,
d8f69971 439 VIDIOC_INT_S_AUDIO_ROUTING, &route);
66e6fbdf 440 }
430189da
DB		 441 /* cx2388's C-ADC is connected to the tuner only.
442 When used with S-Video, that ADC is busy dealing with
443 chroma, so an external must be used for baseband audio */
444 if (INPUT(input).type != CX88_VMUX_TELEVISION ) {
445 /* "I2S ADC mode" */
446 core->tvaudio = WW_I2SADC;
447 cx88_set_tvaudio(core);
448 } else {
449 /* Normal mode */
450 cx_write(AUD_I2SCNTL, 0x0);
451 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
452 }
f24546a9 453 }
66e6fbdf 454
1da177e4
LT		 455 return 0;
456}
e90311a1 457EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 458
459/* ------------------------------------------------------------------ */
460
461static int start_video_dma(struct cx8800_dev *dev,
462 struct cx88_dmaqueue *q,
463 struct cx88_buffer *buf)
464{
465 struct cx88_core *core = dev->core;
466
467 /* setup fifo + format */
e52e98a7 468 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 469 buf->bpl, buf->risc.dma);
e52e98a7 470 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 471 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
472
473 /* reset counter */
474 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
475 q->count = 1;
476
477 /* enable irqs */
8ddac9ee 478 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 479
480 /* Enables corresponding bits at PCI_INT_STAT:
481 bits 0 to 4: video, audio, transport stream, VIP, Host
482 bit 7: timer
483 bits 8 and 9: DMA complete for: SRC, DST
484 bits 10 and 11: BERR signal asserted for RISC: RD, WR
485 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
486 */
1da177e4
LT		 487 cx_set(MO_VID_INTMSK, 0x0f0011);
488
489 /* enable capture */
490 cx_set(VID_CAPTURE_CONTROL,0x06);
491
492 /* start dma */
493 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 494 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 495
496 return 0;
497}
498
17bc98a4 499#ifdef CONFIG_PM
1da177e4
LT		 500static int stop_video_dma(struct cx8800_dev *dev)
501{
502 struct cx88_core *core = dev->core;
503
504 /* stop dma */
505 cx_clear(MO_VID_DMACNTRL, 0x11);
506
507 /* disable capture */
508 cx_clear(VID_CAPTURE_CONTROL,0x06);
509
510 /* disable irqs */
8ddac9ee 511 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 512 cx_clear(MO_VID_INTMSK, 0x0f0011);
513 return 0;
514}
17bc98a4 515#endif
1da177e4
LT		 516
517static int restart_video_queue(struct cx8800_dev *dev,
518 struct cx88_dmaqueue *q)
519{
e52e98a7 520 struct cx88_core *core = dev->core;
1da177e4 521 struct cx88_buffer *buf, *prev;
1da177e4
LT		 522
523 if (!list_empty(&q->active)) {
4ac97914 524 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 525 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
526 buf, buf->vb.i);
527 start_video_dma(dev, q, buf);
8bb629e2
TP		 528 list_for_each_entry(buf, &q->active, vb.queue)
529 buf->count = q->count++;
1da177e4
LT		 530 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
531 return 0;
532 }
533
534 prev = NULL;
535 for (;;) {
536 if (list_empty(&q->queued))
537 return 0;
4ac97914 538 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 539 if (NULL == prev) {
179e0917 540 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 541 start_video_dma(dev, q, buf);
0fc0686e 542 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 543 buf->count = q->count++;
544 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
545 dprintk(2,"[%p/%d] restart_queue - first active\n",
546 buf,buf->vb.i);
547
548 } else if (prev->vb.width == buf->vb.width &&
549 prev->vb.height == buf->vb.height &&
550 prev->fmt == buf->fmt) {
179e0917 551 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 552 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 553 buf->count = q->count++;
554 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
555 dprintk(2,"[%p/%d] restart_queue - move to active\n",
556 buf,buf->vb.i);
557 } else {
558 return 0;
559 }
560 prev = buf;
561 }
562}
563
564/* ------------------------------------------------------------------ */
565
566static int
567buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
568{
569 struct cx8800_fh *fh = q->priv_data;
570
571 *size = fh->fmt->depth*fh->width*fh->height >> 3;
572 if (0 == *count)
573 *count = 32;
574 while (*size * *count > vid_limit * 1024 * 1024)
575 (*count)--;
576 return 0;
577}
578
579static int
580buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
581 enum v4l2_field field)
582{
583 struct cx8800_fh *fh = q->priv_data;
584 struct cx8800_dev *dev = fh->dev;
e52e98a7 585 struct cx88_core *core = dev->core;
1da177e4 586 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 587 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 588 int rc, init_buffer = 0;
589
590 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 591 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
592 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 593 return -EINVAL;
594 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
595 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
596 return -EINVAL;
597
598 if (buf->fmt != fh->fmt ||
599 buf->vb.width != fh->width ||
600 buf->vb.height != fh->height ||
601 buf->vb.field != field) {
602 buf->fmt = fh->fmt;
603 buf->vb.width = fh->width;
604 buf->vb.height = fh->height;
605 buf->vb.field = field;
606 init_buffer = 1;
607 }
608
0fc0686e 609 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 610 init_buffer = 1;
c7b0ac05 611 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 612 goto fail;
613 }
614
615 if (init_buffer) {
616 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
617 switch (buf->vb.field) {
618 case V4L2_FIELD_TOP:
619 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 620 dma->sglist, 0, UNSET,
1da177e4
LT		 621 buf->bpl, 0, buf->vb.height);
622 break;
623 case V4L2_FIELD_BOTTOM:
624 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 625 dma->sglist, UNSET, 0,
1da177e4
LT		 626 buf->bpl, 0, buf->vb.height);
627 break;
628 case V4L2_FIELD_INTERLACED:
629 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 630 dma->sglist, 0, buf->bpl,
1da177e4
LT		 631 buf->bpl, buf->bpl,
632 buf->vb.height >> 1);
633 break;
634 case V4L2_FIELD_SEQ_TB:
635 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 636 dma->sglist,
1da177e4
LT		 637 0, buf->bpl * (buf->vb.height >> 1),
638 buf->bpl, 0,
639 buf->vb.height >> 1);
640 break;
641 case V4L2_FIELD_SEQ_BT:
642 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 643 dma->sglist,
1da177e4
LT		 644 buf->bpl * (buf->vb.height >> 1), 0,
645 buf->bpl, 0,
646 buf->vb.height >> 1);
647 break;
648 default:
649 BUG();
650 }
651 }
652 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
653 buf, buf->vb.i,
654 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
655 (unsigned long)buf->risc.dma);
656
0fc0686e 657 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 658 return 0;
659
660 fail:
c7b0ac05 661 cx88_free_buffer(q,buf);
1da177e4
LT		 662 return rc;
663}
664
665static void
666buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
667{
668 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
669 struct cx88_buffer *prev;
670 struct cx8800_fh *fh = vq->priv_data;
671 struct cx8800_dev *dev = fh->dev;
e52e98a7 672 struct cx88_core *core = dev->core;
1da177e4
LT		 673 struct cx88_dmaqueue *q = &dev->vidq;
674
675 /* add jump to stopper */
676 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
677 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
678
679 if (!list_empty(&q->queued)) {
680 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 681 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 682 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
683 buf, buf->vb.i);
684
685 } else if (list_empty(&q->active)) {
686 list_add_tail(&buf->vb.queue,&q->active);
687 start_video_dma(dev, q, buf);
0fc0686e 688 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 689 buf->count = q->count++;
690 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
691 dprintk(2,"[%p/%d] buffer_queue - first active\n",
692 buf, buf->vb.i);
693
694 } else {
695 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
696 if (prev->vb.width == buf->vb.width &&
697 prev->vb.height == buf->vb.height &&
698 prev->fmt == buf->fmt) {
699 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 700 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 701 buf->count = q->count++;
702 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
703 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
704 buf, buf->vb.i);
705
706 } else {
707 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 708 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 709 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
710 buf, buf->vb.i);
711 }
712 }
713}
714
715static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
716{
717 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 718
c7b0ac05 719 cx88_free_buffer(q,buf);
1da177e4
LT		 720}
721
408b664a 722static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 723 .buf_setup = buffer_setup,
724 .buf_prepare = buffer_prepare,
725 .buf_queue = buffer_queue,
726 .buf_release = buffer_release,
727};
728
729/* ------------------------------------------------------------------ */
730
1da177e4
LT		 731
732/* ------------------------------------------------------------------ */
733
734static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
735{
736 switch (fh->type) {
737 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
738 return &fh->vidq;
739 case V4L2_BUF_TYPE_VBI_CAPTURE:
740 return &fh->vbiq;
741 default:
742 BUG();
743 return NULL;
744 }
745}
746
747static int get_ressource(struct cx8800_fh *fh)
748{
749 switch (fh->type) {
750 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
751 return RESOURCE_VIDEO;
752 case V4L2_BUF_TYPE_VBI_CAPTURE:
753 return RESOURCE_VBI;
754 default:
755 BUG();
756 return 0;
757 }
758}
759
bec43661 760static int video_open(struct file *file)
1da177e4 761{
bec43661 762 int minor = video_devdata(file)->minor;
1da177e4 763 struct cx8800_dev *h,*dev = NULL;
e52e98a7 764 struct cx88_core *core;
1da177e4 765 struct cx8800_fh *fh;
1da177e4
LT		 766 enum v4l2_buf_type type = 0;
767 int radio = 0;
768
d56dc612 769 lock_kernel();
8bb629e2 770 list_for_each_entry(h, &cx8800_devlist, devlist) {
1da177e4
LT		 771 if (h->video_dev->minor == minor) {
772 dev = h;
773 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
774 }
775 if (h->vbi_dev->minor == minor) {
776 dev = h;
777 type = V4L2_BUF_TYPE_VBI_CAPTURE;
778 }
779 if (h->radio_dev &&
780 h->radio_dev->minor == minor) {
781 radio = 1;
782 dev = h;
783 }
784 }
d56dc612
HV		 785 if (NULL == dev) {
786 unlock_kernel();
1da177e4 787 return -ENODEV;
d56dc612 788 }
1da177e4 789
e52e98a7
MCC		 790 core = dev->core;
791
1da177e4
LT		 792 dprintk(1,"open minor=%d radio=%d type=%s\n",
793 minor,radio,v4l2_type_names[type]);
794
795 /* allocate + initialize per filehandle data */
7408187d 796 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
d56dc612
HV		 797 if (NULL == fh) {
798 unlock_kernel();
1da177e4 799 return -ENOMEM;
d56dc612 800 }
1da177e4
LT		 801 file->private_data = fh;
802 fh->dev = dev;
803 fh->radio = radio;
804 fh->type = type;
805 fh->width = 320;
806 fh->height = 240;
807 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
808
0705135e
GL		 809 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
810 &dev->pci->dev, &dev->slock,
1da177e4
LT		 811 V4L2_BUF_TYPE_VIDEO_CAPTURE,
812 V4L2_FIELD_INTERLACED,
813 sizeof(struct cx88_buffer),
814 fh);
0705135e
GL		 815 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
816 &dev->pci->dev, &dev->slock,
1da177e4
LT		 817 V4L2_BUF_TYPE_VBI_CAPTURE,
818 V4L2_FIELD_SEQ_TB,
819 sizeof(struct cx88_buffer),
820 fh);
821
822 if (fh->radio) {
1da177e4 823 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 824 cx_write(MO_GP3_IO, core->board.radio.gpio3);
825 cx_write(MO_GP0_IO, core->board.radio.gpio0);
826 cx_write(MO_GP1_IO, core->board.radio.gpio1);
827 cx_write(MO_GP2_IO, core->board.radio.gpio2);
430189da
DB		 828 if (core->board.radio.audioroute) {
829 if(core->board.audio_chip &&
830 core->board.audio_chip == V4L2_IDENT_WM8775) {
831 struct v4l2_routing route;
832
833 route.input = core->board.radio.audioroute;
834 cx88_call_i2c_clients(core,
835 VIDIOC_INT_S_AUDIO_ROUTING, &route);
836 }
837 /* "I2S ADC mode" */
838 core->tvaudio = WW_I2SADC;
839 cx88_set_tvaudio(core);
840 } else {
841 /* FM Mode */
842 core->tvaudio = WW_FM;
843 cx88_set_tvaudio(core);
844 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
845 }
e52e98a7 846 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4 847 }
d56dc612 848 unlock_kernel();
1da177e4 849
3e010845
DB		 850 atomic_inc(&core->users);
851
4ac97914 852 return 0;
1da177e4
LT		 853}
854
855static ssize_t
f9e7a020 856video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 857{
858 struct cx8800_fh *fh = file->private_data;
859
860 switch (fh->type) {
861 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
862 if (res_locked(fh->dev,RESOURCE_VIDEO))
863 return -EBUSY;
864 return videobuf_read_one(&fh->vidq, data, count, ppos,
865 file->f_flags & O_NONBLOCK);
866 case V4L2_BUF_TYPE_VBI_CAPTURE:
867 if (!res_get(fh->dev,fh,RESOURCE_VBI))
868 return -EBUSY;
869 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
870 file->f_flags & O_NONBLOCK);
871 default:
872 BUG();
873 return 0;
874 }
875}
876
877static unsigned int
878video_poll(struct file *file, struct poll_table_struct *wait)
879{
880 struct cx8800_fh *fh = file->private_data;
881 struct cx88_buffer *buf;
882
883 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
884 if (!res_get(fh->dev,fh,RESOURCE_VBI))
885 return POLLERR;
886 return videobuf_poll_stream(file, &fh->vbiq, wait);
887 }
888
889 if (res_check(fh,RESOURCE_VIDEO)) {
890 /* streaming capture */
891 if (list_empty(&fh->vidq.stream))
892 return POLLERR;
893 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
894 } else {
895 /* read() capture */
896 buf = (struct cx88_buffer*)fh->vidq.read_buf;
897 if (NULL == buf)
898 return POLLERR;
899 }
900 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 901 if (buf->vb.state == VIDEOBUF_DONE ||
902 buf->vb.state == VIDEOBUF_ERROR)
1da177e4
LT		 903 return POLLIN|POLLRDNORM;
904 return 0;
905}
906
bec43661 907static int video_release(struct file *file)
1da177e4
LT		 908{
909 struct cx8800_fh *fh = file->private_data;
910 struct cx8800_dev *dev = fh->dev;
911
912 /* turn off overlay */
913 if (res_check(fh, RESOURCE_OVERLAY)) {
914 /* FIXME */
915 res_free(dev,fh,RESOURCE_OVERLAY);
916 }
917
918 /* stop video capture */
919 if (res_check(fh, RESOURCE_VIDEO)) {
920 videobuf_queue_cancel(&fh->vidq);
921 res_free(dev,fh,RESOURCE_VIDEO);
922 }
923 if (fh->vidq.read_buf) {
924 buffer_release(&fh->vidq,fh->vidq.read_buf);
925 kfree(fh->vidq.read_buf);
926 }
927
928 /* stop vbi capture */
929 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 930 videobuf_stop(&fh->vbiq);
1da177e4
LT		 931 res_free(dev,fh,RESOURCE_VBI);
932 }
933
934 videobuf_mmap_free(&fh->vidq);
935 videobuf_mmap_free(&fh->vbiq);
936 file->private_data = NULL;
937 kfree(fh);
e52e98a7 938
3e010845
DB		 939 if(atomic_dec_and_test(&dev->core->users))
940 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
e52e98a7 941
1da177e4
LT		 942 return 0;
943}
944
945static int
946video_mmap(struct file *file, struct vm_area_struct * vma)
947{
948 struct cx8800_fh *fh = file->private_data;
949
950 return videobuf_mmap_mapper(get_queue(fh), vma);
951}
952
953/* ------------------------------------------------------------------ */
8d87cb9f 954/* VIDEO CTRL IOCTLS */
1da177e4 955
54da49f5 956int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 957{
8d87cb9f 958 struct cx88_ctrl *c = NULL;
1da177e4
LT		 959 u32 value;
960 int i;
961
962 for (i = 0; i < CX8800_CTLS; i++)
963 if (cx8800_ctls[i].v.id == ctl->id)
964 c = &cx8800_ctls[i];
8d87cb9f 965 if (unlikely(NULL == c))
1da177e4
LT		 966 return -EINVAL;
967
968 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
969 switch (ctl->id) {
970 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 971 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
972 : (0x7f - (value & 0x7f));
1da177e4
LT		 973 break;
974 case V4L2_CID_AUDIO_VOLUME:
975 ctl->value = 0x3f - (value & 0x3f);
976 break;
977 default:
978 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
979 break;
980 }
6457af5f
IP		 981 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
982 ctl->id, c->v.name, ctl->value, c->reg,
983 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 984 return 0;
985}
54da49f5 986EXPORT_SYMBOL(cx88_get_control);
1da177e4 987
54da49f5 988int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 989{
1da177e4 990 struct cx88_ctrl *c = NULL;
70f00044 991 u32 value,mask;
1da177e4 992 int i;
8d87cb9f 993
70f00044
MCC		 994 for (i = 0; i < CX8800_CTLS; i++) {
995 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 996 c = &cx8800_ctls[i];
70f00044
MCC		 997 }
998 }
8d87cb9f 999 if (unlikely(NULL == c))
1da177e4
LT		 1000 return -EINVAL;
1001
1002 if (ctl->value < c->v.minimum)
e52e98a7 1003 ctl->value = c->v.minimum;
1da177e4 1004 if (ctl->value > c->v.maximum)
e52e98a7 1005 ctl->value = c->v.maximum;
70f00044 1006 mask=c->mask;
1da177e4
LT		 1007 switch (ctl->id) {
1008 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 1009 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 1010 break;
1011 case V4L2_CID_AUDIO_VOLUME:
1012 value = 0x3f - (ctl->value & 0x3f);
1013 break;
1014 case V4L2_CID_SATURATION:
1015 /* special v_sat handling */
70f00044
MCC		 1016
1017 value = ((ctl->value - c->off) << c->shift) & c->mask;
1018
63ab1bdc 1019 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1020 /* For SECAM, both U and V sat should be equal */
1021 value=value<<8|value;
1022 } else {
1023 /* Keeps U Saturation proportional to V Sat */
1024 value=(value*0x5a)/0x7f<<8|value;
1025 }
1026 mask=0xffff;
1027 break;
6d04203c
FD		 1028 case V4L2_CID_CHROMA_AGC:
1029 /* Do not allow chroma AGC to be enabled for SECAM */
1030 value = ((ctl->value - c->off) << c->shift) & c->mask;
1031 if (core->tvnorm & V4L2_STD_SECAM && value)
1032 return -EINVAL;
1033 break;
1da177e4
LT		 1034 default:
1035 value = ((ctl->value - c->off) << c->shift) & c->mask;
1036 break;
1037 }
6457af5f
IP		 1038 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1039 ctl->id, c->v.name, ctl->value, c->reg, value,
1040 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1041 if (c->sreg) {
70f00044 1042 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1043 } else {
70f00044 1044 cx_andor(c->reg, mask, value);
1da177e4
LT		 1045 }
1046 return 0;
1047}
54da49f5 1048EXPORT_SYMBOL(cx88_set_control);
1da177e4 1049
e52e98a7 1050static void init_controls(struct cx88_core *core)
1da177e4 1051{
70f00044
MCC		 1052 struct v4l2_control ctrl;
1053 int i;
1da177e4 1054
70f00044
MCC		 1055 for (i = 0; i < CX8800_CTLS; i++) {
1056 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1057 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1058
54da49f5 1059 cx88_set_control(core, &ctrl);
70f00044 1060 }
1da177e4
LT		 1061}
1062
1063/* ------------------------------------------------------------------ */
8d87cb9f 1064/* VIDEO IOCTLS */
1da177e4 1065
78b526a4 1066static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1067 struct v4l2_format *f)
1da177e4 1068{
8d87cb9f
MCC		 1069 struct cx8800_fh *fh = priv;
1070
1071 f->fmt.pix.width = fh->width;
1072 f->fmt.pix.height = fh->height;
1073 f->fmt.pix.field = fh->vidq.field;
1074 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1075 f->fmt.pix.bytesperline =
1076 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1077 f->fmt.pix.sizeimage =
1078 f->fmt.pix.height * f->fmt.pix.bytesperline;
1079 return 0;
1da177e4
LT		 1080}
1081
78b526a4 1082static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1083 struct v4l2_format *f)
1da177e4 1084{
8d87cb9f
MCC		 1085 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1086 struct cx8800_fmt *fmt;
1087 enum v4l2_field field;
1088 unsigned int maxw, maxh;
e52e98a7 1089
8d87cb9f
MCC		 1090 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1091 if (NULL == fmt)
1092 return -EINVAL;
1da177e4 1093
8d87cb9f
MCC		 1094 field = f->fmt.pix.field;
1095 maxw = norm_maxw(core->tvnorm);
1096 maxh = norm_maxh(core->tvnorm);
1da177e4 1097
8d87cb9f
MCC		 1098 if (V4L2_FIELD_ANY == field) {
1099 field = (f->fmt.pix.height > maxh/2)
1100 ? V4L2_FIELD_INTERLACED
1101 : V4L2_FIELD_BOTTOM;
1da177e4 1102 }
8d87cb9f
MCC		 1103
1104 switch (field) {
1105 case V4L2_FIELD_TOP:
1106 case V4L2_FIELD_BOTTOM:
1107 maxh = maxh / 2;
1108 break;
1109 case V4L2_FIELD_INTERLACED:
1110 break;
1da177e4
LT		 1111 default:
1112 return -EINVAL;
1113 }
8d87cb9f
MCC		 1114
1115 f->fmt.pix.field = field;
1116 if (f->fmt.pix.height < 32)
1117 f->fmt.pix.height = 32;
1118 if (f->fmt.pix.height > maxh)
1119 f->fmt.pix.height = maxh;
1120 if (f->fmt.pix.width < 48)
1121 f->fmt.pix.width = 48;
1122 if (f->fmt.pix.width > maxw)
1123 f->fmt.pix.width = maxw;
1124 f->fmt.pix.width &= ~0x03;
1125 f->fmt.pix.bytesperline =
1126 (f->fmt.pix.width * fmt->depth) >> 3;
1127 f->fmt.pix.sizeimage =
1128 f->fmt.pix.height * f->fmt.pix.bytesperline;
1129
1130 return 0;
1da177e4
LT		 1131}
1132
78b526a4 1133static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1134 struct v4l2_format *f)
1da177e4 1135{
8d87cb9f 1136 struct cx8800_fh *fh = priv;
78b526a4 1137 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1138
1139 if (0 != err)
1140 return err;
1141 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1142 fh->width = f->fmt.pix.width;
1143 fh->height = f->fmt.pix.height;
1144 fh->vidq.field = f->fmt.pix.field;
1145 return 0;
1da177e4
LT		 1146}
1147
8d87cb9f
MCC		 1148static int vidioc_querycap (struct file *file, void *priv,
1149 struct v4l2_capability *cap)
1da177e4 1150{
8d87cb9f 1151 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1152 struct cx88_core *core = dev->core;
1da177e4 1153
8d87cb9f 1154 strcpy(cap->driver, "cx8800");
6a59d64c 1155 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1156 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1157 cap->version = CX88_VERSION_CODE;
1158 cap->capabilities =
1159 V4L2_CAP_VIDEO_CAPTURE |
1160 V4L2_CAP_READWRITE |
1161 V4L2_CAP_STREAMING |
1162 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1163 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1164 cap->capabilities |= V4L2_CAP_TUNER;
1165 return 0;
1166}
e52e98a7 1167
78b526a4 1168static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1169 struct v4l2_fmtdesc *f)
1170{
1171 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1172 return -EINVAL;
1173
1174 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1175 f->pixelformat = formats[f->index].fourcc;
1176
1177 return 0;
1178}
1da177e4 1179
0dfa9abd 1180#ifdef CONFIG_VIDEO_V4L1_COMPAT
8d87cb9f
MCC		 1181static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1182{
c1accaa2 1183 struct cx8800_fh *fh = priv;
8d87cb9f 1184
c1accaa2 1185 return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
8d87cb9f 1186}
79436633 1187#endif
e52e98a7 1188
8d87cb9f
MCC		 1189static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1190{
1191 struct cx8800_fh *fh = priv;
1192 return (videobuf_reqbufs(get_queue(fh), p));
1193}
e52e98a7 1194
8d87cb9f
MCC		 1195static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1196{
1197 struct cx8800_fh *fh = priv;
1198 return (videobuf_querybuf(get_queue(fh), p));
1199}
e52e98a7 1200
8d87cb9f
MCC		 1201static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1202{
1203 struct cx8800_fh *fh = priv;
1204 return (videobuf_qbuf(get_queue(fh), p));
1205}
e52e98a7 1206
8d87cb9f
MCC		 1207static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1208{
1209 struct cx8800_fh *fh = priv;
1210 return (videobuf_dqbuf(get_queue(fh), p,
1211 file->f_flags & O_NONBLOCK));
1212}
e52e98a7 1213
8d87cb9f
MCC		 1214static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1215{
1216 struct cx8800_fh *fh = priv;
1217 struct cx8800_dev *dev = fh->dev;
1218
b058e3f3
RD		 1219 /* We should remember that this driver also supports teletext, */
1220 /* so we have to test if the v4l2_buf_type is VBI capture data. */
1221 if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1222 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
8d87cb9f 1223 return -EINVAL;
b058e3f3 1224
8d87cb9f
MCC		 1225 if (unlikely(i != fh->type))
1226 return -EINVAL;
1227
1228 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1229 return -EBUSY;
1230 return videobuf_streamon(get_queue(fh));
1231}
1232
1233static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1234{
1235 struct cx8800_fh *fh = priv;
1236 struct cx8800_dev *dev = fh->dev;
1237 int err, res;
1238
b058e3f3
RD		 1239 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1240 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
8d87cb9f 1241 return -EINVAL;
b058e3f3 1242
8d87cb9f
MCC		 1243 if (i != fh->type)
1244 return -EINVAL;
1245
1246 res = get_ressource(fh);
1247 err = videobuf_streamoff(get_queue(fh));
1248 if (err < 0)
1249 return err;
1250 res_free(dev,fh,res);
e52e98a7
MCC		 1251 return 0;
1252}
1253
63ab1bdc 1254static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1255{
8d87cb9f 1256 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1257
8d87cb9f 1258 mutex_lock(&core->lock);
63ab1bdc 1259 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1260 mutex_unlock(&core->lock);
63ab1bdc 1261
8d87cb9f
MCC		 1262 return 0;
1263}
1da177e4 1264
8d87cb9f 1265/* only one input in this sample driver */
54da49f5 1266int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1267{
8d87cb9f
MCC		 1268 static const char *iname[] = {
1269 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1270 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1271 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1272 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1273 [ CX88_VMUX_SVIDEO ] = "S-Video",
1274 [ CX88_VMUX_TELEVISION ] = "Television",
1275 [ CX88_VMUX_CABLE ] = "Cable TV",
1276 [ CX88_VMUX_DVB ] = "DVB",
1277 [ CX88_VMUX_DEBUG ] = "for debug only",
1278 };
1279 unsigned int n;
1da177e4 1280
8d87cb9f
MCC		 1281 n = i->index;
1282 if (n >= 4)
1283 return -EINVAL;
6a59d64c 1284 if (0 == INPUT(n).type)
8d87cb9f
MCC		 1285 return -EINVAL;
1286 memset(i,0,sizeof(*i));
1287 i->index = n;
1288 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1289 strcpy(i->name,iname[INPUT(n).type]);
1290 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
1291 (CX88_VMUX_CABLE == INPUT(n).type))
8d87cb9f 1292 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1293 i->std = CX88_NORMS;
8d87cb9f
MCC		 1294 return 0;
1295}
54da49f5
MCC		 1296EXPORT_SYMBOL(cx88_enum_input);
1297
1298static int vidioc_enum_input (struct file *file, void *priv,
1299 struct v4l2_input *i)
1300{
1301 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1302 return cx88_enum_input (core,i);
1303}
1da177e4 1304
8d87cb9f
MCC		 1305static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1306{
1307 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1308
8d87cb9f
MCC		 1309 *i = core->input;
1310 return 0;
1311}
1da177e4 1312
8d87cb9f
MCC		 1313static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1314{
1315 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1316
8d87cb9f
MCC		 1317 if (i >= 4)
1318 return -EINVAL;
1da177e4 1319
8d87cb9f
MCC		 1320 mutex_lock(&core->lock);
1321 cx88_newstation(core);
e90311a1 1322 cx88_video_mux(core,i);
8d87cb9f
MCC		 1323 mutex_unlock(&core->lock);
1324 return 0;
1325}
1da177e4 1326
1da177e4 1327
1da177e4 1328
8d87cb9f
MCC		 1329static int vidioc_queryctrl (struct file *file, void *priv,
1330 struct v4l2_queryctrl *qctrl)
1331{
6d04203c
FD		 1332 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1333
8d87cb9f
MCC		 1334 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1335 if (unlikely(qctrl->id == 0))
1336 return -EINVAL;
6d04203c 1337 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1338}
1da177e4 1339
54da49f5 1340static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1341 struct v4l2_control *ctl)
1342{
1343 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1344 return
1345 cx88_get_control(core,ctl);
1346}
1da177e4 1347
54da49f5
MCC		 1348static int vidioc_s_ctrl (struct file *file, void *priv,
1349 struct v4l2_control *ctl)
1350{
1351 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1352 return
54da49f5 1353 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1354}
1355
1356static int vidioc_g_tuner (struct file *file, void *priv,
1357 struct v4l2_tuner *t)
1358{
1359 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1360 u32 reg;
1da177e4 1361
6a59d64c 1362 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1363 return -EINVAL;
243d8c0f
MCC		 1364 if (0 != t->index)
1365 return -EINVAL;
a82decf6 1366
8d87cb9f
MCC		 1367 strcpy(t->name, "Television");
1368 t->type = V4L2_TUNER_ANALOG_TV;
1369 t->capability = V4L2_TUNER_CAP_NORM;
1370 t->rangehigh = 0xffffffffUL;
a82decf6 1371
8d87cb9f
MCC		 1372 cx88_get_stereo(core ,t);
1373 reg = cx_read(MO_DEVICE_STATUS);
1374 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1375 return 0;
1376}
41ef7c1e 1377
8d87cb9f
MCC		 1378static int vidioc_s_tuner (struct file *file, void *priv,
1379 struct v4l2_tuner *t)
1380{
1381 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1382
6a59d64c 1383 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1384 return -EINVAL;
1385 if (0 != t->index)
1386 return -EINVAL;
c5287ba1 1387
8d87cb9f
MCC		 1388 cx88_set_stereo(core, t->audmode, 1);
1389 return 0;
1390}
902fc997 1391
8d87cb9f
MCC		 1392static int vidioc_g_frequency (struct file *file, void *priv,
1393 struct v4l2_frequency *f)
1394{
1395 struct cx8800_fh *fh = priv;
1396 struct cx88_core *core = fh->dev->core;
902fc997 1397
6a59d64c 1398 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1399 return -EINVAL;
1400
1401 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1402 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1403 f->frequency = core->freq;
1404
1405 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
1da177e4 1406
1da177e4
LT		 1407 return 0;
1408}
1409
54da49f5 1410int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1411 struct v4l2_frequency *f)
1da177e4 1412{
6a59d64c 1413 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1414 return -EINVAL;
1415 if (unlikely(f->tuner != 0))
1416 return -EINVAL;
54da49f5 1417
8d87cb9f
MCC		 1418 mutex_lock(&core->lock);
1419 core->freq = f->frequency;
1420 cx88_newstation(core);
1421 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c7b0ac05 1422
8d87cb9f
MCC		 1423 /* When changing channels it is required to reset TVAUDIO */
1424 msleep (10);
1425 cx88_set_tvaudio(core);
c7b0ac05 1426
8d87cb9f 1427 mutex_unlock(&core->lock);
54da49f5 1428
8d87cb9f 1429 return 0;
1da177e4 1430}
54da49f5
MCC		 1431EXPORT_SYMBOL(cx88_set_freq);
1432
1433static int vidioc_s_frequency (struct file *file, void *priv,
1434 struct v4l2_frequency *f)
1435{
1436 struct cx8800_fh *fh = priv;
1437 struct cx88_core *core = fh->dev->core;
1438
1439 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1440 return -EINVAL;
1441 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1442 return -EINVAL;
1443
1444 return
1445 cx88_set_freq (core,f);
1446}
1da177e4 1447
dbbff48f
TP		 1448#ifdef CONFIG_VIDEO_ADV_DEBUG
1449static int vidioc_g_register (struct file *file, void *fh,
1450 struct v4l2_register *reg)
1451{
1452 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1453
f3d092b8 1454 if (!v4l2_chip_match_host(reg->match_type, reg->match_chip))
dbbff48f
TP		 1455 return -EINVAL;
1456 /* cx2388x has a 24-bit register space */
1457 reg->val = cx_read(reg->reg&0xffffff);
1458 return 0;
1459}
1460
1461static int vidioc_s_register (struct file *file, void *fh,
1462 struct v4l2_register *reg)
1463{
1464 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1465
f3d092b8 1466 if (!v4l2_chip_match_host(reg->match_type, reg->match_chip))
dbbff48f 1467 return -EINVAL;
dbbff48f
TP		 1468 cx_write(reg->reg&0xffffff, reg->val);
1469 return 0;
1470}
1471#endif
8d87cb9f
MCC		 1472
1473/* ----------------------------------------------------------- */
1474/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1475/* ----------------------------------------------------------- */
1476
8d87cb9f
MCC		 1477static int radio_querycap (struct file *file, void *priv,
1478 struct v4l2_capability *cap)
1da177e4 1479{
8d87cb9f 1480 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1481 struct cx88_core *core = dev->core;
1482
8d87cb9f 1483 strcpy(cap->driver, "cx8800");
6a59d64c 1484 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1485 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1486 cap->version = CX88_VERSION_CODE;
1487 cap->capabilities = V4L2_CAP_TUNER;
1488 return 0;
1489}
1da177e4 1490
8d87cb9f
MCC		 1491static int radio_g_tuner (struct file *file, void *priv,
1492 struct v4l2_tuner *t)
1493{
1494 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1495
8d87cb9f
MCC		 1496 if (unlikely(t->index > 0))
1497 return -EINVAL;
1da177e4 1498
8d87cb9f
MCC		 1499 strcpy(t->name, "Radio");
1500 t->type = V4L2_TUNER_RADIO;
1da177e4 1501
8d87cb9f
MCC		 1502 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1503 return 0;
1504}
1da177e4 1505
8d87cb9f
MCC		 1506static int radio_enum_input (struct file *file, void *priv,
1507 struct v4l2_input *i)
1508{
1509 if (i->index != 0)
1510 return -EINVAL;
1511 strcpy(i->name,"Radio");
1512 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1513
8d87cb9f
MCC		 1514 return 0;
1515}
a82decf6 1516
8d87cb9f
MCC		 1517static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1518{
1519 if (unlikely(a->index))
1520 return -EINVAL;
a82decf6 1521
8d87cb9f
MCC		 1522 memset(a,0,sizeof(*a));
1523 strcpy(a->name,"Radio");
1524 return 0;
1525}
a82decf6 1526
8d87cb9f 1527/* FIXME: Should add a standard for radio */
a82decf6 1528
8d87cb9f
MCC		 1529static int radio_s_tuner (struct file *file, void *priv,
1530 struct v4l2_tuner *t)
1531{
1532 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1533
8d87cb9f
MCC		 1534 if (0 != t->index)
1535 return -EINVAL;
1da177e4 1536
8d87cb9f 1537 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
1da177e4 1538
8d87cb9f
MCC		 1539 return 0;
1540}
1da177e4 1541
8d87cb9f
MCC		 1542static int radio_s_audio (struct file *file, void *fh,
1543 struct v4l2_audio *a)
1544{
1545 return 0;
1546}
1da177e4 1547
8d87cb9f
MCC		 1548static int radio_s_input (struct file *file, void *fh, unsigned int i)
1549{
1da177e4 1550 return 0;
8d87cb9f 1551}
1da177e4 1552
8d87cb9f
MCC		 1553static int radio_queryctrl (struct file *file, void *priv,
1554 struct v4l2_queryctrl *c)
1da177e4 1555{
8d87cb9f
MCC		 1556 int i;
1557
1558 if (c->id < V4L2_CID_BASE ||
1559 c->id >= V4L2_CID_LASTP1)
1560 return -EINVAL;
1561 if (c->id == V4L2_CID_AUDIO_MUTE) {
1562 for (i = 0; i < CX8800_CTLS; i++)
1563 if (cx8800_ctls[i].v.id == c->id)
1564 break;
1565 *c = cx8800_ctls[i].v;
1566 } else
1567 *c = no_ctl;
1568 return 0;
1569}
1da177e4
LT		 1570
1571/* ----------------------------------------------------------- */
1572
1573static void cx8800_vid_timeout(unsigned long data)
1574{
1575 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1576 struct cx88_core *core = dev->core;
1577 struct cx88_dmaqueue *q = &dev->vidq;
1578 struct cx88_buffer *buf;
1579 unsigned long flags;
1580
e52e98a7 1581 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1582
1583 cx_clear(MO_VID_DMACNTRL, 0x11);
1584 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1585
1586 spin_lock_irqsave(&dev->slock,flags);
1587 while (!list_empty(&q->active)) {
1588 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1589 list_del(&buf->vb.queue);
0fc0686e 1590 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1591 wake_up(&buf->vb.done);
1592 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1593 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1594 }
1595 restart_video_queue(dev,q);
1596 spin_unlock_irqrestore(&dev->slock,flags);
1597}
1598
41ef7c1e
MCC		 1599static char *cx88_vid_irqs[32] = {
1600 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1601 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1602 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1603 "y_sync", "u_sync", "v_sync", "vbi_sync",
1604 "opc_err", "par_err", "rip_err", "pci_abort",
1605};
1606
1da177e4
LT		 1607static void cx8800_vid_irq(struct cx8800_dev *dev)
1608{
1609 struct cx88_core *core = dev->core;
1610 u32 status, mask, count;
1611
1612 status = cx_read(MO_VID_INTSTAT);
1613 mask = cx_read(MO_VID_INTMSK);
1614 if (0 == (status & mask))
1615 return;
1616 cx_write(MO_VID_INTSTAT, status);
1617 if (irq_debug || (status & mask & ~0xff))
1618 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1619 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1620 status, mask);
1da177e4
LT		 1621
1622 /* risc op code error */
1623 if (status & (1 << 16)) {
1624 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1625 cx_clear(MO_VID_DMACNTRL, 0x11);
1626 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1627 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1628 }
1629
1630 /* risc1 y */
1631 if (status & 0x01) {
1632 spin_lock(&dev->slock);
1633 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1634 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1635 spin_unlock(&dev->slock);
1636 }
1637
1638 /* risc1 vbi */
1639 if (status & 0x08) {
1640 spin_lock(&dev->slock);
1641 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1642 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1643 spin_unlock(&dev->slock);
1644 }
1645
1646 /* risc2 y */
1647 if (status & 0x10) {
1648 dprintk(2,"stopper video\n");
1649 spin_lock(&dev->slock);
1650 restart_video_queue(dev,&dev->vidq);
1651 spin_unlock(&dev->slock);
1652 }
1653
1654 /* risc2 vbi */
1655 if (status & 0x80) {
1656 dprintk(2,"stopper vbi\n");
1657 spin_lock(&dev->slock);
1658 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1659 spin_unlock(&dev->slock);
1660 }
1661}
1662
7d12e780 1663static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1664{
1665 struct cx8800_dev *dev = dev_id;
1666 struct cx88_core *core = dev->core;
1667 u32 status;
1668 int loop, handled = 0;
1669
1670 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1671 status = cx_read(MO_PCI_INTSTAT) &
1672 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1673 if (0 == status)
1674 goto out;
1675 cx_write(MO_PCI_INTSTAT, status);
1676 handled = 1;
1677
1678 if (status & core->pci_irqmask)
1679 cx88_core_irq(core,status);
8ddac9ee 1680 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1681 cx8800_vid_irq(dev);
1682 };
1683 if (10 == loop) {
1684 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1685 core->name);
1686 cx_write(MO_PCI_INTMSK,0);
1687 }
1688
1689 out:
1690 return IRQ_RETVAL(handled);
1691}
1692
1693/* ----------------------------------------------------------- */
1694/* exported stuff */
1695
bec43661 1696static const struct v4l2_file_operations video_fops =
1da177e4
LT		 1697{
1698 .owner = THIS_MODULE,
1699 .open = video_open,
1700 .release = video_release,
1701 .read = video_read,
1702 .poll = video_poll,
1703 .mmap = video_mmap,
8d87cb9f 1704 .ioctl = video_ioctl2,
1da177e4
LT		 1705};
1706
a399810c 1707static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1708 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1709 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1710 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1711 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1712 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1713 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1714 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1715 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1716 .vidioc_reqbufs = vidioc_reqbufs,
1717 .vidioc_querybuf = vidioc_querybuf,
1718 .vidioc_qbuf = vidioc_qbuf,
1719 .vidioc_dqbuf = vidioc_dqbuf,
1720 .vidioc_s_std = vidioc_s_std,
1721 .vidioc_enum_input = vidioc_enum_input,
1722 .vidioc_g_input = vidioc_g_input,
1723 .vidioc_s_input = vidioc_s_input,
1724 .vidioc_queryctrl = vidioc_queryctrl,
1725 .vidioc_g_ctrl = vidioc_g_ctrl,
1726 .vidioc_s_ctrl = vidioc_s_ctrl,
1727 .vidioc_streamon = vidioc_streamon,
1728 .vidioc_streamoff = vidioc_streamoff,
1729#ifdef CONFIG_VIDEO_V4L1_COMPAT
1730 .vidiocgmbuf = vidiocgmbuf,
1731#endif
1732 .vidioc_g_tuner = vidioc_g_tuner,
1733 .vidioc_s_tuner = vidioc_s_tuner,
1734 .vidioc_g_frequency = vidioc_g_frequency,
1735 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1736#ifdef CONFIG_VIDEO_ADV_DEBUG
1737 .vidioc_g_register = vidioc_g_register,
1738 .vidioc_s_register = vidioc_s_register,
1739#endif
a399810c
HV		 1740};
1741
1742static struct video_device cx8800_vbi_template;
1743
1744static struct video_device cx8800_video_template = {
1745 .name = "cx8800-video",
a399810c
HV		 1746 .fops = &video_fops,
1747 .minor = -1,
1748 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1749 .tvnorms = CX88_NORMS,
dbbff48f 1750 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1751};
1752
bec43661 1753static const struct v4l2_file_operations radio_fops =
1da177e4
LT		 1754{
1755 .owner = THIS_MODULE,
1756 .open = video_open,
1757 .release = video_release,
8d87cb9f 1758 .ioctl = video_ioctl2,
1da177e4
LT		 1759};
1760
a399810c 1761static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1762 .vidioc_querycap = radio_querycap,
1763 .vidioc_g_tuner = radio_g_tuner,
1764 .vidioc_enum_input = radio_enum_input,
1765 .vidioc_g_audio = radio_g_audio,
1766 .vidioc_s_tuner = radio_s_tuner,
1767 .vidioc_s_audio = radio_s_audio,
1768 .vidioc_s_input = radio_s_input,
1769 .vidioc_queryctrl = radio_queryctrl,
1770 .vidioc_g_ctrl = vidioc_g_ctrl,
1771 .vidioc_s_ctrl = vidioc_s_ctrl,
1772 .vidioc_g_frequency = vidioc_g_frequency,
1773 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1774#ifdef CONFIG_VIDEO_ADV_DEBUG
1775 .vidioc_g_register = vidioc_g_register,
1776 .vidioc_s_register = vidioc_s_register,
1777#endif
1da177e4
LT		 1778};
1779
a399810c
HV		 1780static struct video_device cx8800_radio_template = {
1781 .name = "cx8800-radio",
a399810c
HV		 1782 .fops = &radio_fops,
1783 .minor = -1,
1784 .ioctl_ops = &radio_ioctl_ops,
1785};
1786
1da177e4
LT		 1787/* ----------------------------------------------------------- */
1788
1789static void cx8800_unregister_video(struct cx8800_dev *dev)
1790{
1791 if (dev->radio_dev) {
1792 if (-1 != dev->radio_dev->minor)
1793 video_unregister_device(dev->radio_dev);
1794 else
1795 video_device_release(dev->radio_dev);
1796 dev->radio_dev = NULL;
1797 }
1798 if (dev->vbi_dev) {
1799 if (-1 != dev->vbi_dev->minor)
1800 video_unregister_device(dev->vbi_dev);
1801 else
1802 video_device_release(dev->vbi_dev);
1803 dev->vbi_dev = NULL;
1804 }
1805 if (dev->video_dev) {
1806 if (-1 != dev->video_dev->minor)
1807 video_unregister_device(dev->video_dev);
1808 else
1809 video_device_release(dev->video_dev);
1810 dev->video_dev = NULL;
1811 }
1812}
1813
1814static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1815 const struct pci_device_id *pci_id)
1816{
1817 struct cx8800_dev *dev;
1818 struct cx88_core *core;
8d87cb9f 1819
1da177e4
LT		 1820 int err;
1821
7408187d 1822 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1823 if (NULL == dev)
1824 return -ENOMEM;
1da177e4
LT		 1825
1826 /* pci init */
1827 dev->pci = pci_dev;
1828 if (pci_enable_device(pci_dev)) {
1829 err = -EIO;
1830 goto fail_free;
1831 }
1832 core = cx88_core_get(dev->pci);
1833 if (NULL == core) {
1834 err = -EINVAL;
1835 goto fail_free;
1836 }
1837 dev->core = core;
1838
1839 /* print pci info */
1840 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1841 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1842 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1843 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1844 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1845 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1846
1847 pci_set_master(pci_dev);
aaa40cb8 1848 if (!pci_dma_supported(pci_dev,DMA_32BIT_MASK)) {
1da177e4
LT		 1849 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1850 err = -EIO;
1851 goto fail_core;
1852 }
1853
8d87cb9f
MCC		 1854 /* Initialize VBI template */
1855 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1856 sizeof(cx8800_vbi_template) );
1857 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
8d87cb9f 1858
1da177e4 1859 /* initialize driver struct */
1da177e4 1860 spin_lock_init(&dev->slock);
63ab1bdc 1861 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1862
1863 /* init video dma queues */
1864 INIT_LIST_HEAD(&dev->vidq.active);
1865 INIT_LIST_HEAD(&dev->vidq.queued);
1866 dev->vidq.timeout.function = cx8800_vid_timeout;
1867 dev->vidq.timeout.data = (unsigned long)dev;
1868 init_timer(&dev->vidq.timeout);
1869 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1870 MO_VID_DMACNTRL,0x11,0x00);
1871
1872 /* init vbi dma queues */
1873 INIT_LIST_HEAD(&dev->vbiq.active);
1874 INIT_LIST_HEAD(&dev->vbiq.queued);
1875 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1876 dev->vbiq.timeout.data = (unsigned long)dev;
1877 init_timer(&dev->vbiq.timeout);
1878 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1879 MO_VID_DMACNTRL,0x88,0x00);
1880
1881 /* get irq */
1882 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1883 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1884 if (err < 0) {
5772f813 1885 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1886 core->name,pci_dev->irq);
1887 goto fail_core;
1888 }
1889 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1890
1891 /* load and configure helper modules */
e52e98a7 1892
38f9d308 1893 if (core->board.audio_chip == V4L2_IDENT_WM8775)
3057906d
ST		 1894 request_module("wm8775");
1895
6fcecce7
MK		 1896 switch (core->boardnr) {
1897 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
3c66e4e1 1898 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
6fcecce7 1899 request_module("rtc-isl1208");
8efd2e28
MK		 1900 /* break intentionally omitted */
1901 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1902 request_module("ir-kbd-i2c");
6fcecce7
MK		 1903 }
1904
1da177e4
LT		 1905 /* register v4l devices */
1906 dev->video_dev = cx88_vdev_init(core,dev->pci,
1907 &cx8800_video_template,"video");
1908 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1909 video_nr[core->nr]);
1910 if (err < 0) {
5772f813 1911 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1912 core->name);
1913 goto fail_unreg;
1914 }
1915 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
c6330fb8 1916 core->name, dev->video_dev->num);
1da177e4
LT		 1917
1918 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1919 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1920 vbi_nr[core->nr]);
1921 if (err < 0) {
5772f813 1922 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1923 core->name);
1924 goto fail_unreg;
1925 }
1926 printk(KERN_INFO "%s/0: registered device vbi%d\n",
c6330fb8 1927 core->name, dev->vbi_dev->num);
1da177e4 1928
6a59d64c 1929 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1930 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1931 &cx8800_radio_template,"radio");
1932 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1933 radio_nr[core->nr]);
1934 if (err < 0) {
5772f813 1935 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1936 core->name);
1937 goto fail_unreg;
1938 }
1939 printk(KERN_INFO "%s/0: registered device radio%d\n",
c6330fb8 1940 core->name, dev->radio_dev->num);
1da177e4
LT		 1941 }
1942
1943 /* everything worked */
1944 list_add_tail(&dev->devlist,&cx8800_devlist);
1945 pci_set_drvdata(pci_dev,dev);
1946
1947 /* initial device configuration */
3593cab5 1948 mutex_lock(&core->lock);
63ab1bdc 1949 cx88_set_tvnorm(core,core->tvnorm);
70f00044 1950 init_controls(core);
e90311a1 1951 cx88_video_mux(core,0);
3593cab5 1952 mutex_unlock(&core->lock);
1da177e4
LT		 1953
1954 /* start tvaudio thread */
6a59d64c 1955 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1956 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1957 if (IS_ERR(core->kthread)) {
1958 err = PTR_ERR(core->kthread);
5772f813
TP		 1959 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1960 core->name, err);
32b78de7
CG		 1961 }
1962 }
1da177e4
LT		 1963 return 0;
1964
1965fail_unreg:
1966 cx8800_unregister_video(dev);
1967 free_irq(pci_dev->irq, dev);
1968fail_core:
1969 cx88_core_put(core,dev->pci);
1970fail_free:
1971 kfree(dev);
1972 return err;
1973}
1974
1975static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1976{
4ac97914 1977 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1978 struct cx88_core *core = dev->core;
1da177e4
LT		 1979
1980 /* stop thread */
e52e98a7
MCC		 1981 if (core->kthread) {
1982 kthread_stop(core->kthread);
1983 core->kthread = NULL;
1da177e4
LT		 1984 }
1985
b12203d2
MB		 1986 if (core->ir)
1987 cx88_ir_stop(core, core->ir);
1988
e52e98a7 1989 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1990 pci_disable_device(pci_dev);
1991
1992 /* unregister stuff */
1993
1994 free_irq(pci_dev->irq, dev);
1995 cx8800_unregister_video(dev);
1996 pci_set_drvdata(pci_dev, NULL);
1997
1998 /* free memory */
1999 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
2000 list_del(&dev->devlist);
e52e98a7 2001 cx88_core_put(core,dev->pci);
1da177e4
LT		 2002 kfree(dev);
2003}
2004
17bc98a4 2005#ifdef CONFIG_PM
1da177e4
LT		 2006static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
2007{
b45009b0 2008 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2009 struct cx88_core *core = dev->core;
2010
2011 /* stop video+vbi capture */
2012 spin_lock(&dev->slock);
2013 if (!list_empty(&dev->vidq.active)) {
5772f813 2014 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 2015 stop_video_dma(dev);
2016 del_timer(&dev->vidq.timeout);
2017 }
2018 if (!list_empty(&dev->vbiq.active)) {
5772f813 2019 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2020 cx8800_stop_vbi_dma(dev);
2021 del_timer(&dev->vbiq.timeout);
2022 }
2023 spin_unlock(&dev->slock);
2024
13595a51
MCC		 2025 if (core->ir)
2026 cx88_ir_stop(core, core->ir);
1da177e4 2027 /* FIXME -- shutdown device */
e52e98a7 2028 cx88_shutdown(core);
1da177e4
LT		 2029
2030 pci_save_state(pci_dev);
2031 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2032 pci_disable_device(pci_dev);
2033 dev->state.disabled = 1;
2034 }
2035 return 0;
2036}
2037
2038static int cx8800_resume(struct pci_dev *pci_dev)
2039{
b45009b0 2040 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2041 struct cx88_core *core = dev->core;
08adb9e2 2042 int err;
1da177e4
LT		 2043
2044 if (dev->state.disabled) {
08adb9e2
MCC		 2045 err=pci_enable_device(pci_dev);
2046 if (err) {
5772f813
TP		 2047 printk(KERN_ERR "%s/0: can't enable device\n",
2048 core->name);
08adb9e2
MCC		 2049 return err;
2050 }
2051
1da177e4
LT		 2052 dev->state.disabled = 0;
2053 }
08adb9e2
MCC		 2054 err= pci_set_power_state(pci_dev, PCI_D0);
2055 if (err) {
5772f813 2056 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2057 pci_disable_device(pci_dev);
2058 dev->state.disabled = 1;
2059
2060 return err;
2061 }
1da177e4
LT		 2062 pci_restore_state(pci_dev);
2063
1da177e4 2064 /* FIXME: re-initialize hardware */
e52e98a7 2065 cx88_reset(core);
13595a51
MCC		 2066 if (core->ir)
2067 cx88_ir_start(core, core->ir);
2068
2069 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2070
2071 /* restart video+vbi capture */
2072 spin_lock(&dev->slock);
2073 if (!list_empty(&dev->vidq.active)) {
5772f813 2074 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2075 restart_video_queue(dev,&dev->vidq);
2076 }
2077 if (!list_empty(&dev->vbiq.active)) {
5772f813 2078 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2079 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2080 }
2081 spin_unlock(&dev->slock);
2082
2083 return 0;
2084}
17bc98a4 2085#endif
1da177e4
LT		 2086
2087/* ----------------------------------------------------------- */
2088
408b664a 2089static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2090 {
2091 .vendor = 0x14f1,
2092 .device = 0x8800,
b45009b0
MCC		 2093 .subvendor = PCI_ANY_ID,
2094 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2095 },{
2096 /* --- end of list --- */
2097 }
2098};
2099MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2100
2101static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2102 .name = "cx8800",
2103 .id_table = cx8800_pci_tbl,
2104 .probe = cx8800_initdev,
2105 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2106#ifdef CONFIG_PM
1da177e4
LT		 2107 .suspend = cx8800_suspend,
2108 .resume = cx8800_resume,
17bc98a4 2109#endif
1da177e4
LT		 2110};
2111
2112static int cx8800_init(void)
2113{
5772f813 2114 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2115 (CX88_VERSION_CODE >> 16) & 0xff,
2116 (CX88_VERSION_CODE >> 8) & 0xff,
2117 CX88_VERSION_CODE & 0xff);
2118#ifdef SNAPSHOT
2119 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2120 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2121#endif
2122 return pci_register_driver(&cx8800_pci_driver);
2123}
2124
2125static void cx8800_fini(void)
2126{
2127 pci_unregister_driver(&cx8800_pci_driver);
2128}
2129
2130module_init(cx8800_init);
2131module_exit(cx8800_fini);
2132
2133/* ----------------------------------------------------------- */
2134/*
2135 * Local variables:
2136 * c-basic-offset: 8
2137 * End:
b45009b0 2138 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2139 */
Clone of davem's net-next-2.6 tree