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V4L/DVB: cx88: Only start IR if the input device is opened
[net-next-2.6.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
405f5571 34#include <linux/smp_lock.h>
1da177e4 35#include <linux/interrupt.h>
c24228da 36#include <linux/dma-mapping.h>
1da177e4
LT		 37#include <linux/delay.h>
38#include <linux/kthread.h>
39#include <asm/div64.h>
40
41#include "cx88.h"
5e453dc7 42#include <media/v4l2-common.h>
35ea11ff 43#include <media/v4l2-ioctl.h>
1da177e4
LT		 44
45MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
46MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
47MODULE_LICENSE("GPL");
48
49/* ------------------------------------------------------------------ */
50
51static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
53static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
54
55module_param_array(video_nr, int, NULL, 0444);
56module_param_array(vbi_nr, int, NULL, 0444);
57module_param_array(radio_nr, int, NULL, 0444);
58
59MODULE_PARM_DESC(video_nr,"video device numbers");
60MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
61MODULE_PARM_DESC(radio_nr,"radio device numbers");
62
ff699e6b 63static unsigned int video_debug;
1da177e4
LT		 64module_param(video_debug,int,0644);
65MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
66
ff699e6b 67static unsigned int irq_debug;
1da177e4
LT		 68module_param(irq_debug,int,0644);
69MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
70
71static unsigned int vid_limit = 16;
72module_param(vid_limit,int,0644);
73MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
74
75#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 76 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4 77
1da177e4
LT		 78/* ------------------------------------------------------------------- */
79/* static data */
80
1da177e4
LT		 81static struct cx8800_fmt formats[] = {
82 {
83 .name = "8 bpp, gray",
84 .fourcc = V4L2_PIX_FMT_GREY,
85 .cxformat = ColorFormatY8,
86 .depth = 8,
87 .flags = FORMAT_FLAGS_PACKED,
88 },{
89 .name = "15 bpp RGB, le",
90 .fourcc = V4L2_PIX_FMT_RGB555,
91 .cxformat = ColorFormatRGB15,
92 .depth = 16,
93 .flags = FORMAT_FLAGS_PACKED,
94 },{
95 .name = "15 bpp RGB, be",
96 .fourcc = V4L2_PIX_FMT_RGB555X,
97 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
98 .depth = 16,
99 .flags = FORMAT_FLAGS_PACKED,
100 },{
101 .name = "16 bpp RGB, le",
102 .fourcc = V4L2_PIX_FMT_RGB565,
103 .cxformat = ColorFormatRGB16,
104 .depth = 16,
105 .flags = FORMAT_FLAGS_PACKED,
106 },{
107 .name = "16 bpp RGB, be",
108 .fourcc = V4L2_PIX_FMT_RGB565X,
109 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
110 .depth = 16,
111 .flags = FORMAT_FLAGS_PACKED,
112 },{
113 .name = "24 bpp RGB, le",
114 .fourcc = V4L2_PIX_FMT_BGR24,
115 .cxformat = ColorFormatRGB24,
116 .depth = 24,
117 .flags = FORMAT_FLAGS_PACKED,
118 },{
119 .name = "32 bpp RGB, le",
120 .fourcc = V4L2_PIX_FMT_BGR32,
121 .cxformat = ColorFormatRGB32,
122 .depth = 32,
123 .flags = FORMAT_FLAGS_PACKED,
124 },{
125 .name = "32 bpp RGB, be",
126 .fourcc = V4L2_PIX_FMT_RGB32,
127 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
128 .depth = 32,
129 .flags = FORMAT_FLAGS_PACKED,
130 },{
131 .name = "4:2:2, packed, YUYV",
132 .fourcc = V4L2_PIX_FMT_YUYV,
133 .cxformat = ColorFormatYUY2,
134 .depth = 16,
135 .flags = FORMAT_FLAGS_PACKED,
136 },{
137 .name = "4:2:2, packed, UYVY",
138 .fourcc = V4L2_PIX_FMT_UYVY,
139 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
140 .depth = 16,
141 .flags = FORMAT_FLAGS_PACKED,
142 },
143};
144
145static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
146{
147 unsigned int i;
148
149 for (i = 0; i < ARRAY_SIZE(formats); i++)
150 if (formats[i].fourcc == fourcc)
151 return formats+i;
152 return NULL;
153}
154
155/* ------------------------------------------------------------------- */
156
157static const struct v4l2_queryctrl no_ctl = {
158 .name = "42",
159 .flags = V4L2_CTRL_FLAG_DISABLED,
160};
161
162static struct cx88_ctrl cx8800_ctls[] = {
163 /* --- video --- */
164 {
165 .v = {
166 .id = V4L2_CID_BRIGHTNESS,
167 .name = "Brightness",
168 .minimum = 0x00,
169 .maximum = 0xff,
170 .step = 1,
9f9c907f 171 .default_value = 0x7f,
1da177e4
LT		 172 .type = V4L2_CTRL_TYPE_INTEGER,
173 },
174 .off = 128,
175 .reg = MO_CONTR_BRIGHT,
176 .mask = 0x00ff,
177 .shift = 0,
178 },{
179 .v = {
180 .id = V4L2_CID_CONTRAST,
181 .name = "Contrast",
182 .minimum = 0,
183 .maximum = 0xff,
184 .step = 1,
70f00044 185 .default_value = 0x3f,
1da177e4
LT		 186 .type = V4L2_CTRL_TYPE_INTEGER,
187 },
41ef7c1e 188 .off = 0,
1da177e4
LT		 189 .reg = MO_CONTR_BRIGHT,
190 .mask = 0xff00,
191 .shift = 8,
192 },{
193 .v = {
194 .id = V4L2_CID_HUE,
195 .name = "Hue",
196 .minimum = 0,
197 .maximum = 0xff,
198 .step = 1,
9f9c907f 199 .default_value = 0x7f,
1da177e4
LT		 200 .type = V4L2_CTRL_TYPE_INTEGER,
201 },
9ac4c158 202 .off = 128,
1da177e4
LT		 203 .reg = MO_HUE,
204 .mask = 0x00ff,
205 .shift = 0,
206 },{
207 /* strictly, this only describes only U saturation.
208 * V saturation is handled specially through code.
209 */
210 .v = {
211 .id = V4L2_CID_SATURATION,
212 .name = "Saturation",
213 .minimum = 0,
214 .maximum = 0xff,
215 .step = 1,
70f00044 216 .default_value = 0x7f,
1da177e4
LT		 217 .type = V4L2_CTRL_TYPE_INTEGER,
218 },
219 .off = 0,
220 .reg = MO_UV_SATURATION,
221 .mask = 0x00ff,
222 .shift = 0,
223 },{
6d04203c
FD		 224 .v = {
225 .id = V4L2_CID_CHROMA_AGC,
226 .name = "Chroma AGC",
227 .minimum = 0,
228 .maximum = 1,
87a17389 229 .default_value = 0x1,
6d04203c
FD		 230 .type = V4L2_CTRL_TYPE_BOOLEAN,
231 },
232 .reg = MO_INPUT_FORMAT,
233 .mask = 1 << 10,
234 .shift = 10,
1b879c43
FD		 235 }, {
236 .v = {
237 .id = V4L2_CID_COLOR_KILLER,
238 .name = "Color killer",
239 .minimum = 0,
240 .maximum = 1,
0b5afdd2 241 .default_value = 0x1,
1b879c43
FD		 242 .type = V4L2_CTRL_TYPE_BOOLEAN,
243 },
244 .reg = MO_INPUT_FORMAT,
245 .mask = 1 << 9,
246 .shift = 9,
6d04203c 247 }, {
1da177e4
LT		 248 /* --- audio --- */
249 .v = {
250 .id = V4L2_CID_AUDIO_MUTE,
251 .name = "Mute",
252 .minimum = 0,
253 .maximum = 1,
70f00044 254 .default_value = 1,
1da177e4
LT		 255 .type = V4L2_CTRL_TYPE_BOOLEAN,
256 },
257 .reg = AUD_VOL_CTL,
258 .sreg = SHADOW_AUD_VOL_CTL,
259 .mask = (1 << 6),
260 .shift = 6,
261 },{
262 .v = {
263 .id = V4L2_CID_AUDIO_VOLUME,
264 .name = "Volume",
265 .minimum = 0,
266 .maximum = 0x3f,
267 .step = 1,
9f9c907f 268 .default_value = 0x3f,
1da177e4
LT		 269 .type = V4L2_CTRL_TYPE_INTEGER,
270 },
271 .reg = AUD_VOL_CTL,
272 .sreg = SHADOW_AUD_VOL_CTL,
273 .mask = 0x3f,
274 .shift = 0,
275 },{
276 .v = {
277 .id = V4L2_CID_AUDIO_BALANCE,
278 .name = "Balance",
279 .minimum = 0,
280 .maximum = 0x7f,
281 .step = 1,
282 .default_value = 0x40,
283 .type = V4L2_CTRL_TYPE_INTEGER,
284 },
285 .reg = AUD_BAL_CTL,
286 .sreg = SHADOW_AUD_BAL_CTL,
287 .mask = 0x7f,
288 .shift = 0,
289 }
290};
408b664a 291static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 292
2ba58894 293/* Must be sorted from low to high control ID! */
38a2713a
MK		 294const u32 cx88_user_ctrls[] = {
295 V4L2_CID_USER_CLASS,
296 V4L2_CID_BRIGHTNESS,
297 V4L2_CID_CONTRAST,
298 V4L2_CID_SATURATION,
299 V4L2_CID_HUE,
300 V4L2_CID_AUDIO_VOLUME,
301 V4L2_CID_AUDIO_BALANCE,
302 V4L2_CID_AUDIO_MUTE,
6d04203c 303 V4L2_CID_CHROMA_AGC,
1b879c43 304 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 305 0
306};
307EXPORT_SYMBOL(cx88_user_ctrls);
308
309static const u32 *ctrl_classes[] = {
310 cx88_user_ctrls,
311 NULL
312};
313
6d04203c 314int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 315{
316 int i;
317
318 if (qctrl->id < V4L2_CID_BASE ||
319 qctrl->id >= V4L2_CID_LASTP1)
320 return -EINVAL;
321 for (i = 0; i < CX8800_CTLS; i++)
322 if (cx8800_ctls[i].v.id == qctrl->id)
323 break;
324 if (i == CX8800_CTLS) {
325 *qctrl = no_ctl;
326 return 0;
327 }
328 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 329 /* Report chroma AGC as inactive when SECAM is selected */
330 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
331 core->tvnorm & V4L2_STD_SECAM)
332 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
333
38a2713a
MK		 334 return 0;
335}
336EXPORT_SYMBOL(cx8800_ctrl_query);
337
1da177e4
LT		 338/* ------------------------------------------------------------------- */
339/* resource management */
340
341static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
342{
e52e98a7 343 struct cx88_core *core = dev->core;
1da177e4
LT		 344 if (fh->resources & bit)
345 /* have it already allocated */
346 return 1;
347
348 /* is it free? */
3593cab5 349 mutex_lock(&core->lock);
1da177e4
LT		 350 if (dev->resources & bit) {
351 /* no, someone else uses it */
3593cab5 352 mutex_unlock(&core->lock);
1da177e4
LT		 353 return 0;
354 }
355 /* it's free, grab it */
356 fh->resources |= bit;
357 dev->resources |= bit;
358 dprintk(1,"res: get %d\n",bit);
3593cab5 359 mutex_unlock(&core->lock);
1da177e4
LT		 360 return 1;
361}
362
363static
364int res_check(struct cx8800_fh *fh, unsigned int bit)
365{
366 return (fh->resources & bit);
367}
368
369static
370int res_locked(struct cx8800_dev *dev, unsigned int bit)
371{
372 return (dev->resources & bit);
373}
374
375static
376void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
377{
e52e98a7 378 struct cx88_core *core = dev->core;
ae24601b 379 BUG_ON((fh->resources & bits) != bits);
1da177e4 380
3593cab5 381 mutex_lock(&core->lock);
1da177e4
LT		 382 fh->resources &= ~bits;
383 dev->resources &= ~bits;
384 dprintk(1,"res: put %d\n",bits);
3593cab5 385 mutex_unlock(&core->lock);
1da177e4
LT		 386}
387
388/* ------------------------------------------------------------------ */
389
e90311a1 390int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 391{
e52e98a7 392 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 393
394 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 395 input, INPUT(input).vmux,
396 INPUT(input).gpio0,INPUT(input).gpio1,
397 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 398 core->input = input;
6a59d64c
TP		 399 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
400 cx_write(MO_GP3_IO, INPUT(input).gpio3);
401 cx_write(MO_GP0_IO, INPUT(input).gpio0);
402 cx_write(MO_GP1_IO, INPUT(input).gpio1);
403 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 404
6a59d64c 405 switch (INPUT(input).type) {
1da177e4
LT		 406 case CX88_VMUX_SVIDEO:
407 cx_set(MO_AFECFG_IO, 0x00000001);
408 cx_set(MO_INPUT_FORMAT, 0x00010010);
409 cx_set(MO_FILTER_EVEN, 0x00002020);
410 cx_set(MO_FILTER_ODD, 0x00002020);
411 break;
412 default:
413 cx_clear(MO_AFECFG_IO, 0x00000001);
414 cx_clear(MO_INPUT_FORMAT, 0x00010010);
415 cx_clear(MO_FILTER_EVEN, 0x00002020);
416 cx_clear(MO_FILTER_ODD, 0x00002020);
417 break;
418 }
f24546a9 419
66e6fbdf
RC		 420 /* if there are audioroutes defined, we have an external
421 ADC to deal with audio */
66e6fbdf 422 if (INPUT(input).audioroute) {
66e6fbdf
RC		 423 /* The wm8775 module has the "2" route hardwired into
424 the initialization. Some boards may use different
425 routes for different inputs. HVR-1300 surely does */
426 if (core->board.audio_chip &&
38f9d308 427 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 428 call_all(core, audio, s_routing,
429 INPUT(input).audioroute, 0, 0);
66e6fbdf 430 }
430189da
DB		 431 /* cx2388's C-ADC is connected to the tuner only.
432 When used with S-Video, that ADC is busy dealing with
433 chroma, so an external must be used for baseband audio */
434 if (INPUT(input).type != CX88_VMUX_TELEVISION ) {
435 /* "I2S ADC mode" */
436 core->tvaudio = WW_I2SADC;
437 cx88_set_tvaudio(core);
438 } else {
439 /* Normal mode */
440 cx_write(AUD_I2SCNTL, 0x0);
441 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
442 }
f24546a9 443 }
66e6fbdf 444
1da177e4
LT		 445 return 0;
446}
e90311a1 447EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 448
449/* ------------------------------------------------------------------ */
450
451static int start_video_dma(struct cx8800_dev *dev,
452 struct cx88_dmaqueue *q,
453 struct cx88_buffer *buf)
454{
455 struct cx88_core *core = dev->core;
456
457 /* setup fifo + format */
e52e98a7 458 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 459 buf->bpl, buf->risc.dma);
e52e98a7 460 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 461 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
462
463 /* reset counter */
464 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
465 q->count = 1;
466
467 /* enable irqs */
8ddac9ee 468 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 469
470 /* Enables corresponding bits at PCI_INT_STAT:
471 bits 0 to 4: video, audio, transport stream, VIP, Host
472 bit 7: timer
473 bits 8 and 9: DMA complete for: SRC, DST
474 bits 10 and 11: BERR signal asserted for RISC: RD, WR
475 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
476 */
1da177e4
LT		 477 cx_set(MO_VID_INTMSK, 0x0f0011);
478
479 /* enable capture */
480 cx_set(VID_CAPTURE_CONTROL,0x06);
481
482 /* start dma */
483 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 484 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 485
486 return 0;
487}
488
17bc98a4 489#ifdef CONFIG_PM
1da177e4
LT		 490static int stop_video_dma(struct cx8800_dev *dev)
491{
492 struct cx88_core *core = dev->core;
493
494 /* stop dma */
495 cx_clear(MO_VID_DMACNTRL, 0x11);
496
497 /* disable capture */
498 cx_clear(VID_CAPTURE_CONTROL,0x06);
499
500 /* disable irqs */
8ddac9ee 501 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 502 cx_clear(MO_VID_INTMSK, 0x0f0011);
503 return 0;
504}
17bc98a4 505#endif
1da177e4
LT		 506
507static int restart_video_queue(struct cx8800_dev *dev,
508 struct cx88_dmaqueue *q)
509{
e52e98a7 510 struct cx88_core *core = dev->core;
1da177e4 511 struct cx88_buffer *buf, *prev;
1da177e4
LT		 512
513 if (!list_empty(&q->active)) {
4ac97914 514 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 515 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
516 buf, buf->vb.i);
517 start_video_dma(dev, q, buf);
8bb629e2
TP		 518 list_for_each_entry(buf, &q->active, vb.queue)
519 buf->count = q->count++;
1da177e4
LT		 520 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
521 return 0;
522 }
523
524 prev = NULL;
525 for (;;) {
526 if (list_empty(&q->queued))
527 return 0;
4ac97914 528 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 529 if (NULL == prev) {
179e0917 530 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 531 start_video_dma(dev, q, buf);
0fc0686e 532 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 533 buf->count = q->count++;
534 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
535 dprintk(2,"[%p/%d] restart_queue - first active\n",
536 buf,buf->vb.i);
537
538 } else if (prev->vb.width == buf->vb.width &&
539 prev->vb.height == buf->vb.height &&
540 prev->fmt == buf->fmt) {
179e0917 541 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 542 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 543 buf->count = q->count++;
544 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
545 dprintk(2,"[%p/%d] restart_queue - move to active\n",
546 buf,buf->vb.i);
547 } else {
548 return 0;
549 }
550 prev = buf;
551 }
552}
553
554/* ------------------------------------------------------------------ */
555
556static int
557buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
558{
559 struct cx8800_fh *fh = q->priv_data;
560
561 *size = fh->fmt->depth*fh->width*fh->height >> 3;
562 if (0 == *count)
563 *count = 32;
564 while (*size * *count > vid_limit * 1024 * 1024)
565 (*count)--;
566 return 0;
567}
568
569static int
570buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
571 enum v4l2_field field)
572{
573 struct cx8800_fh *fh = q->priv_data;
574 struct cx8800_dev *dev = fh->dev;
e52e98a7 575 struct cx88_core *core = dev->core;
1da177e4 576 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 577 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 578 int rc, init_buffer = 0;
579
580 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 581 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
582 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 583 return -EINVAL;
584 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
585 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
586 return -EINVAL;
587
588 if (buf->fmt != fh->fmt ||
589 buf->vb.width != fh->width ||
590 buf->vb.height != fh->height ||
591 buf->vb.field != field) {
592 buf->fmt = fh->fmt;
593 buf->vb.width = fh->width;
594 buf->vb.height = fh->height;
595 buf->vb.field = field;
596 init_buffer = 1;
597 }
598
0fc0686e 599 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 600 init_buffer = 1;
c7b0ac05 601 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 602 goto fail;
603 }
604
605 if (init_buffer) {
606 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
607 switch (buf->vb.field) {
608 case V4L2_FIELD_TOP:
609 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 610 dma->sglist, 0, UNSET,
1da177e4
LT		 611 buf->bpl, 0, buf->vb.height);
612 break;
613 case V4L2_FIELD_BOTTOM:
614 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 615 dma->sglist, UNSET, 0,
1da177e4
LT		 616 buf->bpl, 0, buf->vb.height);
617 break;
618 case V4L2_FIELD_INTERLACED:
619 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 620 dma->sglist, 0, buf->bpl,
1da177e4
LT		 621 buf->bpl, buf->bpl,
622 buf->vb.height >> 1);
623 break;
624 case V4L2_FIELD_SEQ_TB:
625 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 626 dma->sglist,
1da177e4
LT		 627 0, buf->bpl * (buf->vb.height >> 1),
628 buf->bpl, 0,
629 buf->vb.height >> 1);
630 break;
631 case V4L2_FIELD_SEQ_BT:
632 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 633 dma->sglist,
1da177e4
LT		 634 buf->bpl * (buf->vb.height >> 1), 0,
635 buf->bpl, 0,
636 buf->vb.height >> 1);
637 break;
638 default:
639 BUG();
640 }
641 }
642 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
643 buf, buf->vb.i,
644 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
645 (unsigned long)buf->risc.dma);
646
0fc0686e 647 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 648 return 0;
649
650 fail:
c7b0ac05 651 cx88_free_buffer(q,buf);
1da177e4
LT		 652 return rc;
653}
654
655static void
656buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
657{
658 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
659 struct cx88_buffer *prev;
660 struct cx8800_fh *fh = vq->priv_data;
661 struct cx8800_dev *dev = fh->dev;
e52e98a7 662 struct cx88_core *core = dev->core;
1da177e4
LT		 663 struct cx88_dmaqueue *q = &dev->vidq;
664
665 /* add jump to stopper */
666 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
667 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
668
669 if (!list_empty(&q->queued)) {
670 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 671 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 672 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
673 buf, buf->vb.i);
674
675 } else if (list_empty(&q->active)) {
676 list_add_tail(&buf->vb.queue,&q->active);
677 start_video_dma(dev, q, buf);
0fc0686e 678 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 679 buf->count = q->count++;
680 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
681 dprintk(2,"[%p/%d] buffer_queue - first active\n",
682 buf, buf->vb.i);
683
684 } else {
685 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
686 if (prev->vb.width == buf->vb.width &&
687 prev->vb.height == buf->vb.height &&
688 prev->fmt == buf->fmt) {
689 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 690 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 691 buf->count = q->count++;
692 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
693 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
694 buf, buf->vb.i);
695
696 } else {
697 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 698 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 699 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
700 buf, buf->vb.i);
701 }
702 }
703}
704
705static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
706{
707 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 708
c7b0ac05 709 cx88_free_buffer(q,buf);
1da177e4
LT		 710}
711
408b664a 712static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 713 .buf_setup = buffer_setup,
714 .buf_prepare = buffer_prepare,
715 .buf_queue = buffer_queue,
716 .buf_release = buffer_release,
717};
718
719/* ------------------------------------------------------------------ */
720
1da177e4
LT		 721
722/* ------------------------------------------------------------------ */
723
724static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
725{
726 switch (fh->type) {
727 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
728 return &fh->vidq;
729 case V4L2_BUF_TYPE_VBI_CAPTURE:
730 return &fh->vbiq;
731 default:
732 BUG();
733 return NULL;
734 }
735}
736
737static int get_ressource(struct cx8800_fh *fh)
738{
739 switch (fh->type) {
740 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
741 return RESOURCE_VIDEO;
742 case V4L2_BUF_TYPE_VBI_CAPTURE:
743 return RESOURCE_VBI;
744 default:
745 BUG();
746 return 0;
747 }
748}
749
bec43661 750static int video_open(struct file *file)
1da177e4 751{
63b0d5ad
LP		 752 struct video_device *vdev = video_devdata(file);
753 struct cx8800_dev *dev = video_drvdata(file);
e52e98a7 754 struct cx88_core *core;
1da177e4 755 struct cx8800_fh *fh;
1da177e4
LT		 756 enum v4l2_buf_type type = 0;
757 int radio = 0;
758
63b0d5ad
LP		 759 switch (vdev->vfl_type) {
760 case VFL_TYPE_GRABBER:
761 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
762 break;
763 case VFL_TYPE_VBI:
764 type = V4L2_BUF_TYPE_VBI_CAPTURE;
765 break;
766 case VFL_TYPE_RADIO:
767 radio = 1;
768 break;
d56dc612 769 }
1da177e4 770
63b0d5ad
LP		 771 lock_kernel();
772
e52e98a7
MCC		 773 core = dev->core;
774
50462eb0
LP		 775 dprintk(1, "open dev=%s radio=%d type=%s\n",
776 video_device_node_name(vdev), radio, v4l2_type_names[type]);
1da177e4
LT		 777
778 /* allocate + initialize per filehandle data */
7408187d 779 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
d56dc612
HV		 780 if (NULL == fh) {
781 unlock_kernel();
1da177e4 782 return -ENOMEM;
d56dc612 783 }
1da177e4
LT		 784 file->private_data = fh;
785 fh->dev = dev;
786 fh->radio = radio;
787 fh->type = type;
788 fh->width = 320;
789 fh->height = 240;
790 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
791
0705135e
GL		 792 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
793 &dev->pci->dev, &dev->slock,
1da177e4
LT		 794 V4L2_BUF_TYPE_VIDEO_CAPTURE,
795 V4L2_FIELD_INTERLACED,
796 sizeof(struct cx88_buffer),
797 fh);
0705135e
GL		 798 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
799 &dev->pci->dev, &dev->slock,
1da177e4
LT		 800 V4L2_BUF_TYPE_VBI_CAPTURE,
801 V4L2_FIELD_SEQ_TB,
802 sizeof(struct cx88_buffer),
803 fh);
804
805 if (fh->radio) {
1da177e4 806 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 807 cx_write(MO_GP3_IO, core->board.radio.gpio3);
808 cx_write(MO_GP0_IO, core->board.radio.gpio0);
809 cx_write(MO_GP1_IO, core->board.radio.gpio1);
810 cx_write(MO_GP2_IO, core->board.radio.gpio2);
430189da
DB		 811 if (core->board.radio.audioroute) {
812 if(core->board.audio_chip &&
813 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 814 call_all(core, audio, s_routing,
815 core->board.radio.audioroute, 0, 0);
430189da
DB		 816 }
817 /* "I2S ADC mode" */
818 core->tvaudio = WW_I2SADC;
819 cx88_set_tvaudio(core);
820 } else {
821 /* FM Mode */
822 core->tvaudio = WW_FM;
823 cx88_set_tvaudio(core);
824 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
825 }
b8341e1d 826 call_all(core, tuner, s_radio);
1da177e4 827 }
d56dc612 828 unlock_kernel();
1da177e4 829
3e010845
DB		 830 atomic_inc(&core->users);
831
4ac97914 832 return 0;
1da177e4
LT		 833}
834
835static ssize_t
f9e7a020 836video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 837{
838 struct cx8800_fh *fh = file->private_data;
839
840 switch (fh->type) {
841 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
842 if (res_locked(fh->dev,RESOURCE_VIDEO))
843 return -EBUSY;
844 return videobuf_read_one(&fh->vidq, data, count, ppos,
845 file->f_flags & O_NONBLOCK);
846 case V4L2_BUF_TYPE_VBI_CAPTURE:
847 if (!res_get(fh->dev,fh,RESOURCE_VBI))
848 return -EBUSY;
849 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
850 file->f_flags & O_NONBLOCK);
851 default:
852 BUG();
853 return 0;
854 }
855}
856
857static unsigned int
858video_poll(struct file *file, struct poll_table_struct *wait)
859{
860 struct cx8800_fh *fh = file->private_data;
861 struct cx88_buffer *buf;
9fd6418a 862 unsigned int rc = POLLERR;
1da177e4
LT		 863
864 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
865 if (!res_get(fh->dev,fh,RESOURCE_VBI))
866 return POLLERR;
867 return videobuf_poll_stream(file, &fh->vbiq, wait);
868 }
869
9fd6418a 870 mutex_lock(&fh->vidq.vb_lock);
1da177e4
LT		 871 if (res_check(fh,RESOURCE_VIDEO)) {
872 /* streaming capture */
873 if (list_empty(&fh->vidq.stream))
9fd6418a 874 goto done;
1da177e4
LT		 875 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
876 } else {
877 /* read() capture */
878 buf = (struct cx88_buffer*)fh->vidq.read_buf;
879 if (NULL == buf)
9fd6418a 880 goto done;
1da177e4
LT		 881 }
882 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 883 if (buf->vb.state == VIDEOBUF_DONE ||
884 buf->vb.state == VIDEOBUF_ERROR)
9fd6418a
F		 885 rc = POLLIN|POLLRDNORM;
886 else
887 rc = 0;
888done:
889 mutex_unlock(&fh->vidq.vb_lock);
890 return rc;
1da177e4
LT		 891}
892
bec43661 893static int video_release(struct file *file)
1da177e4
LT		 894{
895 struct cx8800_fh *fh = file->private_data;
896 struct cx8800_dev *dev = fh->dev;
897
898 /* turn off overlay */
899 if (res_check(fh, RESOURCE_OVERLAY)) {
900 /* FIXME */
901 res_free(dev,fh,RESOURCE_OVERLAY);
902 }
903
904 /* stop video capture */
905 if (res_check(fh, RESOURCE_VIDEO)) {
906 videobuf_queue_cancel(&fh->vidq);
907 res_free(dev,fh,RESOURCE_VIDEO);
908 }
909 if (fh->vidq.read_buf) {
910 buffer_release(&fh->vidq,fh->vidq.read_buf);
911 kfree(fh->vidq.read_buf);
912 }
913
914 /* stop vbi capture */
915 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 916 videobuf_stop(&fh->vbiq);
1da177e4
LT		 917 res_free(dev,fh,RESOURCE_VBI);
918 }
919
920 videobuf_mmap_free(&fh->vidq);
921 videobuf_mmap_free(&fh->vbiq);
922 file->private_data = NULL;
923 kfree(fh);
e52e98a7 924
06f837ca 925 mutex_lock(&dev->core->lock);
3e010845 926 if(atomic_dec_and_test(&dev->core->users))
622b828a 927 call_all(dev->core, core, s_power, 0);
06f837ca 928 mutex_unlock(&dev->core->lock);
e52e98a7 929
1da177e4
LT		 930 return 0;
931}
932
933static int
934video_mmap(struct file *file, struct vm_area_struct * vma)
935{
936 struct cx8800_fh *fh = file->private_data;
937
938 return videobuf_mmap_mapper(get_queue(fh), vma);
939}
940
941/* ------------------------------------------------------------------ */
8d87cb9f 942/* VIDEO CTRL IOCTLS */
1da177e4 943
54da49f5 944int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 945{
8d87cb9f 946 struct cx88_ctrl *c = NULL;
1da177e4
LT		 947 u32 value;
948 int i;
949
950 for (i = 0; i < CX8800_CTLS; i++)
951 if (cx8800_ctls[i].v.id == ctl->id)
952 c = &cx8800_ctls[i];
8d87cb9f 953 if (unlikely(NULL == c))
1da177e4
LT		 954 return -EINVAL;
955
956 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
957 switch (ctl->id) {
958 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 959 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
960 : (0x7f - (value & 0x7f));
1da177e4
LT		 961 break;
962 case V4L2_CID_AUDIO_VOLUME:
963 ctl->value = 0x3f - (value & 0x3f);
964 break;
965 default:
966 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
967 break;
968 }
6457af5f
IP		 969 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
970 ctl->id, c->v.name, ctl->value, c->reg,
971 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 972 return 0;
973}
54da49f5 974EXPORT_SYMBOL(cx88_get_control);
1da177e4 975
54da49f5 976int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 977{
1da177e4 978 struct cx88_ctrl *c = NULL;
70f00044 979 u32 value,mask;
1da177e4 980 int i;
8d87cb9f 981
70f00044
MCC		 982 for (i = 0; i < CX8800_CTLS; i++) {
983 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 984 c = &cx8800_ctls[i];
70f00044
MCC		 985 }
986 }
8d87cb9f 987 if (unlikely(NULL == c))
1da177e4
LT		 988 return -EINVAL;
989
990 if (ctl->value < c->v.minimum)
e52e98a7 991 ctl->value = c->v.minimum;
1da177e4 992 if (ctl->value > c->v.maximum)
e52e98a7 993 ctl->value = c->v.maximum;
70f00044 994 mask=c->mask;
1da177e4
LT		 995 switch (ctl->id) {
996 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 997 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 998 break;
999 case V4L2_CID_AUDIO_VOLUME:
1000 value = 0x3f - (ctl->value & 0x3f);
1001 break;
1002 case V4L2_CID_SATURATION:
1003 /* special v_sat handling */
70f00044
MCC		 1004
1005 value = ((ctl->value - c->off) << c->shift) & c->mask;
1006
63ab1bdc 1007 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1008 /* For SECAM, both U and V sat should be equal */
1009 value=value<<8|value;
1010 } else {
1011 /* Keeps U Saturation proportional to V Sat */
1012 value=(value*0x5a)/0x7f<<8|value;
1013 }
1014 mask=0xffff;
1015 break;
6d04203c
FD		 1016 case V4L2_CID_CHROMA_AGC:
1017 /* Do not allow chroma AGC to be enabled for SECAM */
1018 value = ((ctl->value - c->off) << c->shift) & c->mask;
1019 if (core->tvnorm & V4L2_STD_SECAM && value)
1020 return -EINVAL;
1021 break;
1da177e4
LT		 1022 default:
1023 value = ((ctl->value - c->off) << c->shift) & c->mask;
1024 break;
1025 }
6457af5f
IP		 1026 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1027 ctl->id, c->v.name, ctl->value, c->reg, value,
1028 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1029 if (c->sreg) {
70f00044 1030 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1031 } else {
70f00044 1032 cx_andor(c->reg, mask, value);
1da177e4
LT		 1033 }
1034 return 0;
1035}
54da49f5 1036EXPORT_SYMBOL(cx88_set_control);
1da177e4 1037
e52e98a7 1038static void init_controls(struct cx88_core *core)
1da177e4 1039{
70f00044
MCC		 1040 struct v4l2_control ctrl;
1041 int i;
1da177e4 1042
70f00044
MCC		 1043 for (i = 0; i < CX8800_CTLS; i++) {
1044 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1045 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1046
54da49f5 1047 cx88_set_control(core, &ctrl);
70f00044 1048 }
1da177e4
LT		 1049}
1050
1051/* ------------------------------------------------------------------ */
8d87cb9f 1052/* VIDEO IOCTLS */
1da177e4 1053
78b526a4 1054static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1055 struct v4l2_format *f)
1da177e4 1056{
8d87cb9f
MCC		 1057 struct cx8800_fh *fh = priv;
1058
1059 f->fmt.pix.width = fh->width;
1060 f->fmt.pix.height = fh->height;
1061 f->fmt.pix.field = fh->vidq.field;
1062 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1063 f->fmt.pix.bytesperline =
1064 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1065 f->fmt.pix.sizeimage =
1066 f->fmt.pix.height * f->fmt.pix.bytesperline;
1067 return 0;
1da177e4
LT		 1068}
1069
78b526a4 1070static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1071 struct v4l2_format *f)
1da177e4 1072{
8d87cb9f
MCC		 1073 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1074 struct cx8800_fmt *fmt;
1075 enum v4l2_field field;
1076 unsigned int maxw, maxh;
e52e98a7 1077
8d87cb9f
MCC		 1078 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1079 if (NULL == fmt)
1080 return -EINVAL;
1da177e4 1081
8d87cb9f
MCC		 1082 field = f->fmt.pix.field;
1083 maxw = norm_maxw(core->tvnorm);
1084 maxh = norm_maxh(core->tvnorm);
1da177e4 1085
8d87cb9f
MCC		 1086 if (V4L2_FIELD_ANY == field) {
1087 field = (f->fmt.pix.height > maxh/2)
1088 ? V4L2_FIELD_INTERLACED
1089 : V4L2_FIELD_BOTTOM;
1da177e4 1090 }
8d87cb9f
MCC		 1091
1092 switch (field) {
1093 case V4L2_FIELD_TOP:
1094 case V4L2_FIELD_BOTTOM:
1095 maxh = maxh / 2;
1096 break;
1097 case V4L2_FIELD_INTERLACED:
1098 break;
1da177e4
LT		 1099 default:
1100 return -EINVAL;
1101 }
8d87cb9f
MCC		 1102
1103 f->fmt.pix.field = field;
4b89945e
TP		 1104 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
1105 &f->fmt.pix.height, 32, maxh, 0, 0);
8d87cb9f
MCC		 1106 f->fmt.pix.bytesperline =
1107 (f->fmt.pix.width * fmt->depth) >> 3;
1108 f->fmt.pix.sizeimage =
1109 f->fmt.pix.height * f->fmt.pix.bytesperline;
1110
1111 return 0;
1da177e4
LT		 1112}
1113
78b526a4 1114static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1115 struct v4l2_format *f)
1da177e4 1116{
8d87cb9f 1117 struct cx8800_fh *fh = priv;
78b526a4 1118 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1119
1120 if (0 != err)
1121 return err;
1122 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1123 fh->width = f->fmt.pix.width;
1124 fh->height = f->fmt.pix.height;
1125 fh->vidq.field = f->fmt.pix.field;
1126 return 0;
1da177e4
LT		 1127}
1128
8d87cb9f
MCC		 1129static int vidioc_querycap (struct file *file, void *priv,
1130 struct v4l2_capability *cap)
1da177e4 1131{
8d87cb9f 1132 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1133 struct cx88_core *core = dev->core;
1da177e4 1134
8d87cb9f 1135 strcpy(cap->driver, "cx8800");
6a59d64c 1136 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1137 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1138 cap->version = CX88_VERSION_CODE;
1139 cap->capabilities =
1140 V4L2_CAP_VIDEO_CAPTURE |
1141 V4L2_CAP_READWRITE |
1142 V4L2_CAP_STREAMING |
1143 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1144 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1145 cap->capabilities |= V4L2_CAP_TUNER;
1146 return 0;
1147}
e52e98a7 1148
78b526a4 1149static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1150 struct v4l2_fmtdesc *f)
1151{
1152 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1153 return -EINVAL;
1154
1155 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1156 f->pixelformat = formats[f->index].fourcc;
1157
1158 return 0;
1159}
1da177e4 1160
0dfa9abd 1161#ifdef CONFIG_VIDEO_V4L1_COMPAT
8d87cb9f
MCC		 1162static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1163{
c1accaa2 1164 struct cx8800_fh *fh = priv;
8d87cb9f 1165
c1accaa2 1166 return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
8d87cb9f 1167}
79436633 1168#endif
e52e98a7 1169
8d87cb9f
MCC		 1170static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1171{
1172 struct cx8800_fh *fh = priv;
1173 return (videobuf_reqbufs(get_queue(fh), p));
1174}
e52e98a7 1175
8d87cb9f
MCC		 1176static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1177{
1178 struct cx8800_fh *fh = priv;
1179 return (videobuf_querybuf(get_queue(fh), p));
1180}
e52e98a7 1181
8d87cb9f
MCC		 1182static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1183{
1184 struct cx8800_fh *fh = priv;
1185 return (videobuf_qbuf(get_queue(fh), p));
1186}
e52e98a7 1187
8d87cb9f
MCC		 1188static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1189{
1190 struct cx8800_fh *fh = priv;
1191 return (videobuf_dqbuf(get_queue(fh), p,
1192 file->f_flags & O_NONBLOCK));
1193}
e52e98a7 1194
8d87cb9f
MCC		 1195static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1196{
1197 struct cx8800_fh *fh = priv;
1198 struct cx8800_dev *dev = fh->dev;
1199
b058e3f3
RD		 1200 /* We should remember that this driver also supports teletext, */
1201 /* so we have to test if the v4l2_buf_type is VBI capture data. */
1202 if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1203 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
8d87cb9f 1204 return -EINVAL;
b058e3f3 1205
8d87cb9f
MCC		 1206 if (unlikely(i != fh->type))
1207 return -EINVAL;
1208
1209 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1210 return -EBUSY;
1211 return videobuf_streamon(get_queue(fh));
1212}
1213
1214static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1215{
1216 struct cx8800_fh *fh = priv;
1217 struct cx8800_dev *dev = fh->dev;
1218 int err, res;
1219
b058e3f3
RD		 1220 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1221 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
8d87cb9f 1222 return -EINVAL;
b058e3f3 1223
8d87cb9f
MCC		 1224 if (i != fh->type)
1225 return -EINVAL;
1226
1227 res = get_ressource(fh);
1228 err = videobuf_streamoff(get_queue(fh));
1229 if (err < 0)
1230 return err;
1231 res_free(dev,fh,res);
e52e98a7
MCC		 1232 return 0;
1233}
1234
63ab1bdc 1235static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1236{
8d87cb9f 1237 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1238
8d87cb9f 1239 mutex_lock(&core->lock);
63ab1bdc 1240 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1241 mutex_unlock(&core->lock);
63ab1bdc 1242
8d87cb9f
MCC		 1243 return 0;
1244}
1da177e4 1245
8d87cb9f 1246/* only one input in this sample driver */
54da49f5 1247int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1248{
8d87cb9f
MCC		 1249 static const char *iname[] = {
1250 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1251 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1252 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1253 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1254 [ CX88_VMUX_SVIDEO ] = "S-Video",
1255 [ CX88_VMUX_TELEVISION ] = "Television",
1256 [ CX88_VMUX_CABLE ] = "Cable TV",
1257 [ CX88_VMUX_DVB ] = "DVB",
1258 [ CX88_VMUX_DEBUG ] = "for debug only",
1259 };
f3334bcb 1260 unsigned int n = i->index;
1da177e4 1261
8d87cb9f
MCC		 1262 if (n >= 4)
1263 return -EINVAL;
6a59d64c 1264 if (0 == INPUT(n).type)
8d87cb9f 1265 return -EINVAL;
8d87cb9f 1266 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1267 strcpy(i->name,iname[INPUT(n).type]);
1268 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
1269 (CX88_VMUX_CABLE == INPUT(n).type))
8d87cb9f 1270 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1271 i->std = CX88_NORMS;
8d87cb9f
MCC		 1272 return 0;
1273}
54da49f5
MCC		 1274EXPORT_SYMBOL(cx88_enum_input);
1275
1276static int vidioc_enum_input (struct file *file, void *priv,
1277 struct v4l2_input *i)
1278{
1279 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1280 return cx88_enum_input (core,i);
1281}
1da177e4 1282
8d87cb9f
MCC		 1283static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1284{
1285 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1286
8d87cb9f
MCC		 1287 *i = core->input;
1288 return 0;
1289}
1da177e4 1290
8d87cb9f
MCC		 1291static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1292{
1293 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1294
8d87cb9f
MCC		 1295 if (i >= 4)
1296 return -EINVAL;
1da177e4 1297
8d87cb9f
MCC		 1298 mutex_lock(&core->lock);
1299 cx88_newstation(core);
e90311a1 1300 cx88_video_mux(core,i);
8d87cb9f
MCC		 1301 mutex_unlock(&core->lock);
1302 return 0;
1303}
1da177e4 1304
1da177e4 1305
1da177e4 1306
8d87cb9f
MCC		 1307static int vidioc_queryctrl (struct file *file, void *priv,
1308 struct v4l2_queryctrl *qctrl)
1309{
6d04203c
FD		 1310 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1311
8d87cb9f
MCC		 1312 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1313 if (unlikely(qctrl->id == 0))
1314 return -EINVAL;
6d04203c 1315 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1316}
1da177e4 1317
54da49f5 1318static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1319 struct v4l2_control *ctl)
1320{
1321 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1322 return
1323 cx88_get_control(core,ctl);
1324}
1da177e4 1325
54da49f5
MCC		 1326static int vidioc_s_ctrl (struct file *file, void *priv,
1327 struct v4l2_control *ctl)
1328{
1329 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1330 return
54da49f5 1331 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1332}
1333
1334static int vidioc_g_tuner (struct file *file, void *priv,
1335 struct v4l2_tuner *t)
1336{
1337 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1338 u32 reg;
1da177e4 1339
6a59d64c 1340 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1341 return -EINVAL;
243d8c0f
MCC		 1342 if (0 != t->index)
1343 return -EINVAL;
a82decf6 1344
8d87cb9f
MCC		 1345 strcpy(t->name, "Television");
1346 t->type = V4L2_TUNER_ANALOG_TV;
1347 t->capability = V4L2_TUNER_CAP_NORM;
1348 t->rangehigh = 0xffffffffUL;
a82decf6 1349
8d87cb9f
MCC		 1350 cx88_get_stereo(core ,t);
1351 reg = cx_read(MO_DEVICE_STATUS);
1352 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1353 return 0;
1354}
41ef7c1e 1355
8d87cb9f
MCC		 1356static int vidioc_s_tuner (struct file *file, void *priv,
1357 struct v4l2_tuner *t)
1358{
1359 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1360
6a59d64c 1361 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1362 return -EINVAL;
1363 if (0 != t->index)
1364 return -EINVAL;
c5287ba1 1365
8d87cb9f
MCC		 1366 cx88_set_stereo(core, t->audmode, 1);
1367 return 0;
1368}
902fc997 1369
8d87cb9f
MCC		 1370static int vidioc_g_frequency (struct file *file, void *priv,
1371 struct v4l2_frequency *f)
1372{
1373 struct cx8800_fh *fh = priv;
1374 struct cx88_core *core = fh->dev->core;
902fc997 1375
6a59d64c 1376 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1377 return -EINVAL;
1378
1379 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1380 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1381 f->frequency = core->freq;
1382
b8341e1d 1383 call_all(core, tuner, g_frequency, f);
1da177e4 1384
1da177e4
LT		 1385 return 0;
1386}
1387
54da49f5 1388int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1389 struct v4l2_frequency *f)
1da177e4 1390{
6a59d64c 1391 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1392 return -EINVAL;
1393 if (unlikely(f->tuner != 0))
1394 return -EINVAL;
54da49f5 1395
8d87cb9f
MCC		 1396 mutex_lock(&core->lock);
1397 core->freq = f->frequency;
1398 cx88_newstation(core);
b8341e1d 1399 call_all(core, tuner, s_frequency, f);
c7b0ac05 1400
8d87cb9f
MCC		 1401 /* When changing channels it is required to reset TVAUDIO */
1402 msleep (10);
1403 cx88_set_tvaudio(core);
c7b0ac05 1404
8d87cb9f 1405 mutex_unlock(&core->lock);
54da49f5 1406
8d87cb9f 1407 return 0;
1da177e4 1408}
54da49f5
MCC		 1409EXPORT_SYMBOL(cx88_set_freq);
1410
1411static int vidioc_s_frequency (struct file *file, void *priv,
1412 struct v4l2_frequency *f)
1413{
1414 struct cx8800_fh *fh = priv;
1415 struct cx88_core *core = fh->dev->core;
1416
1417 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1418 return -EINVAL;
1419 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1420 return -EINVAL;
1421
1422 return
1423 cx88_set_freq (core,f);
1424}
1da177e4 1425
dbbff48f
TP		 1426#ifdef CONFIG_VIDEO_ADV_DEBUG
1427static int vidioc_g_register (struct file *file, void *fh,
aecde8b5 1428 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1429{
1430 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1431
aecde8b5 1432 if (!v4l2_chip_match_host(&reg->match))
dbbff48f
TP		 1433 return -EINVAL;
1434 /* cx2388x has a 24-bit register space */
aecde8b5
HV		 1435 reg->val = cx_read(reg->reg & 0xffffff);
1436 reg->size = 4;
dbbff48f
TP		 1437 return 0;
1438}
1439
1440static int vidioc_s_register (struct file *file, void *fh,
aecde8b5 1441 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1442{
1443 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1444
aecde8b5 1445 if (!v4l2_chip_match_host(&reg->match))
dbbff48f 1446 return -EINVAL;
aecde8b5 1447 cx_write(reg->reg & 0xffffff, reg->val);
dbbff48f
TP		 1448 return 0;
1449}
1450#endif
8d87cb9f
MCC		 1451
1452/* ----------------------------------------------------------- */
1453/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1454/* ----------------------------------------------------------- */
1455
8d87cb9f
MCC		 1456static int radio_querycap (struct file *file, void *priv,
1457 struct v4l2_capability *cap)
1da177e4 1458{
8d87cb9f 1459 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1460 struct cx88_core *core = dev->core;
1461
8d87cb9f 1462 strcpy(cap->driver, "cx8800");
6a59d64c 1463 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1464 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1465 cap->version = CX88_VERSION_CODE;
1466 cap->capabilities = V4L2_CAP_TUNER;
1467 return 0;
1468}
1da177e4 1469
8d87cb9f
MCC		 1470static int radio_g_tuner (struct file *file, void *priv,
1471 struct v4l2_tuner *t)
1472{
1473 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1474
8d87cb9f
MCC		 1475 if (unlikely(t->index > 0))
1476 return -EINVAL;
1da177e4 1477
8d87cb9f
MCC		 1478 strcpy(t->name, "Radio");
1479 t->type = V4L2_TUNER_RADIO;
1da177e4 1480
b8341e1d 1481 call_all(core, tuner, g_tuner, t);
8d87cb9f
MCC		 1482 return 0;
1483}
1da177e4 1484
8d87cb9f
MCC		 1485static int radio_enum_input (struct file *file, void *priv,
1486 struct v4l2_input *i)
1487{
1488 if (i->index != 0)
1489 return -EINVAL;
1490 strcpy(i->name,"Radio");
1491 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1492
8d87cb9f
MCC		 1493 return 0;
1494}
a82decf6 1495
8d87cb9f
MCC		 1496static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1497{
1498 if (unlikely(a->index))
1499 return -EINVAL;
a82decf6 1500
8d87cb9f
MCC		 1501 strcpy(a->name,"Radio");
1502 return 0;
1503}
a82decf6 1504
8d87cb9f 1505/* FIXME: Should add a standard for radio */
a82decf6 1506
8d87cb9f
MCC		 1507static int radio_s_tuner (struct file *file, void *priv,
1508 struct v4l2_tuner *t)
1509{
1510 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1511
8d87cb9f
MCC		 1512 if (0 != t->index)
1513 return -EINVAL;
1da177e4 1514
b8341e1d 1515 call_all(core, tuner, s_tuner, t);
1da177e4 1516
8d87cb9f
MCC		 1517 return 0;
1518}
1da177e4 1519
8d87cb9f
MCC		 1520static int radio_s_audio (struct file *file, void *fh,
1521 struct v4l2_audio *a)
1522{
1523 return 0;
1524}
1da177e4 1525
8d87cb9f
MCC		 1526static int radio_s_input (struct file *file, void *fh, unsigned int i)
1527{
1da177e4 1528 return 0;
8d87cb9f 1529}
1da177e4 1530
8d87cb9f
MCC		 1531static int radio_queryctrl (struct file *file, void *priv,
1532 struct v4l2_queryctrl *c)
1da177e4 1533{
8d87cb9f
MCC		 1534 int i;
1535
1536 if (c->id < V4L2_CID_BASE ||
1537 c->id >= V4L2_CID_LASTP1)
1538 return -EINVAL;
1539 if (c->id == V4L2_CID_AUDIO_MUTE) {
1540 for (i = 0; i < CX8800_CTLS; i++)
1541 if (cx8800_ctls[i].v.id == c->id)
1542 break;
1543 *c = cx8800_ctls[i].v;
1544 } else
1545 *c = no_ctl;
1546 return 0;
1547}
1da177e4
LT		 1548
1549/* ----------------------------------------------------------- */
1550
1551static void cx8800_vid_timeout(unsigned long data)
1552{
1553 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1554 struct cx88_core *core = dev->core;
1555 struct cx88_dmaqueue *q = &dev->vidq;
1556 struct cx88_buffer *buf;
1557 unsigned long flags;
1558
e52e98a7 1559 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1560
1561 cx_clear(MO_VID_DMACNTRL, 0x11);
1562 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1563
1564 spin_lock_irqsave(&dev->slock,flags);
1565 while (!list_empty(&q->active)) {
1566 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1567 list_del(&buf->vb.queue);
0fc0686e 1568 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1569 wake_up(&buf->vb.done);
1570 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1571 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1572 }
1573 restart_video_queue(dev,q);
1574 spin_unlock_irqrestore(&dev->slock,flags);
1575}
1576
41ef7c1e
MCC		 1577static char *cx88_vid_irqs[32] = {
1578 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1579 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1580 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1581 "y_sync", "u_sync", "v_sync", "vbi_sync",
1582 "opc_err", "par_err", "rip_err", "pci_abort",
1583};
1584
1da177e4
LT		 1585static void cx8800_vid_irq(struct cx8800_dev *dev)
1586{
1587 struct cx88_core *core = dev->core;
1588 u32 status, mask, count;
1589
1590 status = cx_read(MO_VID_INTSTAT);
1591 mask = cx_read(MO_VID_INTMSK);
1592 if (0 == (status & mask))
1593 return;
1594 cx_write(MO_VID_INTSTAT, status);
1595 if (irq_debug || (status & mask & ~0xff))
1596 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1597 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1598 status, mask);
1da177e4
LT		 1599
1600 /* risc op code error */
1601 if (status & (1 << 16)) {
1602 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1603 cx_clear(MO_VID_DMACNTRL, 0x11);
1604 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1605 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1606 }
1607
1608 /* risc1 y */
1609 if (status & 0x01) {
1610 spin_lock(&dev->slock);
1611 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1612 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1613 spin_unlock(&dev->slock);
1614 }
1615
1616 /* risc1 vbi */
1617 if (status & 0x08) {
1618 spin_lock(&dev->slock);
1619 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1620 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1621 spin_unlock(&dev->slock);
1622 }
1623
1624 /* risc2 y */
1625 if (status & 0x10) {
1626 dprintk(2,"stopper video\n");
1627 spin_lock(&dev->slock);
1628 restart_video_queue(dev,&dev->vidq);
1629 spin_unlock(&dev->slock);
1630 }
1631
1632 /* risc2 vbi */
1633 if (status & 0x80) {
1634 dprintk(2,"stopper vbi\n");
1635 spin_lock(&dev->slock);
1636 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1637 spin_unlock(&dev->slock);
1638 }
1639}
1640
7d12e780 1641static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1642{
1643 struct cx8800_dev *dev = dev_id;
1644 struct cx88_core *core = dev->core;
1645 u32 status;
1646 int loop, handled = 0;
1647
1648 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1649 status = cx_read(MO_PCI_INTSTAT) &
1650 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1651 if (0 == status)
1652 goto out;
1653 cx_write(MO_PCI_INTSTAT, status);
1654 handled = 1;
1655
1656 if (status & core->pci_irqmask)
1657 cx88_core_irq(core,status);
8ddac9ee 1658 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1659 cx8800_vid_irq(dev);
1660 };
1661 if (10 == loop) {
1662 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1663 core->name);
1664 cx_write(MO_PCI_INTMSK,0);
1665 }
1666
1667 out:
1668 return IRQ_RETVAL(handled);
1669}
1670
1671/* ----------------------------------------------------------- */
1672/* exported stuff */
1673
bec43661 1674static const struct v4l2_file_operations video_fops =
1da177e4
LT		 1675{
1676 .owner = THIS_MODULE,
1677 .open = video_open,
1678 .release = video_release,
1679 .read = video_read,
1680 .poll = video_poll,
1681 .mmap = video_mmap,
8d87cb9f 1682 .ioctl = video_ioctl2,
1da177e4
LT		 1683};
1684
a399810c 1685static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1686 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1687 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1688 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1689 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1690 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1691 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1692 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1693 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1694 .vidioc_reqbufs = vidioc_reqbufs,
1695 .vidioc_querybuf = vidioc_querybuf,
1696 .vidioc_qbuf = vidioc_qbuf,
1697 .vidioc_dqbuf = vidioc_dqbuf,
1698 .vidioc_s_std = vidioc_s_std,
1699 .vidioc_enum_input = vidioc_enum_input,
1700 .vidioc_g_input = vidioc_g_input,
1701 .vidioc_s_input = vidioc_s_input,
1702 .vidioc_queryctrl = vidioc_queryctrl,
1703 .vidioc_g_ctrl = vidioc_g_ctrl,
1704 .vidioc_s_ctrl = vidioc_s_ctrl,
1705 .vidioc_streamon = vidioc_streamon,
1706 .vidioc_streamoff = vidioc_streamoff,
1707#ifdef CONFIG_VIDEO_V4L1_COMPAT
1708 .vidiocgmbuf = vidiocgmbuf,
1709#endif
1710 .vidioc_g_tuner = vidioc_g_tuner,
1711 .vidioc_s_tuner = vidioc_s_tuner,
1712 .vidioc_g_frequency = vidioc_g_frequency,
1713 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1714#ifdef CONFIG_VIDEO_ADV_DEBUG
1715 .vidioc_g_register = vidioc_g_register,
1716 .vidioc_s_register = vidioc_s_register,
1717#endif
a399810c
HV		 1718};
1719
1720static struct video_device cx8800_vbi_template;
1721
1722static struct video_device cx8800_video_template = {
1723 .name = "cx8800-video",
a399810c 1724 .fops = &video_fops,
a399810c 1725 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1726 .tvnorms = CX88_NORMS,
dbbff48f 1727 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1728};
1729
bec43661 1730static const struct v4l2_file_operations radio_fops =
1da177e4
LT		 1731{
1732 .owner = THIS_MODULE,
1733 .open = video_open,
1734 .release = video_release,
8d87cb9f 1735 .ioctl = video_ioctl2,
1da177e4
LT		 1736};
1737
a399810c 1738static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1739 .vidioc_querycap = radio_querycap,
1740 .vidioc_g_tuner = radio_g_tuner,
1741 .vidioc_enum_input = radio_enum_input,
1742 .vidioc_g_audio = radio_g_audio,
1743 .vidioc_s_tuner = radio_s_tuner,
1744 .vidioc_s_audio = radio_s_audio,
1745 .vidioc_s_input = radio_s_input,
1746 .vidioc_queryctrl = radio_queryctrl,
1747 .vidioc_g_ctrl = vidioc_g_ctrl,
1748 .vidioc_s_ctrl = vidioc_s_ctrl,
1749 .vidioc_g_frequency = vidioc_g_frequency,
1750 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1751#ifdef CONFIG_VIDEO_ADV_DEBUG
1752 .vidioc_g_register = vidioc_g_register,
1753 .vidioc_s_register = vidioc_s_register,
1754#endif
1da177e4
LT		 1755};
1756
a399810c
HV		 1757static struct video_device cx8800_radio_template = {
1758 .name = "cx8800-radio",
a399810c 1759 .fops = &radio_fops,
a399810c
HV		 1760 .ioctl_ops = &radio_ioctl_ops,
1761};
1762
1da177e4
LT		 1763/* ----------------------------------------------------------- */
1764
1765static void cx8800_unregister_video(struct cx8800_dev *dev)
1766{
1767 if (dev->radio_dev) {
f0813b4c 1768 if (video_is_registered(dev->radio_dev))
1da177e4
LT		 1769 video_unregister_device(dev->radio_dev);
1770 else
1771 video_device_release(dev->radio_dev);
1772 dev->radio_dev = NULL;
1773 }
1774 if (dev->vbi_dev) {
f0813b4c 1775 if (video_is_registered(dev->vbi_dev))
1da177e4
LT		 1776 video_unregister_device(dev->vbi_dev);
1777 else
1778 video_device_release(dev->vbi_dev);
1779 dev->vbi_dev = NULL;
1780 }
1781 if (dev->video_dev) {
f0813b4c 1782 if (video_is_registered(dev->video_dev))
1da177e4
LT		 1783 video_unregister_device(dev->video_dev);
1784 else
1785 video_device_release(dev->video_dev);
1786 dev->video_dev = NULL;
1787 }
1788}
1789
1790static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1791 const struct pci_device_id *pci_id)
1792{
1793 struct cx8800_dev *dev;
1794 struct cx88_core *core;
8d87cb9f 1795
1da177e4
LT		 1796 int err;
1797
7408187d 1798 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1799 if (NULL == dev)
1800 return -ENOMEM;
1da177e4
LT		 1801
1802 /* pci init */
1803 dev->pci = pci_dev;
1804 if (pci_enable_device(pci_dev)) {
1805 err = -EIO;
1806 goto fail_free;
1807 }
1808 core = cx88_core_get(dev->pci);
1809 if (NULL == core) {
1810 err = -EINVAL;
1811 goto fail_free;
1812 }
1813 dev->core = core;
1814
1815 /* print pci info */
1816 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1817 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1818 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1819 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1820 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1821 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1822
1823 pci_set_master(pci_dev);
284901a9 1824 if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
1da177e4
LT		 1825 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1826 err = -EIO;
1827 goto fail_core;
1828 }
1829
8d87cb9f
MCC		 1830 /* Initialize VBI template */
1831 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1832 sizeof(cx8800_vbi_template) );
1833 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
8d87cb9f 1834
1da177e4 1835 /* initialize driver struct */
1da177e4 1836 spin_lock_init(&dev->slock);
63ab1bdc 1837 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1838
1839 /* init video dma queues */
1840 INIT_LIST_HEAD(&dev->vidq.active);
1841 INIT_LIST_HEAD(&dev->vidq.queued);
1842 dev->vidq.timeout.function = cx8800_vid_timeout;
1843 dev->vidq.timeout.data = (unsigned long)dev;
1844 init_timer(&dev->vidq.timeout);
1845 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1846 MO_VID_DMACNTRL,0x11,0x00);
1847
1848 /* init vbi dma queues */
1849 INIT_LIST_HEAD(&dev->vbiq.active);
1850 INIT_LIST_HEAD(&dev->vbiq.queued);
1851 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1852 dev->vbiq.timeout.data = (unsigned long)dev;
1853 init_timer(&dev->vbiq.timeout);
1854 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1855 MO_VID_DMACNTRL,0x88,0x00);
1856
1857 /* get irq */
1858 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1859 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1860 if (err < 0) {
5772f813 1861 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1862 core->name,pci_dev->irq);
1863 goto fail_core;
1864 }
1865 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1866
1867 /* load and configure helper modules */
e52e98a7 1868
38f9d308 1869 if (core->board.audio_chip == V4L2_IDENT_WM8775)
e6574f2f 1870 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
53dacb15 1871 "wm8775", "wm8775", 0x36 >> 1, NULL);
b8341e1d
HV		 1872
1873 if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
1874 /* This probes for a tda9874 as is used on some
1875 Pixelview Ultra boards. */
53dacb15 1876 v4l2_i2c_new_subdev(&core->v4l2_dev,
1792f68b 1877 &core->i2c_adap,
53dacb15 1878 "tvaudio", "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
b8341e1d 1879 }
3057906d 1880
6fcecce7
MK		 1881 switch (core->boardnr) {
1882 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
b8341e1d
HV		 1883 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1884 static struct i2c_board_info rtc_info = {
1885 I2C_BOARD_INFO("isl1208", 0x6f)
1886 };
1887
6fcecce7 1888 request_module("rtc-isl1208");
b8341e1d
HV		 1889 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1890 }
8efd2e28
MK		 1891 /* break intentionally omitted */
1892 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1893 request_module("ir-kbd-i2c");
6fcecce7
MK		 1894 }
1895
1da177e4
LT		 1896 /* register v4l devices */
1897 dev->video_dev = cx88_vdev_init(core,dev->pci,
1898 &cx8800_video_template,"video");
63b0d5ad 1899 video_set_drvdata(dev->video_dev, dev);
1da177e4
LT		 1900 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1901 video_nr[core->nr]);
1902 if (err < 0) {
5772f813 1903 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1904 core->name);
1905 goto fail_unreg;
1906 }
38c7c036
LP		 1907 printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
1908 core->name, video_device_node_name(dev->video_dev));
1da177e4
LT		 1909
1910 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
63b0d5ad 1911 video_set_drvdata(dev->vbi_dev, dev);
1da177e4
LT		 1912 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1913 vbi_nr[core->nr]);
1914 if (err < 0) {
5772f813 1915 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1916 core->name);
1917 goto fail_unreg;
1918 }
38c7c036
LP		 1919 printk(KERN_INFO "%s/0: registered device %s\n",
1920 core->name, video_device_node_name(dev->vbi_dev));
1da177e4 1921
6a59d64c 1922 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1923 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1924 &cx8800_radio_template,"radio");
63b0d5ad 1925 video_set_drvdata(dev->radio_dev, dev);
1da177e4
LT		 1926 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1927 radio_nr[core->nr]);
1928 if (err < 0) {
5772f813 1929 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1930 core->name);
1931 goto fail_unreg;
1932 }
38c7c036
LP		 1933 printk(KERN_INFO "%s/0: registered device %s\n",
1934 core->name, video_device_node_name(dev->radio_dev));
1da177e4
LT		 1935 }
1936
1937 /* everything worked */
1da177e4
LT		 1938 pci_set_drvdata(pci_dev,dev);
1939
1940 /* initial device configuration */
3593cab5 1941 mutex_lock(&core->lock);
63ab1bdc 1942 cx88_set_tvnorm(core,core->tvnorm);
70f00044 1943 init_controls(core);
e90311a1 1944 cx88_video_mux(core,0);
3593cab5 1945 mutex_unlock(&core->lock);
1da177e4
LT		 1946
1947 /* start tvaudio thread */
6a59d64c 1948 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1949 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1950 if (IS_ERR(core->kthread)) {
1951 err = PTR_ERR(core->kthread);
5772f813
TP		 1952 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1953 core->name, err);
32b78de7
CG		 1954 }
1955 }
1da177e4
LT		 1956 return 0;
1957
1958fail_unreg:
1959 cx8800_unregister_video(dev);
1960 free_irq(pci_dev->irq, dev);
1961fail_core:
1962 cx88_core_put(core,dev->pci);
1963fail_free:
1964 kfree(dev);
1965 return err;
1966}
1967
1968static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1969{
4ac97914 1970 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1971 struct cx88_core *core = dev->core;
1da177e4
LT		 1972
1973 /* stop thread */
e52e98a7
MCC		 1974 if (core->kthread) {
1975 kthread_stop(core->kthread);
1976 core->kthread = NULL;
1da177e4
LT		 1977 }
1978
b12203d2 1979 if (core->ir)
92f4fc10 1980 cx88_ir_stop(core);
b12203d2 1981
e52e98a7 1982 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1983 pci_disable_device(pci_dev);
1984
1985 /* unregister stuff */
1986
1987 free_irq(pci_dev->irq, dev);
1988 cx8800_unregister_video(dev);
1989 pci_set_drvdata(pci_dev, NULL);
1990
1991 /* free memory */
1992 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
e52e98a7 1993 cx88_core_put(core,dev->pci);
1da177e4
LT		 1994 kfree(dev);
1995}
1996
17bc98a4 1997#ifdef CONFIG_PM
1da177e4
LT		 1998static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1999{
b45009b0 2000 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2001 struct cx88_core *core = dev->core;
2002
2003 /* stop video+vbi capture */
2004 spin_lock(&dev->slock);
2005 if (!list_empty(&dev->vidq.active)) {
5772f813 2006 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 2007 stop_video_dma(dev);
2008 del_timer(&dev->vidq.timeout);
2009 }
2010 if (!list_empty(&dev->vbiq.active)) {
5772f813 2011 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2012 cx8800_stop_vbi_dma(dev);
2013 del_timer(&dev->vbiq.timeout);
2014 }
2015 spin_unlock(&dev->slock);
2016
13595a51 2017 if (core->ir)
92f4fc10 2018 cx88_ir_stop(core);
1da177e4 2019 /* FIXME -- shutdown device */
e52e98a7 2020 cx88_shutdown(core);
1da177e4
LT		 2021
2022 pci_save_state(pci_dev);
2023 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2024 pci_disable_device(pci_dev);
2025 dev->state.disabled = 1;
2026 }
2027 return 0;
2028}
2029
2030static int cx8800_resume(struct pci_dev *pci_dev)
2031{
b45009b0 2032 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2033 struct cx88_core *core = dev->core;
08adb9e2 2034 int err;
1da177e4
LT		 2035
2036 if (dev->state.disabled) {
08adb9e2
MCC		 2037 err=pci_enable_device(pci_dev);
2038 if (err) {
5772f813
TP		 2039 printk(KERN_ERR "%s/0: can't enable device\n",
2040 core->name);
08adb9e2
MCC		 2041 return err;
2042 }
2043
1da177e4
LT		 2044 dev->state.disabled = 0;
2045 }
08adb9e2
MCC		 2046 err= pci_set_power_state(pci_dev, PCI_D0);
2047 if (err) {
5772f813 2048 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2049 pci_disable_device(pci_dev);
2050 dev->state.disabled = 1;
2051
2052 return err;
2053 }
1da177e4
LT		 2054 pci_restore_state(pci_dev);
2055
1da177e4 2056 /* FIXME: re-initialize hardware */
e52e98a7 2057 cx88_reset(core);
13595a51 2058 if (core->ir)
92f4fc10 2059 cx88_ir_start(core);
13595a51
MCC		 2060
2061 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2062
2063 /* restart video+vbi capture */
2064 spin_lock(&dev->slock);
2065 if (!list_empty(&dev->vidq.active)) {
5772f813 2066 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2067 restart_video_queue(dev,&dev->vidq);
2068 }
2069 if (!list_empty(&dev->vbiq.active)) {
5772f813 2070 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2071 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2072 }
2073 spin_unlock(&dev->slock);
2074
2075 return 0;
2076}
17bc98a4 2077#endif
1da177e4
LT		 2078
2079/* ----------------------------------------------------------- */
2080
408b664a 2081static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2082 {
2083 .vendor = 0x14f1,
2084 .device = 0x8800,
b45009b0
MCC		 2085 .subvendor = PCI_ANY_ID,
2086 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2087 },{
2088 /* --- end of list --- */
2089 }
2090};
2091MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2092
2093static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2094 .name = "cx8800",
2095 .id_table = cx8800_pci_tbl,
2096 .probe = cx8800_initdev,
2097 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2098#ifdef CONFIG_PM
1da177e4
LT		 2099 .suspend = cx8800_suspend,
2100 .resume = cx8800_resume,
17bc98a4 2101#endif
1da177e4
LT		 2102};
2103
31d0f845 2104static int __init cx8800_init(void)
1da177e4 2105{
5772f813 2106 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2107 (CX88_VERSION_CODE >> 16) & 0xff,
2108 (CX88_VERSION_CODE >> 8) & 0xff,
2109 CX88_VERSION_CODE & 0xff);
2110#ifdef SNAPSHOT
2111 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2112 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2113#endif
2114 return pci_register_driver(&cx8800_pci_driver);
2115}
2116
31d0f845 2117static void __exit cx8800_fini(void)
1da177e4
LT		 2118{
2119 pci_unregister_driver(&cx8800_pci_driver);
2120}
2121
2122module_init(cx8800_init);
2123module_exit(cx8800_fini);
2124
2125/* ----------------------------------------------------------- */
2126/*
2127 * Local variables:
2128 * c-basic-offset: 8
2129 * End:
b45009b0 2130 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2131 */
Clone of davem's net-next-2.6 tree