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[net-next-2.6.git] / drivers / media / video / cx18 / cx18-av-core.c
CommitLineData
1c1e45d1
HV		 1/*
2 * cx18 ADEC audio functions
3 *
4 * Derived from cx25840-core.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */
23
24#include "cx18-driver.h"
b1526421 25#include "cx18-io.h"
1c1e45d1
HV		 26
27int cx18_av_write(struct cx18 *cx, u16 addr, u8 value)
28{
b1526421 29 u32 reg = 0xc40000 + (addr & ~3);
1c1e45d1
HV		 30 u32 mask = 0xff;
31 int shift = (addr & 3) * 8;
b1526421 32 u32 x = cx18_read_reg(cx, reg);
1c1e45d1
HV		 33
34 x = (x & ~(mask << shift)) | ((u32)value << shift);
b1526421 35 cx18_write_reg(cx, x, reg);
1c1e45d1
HV		 36 return 0;
37}
38
39int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value)
40{
b1526421 41 cx18_write_reg(cx, value, 0xc40000 + addr);
1c1e45d1
HV		 42 return 0;
43}
44
45u8 cx18_av_read(struct cx18 *cx, u16 addr)
46{
b1526421 47 u32 x = cx18_read_reg(cx, 0xc40000 + (addr & ~3));
1c1e45d1
HV		 48 int shift = (addr & 3) * 8;
49
50 return (x >> shift) & 0xff;
51}
52
53u32 cx18_av_read4(struct cx18 *cx, u16 addr)
54{
b1526421 55 return cx18_read_reg(cx, 0xc40000 + addr);
1c1e45d1
HV		 56}
57
58int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,
59 u8 or_value)
60{
61 return cx18_av_write(cx, addr,
62 (cx18_av_read(cx, addr) & and_mask) |
63 or_value);
64}
65
66int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,
67 u32 or_value)
68{
69 return cx18_av_write4(cx, addr,
70 (cx18_av_read4(cx, addr) & and_mask) |
71 or_value);
72}
73
74/* ----------------------------------------------------------------------- */
75
76static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
77 enum cx18_av_audio_input aud_input);
78static void log_audio_status(struct cx18 *cx);
79static void log_video_status(struct cx18 *cx);
80
81/* ----------------------------------------------------------------------- */
82
83static void cx18_av_initialize(struct cx18 *cx)
84{
ca130eef 85 struct cx18_av_state *state = &cx->av_state;
1c1e45d1
HV		 86 u32 v;
87
88 cx18_av_loadfw(cx);
89 /* Stop 8051 code execution */
90 cx18_av_write4(cx, CXADEC_DL_CTL, 0x03000000);
91
92 /* initallize the PLL by toggling sleep bit */
93 v = cx18_av_read4(cx, CXADEC_HOST_REG1);
94 /* enable sleep mode */
95 cx18_av_write4(cx, CXADEC_HOST_REG1, v | 1);
96 /* disable sleep mode */
97 cx18_av_write4(cx, CXADEC_HOST_REG1, v & 0xfffe);
98
99 /* initialize DLLs */
100 v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF;
101 /* disable FLD */
102 cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v);
103 /* enable FLD */
104 cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100);
105
106 v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF;
107 /* disable FLD */
108 cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v);
109 /* enable FLD */
110 cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100);
111
112 /* set analog bias currents. Set Vreg to 1.20V. */
113 cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802);
114
115 v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1;
116 /* enable TUNE_FIL_RST */
117 cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v);
118 /* disable TUNE_FIL_RST */
119 cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v & 0xFFFFFFFE);
120
121 /* enable 656 output */
122 cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00);
123
124 /* video output drive strength */
125 cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2);
126
127 /* reset video */
128 cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000);
129 cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0);
130
131 /* set video to auto-detect */
132 /* Clear bits 11-12 to enable slow locking mode. Set autodetect mode */
133 /* set the comb notch = 1 */
134 cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800);
135
136 /* Enable wtw_en in CRUSH_CTRL (Set bit 22) */
137 /* Enable maj_sel in CRUSH_CTRL (Set bit 20) */
138 cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000);
139
140 /* Set VGA_TRACK_RANGE to 0x20 */
141 cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000);
142
143 /* Enable VBI capture */
144 cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253F);
145 /* cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253E); */
146
147 /* Set the video input.
148 The setting in MODE_CTRL gets lost when we do the above setup */
149 /* EncSetSignalStd(dwDevNum, pEnc->dwSigStd); */
150 /* EncSetVideoInput(dwDevNum, pEnc->VidIndSelection); */
151
152 v = cx18_av_read4(cx, CXADEC_AFE_CTRL);
153 v &= 0xFFFBFFFF; /* turn OFF bit 18 for droop_comp_ch1 */
154 v &= 0xFFFF7FFF; /* turn OFF bit 9 for clamp_sel_ch1 */
155 v &= 0xFFFFFFFE; /* turn OFF bit 0 for 12db_ch1 */
156 /* v |= 0x00000001;*/ /* turn ON bit 0 for 12db_ch1 */
157 cx18_av_write4(cx, CXADEC_AFE_CTRL, v);
158
159/* if(dwEnable && dw3DCombAvailable) { */
160/* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x7728021F); */
161/* } else { */
162/* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */
163/* } */
164 cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F);
ca130eef
HV		 165 state->default_volume = 228 - cx18_av_read(cx, 0x8d4);
166 state->default_volume = ((state->default_volume / 2) + 23) << 9;
1c1e45d1
HV		 167}
168
169/* ----------------------------------------------------------------------- */
170
03b52c36
HV		 171void cx18_av_std_setup(struct cx18 *cx)
172{
173 struct cx18_av_state *state = &cx->av_state;
174 v4l2_std_id std = state->std;
175 int hblank, hactive, burst, vblank, vactive, sc;
176 int vblank656, src_decimation;
177 int luma_lpf, uv_lpf, comb;
178 u32 pll_int, pll_frac, pll_post;
179
180 /* datasheet startup, step 8d */
181 if (std & ~V4L2_STD_NTSC)
182 cx18_av_write(cx, 0x49f, 0x11);
183 else
184 cx18_av_write(cx, 0x49f, 0x14);
185
186 if (std & V4L2_STD_625_50) {
187 hblank = 132;
188 hactive = 720;
189 burst = 93;
190 vblank = 36;
191 vactive = 580;
192 vblank656 = 40;
193 src_decimation = 0x21f;
194
195 luma_lpf = 2;
196 if (std & V4L2_STD_PAL) {
197 uv_lpf = 1;
198 comb = 0x20;
199 sc = 688739;
200 } else if (std == V4L2_STD_PAL_Nc) {
201 uv_lpf = 1;
202 comb = 0x20;
203 sc = 556453;
204 } else { /* SECAM */
205 uv_lpf = 0;
206 comb = 0;
207 sc = 672351;
208 }
209 } else {
210 hactive = 720;
211 hblank = 122;
212 vactive = 487;
213 luma_lpf = 1;
214 uv_lpf = 1;
215 vblank = 26;
216 vblank656 = 26;
217
218 src_decimation = 0x21f;
219 if (std == V4L2_STD_PAL_60) {
220 burst = 0x5b;
221 luma_lpf = 2;
222 comb = 0x20;
223 sc = 688739;
224 } else if (std == V4L2_STD_PAL_M) {
225 burst = 0x61;
226 comb = 0x20;
227 sc = 555452;
228 } else {
229 burst = 0x5b;
230 comb = 0x66;
231 sc = 556063;
232 }
233 }
234
235 /* DEBUG: Displays configured PLL frequency */
236 pll_int = cx18_av_read(cx, 0x108);
237 pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;
238 pll_post = cx18_av_read(cx, 0x109);
239 CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n",
240 pll_int, pll_frac, pll_post);
241
242 if (pll_post) {
243 int fin, fsc;
244 int pll = 28636363L * ((((u64)pll_int) << 25) + pll_frac);
245
246 pll >>= 25;
247 pll /= pll_post;
248 CX18_DEBUG_INFO("PLL = %d.%06d MHz\n",
249 pll / 1000000, pll % 1000000);
250 CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n",
251 pll / 8000000, (pll / 8) % 1000000);
252
253 fin = ((u64)src_decimation * pll) >> 12;
254 CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n",
255 fin / 1000000, fin % 1000000);
256
257 fsc = (((u64)sc) * pll) >> 24L;
258 CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n",
259 fsc / 1000000, fsc % 1000000);
260
261 CX18_DEBUG_INFO("hblank %i, hactive %i, "
262 "vblank %i , vactive %i, vblank656 %i, src_dec %i,"
263 "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x,"
264 " sc 0x%06x\n",
265 hblank, hactive, vblank, vactive, vblank656,
266 src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
267 }
268
269 /* Sets horizontal blanking delay and active lines */
270 cx18_av_write(cx, 0x470, hblank);
271 cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) |
272 (hactive << 4)));
273 cx18_av_write(cx, 0x472, hactive >> 4);
274
275 /* Sets burst gate delay */
276 cx18_av_write(cx, 0x473, burst);
277
278 /* Sets vertical blanking delay and active duration */
279 cx18_av_write(cx, 0x474, vblank);
280 cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) |
281 (vactive << 4)));
282 cx18_av_write(cx, 0x476, vactive >> 4);
283 cx18_av_write(cx, 0x477, vblank656);
284
285 /* Sets src decimation rate */
286 cx18_av_write(cx, 0x478, 0xff & src_decimation);
287 cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8));
288
289 /* Sets Luma and UV Low pass filters */
290 cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
291
292 /* Enables comb filters */
293 cx18_av_write(cx, 0x47b, comb);
294
295 /* Sets SC Step*/
296 cx18_av_write(cx, 0x47c, sc);
297 cx18_av_write(cx, 0x47d, 0xff & sc >> 8);
298 cx18_av_write(cx, 0x47e, 0xff & sc >> 16);
299
300 /* Sets VBI parameters */
301 if (std & V4L2_STD_625_50) {
302 cx18_av_write(cx, 0x47f, 0x01);
303 state->vbi_line_offset = 5;
304 } else {
305 cx18_av_write(cx, 0x47f, 0x00);
306 state->vbi_line_offset = 8;
307 }
308}
309
310/* ----------------------------------------------------------------------- */
311
1c1e45d1
HV		 312static void input_change(struct cx18 *cx)
313{
314 struct cx18_av_state *state = &cx->av_state;
315 v4l2_std_id std = state->std;
316
317 /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */
c1738904
HV		 318 cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
319 cx18_av_and_or(cx, 0x401, ~0x60, 0);
320 cx18_av_and_or(cx, 0x401, ~0x60, 0x60);
1c1e45d1
HV		 321
322 if (std & V4L2_STD_525_60) {
323 if (std == V4L2_STD_NTSC_M_JP) {
324 /* Japan uses EIAJ audio standard */
325 cx18_av_write(cx, 0x808, 0xf7);
63b8c709 326 cx18_av_write(cx, 0x80b, 0x02);
1c1e45d1
HV		 327 } else if (std == V4L2_STD_NTSC_M_KR) {
328 /* South Korea uses A2 audio standard */
329 cx18_av_write(cx, 0x808, 0xf8);
63b8c709 330 cx18_av_write(cx, 0x80b, 0x03);
1c1e45d1
HV		 331 } else {
332 /* Others use the BTSC audio standard */
333 cx18_av_write(cx, 0x808, 0xf6);
63b8c709 334 cx18_av_write(cx, 0x80b, 0x01);
1c1e45d1 335 }
1c1e45d1
HV		 336 } else if (std & V4L2_STD_PAL) {
337 /* Follow tuner change procedure for PAL */
338 cx18_av_write(cx, 0x808, 0xff);
339 cx18_av_write(cx, 0x80b, 0x03);
340 } else if (std & V4L2_STD_SECAM) {
341 /* Select autodetect for SECAM */
342 cx18_av_write(cx, 0x808, 0xff);
343 cx18_av_write(cx, 0x80b, 0x03);
344 }
345
346 if (cx18_av_read(cx, 0x803) & 0x10) {
347 /* restart audio decoder microcontroller */
348 cx18_av_and_or(cx, 0x803, ~0x10, 0x00);
349 cx18_av_and_or(cx, 0x803, ~0x10, 0x10);
350 }
351}
352
353static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
354 enum cx18_av_audio_input aud_input)
355{
356 struct cx18_av_state *state = &cx->av_state;
357 u8 is_composite = (vid_input >= CX18_AV_COMPOSITE1 &&
358 vid_input <= CX18_AV_COMPOSITE8);
359 u8 reg;
360
361 CX18_DEBUG_INFO("decoder set video input %d, audio input %d\n",
362 vid_input, aud_input);
363
364 if (is_composite) {
365 reg = 0xf0 + (vid_input - CX18_AV_COMPOSITE1);
366 } else {
367 int luma = vid_input & 0xf0;
368 int chroma = vid_input & 0xf00;
369
370 if ((vid_input & ~0xff0) ||
371 luma < CX18_AV_SVIDEO_LUMA1 ||
45270a15 372 luma > CX18_AV_SVIDEO_LUMA8 ||
1c1e45d1
HV		 373 chroma < CX18_AV_SVIDEO_CHROMA4 ||
374 chroma > CX18_AV_SVIDEO_CHROMA8) {
375 CX18_ERR("0x%04x is not a valid video input!\n",
376 vid_input);
377 return -EINVAL;
378 }
379 reg = 0xf0 + ((luma - CX18_AV_SVIDEO_LUMA1) >> 4);
380 if (chroma >= CX18_AV_SVIDEO_CHROMA7) {
381 reg &= 0x3f;
382 reg |= (chroma - CX18_AV_SVIDEO_CHROMA7) >> 2;
383 } else {
384 reg &= 0xcf;
385 reg |= (chroma - CX18_AV_SVIDEO_CHROMA4) >> 4;
386 }
387 }
388
389 switch (aud_input) {
81cb727d
HV		 390 case CX18_AV_AUDIO_SERIAL1:
391 case CX18_AV_AUDIO_SERIAL2:
1c1e45d1
HV		 392 /* do nothing, use serial audio input */
393 break;
394 case CX18_AV_AUDIO4: reg &= ~0x30; break;
395 case CX18_AV_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
396 case CX18_AV_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
397 case CX18_AV_AUDIO7: reg &= ~0xc0; break;
398 case CX18_AV_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
399
400 default:
401 CX18_ERR("0x%04x is not a valid audio input!\n", aud_input);
402 return -EINVAL;
403 }
404
405 cx18_av_write(cx, 0x103, reg);
406 /* Set INPUT_MODE to Composite (0) or S-Video (1) */
c1738904 407 cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02);
1c1e45d1
HV		 408 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
409 cx18_av_and_or(cx, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
410 /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */
411 if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
412 cx18_av_and_or(cx, 0x102, ~0x4, 4);
413 else
414 cx18_av_and_or(cx, 0x102, ~0x4, 0);
415 /*cx18_av_and_or4(cx, 0x104, ~0x001b4180, 0x00004180);*/
416
417 state->vid_input = vid_input;
418 state->aud_input = aud_input;
419 cx18_av_audio_set_path(cx);
420 input_change(cx);
421 return 0;
422}
423
424/* ----------------------------------------------------------------------- */
425
426static int set_v4lstd(struct cx18 *cx)
427{
428 struct cx18_av_state *state = &cx->av_state;
429 u8 fmt = 0; /* zero is autodetect */
430 u8 pal_m = 0;
431
432 /* First tests should be against specific std */
433 if (state->std == V4L2_STD_NTSC_M_JP) {
434 fmt = 0x2;
435 } else if (state->std == V4L2_STD_NTSC_443) {
436 fmt = 0x3;
437 } else if (state->std == V4L2_STD_PAL_M) {
438 pal_m = 1;
439 fmt = 0x5;
440 } else if (state->std == V4L2_STD_PAL_N) {
441 fmt = 0x6;
442 } else if (state->std == V4L2_STD_PAL_Nc) {
443 fmt = 0x7;
444 } else if (state->std == V4L2_STD_PAL_60) {
445 fmt = 0x8;
446 } else {
447 /* Then, test against generic ones */
448 if (state->std & V4L2_STD_NTSC)
449 fmt = 0x1;
450 else if (state->std & V4L2_STD_PAL)
451 fmt = 0x4;
452 else if (state->std & V4L2_STD_SECAM)
453 fmt = 0xc;
454 }
455
456 CX18_DEBUG_INFO("changing video std to fmt %i\n", fmt);
457
458 /* Follow step 9 of section 3.16 in the cx18_av datasheet.
459 Without this PAL may display a vertical ghosting effect.
460 This happens for example with the Yuan MPC622. */
461 if (fmt >= 4 && fmt < 8) {
462 /* Set format to NTSC-M */
c1738904 463 cx18_av_and_or(cx, 0x400, ~0xf, 1);
1c1e45d1
HV		 464 /* Turn off LCOMB */
465 cx18_av_and_or(cx, 0x47b, ~6, 0);
466 }
c1738904
HV		 467 cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);
468 cx18_av_and_or(cx, 0x403, ~0x3, pal_m);
03b52c36 469 cx18_av_std_setup(cx);
1c1e45d1
HV		 470 input_change(cx);
471 return 0;
472}
473
474/* ----------------------------------------------------------------------- */
475
476static int set_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
477{
478 switch (ctrl->id) {
479 case V4L2_CID_BRIGHTNESS:
480 if (ctrl->value < 0 || ctrl->value > 255) {
481 CX18_ERR("invalid brightness setting %d\n",
482 ctrl->value);
483 return -ERANGE;
484 }
485
486 cx18_av_write(cx, 0x414, ctrl->value - 128);
487 break;
488
489 case V4L2_CID_CONTRAST:
490 if (ctrl->value < 0 || ctrl->value > 127) {
491 CX18_ERR("invalid contrast setting %d\n",
492 ctrl->value);
493 return -ERANGE;
494 }
495
496 cx18_av_write(cx, 0x415, ctrl->value << 1);
497 break;
498
499 case V4L2_CID_SATURATION:
500 if (ctrl->value < 0 || ctrl->value > 127) {
501 CX18_ERR("invalid saturation setting %d\n",
502 ctrl->value);
503 return -ERANGE;
504 }
505
506 cx18_av_write(cx, 0x420, ctrl->value << 1);
507 cx18_av_write(cx, 0x421, ctrl->value << 1);
508 break;
509
510 case V4L2_CID_HUE:
511 if (ctrl->value < -127 || ctrl->value > 127) {
512 CX18_ERR("invalid hue setting %d\n", ctrl->value);
513 return -ERANGE;
514 }
515
516 cx18_av_write(cx, 0x422, ctrl->value);
517 break;
518
519 case V4L2_CID_AUDIO_VOLUME:
520 case V4L2_CID_AUDIO_BASS:
521 case V4L2_CID_AUDIO_TREBLE:
522 case V4L2_CID_AUDIO_BALANCE:
523 case V4L2_CID_AUDIO_MUTE:
524 return cx18_av_audio(cx, VIDIOC_S_CTRL, ctrl);
525
526 default:
527 return -EINVAL;
528 }
529
530 return 0;
531}
532
533static int get_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
534{
535 switch (ctrl->id) {
536 case V4L2_CID_BRIGHTNESS:
537 ctrl->value = (s8)cx18_av_read(cx, 0x414) + 128;
538 break;
539 case V4L2_CID_CONTRAST:
540 ctrl->value = cx18_av_read(cx, 0x415) >> 1;
541 break;
542 case V4L2_CID_SATURATION:
543 ctrl->value = cx18_av_read(cx, 0x420) >> 1;
544 break;
545 case V4L2_CID_HUE:
546 ctrl->value = (s8)cx18_av_read(cx, 0x422);
547 break;
548 case V4L2_CID_AUDIO_VOLUME:
549 case V4L2_CID_AUDIO_BASS:
550 case V4L2_CID_AUDIO_TREBLE:
551 case V4L2_CID_AUDIO_BALANCE:
552 case V4L2_CID_AUDIO_MUTE:
553 return cx18_av_audio(cx, VIDIOC_G_CTRL, ctrl);
554 default:
555 return -EINVAL;
556 }
557
558 return 0;
559}
560
561/* ----------------------------------------------------------------------- */
562
563static int get_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
564{
565 switch (fmt->type) {
566 case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
567 return cx18_av_vbi(cx, VIDIOC_G_FMT, fmt);
568 default:
569 return -EINVAL;
570 }
571
572 return 0;
573}
574
575static int set_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
576{
577 struct cx18_av_state *state = &cx->av_state;
578 struct v4l2_pix_format *pix;
579 int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
580 int is_50Hz = !(state->std & V4L2_STD_525_60);
581
582 switch (fmt->type) {
583 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
584 pix = &(fmt->fmt.pix);
585
586 Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4;
587 Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4;
588
589 Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4;
590 Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4;
591
592 Vlines = pix->height + (is_50Hz ? 4 : 7);
593
594 if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
595 (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
596 CX18_ERR("%dx%d is not a valid size!\n",
597 pix->width, pix->height);
598 return -ERANGE;
599 }
600
601 HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
602 VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
603 VSC &= 0x1fff;
604
605 if (pix->width >= 385)
606 filter = 0;
607 else if (pix->width > 192)
608 filter = 1;
609 else if (pix->width > 96)
610 filter = 2;
611 else
612 filter = 3;
613
614 CX18_DEBUG_INFO("decoder set size %dx%d -> scale %ux%u\n",
615 pix->width, pix->height, HSC, VSC);
616
617 /* HSCALE=HSC */
618 cx18_av_write(cx, 0x418, HSC & 0xff);
619 cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff);
620 cx18_av_write(cx, 0x41a, HSC >> 16);
621 /* VSCALE=VSC */
622 cx18_av_write(cx, 0x41c, VSC & 0xff);
623 cx18_av_write(cx, 0x41d, VSC >> 8);
624 /* VS_INTRLACE=1 VFILT=filter */
625 cx18_av_write(cx, 0x41e, 0x8 | filter);
626 break;
627
628 case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
629 return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
630
631 case V4L2_BUF_TYPE_VBI_CAPTURE:
632 return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
633
634 default:
635 return -EINVAL;
636 }
637
638 return 0;
639}
640
641/* ----------------------------------------------------------------------- */
642
643int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg)
644{
645 struct cx18_av_state *state = &cx->av_state;
646 struct v4l2_tuner *vt = arg;
647 struct v4l2_routing *route = arg;
648
649 /* ignore these commands */
650 switch (cmd) {
651 case TUNER_SET_TYPE_ADDR:
652 return 0;
653 }
654
655 if (!state->is_initialized) {
656 CX18_DEBUG_INFO("cmd %08x triggered fw load\n", cmd);
657 /* initialize on first use */
658 state->is_initialized = 1;
659 cx18_av_initialize(cx);
660 }
661
662 switch (cmd) {
663 case VIDIOC_INT_DECODE_VBI_LINE:
664 return cx18_av_vbi(cx, cmd, arg);
665
666 case VIDIOC_INT_AUDIO_CLOCK_FREQ:
667 return cx18_av_audio(cx, cmd, arg);
668
669 case VIDIOC_STREAMON:
670 CX18_DEBUG_INFO("enable output\n");
671 cx18_av_write(cx, 0x115, 0x8c);
672 cx18_av_write(cx, 0x116, 0x07);
673 break;
674
675 case VIDIOC_STREAMOFF:
676 CX18_DEBUG_INFO("disable output\n");
677 cx18_av_write(cx, 0x115, 0x00);
678 cx18_av_write(cx, 0x116, 0x00);
679 break;
680
681 case VIDIOC_LOG_STATUS:
682 log_video_status(cx);
683 log_audio_status(cx);
684 break;
685
686 case VIDIOC_G_CTRL:
687 return get_v4lctrl(cx, (struct v4l2_control *)arg);
688
689 case VIDIOC_S_CTRL:
690 return set_v4lctrl(cx, (struct v4l2_control *)arg);
691
692 case VIDIOC_QUERYCTRL:
693 {
694 struct v4l2_queryctrl *qc = arg;
695
696 switch (qc->id) {
697 case V4L2_CID_BRIGHTNESS:
698 case V4L2_CID_CONTRAST:
699 case V4L2_CID_SATURATION:
700 case V4L2_CID_HUE:
701 return v4l2_ctrl_query_fill_std(qc);
702 default:
703 break;
704 }
705
706 switch (qc->id) {
707 case V4L2_CID_AUDIO_VOLUME:
ca130eef
HV		 708 return v4l2_ctrl_query_fill(qc, 0, 65535,
709 65535 / 100, state->default_volume);
1c1e45d1
HV		 710 case V4L2_CID_AUDIO_MUTE:
711 case V4L2_CID_AUDIO_BALANCE:
712 case V4L2_CID_AUDIO_BASS:
713 case V4L2_CID_AUDIO_TREBLE:
714 return v4l2_ctrl_query_fill_std(qc);
715 default:
716 return -EINVAL;
717 }
718 return -EINVAL;
719 }
720
721 case VIDIOC_G_STD:
722 *(v4l2_std_id *)arg = state->std;
723 break;
724
725 case VIDIOC_S_STD:
726 if (state->radio == 0 && state->std == *(v4l2_std_id *)arg)
727 return 0;
728 state->radio = 0;
729 state->std = *(v4l2_std_id *)arg;
730 return set_v4lstd(cx);
731
732 case AUDC_SET_RADIO:
733 state->radio = 1;
734 break;
735
736 case VIDIOC_INT_G_VIDEO_ROUTING:
737 route->input = state->vid_input;
738 route->output = 0;
739 break;
740
741 case VIDIOC_INT_S_VIDEO_ROUTING:
742 return set_input(cx, route->input, state->aud_input);
743
744 case VIDIOC_INT_G_AUDIO_ROUTING:
745 route->input = state->aud_input;
746 route->output = 0;
747 break;
748
749 case VIDIOC_INT_S_AUDIO_ROUTING:
750 return set_input(cx, state->vid_input, route->input);
751
752 case VIDIOC_S_FREQUENCY:
753 input_change(cx);
754 break;
755
756 case VIDIOC_G_TUNER:
757 {
758 u8 vpres = cx18_av_read(cx, 0x40e) & 0x20;
759 u8 mode;
760 int val = 0;
761
762 if (state->radio)
763 break;
764
765 vt->signal = vpres ? 0xffff : 0x0;
766
767 vt->capability |=
768 V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
769 V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
770
771 mode = cx18_av_read(cx, 0x804);
772
773 /* get rxsubchans and audmode */
774 if ((mode & 0xf) == 1)
775 val |= V4L2_TUNER_SUB_STEREO;
776 else
777 val |= V4L2_TUNER_SUB_MONO;
778
779 if (mode == 2 || mode == 4)
780 val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
781
782 if (mode & 0x10)
783 val |= V4L2_TUNER_SUB_SAP;
784
785 vt->rxsubchans = val;
786 vt->audmode = state->audmode;
787 break;
788 }
789
790 case VIDIOC_S_TUNER:
791 if (state->radio)
792 break;
793
794 switch (vt->audmode) {
795 case V4L2_TUNER_MODE_MONO:
796 /* mono -> mono
797 stereo -> mono
798 bilingual -> lang1 */
799 cx18_av_and_or(cx, 0x809, ~0xf, 0x00);
800 break;
801 case V4L2_TUNER_MODE_STEREO:
802 case V4L2_TUNER_MODE_LANG1:
803 /* mono -> mono
804 stereo -> stereo
805 bilingual -> lang1 */
806 cx18_av_and_or(cx, 0x809, ~0xf, 0x04);
807 break;
808 case V4L2_TUNER_MODE_LANG1_LANG2:
809 /* mono -> mono
810 stereo -> stereo
811 bilingual -> lang1/lang2 */
812 cx18_av_and_or(cx, 0x809, ~0xf, 0x07);
813 break;
814 case V4L2_TUNER_MODE_LANG2:
815 /* mono -> mono
816 stereo -> stereo
817 bilingual -> lang2 */
818 cx18_av_and_or(cx, 0x809, ~0xf, 0x01);
819 break;
820 default:
821 return -EINVAL;
822 }
823 state->audmode = vt->audmode;
824 break;
825
826 case VIDIOC_G_FMT:
827 return get_v4lfmt(cx, (struct v4l2_format *)arg);
828
829 case VIDIOC_S_FMT:
830 return set_v4lfmt(cx, (struct v4l2_format *)arg);
831
832 case VIDIOC_INT_RESET:
833 cx18_av_initialize(cx);
834 break;
835
836 default:
837 return -EINVAL;
838 }
839
840 return 0;
841}
842
843/* ----------------------------------------------------------------------- */
844
845/* ----------------------------------------------------------------------- */
846
847static void log_video_status(struct cx18 *cx)
848{
849 static const char *const fmt_strs[] = {
850 "0x0",
851 "NTSC-M", "NTSC-J", "NTSC-4.43",
852 "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
853 "0x9", "0xA", "0xB",
854 "SECAM",
855 "0xD", "0xE", "0xF"
856 };
857
858 struct cx18_av_state *state = &cx->av_state;
859 u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf;
860 u8 gen_stat1 = cx18_av_read(cx, 0x40d);
861 u8 gen_stat2 = cx18_av_read(cx, 0x40e);
862 int vid_input = state->vid_input;
863
864 CX18_INFO("Video signal: %spresent\n",
865 (gen_stat2 & 0x20) ? "" : "not ");
866 CX18_INFO("Detected format: %s\n",
867 fmt_strs[gen_stat1 & 0xf]);
868
869 CX18_INFO("Specified standard: %s\n",
870 vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
871
872 if (vid_input >= CX18_AV_COMPOSITE1 &&
873 vid_input <= CX18_AV_COMPOSITE8) {
874 CX18_INFO("Specified video input: Composite %d\n",
875 vid_input - CX18_AV_COMPOSITE1 + 1);
876 } else {
877 CX18_INFO("Specified video input: S-Video (Luma In%d, Chroma In%d)\n",
878 (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
879 }
880
881 CX18_INFO("Specified audioclock freq: %d Hz\n", state->audclk_freq);
882}
883
884/* ----------------------------------------------------------------------- */
885
886static void log_audio_status(struct cx18 *cx)
887{
888 struct cx18_av_state *state = &cx->av_state;
889 u8 download_ctl = cx18_av_read(cx, 0x803);
63b8c709
HV		 890 u8 mod_det_stat0 = cx18_av_read(cx, 0x804);
891 u8 mod_det_stat1 = cx18_av_read(cx, 0x805);
1c1e45d1
HV		 892 u8 audio_config = cx18_av_read(cx, 0x808);
893 u8 pref_mode = cx18_av_read(cx, 0x809);
894 u8 afc0 = cx18_av_read(cx, 0x80b);
895 u8 mute_ctl = cx18_av_read(cx, 0x8d3);
896 int aud_input = state->aud_input;
897 char *p;
898
899 switch (mod_det_stat0) {
900 case 0x00: p = "mono"; break;
901 case 0x01: p = "stereo"; break;
902 case 0x02: p = "dual"; break;
903 case 0x04: p = "tri"; break;
904 case 0x10: p = "mono with SAP"; break;
905 case 0x11: p = "stereo with SAP"; break;
906 case 0x12: p = "dual with SAP"; break;
907 case 0x14: p = "tri with SAP"; break;
908 case 0xfe: p = "forced mode"; break;
63b8c709 909 default: p = "not defined"; break;
1c1e45d1
HV		 910 }
911 CX18_INFO("Detected audio mode: %s\n", p);
912
913 switch (mod_det_stat1) {
63b8c709 914 case 0x00: p = "not defined"; break;
1c1e45d1
HV		 915 case 0x01: p = "EIAJ"; break;
916 case 0x02: p = "A2-M"; break;
917 case 0x03: p = "A2-BG"; break;
918 case 0x04: p = "A2-DK1"; break;
919 case 0x05: p = "A2-DK2"; break;
920 case 0x06: p = "A2-DK3"; break;
921 case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
922 case 0x08: p = "AM-L"; break;
923 case 0x09: p = "NICAM-BG"; break;
924 case 0x0a: p = "NICAM-DK"; break;
925 case 0x0b: p = "NICAM-I"; break;
926 case 0x0c: p = "NICAM-L"; break;
927 case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
63b8c709
HV		 928 case 0x0e: p = "IF FM Radio"; break;
929 case 0x0f: p = "BTSC"; break;
930 case 0x10: p = "detected chrominance"; break;
931 case 0xfd: p = "unknown audio standard"; break;
932 case 0xfe: p = "forced audio standard"; break;
1c1e45d1 933 case 0xff: p = "no detected audio standard"; break;
63b8c709 934 default: p = "not defined"; break;
1c1e45d1
HV		 935 }
936 CX18_INFO("Detected audio standard: %s\n", p);
937 CX18_INFO("Audio muted: %s\n",
938 (mute_ctl & 0x2) ? "yes" : "no");
939 CX18_INFO("Audio microcontroller: %s\n",
940 (download_ctl & 0x10) ? "running" : "stopped");
941
942 switch (audio_config >> 4) {
63b8c709
HV		 943 case 0x00: p = "undefined"; break;
944 case 0x01: p = "BTSC"; break;
945 case 0x02: p = "EIAJ"; break;
946 case 0x03: p = "A2-M"; break;
947 case 0x04: p = "A2-BG"; break;
948 case 0x05: p = "A2-DK1"; break;
949 case 0x06: p = "A2-DK2"; break;
950 case 0x07: p = "A2-DK3"; break;
951 case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
952 case 0x09: p = "AM-L"; break;
953 case 0x0a: p = "NICAM-BG"; break;
954 case 0x0b: p = "NICAM-DK"; break;
955 case 0x0c: p = "NICAM-I"; break;
956 case 0x0d: p = "NICAM-L"; break;
957 case 0x0e: p = "FM radio"; break;
1c1e45d1 958 case 0x0f: p = "automatic detection"; break;
63b8c709 959 default: p = "undefined"; break;
1c1e45d1
HV		 960 }
961 CX18_INFO("Configured audio standard: %s\n", p);
962
963 if ((audio_config >> 4) < 0xF) {
964 switch (audio_config & 0xF) {
965 case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
966 case 0x01: p = "MONO2 (LANGUAGE B)"; break;
967 case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
968 case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
969 case 0x04: p = "STEREO"; break;
63b8c709
HV		 970 case 0x05: p = "DUAL1 (AC)"; break;
971 case 0x06: p = "DUAL2 (BC)"; break;
972 case 0x07: p = "DUAL3 (AB)"; break;
1c1e45d1
HV		 973 default: p = "undefined";
974 }
975 CX18_INFO("Configured audio mode: %s\n", p);
976 } else {
977 switch (audio_config & 0xF) {
978 case 0x00: p = "BG"; break;
979 case 0x01: p = "DK1"; break;
980 case 0x02: p = "DK2"; break;
981 case 0x03: p = "DK3"; break;
982 case 0x04: p = "I"; break;
983 case 0x05: p = "L"; break;
984 case 0x06: p = "BTSC"; break;
985 case 0x07: p = "EIAJ"; break;
986 case 0x08: p = "A2-M"; break;
63b8c709
HV		 987 case 0x09: p = "FM Radio (4.5 MHz)"; break;
988 case 0x0a: p = "FM Radio (5.5 MHz)"; break;
989 case 0x0b: p = "S-Video"; break;
1c1e45d1 990 case 0x0f: p = "automatic standard and mode detection"; break;
63b8c709 991 default: p = "undefined"; break;
1c1e45d1
HV		 992 }
993 CX18_INFO("Configured audio system: %s\n", p);
994 }
995
996 if (aud_input)
997 CX18_INFO("Specified audio input: Tuner (In%d)\n",
998 aud_input);
999 else
1000 CX18_INFO("Specified audio input: External\n");
1001
1002 switch (pref_mode & 0xf) {
1003 case 0: p = "mono/language A"; break;
1004 case 1: p = "language B"; break;
1005 case 2: p = "language C"; break;
1006 case 3: p = "analog fallback"; break;
1007 case 4: p = "stereo"; break;
1008 case 5: p = "language AC"; break;
1009 case 6: p = "language BC"; break;
1010 case 7: p = "language AB"; break;
63b8c709 1011 default: p = "undefined"; break;
1c1e45d1
HV		 1012 }
1013 CX18_INFO("Preferred audio mode: %s\n", p);
1014
1015 if ((audio_config & 0xf) == 0xf) {
63b8c709 1016 switch ((afc0 >> 3) & 0x1) {
1c1e45d1
HV		 1017 case 0: p = "system DK"; break;
1018 case 1: p = "system L"; break;
1019 }
1020 CX18_INFO("Selected 65 MHz format: %s\n", p);
1021
63b8c709
HV		 1022 switch (afc0 & 0x7) {
1023 case 0: p = "Chroma"; break;
1024 case 1: p = "BTSC"; break;
1025 case 2: p = "EIAJ"; break;
1026 case 3: p = "A2-M"; break;
1027 case 4: p = "autodetect"; break;
1028 default: p = "undefined"; break;
1c1e45d1
HV		 1029 }
1030 CX18_INFO("Selected 45 MHz format: %s\n", p);
1031 }
1032}
Clone of davem's net-next-2.6 tree