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1da177e4 LT |
1 | /* |
2 | * budget-core.c: driver for the SAA7146 based Budget DVB cards | |
3 | * | |
4 | * Compiled from various sources by Michael Hunold <michael@mihu.de> | |
5 | * | |
6 | * Copyright (C) 2002 Ralph Metzler <rjkm@metzlerbros.de> | |
7 | * | |
8 | * Copyright (C) 1999-2002 Ralph Metzler | |
9 | * & Marcus Metzler for convergence integrated media GmbH | |
10 | * | |
11 | * 26feb2004 Support for FS Activy Card (Grundig tuner) by | |
12 | * Michael Dreher <michael@5dot1.de>, | |
13 | * Oliver Endriss <o.endriss@gmx.de>, | |
14 | * Andreas 'randy' Weinberger | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or | |
17 | * modify it under the terms of the GNU General Public License | |
18 | * as published by the Free Software Foundation; either version 2 | |
19 | * of the License, or (at your option) any later version. | |
20 | * | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * | |
28 | * You should have received a copy of the GNU General Public License | |
29 | * along with this program; if not, write to the Free Software | |
30 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
31 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | |
32 | * | |
33 | * | |
34 | * the project's page is at http://www.linuxtv.org/dvb/ | |
35 | */ | |
36 | ||
37 | #include <linux/moduleparam.h> | |
38 | ||
39 | #include "budget.h" | |
40 | #include "ttpci-eeprom.h" | |
41 | ||
afa47abf IS |
42 | #define TS_WIDTH (2 * TS_SIZE) |
43 | #define TS_WIDTH_ACTIVY TS_SIZE | |
fd9c66e2 | 44 | #define TS_WIDTH_DVBC TS_SIZE |
afa47abf IS |
45 | #define TS_HEIGHT_MASK 0xf00 |
46 | #define TS_HEIGHT_MASK_ACTIVY 0xc00 | |
fd9c66e2 | 47 | #define TS_HEIGHT_MASK_DVBC 0xe00 |
afa47abf IS |
48 | #define TS_MIN_BUFSIZE_K 188 |
49 | #define TS_MAX_BUFSIZE_K 1410 | |
50 | #define TS_MAX_BUFSIZE_K_ACTIVY 564 | |
fd9c66e2 | 51 | #define TS_MAX_BUFSIZE_K_DVBC 1316 |
afa47abf IS |
52 | #define BUFFER_WARNING_WAIT (30*HZ) |
53 | ||
1da177e4 | 54 | int budget_debug; |
afa47abf | 55 | static int dma_buffer_size = TS_MIN_BUFSIZE_K; |
1da177e4 | 56 | module_param_named(debug, budget_debug, int, 0644); |
afa47abf | 57 | module_param_named(bufsize, dma_buffer_size, int, 0444); |
1da177e4 | 58 | MODULE_PARM_DESC(debug, "Turn on/off budget debugging (default:off)."); |
afa47abf | 59 | MODULE_PARM_DESC(bufsize, "DMA buffer size in KB, default: 188, min: 188, max: 1410 (Activy: 564)"); |
1da177e4 LT |
60 | |
61 | /**************************************************************************** | |
62 | * TT budget / WinTV Nova | |
63 | ****************************************************************************/ | |
64 | ||
65 | static int stop_ts_capture(struct budget *budget) | |
66 | { | |
67 | dprintk(2, "budget: %p\n", budget); | |
68 | ||
1da177e4 LT |
69 | saa7146_write(budget->dev, MC1, MASK_20); // DMA3 off |
70 | SAA7146_IER_DISABLE(budget->dev, MASK_10); | |
71 | return 0; | |
72 | } | |
73 | ||
74 | static int start_ts_capture(struct budget *budget) | |
75 | { | |
76 | struct saa7146_dev *dev = budget->dev; | |
77 | ||
78 | dprintk(2, "budget: %p\n", budget); | |
79 | ||
32e4c3a5 OE |
80 | if (!budget->feeding || !budget->fe_synced) |
81 | return 0; | |
1da177e4 LT |
82 | |
83 | saa7146_write(dev, MC1, MASK_20); // DMA3 off | |
84 | ||
afa47abf | 85 | memset(budget->grabbing, 0x00, budget->buffer_size); |
1da177e4 LT |
86 | |
87 | saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000)); | |
88 | ||
1da177e4 LT |
89 | budget->ttbp = 0; |
90 | ||
91 | /* | |
92 | * Signal path on the Activy: | |
93 | * | |
94 | * tuner -> SAA7146 port A -> SAA7146 BRS -> SAA7146 DMA3 -> memory | |
95 | * | |
96 | * Since the tuner feeds 204 bytes packets into the SAA7146, | |
97 | * DMA3 is configured to strip the trailing 16 FEC bytes: | |
98 | * Pitch: 188, NumBytes3: 188, NumLines3: 1024 | |
99 | */ | |
100 | ||
9101e622 | 101 | switch(budget->card->type) { |
1da177e4 LT |
102 | case BUDGET_FS_ACTIVY: |
103 | saa7146_write(dev, DD1_INIT, 0x04000000); | |
104 | saa7146_write(dev, MC2, (MASK_09 | MASK_25)); | |
105 | saa7146_write(dev, BRS_CTRL, 0x00000000); | |
106 | break; | |
107 | case BUDGET_PATCH: | |
108 | saa7146_write(dev, DD1_INIT, 0x00000200); | |
109 | saa7146_write(dev, MC2, (MASK_10 | MASK_26)); | |
110 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
111 | break; | |
aa323ac8 HB |
112 | case BUDGET_CIN1200C_MK3: |
113 | case BUDGET_KNC1C_MK3: | |
114 | case BUDGET_KNC1CP_MK3: | |
115 | if (budget->video_port == BUDGET_VIDEO_PORTA) { | |
116 | saa7146_write(dev, DD1_INIT, 0x06000200); | |
117 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
118 | saa7146_write(dev, BRS_CTRL, 0x00000000); | |
119 | } else { | |
120 | saa7146_write(dev, DD1_INIT, 0x00000600); | |
121 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
122 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
123 | } | |
124 | break; | |
1da177e4 LT |
125 | default: |
126 | if (budget->video_port == BUDGET_VIDEO_PORTA) { | |
127 | saa7146_write(dev, DD1_INIT, 0x06000200); | |
128 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
129 | saa7146_write(dev, BRS_CTRL, 0x00000000); | |
130 | } else { | |
131 | saa7146_write(dev, DD1_INIT, 0x02000600); | |
132 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
133 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
134 | } | |
135 | } | |
136 | ||
137 | saa7146_write(dev, MC2, (MASK_08 | MASK_24)); | |
138 | mdelay(10); | |
139 | ||
140 | saa7146_write(dev, BASE_ODD3, 0); | |
fd9c66e2 HB |
141 | if (budget->buffer_size > budget->buffer_height * budget->buffer_width) { |
142 | // using odd/even buffers | |
143 | saa7146_write(dev, BASE_EVEN3, budget->buffer_height * budget->buffer_width); | |
144 | } else { | |
145 | // using a single buffer | |
146 | saa7146_write(dev, BASE_EVEN3, 0); | |
147 | } | |
afa47abf | 148 | saa7146_write(dev, PROT_ADDR3, budget->buffer_size); |
1da177e4 LT |
149 | saa7146_write(dev, BASE_PAGE3, budget->pt.dma | ME1 | 0x90); |
150 | ||
afa47abf IS |
151 | saa7146_write(dev, PITCH3, budget->buffer_width); |
152 | saa7146_write(dev, NUM_LINE_BYTE3, | |
153 | (budget->buffer_height << 16) | budget->buffer_width); | |
1da177e4 LT |
154 | |
155 | saa7146_write(dev, MC2, (MASK_04 | MASK_20)); | |
156 | ||
157 | SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */ | |
158 | SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */ | |
159 | saa7146_write(dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ | |
160 | ||
32e4c3a5 OE |
161 | return 0; |
162 | } | |
163 | ||
164 | static int budget_read_fe_status(struct dvb_frontend *fe, fe_status_t *status) | |
165 | { | |
166 | struct budget *budget = (struct budget *) fe->dvb->priv; | |
167 | int synced; | |
168 | int ret; | |
169 | ||
170 | if (budget->read_fe_status) | |
171 | ret = budget->read_fe_status(fe, status); | |
172 | else | |
173 | ret = -EINVAL; | |
174 | ||
175 | if (!ret) { | |
176 | synced = (*status & FE_HAS_LOCK); | |
177 | if (synced != budget->fe_synced) { | |
178 | budget->fe_synced = synced; | |
179 | spin_lock(&budget->feedlock); | |
180 | if (synced) | |
181 | start_ts_capture(budget); | |
182 | else | |
183 | stop_ts_capture(budget); | |
184 | spin_unlock(&budget->feedlock); | |
185 | } | |
186 | } | |
187 | return ret; | |
1da177e4 LT |
188 | } |
189 | ||
190 | static void vpeirq(unsigned long data) | |
191 | { | |
192 | struct budget *budget = (struct budget *) data; | |
193 | u8 *mem = (u8 *) (budget->grabbing); | |
194 | u32 olddma = budget->ttbp; | |
195 | u32 newdma = saa7146_read(budget->dev, PCI_VDP3); | |
afa47abf | 196 | u32 count; |
1da177e4 LT |
197 | |
198 | /* nearest lower position divisible by 188 */ | |
199 | newdma -= newdma % 188; | |
200 | ||
afa47abf | 201 | if (newdma >= budget->buffer_size) |
1da177e4 LT |
202 | return; |
203 | ||
204 | budget->ttbp = newdma; | |
205 | ||
206 | if (budget->feeding == 0 || newdma == olddma) | |
207 | return; | |
208 | ||
209 | if (newdma > olddma) { /* no wraparound, dump olddma..newdma */ | |
afa47abf IS |
210 | count = newdma - olddma; |
211 | dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188); | |
1da177e4 | 212 | } else { /* wraparound, dump olddma..buflen and 0..newdma */ |
afa47abf IS |
213 | count = budget->buffer_size - olddma; |
214 | dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188); | |
215 | count += newdma; | |
1da177e4 LT |
216 | dvb_dmx_swfilter_packets(&budget->demux, mem, newdma / 188); |
217 | } | |
afa47abf IS |
218 | |
219 | if (count > budget->buffer_warning_threshold) | |
220 | budget->buffer_warnings++; | |
221 | ||
222 | if (budget->buffer_warnings && time_after(jiffies, budget->buffer_warning_time)) { | |
223 | printk("%s %s: used %d times >80%% of buffer (%u bytes now)\n", | |
224 | budget->dev->name, __FUNCTION__, budget->buffer_warnings, count); | |
225 | budget->buffer_warning_time = jiffies + BUFFER_WARNING_WAIT; | |
226 | budget->buffer_warnings = 0; | |
227 | } | |
1da177e4 LT |
228 | } |
229 | ||
230 | ||
231 | int ttpci_budget_debiread(struct budget *budget, u32 config, int addr, int count, | |
232 | int uselocks, int nobusyloop) | |
233 | { | |
234 | struct saa7146_dev *saa = budget->dev; | |
235 | int result = 0; | |
236 | unsigned long flags = 0; | |
237 | ||
238 | if (count > 4 || count <= 0) | |
239 | return 0; | |
240 | ||
241 | if (uselocks) | |
242 | spin_lock_irqsave(&budget->debilock, flags); | |
243 | ||
244 | if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) { | |
245 | if (uselocks) | |
246 | spin_unlock_irqrestore(&budget->debilock, flags); | |
247 | return result; | |
248 | } | |
249 | ||
250 | saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x10000 | (addr & 0xffff)); | |
251 | saa7146_write(saa, DEBI_CONFIG, config); | |
252 | saa7146_write(saa, DEBI_PAGE, 0); | |
253 | saa7146_write(saa, MC2, (2 << 16) | 2); | |
254 | ||
255 | if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) { | |
256 | if (uselocks) | |
257 | spin_unlock_irqrestore(&budget->debilock, flags); | |
258 | return result; | |
259 | } | |
260 | ||
261 | result = saa7146_read(saa, DEBI_AD); | |
262 | result &= (0xffffffffUL >> ((4 - count) * 8)); | |
263 | ||
264 | if (uselocks) | |
265 | spin_unlock_irqrestore(&budget->debilock, flags); | |
266 | ||
267 | return result; | |
268 | } | |
269 | ||
270 | int ttpci_budget_debiwrite(struct budget *budget, u32 config, int addr, | |
271 | int count, u32 value, int uselocks, int nobusyloop) | |
272 | { | |
273 | struct saa7146_dev *saa = budget->dev; | |
274 | unsigned long flags = 0; | |
275 | int result; | |
276 | ||
277 | if (count > 4 || count <= 0) | |
278 | return 0; | |
279 | ||
280 | if (uselocks) | |
281 | spin_lock_irqsave(&budget->debilock, flags); | |
282 | ||
283 | if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) { | |
284 | if (uselocks) | |
285 | spin_unlock_irqrestore(&budget->debilock, flags); | |
286 | return result; | |
287 | } | |
288 | ||
289 | saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x00000 | (addr & 0xffff)); | |
290 | saa7146_write(saa, DEBI_CONFIG, config); | |
291 | saa7146_write(saa, DEBI_PAGE, 0); | |
292 | saa7146_write(saa, DEBI_AD, value); | |
293 | saa7146_write(saa, MC2, (2 << 16) | 2); | |
294 | ||
295 | if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) { | |
296 | if (uselocks) | |
297 | spin_unlock_irqrestore(&budget->debilock, flags); | |
298 | return result; | |
299 | } | |
300 | ||
301 | if (uselocks) | |
302 | spin_unlock_irqrestore(&budget->debilock, flags); | |
303 | return 0; | |
304 | } | |
305 | ||
306 | ||
307 | /**************************************************************************** | |
308 | * DVB API SECTION | |
309 | ****************************************************************************/ | |
310 | ||
311 | static int budget_start_feed(struct dvb_demux_feed *feed) | |
312 | { | |
313 | struct dvb_demux *demux = feed->demux; | |
314 | struct budget *budget = (struct budget *) demux->priv; | |
32e4c3a5 | 315 | int status = 0; |
1da177e4 LT |
316 | |
317 | dprintk(2, "budget: %p\n", budget); | |
318 | ||
319 | if (!demux->dmx.frontend) | |
320 | return -EINVAL; | |
321 | ||
322 | spin_lock(&budget->feedlock); | |
323 | feed->pusi_seen = 0; /* have a clean section start */ | |
32e4c3a5 OE |
324 | if (budget->feeding++ == 0) |
325 | status = start_ts_capture(budget); | |
1da177e4 LT |
326 | spin_unlock(&budget->feedlock); |
327 | return status; | |
328 | } | |
329 | ||
330 | static int budget_stop_feed(struct dvb_demux_feed *feed) | |
331 | { | |
332 | struct dvb_demux *demux = feed->demux; | |
333 | struct budget *budget = (struct budget *) demux->priv; | |
32e4c3a5 | 334 | int status = 0; |
1da177e4 LT |
335 | |
336 | dprintk(2, "budget: %p\n", budget); | |
337 | ||
338 | spin_lock(&budget->feedlock); | |
32e4c3a5 OE |
339 | if (--budget->feeding == 0) |
340 | status = stop_ts_capture(budget); | |
1da177e4 LT |
341 | spin_unlock(&budget->feedlock); |
342 | return status; | |
343 | } | |
344 | ||
345 | static int budget_register(struct budget *budget) | |
346 | { | |
347 | struct dvb_demux *dvbdemux = &budget->demux; | |
348 | int ret; | |
349 | ||
350 | dprintk(2, "budget: %p\n", budget); | |
351 | ||
352 | dvbdemux->priv = (void *) budget; | |
353 | ||
354 | dvbdemux->filternum = 256; | |
355 | dvbdemux->feednum = 256; | |
356 | dvbdemux->start_feed = budget_start_feed; | |
357 | dvbdemux->stop_feed = budget_stop_feed; | |
358 | dvbdemux->write_to_decoder = NULL; | |
359 | ||
360 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING | | |
361 | DMX_MEMORY_BASED_FILTERING); | |
362 | ||
363 | dvb_dmx_init(&budget->demux); | |
364 | ||
365 | budget->dmxdev.filternum = 256; | |
366 | budget->dmxdev.demux = &dvbdemux->dmx; | |
367 | budget->dmxdev.capabilities = 0; | |
368 | ||
fdc53a6d | 369 | dvb_dmxdev_init(&budget->dmxdev, &budget->dvb_adapter); |
1da177e4 LT |
370 | |
371 | budget->hw_frontend.source = DMX_FRONTEND_0; | |
372 | ||
373 | ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &budget->hw_frontend); | |
374 | ||
375 | if (ret < 0) | |
376 | return ret; | |
377 | ||
378 | budget->mem_frontend.source = DMX_MEMORY_FE; | |
379 | ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &budget->mem_frontend); | |
380 | if (ret < 0) | |
381 | return ret; | |
382 | ||
383 | ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &budget->hw_frontend); | |
384 | if (ret < 0) | |
385 | return ret; | |
386 | ||
fdc53a6d | 387 | dvb_net_init(&budget->dvb_adapter, &budget->dvb_net, &dvbdemux->dmx); |
1da177e4 LT |
388 | |
389 | return 0; | |
390 | } | |
391 | ||
392 | static void budget_unregister(struct budget *budget) | |
393 | { | |
394 | struct dvb_demux *dvbdemux = &budget->demux; | |
395 | ||
396 | dprintk(2, "budget: %p\n", budget); | |
397 | ||
398 | dvb_net_release(&budget->dvb_net); | |
399 | ||
400 | dvbdemux->dmx.close(&dvbdemux->dmx); | |
401 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &budget->hw_frontend); | |
402 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &budget->mem_frontend); | |
403 | ||
404 | dvb_dmxdev_release(&budget->dmxdev); | |
405 | dvb_dmx_release(&budget->demux); | |
406 | } | |
407 | ||
408 | int ttpci_budget_init(struct budget *budget, struct saa7146_dev *dev, | |
409 | struct saa7146_pci_extension_data *info, | |
410 | struct module *owner) | |
411 | { | |
1da177e4 LT |
412 | int ret = 0; |
413 | struct budget_info *bi = info->ext_priv; | |
afa47abf IS |
414 | int max_bufsize; |
415 | int height_mask; | |
1da177e4 LT |
416 | |
417 | memset(budget, 0, sizeof(struct budget)); | |
418 | ||
419 | dprintk(2, "dev: %p, budget: %p\n", dev, budget); | |
420 | ||
421 | budget->card = bi; | |
422 | budget->dev = (struct saa7146_dev *) dev; | |
423 | ||
fd9c66e2 HB |
424 | switch(budget->card->type) { |
425 | case BUDGET_FS_ACTIVY: | |
afa47abf IS |
426 | budget->buffer_width = TS_WIDTH_ACTIVY; |
427 | max_bufsize = TS_MAX_BUFSIZE_K_ACTIVY; | |
428 | height_mask = TS_HEIGHT_MASK_ACTIVY; | |
fd9c66e2 HB |
429 | break; |
430 | ||
431 | case BUDGET_KNC1C: | |
432 | case BUDGET_KNC1CP: | |
433 | case BUDGET_CIN1200C: | |
aa323ac8 HB |
434 | case BUDGET_KNC1C_MK3: |
435 | case BUDGET_KNC1CP_MK3: | |
436 | case BUDGET_CIN1200C_MK3: | |
fd9c66e2 HB |
437 | budget->buffer_width = TS_WIDTH_DVBC; |
438 | max_bufsize = TS_MAX_BUFSIZE_K_DVBC; | |
439 | height_mask = TS_HEIGHT_MASK_DVBC; | |
440 | break; | |
441 | ||
442 | default: | |
afa47abf IS |
443 | budget->buffer_width = TS_WIDTH; |
444 | max_bufsize = TS_MAX_BUFSIZE_K; | |
445 | height_mask = TS_HEIGHT_MASK; | |
446 | } | |
447 | ||
448 | if (dma_buffer_size < TS_MIN_BUFSIZE_K) | |
449 | dma_buffer_size = TS_MIN_BUFSIZE_K; | |
450 | else if (dma_buffer_size > max_bufsize) | |
451 | dma_buffer_size = max_bufsize; | |
452 | ||
453 | budget->buffer_height = dma_buffer_size * 1024 / budget->buffer_width; | |
fd9c66e2 HB |
454 | if (budget->buffer_height > 0xfff) { |
455 | budget->buffer_height /= 2; | |
456 | budget->buffer_height &= height_mask; | |
457 | budget->buffer_size = 2 * budget->buffer_height * budget->buffer_width; | |
458 | } else { | |
459 | budget->buffer_height &= height_mask; | |
460 | budget->buffer_size = budget->buffer_height * budget->buffer_width; | |
461 | } | |
afa47abf IS |
462 | budget->buffer_warning_threshold = budget->buffer_size * 80/100; |
463 | budget->buffer_warnings = 0; | |
464 | budget->buffer_warning_time = jiffies; | |
465 | ||
fd9c66e2 HB |
466 | dprintk(2, "%s: buffer type = %s, width = %d, height = %d\n", |
467 | budget->dev->name, | |
468 | budget->buffer_size > budget->buffer_width * budget->buffer_height ? "odd/even" : "single", | |
469 | budget->buffer_width, budget->buffer_height); | |
afa47abf IS |
470 | printk("%s: dma buffer size %u\n", budget->dev->name, budget->buffer_size); |
471 | ||
d09dbf92 | 472 | if ((ret = dvb_register_adapter(&budget->dvb_adapter, budget->card->name, owner, &budget->dev->pci->dev)) < 0) { |
dcdda65f AQ |
473 | return ret; |
474 | } | |
1da177e4 LT |
475 | |
476 | /* set dd1 stream a & b */ | |
477 | saa7146_write(dev, DD1_STREAM_B, 0x00000000); | |
478 | saa7146_write(dev, MC2, (MASK_09 | MASK_25)); | |
479 | saa7146_write(dev, MC2, (MASK_10 | MASK_26)); | |
480 | saa7146_write(dev, DD1_INIT, 0x02000000); | |
481 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
482 | ||
483 | if (bi->type != BUDGET_FS_ACTIVY) | |
484 | budget->video_port = BUDGET_VIDEO_PORTB; | |
485 | else | |
486 | budget->video_port = BUDGET_VIDEO_PORTA; | |
487 | spin_lock_init(&budget->feedlock); | |
488 | spin_lock_init(&budget->debilock); | |
489 | ||
490 | /* the Siemens DVB needs this if you want to have the i2c chips | |
491 | get recognized before the main driver is loaded */ | |
492 | if (bi->type != BUDGET_FS_ACTIVY) | |
493 | saa7146_write(dev, GPIO_CTRL, 0x500000); /* GPIO 3 = 1 */ | |
494 | ||
495 | #ifdef I2C_ADAP_CLASS_TV_DIGITAL | |
496 | budget->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL; | |
497 | #else | |
498 | budget->i2c_adap.class = I2C_CLASS_TV_DIGITAL; | |
499 | #endif | |
500 | ||
501 | strlcpy(budget->i2c_adap.name, budget->card->name, sizeof(budget->i2c_adap.name)); | |
502 | ||
503 | saa7146_i2c_adapter_prepare(dev, &budget->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); | |
504 | strcpy(budget->i2c_adap.name, budget->card->name); | |
505 | ||
506 | if (i2c_add_adapter(&budget->i2c_adap) < 0) { | |
fdc53a6d | 507 | dvb_unregister_adapter(&budget->dvb_adapter); |
1da177e4 LT |
508 | return -ENOMEM; |
509 | } | |
510 | ||
fdc53a6d | 511 | ttpci_eeprom_parse_mac(&budget->i2c_adap, budget->dvb_adapter.proposed_mac); |
1da177e4 LT |
512 | |
513 | if (NULL == | |
afa47abf | 514 | (budget->grabbing = saa7146_vmalloc_build_pgtable(dev->pci, budget->buffer_size, &budget->pt))) { |
1da177e4 LT |
515 | ret = -ENOMEM; |
516 | goto err; | |
517 | } | |
518 | ||
519 | saa7146_write(dev, PCI_BT_V1, 0x001c0000); | |
520 | /* upload all */ | |
521 | saa7146_write(dev, GPIO_CTRL, 0x000000); | |
522 | ||
523 | tasklet_init(&budget->vpe_tasklet, vpeirq, (unsigned long) budget); | |
524 | ||
525 | /* frontend power on */ | |
f49cc15b | 526 | if (bi->type != BUDGET_FS_ACTIVY) |
1da177e4 LT |
527 | saa7146_setgpio(dev, 2, SAA7146_GPIO_OUTHI); |
528 | ||
529 | if (budget_register(budget) == 0) { | |
530 | return 0; | |
531 | } | |
532 | err: | |
533 | i2c_del_adapter(&budget->i2c_adap); | |
534 | ||
535 | vfree(budget->grabbing); | |
536 | ||
fdc53a6d | 537 | dvb_unregister_adapter(&budget->dvb_adapter); |
1da177e4 LT |
538 | |
539 | return ret; | |
540 | } | |
541 | ||
32e4c3a5 OE |
542 | void ttpci_budget_init_hooks(struct budget *budget) |
543 | { | |
544 | if (budget->dvb_frontend && !budget->read_fe_status) { | |
545 | budget->read_fe_status = budget->dvb_frontend->ops.read_status; | |
546 | budget->dvb_frontend->ops.read_status = budget_read_fe_status; | |
547 | } | |
548 | } | |
549 | ||
1da177e4 LT |
550 | int ttpci_budget_deinit(struct budget *budget) |
551 | { | |
552 | struct saa7146_dev *dev = budget->dev; | |
553 | ||
554 | dprintk(2, "budget: %p\n", budget); | |
555 | ||
556 | budget_unregister(budget); | |
557 | ||
558 | i2c_del_adapter(&budget->i2c_adap); | |
559 | ||
fdc53a6d | 560 | dvb_unregister_adapter(&budget->dvb_adapter); |
1da177e4 LT |
561 | |
562 | tasklet_kill(&budget->vpe_tasklet); | |
563 | ||
564 | saa7146_pgtable_free(dev->pci, &budget->pt); | |
565 | ||
566 | vfree(budget->grabbing); | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
571 | void ttpci_budget_irq10_handler(struct saa7146_dev *dev, u32 * isr) | |
572 | { | |
573 | struct budget *budget = (struct budget *) dev->ext_priv; | |
574 | ||
575 | dprintk(8, "dev: %p, budget: %p\n", dev, budget); | |
576 | ||
577 | if (*isr & MASK_10) | |
578 | tasklet_schedule(&budget->vpe_tasklet); | |
579 | } | |
580 | ||
581 | void ttpci_budget_set_video_port(struct saa7146_dev *dev, int video_port) | |
582 | { | |
583 | struct budget *budget = (struct budget *) dev->ext_priv; | |
584 | ||
585 | spin_lock(&budget->feedlock); | |
586 | budget->video_port = video_port; | |
587 | if (budget->feeding) { | |
1da177e4 LT |
588 | stop_ts_capture(budget); |
589 | start_ts_capture(budget); | |
1da177e4 LT |
590 | } |
591 | spin_unlock(&budget->feedlock); | |
592 | } | |
593 | ||
594 | EXPORT_SYMBOL_GPL(ttpci_budget_debiread); | |
595 | EXPORT_SYMBOL_GPL(ttpci_budget_debiwrite); | |
596 | EXPORT_SYMBOL_GPL(ttpci_budget_init); | |
32e4c3a5 | 597 | EXPORT_SYMBOL_GPL(ttpci_budget_init_hooks); |
1da177e4 LT |
598 | EXPORT_SYMBOL_GPL(ttpci_budget_deinit); |
599 | EXPORT_SYMBOL_GPL(ttpci_budget_irq10_handler); | |
600 | EXPORT_SYMBOL_GPL(ttpci_budget_set_video_port); | |
601 | EXPORT_SYMBOL_GPL(budget_debug); | |
602 | ||
603 | MODULE_LICENSE("GPL"); |