[net-next-2.6.git] / drivers / media / dvb / frontends / tda10021.c

/*
    TDA10021  - Single Chip Cable Channel Receiver driver module
	       used on the Siemens DVB-C cards

    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
    Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
		   Support for TDA10021

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>

#include "dvb_frontend.h"
#include "tda1002x.h"


struct tda10021_state {
	struct i2c_adapter* i2c;
	/* configuration settings */
	const struct tda1002x_config* config;
	struct dvb_frontend frontend;

	u8 pwm;
	u8 reg0;
};


#if 0
#define dprintk(x...) printk(x)
#else
#define dprintk(x...)
#endif

static int verbose;

#define XIN 57840000UL

#define FIN (XIN >> 4)

static int tda10021_inittab_size = 0x40;
static u8 tda10021_inittab[0x40]=
{
	0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
	0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
	0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
	0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
	0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
	0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
	0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
	0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
};

static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	int ret;

	ret = i2c_transfer (state->i2c, &msg, 1);
	if (ret != 1)
		printk("DVB: TDA10021(%d): %s, writereg error "
			"(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
			state->frontend.dvb->num, __FUNCTION__, reg, data, ret);

	msleep(10);
	return (ret != 1) ? -EREMOTEIO : 0;
}

static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
{
	u8 b0 [] = { reg };
	u8 b1 [] = { 0 };
	struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
				  { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
	int ret;

	ret = i2c_transfer (state->i2c, msg, 2);
	// Don't print an error message if the id is read.
	if (ret != 2 && reg != 0x1a)
		printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
				__FUNCTION__, ret);
	return b1[0];
}

//get access to tuner
static int lock_tuner(struct tda10021_state* state)
{
	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
	struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};

	if(i2c_transfer(state->i2c, &msg, 1) != 1)
	{
		printk("tda10021: lock tuner fails\n");
		return -EREMOTEIO;
	}
	return 0;
}

//release access from tuner
static int unlock_tuner(struct tda10021_state* state)
{
	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
	struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};

	if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
	{
		printk("tda10021: unlock tuner fails\n");
		return -EREMOTEIO;
	}
	return 0;
}

static int tda10021_setup_reg0 (struct tda10021_state* state, u8 reg0,
				fe_spectral_inversion_t inversion)
{
	reg0 |= state->reg0 & 0x63;

	if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
		reg0 &= ~0x20;
	else
		reg0 |= 0x20;

	_tda10021_writereg (state, 0x00, reg0 & 0xfe);
	_tda10021_writereg (state, 0x00, reg0 | 0x01);

	state->reg0 = reg0;
	return 0;
}

static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
{
	s32 BDR;
	s32 BDRI;
	s16 SFIL=0;
	u16 NDEC = 0;
	u32 tmp, ratio;

	if (symbolrate > XIN/2)
		symbolrate = XIN/2;
	if (symbolrate < 500000)
		symbolrate = 500000;

	if (symbolrate < XIN/16) NDEC = 1;
	if (symbolrate < XIN/32) NDEC = 2;
	if (symbolrate < XIN/64) NDEC = 3;

	if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
	if (symbolrate < (u32)(XIN/16))	 SFIL = 0;
	if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
	if (symbolrate < (u32)(XIN/32))	 SFIL = 0;
	if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
	if (symbolrate < (u32)(XIN/64))	 SFIL = 0;
	if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;

	symbolrate <<= NDEC;
	ratio = (symbolrate << 4) / FIN;
	tmp =  ((symbolrate << 4) % FIN) << 8;
	ratio = (ratio << 8) + tmp / FIN;
	tmp = (tmp % FIN) << 8;
	ratio = (ratio << 8) + (tmp + FIN/2) / FIN;

	BDR = ratio;
	BDRI = (((XIN << 5) / symbolrate) + 1) / 2;

	if (BDRI > 0xFF)
		BDRI = 0xFF;

	SFIL = (SFIL << 4) | tda10021_inittab[0x0E];

	NDEC = (NDEC << 6) | tda10021_inittab[0x03];

	_tda10021_writereg (state, 0x03, NDEC);
	_tda10021_writereg (state, 0x0a, BDR&0xff);
	_tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
	_tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);

	_tda10021_writereg (state, 0x0d, BDRI);
	_tda10021_writereg (state, 0x0e, SFIL);

	return 0;
}

static int tda10021_init (struct dvb_frontend *fe)
{
	struct tda10021_state* state = fe->demodulator_priv;
	int i;

	dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);

	//_tda10021_writereg (fe, 0, 0);

	for (i=0; i<tda10021_inittab_size; i++)
		_tda10021_writereg (state, i, tda10021_inittab[i]);

	_tda10021_writereg (state, 0x34, state->pwm);

	//Comment by markus
	//0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
	//0x2A[4] == BYPPLL -> Power down mode (default 1)
	//0x2A[5] == LCK -> PLL Lock Flag
	//0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)

	//Activate PLL
	_tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
	return 0;
}

static int tda10021_set_parameters (struct dvb_frontend *fe,
			    struct dvb_frontend_parameters *p)
{
	struct tda10021_state* state = fe->demodulator_priv;

	//table for QAM4-QAM256 ready  QAM4  QAM16 QAM32 QAM64 QAM128 QAM256
	//CONF
	static const u8 reg0x00 [] = { 0x14, 0x00, 0x04, 0x08, 0x0c,  0x10 };
	//AGCREF value
	static const u8 reg0x01 [] = { 0x78, 0x8c, 0x8c, 0x6a, 0x78,  0x5c };
	//LTHR value
	static const u8 reg0x05 [] = { 0x78, 0x87, 0x64, 0x46, 0x36,  0x26 };
	//MSETH
	static const u8 reg0x08 [] = { 0x8c, 0xa2, 0x74, 0x43, 0x34,  0x23 };
	//AREF
	static const u8 reg0x09 [] = { 0x96, 0x91, 0x96, 0x6a, 0x7e,  0x6b };

	int qam = p->u.qam.modulation;

	if (qam < 0 || qam > 5)
		return -EINVAL;

	if (p->inversion != INVERSION_ON && p->inversion != INVERSION_OFF)
		return -EINVAL;

	//printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->u.qam.symbol_rate);

	if (fe->ops.tuner_ops.set_params) {
		fe->ops.tuner_ops.set_params(fe, p);
		if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
	}

	tda10021_set_symbolrate (state, p->u.qam.symbol_rate);
	_tda10021_writereg (state, 0x34, state->pwm);

	_tda10021_writereg (state, 0x01, reg0x01[qam]);
	_tda10021_writereg (state, 0x05, reg0x05[qam]);
	_tda10021_writereg (state, 0x08, reg0x08[qam]);
	_tda10021_writereg (state, 0x09, reg0x09[qam]);

	tda10021_setup_reg0 (state, reg0x00[qam], p->inversion);

	return 0;
}

static int tda10021_read_status(struct dvb_frontend* fe, fe_status_t* status)
{
	struct tda10021_state* state = fe->demodulator_priv;
	int sync;

	*status = 0;
	//0x11[0] == EQALGO -> Equalizer algorithms state
	//0x11[1] == CARLOCK -> Carrier locked
	//0x11[2] == FSYNC -> Frame synchronisation
	//0x11[3] == FEL -> Front End locked
	//0x11[6] == NODVB -> DVB Mode Information
	sync = tda10021_readreg (state, 0x11);

	if (sync & 2)
		*status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;

	if (sync & 4)
		*status |= FE_HAS_SYNC|FE_HAS_VITERBI;

	if (sync & 8)
		*status |= FE_HAS_LOCK;

	return 0;
}

static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
{
	struct tda10021_state* state = fe->demodulator_priv;

	u32 _ber = tda10021_readreg(state, 0x14) |
		(tda10021_readreg(state, 0x15) << 8) |
		((tda10021_readreg(state, 0x16) & 0x0f) << 16);
	*ber = 10 * _ber;

	return 0;
}

static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
	struct tda10021_state* state = fe->demodulator_priv;

	u8 gain = tda10021_readreg(state, 0x17);
	*strength = (gain << 8) | gain;

	return 0;
}

static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
{
	struct tda10021_state* state = fe->demodulator_priv;

	u8 quality = ~tda10021_readreg(state, 0x18);
	*snr = (quality << 8) | quality;

	return 0;
}

static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
{
	struct tda10021_state* state = fe->demodulator_priv;

	*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
	if (*ucblocks == 0x7f)
		*ucblocks = 0xffffffff;

	/* reset uncorrected block counter */
	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);

	return 0;
}

static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
{
	struct tda10021_state* state = fe->demodulator_priv;
	int sync;
	s8 afc = 0;

	sync = tda10021_readreg(state, 0x11);
	afc = tda10021_readreg(state, 0x19);
	if (verbose) {
		/* AFC only valid when carrier has been recovered */
		printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
				  "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
			state->frontend.dvb->num, afc,
		       -((s32)p->u.qam.symbol_rate * afc) >> 10);
	}

	p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
	p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;

	p->u.qam.fec_inner = FEC_NONE;
	p->frequency = ((p->frequency + 31250) / 62500) * 62500;

	if (sync & 2)
		p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;

	return 0;
}

static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
{
	struct tda10021_state* state = fe->demodulator_priv;

	if (enable) {
		lock_tuner(state);
	} else {
		unlock_tuner(state);
	}
	return 0;
}

static int tda10021_sleep(struct dvb_frontend* fe)
{
	struct tda10021_state* state = fe->demodulator_priv;

	_tda10021_writereg (state, 0x1b, 0x02);  /* pdown ADC */
	_tda10021_writereg (state, 0x00, 0x80);  /* standby */

	return 0;
}

static void tda10021_release(struct dvb_frontend* fe)
{
	struct tda10021_state* state = fe->demodulator_priv;
	kfree(state);
}

static struct dvb_frontend_ops tda10021_ops;

struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
				     struct i2c_adapter* i2c,
				     u8 pwm)
{
	struct tda10021_state* state = NULL;
	u8 id;

	/* allocate memory for the internal state */
	state = kmalloc(sizeof(struct tda10021_state), GFP_KERNEL);
	if (state == NULL) goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;
	state->pwm = pwm;
	state->reg0 = tda10021_inittab[0];

	/* check if the demod is there */
	id = tda10021_readreg(state, 0x1a);
	if ((id & 0xf0) != 0x70) goto error;

	printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
	       state->config->demod_address, id);

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}

static struct dvb_frontend_ops tda10021_ops = {

	.info = {
		.name = "Philips TDA10021 DVB-C",
		.type = FE_QAM,
		.frequency_stepsize = 62500,
		.frequency_min = 51000000,
		.frequency_max = 858000000,
		.symbol_rate_min = (XIN/2)/64,     /* SACLK/64 == (XIN/2)/64 */
		.symbol_rate_max = (XIN/2)/4,      /* SACLK/4 */
	#if 0
		.frequency_tolerance = ???,
		.symbol_rate_tolerance = ???,  /* ppm */  /* == 8% (spec p. 5) */
	#endif
		.caps = 0x400 | //FE_CAN_QAM_4
			FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
			FE_CAN_QAM_128 | FE_CAN_QAM_256 |
			FE_CAN_FEC_AUTO
	},

	.release = tda10021_release,

	.init = tda10021_init,
	.sleep = tda10021_sleep,
	.i2c_gate_ctrl = tda10021_i2c_gate_ctrl,

	.set_frontend = tda10021_set_parameters,
	.get_frontend = tda10021_get_frontend,

	.read_status = tda10021_read_status,
	.read_ber = tda10021_read_ber,
	.read_signal_strength = tda10021_read_signal_strength,
	.read_snr = tda10021_read_snr,
	.read_ucblocks = tda10021_read_ucblocks,
};

module_param(verbose, int, 0644);
MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");

MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(tda10021_attach);
Commit	Line	Data
1da177e4 LT	1	/*
1da177e4 LT	2	TDA10021 - Single Chip Cable Channel Receiver driver module
59c51591	3	used on the Siemens DVB-C cards
1da177e4 LT	4
	5	Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
	6	Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
9101e622	7	Support for TDA10021
1da177e4 LT	8
	9	This program is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
	11	the Free Software Foundation; either version 2 of the License, or
	12	(at your option) any later version.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
	20	along with this program; if not, write to the Free Software
	21	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	22	*/
	23
1da177e4 LT	24	#include <linux/delay.h>
	25	#include <linux/errno.h>
	26	#include <linux/init.h>
	27	#include <linux/kernel.h>
	28	#include <linux/module.h>
	29	#include <linux/string.h>
	30	#include <linux/slab.h>
	31
	32	#include "dvb_frontend.h"
aa323ac8	33	#include "tda1002x.h"
1da177e4 LT	34
	35
	36	struct tda10021_state {
	37	struct i2c_adapter* i2c;
1da177e4	38	/* configuration settings */
aa323ac8	39	const struct tda1002x_config* config;
1da177e4 LT	40	struct dvb_frontend frontend;
	41
	42	u8 pwm;
	43	u8 reg0;
	44	};
	45
	46
	47	#if 0
	48	#define dprintk(x...) printk(x)
	49	#else
	50	#define dprintk(x...)
	51	#endif
	52
	53	static int verbose;
	54
	55	#define XIN 57840000UL
1da177e4 LT	56
	57	#define FIN (XIN >> 4)
	58
	59	static int tda10021_inittab_size = 0x40;
	60	static u8 tda10021_inittab[0x40]=
	61	{
	62	0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
	63	0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
fd9c66e2	64	0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
1da177e4 LT	65	0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
	66	0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
	67	0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
	68	0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
	69	0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
	70	};
	71
c10d14d6	72	static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
1da177e4	73	{
9101e622	74	u8 buf[] = { reg, data };
1da177e4	75	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
9101e622	76	int ret;
1da177e4 LT	77
	78	ret = i2c_transfer (state->i2c, &msg, 1);
	79	if (ret != 1)
	80	printk("DVB: TDA10021(%d): %s, writereg error "
	81	"(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
	82	state->frontend.dvb->num, __FUNCTION__, reg, data, ret);
	83
	84	msleep(10);
	85	return (ret != 1) ? -EREMOTEIO : 0;
	86	}
	87
	88	static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
	89	{
	90	u8 b0 [] = { reg };
	91	u8 b1 [] = { 0 };
	92	struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
50c25fff	93	{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
1da177e4 LT	94	int ret;
	95
	96	ret = i2c_transfer (state->i2c, msg, 2);
dc120b07 HB	97	// Don't print an error message if the id is read.
dc120b07 HB	98	if (ret != 2 && reg != 0x1a)
88bdcc5d JB	99	printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
88bdcc5d JB	100	__FUNCTION__, ret);
1da177e4 LT	101	return b1[0];
	102	}
	103
	104	//get access to tuner
	105	static int lock_tuner(struct tda10021_state* state)
	106	{
	107	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] \| 0x80 };
	108	struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
	109
	110	if(i2c_transfer(state->i2c, &msg, 1) != 1)
	111	{
	112	printk("tda10021: lock tuner fails\n");
	113	return -EREMOTEIO;
	114	}
	115	return 0;
	116	}
	117
	118	//release access from tuner
	119	static int unlock_tuner(struct tda10021_state* state)
	120	{
	121	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
	122	struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
	123
	124	if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
	125	{
	126	printk("tda10021: unlock tuner fails\n");
	127	return -EREMOTEIO;
	128	}
	129	return 0;
	130	}
	131
	132	static int tda10021_setup_reg0 (struct tda10021_state* state, u8 reg0,
	133	fe_spectral_inversion_t inversion)
	134	{
	135	reg0 \|= state->reg0 & 0x63;
	136
dc120b07 HB	137	if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
	138	reg0 &= ~0x20;
	139	else
	140	reg0 \|= 0x20;
1da177e4	141
c10d14d6 AQ	142	_tda10021_writereg (state, 0x00, reg0 & 0xfe);
c10d14d6 AQ	143	_tda10021_writereg (state, 0x00, reg0 \| 0x01);
1da177e4 LT	144
	145	state->reg0 = reg0;
	146	return 0;
	147	}
	148
	149	static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
	150	{
	151	s32 BDR;
	152	s32 BDRI;
	153	s16 SFIL=0;
	154	u16 NDEC = 0;
	155	u32 tmp, ratio;
	156
	157	if (symbolrate > XIN/2)
	158	symbolrate = XIN/2;
	159	if (symbolrate < 500000)
	160	symbolrate = 500000;
	161
	162	if (symbolrate < XIN/16) NDEC = 1;
	163	if (symbolrate < XIN/32) NDEC = 2;
	164	if (symbolrate < XIN/64) NDEC = 3;
	165
	166	if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
	167	if (symbolrate < (u32)(XIN/16)) SFIL = 0;
	168	if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
	169	if (symbolrate < (u32)(XIN/32)) SFIL = 0;
	170	if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
	171	if (symbolrate < (u32)(XIN/64)) SFIL = 0;
	172	if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
	173
	174	symbolrate <<= NDEC;
	175	ratio = (symbolrate << 4) / FIN;
	176	tmp = ((symbolrate << 4) % FIN) << 8;
	177	ratio = (ratio << 8) + tmp / FIN;
	178	tmp = (tmp % FIN) << 8;
	179	ratio = (ratio << 8) + (tmp + FIN/2) / FIN;
	180
	181	BDR = ratio;
	182	BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
	183
	184	if (BDRI > 0xFF)
	185	BDRI = 0xFF;
	186
	187	SFIL = (SFIL << 4) \| tda10021_inittab[0x0E];
	188
	189	NDEC = (NDEC << 6) \| tda10021_inittab[0x03];
	190
c10d14d6 AQ	191	_tda10021_writereg (state, 0x03, NDEC);
	192	_tda10021_writereg (state, 0x0a, BDR&0xff);
	193	_tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
	194	_tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
1da177e4	195
c10d14d6 AQ	196	_tda10021_writereg (state, 0x0d, BDRI);
c10d14d6 AQ	197	_tda10021_writereg (state, 0x0e, SFIL);
1da177e4 LT	198
	199	return 0;
	200	}
	201
	202	static int tda10021_init (struct dvb_frontend *fe)
	203	{
b8742700	204	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	205	int i;
	206
	207	dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
	208
c10d14d6	209	//_tda10021_writereg (fe, 0, 0);
1da177e4 LT	210
1da177e4 LT	211	for (i=0; i<tda10021_inittab_size; i++)
c10d14d6	212	_tda10021_writereg (state, i, tda10021_inittab[i]);
1da177e4	213
c10d14d6	214	_tda10021_writereg (state, 0x34, state->pwm);
1da177e4 LT	215
	216	//Comment by markus
	217	//0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
	218	//0x2A[4] == BYPPLL -> Power down mode (default 1)
	219	//0x2A[5] == LCK -> PLL Lock Flag
	220	//0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
	221
	222	//Activate PLL
c10d14d6	223	_tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
1da177e4 LT	224	return 0;
	225	}
	226
	227	static int tda10021_set_parameters (struct dvb_frontend *fe,
	228	struct dvb_frontend_parameters *p)
	229	{
b8742700	230	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	231
	232	//table for QAM4-QAM256 ready QAM4 QAM16 QAM32 QAM64 QAM128 QAM256
	233	//CONF
	234	static const u8 reg0x00 [] = { 0x14, 0x00, 0x04, 0x08, 0x0c, 0x10 };
	235	//AGCREF value
	236	static const u8 reg0x01 [] = { 0x78, 0x8c, 0x8c, 0x6a, 0x78, 0x5c };
	237	//LTHR value
	238	static const u8 reg0x05 [] = { 0x78, 0x87, 0x64, 0x46, 0x36, 0x26 };
	239	//MSETH
	240	static const u8 reg0x08 [] = { 0x8c, 0xa2, 0x74, 0x43, 0x34, 0x23 };
	241	//AREF
	242	static const u8 reg0x09 [] = { 0x96, 0x91, 0x96, 0x6a, 0x7e, 0x6b };
	243
	244	int qam = p->u.qam.modulation;
	245
	246	if (qam < 0 \|\| qam > 5)
	247	return -EINVAL;
	248
dc120b07 HB	249	if (p->inversion != INVERSION_ON && p->inversion != INVERSION_OFF)
	250	return -EINVAL;
	251
1da177e4 LT	252	//printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->u.qam.symbol_rate);
1da177e4 LT	253
dea74869 PB	254	if (fe->ops.tuner_ops.set_params) {
	255	fe->ops.tuner_ops.set_params(fe, p);
	256	if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
f1e80919	257	}
1da177e4 LT	258
1da177e4 LT	259	tda10021_set_symbolrate (state, p->u.qam.symbol_rate);
c10d14d6	260	_tda10021_writereg (state, 0x34, state->pwm);
1da177e4	261
c10d14d6 AQ	262	_tda10021_writereg (state, 0x01, reg0x01[qam]);
	263	_tda10021_writereg (state, 0x05, reg0x05[qam]);
	264	_tda10021_writereg (state, 0x08, reg0x08[qam]);
	265	_tda10021_writereg (state, 0x09, reg0x09[qam]);
1da177e4 LT	266
	267	tda10021_setup_reg0 (state, reg0x00[qam], p->inversion);
	268
	269	return 0;
	270	}
	271
	272	static int tda10021_read_status(struct dvb_frontend* fe, fe_status_t* status)
	273	{
b8742700	274	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	275	int sync;
	276
	277	*status = 0;
	278	//0x11[0] == EQALGO -> Equalizer algorithms state
	279	//0x11[1] == CARLOCK -> Carrier locked
	280	//0x11[2] == FSYNC -> Frame synchronisation
	281	//0x11[3] == FEL -> Front End locked
	282	//0x11[6] == NODVB -> DVB Mode Information
	283	sync = tda10021_readreg (state, 0x11);
	284
	285	if (sync & 2)
	286	*status \|= FE_HAS_SIGNAL\|FE_HAS_CARRIER;
	287
	288	if (sync & 4)
	289	*status \|= FE_HAS_SYNC\|FE_HAS_VITERBI;
	290
	291	if (sync & 8)
	292	*status \|= FE_HAS_LOCK;
	293
	294	return 0;
	295	}
	296
	297	static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
	298	{
b8742700	299	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	300
	301	u32 _ber = tda10021_readreg(state, 0x14) \|
	302	(tda10021_readreg(state, 0x15) << 8) \|
	303	((tda10021_readreg(state, 0x16) & 0x0f) << 16);
	304	ber = 10 _ber;
	305
	306	return 0;
	307	}
	308
	309	static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
	310	{
b8742700	311	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	312
	313	u8 gain = tda10021_readreg(state, 0x17);
	314	*strength = (gain << 8) \| gain;
	315
	316	return 0;
	317	}
	318
	319	static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
	320	{
b8742700	321	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	322
	323	u8 quality = ~tda10021_readreg(state, 0x18);
	324	*snr = (quality << 8) \| quality;
	325
	326	return 0;
	327	}
	328
	329	static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
	330	{
b8742700	331	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	332
	333	*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
	334	if (*ucblocks == 0x7f)
	335	*ucblocks = 0xffffffff;
	336
	337	/* reset uncorrected block counter */
c10d14d6 AQ	338	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
c10d14d6 AQ	339	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
1da177e4 LT	340
	341	return 0;
	342	}
	343
	344	static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
	345	{
b8742700	346	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	347	int sync;
	348	s8 afc = 0;
	349
	350	sync = tda10021_readreg(state, 0x11);
	351	afc = tda10021_readreg(state, 0x19);
	352	if (verbose) {
	353	/* AFC only valid when carrier has been recovered */
	354	printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
	355	"DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
	356	state->frontend.dvb->num, afc,
	357	-((s32)p->u.qam.symbol_rate * afc) >> 10);
	358	}
	359
dc120b07	360	p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
1da177e4 LT	361	p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
	362
	363	p->u.qam.fec_inner = FEC_NONE;
	364	p->frequency = ((p->frequency + 31250) / 62500) * 62500;
	365
	366	if (sync & 2)
	367	p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
	368
	369	return 0;
	370	}
	371
f1e80919 AQ	372	static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
	373	{
	374	struct tda10021_state* state = fe->demodulator_priv;
	375
	376	if (enable) {
	377	lock_tuner(state);
	378	} else {
	379	unlock_tuner(state);
	380	}
	381	return 0;
	382	}
	383
1da177e4 LT	384	static int tda10021_sleep(struct dvb_frontend* fe)
1da177e4 LT	385	{
b8742700	386	struct tda10021_state* state = fe->demodulator_priv;
1da177e4	387
c10d14d6 AQ	388	_tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */
c10d14d6 AQ	389	_tda10021_writereg (state, 0x00, 0x80); /* standby */
1da177e4 LT	390
	391	return 0;
	392	}
	393
	394	static void tda10021_release(struct dvb_frontend* fe)
	395	{
b8742700	396	struct tda10021_state* state = fe->demodulator_priv;
1da177e4 LT	397	kfree(state);
	398	}
	399
	400	static struct dvb_frontend_ops tda10021_ops;
	401
aa323ac8	402	struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
1da177e4 LT	403	struct i2c_adapter* i2c,
	404	u8 pwm)
	405	{
	406	struct tda10021_state* state = NULL;
dc120b07	407	u8 id;
1da177e4 LT	408
1da177e4 LT	409	/* allocate memory for the internal state */
b8742700	410	state = kmalloc(sizeof(struct tda10021_state), GFP_KERNEL);
1da177e4 LT	411	if (state == NULL) goto error;
	412
	413	/* setup the state */
	414	state->config = config;
	415	state->i2c = i2c;
1da177e4 LT	416	state->pwm = pwm;
	417	state->reg0 = tda10021_inittab[0];
	418
	419	/* check if the demod is there */
dc120b07 HB	420	id = tda10021_readreg(state, 0x1a);
	421	if ((id & 0xf0) != 0x70) goto error;
	422
	423	printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
	424	state->config->demod_address, id);
1da177e4 LT	425
1da177e4 LT	426	/* create dvb_frontend */
dea74869	427	memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
1da177e4 LT	428	state->frontend.demodulator_priv = state;
	429	return &state->frontend;
	430
	431	error:
	432	kfree(state);
	433	return NULL;
	434	}
	435
	436	static struct dvb_frontend_ops tda10021_ops = {
	437
	438	.info = {
	439	.name = "Philips TDA10021 DVB-C",
	440	.type = FE_QAM,
	441	.frequency_stepsize = 62500,
	442	.frequency_min = 51000000,
	443	.frequency_max = 858000000,
	444	.symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */
	445	.symbol_rate_max = (XIN/2)/4, /* SACLK/4 */
acf28212	446	#if 0
1da177e4 LT	447	.frequency_tolerance = ???,
	448	.symbol_rate_tolerance = ???, /* ppm / / == 8% (spec p. 5) */
	449	#endif
	450	.caps = 0x400 \| //FE_CAN_QAM_4
	451	FE_CAN_QAM_16 \| FE_CAN_QAM_32 \| FE_CAN_QAM_64 \|
	452	FE_CAN_QAM_128 \| FE_CAN_QAM_256 \|
	453	FE_CAN_FEC_AUTO
	454	},
	455
	456	.release = tda10021_release,
	457
	458	.init = tda10021_init,
	459	.sleep = tda10021_sleep,
f1e80919	460	.i2c_gate_ctrl = tda10021_i2c_gate_ctrl,
1da177e4 LT	461
	462	.set_frontend = tda10021_set_parameters,
	463	.get_frontend = tda10021_get_frontend,
	464
	465	.read_status = tda10021_read_status,
	466	.read_ber = tda10021_read_ber,
	467	.read_signal_strength = tda10021_read_signal_strength,
	468	.read_snr = tda10021_read_snr,
	469	.read_ucblocks = tda10021_read_ucblocks,
	470	};
	471
	472	module_param(verbose, int, 0644);
	473	MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
	474
	475	MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
	476	MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
	477	MODULE_LICENSE("GPL");
	478
	479	EXPORT_SYMBOL(tda10021_attach);