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V4L/DVB: ir: prepare IR code for a parameter change at register function
[net-next-2.6.git] / drivers / media / dvb / dm1105 / dm1105.c
CommitLineData
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1/*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
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22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/proc_fs.h>
27#include <linux/pci.h>
28#include <linux/dma-mapping.h>
29#include <linux/input.h>
5a0e3ad6 30#include <linux/slab.h>
a611d0ca
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31#include <media/ir-common.h>
32
33#include "demux.h"
34#include "dmxdev.h"
35#include "dvb_demux.h"
36#include "dvb_frontend.h"
37#include "dvb_net.h"
38#include "dvbdev.h"
39#include "dvb-pll.h"
40
41#include "stv0299.h"
e4aab64c
IL
42#include "stv0288.h"
43#include "stb6000.h"
04ad28c9 44#include "si21xx.h"
35d9c427 45#include "cx24116.h"
a611d0ca 46#include "z0194a.h"
b4a0e816 47#include "ds3000.h"
a611d0ca 48
727e625c
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49#define MODULE_NAME "dm1105"
50
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51#define UNSET (-1U)
52
53#define DM1105_BOARD_NOAUTO UNSET
54#define DM1105_BOARD_UNKNOWN 0
55#define DM1105_BOARD_DVBWORLD_2002 1
56#define DM1105_BOARD_DVBWORLD_2004 2
57#define DM1105_BOARD_AXESS_DM05 3
58
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59/* ----------------------------------------------- */
60/*
61 * PCI ID's
62 */
63#ifndef PCI_VENDOR_ID_TRIGEM
64#define PCI_VENDOR_ID_TRIGEM 0x109f
65#endif
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66#ifndef PCI_VENDOR_ID_AXESS
67#define PCI_VENDOR_ID_AXESS 0x195d
68#endif
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69#ifndef PCI_DEVICE_ID_DM1105
70#define PCI_DEVICE_ID_DM1105 0x036f
71#endif
72#ifndef PCI_DEVICE_ID_DW2002
73#define PCI_DEVICE_ID_DW2002 0x2002
74#endif
75#ifndef PCI_DEVICE_ID_DW2004
76#define PCI_DEVICE_ID_DW2004 0x2004
77#endif
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78#ifndef PCI_DEVICE_ID_DM05
79#define PCI_DEVICE_ID_DM05 0x1105
80#endif
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81/* ----------------------------------------------- */
82/* sdmc dm1105 registers */
83
84/* TS Control */
85#define DM1105_TSCTR 0x00
86#define DM1105_DTALENTH 0x04
87
88/* GPIO Interface */
89#define DM1105_GPIOVAL 0x08
90#define DM1105_GPIOCTR 0x0c
91
92/* PID serial number */
93#define DM1105_PIDN 0x10
94
95/* Odd-even secret key select */
96#define DM1105_CWSEL 0x14
97
98/* Host Command Interface */
99#define DM1105_HOST_CTR 0x18
100#define DM1105_HOST_AD 0x1c
101
102/* PCI Interface */
103#define DM1105_CR 0x30
104#define DM1105_RST 0x34
105#define DM1105_STADR 0x38
106#define DM1105_RLEN 0x3c
107#define DM1105_WRP 0x40
108#define DM1105_INTCNT 0x44
109#define DM1105_INTMAK 0x48
110#define DM1105_INTSTS 0x4c
111
112/* CW Value */
113#define DM1105_ODD 0x50
114#define DM1105_EVEN 0x58
115
116/* PID Value */
117#define DM1105_PID 0x60
118
119/* IR Control */
120#define DM1105_IRCTR 0x64
121#define DM1105_IRMODE 0x68
122#define DM1105_SYSTEMCODE 0x6c
123#define DM1105_IRCODE 0x70
124
125/* Unknown Values */
126#define DM1105_ENCRYPT 0x74
127#define DM1105_VER 0x7c
128
129/* I2C Interface */
130#define DM1105_I2CCTR 0x80
131#define DM1105_I2CSTS 0x81
132#define DM1105_I2CDAT 0x82
133#define DM1105_I2C_RA 0x83
134/* ----------------------------------------------- */
135/* Interrupt Mask Bits */
136
137#define INTMAK_TSIRQM 0x01
138#define INTMAK_HIRQM 0x04
139#define INTMAK_IRM 0x08
140#define INTMAK_ALLMASK (INTMAK_TSIRQM | \
141 INTMAK_HIRQM | \
142 INTMAK_IRM)
143#define INTMAK_NONEMASK 0x00
144
145/* Interrupt Status Bits */
146#define INTSTS_TSIRQ 0x01
147#define INTSTS_HIRQ 0x04
148#define INTSTS_IR 0x08
149
150/* IR Control Bits */
151#define DM1105_IR_EN 0x01
152#define DM1105_SYS_CHK 0x02
153#define DM1105_REP_FLG 0x08
154
155/* EEPROM addr */
156#define IIC_24C01_addr 0xa0
157/* Max board count */
158#define DM1105_MAX 0x04
159
160#define DRIVER_NAME "dm1105"
161
162#define DM1105_DMA_PACKETS 47
163#define DM1105_DMA_PACKET_LENGTH (128*4)
164#define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
165
166/* GPIO's for LNB power control */
167#define DM1105_LNB_MASK 0x00000000
d8300df9 168#define DM1105_LNB_OFF 0x00020000
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169#define DM1105_LNB_13V 0x00010100
170#define DM1105_LNB_18V 0x00000100
171
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172/* GPIO's for LNB power control for Axess DM05 */
173#define DM05_LNB_MASK 0x00000000
d8300df9 174#define DM05_LNB_OFF 0x00020000/* actually 13v */
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IL
175#define DM05_LNB_13V 0x00020000
176#define DM05_LNB_18V 0x00030000
177
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178static unsigned int card[] = {[0 ... 3] = UNSET };
179module_param_array(card, int, NULL, 0444);
180MODULE_PARM_DESC(card, "card type");
181
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182static int ir_debug;
183module_param(ir_debug, int, 0644);
184MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
185
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186static unsigned int dm1105_devcount;
187
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188DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
189
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190struct dm1105_board {
191 char *name;
192};
193
194struct dm1105_subid {
195 u16 subvendor;
196 u16 subdevice;
197 u32 card;
198};
199
200static const struct dm1105_board dm1105_boards[] = {
201 [DM1105_BOARD_UNKNOWN] = {
202 .name = "UNKNOWN/GENERIC",
203 },
204 [DM1105_BOARD_DVBWORLD_2002] = {
205 .name = "DVBWorld PCI 2002",
206 },
207 [DM1105_BOARD_DVBWORLD_2004] = {
208 .name = "DVBWorld PCI 2004",
209 },
210 [DM1105_BOARD_AXESS_DM05] = {
211 .name = "Axess/EasyTv DM05",
212 },
213};
214
215static const struct dm1105_subid dm1105_subids[] = {
216 {
217 .subvendor = 0x0000,
218 .subdevice = 0x2002,
219 .card = DM1105_BOARD_DVBWORLD_2002,
220 }, {
221 .subvendor = 0x0001,
222 .subdevice = 0x2002,
223 .card = DM1105_BOARD_DVBWORLD_2002,
224 }, {
225 .subvendor = 0x0000,
226 .subdevice = 0x2004,
227 .card = DM1105_BOARD_DVBWORLD_2004,
228 }, {
229 .subvendor = 0x0001,
230 .subdevice = 0x2004,
231 .card = DM1105_BOARD_DVBWORLD_2004,
232 }, {
233 .subvendor = 0x195d,
234 .subdevice = 0x1105,
235 .card = DM1105_BOARD_AXESS_DM05,
236 },
237};
238
239static void dm1105_card_list(struct pci_dev *pci)
240{
241 int i;
242
243 if (0 == pci->subsystem_vendor &&
244 0 == pci->subsystem_device) {
245 printk(KERN_ERR
246 "dm1105: Your board has no valid PCI Subsystem ID\n"
247 "dm1105: and thus can't be autodetected\n"
248 "dm1105: Please pass card=<n> insmod option to\n"
249 "dm1105: workaround that. Redirect complaints to\n"
250 "dm1105: the vendor of the TV card. Best regards,\n"
251 "dm1105: -- tux\n");
252 } else {
253 printk(KERN_ERR
254 "dm1105: Your board isn't known (yet) to the driver.\n"
255 "dm1105: You can try to pick one of the existing\n"
256 "dm1105: card configs via card=<n> insmod option.\n"
257 "dm1105: Updating to the latest version might help\n"
258 "dm1105: as well.\n");
259 }
260 printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
261 "insmod option:\n");
262 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
263 printk(KERN_ERR "dm1105: card=%d -> %s\n",
264 i, dm1105_boards[i].name);
265}
266
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267/* infrared remote control */
268struct infrared {
a611d0ca 269 struct input_dev *input_dev;
b72857dd 270 struct ir_input_state ir;
a611d0ca 271 char input_phys[32];
b72857dd 272 struct work_struct work;
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IL
273 u32 ir_command;
274};
275
34d2f9bf 276struct dm1105_dev {
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IL
277 /* pci */
278 struct pci_dev *pdev;
279 u8 __iomem *io_mem;
280
281 /* ir */
282 struct infrared ir;
283
284 /* dvb */
285 struct dmx_frontend hw_frontend;
286 struct dmx_frontend mem_frontend;
287 struct dmxdev dmxdev;
288 struct dvb_adapter dvb_adapter;
289 struct dvb_demux demux;
290 struct dvb_frontend *fe;
291 struct dvb_net dvbnet;
292 unsigned int full_ts_users;
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293 unsigned int boardnr;
294 int nr;
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295
296 /* i2c */
297 struct i2c_adapter i2c_adap;
298
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IL
299 /* irq */
300 struct work_struct work;
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301 struct workqueue_struct *wq;
302 char wqn[16];
d1498ffc 303
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304 /* dma */
305 dma_addr_t dma_addr;
306 unsigned char *ts_buf;
307 u32 wrp;
d1498ffc 308 u32 nextwrp;
a611d0ca
IL
309 u32 buffer_size;
310 unsigned int PacketErrorCount;
311 unsigned int dmarst;
312 spinlock_t lock;
a611d0ca
IL
313};
314
34d2f9bf 315#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
a611d0ca 316
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IL
317#define dm_readb(reg) inb(dm_io_mem(reg))
318#define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
319
320#define dm_readw(reg) inw(dm_io_mem(reg))
321#define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
322
323#define dm_readl(reg) inl(dm_io_mem(reg))
324#define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
325
326#define dm_andorl(reg, mask, value) \
327 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
328 ((value) & (mask)), (dm_io_mem(reg)))
329
330#define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
331#define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
332
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333static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
334 struct i2c_msg *msgs, int num)
335{
34d2f9bf 336 struct dm1105_dev *dev ;
a611d0ca
IL
337
338 int addr, rc, i, j, k, len, byte, data;
339 u8 status;
340
34d2f9bf 341 dev = i2c_adap->algo_data;
a611d0ca 342 for (i = 0; i < num; i++) {
5eb3291f 343 dm_writeb(DM1105_I2CCTR, 0x00);
a611d0ca
IL
344 if (msgs[i].flags & I2C_M_RD) {
345 /* read bytes */
346 addr = msgs[i].addr << 1;
347 addr |= 1;
5eb3291f 348 dm_writeb(DM1105_I2CDAT, addr);
a611d0ca 349 for (byte = 0; byte < msgs[i].len; byte++)
5eb3291f 350 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
a611d0ca 351
5eb3291f 352 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
a611d0ca
IL
353 for (j = 0; j < 55; j++) {
354 mdelay(10);
5eb3291f 355 status = dm_readb(DM1105_I2CSTS);
a611d0ca
IL
356 if ((status & 0xc0) == 0x40)
357 break;
358 }
359 if (j >= 55)
360 return -1;
361
362 for (byte = 0; byte < msgs[i].len; byte++) {
5eb3291f 363 rc = dm_readb(DM1105_I2CDAT + byte + 1);
a611d0ca
IL
364 if (rc < 0)
365 goto err;
366 msgs[i].buf[byte] = rc;
367 }
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IL
368 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
369 /* prepaired for cx24116 firmware */
370 /* Write in small blocks */
371 len = msgs[i].len - 1;
372 k = 1;
373 do {
5eb3291f
IL
374 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
375 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
ed7c847a
IL
376 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
377 data = msgs[i].buf[k + byte];
5eb3291f 378 dm_writeb(DM1105_I2CDAT + byte + 2, data);
a611d0ca 379 }
5eb3291f 380 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
a611d0ca
IL
381 for (j = 0; j < 25; j++) {
382 mdelay(10);
5eb3291f 383 status = dm_readb(DM1105_I2CSTS);
a611d0ca
IL
384 if ((status & 0xc0) == 0x40)
385 break;
386 }
387
388 if (j >= 25)
389 return -1;
ed7c847a
IL
390
391 k += 48;
392 len -= 48;
393 } while (len > 0);
394 } else {
395 /* write bytes */
5eb3291f 396 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
ed7c847a
IL
397 for (byte = 0; byte < msgs[i].len; byte++) {
398 data = msgs[i].buf[byte];
5eb3291f 399 dm_writeb(DM1105_I2CDAT + byte + 1, data);
ed7c847a 400 }
5eb3291f 401 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
ed7c847a
IL
402 for (j = 0; j < 25; j++) {
403 mdelay(10);
5eb3291f 404 status = dm_readb(DM1105_I2CSTS);
ed7c847a
IL
405 if ((status & 0xc0) == 0x40)
406 break;
a611d0ca 407 }
ed7c847a
IL
408
409 if (j >= 25)
410 return -1;
a611d0ca
IL
411 }
412 }
413 return num;
414 err:
415 return rc;
416}
417
418static u32 functionality(struct i2c_adapter *adap)
419{
420 return I2C_FUNC_I2C;
421}
422
423static struct i2c_algorithm dm1105_algo = {
424 .master_xfer = dm1105_i2c_xfer,
425 .functionality = functionality,
426};
427
34d2f9bf 428static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
a611d0ca 429{
34d2f9bf 430 return container_of(feed->demux, struct dm1105_dev, demux);
a611d0ca
IL
431}
432
34d2f9bf 433static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
a611d0ca 434{
34d2f9bf 435 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
a611d0ca
IL
436}
437
34d2f9bf 438static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
a611d0ca 439{
34d2f9bf 440 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
d8300df9 441 u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
a611d0ca 442
34d2f9bf 443 switch (dev->boardnr) {
d8300df9 444 case DM1105_BOARD_AXESS_DM05:
519a4bdc 445 lnb_mask = DM05_LNB_MASK;
d8300df9 446 lnb_off = DM05_LNB_OFF;
519a4bdc
IL
447 lnb_13v = DM05_LNB_13V;
448 lnb_18v = DM05_LNB_18V;
449 break;
d8300df9
IL
450 case DM1105_BOARD_DVBWORLD_2002:
451 case DM1105_BOARD_DVBWORLD_2004:
519a4bdc
IL
452 default:
453 lnb_mask = DM1105_LNB_MASK;
d8300df9 454 lnb_off = DM1105_LNB_OFF;
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IL
455 lnb_13v = DM1105_LNB_13V;
456 lnb_18v = DM1105_LNB_18V;
457 }
458
5eb3291f 459 dm_writel(DM1105_GPIOCTR, lnb_mask);
519a4bdc 460 if (voltage == SEC_VOLTAGE_18)
5eb3291f 461 dm_writel(DM1105_GPIOVAL, lnb_18v);
d8300df9 462 else if (voltage == SEC_VOLTAGE_13)
5eb3291f 463 dm_writel(DM1105_GPIOVAL, lnb_13v);
d8300df9 464 else
5eb3291f 465 dm_writel(DM1105_GPIOVAL, lnb_off);
a611d0ca
IL
466
467 return 0;
468}
469
34d2f9bf 470static void dm1105_set_dma_addr(struct dm1105_dev *dev)
a611d0ca 471{
5eb3291f 472 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
a611d0ca
IL
473}
474
34d2f9bf 475static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
a611d0ca 476{
34d2f9bf
IL
477 dev->ts_buf = pci_alloc_consistent(dev->pdev,
478 6 * DM1105_DMA_BYTES,
479 &dev->dma_addr);
a611d0ca 480
34d2f9bf 481 return !dev->ts_buf;
a611d0ca
IL
482}
483
34d2f9bf 484static void dm1105_dma_unmap(struct dm1105_dev *dev)
a611d0ca 485{
34d2f9bf
IL
486 pci_free_consistent(dev->pdev,
487 6 * DM1105_DMA_BYTES,
488 dev->ts_buf,
489 dev->dma_addr);
a611d0ca
IL
490}
491
34d2f9bf 492static void dm1105_enable_irqs(struct dm1105_dev *dev)
a611d0ca 493{
5eb3291f
IL
494 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
495 dm_writeb(DM1105_CR, 1);
a611d0ca
IL
496}
497
34d2f9bf 498static void dm1105_disable_irqs(struct dm1105_dev *dev)
a611d0ca 499{
5eb3291f
IL
500 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
501 dm_writeb(DM1105_CR, 0);
a611d0ca
IL
502}
503
34d2f9bf 504static int dm1105_start_feed(struct dvb_demux_feed *f)
a611d0ca 505{
34d2f9bf 506 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 507
34d2f9bf
IL
508 if (dev->full_ts_users++ == 0)
509 dm1105_enable_irqs(dev);
a611d0ca
IL
510
511 return 0;
512}
513
34d2f9bf 514static int dm1105_stop_feed(struct dvb_demux_feed *f)
a611d0ca 515{
34d2f9bf 516 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 517
34d2f9bf
IL
518 if (--dev->full_ts_users == 0)
519 dm1105_disable_irqs(dev);
a611d0ca
IL
520
521 return 0;
522}
523
b72857dd
IL
524/* ir work handler */
525static void dm1105_emit_key(struct work_struct *work)
a611d0ca 526{
b72857dd 527 struct infrared *ir = container_of(work, struct infrared, work);
a611d0ca
IL
528 u32 ircom = ir->ir_command;
529 u8 data;
a611d0ca 530
d1498ffc
IL
531 if (ir_debug)
532 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
533
a611d0ca
IL
534 data = (ircom >> 8) & 0x7f;
535
8573b74a 536 ir_input_keydown(ir->input_dev, &ir->ir, data);
b72857dd 537 ir_input_nokey(ir->input_dev, &ir->ir);
a611d0ca
IL
538}
539
d1498ffc
IL
540/* work handler */
541static void dm1105_dmx_buffer(struct work_struct *work)
542{
34d2f9bf 543 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
d1498ffc 544 unsigned int nbpackets;
34d2f9bf
IL
545 u32 oldwrp = dev->wrp;
546 u32 nextwrp = dev->nextwrp;
d1498ffc 547
34d2f9bf
IL
548 if (!((dev->ts_buf[oldwrp] == 0x47) &&
549 (dev->ts_buf[oldwrp + 188] == 0x47) &&
550 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
551 dev->PacketErrorCount++;
d1498ffc 552 /* bad packet found */
34d2f9bf
IL
553 if ((dev->PacketErrorCount >= 2) &&
554 (dev->dmarst == 0)) {
5eb3291f 555 dm_writeb(DM1105_RST, 1);
34d2f9bf
IL
556 dev->wrp = 0;
557 dev->PacketErrorCount = 0;
558 dev->dmarst = 0;
d1498ffc
IL
559 return;
560 }
561 }
562
563 if (nextwrp < oldwrp) {
34d2f9bf
IL
564 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
565 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
d1498ffc
IL
566 } else
567 nbpackets = (nextwrp - oldwrp) / 188;
568
34d2f9bf
IL
569 dev->wrp = nextwrp;
570 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
d1498ffc
IL
571}
572
34d2f9bf 573static irqreturn_t dm1105_irq(int irq, void *dev_id)
a611d0ca 574{
34d2f9bf 575 struct dm1105_dev *dev = dev_id;
a611d0ca
IL
576
577 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
5eb3291f
IL
578 unsigned int intsts = dm_readb(DM1105_INTSTS);
579 dm_writeb(DM1105_INTSTS, intsts);
a611d0ca
IL
580
581 switch (intsts) {
582 case INTSTS_TSIRQ:
583 case (INTSTS_TSIRQ | INTSTS_IR):
5eb3291f 584 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
34d2f9bf 585 queue_work(dev->wq, &dev->work);
a611d0ca
IL
586 break;
587 case INTSTS_IR:
5eb3291f 588 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
34d2f9bf 589 schedule_work(&dev->ir.work);
a611d0ca
IL
590 break;
591 }
a611d0ca 592
d1498ffc 593 return IRQ_HANDLED;
a611d0ca
IL
594}
595
34d2f9bf 596int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
a611d0ca
IL
597{
598 struct input_dev *input_dev;
d705d2ab 599 struct ir_scancode_table *ir_codes = &IR_KEYTABLE(dm1105_nec);
971e8298 600 u64 ir_type = IR_TYPE_OTHER;
b72857dd 601 int err = -ENOMEM;
a611d0ca
IL
602
603 input_dev = input_allocate_device();
604 if (!input_dev)
605 return -ENOMEM;
606
607 dm1105->ir.input_dev = input_dev;
608 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
609 "pci-%s/ir0", pci_name(dm1105->pdev));
610
579e7d60 611 err = ir_input_init(input_dev, &dm1105->ir.ir, ir_type);
055cd556
MCC
612 if (err < 0) {
613 input_free_device(input_dev);
614 return err;
615 }
616
a611d0ca 617 input_dev->name = "DVB on-card IR receiver";
a611d0ca
IL
618 input_dev->phys = dm1105->ir.input_phys;
619 input_dev->id.bustype = BUS_PCI;
b72857dd 620 input_dev->id.version = 1;
a611d0ca
IL
621 if (dm1105->pdev->subsystem_vendor) {
622 input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
623 input_dev->id.product = dm1105->pdev->subsystem_device;
624 } else {
625 input_dev->id.vendor = dm1105->pdev->vendor;
626 input_dev->id.product = dm1105->pdev->device;
627 }
b72857dd 628
a611d0ca 629 input_dev->dev.parent = &dm1105->pdev->dev;
b72857dd
IL
630
631 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
632
b2245ba1 633 err = __ir_input_register(input_dev, ir_codes, NULL, MODULE_NAME);
a611d0ca 634
579e7d60 635 return err;
a611d0ca
IL
636}
637
34d2f9bf 638void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
a611d0ca 639{
38ef6aa8 640 ir_input_unregister(dm1105->ir.input_dev);
a611d0ca
IL
641}
642
34d2f9bf 643static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
a611d0ca 644{
34d2f9bf 645 dm1105_disable_irqs(dev);
a611d0ca 646
5eb3291f 647 dm_writeb(DM1105_HOST_CTR, 0);
a611d0ca
IL
648
649 /*DATALEN 188,*/
5eb3291f 650 dm_writeb(DM1105_DTALENTH, 188);
a611d0ca 651 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
5eb3291f 652 dm_writew(DM1105_TSCTR, 0xc10a);
a611d0ca
IL
653
654 /* map DMA and set address */
34d2f9bf
IL
655 dm1105_dma_map(dev);
656 dm1105_set_dma_addr(dev);
a611d0ca 657 /* big buffer */
5eb3291f
IL
658 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
659 dm_writeb(DM1105_INTCNT, 47);
a611d0ca
IL
660
661 /* IR NEC mode enable */
5eb3291f
IL
662 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
663 dm_writeb(DM1105_IRMODE, 0);
664 dm_writew(DM1105_SYSTEMCODE, 0);
a611d0ca
IL
665
666 return 0;
667}
668
34d2f9bf 669static void dm1105_hw_exit(struct dm1105_dev *dev)
a611d0ca 670{
34d2f9bf 671 dm1105_disable_irqs(dev);
a611d0ca
IL
672
673 /* IR disable */
5eb3291f
IL
674 dm_writeb(DM1105_IRCTR, 0);
675 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
a611d0ca 676
34d2f9bf 677 dm1105_dma_unmap(dev);
a611d0ca 678}
e4aab64c 679
d4305c68
IL
680static struct stv0299_config sharp_z0194a_config = {
681 .demod_address = 0x68,
682 .inittab = sharp_z0194a_inittab,
683 .mclk = 88000000UL,
684 .invert = 1,
685 .skip_reinit = 0,
686 .lock_output = STV0299_LOCKOUTPUT_1,
687 .volt13_op0_op1 = STV0299_VOLT13_OP1,
688 .min_delay_ms = 100,
689 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
690};
691
a611d0ca
IL
692static struct stv0288_config earda_config = {
693 .demod_address = 0x68,
694 .min_delay_ms = 100,
695};
696
697static struct si21xx_config serit_config = {
698 .demod_address = 0x68,
699 .min_delay_ms = 100,
700
701};
702
703static struct cx24116_config serit_sp2633_config = {
704 .demod_address = 0x55,
705};
a611d0ca 706
b4a0e816
IL
707static struct ds3000_config dvbworld_ds3000_config = {
708 .demod_address = 0x68,
709};
710
34d2f9bf 711static int __devinit frontend_init(struct dm1105_dev *dev)
a611d0ca
IL
712{
713 int ret;
714
34d2f9bf 715 switch (dev->boardnr) {
d8300df9 716 case DM1105_BOARD_DVBWORLD_2004:
34d2f9bf 717 dev->fe = dvb_attach(
519a4bdc 718 cx24116_attach, &serit_sp2633_config,
34d2f9bf
IL
719 &dev->i2c_adap);
720 if (dev->fe) {
721 dev->fe->ops.set_voltage = dm1105_set_voltage;
b4a0e816
IL
722 break;
723 }
724
34d2f9bf 725 dev->fe = dvb_attach(
b4a0e816 726 ds3000_attach, &dvbworld_ds3000_config,
34d2f9bf
IL
727 &dev->i2c_adap);
728 if (dev->fe)
729 dev->fe->ops.set_voltage = dm1105_set_voltage;
a611d0ca 730
519a4bdc 731 break;
d8300df9
IL
732 case DM1105_BOARD_DVBWORLD_2002:
733 case DM1105_BOARD_AXESS_DM05:
519a4bdc 734 default:
34d2f9bf 735 dev->fe = dvb_attach(
519a4bdc 736 stv0299_attach, &sharp_z0194a_config,
34d2f9bf
IL
737 &dev->i2c_adap);
738 if (dev->fe) {
739 dev->fe->ops.set_voltage = dm1105_set_voltage;
740 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
741 &dev->i2c_adap, DVB_PLL_OPERA1);
519a4bdc 742 break;
a611d0ca 743 }
e4aab64c 744
34d2f9bf 745 dev->fe = dvb_attach(
519a4bdc 746 stv0288_attach, &earda_config,
34d2f9bf
IL
747 &dev->i2c_adap);
748 if (dev->fe) {
749 dev->fe->ops.set_voltage = dm1105_set_voltage;
750 dvb_attach(stb6000_attach, dev->fe, 0x61,
751 &dev->i2c_adap);
519a4bdc 752 break;
a611d0ca 753 }
e4aab64c 754
34d2f9bf 755 dev->fe = dvb_attach(
519a4bdc 756 si21xx_attach, &serit_config,
34d2f9bf
IL
757 &dev->i2c_adap);
758 if (dev->fe)
759 dev->fe->ops.set_voltage = dm1105_set_voltage;
519a4bdc 760
a611d0ca
IL
761 }
762
34d2f9bf
IL
763 if (!dev->fe) {
764 dev_err(&dev->pdev->dev, "could not attach frontend\n");
a611d0ca
IL
765 return -ENODEV;
766 }
767
34d2f9bf 768 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
a611d0ca 769 if (ret < 0) {
34d2f9bf
IL
770 if (dev->fe->ops.release)
771 dev->fe->ops.release(dev->fe);
772 dev->fe = NULL;
a611d0ca
IL
773 return ret;
774 }
775
776 return 0;
777}
778
34d2f9bf 779static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
a611d0ca
IL
780{
781 static u8 command[1] = { 0x28 };
782
783 struct i2c_msg msg[] = {
519a4bdc
IL
784 {
785 .addr = IIC_24C01_addr >> 1,
786 .flags = 0,
787 .buf = command,
788 .len = 1
789 }, {
790 .addr = IIC_24C01_addr >> 1,
791 .flags = I2C_M_RD,
792 .buf = mac,
793 .len = 6
794 },
a611d0ca
IL
795 };
796
34d2f9bf
IL
797 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
798 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
a611d0ca
IL
799}
800
801static int __devinit dm1105_probe(struct pci_dev *pdev,
802 const struct pci_device_id *ent)
803{
34d2f9bf 804 struct dm1105_dev *dev;
a611d0ca
IL
805 struct dvb_adapter *dvb_adapter;
806 struct dvb_demux *dvbdemux;
807 struct dmx_demux *dmx;
808 int ret = -ENOMEM;
d8300df9 809 int i;
a611d0ca 810
34d2f9bf
IL
811 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
812 if (!dev)
d1498ffc 813 return -ENOMEM;
a611d0ca 814
d8300df9 815 /* board config */
34d2f9bf
IL
816 dev->nr = dm1105_devcount;
817 dev->boardnr = UNSET;
818 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
819 dev->boardnr = card[dev->nr];
820 for (i = 0; UNSET == dev->boardnr &&
d8300df9
IL
821 i < ARRAY_SIZE(dm1105_subids); i++)
822 if (pdev->subsystem_vendor ==
823 dm1105_subids[i].subvendor &&
824 pdev->subsystem_device ==
825 dm1105_subids[i].subdevice)
34d2f9bf 826 dev->boardnr = dm1105_subids[i].card;
d8300df9 827
34d2f9bf
IL
828 if (UNSET == dev->boardnr) {
829 dev->boardnr = DM1105_BOARD_UNKNOWN;
d8300df9
IL
830 dm1105_card_list(pdev);
831 }
832
833 dm1105_devcount++;
34d2f9bf
IL
834 dev->pdev = pdev;
835 dev->buffer_size = 5 * DM1105_DMA_BYTES;
836 dev->PacketErrorCount = 0;
837 dev->dmarst = 0;
a611d0ca
IL
838
839 ret = pci_enable_device(pdev);
840 if (ret < 0)
841 goto err_kfree;
842
284901a9 843 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
a611d0ca
IL
844 if (ret < 0)
845 goto err_pci_disable_device;
846
847 pci_set_master(pdev);
848
849 ret = pci_request_regions(pdev, DRIVER_NAME);
850 if (ret < 0)
851 goto err_pci_disable_device;
852
34d2f9bf
IL
853 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
854 if (!dev->io_mem) {
a611d0ca
IL
855 ret = -EIO;
856 goto err_pci_release_regions;
857 }
858
34d2f9bf
IL
859 spin_lock_init(&dev->lock);
860 pci_set_drvdata(pdev, dev);
a611d0ca 861
34d2f9bf 862 ret = dm1105_hw_init(dev);
a611d0ca 863 if (ret < 0)
d1498ffc 864 goto err_pci_iounmap;
a611d0ca
IL
865
866 /* i2c */
34d2f9bf
IL
867 i2c_set_adapdata(&dev->i2c_adap, dev);
868 strcpy(dev->i2c_adap.name, DRIVER_NAME);
869 dev->i2c_adap.owner = THIS_MODULE;
870 dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
871 dev->i2c_adap.dev.parent = &pdev->dev;
872 dev->i2c_adap.algo = &dm1105_algo;
873 dev->i2c_adap.algo_data = dev;
874 ret = i2c_add_adapter(&dev->i2c_adap);
a611d0ca
IL
875
876 if (ret < 0)
34d2f9bf 877 goto err_dm1105_hw_exit;
a611d0ca
IL
878
879 /* dvb */
34d2f9bf 880 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
a611d0ca
IL
881 THIS_MODULE, &pdev->dev, adapter_nr);
882 if (ret < 0)
883 goto err_i2c_del_adapter;
884
34d2f9bf 885 dvb_adapter = &dev->dvb_adapter;
a611d0ca 886
34d2f9bf 887 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
a611d0ca 888
34d2f9bf 889 dvbdemux = &dev->demux;
a611d0ca
IL
890 dvbdemux->filternum = 256;
891 dvbdemux->feednum = 256;
34d2f9bf
IL
892 dvbdemux->start_feed = dm1105_start_feed;
893 dvbdemux->stop_feed = dm1105_stop_feed;
a611d0ca
IL
894 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
895 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
896 ret = dvb_dmx_init(dvbdemux);
897 if (ret < 0)
898 goto err_dvb_unregister_adapter;
899
900 dmx = &dvbdemux->dmx;
34d2f9bf
IL
901 dev->dmxdev.filternum = 256;
902 dev->dmxdev.demux = dmx;
903 dev->dmxdev.capabilities = 0;
a611d0ca 904
34d2f9bf 905 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
a611d0ca
IL
906 if (ret < 0)
907 goto err_dvb_dmx_release;
908
34d2f9bf 909 dev->hw_frontend.source = DMX_FRONTEND_0;
a611d0ca 910
34d2f9bf 911 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
912 if (ret < 0)
913 goto err_dvb_dmxdev_release;
914
34d2f9bf 915 dev->mem_frontend.source = DMX_MEMORY_FE;
a611d0ca 916
34d2f9bf 917 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
a611d0ca
IL
918 if (ret < 0)
919 goto err_remove_hw_frontend;
920
34d2f9bf 921 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
922 if (ret < 0)
923 goto err_remove_mem_frontend;
924
34d2f9bf 925 ret = frontend_init(dev);
a611d0ca
IL
926 if (ret < 0)
927 goto err_disconnect_frontend;
928
34d2f9bf
IL
929 dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
930 dm1105_ir_init(dev);
d1498ffc 931
34d2f9bf
IL
932 INIT_WORK(&dev->work, dm1105_dmx_buffer);
933 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
934 dev->wq = create_singlethread_workqueue(dev->wqn);
935 if (!dev->wq)
519a4bdc 936 goto err_dvb_net;
d1498ffc 937
34d2f9bf
IL
938 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
939 DRIVER_NAME, dev);
d1498ffc 940 if (ret < 0)
519a4bdc 941 goto err_workqueue;
d1498ffc
IL
942
943 return 0;
a611d0ca 944
519a4bdc 945err_workqueue:
34d2f9bf 946 destroy_workqueue(dev->wq);
519a4bdc 947err_dvb_net:
34d2f9bf 948 dvb_net_release(&dev->dvbnet);
a611d0ca
IL
949err_disconnect_frontend:
950 dmx->disconnect_frontend(dmx);
951err_remove_mem_frontend:
34d2f9bf 952 dmx->remove_frontend(dmx, &dev->mem_frontend);
a611d0ca 953err_remove_hw_frontend:
34d2f9bf 954 dmx->remove_frontend(dmx, &dev->hw_frontend);
a611d0ca 955err_dvb_dmxdev_release:
34d2f9bf 956 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
957err_dvb_dmx_release:
958 dvb_dmx_release(dvbdemux);
959err_dvb_unregister_adapter:
960 dvb_unregister_adapter(dvb_adapter);
961err_i2c_del_adapter:
34d2f9bf
IL
962 i2c_del_adapter(&dev->i2c_adap);
963err_dm1105_hw_exit:
964 dm1105_hw_exit(dev);
a611d0ca 965err_pci_iounmap:
34d2f9bf 966 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
967err_pci_release_regions:
968 pci_release_regions(pdev);
969err_pci_disable_device:
970 pci_disable_device(pdev);
971err_kfree:
972 pci_set_drvdata(pdev, NULL);
34d2f9bf 973 kfree(dev);
d1498ffc 974 return ret;
a611d0ca
IL
975}
976
977static void __devexit dm1105_remove(struct pci_dev *pdev)
978{
34d2f9bf
IL
979 struct dm1105_dev *dev = pci_get_drvdata(pdev);
980 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
981 struct dvb_demux *dvbdemux = &dev->demux;
a611d0ca
IL
982 struct dmx_demux *dmx = &dvbdemux->dmx;
983
34d2f9bf 984 dm1105_ir_exit(dev);
a611d0ca 985 dmx->close(dmx);
34d2f9bf
IL
986 dvb_net_release(&dev->dvbnet);
987 if (dev->fe)
988 dvb_unregister_frontend(dev->fe);
a611d0ca
IL
989
990 dmx->disconnect_frontend(dmx);
34d2f9bf
IL
991 dmx->remove_frontend(dmx, &dev->mem_frontend);
992 dmx->remove_frontend(dmx, &dev->hw_frontend);
993 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
994 dvb_dmx_release(dvbdemux);
995 dvb_unregister_adapter(dvb_adapter);
34d2f9bf
IL
996 if (&dev->i2c_adap)
997 i2c_del_adapter(&dev->i2c_adap);
a611d0ca 998
34d2f9bf 999 dm1105_hw_exit(dev);
a611d0ca 1000 synchronize_irq(pdev->irq);
34d2f9bf
IL
1001 free_irq(pdev->irq, dev);
1002 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
1003 pci_release_regions(pdev);
1004 pci_disable_device(pdev);
1005 pci_set_drvdata(pdev, NULL);
d8300df9 1006 dm1105_devcount--;
34d2f9bf 1007 kfree(dev);
a611d0ca
IL
1008}
1009
1010static struct pci_device_id dm1105_id_table[] __devinitdata = {
1011 {
1012 .vendor = PCI_VENDOR_ID_TRIGEM,
1013 .device = PCI_DEVICE_ID_DM1105,
1014 .subvendor = PCI_ANY_ID,
d8300df9 1015 .subdevice = PCI_ANY_ID,
519a4bdc
IL
1016 }, {
1017 .vendor = PCI_VENDOR_ID_AXESS,
1018 .device = PCI_DEVICE_ID_DM05,
d8300df9
IL
1019 .subvendor = PCI_ANY_ID,
1020 .subdevice = PCI_ANY_ID,
a611d0ca
IL
1021 }, {
1022 /* empty */
1023 },
1024};
1025
1026MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1027
1028static struct pci_driver dm1105_driver = {
1029 .name = DRIVER_NAME,
1030 .id_table = dm1105_id_table,
1031 .probe = dm1105_probe,
1032 .remove = __devexit_p(dm1105_remove),
1033};
1034
1035static int __init dm1105_init(void)
1036{
1037 return pci_register_driver(&dm1105_driver);
1038}
1039
1040static void __exit dm1105_exit(void)
1041{
1042 pci_unregister_driver(&dm1105_driver);
1043}
1044
1045module_init(dm1105_init);
1046module_exit(dm1105_exit);
1047
1048MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1049MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1050MODULE_LICENSE("GPL");