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a611d0ca IL |
1 | /* |
2 | * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip | |
3 | * | |
4 | * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | * | |
20 | */ | |
21 | ||
a611d0ca IL |
22 | #include <linux/i2c.h> |
23 | #include <linux/init.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/proc_fs.h> | |
27 | #include <linux/pci.h> | |
28 | #include <linux/dma-mapping.h> | |
29 | #include <linux/input.h> | |
5a0e3ad6 | 30 | #include <linux/slab.h> |
15100d89 | 31 | #include <media/ir-core.h> |
a611d0ca IL |
32 | |
33 | #include "demux.h" | |
34 | #include "dmxdev.h" | |
35 | #include "dvb_demux.h" | |
36 | #include "dvb_frontend.h" | |
37 | #include "dvb_net.h" | |
38 | #include "dvbdev.h" | |
39 | #include "dvb-pll.h" | |
40 | ||
41 | #include "stv0299.h" | |
e4aab64c IL |
42 | #include "stv0288.h" |
43 | #include "stb6000.h" | |
04ad28c9 | 44 | #include "si21xx.h" |
35d9c427 | 45 | #include "cx24116.h" |
a611d0ca | 46 | #include "z0194a.h" |
b4a0e816 | 47 | #include "ds3000.h" |
a611d0ca | 48 | |
727e625c MCC |
49 | #define MODULE_NAME "dm1105" |
50 | ||
d8300df9 IL |
51 | #define UNSET (-1U) |
52 | ||
53 | #define DM1105_BOARD_NOAUTO UNSET | |
54 | #define DM1105_BOARD_UNKNOWN 0 | |
55 | #define DM1105_BOARD_DVBWORLD_2002 1 | |
56 | #define DM1105_BOARD_DVBWORLD_2004 2 | |
57 | #define DM1105_BOARD_AXESS_DM05 3 | |
58 | ||
a611d0ca IL |
59 | /* ----------------------------------------------- */ |
60 | /* | |
61 | * PCI ID's | |
62 | */ | |
63 | #ifndef PCI_VENDOR_ID_TRIGEM | |
64 | #define PCI_VENDOR_ID_TRIGEM 0x109f | |
65 | #endif | |
519a4bdc IL |
66 | #ifndef PCI_VENDOR_ID_AXESS |
67 | #define PCI_VENDOR_ID_AXESS 0x195d | |
68 | #endif | |
a611d0ca IL |
69 | #ifndef PCI_DEVICE_ID_DM1105 |
70 | #define PCI_DEVICE_ID_DM1105 0x036f | |
71 | #endif | |
72 | #ifndef PCI_DEVICE_ID_DW2002 | |
73 | #define PCI_DEVICE_ID_DW2002 0x2002 | |
74 | #endif | |
75 | #ifndef PCI_DEVICE_ID_DW2004 | |
76 | #define PCI_DEVICE_ID_DW2004 0x2004 | |
77 | #endif | |
519a4bdc IL |
78 | #ifndef PCI_DEVICE_ID_DM05 |
79 | #define PCI_DEVICE_ID_DM05 0x1105 | |
80 | #endif | |
a611d0ca IL |
81 | /* ----------------------------------------------- */ |
82 | /* sdmc dm1105 registers */ | |
83 | ||
84 | /* TS Control */ | |
85 | #define DM1105_TSCTR 0x00 | |
86 | #define DM1105_DTALENTH 0x04 | |
87 | ||
88 | /* GPIO Interface */ | |
89 | #define DM1105_GPIOVAL 0x08 | |
90 | #define DM1105_GPIOCTR 0x0c | |
91 | ||
92 | /* PID serial number */ | |
93 | #define DM1105_PIDN 0x10 | |
94 | ||
95 | /* Odd-even secret key select */ | |
96 | #define DM1105_CWSEL 0x14 | |
97 | ||
98 | /* Host Command Interface */ | |
99 | #define DM1105_HOST_CTR 0x18 | |
100 | #define DM1105_HOST_AD 0x1c | |
101 | ||
102 | /* PCI Interface */ | |
103 | #define DM1105_CR 0x30 | |
104 | #define DM1105_RST 0x34 | |
105 | #define DM1105_STADR 0x38 | |
106 | #define DM1105_RLEN 0x3c | |
107 | #define DM1105_WRP 0x40 | |
108 | #define DM1105_INTCNT 0x44 | |
109 | #define DM1105_INTMAK 0x48 | |
110 | #define DM1105_INTSTS 0x4c | |
111 | ||
112 | /* CW Value */ | |
113 | #define DM1105_ODD 0x50 | |
114 | #define DM1105_EVEN 0x58 | |
115 | ||
116 | /* PID Value */ | |
117 | #define DM1105_PID 0x60 | |
118 | ||
119 | /* IR Control */ | |
120 | #define DM1105_IRCTR 0x64 | |
121 | #define DM1105_IRMODE 0x68 | |
122 | #define DM1105_SYSTEMCODE 0x6c | |
123 | #define DM1105_IRCODE 0x70 | |
124 | ||
125 | /* Unknown Values */ | |
126 | #define DM1105_ENCRYPT 0x74 | |
127 | #define DM1105_VER 0x7c | |
128 | ||
129 | /* I2C Interface */ | |
130 | #define DM1105_I2CCTR 0x80 | |
131 | #define DM1105_I2CSTS 0x81 | |
132 | #define DM1105_I2CDAT 0x82 | |
133 | #define DM1105_I2C_RA 0x83 | |
134 | /* ----------------------------------------------- */ | |
135 | /* Interrupt Mask Bits */ | |
136 | ||
137 | #define INTMAK_TSIRQM 0x01 | |
138 | #define INTMAK_HIRQM 0x04 | |
139 | #define INTMAK_IRM 0x08 | |
140 | #define INTMAK_ALLMASK (INTMAK_TSIRQM | \ | |
141 | INTMAK_HIRQM | \ | |
142 | INTMAK_IRM) | |
143 | #define INTMAK_NONEMASK 0x00 | |
144 | ||
145 | /* Interrupt Status Bits */ | |
146 | #define INTSTS_TSIRQ 0x01 | |
147 | #define INTSTS_HIRQ 0x04 | |
148 | #define INTSTS_IR 0x08 | |
149 | ||
150 | /* IR Control Bits */ | |
151 | #define DM1105_IR_EN 0x01 | |
152 | #define DM1105_SYS_CHK 0x02 | |
153 | #define DM1105_REP_FLG 0x08 | |
154 | ||
155 | /* EEPROM addr */ | |
156 | #define IIC_24C01_addr 0xa0 | |
157 | /* Max board count */ | |
158 | #define DM1105_MAX 0x04 | |
159 | ||
160 | #define DRIVER_NAME "dm1105" | |
161 | ||
162 | #define DM1105_DMA_PACKETS 47 | |
163 | #define DM1105_DMA_PACKET_LENGTH (128*4) | |
164 | #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS) | |
165 | ||
166 | /* GPIO's for LNB power control */ | |
167 | #define DM1105_LNB_MASK 0x00000000 | |
d8300df9 | 168 | #define DM1105_LNB_OFF 0x00020000 |
a611d0ca IL |
169 | #define DM1105_LNB_13V 0x00010100 |
170 | #define DM1105_LNB_18V 0x00000100 | |
171 | ||
519a4bdc IL |
172 | /* GPIO's for LNB power control for Axess DM05 */ |
173 | #define DM05_LNB_MASK 0x00000000 | |
d8300df9 | 174 | #define DM05_LNB_OFF 0x00020000/* actually 13v */ |
519a4bdc IL |
175 | #define DM05_LNB_13V 0x00020000 |
176 | #define DM05_LNB_18V 0x00030000 | |
177 | ||
d8300df9 IL |
178 | static unsigned int card[] = {[0 ... 3] = UNSET }; |
179 | module_param_array(card, int, NULL, 0444); | |
180 | MODULE_PARM_DESC(card, "card type"); | |
181 | ||
a611d0ca IL |
182 | static int ir_debug; |
183 | module_param(ir_debug, int, 0644); | |
184 | MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding"); | |
185 | ||
d8300df9 IL |
186 | static unsigned int dm1105_devcount; |
187 | ||
a611d0ca IL |
188 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
189 | ||
d8300df9 IL |
190 | struct dm1105_board { |
191 | char *name; | |
192 | }; | |
193 | ||
194 | struct dm1105_subid { | |
195 | u16 subvendor; | |
196 | u16 subdevice; | |
197 | u32 card; | |
198 | }; | |
199 | ||
200 | static const struct dm1105_board dm1105_boards[] = { | |
201 | [DM1105_BOARD_UNKNOWN] = { | |
202 | .name = "UNKNOWN/GENERIC", | |
203 | }, | |
204 | [DM1105_BOARD_DVBWORLD_2002] = { | |
205 | .name = "DVBWorld PCI 2002", | |
206 | }, | |
207 | [DM1105_BOARD_DVBWORLD_2004] = { | |
208 | .name = "DVBWorld PCI 2004", | |
209 | }, | |
210 | [DM1105_BOARD_AXESS_DM05] = { | |
211 | .name = "Axess/EasyTv DM05", | |
212 | }, | |
213 | }; | |
214 | ||
215 | static const struct dm1105_subid dm1105_subids[] = { | |
216 | { | |
217 | .subvendor = 0x0000, | |
218 | .subdevice = 0x2002, | |
219 | .card = DM1105_BOARD_DVBWORLD_2002, | |
220 | }, { | |
221 | .subvendor = 0x0001, | |
222 | .subdevice = 0x2002, | |
223 | .card = DM1105_BOARD_DVBWORLD_2002, | |
224 | }, { | |
225 | .subvendor = 0x0000, | |
226 | .subdevice = 0x2004, | |
227 | .card = DM1105_BOARD_DVBWORLD_2004, | |
228 | }, { | |
229 | .subvendor = 0x0001, | |
230 | .subdevice = 0x2004, | |
231 | .card = DM1105_BOARD_DVBWORLD_2004, | |
232 | }, { | |
233 | .subvendor = 0x195d, | |
234 | .subdevice = 0x1105, | |
235 | .card = DM1105_BOARD_AXESS_DM05, | |
236 | }, | |
237 | }; | |
238 | ||
239 | static void dm1105_card_list(struct pci_dev *pci) | |
240 | { | |
241 | int i; | |
242 | ||
243 | if (0 == pci->subsystem_vendor && | |
244 | 0 == pci->subsystem_device) { | |
245 | printk(KERN_ERR | |
246 | "dm1105: Your board has no valid PCI Subsystem ID\n" | |
247 | "dm1105: and thus can't be autodetected\n" | |
248 | "dm1105: Please pass card=<n> insmod option to\n" | |
249 | "dm1105: workaround that. Redirect complaints to\n" | |
250 | "dm1105: the vendor of the TV card. Best regards,\n" | |
251 | "dm1105: -- tux\n"); | |
252 | } else { | |
253 | printk(KERN_ERR | |
254 | "dm1105: Your board isn't known (yet) to the driver.\n" | |
255 | "dm1105: You can try to pick one of the existing\n" | |
256 | "dm1105: card configs via card=<n> insmod option.\n" | |
257 | "dm1105: Updating to the latest version might help\n" | |
258 | "dm1105: as well.\n"); | |
259 | } | |
260 | printk(KERN_ERR "Here is a list of valid choices for the card=<n> " | |
261 | "insmod option:\n"); | |
262 | for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++) | |
263 | printk(KERN_ERR "dm1105: card=%d -> %s\n", | |
264 | i, dm1105_boards[i].name); | |
265 | } | |
266 | ||
a611d0ca IL |
267 | /* infrared remote control */ |
268 | struct infrared { | |
a611d0ca IL |
269 | struct input_dev *input_dev; |
270 | char input_phys[32]; | |
b72857dd | 271 | struct work_struct work; |
a611d0ca IL |
272 | u32 ir_command; |
273 | }; | |
274 | ||
34d2f9bf | 275 | struct dm1105_dev { |
a611d0ca IL |
276 | /* pci */ |
277 | struct pci_dev *pdev; | |
278 | u8 __iomem *io_mem; | |
279 | ||
280 | /* ir */ | |
281 | struct infrared ir; | |
282 | ||
283 | /* dvb */ | |
284 | struct dmx_frontend hw_frontend; | |
285 | struct dmx_frontend mem_frontend; | |
286 | struct dmxdev dmxdev; | |
287 | struct dvb_adapter dvb_adapter; | |
288 | struct dvb_demux demux; | |
289 | struct dvb_frontend *fe; | |
290 | struct dvb_net dvbnet; | |
291 | unsigned int full_ts_users; | |
d8300df9 IL |
292 | unsigned int boardnr; |
293 | int nr; | |
a611d0ca IL |
294 | |
295 | /* i2c */ | |
296 | struct i2c_adapter i2c_adap; | |
297 | ||
d1498ffc IL |
298 | /* irq */ |
299 | struct work_struct work; | |
519a4bdc IL |
300 | struct workqueue_struct *wq; |
301 | char wqn[16]; | |
d1498ffc | 302 | |
a611d0ca IL |
303 | /* dma */ |
304 | dma_addr_t dma_addr; | |
305 | unsigned char *ts_buf; | |
306 | u32 wrp; | |
d1498ffc | 307 | u32 nextwrp; |
a611d0ca IL |
308 | u32 buffer_size; |
309 | unsigned int PacketErrorCount; | |
310 | unsigned int dmarst; | |
311 | spinlock_t lock; | |
a611d0ca IL |
312 | }; |
313 | ||
34d2f9bf | 314 | #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg])) |
a611d0ca | 315 | |
5eb3291f IL |
316 | #define dm_readb(reg) inb(dm_io_mem(reg)) |
317 | #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg))) | |
318 | ||
319 | #define dm_readw(reg) inw(dm_io_mem(reg)) | |
320 | #define dm_writew(reg, value) outw((value), (dm_io_mem(reg))) | |
321 | ||
322 | #define dm_readl(reg) inl(dm_io_mem(reg)) | |
323 | #define dm_writel(reg, value) outl((value), (dm_io_mem(reg))) | |
324 | ||
325 | #define dm_andorl(reg, mask, value) \ | |
326 | outl((inl(dm_io_mem(reg)) & ~(mask)) |\ | |
327 | ((value) & (mask)), (dm_io_mem(reg))) | |
328 | ||
329 | #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit)) | |
330 | #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0) | |
331 | ||
a611d0ca IL |
332 | static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap, |
333 | struct i2c_msg *msgs, int num) | |
334 | { | |
34d2f9bf | 335 | struct dm1105_dev *dev ; |
a611d0ca IL |
336 | |
337 | int addr, rc, i, j, k, len, byte, data; | |
338 | u8 status; | |
339 | ||
34d2f9bf | 340 | dev = i2c_adap->algo_data; |
a611d0ca | 341 | for (i = 0; i < num; i++) { |
5eb3291f | 342 | dm_writeb(DM1105_I2CCTR, 0x00); |
a611d0ca IL |
343 | if (msgs[i].flags & I2C_M_RD) { |
344 | /* read bytes */ | |
345 | addr = msgs[i].addr << 1; | |
346 | addr |= 1; | |
5eb3291f | 347 | dm_writeb(DM1105_I2CDAT, addr); |
a611d0ca | 348 | for (byte = 0; byte < msgs[i].len; byte++) |
5eb3291f | 349 | dm_writeb(DM1105_I2CDAT + byte + 1, 0); |
a611d0ca | 350 | |
5eb3291f | 351 | dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len); |
a611d0ca IL |
352 | for (j = 0; j < 55; j++) { |
353 | mdelay(10); | |
5eb3291f | 354 | status = dm_readb(DM1105_I2CSTS); |
a611d0ca IL |
355 | if ((status & 0xc0) == 0x40) |
356 | break; | |
357 | } | |
358 | if (j >= 55) | |
359 | return -1; | |
360 | ||
361 | for (byte = 0; byte < msgs[i].len; byte++) { | |
5eb3291f | 362 | rc = dm_readb(DM1105_I2CDAT + byte + 1); |
a611d0ca IL |
363 | if (rc < 0) |
364 | goto err; | |
365 | msgs[i].buf[byte] = rc; | |
366 | } | |
ed7c847a IL |
367 | } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) { |
368 | /* prepaired for cx24116 firmware */ | |
369 | /* Write in small blocks */ | |
370 | len = msgs[i].len - 1; | |
371 | k = 1; | |
372 | do { | |
5eb3291f IL |
373 | dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1); |
374 | dm_writeb(DM1105_I2CDAT + 1, 0xf7); | |
ed7c847a IL |
375 | for (byte = 0; byte < (len > 48 ? 48 : len); byte++) { |
376 | data = msgs[i].buf[k + byte]; | |
5eb3291f | 377 | dm_writeb(DM1105_I2CDAT + byte + 2, data); |
a611d0ca | 378 | } |
5eb3291f | 379 | dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len)); |
a611d0ca IL |
380 | for (j = 0; j < 25; j++) { |
381 | mdelay(10); | |
5eb3291f | 382 | status = dm_readb(DM1105_I2CSTS); |
a611d0ca IL |
383 | if ((status & 0xc0) == 0x40) |
384 | break; | |
385 | } | |
386 | ||
387 | if (j >= 25) | |
388 | return -1; | |
ed7c847a IL |
389 | |
390 | k += 48; | |
391 | len -= 48; | |
392 | } while (len > 0); | |
393 | } else { | |
394 | /* write bytes */ | |
5eb3291f | 395 | dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1); |
ed7c847a IL |
396 | for (byte = 0; byte < msgs[i].len; byte++) { |
397 | data = msgs[i].buf[byte]; | |
5eb3291f | 398 | dm_writeb(DM1105_I2CDAT + byte + 1, data); |
ed7c847a | 399 | } |
5eb3291f | 400 | dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len); |
ed7c847a IL |
401 | for (j = 0; j < 25; j++) { |
402 | mdelay(10); | |
5eb3291f | 403 | status = dm_readb(DM1105_I2CSTS); |
ed7c847a IL |
404 | if ((status & 0xc0) == 0x40) |
405 | break; | |
a611d0ca | 406 | } |
ed7c847a IL |
407 | |
408 | if (j >= 25) | |
409 | return -1; | |
a611d0ca IL |
410 | } |
411 | } | |
412 | return num; | |
413 | err: | |
414 | return rc; | |
415 | } | |
416 | ||
417 | static u32 functionality(struct i2c_adapter *adap) | |
418 | { | |
419 | return I2C_FUNC_I2C; | |
420 | } | |
421 | ||
422 | static struct i2c_algorithm dm1105_algo = { | |
423 | .master_xfer = dm1105_i2c_xfer, | |
424 | .functionality = functionality, | |
425 | }; | |
426 | ||
34d2f9bf | 427 | static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed) |
a611d0ca | 428 | { |
34d2f9bf | 429 | return container_of(feed->demux, struct dm1105_dev, demux); |
a611d0ca IL |
430 | } |
431 | ||
34d2f9bf | 432 | static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe) |
a611d0ca | 433 | { |
34d2f9bf | 434 | return container_of(fe->dvb, struct dm1105_dev, dvb_adapter); |
a611d0ca IL |
435 | } |
436 | ||
34d2f9bf | 437 | static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
a611d0ca | 438 | { |
34d2f9bf | 439 | struct dm1105_dev *dev = frontend_to_dm1105_dev(fe); |
d8300df9 | 440 | u32 lnb_mask, lnb_13v, lnb_18v, lnb_off; |
a611d0ca | 441 | |
34d2f9bf | 442 | switch (dev->boardnr) { |
d8300df9 | 443 | case DM1105_BOARD_AXESS_DM05: |
519a4bdc | 444 | lnb_mask = DM05_LNB_MASK; |
d8300df9 | 445 | lnb_off = DM05_LNB_OFF; |
519a4bdc IL |
446 | lnb_13v = DM05_LNB_13V; |
447 | lnb_18v = DM05_LNB_18V; | |
448 | break; | |
d8300df9 IL |
449 | case DM1105_BOARD_DVBWORLD_2002: |
450 | case DM1105_BOARD_DVBWORLD_2004: | |
519a4bdc IL |
451 | default: |
452 | lnb_mask = DM1105_LNB_MASK; | |
d8300df9 | 453 | lnb_off = DM1105_LNB_OFF; |
519a4bdc IL |
454 | lnb_13v = DM1105_LNB_13V; |
455 | lnb_18v = DM1105_LNB_18V; | |
456 | } | |
457 | ||
5eb3291f | 458 | dm_writel(DM1105_GPIOCTR, lnb_mask); |
519a4bdc | 459 | if (voltage == SEC_VOLTAGE_18) |
5eb3291f | 460 | dm_writel(DM1105_GPIOVAL, lnb_18v); |
d8300df9 | 461 | else if (voltage == SEC_VOLTAGE_13) |
5eb3291f | 462 | dm_writel(DM1105_GPIOVAL, lnb_13v); |
d8300df9 | 463 | else |
5eb3291f | 464 | dm_writel(DM1105_GPIOVAL, lnb_off); |
a611d0ca IL |
465 | |
466 | return 0; | |
467 | } | |
468 | ||
34d2f9bf | 469 | static void dm1105_set_dma_addr(struct dm1105_dev *dev) |
a611d0ca | 470 | { |
5eb3291f | 471 | dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr)); |
a611d0ca IL |
472 | } |
473 | ||
34d2f9bf | 474 | static int __devinit dm1105_dma_map(struct dm1105_dev *dev) |
a611d0ca | 475 | { |
34d2f9bf IL |
476 | dev->ts_buf = pci_alloc_consistent(dev->pdev, |
477 | 6 * DM1105_DMA_BYTES, | |
478 | &dev->dma_addr); | |
a611d0ca | 479 | |
34d2f9bf | 480 | return !dev->ts_buf; |
a611d0ca IL |
481 | } |
482 | ||
34d2f9bf | 483 | static void dm1105_dma_unmap(struct dm1105_dev *dev) |
a611d0ca | 484 | { |
34d2f9bf IL |
485 | pci_free_consistent(dev->pdev, |
486 | 6 * DM1105_DMA_BYTES, | |
487 | dev->ts_buf, | |
488 | dev->dma_addr); | |
a611d0ca IL |
489 | } |
490 | ||
34d2f9bf | 491 | static void dm1105_enable_irqs(struct dm1105_dev *dev) |
a611d0ca | 492 | { |
5eb3291f IL |
493 | dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK); |
494 | dm_writeb(DM1105_CR, 1); | |
a611d0ca IL |
495 | } |
496 | ||
34d2f9bf | 497 | static void dm1105_disable_irqs(struct dm1105_dev *dev) |
a611d0ca | 498 | { |
5eb3291f IL |
499 | dm_writeb(DM1105_INTMAK, INTMAK_IRM); |
500 | dm_writeb(DM1105_CR, 0); | |
a611d0ca IL |
501 | } |
502 | ||
34d2f9bf | 503 | static int dm1105_start_feed(struct dvb_demux_feed *f) |
a611d0ca | 504 | { |
34d2f9bf | 505 | struct dm1105_dev *dev = feed_to_dm1105_dev(f); |
a611d0ca | 506 | |
34d2f9bf IL |
507 | if (dev->full_ts_users++ == 0) |
508 | dm1105_enable_irqs(dev); | |
a611d0ca IL |
509 | |
510 | return 0; | |
511 | } | |
512 | ||
34d2f9bf | 513 | static int dm1105_stop_feed(struct dvb_demux_feed *f) |
a611d0ca | 514 | { |
34d2f9bf | 515 | struct dm1105_dev *dev = feed_to_dm1105_dev(f); |
a611d0ca | 516 | |
34d2f9bf IL |
517 | if (--dev->full_ts_users == 0) |
518 | dm1105_disable_irqs(dev); | |
a611d0ca IL |
519 | |
520 | return 0; | |
521 | } | |
522 | ||
b72857dd IL |
523 | /* ir work handler */ |
524 | static void dm1105_emit_key(struct work_struct *work) | |
a611d0ca | 525 | { |
b72857dd | 526 | struct infrared *ir = container_of(work, struct infrared, work); |
a611d0ca IL |
527 | u32 ircom = ir->ir_command; |
528 | u8 data; | |
a611d0ca | 529 | |
d1498ffc IL |
530 | if (ir_debug) |
531 | printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom); | |
532 | ||
a611d0ca IL |
533 | data = (ircom >> 8) & 0x7f; |
534 | ||
15100d89 | 535 | ir_keydown(ir->input_dev, data, 0); |
a611d0ca IL |
536 | } |
537 | ||
d1498ffc IL |
538 | /* work handler */ |
539 | static void dm1105_dmx_buffer(struct work_struct *work) | |
540 | { | |
34d2f9bf | 541 | struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work); |
d1498ffc | 542 | unsigned int nbpackets; |
34d2f9bf IL |
543 | u32 oldwrp = dev->wrp; |
544 | u32 nextwrp = dev->nextwrp; | |
d1498ffc | 545 | |
34d2f9bf IL |
546 | if (!((dev->ts_buf[oldwrp] == 0x47) && |
547 | (dev->ts_buf[oldwrp + 188] == 0x47) && | |
548 | (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) { | |
549 | dev->PacketErrorCount++; | |
d1498ffc | 550 | /* bad packet found */ |
34d2f9bf IL |
551 | if ((dev->PacketErrorCount >= 2) && |
552 | (dev->dmarst == 0)) { | |
5eb3291f | 553 | dm_writeb(DM1105_RST, 1); |
34d2f9bf IL |
554 | dev->wrp = 0; |
555 | dev->PacketErrorCount = 0; | |
556 | dev->dmarst = 0; | |
d1498ffc IL |
557 | return; |
558 | } | |
559 | } | |
560 | ||
561 | if (nextwrp < oldwrp) { | |
34d2f9bf IL |
562 | memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp); |
563 | nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188; | |
d1498ffc IL |
564 | } else |
565 | nbpackets = (nextwrp - oldwrp) / 188; | |
566 | ||
34d2f9bf IL |
567 | dev->wrp = nextwrp; |
568 | dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets); | |
d1498ffc IL |
569 | } |
570 | ||
34d2f9bf | 571 | static irqreturn_t dm1105_irq(int irq, void *dev_id) |
a611d0ca | 572 | { |
34d2f9bf | 573 | struct dm1105_dev *dev = dev_id; |
a611d0ca IL |
574 | |
575 | /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */ | |
5eb3291f IL |
576 | unsigned int intsts = dm_readb(DM1105_INTSTS); |
577 | dm_writeb(DM1105_INTSTS, intsts); | |
a611d0ca IL |
578 | |
579 | switch (intsts) { | |
580 | case INTSTS_TSIRQ: | |
581 | case (INTSTS_TSIRQ | INTSTS_IR): | |
5eb3291f | 582 | dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR); |
34d2f9bf | 583 | queue_work(dev->wq, &dev->work); |
a611d0ca IL |
584 | break; |
585 | case INTSTS_IR: | |
5eb3291f | 586 | dev->ir.ir_command = dm_readl(DM1105_IRCODE); |
34d2f9bf | 587 | schedule_work(&dev->ir.work); |
a611d0ca IL |
588 | break; |
589 | } | |
a611d0ca | 590 | |
d1498ffc | 591 | return IRQ_HANDLED; |
a611d0ca IL |
592 | } |
593 | ||
34d2f9bf | 594 | int __devinit dm1105_ir_init(struct dm1105_dev *dm1105) |
a611d0ca IL |
595 | { |
596 | struct input_dev *input_dev; | |
84b14f18 | 597 | char *ir_codes = RC_MAP_DM1105_NEC; |
b72857dd | 598 | int err = -ENOMEM; |
a611d0ca IL |
599 | |
600 | input_dev = input_allocate_device(); | |
601 | if (!input_dev) | |
602 | return -ENOMEM; | |
603 | ||
604 | dm1105->ir.input_dev = input_dev; | |
605 | snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys), | |
606 | "pci-%s/ir0", pci_name(dm1105->pdev)); | |
607 | ||
a611d0ca | 608 | input_dev->name = "DVB on-card IR receiver"; |
a611d0ca IL |
609 | input_dev->phys = dm1105->ir.input_phys; |
610 | input_dev->id.bustype = BUS_PCI; | |
b72857dd | 611 | input_dev->id.version = 1; |
a611d0ca IL |
612 | if (dm1105->pdev->subsystem_vendor) { |
613 | input_dev->id.vendor = dm1105->pdev->subsystem_vendor; | |
614 | input_dev->id.product = dm1105->pdev->subsystem_device; | |
615 | } else { | |
616 | input_dev->id.vendor = dm1105->pdev->vendor; | |
617 | input_dev->id.product = dm1105->pdev->device; | |
618 | } | |
b72857dd | 619 | |
a611d0ca | 620 | input_dev->dev.parent = &dm1105->pdev->dev; |
b72857dd IL |
621 | |
622 | INIT_WORK(&dm1105->ir.work, dm1105_emit_key); | |
623 | ||
02858eed | 624 | err = ir_input_register(input_dev, ir_codes, NULL, MODULE_NAME); |
15100d89 DH |
625 | if (err < 0) { |
626 | input_free_device(input_dev); | |
627 | return err; | |
628 | } | |
a611d0ca | 629 | |
15100d89 | 630 | return 0; |
a611d0ca IL |
631 | } |
632 | ||
34d2f9bf | 633 | void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105) |
a611d0ca | 634 | { |
38ef6aa8 | 635 | ir_input_unregister(dm1105->ir.input_dev); |
a611d0ca IL |
636 | } |
637 | ||
34d2f9bf | 638 | static int __devinit dm1105_hw_init(struct dm1105_dev *dev) |
a611d0ca | 639 | { |
34d2f9bf | 640 | dm1105_disable_irqs(dev); |
a611d0ca | 641 | |
5eb3291f | 642 | dm_writeb(DM1105_HOST_CTR, 0); |
a611d0ca IL |
643 | |
644 | /*DATALEN 188,*/ | |
5eb3291f | 645 | dm_writeb(DM1105_DTALENTH, 188); |
a611d0ca | 646 | /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/ |
5eb3291f | 647 | dm_writew(DM1105_TSCTR, 0xc10a); |
a611d0ca IL |
648 | |
649 | /* map DMA and set address */ | |
34d2f9bf IL |
650 | dm1105_dma_map(dev); |
651 | dm1105_set_dma_addr(dev); | |
a611d0ca | 652 | /* big buffer */ |
5eb3291f IL |
653 | dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES); |
654 | dm_writeb(DM1105_INTCNT, 47); | |
a611d0ca IL |
655 | |
656 | /* IR NEC mode enable */ | |
5eb3291f IL |
657 | dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK)); |
658 | dm_writeb(DM1105_IRMODE, 0); | |
659 | dm_writew(DM1105_SYSTEMCODE, 0); | |
a611d0ca IL |
660 | |
661 | return 0; | |
662 | } | |
663 | ||
34d2f9bf | 664 | static void dm1105_hw_exit(struct dm1105_dev *dev) |
a611d0ca | 665 | { |
34d2f9bf | 666 | dm1105_disable_irqs(dev); |
a611d0ca IL |
667 | |
668 | /* IR disable */ | |
5eb3291f IL |
669 | dm_writeb(DM1105_IRCTR, 0); |
670 | dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK); | |
a611d0ca | 671 | |
34d2f9bf | 672 | dm1105_dma_unmap(dev); |
a611d0ca | 673 | } |
e4aab64c | 674 | |
d4305c68 IL |
675 | static struct stv0299_config sharp_z0194a_config = { |
676 | .demod_address = 0x68, | |
677 | .inittab = sharp_z0194a_inittab, | |
678 | .mclk = 88000000UL, | |
679 | .invert = 1, | |
680 | .skip_reinit = 0, | |
681 | .lock_output = STV0299_LOCKOUTPUT_1, | |
682 | .volt13_op0_op1 = STV0299_VOLT13_OP1, | |
683 | .min_delay_ms = 100, | |
684 | .set_symbol_rate = sharp_z0194a_set_symbol_rate, | |
685 | }; | |
686 | ||
a611d0ca IL |
687 | static struct stv0288_config earda_config = { |
688 | .demod_address = 0x68, | |
689 | .min_delay_ms = 100, | |
690 | }; | |
691 | ||
692 | static struct si21xx_config serit_config = { | |
693 | .demod_address = 0x68, | |
694 | .min_delay_ms = 100, | |
695 | ||
696 | }; | |
697 | ||
698 | static struct cx24116_config serit_sp2633_config = { | |
699 | .demod_address = 0x55, | |
700 | }; | |
a611d0ca | 701 | |
b4a0e816 IL |
702 | static struct ds3000_config dvbworld_ds3000_config = { |
703 | .demod_address = 0x68, | |
704 | }; | |
705 | ||
34d2f9bf | 706 | static int __devinit frontend_init(struct dm1105_dev *dev) |
a611d0ca IL |
707 | { |
708 | int ret; | |
709 | ||
34d2f9bf | 710 | switch (dev->boardnr) { |
d8300df9 | 711 | case DM1105_BOARD_DVBWORLD_2004: |
34d2f9bf | 712 | dev->fe = dvb_attach( |
519a4bdc | 713 | cx24116_attach, &serit_sp2633_config, |
34d2f9bf IL |
714 | &dev->i2c_adap); |
715 | if (dev->fe) { | |
716 | dev->fe->ops.set_voltage = dm1105_set_voltage; | |
b4a0e816 IL |
717 | break; |
718 | } | |
719 | ||
34d2f9bf | 720 | dev->fe = dvb_attach( |
b4a0e816 | 721 | ds3000_attach, &dvbworld_ds3000_config, |
34d2f9bf IL |
722 | &dev->i2c_adap); |
723 | if (dev->fe) | |
724 | dev->fe->ops.set_voltage = dm1105_set_voltage; | |
a611d0ca | 725 | |
519a4bdc | 726 | break; |
d8300df9 IL |
727 | case DM1105_BOARD_DVBWORLD_2002: |
728 | case DM1105_BOARD_AXESS_DM05: | |
519a4bdc | 729 | default: |
34d2f9bf | 730 | dev->fe = dvb_attach( |
519a4bdc | 731 | stv0299_attach, &sharp_z0194a_config, |
34d2f9bf IL |
732 | &dev->i2c_adap); |
733 | if (dev->fe) { | |
734 | dev->fe->ops.set_voltage = dm1105_set_voltage; | |
735 | dvb_attach(dvb_pll_attach, dev->fe, 0x60, | |
736 | &dev->i2c_adap, DVB_PLL_OPERA1); | |
519a4bdc | 737 | break; |
a611d0ca | 738 | } |
e4aab64c | 739 | |
34d2f9bf | 740 | dev->fe = dvb_attach( |
519a4bdc | 741 | stv0288_attach, &earda_config, |
34d2f9bf IL |
742 | &dev->i2c_adap); |
743 | if (dev->fe) { | |
744 | dev->fe->ops.set_voltage = dm1105_set_voltage; | |
745 | dvb_attach(stb6000_attach, dev->fe, 0x61, | |
746 | &dev->i2c_adap); | |
519a4bdc | 747 | break; |
a611d0ca | 748 | } |
e4aab64c | 749 | |
34d2f9bf | 750 | dev->fe = dvb_attach( |
519a4bdc | 751 | si21xx_attach, &serit_config, |
34d2f9bf IL |
752 | &dev->i2c_adap); |
753 | if (dev->fe) | |
754 | dev->fe->ops.set_voltage = dm1105_set_voltage; | |
519a4bdc | 755 | |
a611d0ca IL |
756 | } |
757 | ||
34d2f9bf IL |
758 | if (!dev->fe) { |
759 | dev_err(&dev->pdev->dev, "could not attach frontend\n"); | |
a611d0ca IL |
760 | return -ENODEV; |
761 | } | |
762 | ||
34d2f9bf | 763 | ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe); |
a611d0ca | 764 | if (ret < 0) { |
34d2f9bf IL |
765 | if (dev->fe->ops.release) |
766 | dev->fe->ops.release(dev->fe); | |
767 | dev->fe = NULL; | |
a611d0ca IL |
768 | return ret; |
769 | } | |
770 | ||
771 | return 0; | |
772 | } | |
773 | ||
34d2f9bf | 774 | static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac) |
a611d0ca IL |
775 | { |
776 | static u8 command[1] = { 0x28 }; | |
777 | ||
778 | struct i2c_msg msg[] = { | |
519a4bdc IL |
779 | { |
780 | .addr = IIC_24C01_addr >> 1, | |
781 | .flags = 0, | |
782 | .buf = command, | |
783 | .len = 1 | |
784 | }, { | |
785 | .addr = IIC_24C01_addr >> 1, | |
786 | .flags = I2C_M_RD, | |
787 | .buf = mac, | |
788 | .len = 6 | |
789 | }, | |
a611d0ca IL |
790 | }; |
791 | ||
34d2f9bf IL |
792 | dm1105_i2c_xfer(&dev->i2c_adap, msg , 2); |
793 | dev_info(&dev->pdev->dev, "MAC %pM\n", mac); | |
a611d0ca IL |
794 | } |
795 | ||
796 | static int __devinit dm1105_probe(struct pci_dev *pdev, | |
797 | const struct pci_device_id *ent) | |
798 | { | |
34d2f9bf | 799 | struct dm1105_dev *dev; |
a611d0ca IL |
800 | struct dvb_adapter *dvb_adapter; |
801 | struct dvb_demux *dvbdemux; | |
802 | struct dmx_demux *dmx; | |
803 | int ret = -ENOMEM; | |
d8300df9 | 804 | int i; |
a611d0ca | 805 | |
34d2f9bf IL |
806 | dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL); |
807 | if (!dev) | |
d1498ffc | 808 | return -ENOMEM; |
a611d0ca | 809 | |
d8300df9 | 810 | /* board config */ |
34d2f9bf IL |
811 | dev->nr = dm1105_devcount; |
812 | dev->boardnr = UNSET; | |
813 | if (card[dev->nr] < ARRAY_SIZE(dm1105_boards)) | |
814 | dev->boardnr = card[dev->nr]; | |
815 | for (i = 0; UNSET == dev->boardnr && | |
d8300df9 IL |
816 | i < ARRAY_SIZE(dm1105_subids); i++) |
817 | if (pdev->subsystem_vendor == | |
818 | dm1105_subids[i].subvendor && | |
819 | pdev->subsystem_device == | |
820 | dm1105_subids[i].subdevice) | |
34d2f9bf | 821 | dev->boardnr = dm1105_subids[i].card; |
d8300df9 | 822 | |
34d2f9bf IL |
823 | if (UNSET == dev->boardnr) { |
824 | dev->boardnr = DM1105_BOARD_UNKNOWN; | |
d8300df9 IL |
825 | dm1105_card_list(pdev); |
826 | } | |
827 | ||
828 | dm1105_devcount++; | |
34d2f9bf IL |
829 | dev->pdev = pdev; |
830 | dev->buffer_size = 5 * DM1105_DMA_BYTES; | |
831 | dev->PacketErrorCount = 0; | |
832 | dev->dmarst = 0; | |
a611d0ca IL |
833 | |
834 | ret = pci_enable_device(pdev); | |
835 | if (ret < 0) | |
836 | goto err_kfree; | |
837 | ||
284901a9 | 838 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
a611d0ca IL |
839 | if (ret < 0) |
840 | goto err_pci_disable_device; | |
841 | ||
842 | pci_set_master(pdev); | |
843 | ||
844 | ret = pci_request_regions(pdev, DRIVER_NAME); | |
845 | if (ret < 0) | |
846 | goto err_pci_disable_device; | |
847 | ||
34d2f9bf IL |
848 | dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0)); |
849 | if (!dev->io_mem) { | |
a611d0ca IL |
850 | ret = -EIO; |
851 | goto err_pci_release_regions; | |
852 | } | |
853 | ||
34d2f9bf IL |
854 | spin_lock_init(&dev->lock); |
855 | pci_set_drvdata(pdev, dev); | |
a611d0ca | 856 | |
34d2f9bf | 857 | ret = dm1105_hw_init(dev); |
a611d0ca | 858 | if (ret < 0) |
d1498ffc | 859 | goto err_pci_iounmap; |
a611d0ca IL |
860 | |
861 | /* i2c */ | |
34d2f9bf IL |
862 | i2c_set_adapdata(&dev->i2c_adap, dev); |
863 | strcpy(dev->i2c_adap.name, DRIVER_NAME); | |
864 | dev->i2c_adap.owner = THIS_MODULE; | |
865 | dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL; | |
866 | dev->i2c_adap.dev.parent = &pdev->dev; | |
867 | dev->i2c_adap.algo = &dm1105_algo; | |
868 | dev->i2c_adap.algo_data = dev; | |
869 | ret = i2c_add_adapter(&dev->i2c_adap); | |
a611d0ca IL |
870 | |
871 | if (ret < 0) | |
34d2f9bf | 872 | goto err_dm1105_hw_exit; |
a611d0ca IL |
873 | |
874 | /* dvb */ | |
34d2f9bf | 875 | ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME, |
a611d0ca IL |
876 | THIS_MODULE, &pdev->dev, adapter_nr); |
877 | if (ret < 0) | |
878 | goto err_i2c_del_adapter; | |
879 | ||
34d2f9bf | 880 | dvb_adapter = &dev->dvb_adapter; |
a611d0ca | 881 | |
34d2f9bf | 882 | dm1105_read_mac(dev, dvb_adapter->proposed_mac); |
a611d0ca | 883 | |
34d2f9bf | 884 | dvbdemux = &dev->demux; |
a611d0ca IL |
885 | dvbdemux->filternum = 256; |
886 | dvbdemux->feednum = 256; | |
34d2f9bf IL |
887 | dvbdemux->start_feed = dm1105_start_feed; |
888 | dvbdemux->stop_feed = dm1105_stop_feed; | |
a611d0ca IL |
889 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | |
890 | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); | |
891 | ret = dvb_dmx_init(dvbdemux); | |
892 | if (ret < 0) | |
893 | goto err_dvb_unregister_adapter; | |
894 | ||
895 | dmx = &dvbdemux->dmx; | |
34d2f9bf IL |
896 | dev->dmxdev.filternum = 256; |
897 | dev->dmxdev.demux = dmx; | |
898 | dev->dmxdev.capabilities = 0; | |
a611d0ca | 899 | |
34d2f9bf | 900 | ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter); |
a611d0ca IL |
901 | if (ret < 0) |
902 | goto err_dvb_dmx_release; | |
903 | ||
34d2f9bf | 904 | dev->hw_frontend.source = DMX_FRONTEND_0; |
a611d0ca | 905 | |
34d2f9bf | 906 | ret = dmx->add_frontend(dmx, &dev->hw_frontend); |
a611d0ca IL |
907 | if (ret < 0) |
908 | goto err_dvb_dmxdev_release; | |
909 | ||
34d2f9bf | 910 | dev->mem_frontend.source = DMX_MEMORY_FE; |
a611d0ca | 911 | |
34d2f9bf | 912 | ret = dmx->add_frontend(dmx, &dev->mem_frontend); |
a611d0ca IL |
913 | if (ret < 0) |
914 | goto err_remove_hw_frontend; | |
915 | ||
34d2f9bf | 916 | ret = dmx->connect_frontend(dmx, &dev->hw_frontend); |
a611d0ca IL |
917 | if (ret < 0) |
918 | goto err_remove_mem_frontend; | |
919 | ||
34d2f9bf | 920 | ret = frontend_init(dev); |
a611d0ca IL |
921 | if (ret < 0) |
922 | goto err_disconnect_frontend; | |
923 | ||
34d2f9bf IL |
924 | dvb_net_init(dvb_adapter, &dev->dvbnet, dmx); |
925 | dm1105_ir_init(dev); | |
d1498ffc | 926 | |
34d2f9bf IL |
927 | INIT_WORK(&dev->work, dm1105_dmx_buffer); |
928 | sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num); | |
929 | dev->wq = create_singlethread_workqueue(dev->wqn); | |
930 | if (!dev->wq) | |
519a4bdc | 931 | goto err_dvb_net; |
d1498ffc | 932 | |
34d2f9bf IL |
933 | ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED, |
934 | DRIVER_NAME, dev); | |
d1498ffc | 935 | if (ret < 0) |
519a4bdc | 936 | goto err_workqueue; |
d1498ffc IL |
937 | |
938 | return 0; | |
a611d0ca | 939 | |
519a4bdc | 940 | err_workqueue: |
34d2f9bf | 941 | destroy_workqueue(dev->wq); |
519a4bdc | 942 | err_dvb_net: |
34d2f9bf | 943 | dvb_net_release(&dev->dvbnet); |
a611d0ca IL |
944 | err_disconnect_frontend: |
945 | dmx->disconnect_frontend(dmx); | |
946 | err_remove_mem_frontend: | |
34d2f9bf | 947 | dmx->remove_frontend(dmx, &dev->mem_frontend); |
a611d0ca | 948 | err_remove_hw_frontend: |
34d2f9bf | 949 | dmx->remove_frontend(dmx, &dev->hw_frontend); |
a611d0ca | 950 | err_dvb_dmxdev_release: |
34d2f9bf | 951 | dvb_dmxdev_release(&dev->dmxdev); |
a611d0ca IL |
952 | err_dvb_dmx_release: |
953 | dvb_dmx_release(dvbdemux); | |
954 | err_dvb_unregister_adapter: | |
955 | dvb_unregister_adapter(dvb_adapter); | |
956 | err_i2c_del_adapter: | |
34d2f9bf IL |
957 | i2c_del_adapter(&dev->i2c_adap); |
958 | err_dm1105_hw_exit: | |
959 | dm1105_hw_exit(dev); | |
a611d0ca | 960 | err_pci_iounmap: |
34d2f9bf | 961 | pci_iounmap(pdev, dev->io_mem); |
a611d0ca IL |
962 | err_pci_release_regions: |
963 | pci_release_regions(pdev); | |
964 | err_pci_disable_device: | |
965 | pci_disable_device(pdev); | |
966 | err_kfree: | |
967 | pci_set_drvdata(pdev, NULL); | |
34d2f9bf | 968 | kfree(dev); |
d1498ffc | 969 | return ret; |
a611d0ca IL |
970 | } |
971 | ||
972 | static void __devexit dm1105_remove(struct pci_dev *pdev) | |
973 | { | |
34d2f9bf IL |
974 | struct dm1105_dev *dev = pci_get_drvdata(pdev); |
975 | struct dvb_adapter *dvb_adapter = &dev->dvb_adapter; | |
976 | struct dvb_demux *dvbdemux = &dev->demux; | |
a611d0ca IL |
977 | struct dmx_demux *dmx = &dvbdemux->dmx; |
978 | ||
34d2f9bf | 979 | dm1105_ir_exit(dev); |
a611d0ca | 980 | dmx->close(dmx); |
34d2f9bf IL |
981 | dvb_net_release(&dev->dvbnet); |
982 | if (dev->fe) | |
983 | dvb_unregister_frontend(dev->fe); | |
a611d0ca IL |
984 | |
985 | dmx->disconnect_frontend(dmx); | |
34d2f9bf IL |
986 | dmx->remove_frontend(dmx, &dev->mem_frontend); |
987 | dmx->remove_frontend(dmx, &dev->hw_frontend); | |
988 | dvb_dmxdev_release(&dev->dmxdev); | |
a611d0ca IL |
989 | dvb_dmx_release(dvbdemux); |
990 | dvb_unregister_adapter(dvb_adapter); | |
34d2f9bf IL |
991 | if (&dev->i2c_adap) |
992 | i2c_del_adapter(&dev->i2c_adap); | |
a611d0ca | 993 | |
34d2f9bf | 994 | dm1105_hw_exit(dev); |
a611d0ca | 995 | synchronize_irq(pdev->irq); |
34d2f9bf IL |
996 | free_irq(pdev->irq, dev); |
997 | pci_iounmap(pdev, dev->io_mem); | |
a611d0ca IL |
998 | pci_release_regions(pdev); |
999 | pci_disable_device(pdev); | |
1000 | pci_set_drvdata(pdev, NULL); | |
d8300df9 | 1001 | dm1105_devcount--; |
34d2f9bf | 1002 | kfree(dev); |
a611d0ca IL |
1003 | } |
1004 | ||
1005 | static struct pci_device_id dm1105_id_table[] __devinitdata = { | |
1006 | { | |
1007 | .vendor = PCI_VENDOR_ID_TRIGEM, | |
1008 | .device = PCI_DEVICE_ID_DM1105, | |
1009 | .subvendor = PCI_ANY_ID, | |
d8300df9 | 1010 | .subdevice = PCI_ANY_ID, |
519a4bdc IL |
1011 | }, { |
1012 | .vendor = PCI_VENDOR_ID_AXESS, | |
1013 | .device = PCI_DEVICE_ID_DM05, | |
d8300df9 IL |
1014 | .subvendor = PCI_ANY_ID, |
1015 | .subdevice = PCI_ANY_ID, | |
a611d0ca IL |
1016 | }, { |
1017 | /* empty */ | |
1018 | }, | |
1019 | }; | |
1020 | ||
1021 | MODULE_DEVICE_TABLE(pci, dm1105_id_table); | |
1022 | ||
1023 | static struct pci_driver dm1105_driver = { | |
1024 | .name = DRIVER_NAME, | |
1025 | .id_table = dm1105_id_table, | |
1026 | .probe = dm1105_probe, | |
1027 | .remove = __devexit_p(dm1105_remove), | |
1028 | }; | |
1029 | ||
1030 | static int __init dm1105_init(void) | |
1031 | { | |
1032 | return pci_register_driver(&dm1105_driver); | |
1033 | } | |
1034 | ||
1035 | static void __exit dm1105_exit(void) | |
1036 | { | |
1037 | pci_unregister_driver(&dm1105_driver); | |
1038 | } | |
1039 | ||
1040 | module_init(dm1105_init); | |
1041 | module_exit(dm1105_exit); | |
1042 | ||
1043 | MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>"); | |
1044 | MODULE_DESCRIPTION("SDMC DM1105 DVB driver"); | |
1045 | MODULE_LICENSE("GPL"); |