]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/media/common/tuners/mt2131.c
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[net-next-2.6.git] / drivers / media / common / tuners / mt2131.c
CommitLineData
f47623a0
ST
1/*
2 * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
f47623a0
ST
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
f47623a0
ST
23#include <linux/delay.h>
24#include <linux/dvb/frontend.h>
25#include <linux/i2c.h>
5a0e3ad6 26#include <linux/slab.h>
f47623a0
ST
27
28#include "dvb_frontend.h"
29
30#include "mt2131.h"
31#include "mt2131_priv.h"
32
33static int debug;
34module_param(debug, int, 0644);
35MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
36
37#define dprintk(level,fmt, arg...) if (debug >= level) \
38 printk(KERN_INFO "%s: " fmt, "mt2131", ## arg)
39
40static u8 mt2131_config1[] = {
41 0x01,
42 0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88,
43 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
44 0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80,
45 0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00
46};
47
48static u8 mt2131_config2[] = {
49 0x10,
50 0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
51};
52
53static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val)
54{
55 struct i2c_msg msg[2] = {
3873dd04
MK
56 { .addr = priv->cfg->i2c_address, .flags = 0,
57 .buf = &reg, .len = 1 },
58 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
59 .buf = val, .len = 1 },
f47623a0
ST
60 };
61
62 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
63 printk(KERN_WARNING "mt2131 I2C read failed\n");
64 return -EREMOTEIO;
65 }
66 return 0;
67}
68
69static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val)
70{
71 u8 buf[2] = { reg, val };
3873dd04
MK
72 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0,
73 .buf = buf, .len = 2 };
f47623a0
ST
74
75 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
76 printk(KERN_WARNING "mt2131 I2C write failed\n");
77 return -EREMOTEIO;
78 }
79 return 0;
80}
81
82static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
83{
3873dd04
MK
84 struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
85 .flags = 0, .buf = buf, .len = len };
f47623a0
ST
86
87 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
3873dd04
MK
88 printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n",
89 (int)len);
f47623a0
ST
90 return -EREMOTEIO;
91 }
92 return 0;
93}
94
3873dd04
MK
95static int mt2131_set_params(struct dvb_frontend *fe,
96 struct dvb_frontend_parameters *params)
f47623a0
ST
97{
98 struct mt2131_priv *priv;
99 int ret=0, i;
100 u32 freq;
101 u8 if_band_center;
3873dd04
MK
102 u32 f_lo1, f_lo2;
103 u32 div1, num1, div2, num2;
f47623a0
ST
104 u8 b[8];
105 u8 lockval = 0;
106
107 priv = fe->tuner_priv;
108 if (fe->ops.info.type == FE_OFDM)
109 priv->bandwidth = params->u.ofdm.bandwidth;
110 else
111 priv->bandwidth = 0;
112
113 freq = params->frequency / 1000; // Hz -> kHz
271ddbf7 114 dprintk(1, "%s() freq=%d\n", __func__, freq);
f47623a0
ST
115
116 f_lo1 = freq + MT2131_IF1 * 1000;
117 f_lo1 = (f_lo1 / 250) * 250;
118 f_lo2 = f_lo1 - freq - MT2131_IF2;
119
195ccf67 120 priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000;
f47623a0
ST
121
122 /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */
123 num1 = f_lo1 * 64 / (MT2131_FREF / 128);
124 div1 = num1 / 8192;
125 num1 &= 0x1fff;
126
127 /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */
128 num2 = f_lo2 * 64 / (MT2131_FREF / 128);
129 div2 = num2 / 8192;
130 num2 &= 0x1fff;
131
132 if (freq <= 82500) if_band_center = 0x00; else
133 if (freq <= 137500) if_band_center = 0x01; else
134 if (freq <= 192500) if_band_center = 0x02; else
135 if (freq <= 247500) if_band_center = 0x03; else
136 if (freq <= 302500) if_band_center = 0x04; else
137 if (freq <= 357500) if_band_center = 0x05; else
138 if (freq <= 412500) if_band_center = 0x06; else
139 if (freq <= 467500) if_band_center = 0x07; else
140 if (freq <= 522500) if_band_center = 0x08; else
141 if (freq <= 577500) if_band_center = 0x09; else
142 if (freq <= 632500) if_band_center = 0x0A; else
143 if (freq <= 687500) if_band_center = 0x0B; else
144 if (freq <= 742500) if_band_center = 0x0C; else
145 if (freq <= 797500) if_band_center = 0x0D; else
146 if (freq <= 852500) if_band_center = 0x0E; else
147 if (freq <= 907500) if_band_center = 0x0F; else
148 if (freq <= 962500) if_band_center = 0x10; else
149 if (freq <= 1017500) if_band_center = 0x11; else
150 if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13;
151
152 b[0] = 1;
153 b[1] = (num1 >> 5) & 0xFF;
154 b[2] = (num1 & 0x1F);
155 b[3] = div1;
156 b[4] = (num2 >> 5) & 0xFF;
157 b[5] = num2 & 0x1F;
158 b[6] = div2;
159
160 dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2);
161 dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center);
162 dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2);
163 dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n",
164 (int)div1, (int)num1, (int)div2, (int)num2);
165 dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n",
166 (int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5],
167 (int)b[6]);
168
169 ret = mt2131_writeregs(priv,b,7);
170 if (ret < 0)
171 return ret;
172
173 mt2131_writereg(priv, 0x0b, if_band_center);
174
175 /* Wait for lock */
176 i = 0;
177 do {
178 mt2131_readreg(priv, 0x08, &lockval);
179 if ((lockval & 0x88) == 0x88)
180 break;
181 msleep(4);
182 i++;
183 } while (i < 10);
184
185 return ret;
186}
187
188static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
189{
190 struct mt2131_priv *priv = fe->tuner_priv;
271ddbf7 191 dprintk(1, "%s()\n", __func__);
f47623a0
ST
192 *frequency = priv->frequency;
193 return 0;
194}
195
196static int mt2131_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
197{
198 struct mt2131_priv *priv = fe->tuner_priv;
271ddbf7 199 dprintk(1, "%s()\n", __func__);
f47623a0
ST
200 *bandwidth = priv->bandwidth;
201 return 0;
202}
203
204static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
205{
206 struct mt2131_priv *priv = fe->tuner_priv;
207 u8 lock_status = 0;
208 u8 afc_status = 0;
209
210 *status = 0;
211
212 mt2131_readreg(priv, 0x08, &lock_status);
213 if ((lock_status & 0x88) == 0x88)
214 *status = TUNER_STATUS_LOCKED;
215
216 mt2131_readreg(priv, 0x09, &afc_status);
217 dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n",
271ddbf7 218 __func__, lock_status, afc_status);
f47623a0
ST
219
220 return 0;
221}
222
223static int mt2131_init(struct dvb_frontend *fe)
224{
225 struct mt2131_priv *priv = fe->tuner_priv;
226 int ret;
271ddbf7 227 dprintk(1, "%s()\n", __func__);
f47623a0 228
3873dd04
MK
229 if ((ret = mt2131_writeregs(priv, mt2131_config1,
230 sizeof(mt2131_config1))) < 0)
f47623a0
ST
231 return ret;
232
233 mt2131_writereg(priv, 0x0b, 0x09);
234 mt2131_writereg(priv, 0x15, 0x47);
235 mt2131_writereg(priv, 0x07, 0xf2);
236 mt2131_writereg(priv, 0x0b, 0x01);
237
3873dd04
MK
238 if ((ret = mt2131_writeregs(priv, mt2131_config2,
239 sizeof(mt2131_config2))) < 0)
f47623a0
ST
240 return ret;
241
242 return ret;
243}
244
245static int mt2131_release(struct dvb_frontend *fe)
246{
271ddbf7 247 dprintk(1, "%s()\n", __func__);
f47623a0
ST
248 kfree(fe->tuner_priv);
249 fe->tuner_priv = NULL;
250 return 0;
251}
252
253static const struct dvb_tuner_ops mt2131_tuner_ops = {
254 .info = {
255 .name = "Microtune MT2131",
256 .frequency_min = 48000000,
257 .frequency_max = 860000000,
258 .frequency_step = 50000,
259 },
260
261 .release = mt2131_release,
262 .init = mt2131_init,
263
264 .set_params = mt2131_set_params,
265 .get_frequency = mt2131_get_frequency,
266 .get_bandwidth = mt2131_get_bandwidth,
267 .get_status = mt2131_get_status
268};
269
3873dd04
MK
270struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
271 struct i2c_adapter *i2c,
272 struct mt2131_config *cfg, u16 if1)
f47623a0
ST
273{
274 struct mt2131_priv *priv = NULL;
275 u8 id = 0;
276
271ddbf7 277 dprintk(1, "%s()\n", __func__);
f47623a0
ST
278
279 priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL);
280 if (priv == NULL)
281 return NULL;
282
283 priv->cfg = cfg;
284 priv->bandwidth = 6000000; /* 6MHz */
285 priv->i2c = i2c;
286
287 if (mt2131_readreg(priv, 0, &id) != 0) {
288 kfree(priv);
289 return NULL;
290 }
291 if ( (id != 0x3E) && (id != 0x3F) ) {
3873dd04
MK
292 printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n",
293 cfg->i2c_address);
f47623a0
ST
294 kfree(priv);
295 return NULL;
296 }
297
3873dd04
MK
298 printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n",
299 cfg->i2c_address);
300 memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops,
301 sizeof(struct dvb_tuner_ops));
f47623a0
ST
302
303 fe->tuner_priv = priv;
304 return fe;
305}
306EXPORT_SYMBOL(mt2131_attach);
307
308MODULE_AUTHOR("Steven Toth");
309MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver");
310MODULE_LICENSE("GPL");
3873dd04
MK
311
312/*
313 * Local variables:
314 * c-basic-offset: 8
315 */