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[net-next-2.6.git] / drivers / macintosh / via-pmu.c
CommitLineData
1da177e4
LT
1/*
2 * Device driver for the via-pmu on Apple Powermacs.
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBook 3400 and 2400.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
12 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 13 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT
14 *
15 * THIS DRIVER IS BECOMING A TOTAL MESS !
16 * - Cleanup atomically disabling reply to PMU events after
17 * a sleep or a freq. switch
1da177e4
LT
18 *
19 */
20#include <stdarg.h>
ffe83733 21#include <linux/smp_lock.h>
1da177e4
LT
22#include <linux/types.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/delay.h>
26#include <linux/sched.h>
27#include <linux/miscdevice.h>
28#include <linux/blkdev.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/poll.h>
32#include <linux/adb.h>
33#include <linux/pmu.h>
34#include <linux/cuda.h>
1da177e4
LT
35#include <linux/module.h>
36#include <linux/spinlock.h>
37#include <linux/pm.h>
38#include <linux/proc_fs.h>
9d2f7342 39#include <linux/seq_file.h>
1da177e4
LT
40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/device.h>
43#include <linux/sysdev.h>
7dfb7103 44#include <linux/freezer.h>
1da177e4 45#include <linux/syscalls.h>
6002f544 46#include <linux/suspend.h>
1da177e4
LT
47#include <linux/cpu.h>
48#include <asm/prom.h>
49#include <asm/machdep.h>
50#include <asm/io.h>
51#include <asm/pgtable.h>
52#include <asm/system.h>
53#include <asm/sections.h>
54#include <asm/irq.h>
55#include <asm/pmac_feature.h>
5b9ca526
BH
56#include <asm/pmac_pfunc.h>
57#include <asm/pmac_low_i2c.h>
1da177e4
LT
58#include <asm/uaccess.h>
59#include <asm/mmu_context.h>
60#include <asm/cputable.h>
61#include <asm/time.h>
1da177e4 62#include <asm/backlight.h>
1da177e4 63
9e8e30a0
JB
64#include "via-pmu-event.h"
65
1da177e4 66/* Some compile options */
f91266ed 67#undef DEBUG_SLEEP
1da177e4
LT
68
69/* Misc minor number allocated for /dev/pmu */
70#define PMU_MINOR 154
71
72/* How many iterations between battery polls */
73#define BATTERY_POLLING_COUNT 2
74
75static volatile unsigned char __iomem *via;
76
77/* VIA registers - spaced 0x200 bytes apart */
78#define RS 0x200 /* skip between registers */
79#define B 0 /* B-side data */
80#define A RS /* A-side data */
81#define DIRB (2*RS) /* B-side direction (1=output) */
82#define DIRA (3*RS) /* A-side direction (1=output) */
83#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
84#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
85#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
86#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
87#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
88#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
89#define SR (10*RS) /* Shift register */
90#define ACR (11*RS) /* Auxiliary control register */
91#define PCR (12*RS) /* Peripheral control register */
92#define IFR (13*RS) /* Interrupt flag register */
93#define IER (14*RS) /* Interrupt enable register */
94#define ANH (15*RS) /* A-side data, no handshake */
95
96/* Bits in B data register: both active low */
97#define TACK 0x08 /* Transfer acknowledge (input) */
98#define TREQ 0x10 /* Transfer request (output) */
99
100/* Bits in ACR */
101#define SR_CTRL 0x1c /* Shift register control bits */
102#define SR_EXT 0x0c /* Shift on external clock */
103#define SR_OUT 0x10 /* Shift out if 1 */
104
105/* Bits in IFR and IER */
106#define IER_SET 0x80 /* set bits in IER */
107#define IER_CLR 0 /* clear bits in IER */
108#define SR_INT 0x04 /* Shift register full/empty */
109#define CB2_INT 0x08
110#define CB1_INT 0x10 /* transition on CB1 input */
111
112static volatile enum pmu_state {
113 idle,
114 sending,
115 intack,
116 reading,
117 reading_intr,
118 locked,
119} pmu_state;
120
121static volatile enum int_data_state {
122 int_data_empty,
123 int_data_fill,
124 int_data_ready,
125 int_data_flush
126} int_data_state[2] = { int_data_empty, int_data_empty };
127
128static struct adb_request *current_req;
129static struct adb_request *last_req;
130static struct adb_request *req_awaiting_reply;
131static unsigned char interrupt_data[2][32];
132static int interrupt_data_len[2];
133static int int_data_last;
134static unsigned char *reply_ptr;
135static int data_index;
136static int data_len;
137static volatile int adb_int_pending;
138static volatile int disable_poll;
1da177e4
LT
139static struct device_node *vias;
140static int pmu_kind = PMU_UNKNOWN;
87275856 141static int pmu_fully_inited;
1da177e4 142static int pmu_has_adb;
51d3082f 143static struct device_node *gpio_node;
87275856 144static unsigned char __iomem *gpio_reg;
0ebfff14 145static int gpio_irq = NO_IRQ;
1da177e4 146static int gpio_irq_enabled = -1;
87275856 147static volatile int pmu_suspended;
1da177e4
LT
148static spinlock_t pmu_lock;
149static u8 pmu_intr_mask;
150static int pmu_version;
151static int drop_interrupts;
f91266ed 152#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 153static int option_lid_wakeup = 1;
f91266ed 154#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
155static unsigned long async_req_locks;
156static unsigned int pmu_irq_stats[11];
157
158static struct proc_dir_entry *proc_pmu_root;
159static struct proc_dir_entry *proc_pmu_info;
160static struct proc_dir_entry *proc_pmu_irqstats;
161static struct proc_dir_entry *proc_pmu_options;
162static int option_server_mode;
163
1da177e4
LT
164int pmu_battery_count;
165int pmu_cur_battery;
a334bdbd 166unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT
167struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
168static int query_batt_timer = BATTERY_POLLING_COUNT;
169static struct adb_request batt_req;
170static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 171
1da177e4
LT
172int __fake_sleep;
173int asleep;
1da177e4
LT
174
175#ifdef CONFIG_ADB
87275856 176static int adb_dev_map;
1da177e4
LT
177static int pmu_adb_flags;
178
179static int pmu_probe(void);
180static int pmu_init(void);
181static int pmu_send_request(struct adb_request *req, int sync);
182static int pmu_adb_autopoll(int devs);
183static int pmu_adb_reset_bus(void);
184#endif /* CONFIG_ADB */
185
186static int init_pmu(void);
1da177e4 187static void pmu_start(void);
7d12e780
DH
188static irqreturn_t via_pmu_interrupt(int irq, void *arg);
189static irqreturn_t gpio1_interrupt(int irq, void *arg);
9d2f7342
AD
190static const struct file_operations pmu_info_proc_fops;
191static const struct file_operations pmu_irqstats_proc_fops;
1da177e4 192static void pmu_pass_intr(unsigned char *data, int len);
9d2f7342
AD
193static const struct file_operations pmu_battery_proc_fops;
194static const struct file_operations pmu_options_proc_fops;
1da177e4
LT
195
196#ifdef CONFIG_ADB
197struct adb_driver via_pmu_driver = {
198 "PMU",
199 pmu_probe,
200 pmu_init,
201 pmu_send_request,
202 pmu_adb_autopoll,
203 pmu_poll_adb,
204 pmu_adb_reset_bus
205};
206#endif /* CONFIG_ADB */
207
208extern void low_sleep_handler(void);
209extern void enable_kernel_altivec(void);
210extern void enable_kernel_fp(void);
211
212#ifdef DEBUG_SLEEP
213int pmu_polled_request(struct adb_request *req);
f91266ed 214void pmu_blink(int n);
1da177e4
LT
215#endif
216
217/*
218 * This table indicates for each PMU opcode:
219 * - the number of data bytes to be sent with the command, or -1
220 * if a length byte should be sent,
221 * - the number of response bytes which the PMU will return, or
222 * -1 if it will send a length byte.
223 */
aacaf9bd 224static const s8 pmu_data_len[256][2] = {
1da177e4
LT
225/* 0 1 2 3 4 5 6 7 */
226/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
227/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
228/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
229/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
230/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
231/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
232/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
233/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
234/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
235/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
236/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
237/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
238/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
239/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
240/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
241/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
242/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
243/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
244/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
246/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
247/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
248/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
249/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
250/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
251/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
252/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
254/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
255/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
256/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
258};
259
260static char *pbook_type[] = {
261 "Unknown PowerBook",
262 "PowerBook 2400/3400/3500(G3)",
263 "PowerBook G3 Series",
264 "1999 PowerBook G3",
265 "Core99"
266};
267
51d3082f 268int __init find_via_pmu(void)
1da177e4 269{
cc5d0189 270 u64 taddr;
018a3d1d 271 const u32 *reg;
51d3082f 272
1da177e4
LT
273 if (via != 0)
274 return 1;
51d3082f
BH
275 vias = of_find_node_by_name(NULL, "via-pmu");
276 if (vias == NULL)
1da177e4 277 return 0;
1da177e4 278
01b2726d 279 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH
280 if (reg == NULL) {
281 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
282 goto fail;
283 }
284 taddr = of_translate_address(vias, reg);
bb6b9b28 285 if (taddr == OF_BAD_ADDR) {
51d3082f
BH
286 printk(KERN_ERR "via-pmu: Can't translate address !\n");
287 goto fail;
1da177e4
LT
288 }
289
290 spin_lock_init(&pmu_lock);
291
292 pmu_has_adb = 1;
293
294 pmu_intr_mask = PMU_INT_PCEJECT |
295 PMU_INT_SNDBRT |
296 PMU_INT_ADB |
297 PMU_INT_TICK;
298
299 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
55b61fec 300 || of_device_is_compatible(vias->parent, "ohare")))
1da177e4 301 pmu_kind = PMU_OHARE_BASED;
55b61fec 302 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 303 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 304 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 305 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR
306 else if (of_device_is_compatible(vias->parent, "Keylargo")
307 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 308 struct device_node *gpiop;
1658ab66 309 struct device_node *adbp;
cc5d0189 310 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT
311
312 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR
313 adbp = of_find_node_by_type(NULL, "adb");
314 pmu_has_adb = (adbp != NULL);
315 of_node_put(adbp);
1da177e4
LT
316 pmu_intr_mask = PMU_INT_PCEJECT |
317 PMU_INT_SNDBRT |
318 PMU_INT_ADB |
319 PMU_INT_TICK |
320 PMU_INT_ENVIRONMENT;
321
51d3082f
BH
322 gpiop = of_find_node_by_name(NULL, "gpio");
323 if (gpiop) {
01b2726d 324 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH
325 if (reg)
326 gaddr = of_translate_address(gpiop, reg);
cc5d0189 327 if (gaddr != OF_BAD_ADDR)
51d3082f 328 gpio_reg = ioremap(gaddr, 0x10);
1da177e4 329 }
61e37ca2 330 if (gpio_reg == NULL) {
51d3082f 331 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
61e37ca2
OH
332 goto fail_gpio;
333 }
1da177e4
LT
334 } else
335 pmu_kind = PMU_UNKNOWN;
336
51d3082f
BH
337 via = ioremap(taddr, 0x2000);
338 if (via == NULL) {
339 printk(KERN_ERR "via-pmu: Can't map address !\n");
340 goto fail;
341 }
1da177e4
LT
342
343 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
344 out_8(&via[IFR], 0x7f); /* clear IFR */
345
346 pmu_state = idle;
347
348 if (!init_pmu()) {
349 via = NULL;
350 return 0;
351 }
352
bb6b9b28 353 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
1da177e4
LT
354 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
355
356 sys_ctrler = SYS_CTRLER_PMU;
357
358 return 1;
51d3082f
BH
359 fail:
360 of_node_put(vias);
61e37ca2
OH
361 iounmap(gpio_reg);
362 gpio_reg = NULL;
363 fail_gpio:
51d3082f
BH
364 vias = NULL;
365 return 0;
1da177e4
LT
366}
367
368#ifdef CONFIG_ADB
51d3082f 369static int pmu_probe(void)
1da177e4
LT
370{
371 return vias == NULL? -ENODEV: 0;
372}
373
51d3082f 374static int __init pmu_init(void)
1da177e4
LT
375{
376 if (vias == NULL)
377 return -ENODEV;
378 return 0;
379}
380#endif /* CONFIG_ADB */
381
382/*
383 * We can't wait until pmu_init gets called, that happens too late.
384 * It happens after IDE and SCSI initialization, which can take a few
385 * seconds, and by that time the PMU could have given up on us and
386 * turned us off.
387 * Thus this is called with arch_initcall rather than device_initcall.
388 */
389static int __init via_pmu_start(void)
390{
0ebfff14
BH
391 unsigned int irq;
392
1da177e4
LT
393 if (vias == NULL)
394 return -ENODEV;
395
1da177e4 396 batt_req.complete = 1;
1da177e4 397
0ebfff14
BH
398 irq = irq_of_parse_and_map(vias, 0);
399 if (irq == NO_IRQ) {
7b52b440 400 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH
401 return -ENODEV;
402 }
11a50873
BH
403 /* We set IRQF_TIMER because we don't want the interrupt to be disabled
404 * between the 2 passes of driver suspend, we control our own disabling
405 * for that one
406 */
407 if (request_irq(irq, via_pmu_interrupt, IRQF_TIMER, "VIA-PMU", (void *)0)) {
0ebfff14
BH
408 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
409 return -ENODEV;
1da177e4
LT
410 }
411
51d3082f
BH
412 if (pmu_kind == PMU_KEYLARGO_BASED) {
413 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
414 if (gpio_node == NULL)
415 gpio_node = of_find_node_by_name(NULL,
416 "pmu-interrupt");
0ebfff14
BH
417 if (gpio_node)
418 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 419
0ebfff14 420 if (gpio_irq != NO_IRQ) {
11a50873 421 if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
51d3082f
BH
422 "GPIO1 ADB", (void *)0))
423 printk(KERN_ERR "pmu: can't get irq %d"
424 " (GPIO1)\n", gpio_irq);
425 else
426 gpio_irq_enabled = 1;
427 }
1da177e4
LT
428 }
429
430 /* Enable interrupts */
431 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
432
433 pmu_fully_inited = 1;
434
435 /* Make sure PMU settle down before continuing. This is _very_ important
436 * since the IDE probe may shut interrupts down for quite a bit of time. If
437 * a PMU communication is pending while this happens, the PMU may timeout
438 * Not that on Core99 machines, the PMU keeps sending us environement
439 * messages, we should find a way to either fix IDE or make it call
440 * pmu_suspend() before masking interrupts. This can also happens while
441 * scolling with some fbdevs.
442 */
443 do {
444 pmu_poll();
445 } while (pmu_state != idle);
446
447 return 0;
448}
449
450arch_initcall(via_pmu_start);
451
452/*
453 * This has to be done after pci_init, which is a subsys_initcall.
454 */
455static int __init via_pmu_dev_init(void)
456{
457 if (vias == NULL)
458 return -ENODEV;
459
1da177e4 460#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 461 /* Initialize backlight */
4b755999 462 pmu_backlight_init();
5474c120 463#endif
1da177e4 464
8c870933 465#ifdef CONFIG_PPC32
71a157e8
GL
466 if (of_machine_is_compatible("AAPL,3400/2400") ||
467 of_machine_is_compatible("AAPL,3500")) {
1da177e4
LT
468 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
469 NULL, PMAC_MB_INFO_MODEL, 0);
470 pmu_battery_count = 1;
471 if (mb == PMAC_TYPE_COMET)
472 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
473 else
474 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
71a157e8
GL
475 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
476 of_machine_is_compatible("PowerBook1,1")) {
1da177e4
LT
477 pmu_battery_count = 2;
478 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
479 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
480 } else {
30686ba6
SR
481 struct device_node* prim =
482 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 483 const u32 *prim_info = NULL;
1da177e4 484 if (prim)
01b2726d 485 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT
486 if (prim_info) {
487 /* Other stuffs here yet unknown */
488 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
489 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
490 if (pmu_battery_count > 1)
491 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
492 }
30686ba6 493 of_node_put(prim);
1da177e4 494 }
8c870933
BH
495#endif /* CONFIG_PPC32 */
496
1da177e4
LT
497 /* Create /proc/pmu */
498 proc_pmu_root = proc_mkdir("pmu", NULL);
499 if (proc_pmu_root) {
8c870933 500 long i;
1da177e4
LT
501
502 for (i=0; i<pmu_battery_count; i++) {
503 char title[16];
8c870933 504 sprintf(title, "battery_%ld", i);
9d2f7342
AD
505 proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
506 &pmu_battery_proc_fops, (void *)i);
1da177e4 507 }
1da177e4 508
9d2f7342
AD
509 proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
510 proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
511 &pmu_irqstats_proc_fops);
512 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
513 &pmu_options_proc_fops);
1da177e4
LT
514 }
515 return 0;
516}
517
518device_initcall(via_pmu_dev_init);
519
aacaf9bd 520static int
1da177e4
LT
521init_pmu(void)
522{
523 int timeout;
524 struct adb_request req;
525
526 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
527 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
528
529 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
530 timeout = 100000;
531 while (!req.complete) {
532 if (--timeout < 0) {
533 printk(KERN_ERR "init_pmu: no response from PMU\n");
534 return 0;
535 }
536 udelay(10);
537 pmu_poll();
538 }
539
540 /* ack all pending interrupts */
541 timeout = 100000;
542 interrupt_data[0][0] = 1;
543 while (interrupt_data[0][0] || pmu_state != idle) {
544 if (--timeout < 0) {
545 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
546 return 0;
547 }
548 if (pmu_state == idle)
549 adb_int_pending = 1;
7d12e780 550 via_pmu_interrupt(0, NULL);
1da177e4
LT
551 udelay(10);
552 }
553
554 /* Tell PMU we are ready. */
555 if (pmu_kind == PMU_KEYLARGO_BASED) {
556 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
557 while (!req.complete)
558 pmu_poll();
559 }
560
561 /* Read PMU version */
562 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
563 pmu_wait_complete(&req);
564 if (req.reply_len > 0)
565 pmu_version = req.reply[0];
566
567 /* Read server mode setting */
568 if (pmu_kind == PMU_KEYLARGO_BASED) {
569 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
570 PMU_PWR_GET_POWERUP_EVENTS);
571 pmu_wait_complete(&req);
572 if (req.reply_len == 2) {
573 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
574 option_server_mode = 1;
575 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
576 option_server_mode ? "enabled" : "disabled");
577 }
578 }
579 return 1;
580}
581
582int
583pmu_get_model(void)
584{
585 return pmu_kind;
586}
587
1da177e4
LT
588static void pmu_set_server_mode(int server_mode)
589{
590 struct adb_request req;
591
592 if (pmu_kind != PMU_KEYLARGO_BASED)
593 return;
594
595 option_server_mode = server_mode;
596 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
597 pmu_wait_complete(&req);
598 if (req.reply_len < 2)
599 return;
600 if (server_mode)
601 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
602 PMU_PWR_SET_POWERUP_EVENTS,
603 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
604 else
605 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
606 PMU_PWR_CLR_POWERUP_EVENTS,
607 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
608 pmu_wait_complete(&req);
609}
610
1da177e4
LT
611/* This new version of the code for 2400/3400/3500 powerbooks
612 * is inspired from the implementation in gkrellm-pmu
613 */
aacaf9bd 614static void
1da177e4
LT
615done_battery_state_ohare(struct adb_request* req)
616{
617 /* format:
618 * [0] : flags
619 * 0x01 : AC indicator
620 * 0x02 : charging
621 * 0x04 : battery exist
622 * 0x08 :
623 * 0x10 :
624 * 0x20 : full charged
625 * 0x40 : pcharge reset
626 * 0x80 : battery exist
627 *
628 * [1][2] : battery voltage
629 * [3] : CPU temperature
630 * [4] : battery temperature
631 * [5] : current
632 * [6][7] : pcharge
633 * --tkoba
634 */
635 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
636 long pcharge, charge, vb, vmax, lmax;
637 long vmax_charging, vmax_charged;
638 long amperage, voltage, time, max;
639 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
640 NULL, PMAC_MB_INFO_MODEL, 0);
641
642 if (req->reply[0] & 0x01)
643 pmu_power_flags |= PMU_PWR_AC_PRESENT;
644 else
645 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
646
647 if (mb == PMAC_TYPE_COMET) {
648 vmax_charged = 189;
649 vmax_charging = 213;
650 lmax = 6500;
651 } else {
652 vmax_charged = 330;
653 vmax_charging = 330;
654 lmax = 6500;
655 }
656 vmax = vmax_charged;
657
658 /* If battery installed */
659 if (req->reply[0] & 0x04) {
660 bat_flags |= PMU_BATT_PRESENT;
661 if (req->reply[0] & 0x02)
662 bat_flags |= PMU_BATT_CHARGING;
663 vb = (req->reply[1] << 8) | req->reply[2];
664 voltage = (vb * 265 + 72665) / 10;
665 amperage = req->reply[5];
666 if ((req->reply[0] & 0x01) == 0) {
667 if (amperage > 200)
668 vb += ((amperage - 200) * 15)/100;
669 } else if (req->reply[0] & 0x02) {
670 vb = (vb * 97) / 100;
671 vmax = vmax_charging;
672 }
673 charge = (100 * vb) / vmax;
674 if (req->reply[0] & 0x40) {
675 pcharge = (req->reply[6] << 8) + req->reply[7];
676 if (pcharge > lmax)
677 pcharge = lmax;
678 pcharge *= 100;
679 pcharge = 100 - pcharge / lmax;
680 if (pcharge < charge)
681 charge = pcharge;
682 }
683 if (amperage > 0)
684 time = (charge * 16440) / amperage;
685 else
686 time = 0;
687 max = 100;
688 amperage = -amperage;
689 } else
690 charge = max = amperage = voltage = time = 0;
691
692 pmu_batteries[pmu_cur_battery].flags = bat_flags;
693 pmu_batteries[pmu_cur_battery].charge = charge;
694 pmu_batteries[pmu_cur_battery].max_charge = max;
695 pmu_batteries[pmu_cur_battery].amperage = amperage;
696 pmu_batteries[pmu_cur_battery].voltage = voltage;
697 pmu_batteries[pmu_cur_battery].time_remaining = time;
698
699 clear_bit(0, &async_req_locks);
700}
701
aacaf9bd 702static void
1da177e4
LT
703done_battery_state_smart(struct adb_request* req)
704{
705 /* format:
706 * [0] : format of this structure (known: 3,4,5)
707 * [1] : flags
708 *
709 * format 3 & 4:
710 *
711 * [2] : charge
712 * [3] : max charge
713 * [4] : current
714 * [5] : voltage
715 *
716 * format 5:
717 *
718 * [2][3] : charge
719 * [4][5] : max charge
720 * [6][7] : current
721 * [8][9] : voltage
722 */
723
724 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
725 int amperage;
726 unsigned int capa, max, voltage;
727
728 if (req->reply[1] & 0x01)
729 pmu_power_flags |= PMU_PWR_AC_PRESENT;
730 else
731 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
732
733
734 capa = max = amperage = voltage = 0;
735
736 if (req->reply[1] & 0x04) {
737 bat_flags |= PMU_BATT_PRESENT;
738 switch(req->reply[0]) {
739 case 3:
740 case 4: capa = req->reply[2];
741 max = req->reply[3];
742 amperage = *((signed char *)&req->reply[4]);
743 voltage = req->reply[5];
744 break;
745 case 5: capa = (req->reply[2] << 8) | req->reply[3];
746 max = (req->reply[4] << 8) | req->reply[5];
747 amperage = *((signed short *)&req->reply[6]);
748 voltage = (req->reply[8] << 8) | req->reply[9];
749 break;
750 default:
751 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
752 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
753 break;
754 }
755 }
756
757 if ((req->reply[1] & 0x01) && (amperage > 0))
758 bat_flags |= PMU_BATT_CHARGING;
759
760 pmu_batteries[pmu_cur_battery].flags = bat_flags;
761 pmu_batteries[pmu_cur_battery].charge = capa;
762 pmu_batteries[pmu_cur_battery].max_charge = max;
763 pmu_batteries[pmu_cur_battery].amperage = amperage;
764 pmu_batteries[pmu_cur_battery].voltage = voltage;
765 if (amperage) {
766 if ((req->reply[1] & 0x01) && (amperage > 0))
767 pmu_batteries[pmu_cur_battery].time_remaining
768 = ((max-capa) * 3600) / amperage;
769 else
770 pmu_batteries[pmu_cur_battery].time_remaining
771 = (capa * 3600) / (-amperage);
772 } else
773 pmu_batteries[pmu_cur_battery].time_remaining = 0;
774
775 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
776
777 clear_bit(0, &async_req_locks);
778}
779
aacaf9bd 780static void
1da177e4
LT
781query_battery_state(void)
782{
783 if (test_and_set_bit(0, &async_req_locks))
784 return;
785 if (pmu_kind == PMU_OHARE_BASED)
786 pmu_request(&batt_req, done_battery_state_ohare,
787 1, PMU_BATTERY_STATE);
788 else
789 pmu_request(&batt_req, done_battery_state_smart,
790 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
791}
792
9d2f7342 793static int pmu_info_proc_show(struct seq_file *m, void *v)
1da177e4 794{
9d2f7342
AD
795 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
796 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
797 seq_printf(m, "AC Power : %d\n",
63e1fd41 798 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
9d2f7342
AD
799 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
800
801 return 0;
802}
1da177e4 803
9d2f7342
AD
804static int pmu_info_proc_open(struct inode *inode, struct file *file)
805{
806 return single_open(file, pmu_info_proc_show, NULL);
1da177e4
LT
807}
808
9d2f7342
AD
809static const struct file_operations pmu_info_proc_fops = {
810 .owner = THIS_MODULE,
811 .open = pmu_info_proc_open,
812 .read = seq_read,
813 .llseek = seq_lseek,
814 .release = single_release,
815};
816
817static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
1da177e4
LT
818{
819 int i;
1da177e4
LT
820 static const char *irq_names[] = {
821 "Total CB1 triggered events",
822 "Total GPIO1 triggered events",
823 "PC-Card eject button",
824 "Sound/Brightness button",
825 "ADB message",
826 "Battery state change",
827 "Environment interrupt",
828 "Tick timer",
829 "Ghost interrupt (zero len)",
830 "Empty interrupt (empty mask)",
831 "Max irqs in a row"
832 };
833
834 for (i=0; i<11; i++) {
9d2f7342 835 seq_printf(m, " %2u: %10u (%s)\n",
1da177e4
LT
836 i, pmu_irq_stats[i], irq_names[i]);
837 }
9d2f7342 838 return 0;
1da177e4
LT
839}
840
9d2f7342 841static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
1da177e4 842{
9d2f7342
AD
843 return single_open(file, pmu_irqstats_proc_show, NULL);
844}
845
846static const struct file_operations pmu_irqstats_proc_fops = {
847 .owner = THIS_MODULE,
848 .open = pmu_irqstats_proc_open,
849 .read = seq_read,
850 .llseek = seq_lseek,
851 .release = single_release,
852};
853
854static int pmu_battery_proc_show(struct seq_file *m, void *v)
855{
856 long batnum = (long)m->private;
1da177e4 857
9d2f7342
AD
858 seq_putc(m, '\n');
859 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
860 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
861 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
862 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
863 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
864 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
865 return 0;
1da177e4 866}
1da177e4 867
9d2f7342 868static int pmu_battery_proc_open(struct inode *inode, struct file *file)
1da177e4 869{
9d2f7342
AD
870 return single_open(file, pmu_battery_proc_show, PDE(inode)->data);
871}
1da177e4 872
9d2f7342
AD
873static const struct file_operations pmu_battery_proc_fops = {
874 .owner = THIS_MODULE,
875 .open = pmu_battery_proc_open,
876 .read = seq_read,
877 .llseek = seq_lseek,
878 .release = single_release,
879};
880
881static int pmu_options_proc_show(struct seq_file *m, void *v)
882{
f91266ed 883#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
884 if (pmu_kind == PMU_KEYLARGO_BASED &&
885 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
9d2f7342 886 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 887#endif
1da177e4 888 if (pmu_kind == PMU_KEYLARGO_BASED)
9d2f7342 889 seq_printf(m, "server_mode=%d\n", option_server_mode);
1da177e4 890
9d2f7342 891 return 0;
1da177e4 892}
9d2f7342
AD
893
894static int pmu_options_proc_open(struct inode *inode, struct file *file)
895{
896 return single_open(file, pmu_options_proc_show, NULL);
897}
898
899static ssize_t pmu_options_proc_write(struct file *file,
900 const char __user *buffer, size_t count, loff_t *pos)
1da177e4
LT
901{
902 char tmp[33];
903 char *label, *val;
9d2f7342 904 size_t fcount = count;
1da177e4
LT
905
906 if (!count)
907 return -EINVAL;
908 if (count > 32)
909 count = 32;
910 if (copy_from_user(tmp, buffer, count))
911 return -EFAULT;
912 tmp[count] = 0;
913
914 label = tmp;
915 while(*label == ' ')
916 label++;
917 val = label;
918 while(*val && (*val != '=')) {
919 if (*val == ' ')
920 *val = 0;
921 val++;
922 }
923 if ((*val) == 0)
924 return -EINVAL;
925 *(val++) = 0;
926 while(*val == ' ')
927 val++;
f91266ed 928#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
929 if (pmu_kind == PMU_KEYLARGO_BASED &&
930 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
931 if (!strcmp(label, "lid_wakeup"))
932 option_lid_wakeup = ((*val) == '1');
8c870933 933#endif
1da177e4
LT
934 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
935 int new_value;
936 new_value = ((*val) == '1');
937 if (new_value != option_server_mode)
938 pmu_set_server_mode(new_value);
939 }
940 return fcount;
941}
942
9d2f7342
AD
943static const struct file_operations pmu_options_proc_fops = {
944 .owner = THIS_MODULE,
945 .open = pmu_options_proc_open,
946 .read = seq_read,
947 .llseek = seq_lseek,
948 .release = single_release,
949 .write = pmu_options_proc_write,
950};
951
1da177e4
LT
952#ifdef CONFIG_ADB
953/* Send an ADB command */
11a50873 954static int pmu_send_request(struct adb_request *req, int sync)
1da177e4
LT
955{
956 int i, ret;
957
958 if ((vias == NULL) || (!pmu_fully_inited)) {
959 req->complete = 1;
960 return -ENXIO;
961 }
962
963 ret = -EINVAL;
964
965 switch (req->data[0]) {
966 case PMU_PACKET:
967 for (i = 0; i < req->nbytes - 1; ++i)
968 req->data[i] = req->data[i+1];
969 --req->nbytes;
970 if (pmu_data_len[req->data[0]][1] != 0) {
971 req->reply[0] = ADB_RET_OK;
972 req->reply_len = 1;
973 } else
974 req->reply_len = 0;
975 ret = pmu_queue_request(req);
976 break;
977 case CUDA_PACKET:
978 switch (req->data[1]) {
979 case CUDA_GET_TIME:
980 if (req->nbytes != 2)
981 break;
982 req->data[0] = PMU_READ_RTC;
983 req->nbytes = 1;
984 req->reply_len = 3;
985 req->reply[0] = CUDA_PACKET;
986 req->reply[1] = 0;
987 req->reply[2] = CUDA_GET_TIME;
988 ret = pmu_queue_request(req);
989 break;
990 case CUDA_SET_TIME:
991 if (req->nbytes != 6)
992 break;
993 req->data[0] = PMU_SET_RTC;
994 req->nbytes = 5;
995 for (i = 1; i <= 4; ++i)
996 req->data[i] = req->data[i+1];
997 req->reply_len = 3;
998 req->reply[0] = CUDA_PACKET;
999 req->reply[1] = 0;
1000 req->reply[2] = CUDA_SET_TIME;
1001 ret = pmu_queue_request(req);
1002 break;
1003 }
1004 break;
1005 case ADB_PACKET:
1006 if (!pmu_has_adb)
1007 return -ENXIO;
1008 for (i = req->nbytes - 1; i > 1; --i)
1009 req->data[i+2] = req->data[i];
1010 req->data[3] = req->nbytes - 2;
1011 req->data[2] = pmu_adb_flags;
1012 /*req->data[1] = req->data[1];*/
1013 req->data[0] = PMU_ADB_CMD;
1014 req->nbytes += 2;
1015 req->reply_expected = 1;
1016 req->reply_len = 0;
1017 ret = pmu_queue_request(req);
1018 break;
1019 }
1020 if (ret) {
1021 req->complete = 1;
1022 return ret;
1023 }
1024
1025 if (sync)
1026 while (!req->complete)
1027 pmu_poll();
1028
1029 return 0;
1030}
1031
1032/* Enable/disable autopolling */
11a50873 1033static int __pmu_adb_autopoll(int devs)
1da177e4
LT
1034{
1035 struct adb_request req;
1036
1da177e4 1037 if (devs) {
1da177e4
LT
1038 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1039 adb_dev_map >> 8, adb_dev_map);
1040 pmu_adb_flags = 2;
1041 } else {
1042 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1043 pmu_adb_flags = 0;
1044 }
1045 while (!req.complete)
1046 pmu_poll();
1047 return 0;
1048}
1049
11a50873
BH
1050static int pmu_adb_autopoll(int devs)
1051{
1052 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1053 return -ENXIO;
1054
1055 adb_dev_map = devs;
1056 return __pmu_adb_autopoll(devs);
1057}
1058
1da177e4 1059/* Reset the ADB bus */
11a50873 1060static int pmu_adb_reset_bus(void)
1da177e4
LT
1061{
1062 struct adb_request req;
1063 int save_autopoll = adb_dev_map;
1064
1065 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1066 return -ENXIO;
1067
1068 /* anyone got a better idea?? */
11a50873 1069 __pmu_adb_autopoll(0);
1da177e4 1070
11a50873 1071 req.nbytes = 4;
1da177e4
LT
1072 req.done = NULL;
1073 req.data[0] = PMU_ADB_CMD;
11a50873
BH
1074 req.data[1] = ADB_BUSRESET;
1075 req.data[2] = 0;
1da177e4
LT
1076 req.data[3] = 0;
1077 req.data[4] = 0;
1078 req.reply_len = 0;
1079 req.reply_expected = 1;
1080 if (pmu_queue_request(&req) != 0) {
1081 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1082 return -EIO;
1083 }
1084 pmu_wait_complete(&req);
1085
1086 if (save_autopoll != 0)
11a50873 1087 __pmu_adb_autopoll(save_autopoll);
1da177e4
LT
1088
1089 return 0;
1090}
1091#endif /* CONFIG_ADB */
1092
1093/* Construct and send a pmu request */
aacaf9bd 1094int
1da177e4
LT
1095pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1096 int nbytes, ...)
1097{
1098 va_list list;
1099 int i;
1100
1101 if (vias == NULL)
1102 return -ENXIO;
1103
1104 if (nbytes < 0 || nbytes > 32) {
1105 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1106 req->complete = 1;
1107 return -EINVAL;
1108 }
1109 req->nbytes = nbytes;
1110 req->done = done;
1111 va_start(list, nbytes);
1112 for (i = 0; i < nbytes; ++i)
1113 req->data[i] = va_arg(list, int);
1114 va_end(list);
1115 req->reply_len = 0;
1116 req->reply_expected = 0;
1117 return pmu_queue_request(req);
1118}
1119
aacaf9bd 1120int
1da177e4
LT
1121pmu_queue_request(struct adb_request *req)
1122{
1123 unsigned long flags;
1124 int nsend;
1125
1126 if (via == NULL) {
1127 req->complete = 1;
1128 return -ENXIO;
1129 }
1130 if (req->nbytes <= 0) {
1131 req->complete = 1;
1132 return 0;
1133 }
1134 nsend = pmu_data_len[req->data[0]][0];
1135 if (nsend >= 0 && req->nbytes != nsend + 1) {
1136 req->complete = 1;
1137 return -EINVAL;
1138 }
1139
1140 req->next = NULL;
1141 req->sent = 0;
1142 req->complete = 0;
1143
1144 spin_lock_irqsave(&pmu_lock, flags);
1145 if (current_req != 0) {
1146 last_req->next = req;
1147 last_req = req;
1148 } else {
1149 current_req = req;
1150 last_req = req;
1151 if (pmu_state == idle)
1152 pmu_start();
1153 }
1154 spin_unlock_irqrestore(&pmu_lock, flags);
1155
1156 return 0;
1157}
1158
1159static inline void
1160wait_for_ack(void)
1161{
1162 /* Sightly increased the delay, I had one occurrence of the message
1163 * reported
1164 */
1165 int timeout = 4000;
1166 while ((in_8(&via[B]) & TACK) == 0) {
1167 if (--timeout < 0) {
1168 printk(KERN_ERR "PMU not responding (!ack)\n");
1169 return;
1170 }
1171 udelay(10);
1172 }
1173}
1174
1175/* New PMU seems to be very sensitive to those timings, so we make sure
1176 * PCI is flushed immediately */
1177static inline void
1178send_byte(int x)
1179{
1180 volatile unsigned char __iomem *v = via;
1181
1182 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1183 out_8(&v[SR], x);
1184 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1185 (void)in_8(&v[B]);
1186}
1187
1188static inline void
1189recv_byte(void)
1190{
1191 volatile unsigned char __iomem *v = via;
1192
1193 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1194 in_8(&v[SR]); /* resets SR */
1195 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1196 (void)in_8(&v[B]);
1197}
1198
1199static inline void
1200pmu_done(struct adb_request *req)
1201{
1202 void (*done)(struct adb_request *) = req->done;
1203 mb();
1204 req->complete = 1;
1205 /* Here, we assume that if the request has a done member, the
1206 * struct request will survive to setting req->complete to 1
1207 */
1208 if (done)
1209 (*done)(req);
1210}
1211
aacaf9bd 1212static void
1da177e4
LT
1213pmu_start(void)
1214{
1215 struct adb_request *req;
1216
1217 /* assert pmu_state == idle */
1218 /* get the packet to send */
1219 req = current_req;
1220 if (req == 0 || pmu_state != idle
1221 || (/*req->reply_expected && */req_awaiting_reply))
1222 return;
1223
1224 pmu_state = sending;
1225 data_index = 1;
1226 data_len = pmu_data_len[req->data[0]][0];
1227
1228 /* Sounds safer to make sure ACK is high before writing. This helped
1229 * kill a problem with ADB and some iBooks
1230 */
1231 wait_for_ack();
1232 /* set the shift register to shift out and send a byte */
1233 send_byte(req->data[0]);
1234}
1235
aacaf9bd 1236void
1da177e4
LT
1237pmu_poll(void)
1238{
1239 if (!via)
1240 return;
1241 if (disable_poll)
1242 return;
7d12e780 1243 via_pmu_interrupt(0, NULL);
1da177e4
LT
1244}
1245
aacaf9bd 1246void
1da177e4
LT
1247pmu_poll_adb(void)
1248{
1249 if (!via)
1250 return;
1251 if (disable_poll)
1252 return;
1253 /* Kicks ADB read when PMU is suspended */
1254 adb_int_pending = 1;
1255 do {
7d12e780 1256 via_pmu_interrupt(0, NULL);
1da177e4
LT
1257 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1258 || req_awaiting_reply));
1259}
1260
aacaf9bd 1261void
1da177e4
LT
1262pmu_wait_complete(struct adb_request *req)
1263{
1264 if (!via)
1265 return;
1266 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1267 via_pmu_interrupt(0, NULL);
1da177e4
LT
1268}
1269
1270/* This function loops until the PMU is idle and prevents it from
1271 * anwsering to ADB interrupts. pmu_request can still be called.
1272 * This is done to avoid spurrious shutdowns when we know we'll have
1273 * interrupts switched off for a long time
1274 */
aacaf9bd 1275void
1da177e4
LT
1276pmu_suspend(void)
1277{
1278 unsigned long flags;
1b0e9d44 1279
1da177e4
LT
1280 if (!via)
1281 return;
1282
1283 spin_lock_irqsave(&pmu_lock, flags);
1284 pmu_suspended++;
1285 if (pmu_suspended > 1) {
1286 spin_unlock_irqrestore(&pmu_lock, flags);
1287 return;
1288 }
1289
1290 do {
1291 spin_unlock_irqrestore(&pmu_lock, flags);
1292 if (req_awaiting_reply)
1293 adb_int_pending = 1;
7d12e780 1294 via_pmu_interrupt(0, NULL);
1da177e4
LT
1295 spin_lock_irqsave(&pmu_lock, flags);
1296 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT
1297 if (gpio_irq >= 0)
1298 disable_irq_nosync(gpio_irq);
1299 out_8(&via[IER], CB1_INT | IER_CLR);
1300 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT
1301 break;
1302 }
1303 } while (1);
1304}
1305
aacaf9bd 1306void
1da177e4
LT
1307pmu_resume(void)
1308{
1309 unsigned long flags;
1310
1311 if (!via || (pmu_suspended < 1))
1312 return;
1313
1314 spin_lock_irqsave(&pmu_lock, flags);
1315 pmu_suspended--;
1316 if (pmu_suspended > 0) {
1317 spin_unlock_irqrestore(&pmu_lock, flags);
1318 return;
1319 }
1320 adb_int_pending = 1;
1da177e4
LT
1321 if (gpio_irq >= 0)
1322 enable_irq(gpio_irq);
1323 out_8(&via[IER], CB1_INT | IER_SET);
1324 spin_unlock_irqrestore(&pmu_lock, flags);
1325 pmu_poll();
1da177e4
LT
1326}
1327
1328/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1329static void
7d12e780 1330pmu_handle_data(unsigned char *data, int len)
1da177e4
LT
1331{
1332 unsigned char ints, pirq;
1333 int i = 0;
1334
1335 asleep = 0;
1336 if (drop_interrupts || len < 1) {
1337 adb_int_pending = 0;
1338 pmu_irq_stats[8]++;
1339 return;
1340 }
1341
1342 /* Get PMU interrupt mask */
1343 ints = data[0];
1344
1345 /* Record zero interrupts for stats */
1346 if (ints == 0)
1347 pmu_irq_stats[9]++;
1348
1349 /* Hack to deal with ADB autopoll flag */
1350 if (ints & PMU_INT_ADB)
1351 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1352
1353next:
1354
1355 if (ints == 0) {
1356 if (i > pmu_irq_stats[10])
1357 pmu_irq_stats[10] = i;
1358 return;
1359 }
1360
1361 for (pirq = 0; pirq < 8; pirq++)
1362 if (ints & (1 << pirq))
1363 break;
1364 pmu_irq_stats[pirq]++;
1365 i++;
1366 ints &= ~(1 << pirq);
1367
1368 /* Note: for some reason, we get an interrupt with len=1,
1369 * data[0]==0 after each normal ADB interrupt, at least
1370 * on the Pismo. Still investigating... --BenH
1371 */
1372 if ((1 << pirq) & PMU_INT_ADB) {
1373 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1374 struct adb_request *req = req_awaiting_reply;
1375 if (req == 0) {
1376 printk(KERN_ERR "PMU: extra ADB reply\n");
1377 return;
1378 }
1379 req_awaiting_reply = NULL;
1380 if (len <= 2)
1381 req->reply_len = 0;
1382 else {
1383 memcpy(req->reply, data + 1, len - 1);
1384 req->reply_len = len - 1;
1385 }
1386 pmu_done(req);
1387 } else {
1da177e4
LT
1388 if (len == 4 && data[1] == 0x2c) {
1389 extern int xmon_wants_key, xmon_adb_keycode;
1390 if (xmon_wants_key) {
1391 xmon_adb_keycode = data[2];
1392 return;
1393 }
1394 }
1da177e4
LT
1395#ifdef CONFIG_ADB
1396 /*
1397 * XXX On the [23]400 the PMU gives us an up
1398 * event for keycodes 0x74 or 0x75 when the PC
1399 * card eject buttons are released, so we
1400 * ignore those events.
1401 */
1402 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1403 && data[1] == 0x2c && data[3] == 0xff
1404 && (data[2] & ~1) == 0xf4))
7d12e780 1405 adb_input(data+1, len-1, 1);
1da177e4
LT
1406#endif /* CONFIG_ADB */
1407 }
1408 }
1409 /* Sound/brightness button pressed */
1410 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1411#ifdef CONFIG_PMAC_BACKLIGHT
1412 if (len == 3)
4b755999
MH
1413 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1414#endif
1da177e4
LT
1415 }
1416 /* Tick interrupt */
1417 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT
1418 /* Environement or tick interrupt, query batteries */
1419 if (pmu_battery_count) {
1420 if ((--query_batt_timer) == 0) {
1421 query_battery_state();
1422 query_batt_timer = BATTERY_POLLING_COUNT;
1423 }
1424 }
1425 }
1426 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1427 if (pmu_battery_count)
1428 query_battery_state();
1429 pmu_pass_intr(data, len);
9e8e30a0
JB
1430 /* len == 6 is probably a bad check. But how do I
1431 * know what PMU versions send what events here? */
1432 if (len == 6) {
1433 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1434 via_pmu_event(PMU_EVT_LID, data[1]&1);
1435 }
1da177e4
LT
1436 } else {
1437 pmu_pass_intr(data, len);
1da177e4
LT
1438 }
1439 goto next;
1440}
1441
aacaf9bd 1442static struct adb_request*
7d12e780 1443pmu_sr_intr(void)
1da177e4
LT
1444{
1445 struct adb_request *req;
1446 int bite = 0;
1447
1448 if (via[B] & TREQ) {
1449 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1450 out_8(&via[IFR], SR_INT);
1451 return NULL;
1452 }
1453 /* The ack may not yet be low when we get the interrupt */
1454 while ((in_8(&via[B]) & TACK) != 0)
1455 ;
1456
1457 /* if reading grab the byte, and reset the interrupt */
1458 if (pmu_state == reading || pmu_state == reading_intr)
1459 bite = in_8(&via[SR]);
1460
1461 /* reset TREQ and wait for TACK to go high */
1462 out_8(&via[B], in_8(&via[B]) | TREQ);
1463 wait_for_ack();
1464
1465 switch (pmu_state) {
1466 case sending:
1467 req = current_req;
1468 if (data_len < 0) {
1469 data_len = req->nbytes - 1;
1470 send_byte(data_len);
1471 break;
1472 }
1473 if (data_index <= data_len) {
1474 send_byte(req->data[data_index++]);
1475 break;
1476 }
1477 req->sent = 1;
1478 data_len = pmu_data_len[req->data[0]][1];
1479 if (data_len == 0) {
1480 pmu_state = idle;
1481 current_req = req->next;
1482 if (req->reply_expected)
1483 req_awaiting_reply = req;
1484 else
1485 return req;
1486 } else {
1487 pmu_state = reading;
1488 data_index = 0;
1489 reply_ptr = req->reply + req->reply_len;
1490 recv_byte();
1491 }
1492 break;
1493
1494 case intack:
1495 data_index = 0;
1496 data_len = -1;
1497 pmu_state = reading_intr;
1498 reply_ptr = interrupt_data[int_data_last];
1499 recv_byte();
1500 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1501 enable_irq(gpio_irq);
1502 gpio_irq_enabled = 1;
1503 }
1504 break;
1505
1506 case reading:
1507 case reading_intr:
1508 if (data_len == -1) {
1509 data_len = bite;
1510 if (bite > 32)
1511 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1512 } else if (data_index < 32) {
1513 reply_ptr[data_index++] = bite;
1514 }
1515 if (data_index < data_len) {
1516 recv_byte();
1517 break;
1518 }
1519
1520 if (pmu_state == reading_intr) {
1521 pmu_state = idle;
1522 int_data_state[int_data_last] = int_data_ready;
1523 interrupt_data_len[int_data_last] = data_len;
1524 } else {
1525 req = current_req;
1526 /*
1527 * For PMU sleep and freq change requests, we lock the
c03983ac 1528 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT
1529 * spurrious event polling getting in
1530 */
1531 current_req = req->next;
1532 req->reply_len += data_index;
1533 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1534 pmu_state = locked;
1535 else
1536 pmu_state = idle;
1537 return req;
1538 }
1539 break;
1540
1541 default:
1542 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1543 pmu_state);
1544 }
1545 return NULL;
1546}
1547
aacaf9bd 1548static irqreturn_t
7d12e780 1549via_pmu_interrupt(int irq, void *arg)
1da177e4
LT
1550{
1551 unsigned long flags;
1552 int intr;
1553 int nloop = 0;
1554 int int_data = -1;
1555 struct adb_request *req = NULL;
1556 int handled = 0;
1557
1558 /* This is a bit brutal, we can probably do better */
1559 spin_lock_irqsave(&pmu_lock, flags);
1560 ++disable_poll;
1561
1562 for (;;) {
1563 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1564 if (intr == 0)
1565 break;
1566 handled = 1;
1567 if (++nloop > 1000) {
1568 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1569 "intr=%x, ier=%x pmu_state=%d\n",
1570 intr, in_8(&via[IER]), pmu_state);
1571 break;
1572 }
1573 out_8(&via[IFR], intr);
1574 if (intr & CB1_INT) {
1575 adb_int_pending = 1;
1576 pmu_irq_stats[0]++;
1577 }
1578 if (intr & SR_INT) {
7d12e780 1579 req = pmu_sr_intr();
1da177e4
LT
1580 if (req)
1581 break;
1582 }
1583 }
1584
1585recheck:
1586 if (pmu_state == idle) {
1587 if (adb_int_pending) {
1588 if (int_data_state[0] == int_data_empty)
1589 int_data_last = 0;
1590 else if (int_data_state[1] == int_data_empty)
1591 int_data_last = 1;
1592 else
1593 goto no_free_slot;
1594 pmu_state = intack;
1595 int_data_state[int_data_last] = int_data_fill;
1596 /* Sounds safer to make sure ACK is high before writing.
1597 * This helped kill a problem with ADB and some iBooks
1598 */
1599 wait_for_ack();
1600 send_byte(PMU_INT_ACK);
1601 adb_int_pending = 0;
1602 } else if (current_req)
1603 pmu_start();
1604 }
1605no_free_slot:
1606 /* Mark the oldest buffer for flushing */
1607 if (int_data_state[!int_data_last] == int_data_ready) {
1608 int_data_state[!int_data_last] = int_data_flush;
1609 int_data = !int_data_last;
1610 } else if (int_data_state[int_data_last] == int_data_ready) {
1611 int_data_state[int_data_last] = int_data_flush;
1612 int_data = int_data_last;
1613 }
1614 --disable_poll;
1615 spin_unlock_irqrestore(&pmu_lock, flags);
1616
1617 /* Deal with completed PMU requests outside of the lock */
1618 if (req) {
1619 pmu_done(req);
1620 req = NULL;
1621 }
1622
1623 /* Deal with interrupt datas outside of the lock */
1624 if (int_data >= 0) {
7d12e780 1625 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT
1626 spin_lock_irqsave(&pmu_lock, flags);
1627 ++disable_poll;
1628 int_data_state[int_data] = int_data_empty;
1629 int_data = -1;
1630 goto recheck;
1631 }
1632
1633 return IRQ_RETVAL(handled);
1634}
1635
aacaf9bd 1636void
1da177e4
LT
1637pmu_unlock(void)
1638{
1639 unsigned long flags;
1640
1641 spin_lock_irqsave(&pmu_lock, flags);
1642 if (pmu_state == locked)
1643 pmu_state = idle;
1644 adb_int_pending = 1;
1645 spin_unlock_irqrestore(&pmu_lock, flags);
1646}
1647
1648
aacaf9bd 1649static irqreturn_t
7d12e780 1650gpio1_interrupt(int irq, void *arg)
1da177e4
LT
1651{
1652 unsigned long flags;
1653
1654 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1655 spin_lock_irqsave(&pmu_lock, flags);
1656 if (gpio_irq_enabled > 0) {
1657 disable_irq_nosync(gpio_irq);
1658 gpio_irq_enabled = 0;
1659 }
1660 pmu_irq_stats[1]++;
1661 adb_int_pending = 1;
1662 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1663 via_pmu_interrupt(0, NULL);
1da177e4
LT
1664 return IRQ_HANDLED;
1665 }
1666 return IRQ_NONE;
1667}
1668
aacaf9bd 1669void
1da177e4
LT
1670pmu_enable_irled(int on)
1671{
1672 struct adb_request req;
1673
1674 if (vias == NULL)
1675 return ;
1676 if (pmu_kind == PMU_KEYLARGO_BASED)
1677 return ;
1678
1679 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1680 (on ? PMU_POW_ON : PMU_POW_OFF));
1681 pmu_wait_complete(&req);
1682}
1683
aacaf9bd 1684void
1da177e4
LT
1685pmu_restart(void)
1686{
1687 struct adb_request req;
1688
1689 if (via == NULL)
1690 return;
1691
1692 local_irq_disable();
1693
1694 drop_interrupts = 1;
1695
1696 if (pmu_kind != PMU_KEYLARGO_BASED) {
1697 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1698 PMU_INT_TICK );
1699 while(!req.complete)
1700 pmu_poll();
1701 }
1702
1703 pmu_request(&req, NULL, 1, PMU_RESET);
1704 pmu_wait_complete(&req);
1705 for (;;)
1706 ;
1707}
1708
aacaf9bd 1709void
1da177e4
LT
1710pmu_shutdown(void)
1711{
1712 struct adb_request req;
1713
1714 if (via == NULL)
1715 return;
1716
1717 local_irq_disable();
1718
1719 drop_interrupts = 1;
1720
1721 if (pmu_kind != PMU_KEYLARGO_BASED) {
1722 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1723 PMU_INT_TICK );
1724 pmu_wait_complete(&req);
1725 } else {
1726 /* Disable server mode on shutdown or we'll just
1727 * wake up again
1728 */
1729 pmu_set_server_mode(0);
1730 }
1731
1732 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1733 'M', 'A', 'T', 'T');
1734 pmu_wait_complete(&req);
1735 for (;;)
1736 ;
1737}
1738
1739int
1740pmu_present(void)
1741{
1742 return via != 0;
1743}
1744
f91266ed 1745#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
1746/*
1747 * Put the powerbook to sleep.
1748 */
1749
aacaf9bd 1750static u32 save_via[8];
1da177e4 1751
aacaf9bd 1752static void
1da177e4
LT
1753save_via_state(void)
1754{
1755 save_via[0] = in_8(&via[ANH]);
1756 save_via[1] = in_8(&via[DIRA]);
1757 save_via[2] = in_8(&via[B]);
1758 save_via[3] = in_8(&via[DIRB]);
1759 save_via[4] = in_8(&via[PCR]);
1760 save_via[5] = in_8(&via[ACR]);
1761 save_via[6] = in_8(&via[T1CL]);
1762 save_via[7] = in_8(&via[T1CH]);
1763}
aacaf9bd 1764static void
1da177e4
LT
1765restore_via_state(void)
1766{
1767 out_8(&via[ANH], save_via[0]);
1768 out_8(&via[DIRA], save_via[1]);
1769 out_8(&via[B], save_via[2]);
1770 out_8(&via[DIRB], save_via[3]);
1771 out_8(&via[PCR], save_via[4]);
1772 out_8(&via[ACR], save_via[5]);
1773 out_8(&via[T1CL], save_via[6]);
1774 out_8(&via[T1CH], save_via[7]);
1775 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
1776 out_8(&via[IFR], 0x7f); /* clear IFR */
1777 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1778}
1779
1da177e4
LT
1780#define GRACKLE_PM (1<<7)
1781#define GRACKLE_DOZE (1<<5)
1782#define GRACKLE_NAP (1<<4)
1783#define GRACKLE_SLEEP (1<<3)
1784
3bea6313 1785static int powerbook_sleep_grackle(void)
1da177e4
LT
1786{
1787 unsigned long save_l2cr;
1788 unsigned short pmcr1;
1789 struct adb_request req;
1da177e4
LT
1790 struct pci_dev *grackle;
1791
c78f8305 1792 grackle = pci_get_bus_and_slot(0, 0);
1da177e4
LT
1793 if (!grackle)
1794 return -ENODEV;
1795
1da177e4
LT
1796 /* Turn off various things. Darwin does some retry tests here... */
1797 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1798 pmu_wait_complete(&req);
1799 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1800 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1801 pmu_wait_complete(&req);
1802
1803 /* For 750, save backside cache setting and disable it */
1804 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1805
1806 if (!__fake_sleep) {
1807 /* Ask the PMU to put us to sleep */
1808 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1809 pmu_wait_complete(&req);
1810 }
1811
1812 /* The VIA is supposed not to be restored correctly*/
1813 save_via_state();
1814 /* We shut down some HW */
1815 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1816
1817 pci_read_config_word(grackle, 0x70, &pmcr1);
1818 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1819 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1820 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1821 pci_write_config_word(grackle, 0x70, pmcr1);
1822
1823 /* Call low-level ASM sleep handler */
1824 if (__fake_sleep)
1825 mdelay(5000);
1826 else
1827 low_sleep_handler();
1828
1829 /* We're awake again, stop grackle PM */
1830 pci_read_config_word(grackle, 0x70, &pmcr1);
1831 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1832 pci_write_config_word(grackle, 0x70, pmcr1);
1833
c78f8305
AC
1834 pci_dev_put(grackle);
1835
1da177e4
LT
1836 /* Make sure the PMU is idle */
1837 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1838 restore_via_state();
1839
1840 /* Restore L2 cache */
1841 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1842 _set_L2CR(save_l2cr);
1843
1844 /* Restore userland MMU context */
5e696617 1845 switch_mmu_context(NULL, current->active_mm);
1da177e4
LT
1846
1847 /* Power things up */
1848 pmu_unlock();
1849 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1850 pmu_wait_complete(&req);
1851 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1852 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1853 pmu_wait_complete(&req);
1854 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1855 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1856 pmu_wait_complete(&req);
1857
1da177e4
LT
1858 return 0;
1859}
1860
aacaf9bd 1861static int
1da177e4
LT
1862powerbook_sleep_Core99(void)
1863{
1864 unsigned long save_l2cr;
1865 unsigned long save_l3cr;
1866 struct adb_request req;
1da177e4
LT
1867
1868 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1869 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1870 return -ENOSYS;
1871 }
1872
1873 if (num_online_cpus() > 1 || cpu_is_offline(0))
1874 return -EAGAIN;
1875
b16eeb47
BH
1876 /* Stop environment and ADB interrupts */
1877 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1878 pmu_wait_complete(&req);
1da177e4
LT
1879
1880 /* Tell PMU what events will wake us up */
1881 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1882 0xff, 0xff);
1883 pmu_wait_complete(&req);
1884 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1885 0, PMU_PWR_WAKEUP_KEY |
1886 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1887 pmu_wait_complete(&req);
1888
1889 /* Save the state of the L2 and L3 caches */
1890 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1891 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1892
1893 if (!__fake_sleep) {
1894 /* Ask the PMU to put us to sleep */
1895 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1896 pmu_wait_complete(&req);
1897 }
1898
1899 /* The VIA is supposed not to be restored correctly*/
1900 save_via_state();
1901
1902 /* Shut down various ASICs. There's a chance that we can no longer
1903 * talk to the PMU after this, so I moved it to _after_ sending the
1904 * sleep command to it. Still need to be checked.
1905 */
1906 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1907
1908 /* Call low-level ASM sleep handler */
1909 if (__fake_sleep)
1910 mdelay(5000);
1911 else
1912 low_sleep_handler();
1913
1914 /* Restore Apple core ASICs state */
1915 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1916
1917 /* Restore VIA */
1918 restore_via_state();
1919
0086b5ec
BH
1920 /* tweak LPJ before cpufreq is there */
1921 loops_per_jiffy *= 2;
1922
1da177e4
LT
1923 /* Restore video */
1924 pmac_call_early_video_resume();
1925
1926 /* Restore L2 cache */
1927 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1928 _set_L2CR(save_l2cr);
1929 /* Restore L3 cache */
1930 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1931 _set_L3CR(save_l3cr);
1932
1933 /* Restore userland MMU context */
5e696617 1934 switch_mmu_context(NULL, current->active_mm);
1da177e4
LT
1935
1936 /* Tell PMU we are ready */
1937 pmu_unlock();
1938 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1939 pmu_wait_complete(&req);
1940 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1941 pmu_wait_complete(&req);
1942
0086b5ec
BH
1943 /* Restore LPJ, cpufreq will adjust the cpu frequency */
1944 loops_per_jiffy /= 2;
1945
1da177e4
LT
1946 return 0;
1947}
1948
1949#define PB3400_MEM_CTRL 0xf8000000
1950#define PB3400_MEM_CTRL_SLEEP 0x70
1951
887ef35a
PM
1952static void __iomem *pb3400_mem_ctrl;
1953
1954static void powerbook_sleep_init_3400(void)
1955{
1956 /* map in the memory controller registers */
1957 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1958 if (pb3400_mem_ctrl == NULL)
1959 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1960}
1961
1962static int powerbook_sleep_3400(void)
1da177e4 1963{
f91266ed 1964 int i, x;
1da177e4 1965 unsigned int hid0;
887ef35a 1966 unsigned long msr;
1da177e4 1967 struct adb_request sleep_req;
1da177e4
LT
1968 unsigned int __iomem *mem_ctrl_sleep;
1969
887ef35a 1970 if (pb3400_mem_ctrl == NULL)
1da177e4 1971 return -ENOMEM;
887ef35a 1972 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 1973
1da177e4
LT
1974 /* Set the memory controller to keep the memory refreshed
1975 while we're asleep */
1976 for (i = 0x403f; i >= 0x4000; --i) {
1977 out_be32(mem_ctrl_sleep, i);
1978 do {
1979 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1980 } while (x == 0);
1981 if (x >= 0x100)
1982 break;
1983 }
1984
1985 /* Ask the PMU to put us to sleep */
1986 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM
1987 pmu_wait_complete(&sleep_req);
1988 pmu_unlock();
1da177e4 1989
887ef35a 1990 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 1991
1da177e4
LT
1992 asleep = 1;
1993
1994 /* Put the CPU into sleep mode */
21fe3301 1995 hid0 = mfspr(SPRN_HID0);
1da177e4 1996 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 1997 mtspr(SPRN_HID0, hid0);
887ef35a
PM
1998 local_irq_enable();
1999 msr = mfmsr() | MSR_POW;
2000 while (asleep) {
2001 mb();
2002 mtmsr(msr);
2003 isync();
2004 }
2005 local_irq_disable();
1da177e4
LT
2006
2007 /* OK, we're awake again, start restoring things */
2008 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 2009 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 2010
1da177e4
LT
2011 return 0;
2012}
2013
f91266ed 2014#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 2015
1da177e4
LT
2016/*
2017 * Support for /dev/pmu device
2018 */
2019#define RB_SIZE 0x10
2020struct pmu_private {
2021 struct list_head list;
2022 int rb_get;
2023 int rb_put;
2024 struct rb_entry {
2025 unsigned short len;
2026 unsigned char data[16];
2027 } rb_buf[RB_SIZE];
2028 wait_queue_head_t wait;
2029 spinlock_t lock;
2030#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2031 int backlight_locker;
4b755999 2032#endif
1da177e4
LT
2033};
2034
2035static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2036static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2037
aacaf9bd 2038static void
1da177e4
LT
2039pmu_pass_intr(unsigned char *data, int len)
2040{
2041 struct pmu_private *pp;
2042 struct list_head *list;
2043 int i;
2044 unsigned long flags;
2045
2046 if (len > sizeof(pp->rb_buf[0].data))
2047 len = sizeof(pp->rb_buf[0].data);
2048 spin_lock_irqsave(&all_pvt_lock, flags);
2049 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2050 pp = list_entry(list, struct pmu_private, list);
2051 spin_lock(&pp->lock);
2052 i = pp->rb_put + 1;
2053 if (i >= RB_SIZE)
2054 i = 0;
2055 if (i != pp->rb_get) {
2056 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2057 rp->len = len;
2058 memcpy(rp->data, data, len);
2059 pp->rb_put = i;
2060 wake_up_interruptible(&pp->wait);
2061 }
2062 spin_unlock(&pp->lock);
2063 }
2064 spin_unlock_irqrestore(&all_pvt_lock, flags);
2065}
2066
aacaf9bd 2067static int
1da177e4
LT
2068pmu_open(struct inode *inode, struct file *file)
2069{
2070 struct pmu_private *pp;
2071 unsigned long flags;
2072
2073 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2074 if (pp == 0)
2075 return -ENOMEM;
2076 pp->rb_get = pp->rb_put = 0;
2077 spin_lock_init(&pp->lock);
2078 init_waitqueue_head(&pp->wait);
ffe83733 2079 lock_kernel();
1da177e4
LT
2080 spin_lock_irqsave(&all_pvt_lock, flags);
2081#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2082 pp->backlight_locker = 0;
4b755999 2083#endif
1da177e4
LT
2084 list_add(&pp->list, &all_pmu_pvt);
2085 spin_unlock_irqrestore(&all_pvt_lock, flags);
2086 file->private_data = pp;
ffe83733 2087 unlock_kernel();
1da177e4
LT
2088 return 0;
2089}
2090
aacaf9bd 2091static ssize_t
1da177e4
LT
2092pmu_read(struct file *file, char __user *buf,
2093 size_t count, loff_t *ppos)
2094{
2095 struct pmu_private *pp = file->private_data;
2096 DECLARE_WAITQUEUE(wait, current);
2097 unsigned long flags;
2098 int ret = 0;
2099
2100 if (count < 1 || pp == 0)
2101 return -EINVAL;
2102 if (!access_ok(VERIFY_WRITE, buf, count))
2103 return -EFAULT;
2104
2105 spin_lock_irqsave(&pp->lock, flags);
2106 add_wait_queue(&pp->wait, &wait);
2107 current->state = TASK_INTERRUPTIBLE;
2108
2109 for (;;) {
2110 ret = -EAGAIN;
2111 if (pp->rb_get != pp->rb_put) {
2112 int i = pp->rb_get;
2113 struct rb_entry *rp = &pp->rb_buf[i];
2114 ret = rp->len;
2115 spin_unlock_irqrestore(&pp->lock, flags);
2116 if (ret > count)
2117 ret = count;
2118 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2119 ret = -EFAULT;
2120 if (++i >= RB_SIZE)
2121 i = 0;
2122 spin_lock_irqsave(&pp->lock, flags);
2123 pp->rb_get = i;
2124 }
2125 if (ret >= 0)
2126 break;
2127 if (file->f_flags & O_NONBLOCK)
2128 break;
2129 ret = -ERESTARTSYS;
2130 if (signal_pending(current))
2131 break;
2132 spin_unlock_irqrestore(&pp->lock, flags);
2133 schedule();
2134 spin_lock_irqsave(&pp->lock, flags);
2135 }
2136 current->state = TASK_RUNNING;
2137 remove_wait_queue(&pp->wait, &wait);
2138 spin_unlock_irqrestore(&pp->lock, flags);
2139
2140 return ret;
2141}
2142
aacaf9bd 2143static ssize_t
1da177e4
LT
2144pmu_write(struct file *file, const char __user *buf,
2145 size_t count, loff_t *ppos)
2146{
2147 return 0;
2148}
2149
aacaf9bd 2150static unsigned int
1da177e4
LT
2151pmu_fpoll(struct file *filp, poll_table *wait)
2152{
2153 struct pmu_private *pp = filp->private_data;
2154 unsigned int mask = 0;
2155 unsigned long flags;
2156
2157 if (pp == 0)
2158 return 0;
2159 poll_wait(filp, &pp->wait, wait);
2160 spin_lock_irqsave(&pp->lock, flags);
2161 if (pp->rb_get != pp->rb_put)
2162 mask |= POLLIN;
2163 spin_unlock_irqrestore(&pp->lock, flags);
2164 return mask;
2165}
2166
aacaf9bd 2167static int
1da177e4
LT
2168pmu_release(struct inode *inode, struct file *file)
2169{
2170 struct pmu_private *pp = file->private_data;
2171 unsigned long flags;
2172
1da177e4
LT
2173 if (pp != 0) {
2174 file->private_data = NULL;
2175 spin_lock_irqsave(&all_pvt_lock, flags);
2176 list_del(&pp->list);
2177 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2178
1da177e4 2179#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH
2180 if (pp->backlight_locker)
2181 pmac_backlight_enable();
2182#endif
2183
1da177e4
LT
2184 kfree(pp);
2185 }
1da177e4
LT
2186 return 0;
2187}
2188
f91266ed 2189#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2190static void pmac_suspend_disable_irqs(void)
f91266ed 2191{
f91266ed
JB
2192 /* Call platform functions marked "on sleep" */
2193 pmac_pfunc_i2c_suspend();
2194 pmac_pfunc_base_suspend();
f91266ed
JB
2195}
2196
2197static int powerbook_sleep(suspend_state_t state)
2198{
2199 int error = 0;
2200
2201 /* Wait for completion of async requests */
2202 while (!batt_req.complete)
2203 pmu_poll();
2204
2205 /* Giveup the lazy FPU & vec so we don't have to back them
2206 * up from the low level code
2207 */
2208 enable_kernel_fp();
2209
2210#ifdef CONFIG_ALTIVEC
2211 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2212 enable_kernel_altivec();
2213#endif /* CONFIG_ALTIVEC */
2214
2215 switch (pmu_kind) {
2216 case PMU_OHARE_BASED:
2217 error = powerbook_sleep_3400();
2218 break;
2219 case PMU_HEATHROW_BASED:
2220 case PMU_PADDINGTON_BASED:
2221 error = powerbook_sleep_grackle();
2222 break;
2223 case PMU_KEYLARGO_BASED:
2224 error = powerbook_sleep_Core99();
2225 break;
2226 default:
2227 return -ENOSYS;
2228 }
2229
2230 if (error)
2231 return error;
2232
2233 mdelay(100);
2234
f91266ed
JB
2235 return 0;
2236}
2237
7ac5dde9 2238static void pmac_suspend_enable_irqs(void)
f91266ed
JB
2239{
2240 /* Force a poll of ADB interrupts */
2241 adb_int_pending = 1;
2242 via_pmu_interrupt(0, NULL);
2243
f91266ed 2244 mdelay(10);
f91266ed
JB
2245
2246 /* Call platform functions marked "on wake" */
2247 pmac_pfunc_base_resume();
2248 pmac_pfunc_i2c_resume();
2249}
2250
2251static int pmu_sleep_valid(suspend_state_t state)
2252{
2253 return state == PM_SUSPEND_MEM
2254 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2255}
2256
2257static struct platform_suspend_ops pmu_pm_ops = {
2258 .enter = powerbook_sleep,
2259 .valid = pmu_sleep_valid,
2260};
2261
2262static int register_pmu_pm_ops(void)
2263{
7ac5dde9
SW
2264 if (pmu_kind == PMU_OHARE_BASED)
2265 powerbook_sleep_init_3400();
2266 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2267 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB
2268 suspend_set_ops(&pmu_pm_ops);
2269
2270 return 0;
2271}
2272
2273device_initcall(register_pmu_pm_ops);
2274#endif
2275
55929332 2276static int pmu_ioctl(struct file *filp,
1da177e4
LT
2277 u_int cmd, u_long arg)
2278{
1da177e4 2279 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2280 int error = -EINVAL;
1da177e4
LT
2281
2282 switch (cmd) {
2283 case PMU_IOC_SLEEP:
2284 if (!capable(CAP_SYS_ADMIN))
2285 return -EACCES;
f91266ed 2286 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2287 case PMU_IOC_CAN_SLEEP:
f91266ed 2288 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT
2289 return put_user(0, argp);
2290 else
2291 return put_user(1, argp);
2292
5474c120
MH
2293#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2294 /* Compatibility ioctl's for backlight */
1da177e4 2295 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH
2296 {
2297 int brightness;
2298
5474c120
MH
2299 brightness = pmac_backlight_get_legacy_brightness();
2300 if (brightness < 0)
2301 return brightness;
2302 else
2303 return put_user(brightness, argp);
2304
2305 }
1da177e4
LT
2306 case PMU_IOC_SET_BACKLIGHT:
2307 {
5474c120
MH
2308 int brightness;
2309
5474c120
MH
2310 error = get_user(brightness, argp);
2311 if (error)
2312 return error;
2313
2314 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT
2315 }
2316#ifdef CONFIG_INPUT_ADBHID
2317 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2318 struct pmu_private *pp = filp->private_data;
8c870933 2319
1da177e4
LT
2320 if (pp->backlight_locker)
2321 return 0;
4b755999 2322
1da177e4 2323 pp->backlight_locker = 1;
4b755999
MH
2324 pmac_backlight_disable();
2325
1da177e4
LT
2326 return 0;
2327 }
2328#endif /* CONFIG_INPUT_ADBHID */
5474c120 2329#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2330
1da177e4
LT
2331 case PMU_IOC_GET_MODEL:
2332 return put_user(pmu_kind, argp);
2333 case PMU_IOC_HAS_ADB:
2334 return put_user(pmu_has_adb, argp);
2335 }
8c870933 2336 return error;
1da177e4
LT
2337}
2338
55929332
AB
2339static long pmu_unlocked_ioctl(struct file *filp,
2340 u_int cmd, u_long arg)
2341{
2342 int ret;
2343
2344 lock_kernel();
2345 ret = pmu_ioctl(filp, cmd, arg);
2346 unlock_kernel();
2347
2348 return ret;
2349}
2350
fa027c2a 2351static const struct file_operations pmu_device_fops = {
1da177e4
LT
2352 .read = pmu_read,
2353 .write = pmu_write,
2354 .poll = pmu_fpoll,
55929332 2355 .unlocked_ioctl = pmu_unlocked_ioctl,
1da177e4
LT
2356 .open = pmu_open,
2357 .release = pmu_release,
2358};
2359
aacaf9bd 2360static struct miscdevice pmu_device = {
1da177e4
LT
2361 PMU_MINOR, "pmu", &pmu_device_fops
2362};
2363
8c870933 2364static int pmu_device_init(void)
1da177e4
LT
2365{
2366 if (!via)
8c870933 2367 return 0;
1da177e4
LT
2368 if (misc_register(&pmu_device) < 0)
2369 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2370 return 0;
1da177e4 2371}
8c870933
BH
2372device_initcall(pmu_device_init);
2373
1da177e4
LT
2374
2375#ifdef DEBUG_SLEEP
aacaf9bd 2376static inline void
1da177e4
LT
2377polled_handshake(volatile unsigned char __iomem *via)
2378{
2379 via[B] &= ~TREQ; eieio();
2380 while ((via[B] & TACK) != 0)
2381 ;
2382 via[B] |= TREQ; eieio();
2383 while ((via[B] & TACK) == 0)
2384 ;
2385}
2386
aacaf9bd 2387static inline void
1da177e4
LT
2388polled_send_byte(volatile unsigned char __iomem *via, int x)
2389{
2390 via[ACR] |= SR_OUT | SR_EXT; eieio();
2391 via[SR] = x; eieio();
2392 polled_handshake(via);
2393}
2394
aacaf9bd 2395static inline int
1da177e4
LT
2396polled_recv_byte(volatile unsigned char __iomem *via)
2397{
2398 int x;
2399
2400 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2401 x = via[SR]; eieio();
2402 polled_handshake(via);
2403 x = via[SR]; eieio();
2404 return x;
2405}
2406
aacaf9bd 2407int
1da177e4
LT
2408pmu_polled_request(struct adb_request *req)
2409{
2410 unsigned long flags;
2411 int i, l, c;
2412 volatile unsigned char __iomem *v = via;
2413
2414 req->complete = 1;
2415 c = req->data[0];
2416 l = pmu_data_len[c][0];
2417 if (l >= 0 && req->nbytes != l + 1)
2418 return -EINVAL;
2419
2420 local_irq_save(flags);
2421 while (pmu_state != idle)
2422 pmu_poll();
2423
2424 while ((via[B] & TACK) == 0)
2425 ;
2426 polled_send_byte(v, c);
2427 if (l < 0) {
2428 l = req->nbytes - 1;
2429 polled_send_byte(v, l);
2430 }
2431 for (i = 1; i <= l; ++i)
2432 polled_send_byte(v, req->data[i]);
2433
2434 l = pmu_data_len[c][1];
2435 if (l < 0)
2436 l = polled_recv_byte(v);
2437 for (i = 0; i < l; ++i)
2438 req->reply[i + req->reply_len] = polled_recv_byte(v);
2439
2440 if (req->done)
2441 (*req->done)(req);
2442
2443 local_irq_restore(flags);
2444 return 0;
2445}
1da177e4 2446
f91266ed
JB
2447/* N.B. This doesn't work on the 3400 */
2448void pmu_blink(int n)
2449{
2450 struct adb_request req;
1da177e4 2451
f91266ed 2452 memset(&req, 0, sizeof(req));
1da177e4 2453
f91266ed
JB
2454 for (; n > 0; --n) {
2455 req.nbytes = 4;
2456 req.done = NULL;
2457 req.data[0] = 0xee;
2458 req.data[1] = 4;
2459 req.data[2] = 0;
2460 req.data[3] = 1;
2461 req.reply[0] = ADB_RET_OK;
2462 req.reply_len = 1;
2463 req.reply_expected = 0;
2464 pmu_polled_request(&req);
2465 mdelay(50);
2466 req.nbytes = 4;
2467 req.done = NULL;
2468 req.data[0] = 0xee;
2469 req.data[1] = 4;
2470 req.data[2] = 0;
2471 req.data[3] = 0;
2472 req.reply[0] = ADB_RET_OK;
2473 req.reply_len = 1;
2474 req.reply_expected = 0;
2475 pmu_polled_request(&req);
2476 mdelay(50);
2477 }
2478 mdelay(50);
2479}
2480#endif /* DEBUG_SLEEP */
1da177e4 2481
f91266ed 2482#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2483int pmu_sys_suspended;
1da177e4 2484
3bfffd97 2485static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
1da177e4 2486{
ca078bae 2487 if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
1da177e4
LT
2488 return 0;
2489
0094f2cd 2490 /* Suspend PMU event interrupts */\
1da177e4 2491 pmu_suspend();
1da177e4 2492 pmu_sys_suspended = 1;
0094f2cd
BH
2493
2494#ifdef CONFIG_PMAC_BACKLIGHT
2495 /* Tell backlight code not to muck around with the chip anymore */
2496 pmu_backlight_set_sleep(1);
2497#endif
2498
1da177e4
LT
2499 return 0;
2500}
2501
2502static int pmu_sys_resume(struct sys_device *sysdev)
2503{
2504 struct adb_request req;
2505
2506 if (!pmu_sys_suspended)
2507 return 0;
2508
2509 /* Tell PMU we are ready */
2510 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2511 pmu_wait_complete(&req);
2512
0094f2cd
BH
2513#ifdef CONFIG_PMAC_BACKLIGHT
2514 /* Tell backlight code it can use the chip again */
2515 pmu_backlight_set_sleep(0);
2516#endif
1da177e4
LT
2517 /* Resume PMU event interrupts */
2518 pmu_resume();
1da177e4
LT
2519 pmu_sys_suspended = 0;
2520
2521 return 0;
2522}
2523
f91266ed 2524#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
2525
2526static struct sysdev_class pmu_sysclass = {
af5ca3f4 2527 .name = "pmu",
1da177e4
LT
2528};
2529
2530static struct sys_device device_pmu = {
1da177e4
LT
2531 .cls = &pmu_sysclass,
2532};
2533
2534static struct sysdev_driver driver_pmu = {
f91266ed 2535#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
2536 .suspend = &pmu_sys_suspend,
2537 .resume = &pmu_sys_resume,
f91266ed 2538#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
2539};
2540
2541static int __init init_pmu_sysfs(void)
2542{
2543 int rc;
2544
2545 rc = sysdev_class_register(&pmu_sysclass);
2546 if (rc) {
2547 printk(KERN_ERR "Failed registering PMU sys class\n");
2548 return -ENODEV;
2549 }
2550 rc = sysdev_register(&device_pmu);
2551 if (rc) {
2552 printk(KERN_ERR "Failed registering PMU sys device\n");
2553 return -ENODEV;
2554 }
2555 rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
2556 if (rc) {
2557 printk(KERN_ERR "Failed registering PMU sys driver\n");
2558 return -ENODEV;
2559 }
2560 return 0;
2561}
2562
2563subsys_initcall(init_pmu_sysfs);
2564
2565EXPORT_SYMBOL(pmu_request);
730745a5 2566EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT
2567EXPORT_SYMBOL(pmu_poll);
2568EXPORT_SYMBOL(pmu_poll_adb);
2569EXPORT_SYMBOL(pmu_wait_complete);
2570EXPORT_SYMBOL(pmu_suspend);
2571EXPORT_SYMBOL(pmu_resume);
2572EXPORT_SYMBOL(pmu_unlock);
620a2459 2573#if defined(CONFIG_PPC32)
1da177e4
LT
2574EXPORT_SYMBOL(pmu_enable_irled);
2575EXPORT_SYMBOL(pmu_battery_count);
2576EXPORT_SYMBOL(pmu_batteries);
2577EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2578#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2579