[net-next-2.6.git] / drivers / kvm / kvm.h

#ifndef __KVM_H
#define __KVM_H

/*
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 */

#include <linux/types.h>
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/mm.h>

#include "vmx.h"
#include <linux/kvm.h>

#define CR0_PE_MASK (1ULL << 0)
#define CR0_TS_MASK (1ULL << 3)
#define CR0_NE_MASK (1ULL << 5)
#define CR0_WP_MASK (1ULL << 16)
#define CR0_NW_MASK (1ULL << 29)
#define CR0_CD_MASK (1ULL << 30)
#define CR0_PG_MASK (1ULL << 31)

#define CR3_WPT_MASK (1ULL << 3)
#define CR3_PCD_MASK (1ULL << 4)

#define CR3_RESEVED_BITS 0x07ULL
#define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
#define CR3_FLAGS_MASK ((1ULL << 5) - 1)

#define CR4_VME_MASK (1ULL << 0)
#define CR4_PSE_MASK (1ULL << 4)
#define CR4_PAE_MASK (1ULL << 5)
#define CR4_PGE_MASK (1ULL << 7)
#define CR4_VMXE_MASK (1ULL << 13)

#define KVM_GUEST_CR0_MASK \
	(CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
	 | CR0_NW_MASK | CR0_CD_MASK)
#define KVM_VM_CR0_ALWAYS_ON \
	(CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK)
#define KVM_GUEST_CR4_MASK \
	(CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
#define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
#define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)

#define INVALID_PAGE (~(hpa_t)0)
#define UNMAPPED_GVA (~(gpa_t)0)

#define KVM_MAX_VCPUS 1
#define KVM_MEMORY_SLOTS 4
#define KVM_NUM_MMU_PAGES 256
#define KVM_MIN_FREE_MMU_PAGES 5
#define KVM_REFILL_PAGES 25

#define FX_IMAGE_SIZE 512
#define FX_IMAGE_ALIGN 16
#define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)

#define DE_VECTOR 0
#define DF_VECTOR 8
#define TS_VECTOR 10
#define NP_VECTOR 11
#define SS_VECTOR 12
#define GP_VECTOR 13
#define PF_VECTOR 14

#define SELECTOR_TI_MASK (1 << 2)
#define SELECTOR_RPL_MASK 0x03

#define IOPL_SHIFT 12

/*
 * Address types:
 *
 *  gva - guest virtual address
 *  gpa - guest physical address
 *  gfn - guest frame number
 *  hva - host virtual address
 *  hpa - host physical address
 *  hfn - host frame number
 */

typedef unsigned long  gva_t;
typedef u64            gpa_t;
typedef unsigned long  gfn_t;

typedef unsigned long  hva_t;
typedef u64            hpa_t;
typedef unsigned long  hfn_t;

#define NR_PTE_CHAIN_ENTRIES 5

struct kvm_pte_chain {
	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	struct hlist_node link;
};

/*
 * kvm_mmu_page_role, below, is defined as:
 *
 *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
 *   bits 4:7 - page table level for this shadow (1-4)
 *   bits 8:9 - page table quadrant for 2-level guests
 *   bit   16 - "metaphysical" - gfn is not a real page (huge page/real mode)
 */
union kvm_mmu_page_role {
	unsigned word;
	struct {
		unsigned glevels : 4;
		unsigned level : 4;
		unsigned quadrant : 2;
		unsigned pad_for_nice_hex_output : 6;
		unsigned metaphysical : 1;
	};
};

struct kvm_mmu_page {
	struct list_head link;
	struct hlist_node hash_link;

	/*
	 * The following two entries are used to key the shadow page in the
	 * hash table.
	 */
	gfn_t gfn;
	union kvm_mmu_page_role role;

	hpa_t page_hpa;
	unsigned long slot_bitmap; /* One bit set per slot which has memory
				    * in this shadow page.
				    */
	int global;              /* Set if all ptes in this page are global */
	int multimapped;         /* More than one parent_pte? */
	int root_count;          /* Currently serving as active root */
	union {
		u64 *parent_pte;               /* !multimapped */
		struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	};
};

struct vmcs {
	u32 revision_id;
	u32 abort;
	char data[0];
};

#define vmx_msr_entry kvm_msr_entry

struct kvm_vcpu;

/*
 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
 * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
 * mode.
 */
struct kvm_mmu {
	void (*new_cr3)(struct kvm_vcpu *vcpu);
	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
	void (*free)(struct kvm_vcpu *vcpu);
	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
	hpa_t root_hpa;
	int root_level;
	int shadow_root_level;

	u64 *pae_root;
};

#define KVM_NR_MEM_OBJS 20

struct kvm_mmu_memory_cache {
	int nobjs;
	void *objects[KVM_NR_MEM_OBJS];
};

/*
 * We don't want allocation failures within the mmu code, so we preallocate
 * enough memory for a single page fault in a cache.
 */
struct kvm_guest_debug {
	int enabled;
	unsigned long bp[4];
	int singlestep;
};

enum {
	VCPU_REGS_RAX = 0,
	VCPU_REGS_RCX = 1,
	VCPU_REGS_RDX = 2,
	VCPU_REGS_RBX = 3,
	VCPU_REGS_RSP = 4,
	VCPU_REGS_RBP = 5,
	VCPU_REGS_RSI = 6,
	VCPU_REGS_RDI = 7,
#ifdef CONFIG_X86_64
	VCPU_REGS_R8 = 8,
	VCPU_REGS_R9 = 9,
	VCPU_REGS_R10 = 10,
	VCPU_REGS_R11 = 11,
	VCPU_REGS_R12 = 12,
	VCPU_REGS_R13 = 13,
	VCPU_REGS_R14 = 14,
	VCPU_REGS_R15 = 15,
#endif
	NR_VCPU_REGS
};

enum {
	VCPU_SREG_CS,
	VCPU_SREG_DS,
	VCPU_SREG_ES,
	VCPU_SREG_FS,
	VCPU_SREG_GS,
	VCPU_SREG_SS,
	VCPU_SREG_TR,
	VCPU_SREG_LDTR,
};

struct kvm_vcpu {
	struct kvm *kvm;
	union {
		struct vmcs *vmcs;
		struct vcpu_svm *svm;
	};
	struct mutex mutex;
	int   cpu;
	int   launched;
	int interrupt_window_open;
	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
#define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
	unsigned long irq_pending[NR_IRQ_WORDS];
	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	unsigned long rip;      /* needs vcpu_load_rsp_rip() */

	unsigned long cr0;
	unsigned long cr2;
	unsigned long cr3;
	unsigned long cr4;
	unsigned long cr8;
	u64 pdptrs[4]; /* pae */
	u64 shadow_efer;
	u64 apic_base;
	u64 ia32_misc_enable_msr;
	int nmsrs;
	struct vmx_msr_entry *guest_msrs;
	struct vmx_msr_entry *host_msrs;

	struct list_head free_pages;
	struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
	struct kvm_mmu mmu;

	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;

	gfn_t last_pt_write_gfn;
	int   last_pt_write_count;

	struct kvm_guest_debug guest_debug;

	char fx_buf[FX_BUF_SIZE];
	char *host_fx_image;
	char *guest_fx_image;

	int mmio_needed;
	int mmio_read_completed;
	int mmio_is_write;
	int mmio_size;
	unsigned char mmio_data[8];
	gpa_t mmio_phys_addr;

	struct {
		int active;
		u8 save_iopl;
		struct kvm_save_segment {
			u16 selector;
			unsigned long base;
			u32 limit;
			u32 ar;
		} tr, es, ds, fs, gs;
	} rmode;
};

struct kvm_memory_slot {
	gfn_t base_gfn;
	unsigned long npages;
	unsigned long flags;
	struct page **phys_mem;
	unsigned long *dirty_bitmap;
};

struct kvm {
	spinlock_t lock; /* protects everything except vcpus */
	int nmemslots;
	struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
	/*
	 * Hash table of struct kvm_mmu_page.
	 */
	struct list_head active_mmu_pages;
	int n_free_mmu_pages;
	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
	struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
	int memory_config_version;
	int busy;
	unsigned long rmap_overflow;
	struct list_head vm_list;
};

struct kvm_stat {
	u32 pf_fixed;
	u32 pf_guest;
	u32 tlb_flush;
	u32 invlpg;

	u32 exits;
	u32 io_exits;
	u32 mmio_exits;
	u32 signal_exits;
	u32 irq_window_exits;
	u32 halt_exits;
	u32 request_irq_exits;
	u32 irq_exits;
};

struct descriptor_table {
	u16 limit;
	unsigned long base;
} __attribute__((packed));

struct kvm_arch_ops {
	int (*cpu_has_kvm_support)(void);          /* __init */
	int (*disabled_by_bios)(void);             /* __init */
	void (*hardware_enable)(void *dummy);      /* __init */
	void (*hardware_disable)(void *dummy);
	int (*hardware_setup)(void);               /* __init */
	void (*hardware_unsetup)(void);            /* __exit */

	int (*vcpu_create)(struct kvm_vcpu *vcpu);
	void (*vcpu_free)(struct kvm_vcpu *vcpu);

	struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu);
	void (*vcpu_put)(struct kvm_vcpu *vcpu);
	void (*vcpu_decache)(struct kvm_vcpu *vcpu);

	int (*set_guest_debug)(struct kvm_vcpu *vcpu,
			       struct kvm_debug_guest *dbg);
	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
	int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
	void (*get_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*set_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
	void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu);
	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
	void (*set_cr0_no_modeswitch)(struct kvm_vcpu *vcpu,
				      unsigned long cr0);
	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
	void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
	void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
	void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
		       int *exception);
	void (*cache_regs)(struct kvm_vcpu *vcpu);
	void (*decache_regs)(struct kvm_vcpu *vcpu);
	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);

	void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
	void (*tlb_flush)(struct kvm_vcpu *vcpu);
	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
				  unsigned long addr, u32 err_code);

	void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);

	int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
	int (*vcpu_setup)(struct kvm_vcpu *vcpu);
	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
};

extern struct kvm_stat kvm_stat;
extern struct kvm_arch_ops *kvm_arch_ops;

#define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
#define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)

int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
void kvm_exit_arch(void);

void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
int kvm_mmu_create(struct kvm_vcpu *vcpu);
int kvm_mmu_setup(struct kvm_vcpu *vcpu);

int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);

hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
#define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
#define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);

void kvm_emulator_want_group7_invlpg(void);

extern hpa_t bad_page_address;

static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn)
{
	return slot->phys_mem[gfn - slot->base_gfn];
}

struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
void mark_page_dirty(struct kvm *kvm, gfn_t gfn);

enum emulation_result {
	EMULATE_DONE,       /* no further processing */
	EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
	EMULATE_FAIL,         /* can't emulate this instruction */
};

int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
			unsigned long cr2, u16 error_code);
void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
		   unsigned long *rflags);

unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
		     unsigned long *rflags);

struct x86_emulate_ctxt;

int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
int emulate_clts(struct kvm_vcpu *vcpu);
int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
		    unsigned long *dest);
int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
		    unsigned long value);

void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);

int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);

void fx_init(struct kvm_vcpu *vcpu);

void load_msrs(struct vmx_msr_entry *e, int n);
void save_msrs(struct vmx_msr_entry *e, int n);
void kvm_resched(struct kvm_vcpu *vcpu);

int kvm_read_guest(struct kvm_vcpu *vcpu,
	       gva_t addr,
	       unsigned long size,
	       void *dest);

int kvm_write_guest(struct kvm_vcpu *vcpu,
		gva_t addr,
		unsigned long size,
		void *data);

unsigned long segment_base(u16 selector);

void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);

static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
				     u32 error_code)
{
	if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
		kvm_mmu_free_some_pages(vcpu);
	return vcpu->mmu.page_fault(vcpu, gva, error_code);
}

static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn)
{
	struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
	return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
}

static inline int is_long_mode(struct kvm_vcpu *vcpu)
{
#ifdef CONFIG_X86_64
	return vcpu->shadow_efer & EFER_LME;
#else
	return 0;
#endif
}

static inline int is_pae(struct kvm_vcpu *vcpu)
{
	return vcpu->cr4 & CR4_PAE_MASK;
}

static inline int is_pse(struct kvm_vcpu *vcpu)
{
	return vcpu->cr4 & CR4_PSE_MASK;
}

static inline int is_paging(struct kvm_vcpu *vcpu)
{
	return vcpu->cr0 & CR0_PG_MASK;
}

static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
{
	return slot - kvm->memslots;
}

static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
{
	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);

	return (struct kvm_mmu_page *)page_private(page);
}

static inline u16 read_fs(void)
{
	u16 seg;
	asm ("mov %%fs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_gs(void)
{
	u16 seg;
	asm ("mov %%gs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_ldt(void)
{
	u16 ldt;
	asm ("sldt %0" : "=g"(ldt));
	return ldt;
}

static inline void load_fs(u16 sel)
{
	asm ("mov %0, %%fs" : : "rm"(sel));
}

static inline void load_gs(u16 sel)
{
	asm ("mov %0, %%gs" : : "rm"(sel));
}

#ifndef load_ldt
static inline void load_ldt(u16 sel)
{
	asm ("lldt %0" : : "rm"(sel));
}
#endif

static inline void get_idt(struct descriptor_table *table)
{
	asm ("sidt %0" : "=m"(*table));
}

static inline void get_gdt(struct descriptor_table *table)
{
	asm ("sgdt %0" : "=m"(*table));
}

static inline unsigned long read_tr_base(void)
{
	u16 tr;
	asm ("str %0" : "=g"(tr));
	return segment_base(tr);
}

#ifdef CONFIG_X86_64
static inline unsigned long read_msr(unsigned long msr)
{
	u64 value;

	rdmsrl(msr, value);
	return value;
}
#endif

static inline void fx_save(void *image)
{
	asm ("fxsave (%0)":: "r" (image));
}

static inline void fx_restore(void *image)
{
	asm ("fxrstor (%0)":: "r" (image));
}

static inline void fpu_init(void)
{
	asm ("finit");
}

static inline u32 get_rdx_init_val(void)
{
	return 0x600; /* P6 family */
}

#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"

#define MSR_IA32_TIME_STAMP_COUNTER		0x010

#define TSS_IOPB_BASE_OFFSET 0x66
#define TSS_BASE_SIZE 0x68
#define TSS_IOPB_SIZE (65536 / 8)
#define TSS_REDIRECTION_SIZE (256 / 8)
#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)

#endif
Commit	Line	Data
6aa8b732 AK	1	#ifndef __KVM_H
	2	#define __KVM_H
	3
	4	/*
	5	* This work is licensed under the terms of the GNU GPL, version 2. See
	6	* the COPYING file in the top-level directory.
	7	*/
	8
	9	#include <linux/types.h>
	10	#include <linux/list.h>
	11	#include <linux/mutex.h>
	12	#include <linux/spinlock.h>
	13	#include <linux/mm.h>
	14
	15	#include "vmx.h"
	16	#include <linux/kvm.h>
	17
	18	#define CR0_PE_MASK (1ULL << 0)
	19	#define CR0_TS_MASK (1ULL << 3)
	20	#define CR0_NE_MASK (1ULL << 5)
	21	#define CR0_WP_MASK (1ULL << 16)
	22	#define CR0_NW_MASK (1ULL << 29)
	23	#define CR0_CD_MASK (1ULL << 30)
	24	#define CR0_PG_MASK (1ULL << 31)
	25
	26	#define CR3_WPT_MASK (1ULL << 3)
	27	#define CR3_PCD_MASK (1ULL << 4)
	28
	29	#define CR3_RESEVED_BITS 0x07ULL
	30	#define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) \| 0x0fe7ULL)
	31	#define CR3_FLAGS_MASK ((1ULL << 5) - 1)
	32
	33	#define CR4_VME_MASK (1ULL << 0)
	34	#define CR4_PSE_MASK (1ULL << 4)
	35	#define CR4_PAE_MASK (1ULL << 5)
	36	#define CR4_PGE_MASK (1ULL << 7)
	37	#define CR4_VMXE_MASK (1ULL << 13)
	38
	39	#define KVM_GUEST_CR0_MASK \
	40	(CR0_PG_MASK \| CR0_PE_MASK \| CR0_WP_MASK \| CR0_NE_MASK \
	41	\| CR0_NW_MASK \| CR0_CD_MASK)
	42	#define KVM_VM_CR0_ALWAYS_ON \
	43	(CR0_PG_MASK \| CR0_PE_MASK \| CR0_WP_MASK \| CR0_NE_MASK)
	44	#define KVM_GUEST_CR4_MASK \
	45	(CR4_PSE_MASK \| CR4_PAE_MASK \| CR4_PGE_MASK \| CR4_VMXE_MASK \| CR4_VME_MASK)
	46	#define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK \| CR4_PAE_MASK)
	47	#define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK \| CR4_PAE_MASK \| CR4_VME_MASK)
	48
	49	#define INVALID_PAGE (~(hpa_t)0)
	50	#define UNMAPPED_GVA (~(gpa_t)0)
	51
	52	#define KVM_MAX_VCPUS 1
	53	#define KVM_MEMORY_SLOTS 4
	54	#define KVM_NUM_MMU_PAGES 256
ebeace86 AK	55	#define KVM_MIN_FREE_MMU_PAGES 5
ebeace86 AK	56	#define KVM_REFILL_PAGES 25
6aa8b732 AK	57
	58	#define FX_IMAGE_SIZE 512
	59	#define FX_IMAGE_ALIGN 16
	60	#define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
	61
	62	#define DE_VECTOR 0
	63	#define DF_VECTOR 8
	64	#define TS_VECTOR 10
	65	#define NP_VECTOR 11
	66	#define SS_VECTOR 12
	67	#define GP_VECTOR 13
	68	#define PF_VECTOR 14
	69
	70	#define SELECTOR_TI_MASK (1 << 2)
	71	#define SELECTOR_RPL_MASK 0x03
	72
	73	#define IOPL_SHIFT 12
	74
	75	/*
	76	* Address types:
	77	*
	78	* gva - guest virtual address
	79	* gpa - guest physical address
	80	* gfn - guest frame number
	81	* hva - host virtual address
	82	* hpa - host physical address
	83	* hfn - host frame number
	84	*/
	85
	86	typedef unsigned long gva_t;
	87	typedef u64 gpa_t;
	88	typedef unsigned long gfn_t;
	89
	90	typedef unsigned long hva_t;
	91	typedef u64 hpa_t;
	92	typedef unsigned long hfn_t;
	93
cea0f0e7 AK	94	#define NR_PTE_CHAIN_ENTRIES 5
	95
	96	struct kvm_pte_chain {
	97	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	98	struct hlist_node link;
	99	};
	100
	101	/*
	102	* kvm_mmu_page_role, below, is defined as:
	103	*
	104	* bits 0:3 - total guest paging levels (2-4, or zero for real mode)
	105	* bits 4:7 - page table level for this shadow (1-4)
	106	* bits 8:9 - page table quadrant for 2-level guests
	107	* bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
	108	*/
	109	union kvm_mmu_page_role {
	110	unsigned word;
	111	struct {
	112	unsigned glevels : 4;
	113	unsigned level : 4;
	114	unsigned quadrant : 2;
	115	unsigned pad_for_nice_hex_output : 6;
	116	unsigned metaphysical : 1;
	117	};
	118	};
	119
6aa8b732 AK	120	struct kvm_mmu_page {
6aa8b732 AK	121	struct list_head link;
cea0f0e7 AK	122	struct hlist_node hash_link;
	123
	124	/*
	125	* The following two entries are used to key the shadow page in the
	126	* hash table.
	127	*/
	128	gfn_t gfn;
	129	union kvm_mmu_page_role role;
	130
6aa8b732 AK	131	hpa_t page_hpa;
	132	unsigned long slot_bitmap; /* One bit set per slot which has memory
	133	* in this shadow page.
	134	*/
	135	int global; /* Set if all ptes in this page are global */
cea0f0e7	136	int multimapped; /* More than one parent_pte? */
3bb65a22	137	int root_count; /* Currently serving as active root */
cea0f0e7 AK	138	union {
	139	u64 parent_pte; / !multimapped */
	140	struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	141	};
6aa8b732 AK	142	};
	143
	144	struct vmcs {
	145	u32 revision_id;
	146	u32 abort;
	147	char data[0];
	148	};
	149
	150	#define vmx_msr_entry kvm_msr_entry
	151
	152	struct kvm_vcpu;
	153
	154	/*
	155	* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
	156	* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
	157	* mode.
	158	*/
	159	struct kvm_mmu {
	160	void (new_cr3)(struct kvm_vcpu vcpu);
	161	int (page_fault)(struct kvm_vcpu vcpu, gva_t gva, u32 err);
6aa8b732 AK	162	void (free)(struct kvm_vcpu vcpu);
	163	gpa_t (gva_to_gpa)(struct kvm_vcpu vcpu, gva_t gva);
	164	hpa_t root_hpa;
	165	int root_level;
	166	int shadow_root_level;
17ac10ad AK	167
17ac10ad AK	168	u64 *pae_root;
6aa8b732 AK	169	};
6aa8b732 AK	170
714b93da AK	171	#define KVM_NR_MEM_OBJS 20
	172
	173	struct kvm_mmu_memory_cache {
	174	int nobjs;
	175	void *objects[KVM_NR_MEM_OBJS];
	176	};
	177
	178	/*
	179	* We don't want allocation failures within the mmu code, so we preallocate
	180	* enough memory for a single page fault in a cache.
	181	*/
6aa8b732 AK	182	struct kvm_guest_debug {
	183	int enabled;
	184	unsigned long bp[4];
	185	int singlestep;
	186	};
	187
	188	enum {
	189	VCPU_REGS_RAX = 0,
	190	VCPU_REGS_RCX = 1,
	191	VCPU_REGS_RDX = 2,
	192	VCPU_REGS_RBX = 3,
	193	VCPU_REGS_RSP = 4,
	194	VCPU_REGS_RBP = 5,
	195	VCPU_REGS_RSI = 6,
	196	VCPU_REGS_RDI = 7,
05b3e0c2	197	#ifdef CONFIG_X86_64
6aa8b732 AK	198	VCPU_REGS_R8 = 8,
	199	VCPU_REGS_R9 = 9,
	200	VCPU_REGS_R10 = 10,
	201	VCPU_REGS_R11 = 11,
	202	VCPU_REGS_R12 = 12,
	203	VCPU_REGS_R13 = 13,
	204	VCPU_REGS_R14 = 14,
	205	VCPU_REGS_R15 = 15,
	206	#endif
	207	NR_VCPU_REGS
	208	};
	209
	210	enum {
	211	VCPU_SREG_CS,
	212	VCPU_SREG_DS,
	213	VCPU_SREG_ES,
	214	VCPU_SREG_FS,
	215	VCPU_SREG_GS,
	216	VCPU_SREG_SS,
	217	VCPU_SREG_TR,
	218	VCPU_SREG_LDTR,
	219	};
	220
	221	struct kvm_vcpu {
	222	struct kvm *kvm;
	223	union {
	224	struct vmcs *vmcs;
	225	struct vcpu_svm *svm;
	226	};
	227	struct mutex mutex;
	228	int cpu;
	229	int launched;
c1150d8c	230	int interrupt_window_open;
6aa8b732 AK	231	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
	232	#define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
	233	unsigned long irq_pending[NR_IRQ_WORDS];
	234	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	235	unsigned long rip; /* needs vcpu_load_rsp_rip() */
	236
	237	unsigned long cr0;
	238	unsigned long cr2;
	239	unsigned long cr3;
	240	unsigned long cr4;
	241	unsigned long cr8;
1342d353	242	u64 pdptrs[4]; /* pae */
6aa8b732 AK	243	u64 shadow_efer;
6aa8b732 AK	244	u64 apic_base;
6f00e68f	245	u64 ia32_misc_enable_msr;
6aa8b732 AK	246	int nmsrs;
	247	struct vmx_msr_entry *guest_msrs;
	248	struct vmx_msr_entry *host_msrs;
	249
	250	struct list_head free_pages;
	251	struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
	252	struct kvm_mmu mmu;
	253
714b93da AK	254	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	255	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
	256
86a5ba02 AK	257	gfn_t last_pt_write_gfn;
	258	int last_pt_write_count;
	259
6aa8b732 AK	260	struct kvm_guest_debug guest_debug;
	261
	262	char fx_buf[FX_BUF_SIZE];
	263	char *host_fx_image;
	264	char *guest_fx_image;
	265
	266	int mmio_needed;
	267	int mmio_read_completed;
	268	int mmio_is_write;
	269	int mmio_size;
	270	unsigned char mmio_data[8];
	271	gpa_t mmio_phys_addr;
	272
	273	struct {
	274	int active;
	275	u8 save_iopl;
	276	struct kvm_save_segment {
	277	u16 selector;
	278	unsigned long base;
	279	u32 limit;
	280	u32 ar;
	281	} tr, es, ds, fs, gs;
	282	} rmode;
	283	};
	284
	285	struct kvm_memory_slot {
	286	gfn_t base_gfn;
	287	unsigned long npages;
	288	unsigned long flags;
	289	struct page **phys_mem;
	290	unsigned long *dirty_bitmap;
	291	};
	292
	293	struct kvm {
	294	spinlock_t lock; /* protects everything except vcpus */
	295	int nmemslots;
	296	struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
cea0f0e7 AK	297	/*
	298	* Hash table of struct kvm_mmu_page.
	299	*/
6aa8b732	300	struct list_head active_mmu_pages;
ebeace86	301	int n_free_mmu_pages;
cea0f0e7	302	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
6aa8b732 AK	303	struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
	304	int memory_config_version;
	305	int busy;
cd4a4e53	306	unsigned long rmap_overflow;
133de902	307	struct list_head vm_list;
6aa8b732 AK	308	};
	309
	310	struct kvm_stat {
	311	u32 pf_fixed;
	312	u32 pf_guest;
	313	u32 tlb_flush;
	314	u32 invlpg;
	315
	316	u32 exits;
	317	u32 io_exits;
	318	u32 mmio_exits;
	319	u32 signal_exits;
c1150d8c DL	320	u32 irq_window_exits;
	321	u32 halt_exits;
	322	u32 request_irq_exits;
6aa8b732 AK	323	u32 irq_exits;
	324	};
	325
	326	struct descriptor_table {
	327	u16 limit;
	328	unsigned long base;
	329	} __attribute__((packed));
	330
	331	struct kvm_arch_ops {
	332	int (cpu_has_kvm_support)(void); / __init */
	333	int (disabled_by_bios)(void); / __init */
	334	void (hardware_enable)(void dummy); /* __init */
	335	void (hardware_disable)(void dummy);
	336	int (hardware_setup)(void); / __init */
	337	void (hardware_unsetup)(void); / __exit */
	338
	339	int (vcpu_create)(struct kvm_vcpu vcpu);
	340	void (vcpu_free)(struct kvm_vcpu vcpu);
	341
	342	struct kvm_vcpu (vcpu_load)(struct kvm_vcpu *vcpu);
	343	void (vcpu_put)(struct kvm_vcpu vcpu);
774c47f1	344	void (vcpu_decache)(struct kvm_vcpu vcpu);
6aa8b732 AK	345
	346	int (set_guest_debug)(struct kvm_vcpu vcpu,
	347	struct kvm_debug_guest *dbg);
	348	int (get_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 *pdata);
	349	int (set_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 data);
	350	u64 (get_segment_base)(struct kvm_vcpu vcpu, int seg);
	351	void (get_segment)(struct kvm_vcpu vcpu,
	352	struct kvm_segment *var, int seg);
	353	void (set_segment)(struct kvm_vcpu vcpu,
	354	struct kvm_segment *var, int seg);
6aa8b732	355	void (get_cs_db_l_bits)(struct kvm_vcpu vcpu, int db, int l);
399badf3	356	void (decache_cr0_cr4_guest_bits)(struct kvm_vcpu vcpu);
6aa8b732 AK	357	void (set_cr0)(struct kvm_vcpu vcpu, unsigned long cr0);
	358	void (set_cr0_no_modeswitch)(struct kvm_vcpu vcpu,
	359	unsigned long cr0);
	360	void (set_cr3)(struct kvm_vcpu vcpu, unsigned long cr3);
	361	void (set_cr4)(struct kvm_vcpu vcpu, unsigned long cr4);
	362	void (set_efer)(struct kvm_vcpu vcpu, u64 efer);
	363	void (get_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	364	void (set_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	365	void (get_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	366	void (set_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	367	unsigned long (get_dr)(struct kvm_vcpu vcpu, int dr);
	368	void (set_dr)(struct kvm_vcpu vcpu, int dr, unsigned long value,
	369	int *exception);
	370	void (cache_regs)(struct kvm_vcpu vcpu);
	371	void (decache_regs)(struct kvm_vcpu vcpu);
	372	unsigned long (get_rflags)(struct kvm_vcpu vcpu);
	373	void (set_rflags)(struct kvm_vcpu vcpu, unsigned long rflags);
	374
	375	void (invlpg)(struct kvm_vcpu vcpu, gva_t addr);
	376	void (tlb_flush)(struct kvm_vcpu vcpu);
	377	void (inject_page_fault)(struct kvm_vcpu vcpu,
	378	unsigned long addr, u32 err_code);
	379
	380	void (inject_gp)(struct kvm_vcpu vcpu, unsigned err_code);
	381
	382	int (run)(struct kvm_vcpu vcpu, struct kvm_run *run);
	383	int (vcpu_setup)(struct kvm_vcpu vcpu);
	384	void (skip_emulated_instruction)(struct kvm_vcpu vcpu);
	385	};
	386
	387	extern struct kvm_stat kvm_stat;
	388	extern struct kvm_arch_ops *kvm_arch_ops;
	389
	390	#define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
	391	#define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
	392
	393	int kvm_init_arch(struct kvm_arch_ops ops, struct module module);
	394	void kvm_exit_arch(void);
	395
	396	void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
8018c27b IM	397	int kvm_mmu_create(struct kvm_vcpu *vcpu);
8018c27b IM	398	int kvm_mmu_setup(struct kvm_vcpu *vcpu);
6aa8b732 AK	399
6aa8b732 AK	400	int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
714b93da	401	void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);
6aa8b732 AK	402
	403	hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
	404	#define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
	405	#define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
	406	static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
	407	hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
	408
	409	void kvm_emulator_want_group7_invlpg(void);
	410
	411	extern hpa_t bad_page_address;
	412
	413	static inline struct page gfn_to_page(struct kvm_memory_slot slot, gfn_t gfn)
	414	{
	415	return slot->phys_mem[gfn - slot->base_gfn];
	416	}
	417
	418	struct kvm_memory_slot gfn_to_memslot(struct kvm kvm, gfn_t gfn);
	419	void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
	420
	421	enum emulation_result {
	422	EMULATE_DONE, /* no further processing */
	423	EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
	424	EMULATE_FAIL, /* can't emulate this instruction */
	425	};
	426
	427	int emulate_instruction(struct kvm_vcpu vcpu, struct kvm_run run,
	428	unsigned long cr2, u16 error_code);
	429	void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	430	void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	431	void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
	432	unsigned long *rflags);
	433
	434	unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
	435	void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
	436	unsigned long *rflags);
	437
	438	struct x86_emulate_ctxt;
	439
	440	int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
	441	int emulate_clts(struct kvm_vcpu *vcpu);
	442	int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
	443	unsigned long *dest);
	444	int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
	445	unsigned long value);
	446
	447	void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
	448	void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
	449	void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
	450	void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
	451	void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
	452
3bab1f5d AK	453	int kvm_get_msr_common(struct kvm_vcpu vcpu, u32 msr, u64 pdata);
3bab1f5d AK	454	int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
6aa8b732 AK	455
	456	void fx_init(struct kvm_vcpu *vcpu);
	457
	458	void load_msrs(struct vmx_msr_entry *e, int n);
	459	void save_msrs(struct vmx_msr_entry *e, int n);
	460	void kvm_resched(struct kvm_vcpu *vcpu);
	461
	462	int kvm_read_guest(struct kvm_vcpu *vcpu,
	463	gva_t addr,
	464	unsigned long size,
	465	void *dest);
	466
	467	int kvm_write_guest(struct kvm_vcpu *vcpu,
	468	gva_t addr,
	469	unsigned long size,
	470	void *data);
	471
	472	unsigned long segment_base(u16 selector);
	473
da4a00f0 AK	474	void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
da4a00f0 AK	475	void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
a436036b	476	int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
ebeace86 AK	477	void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
	478
	479	static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
	480	u32 error_code)
	481	{
	482	if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
	483	kvm_mmu_free_some_pages(vcpu);
	484	return vcpu->mmu.page_fault(vcpu, gva, error_code);
	485	}
da4a00f0	486
6aa8b732 AK	487	static inline struct page _gfn_to_page(struct kvm kvm, gfn_t gfn)
	488	{
	489	struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
	490	return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
	491	}
	492
a9058ecd AK	493	static inline int is_long_mode(struct kvm_vcpu *vcpu)
	494	{
	495	#ifdef CONFIG_X86_64
	496	return vcpu->shadow_efer & EFER_LME;
	497	#else
	498	return 0;
	499	#endif
	500	}
	501
6aa8b732 AK	502	static inline int is_pae(struct kvm_vcpu *vcpu)
	503	{
	504	return vcpu->cr4 & CR4_PAE_MASK;
	505	}
	506
	507	static inline int is_pse(struct kvm_vcpu *vcpu)
	508	{
	509	return vcpu->cr4 & CR4_PSE_MASK;
	510	}
	511
	512	static inline int is_paging(struct kvm_vcpu *vcpu)
	513	{
	514	return vcpu->cr0 & CR0_PG_MASK;
	515	}
	516
	517	static inline int memslot_id(struct kvm kvm, struct kvm_memory_slot slot)
	518	{
	519	return slot - kvm->memslots;
	520	}
	521
	522	static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
	523	{
	524	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
	525
5972e953	526	return (struct kvm_mmu_page *)page_private(page);
6aa8b732 AK	527	}
	528
	529	static inline u16 read_fs(void)
	530	{
	531	u16 seg;
	532	asm ("mov %%fs, %0" : "=g"(seg));
	533	return seg;
	534	}
	535
	536	static inline u16 read_gs(void)
	537	{
	538	u16 seg;
	539	asm ("mov %%gs, %0" : "=g"(seg));
	540	return seg;
	541	}
	542
	543	static inline u16 read_ldt(void)
	544	{
	545	u16 ldt;
	546	asm ("sldt %0" : "=g"(ldt));
	547	return ldt;
	548	}
	549
	550	static inline void load_fs(u16 sel)
	551	{
	552	asm ("mov %0, %%fs" : : "rm"(sel));
	553	}
	554
	555	static inline void load_gs(u16 sel)
	556	{
	557	asm ("mov %0, %%gs" : : "rm"(sel));
	558	}
	559
	560	#ifndef load_ldt
	561	static inline void load_ldt(u16 sel)
	562	{
a0610ddf	563	asm ("lldt %0" : : "rm"(sel));
6aa8b732 AK	564	}
	565	#endif
	566
	567	static inline void get_idt(struct descriptor_table *table)
	568	{
	569	asm ("sidt %0" : "=m"(*table));
	570	}
	571
	572	static inline void get_gdt(struct descriptor_table *table)
	573	{
	574	asm ("sgdt %0" : "=m"(*table));
	575	}
	576
	577	static inline unsigned long read_tr_base(void)
	578	{
	579	u16 tr;
	580	asm ("str %0" : "=g"(tr));
	581	return segment_base(tr);
	582	}
	583
05b3e0c2	584	#ifdef CONFIG_X86_64
6aa8b732 AK	585	static inline unsigned long read_msr(unsigned long msr)
	586	{
	587	u64 value;
	588
	589	rdmsrl(msr, value);
	590	return value;
	591	}
	592	#endif
	593
	594	static inline void fx_save(void *image)
	595	{
	596	asm ("fxsave (%0)":: "r" (image));
	597	}
	598
	599	static inline void fx_restore(void *image)
	600	{
	601	asm ("fxrstor (%0)":: "r" (image));
	602	}
	603
	604	static inline void fpu_init(void)
	605	{
	606	asm ("finit");
	607	}
	608
	609	static inline u32 get_rdx_init_val(void)
	610	{
	611	return 0x600; /* P6 family */
	612	}
	613
	614	#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
	615	#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
	616	#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
	617	#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
	618	#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
	619	#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
	620	#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
	621	#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
	622	#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
	623
	624	#define MSR_IA32_TIME_STAMP_COUNTER 0x010
	625
	626	#define TSS_IOPB_BASE_OFFSET 0x66
	627	#define TSS_BASE_SIZE 0x68
	628	#define TSS_IOPB_SIZE (65536 / 8)
	629	#define TSS_REDIRECTION_SIZE (256 / 8)
	630	#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
	631
6aa8b732	632	#endif