[net-next-2.6.git] / drivers / input / touchscreen / ucb1400_ts.c

/*
 *  Philips UCB1400 touchscreen driver
 *
 *  Author:	Nicolas Pitre
 *  Created:	September 25, 2006
 *  Copyright:	MontaVista Software, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
 * covering the UCB1100, UCB1200 and UCB1300..  Support for the UCB1400 has
 * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/suspend.h>
#include <linux/slab.h>
#include <linux/kthread.h>
#include <linux/freezer.h>

#include <sound/driver.h>
#include <sound/core.h>
#include <sound/ac97_codec.h>


/*
 * Interesting UCB1400 AC-link registers
 */

#define UCB_IE_RIS		0x5e
#define UCB_IE_FAL		0x60
#define UCB_IE_STATUS		0x62
#define UCB_IE_CLEAR		0x62
#define UCB_IE_ADC		(1 << 11)
#define UCB_IE_TSPX		(1 << 12)

#define UCB_TS_CR		0x64
#define UCB_TS_CR_TSMX_POW	(1 << 0)
#define UCB_TS_CR_TSPX_POW	(1 << 1)
#define UCB_TS_CR_TSMY_POW	(1 << 2)
#define UCB_TS_CR_TSPY_POW	(1 << 3)
#define UCB_TS_CR_TSMX_GND	(1 << 4)
#define UCB_TS_CR_TSPX_GND	(1 << 5)
#define UCB_TS_CR_TSMY_GND	(1 << 6)
#define UCB_TS_CR_TSPY_GND	(1 << 7)
#define UCB_TS_CR_MODE_INT	(0 << 8)
#define UCB_TS_CR_MODE_PRES	(1 << 8)
#define UCB_TS_CR_MODE_POS	(2 << 8)
#define UCB_TS_CR_BIAS_ENA	(1 << 11)
#define UCB_TS_CR_TSPX_LOW	(1 << 12)
#define UCB_TS_CR_TSMX_LOW	(1 << 13)

#define UCB_ADC_CR		0x66
#define UCB_ADC_SYNC_ENA	(1 << 0)
#define UCB_ADC_VREFBYP_CON	(1 << 1)
#define UCB_ADC_INP_TSPX	(0 << 2)
#define UCB_ADC_INP_TSMX	(1 << 2)
#define UCB_ADC_INP_TSPY	(2 << 2)
#define UCB_ADC_INP_TSMY	(3 << 2)
#define UCB_ADC_INP_AD0		(4 << 2)
#define UCB_ADC_INP_AD1		(5 << 2)
#define UCB_ADC_INP_AD2		(6 << 2)
#define UCB_ADC_INP_AD3		(7 << 2)
#define UCB_ADC_EXT_REF		(1 << 5)
#define UCB_ADC_START		(1 << 7)
#define UCB_ADC_ENA		(1 << 15)

#define UCB_ADC_DATA		0x68
#define UCB_ADC_DAT_VALID	(1 << 15)
#define UCB_ADC_DAT_VALUE(x)	((x) & 0x3ff)

#define UCB_ID			0x7e
#define UCB_ID_1400             0x4304


struct ucb1400 {
	struct snd_ac97		*ac97;
	struct input_dev	*ts_idev;

	int			irq;

	wait_queue_head_t	ts_wait;
	struct task_struct	*ts_task;

	unsigned int		irq_pending;	/* not bit field shared */
	unsigned int		ts_restart:1;
	unsigned int		adcsync:1;
};

static int adcsync;
static int ts_delay = 55; /* us */
static int ts_delay_pressure;	/* us */

static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
{
	return ucb->ac97->bus->ops->read(ucb->ac97, reg);
}

static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
{
	ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
}

static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
}

static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
{
	unsigned int val;

	if (ucb->adcsync)
		adc_channel |= UCB_ADC_SYNC_ENA;

	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START);

	for (;;) {
		val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
		if (val & UCB_ADC_DAT_VALID)
			break;
		/* yield to other processes */
		set_current_state(TASK_INTERRUPTIBLE);
		schedule_timeout(1);
	}

	return UCB_ADC_DAT_VALUE(val);
}

static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
}

/* Switch to interrupt mode. */
static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
			UCB_TS_CR_MODE_INT);
}

/*
 * Switch to pressure mode, and read pressure.  We don't need to wait
 * here, since both plates are being driven.
 */
static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
	udelay(ts_delay_pressure);
	return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
}

/*
 * Switch to X position mode and measure Y plate.  We switch the plate
 * configuration in pressure mode, then switch to position mode.  This
 * gives a faster response time.  Even so, we need to wait about 55us
 * for things to stabilise.
 */
static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
			UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);

	udelay(ts_delay);

	return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
}

/*
 * Switch to Y position mode and measure X plate.  We switch the plate
 * configuration in pressure mode, then switch to position mode.  This
 * gives a faster response time.  Even so, we need to wait about 55us
 * for things to stabilise.
 */
static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
			UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);

	udelay(ts_delay);

	return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX);
}

/*
 * Switch to X plate resistance mode.  Set MX to ground, PX to
 * supply.  Measure current.
 */
static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
	return ucb1400_adc_read(ucb, 0);
}

/*
 * Switch to Y plate resistance mode.  Set MY to ground, PY to
 * supply.  Measure current.
 */
static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_TS_CR,
			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
	return ucb1400_adc_read(ucb, 0);
}

static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb)
{
	unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR);
	return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
}

static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX);
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
	ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX);
}

static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb)
{
	ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
}

static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
{
	input_report_abs(idev, ABS_X, x);
	input_report_abs(idev, ABS_Y, y);
	input_report_abs(idev, ABS_PRESSURE, pressure);
	input_sync(idev);
}

static void ucb1400_ts_event_release(struct input_dev *idev)
{
	input_report_abs(idev, ABS_PRESSURE, 0);
	input_sync(idev);
}

static void ucb1400_handle_pending_irq(struct ucb1400 *ucb)
{
	unsigned int isr;

	isr = ucb1400_reg_read(ucb, UCB_IE_STATUS);
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr);
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);

	if (isr & UCB_IE_TSPX)
		ucb1400_ts_irq_disable(ucb);
	else
		printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);

	enable_irq(ucb->irq);
}

static int ucb1400_ts_thread(void *_ucb)
{
	struct ucb1400 *ucb = _ucb;
	struct task_struct *tsk = current;
	int valid = 0;
	struct sched_param param = { .sched_priority = 1 };

	sched_setscheduler(tsk, SCHED_FIFO, &param);

	while (!kthread_should_stop()) {
		unsigned int x, y, p;
		long timeout;

		ucb->ts_restart = 0;

		if (ucb->irq_pending) {
			ucb->irq_pending = 0;
			ucb1400_handle_pending_irq(ucb);
		}

		ucb1400_adc_enable(ucb);
		x = ucb1400_ts_read_xpos(ucb);
		y = ucb1400_ts_read_ypos(ucb);
		p = ucb1400_ts_read_pressure(ucb);
		ucb1400_adc_disable(ucb);

		/* Switch back to interrupt mode. */
		ucb1400_ts_mode_int(ucb);

		msleep(10);

		if (ucb1400_ts_pen_down(ucb)) {
			ucb1400_ts_irq_enable(ucb);

			/*
			 * If we spat out a valid sample set last time,
			 * spit out a "pen off" sample here.
			 */
			if (valid) {
				ucb1400_ts_event_release(ucb->ts_idev);
				valid = 0;
			}

			timeout = MAX_SCHEDULE_TIMEOUT;
		} else {
			valid = 1;
			ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
			timeout = msecs_to_jiffies(10);
		}

		wait_event_interruptible_timeout(ucb->ts_wait,
			ucb->irq_pending || ucb->ts_restart || kthread_should_stop(),
			timeout);
		try_to_freeze();
	}

	/* Send the "pen off" if we are stopping with the pen still active */
	if (valid)
		ucb1400_ts_event_release(ucb->ts_idev);

	ucb->ts_task = NULL;
	return 0;
}

/*
 * A restriction with interrupts exists when using the ucb1400, as
 * the codec read/write routines may sleep while waiting for codec
 * access completion and uses semaphores for access control to the
 * AC97 bus.  A complete codec read cycle could take  anywhere from
 * 60 to 100uSec so we *definitely* don't want to spin inside the
 * interrupt handler waiting for codec access.  So, we handle the
 * interrupt by scheduling a RT kernel thread to run in process
 * context instead of interrupt context.
 */
static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
{
	struct ucb1400 *ucb = devid;

	if (irqnr == ucb->irq) {
		disable_irq(ucb->irq);
		ucb->irq_pending = 1;
		wake_up(&ucb->ts_wait);
		return IRQ_HANDLED;
	}
	return IRQ_NONE;
}

static int ucb1400_ts_open(struct input_dev *idev)
{
	struct ucb1400 *ucb = input_get_drvdata(idev);
	int ret = 0;

	BUG_ON(ucb->ts_task);

	ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
	if (IS_ERR(ucb->ts_task)) {
		ret = PTR_ERR(ucb->ts_task);
		ucb->ts_task = NULL;
	}

	return ret;
}

static void ucb1400_ts_close(struct input_dev *idev)
{
	struct ucb1400 *ucb = input_get_drvdata(idev);

	if (ucb->ts_task)
		kthread_stop(ucb->ts_task);

	ucb1400_ts_irq_disable(ucb);
	ucb1400_reg_write(ucb, UCB_TS_CR, 0);
}

#ifdef CONFIG_PM
static int ucb1400_ts_resume(struct device *dev)
{
	struct ucb1400 *ucb = dev_get_drvdata(dev);

	if (ucb->ts_task) {
		/*
		 * Restart the TS thread to ensure the
		 * TS interrupt mode is set up again
		 * after sleep.
		 */
		ucb->ts_restart = 1;
		wake_up(&ucb->ts_wait);
	}
	return 0;
}
#else
#define ucb1400_ts_resume NULL
#endif

#ifndef NO_IRQ
#define NO_IRQ	0
#endif

/*
 * Try to probe our interrupt, rather than relying on lots of
 * hard-coded machine dependencies.
 */
static int ucb1400_detect_irq(struct ucb1400 *ucb)
{
	unsigned long mask, timeout;

	mask = probe_irq_on();
	if (!mask) {
		probe_irq_off(mask);
		return -EBUSY;
	}

	/* Enable the ADC interrupt. */
	ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
	ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);

	/* Cause an ADC interrupt. */
	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);

	/* Wait for the conversion to complete. */
	timeout = jiffies + HZ/2;
	while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) {
		cpu_relax();
		if (time_after(jiffies, timeout)) {
			printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
			probe_irq_off(mask);
			return -ENODEV;
		}
	}
	ucb1400_reg_write(ucb, UCB_ADC_CR, 0);

	/* Disable and clear interrupt. */
	ucb1400_reg_write(ucb, UCB_IE_RIS, 0);
	ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);

	/* Read triggered interrupt. */
	ucb->irq = probe_irq_off(mask);
	if (ucb->irq < 0 || ucb->irq == NO_IRQ)
		return -ENODEV;

	return 0;
}

static int ucb1400_ts_probe(struct device *dev)
{
	struct ucb1400 *ucb;
	struct input_dev *idev;
	int error, id, x_res, y_res;

	ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL);
	idev = input_allocate_device();
	if (!ucb || !idev) {
		error = -ENOMEM;
		goto err_free_devs;
	}

	ucb->ts_idev = idev;
	ucb->adcsync = adcsync;
	ucb->ac97 = to_ac97_t(dev);
	init_waitqueue_head(&ucb->ts_wait);

	id = ucb1400_reg_read(ucb, UCB_ID);
	if (id != UCB_ID_1400) {
		error = -ENODEV;
		goto err_free_devs;
	}

	error = ucb1400_detect_irq(ucb);
	if (error) {
		printk(KERN_ERR "UCB1400: IRQ probe failed\n");
		goto err_free_devs;
	}

	error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
				"UCB1400", ucb);
	if (error) {
		printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
				ucb->irq, error);
		goto err_free_devs;
	}
	printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);

	input_set_drvdata(idev, ucb);

	idev->dev.parent	= dev;
	idev->name		= "UCB1400 touchscreen interface";
	idev->id.vendor		= ucb1400_reg_read(ucb, AC97_VENDOR_ID1);
	idev->id.product	= id;
	idev->open		= ucb1400_ts_open;
	idev->close		= ucb1400_ts_close;
	idev->evbit[0]		= BIT(EV_ABS);

	ucb1400_adc_enable(ucb);
	x_res = ucb1400_ts_read_xres(ucb);
	y_res = ucb1400_ts_read_yres(ucb);
	ucb1400_adc_disable(ucb);
	printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);

	input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0);
	input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0);
	input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);

	error = input_register_device(idev);
	if (error)
		goto err_free_irq;

	dev_set_drvdata(dev, ucb);
	return 0;

 err_free_irq:
	free_irq(ucb->irq, ucb);
 err_free_devs:
	input_free_device(idev);
	kfree(ucb);
	return error;
}

static int ucb1400_ts_remove(struct device *dev)
{
	struct ucb1400 *ucb = dev_get_drvdata(dev);

	free_irq(ucb->irq, ucb);
	input_unregister_device(ucb->ts_idev);
	dev_set_drvdata(dev, NULL);
	kfree(ucb);
	return 0;
}

static struct device_driver ucb1400_ts_driver = {
	.name		= "ucb1400_ts",
	.owner		= THIS_MODULE,
	.bus		= &ac97_bus_type,
	.probe		= ucb1400_ts_probe,
	.remove		= ucb1400_ts_remove,
	.resume		= ucb1400_ts_resume,
};

static int __init ucb1400_ts_init(void)
{
	return driver_register(&ucb1400_ts_driver);
}

static void __exit ucb1400_ts_exit(void)
{
	driver_unregister(&ucb1400_ts_driver);
}

module_param(adcsync, bool, 0444);
MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");

module_param(ts_delay, int, 0444);
MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us.");

module_param(ts_delay_pressure, int, 0444);
MODULE_PARM_DESC(ts_delay_pressure,
		  "delay between panel setup and pressure read.  Default = 0us.");

module_init(ucb1400_ts_init);
module_exit(ucb1400_ts_exit);

MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
f40219bf NP	1	/*
	2	* Philips UCB1400 touchscreen driver
	3	*
	4	* Author: Nicolas Pitre
	5	* Created: September 25, 2006
	6	* Copyright: MontaVista Software, Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	* This code is heavily based on ucb1x00-*.c copyrighted by Russell King
	13	* covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
	14	* been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
	15	*/
	16
	17	#include <linux/module.h>
	18	#include <linux/moduleparam.h>
	19	#include <linux/init.h>
f40219bf NP	20	#include <linux/completion.h>
	21	#include <linux/delay.h>
	22	#include <linux/input.h>
	23	#include <linux/device.h>
	24	#include <linux/interrupt.h>
	25	#include <linux/suspend.h>
	26	#include <linux/slab.h>
	27	#include <linux/kthread.h>
bff19b1d	28	#include <linux/freezer.h>
f40219bf NP	29
	30	#include <sound/driver.h>
	31	#include <sound/core.h>
	32	#include <sound/ac97_codec.h>
	33
	34
	35	/*
	36	* Interesting UCB1400 AC-link registers
	37	*/
	38
	39	#define UCB_IE_RIS 0x5e
	40	#define UCB_IE_FAL 0x60
	41	#define UCB_IE_STATUS 0x62
	42	#define UCB_IE_CLEAR 0x62
	43	#define UCB_IE_ADC (1 << 11)
	44	#define UCB_IE_TSPX (1 << 12)
	45
	46	#define UCB_TS_CR 0x64
	47	#define UCB_TS_CR_TSMX_POW (1 << 0)
	48	#define UCB_TS_CR_TSPX_POW (1 << 1)
	49	#define UCB_TS_CR_TSMY_POW (1 << 2)
	50	#define UCB_TS_CR_TSPY_POW (1 << 3)
	51	#define UCB_TS_CR_TSMX_GND (1 << 4)
	52	#define UCB_TS_CR_TSPX_GND (1 << 5)
	53	#define UCB_TS_CR_TSMY_GND (1 << 6)
	54	#define UCB_TS_CR_TSPY_GND (1 << 7)
	55	#define UCB_TS_CR_MODE_INT (0 << 8)
	56	#define UCB_TS_CR_MODE_PRES (1 << 8)
	57	#define UCB_TS_CR_MODE_POS (2 << 8)
	58	#define UCB_TS_CR_BIAS_ENA (1 << 11)
	59	#define UCB_TS_CR_TSPX_LOW (1 << 12)
	60	#define UCB_TS_CR_TSMX_LOW (1 << 13)
	61
	62	#define UCB_ADC_CR 0x66
	63	#define UCB_ADC_SYNC_ENA (1 << 0)
	64	#define UCB_ADC_VREFBYP_CON (1 << 1)
	65	#define UCB_ADC_INP_TSPX (0 << 2)
	66	#define UCB_ADC_INP_TSMX (1 << 2)
	67	#define UCB_ADC_INP_TSPY (2 << 2)
	68	#define UCB_ADC_INP_TSMY (3 << 2)
	69	#define UCB_ADC_INP_AD0 (4 << 2)
	70	#define UCB_ADC_INP_AD1 (5 << 2)
	71	#define UCB_ADC_INP_AD2 (6 << 2)
	72	#define UCB_ADC_INP_AD3 (7 << 2)
	73	#define UCB_ADC_EXT_REF (1 << 5)
	74	#define UCB_ADC_START (1 << 7)
	75	#define UCB_ADC_ENA (1 << 15)
	76
	77	#define UCB_ADC_DATA 0x68
	78	#define UCB_ADC_DAT_VALID (1 << 15)
	79	#define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff)
	80
	81	#define UCB_ID 0x7e
	82	#define UCB_ID_1400 0x4304
	83
	84
	85	struct ucb1400 {
ca377fec	86	struct snd_ac97 *ac97;
f40219bf NP	87	struct input_dev *ts_idev;
	88
	89	int irq;
	90
	91	wait_queue_head_t ts_wait;
	92	struct task_struct *ts_task;
	93
	94	unsigned int irq_pending; /* not bit field shared */
	95	unsigned int ts_restart:1;
	96	unsigned int adcsync:1;
	97	};
	98
	99	static int adcsync;
b5b16c52 CB	100	static int ts_delay = 55; /* us */
b5b16c52 CB	101	static int ts_delay_pressure; /* us */
f40219bf NP	102
	103	static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
	104	{
	105	return ucb->ac97->bus->ops->read(ucb->ac97, reg);
	106	}
	107
	108	static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
	109	{
	110	ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
	111	}
	112
	113	static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
	114	{
	115	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
	116	}
	117
	118	static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
	119	{
	120	unsigned int val;
	121
	122	if (ucb->adcsync)
	123	adc_channel \|= UCB_ADC_SYNC_ENA;
	124
	125	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA \| adc_channel);
	126	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA \| adc_channel \| UCB_ADC_START);
	127
	128	for (;;) {
	129	val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
	130	if (val & UCB_ADC_DAT_VALID)
	131	break;
	132	/* yield to other processes */
	133	set_current_state(TASK_INTERRUPTIBLE);
	134	schedule_timeout(1);
	135	}
	136
	137	return UCB_ADC_DAT_VALUE(val);
	138	}
	139
	140	static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
	141	{
	142	ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
	143	}
	144
	145	/* Switch to interrupt mode. */
	146	static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
	147	{
	148	ucb1400_reg_write(ucb, UCB_TS_CR,
	149	UCB_TS_CR_TSMX_POW \| UCB_TS_CR_TSPX_POW \|
	150	UCB_TS_CR_TSMY_GND \| UCB_TS_CR_TSPY_GND \|
	151	UCB_TS_CR_MODE_INT);
	152	}
	153
	154	/*
	155	* Switch to pressure mode, and read pressure. We don't need to wait
	156	* here, since both plates are being driven.
	157	*/
	158	static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
	159	{
	160	ucb1400_reg_write(ucb, UCB_TS_CR,
	161	UCB_TS_CR_TSMX_POW \| UCB_TS_CR_TSPX_POW \|
	162	UCB_TS_CR_TSMY_GND \| UCB_TS_CR_TSPY_GND \|
	163	UCB_TS_CR_MODE_PRES \| UCB_TS_CR_BIAS_ENA);
b5b16c52	164	udelay(ts_delay_pressure);
f40219bf NP	165	return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
	166	}
	167
	168	/*
	169	* Switch to X position mode and measure Y plate. We switch the plate
	170	* configuration in pressure mode, then switch to position mode. This
	171	* gives a faster response time. Even so, we need to wait about 55us
	172	* for things to stabilise.
	173	*/
	174	static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
	175	{
	176	ucb1400_reg_write(ucb, UCB_TS_CR,
	177	UCB_TS_CR_TSMX_GND \| UCB_TS_CR_TSPX_POW \|
	178	UCB_TS_CR_MODE_PRES \| UCB_TS_CR_BIAS_ENA);
	179	ucb1400_reg_write(ucb, UCB_TS_CR,
	180	UCB_TS_CR_TSMX_GND \| UCB_TS_CR_TSPX_POW \|
	181	UCB_TS_CR_MODE_PRES \| UCB_TS_CR_BIAS_ENA);
	182	ucb1400_reg_write(ucb, UCB_TS_CR,
	183	UCB_TS_CR_TSMX_GND \| UCB_TS_CR_TSPX_POW \|
	184	UCB_TS_CR_MODE_POS \| UCB_TS_CR_BIAS_ENA);
	185
b5b16c52	186	udelay(ts_delay);
f40219bf NP	187
	188	return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
	189	}
	190
	191	/*
	192	* Switch to Y position mode and measure X plate. We switch the plate
	193	* configuration in pressure mode, then switch to position mode. This
	194	* gives a faster response time. Even so, we need to wait about 55us
	195	* for things to stabilise.
	196	*/
	197	static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb)
	198	{
	199	ucb1400_reg_write(ucb, UCB_TS_CR,
	200	UCB_TS_CR_TSMY_GND \| UCB_TS_CR_TSPY_POW \|
	201	UCB_TS_CR_MODE_PRES \| UCB_TS_CR_BIAS_ENA);
	202	ucb1400_reg_write(ucb, UCB_TS_CR,
	203	UCB_TS_CR_TSMY_GND \| UCB_TS_CR_TSPY_POW \|
	204	UCB_TS_CR_MODE_PRES \| UCB_TS_CR_BIAS_ENA);
	205	ucb1400_reg_write(ucb, UCB_TS_CR,
	206	UCB_TS_CR_TSMY_GND \| UCB_TS_CR_TSPY_POW \|
	207	UCB_TS_CR_MODE_POS \| UCB_TS_CR_BIAS_ENA);
	208
b5b16c52	209	udelay(ts_delay);
f40219bf NP	210
	211	return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX);
	212	}
	213
	214	/*
	215	* Switch to X plate resistance mode. Set MX to ground, PX to
	216	* supply. Measure current.
	217	*/
	218	static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb)
	219	{
	220	ucb1400_reg_write(ucb, UCB_TS_CR,
	221	UCB_TS_CR_TSMX_GND \| UCB_TS_CR_TSPX_POW \|
	222	UCB_TS_CR_MODE_PRES \| UCB_TS_CR_BIAS_ENA);
	223	return ucb1400_adc_read(ucb, 0);
	224	}
	225
	226	/*
	227	* Switch to Y plate resistance mode. Set MY to ground, PY to
	228	* supply. Measure current.
	229	*/
	230	static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb)
	231	{
	232	ucb1400_reg_write(ucb, UCB_TS_CR,
	233	UCB_TS_CR_TSMY_GND \| UCB_TS_CR_TSPY_POW \|
	234	UCB_TS_CR_MODE_PRES \| UCB_TS_CR_BIAS_ENA);
	235	return ucb1400_adc_read(ucb, 0);
	236	}
	237
	238	static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb)
	239	{
	240	unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR);
	241	return (val & (UCB_TS_CR_TSPX_LOW \| UCB_TS_CR_TSMX_LOW));
	242	}
	243
	244	static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb)
	245	{
	246	ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX);
	247	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
	248	ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX);
	249	}
	250
	251	static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb)
	252	{
	253	ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
	254	}
	255
	256	static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
	257	{
	258	input_report_abs(idev, ABS_X, x);
	259	input_report_abs(idev, ABS_Y, y);
	260	input_report_abs(idev, ABS_PRESSURE, pressure);
	261	input_sync(idev);
	262	}
	263
	264	static void ucb1400_ts_event_release(struct input_dev *idev)
	265	{
	266	input_report_abs(idev, ABS_PRESSURE, 0);
	267	input_sync(idev);
	268	}
	269
	270	static void ucb1400_handle_pending_irq(struct ucb1400 *ucb)
	271	{
	272	unsigned int isr;
	273
274	isr = ucb1400_reg_read(ucb, UCB_IE_STATUS);
275	ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr);
276	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
277
278	if (isr & UCB_IE_TSPX)
279	ucb1400_ts_irq_disable(ucb);
280	else
281	printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
282
283	enable_irq(ucb->irq);
284	}
285
286	static int ucb1400_ts_thread(void *_ucb)
287	{
288	struct ucb1400 *ucb = _ucb;
289	struct task_struct *tsk = current;
290	int valid = 0;
c130bdba	291	struct sched_param param = { .sched_priority = 1 };
f40219bf	292
c130bdba	293	sched_setscheduler(tsk, SCHED_FIFO, &param);
f40219bf NP	294
	295	while (!kthread_should_stop()) {
	296	unsigned int x, y, p;
	297	long timeout;
	298
	299	ucb->ts_restart = 0;
	300
	301	if (ucb->irq_pending) {
	302	ucb->irq_pending = 0;
	303	ucb1400_handle_pending_irq(ucb);
	304	}
	305
	306	ucb1400_adc_enable(ucb);
	307	x = ucb1400_ts_read_xpos(ucb);
	308	y = ucb1400_ts_read_ypos(ucb);
	309	p = ucb1400_ts_read_pressure(ucb);
	310	ucb1400_adc_disable(ucb);
	311
	312	/* Switch back to interrupt mode. */
	313	ucb1400_ts_mode_int(ucb);
	314
	315	msleep(10);
	316
	317	if (ucb1400_ts_pen_down(ucb)) {
	318	ucb1400_ts_irq_enable(ucb);
	319
	320	/*
	321	* If we spat out a valid sample set last time,
	322	* spit out a "pen off" sample here.
	323	*/
	324	if (valid) {
	325	ucb1400_ts_event_release(ucb->ts_idev);
	326	valid = 0;
	327	}
	328
	329	timeout = MAX_SCHEDULE_TIMEOUT;
	330	} else {
	331	valid = 1;
	332	ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
	333	timeout = msecs_to_jiffies(10);
	334	}
	335
	336	wait_event_interruptible_timeout(ucb->ts_wait,
	337	ucb->irq_pending \|\| ucb->ts_restart \|\| kthread_should_stop(),
	338	timeout);
	339	try_to_freeze();
	340	}
	341
	342	/* Send the "pen off" if we are stopping with the pen still active */
	343	if (valid)
	344	ucb1400_ts_event_release(ucb->ts_idev);
	345
	346	ucb->ts_task = NULL;
	347	return 0;
	348	}
	349
	350	/*
	351	* A restriction with interrupts exists when using the ucb1400, as
	352	* the codec read/write routines may sleep while waiting for codec
	353	* access completion and uses semaphores for access control to the
	354	* AC97 bus. A complete codec read cycle could take anywhere from
	355	* 60 to 100uSec so we definitely don't want to spin inside the
	356	* interrupt handler waiting for codec access. So, we handle the
	357	* interrupt by scheduling a RT kernel thread to run in process
358	* context instead of interrupt context.
359	*/
360	static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
361	{
362	struct ucb1400 *ucb = devid;
363
364	if (irqnr == ucb->irq) {
365	disable_irq(ucb->irq);
366	ucb->irq_pending = 1;
367	wake_up(&ucb->ts_wait);
368	return IRQ_HANDLED;
369	}
370	return IRQ_NONE;
371	}
372
373	static int ucb1400_ts_open(struct input_dev *idev)
374	{
40b9b0b8	375	struct ucb1400 *ucb = input_get_drvdata(idev);
f40219bf NP	376	int ret = 0;
	377
	378	BUG_ON(ucb->ts_task);
	379
	380	ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
	381	if (IS_ERR(ucb->ts_task)) {
	382	ret = PTR_ERR(ucb->ts_task);
	383	ucb->ts_task = NULL;
	384	}
	385
	386	return ret;
	387	}
	388
	389	static void ucb1400_ts_close(struct input_dev *idev)
	390	{
40b9b0b8	391	struct ucb1400 *ucb = input_get_drvdata(idev);
f40219bf NP	392
	393	if (ucb->ts_task)
	394	kthread_stop(ucb->ts_task);
	395
	396	ucb1400_ts_irq_disable(ucb);
	397	ucb1400_reg_write(ucb, UCB_TS_CR, 0);
	398	}
	399
	400	#ifdef CONFIG_PM
	401	static int ucb1400_ts_resume(struct device *dev)
	402	{
	403	struct ucb1400 *ucb = dev_get_drvdata(dev);
	404
	405	if (ucb->ts_task) {
	406	/*
	407	* Restart the TS thread to ensure the
	408	* TS interrupt mode is set up again
	409	* after sleep.
	410	*/
	411	ucb->ts_restart = 1;
	412	wake_up(&ucb->ts_wait);
	413	}
	414	return 0;
	415	}
	416	#else
	417	#define ucb1400_ts_resume NULL
	418	#endif
	419
	420	#ifndef NO_IRQ
	421	#define NO_IRQ 0
	422	#endif
	423
	424	/*
	425	* Try to probe our interrupt, rather than relying on lots of
	426	* hard-coded machine dependencies.
	427	*/
	428	static int ucb1400_detect_irq(struct ucb1400 *ucb)
	429	{
	430	unsigned long mask, timeout;
	431
	432	mask = probe_irq_on();
	433	if (!mask) {
	434	probe_irq_off(mask);
	435	return -EBUSY;
	436	}
	437
	438	/* Enable the ADC interrupt. */
	439	ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
	440	ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
	441	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
	442	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
	443
	444	/* Cause an ADC interrupt. */
	445	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
	446	ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA \| UCB_ADC_START);
	447
	448	/* Wait for the conversion to complete. */
	449	timeout = jiffies + HZ/2;
	450	while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) {
	451	cpu_relax();
	452	if (time_after(jiffies, timeout)) {
	453	printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
	454	probe_irq_off(mask);
	455	return -ENODEV;
456	}
457	}
458	ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
459
460	/* Disable and clear interrupt. */
461	ucb1400_reg_write(ucb, UCB_IE_RIS, 0);
462	ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
463	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
464	ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
465
466	/* Read triggered interrupt. */
467	ucb->irq = probe_irq_off(mask);
468	if (ucb->irq < 0 \|\| ucb->irq == NO_IRQ)
469	return -ENODEV;
470
471	return 0;
472	}
473
474	static int ucb1400_ts_probe(struct device *dev)
475	{
476	struct ucb1400 *ucb;
477	struct input_dev *idev;
478	int error, id, x_res, y_res;
479
480	ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL);
481	idev = input_allocate_device();
482	if (!ucb \|\| !idev) {
483	error = -ENOMEM;
484	goto err_free_devs;
485	}
486
487	ucb->ts_idev = idev;
488	ucb->adcsync = adcsync;
489	ucb->ac97 = to_ac97_t(dev);
490	init_waitqueue_head(&ucb->ts_wait);
491
492	id = ucb1400_reg_read(ucb, UCB_ID);
493	if (id != UCB_ID_1400) {
494	error = -ENODEV;
495	goto err_free_devs;
496	}
497
498	error = ucb1400_detect_irq(ucb);
499	if (error) {
500	printk(KERN_ERR "UCB1400: IRQ probe failed\n");
501	goto err_free_devs;
502	}
503
504	error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
505	"UCB1400", ucb);
506	if (error) {
507	printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
508	ucb->irq, error);
509	goto err_free_devs;
510	}
511	printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
512
40b9b0b8 DT	513	input_set_drvdata(idev, ucb);
40b9b0b8 DT	514
a5394fb0	515	idev->dev.parent = dev;
f40219bf NP	516	idev->name = "UCB1400 touchscreen interface";
	517	idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1);
	518	idev->id.product = id;
	519	idev->open = ucb1400_ts_open;
	520	idev->close = ucb1400_ts_close;
	521	idev->evbit[0] = BIT(EV_ABS);
	522
	523	ucb1400_adc_enable(ucb);
	524	x_res = ucb1400_ts_read_xres(ucb);
	525	y_res = ucb1400_ts_read_yres(ucb);
	526	ucb1400_adc_disable(ucb);
	527	printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
	528
	529	input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0);
	530	input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0);
	531	input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
	532
	533	error = input_register_device(idev);
	534	if (error)
	535	goto err_free_irq;
	536
	537	dev_set_drvdata(dev, ucb);
	538	return 0;
	539
	540	err_free_irq:
	541	free_irq(ucb->irq, ucb);
	542	err_free_devs:
	543	input_free_device(idev);
	544	kfree(ucb);
	545	return error;
	546	}
	547
	548	static int ucb1400_ts_remove(struct device *dev)
	549	{
	550	struct ucb1400 *ucb = dev_get_drvdata(dev);
	551
	552	free_irq(ucb->irq, ucb);
	553	input_unregister_device(ucb->ts_idev);
	554	dev_set_drvdata(dev, NULL);
	555	kfree(ucb);
	556	return 0;
	557	}
	558
	559	static struct device_driver ucb1400_ts_driver = {
ff78b202	560	.name = "ucb1400_ts",
f40219bf NP	561	.owner = THIS_MODULE,
	562	.bus = &ac97_bus_type,
	563	.probe = ucb1400_ts_probe,
	564	.remove = ucb1400_ts_remove,
	565	.resume = ucb1400_ts_resume,
	566	};
	567
	568	static int __init ucb1400_ts_init(void)
	569	{
	570	return driver_register(&ucb1400_ts_driver);
	571	}
	572
	573	static void __exit ucb1400_ts_exit(void)
	574	{
	575	driver_unregister(&ucb1400_ts_driver);
	576	}
	577
b5b16c52 CB	578	module_param(adcsync, bool, 0444);
	579	MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
	580
	581	module_param(ts_delay, int, 0444);
	582	MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us.");
	583
	584	module_param(ts_delay_pressure, int, 0444);
	585	MODULE_PARM_DESC(ts_delay_pressure,
	586	"delay between panel setup and pressure read. Default = 0us.");
f40219bf NP	587
	588	module_init(ucb1400_ts_init);
	589	module_exit(ucb1400_ts_exit);
	590
	591	MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
	592	MODULE_LICENSE("GPL");