[net-next-2.6.git] / drivers / infiniband / hw / ipath / ipath_stats.c

/*
 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include "ipath_kernel.h"

struct infinipath_stats ipath_stats;

/**
 * ipath_snap_cntr - snapshot a chip counter
 * @dd: the infinipath device
 * @creg: the counter to snapshot
 *
 * called from add_timer and user counter read calls, to deal with
 * counters that wrap in "human time".  The words sent and received, and
 * the packets sent and received are all that we worry about.  For now,
 * at least, we don't worry about error counters, because if they wrap
 * that quickly, we probably don't care.  We may eventually just make this
 * handle all the counters.  word counters can wrap in about 20 seconds
 * of full bandwidth traffic, packet counters in a few hours.
 */

u64 ipath_snap_cntr(struct ipath_devdata *dd, ipath_creg creg)
{
	u32 val, reg64 = 0;
	u64 val64;
	unsigned long t0, t1;
	u64 ret;

	t0 = jiffies;
	/* If fast increment counters are only 32 bits, snapshot them,
	 * and maintain them as 64bit values in the driver */
	if (!(dd->ipath_flags & IPATH_32BITCOUNTERS) &&
	    (creg == dd->ipath_cregs->cr_wordsendcnt ||
	     creg == dd->ipath_cregs->cr_wordrcvcnt ||
	     creg == dd->ipath_cregs->cr_pktsendcnt ||
	     creg == dd->ipath_cregs->cr_pktrcvcnt)) {
		val64 = ipath_read_creg(dd, creg);
		val = val64 == ~0ULL ? ~0U : 0;
		reg64 = 1;
	} else			/* val64 just to keep gcc quiet... */
		val64 = val = ipath_read_creg32(dd, creg);
	/*
	 * See if a second has passed.  This is just a way to detect things
	 * that are quite broken.  Normally this should take just a few
	 * cycles (the check is for long enough that we don't care if we get
	 * pre-empted.)  An Opteron HT O read timeout is 4 seconds with
	 * normal NB values
	 */
	t1 = jiffies;
	if (time_before(t0 + HZ, t1) && val == -1) {
		ipath_dev_err(dd, "Error!  Read counter 0x%x timed out\n",
			      creg);
		ret = 0ULL;
		goto bail;
	}
	if (reg64) {
		ret = val64;
		goto bail;
	}

	if (creg == dd->ipath_cregs->cr_wordsendcnt) {
		if (val != dd->ipath_lastsword) {
			dd->ipath_sword += val - dd->ipath_lastsword;
			dd->ipath_lastsword = val;
		}
		val64 = dd->ipath_sword;
	} else if (creg == dd->ipath_cregs->cr_wordrcvcnt) {
		if (val != dd->ipath_lastrword) {
			dd->ipath_rword += val - dd->ipath_lastrword;
			dd->ipath_lastrword = val;
		}
		val64 = dd->ipath_rword;
	} else if (creg == dd->ipath_cregs->cr_pktsendcnt) {
		if (val != dd->ipath_lastspkts) {
			dd->ipath_spkts += val - dd->ipath_lastspkts;
			dd->ipath_lastspkts = val;
		}
		val64 = dd->ipath_spkts;
	} else if (creg == dd->ipath_cregs->cr_pktrcvcnt) {
		if (val != dd->ipath_lastrpkts) {
			dd->ipath_rpkts += val - dd->ipath_lastrpkts;
			dd->ipath_lastrpkts = val;
		}
		val64 = dd->ipath_rpkts;
	} else
		val64 = (u64) val;

	ret = val64;

bail:
	return ret;
}

/**
 * ipath_qcheck - print delta of egrfull/hdrqfull errors for kernel ports
 * @dd: the infinipath device
 *
 * print the delta of egrfull/hdrqfull errors for kernel ports no more than
 * every 5 seconds.  User processes are printed at close, but kernel doesn't
 * close, so...  Separate routine so may call from other places someday, and
 * so function name when printed by _IPATH_INFO is meaningfull
 */
static void ipath_qcheck(struct ipath_devdata *dd)
{
	static u64 last_tot_hdrqfull;
	struct ipath_portdata *pd = dd->ipath_pd[0];
	size_t blen = 0;
	char buf[128];
	u32 hdrqtail;

	*buf = 0;
	if (pd->port_hdrqfull != dd->ipath_p0_hdrqfull) {
		blen = snprintf(buf, sizeof buf, "port 0 hdrqfull %u",
				pd->port_hdrqfull -
				dd->ipath_p0_hdrqfull);
		dd->ipath_p0_hdrqfull = pd->port_hdrqfull;
	}
	if (ipath_stats.sps_etidfull != dd->ipath_last_tidfull) {
		blen += snprintf(buf + blen, sizeof buf - blen,
				 "%srcvegrfull %llu",
				 blen ? ", " : "",
				 (unsigned long long)
				 (ipath_stats.sps_etidfull -
				  dd->ipath_last_tidfull));
		dd->ipath_last_tidfull = ipath_stats.sps_etidfull;
	}

	/*
	 * this is actually the number of hdrq full interrupts, not actual
	 * events, but at the moment that's mostly what I'm interested in.
	 * Actual count, etc. is in the counters, if needed.  For production
	 * users this won't ordinarily be printed.
	 */

	if ((ipath_debug & (__IPATH_PKTDBG | __IPATH_DBG)) &&
	    ipath_stats.sps_hdrqfull != last_tot_hdrqfull) {
		blen += snprintf(buf + blen, sizeof buf - blen,
				 "%shdrqfull %llu (all ports)",
				 blen ? ", " : "",
				 (unsigned long long)
				 (ipath_stats.sps_hdrqfull -
				  last_tot_hdrqfull));
		last_tot_hdrqfull = ipath_stats.sps_hdrqfull;
	}
	if (blen)
		ipath_dbg("%s\n", buf);

	hdrqtail = ipath_get_hdrqtail(pd);
	if (pd->port_head != hdrqtail) {
		if (dd->ipath_lastport0rcv_cnt ==
		    ipath_stats.sps_port0pkts) {
			ipath_cdbg(PKT, "missing rcv interrupts? "
				   "port0 hd=%x tl=%x; port0pkts %llx; write"
				   " hd (w/intr)\n",
				   pd->port_head, hdrqtail,
				   (unsigned long long)
				   ipath_stats.sps_port0pkts);
			ipath_write_ureg(dd, ur_rcvhdrhead, hdrqtail |
				dd->ipath_rhdrhead_intr_off, pd->port_port);
		}
		dd->ipath_lastport0rcv_cnt = ipath_stats.sps_port0pkts;
	}
}

static void ipath_chk_errormask(struct ipath_devdata *dd)
{
	static u32 fixed;
	u32 ctrl;
	unsigned long errormask;
	unsigned long hwerrs;

	if (!dd->ipath_errormask || !(dd->ipath_flags & IPATH_INITTED))
		return;

	errormask = ipath_read_kreg64(dd, dd->ipath_kregs->kr_errormask);

	if (errormask == dd->ipath_errormask)
		return;
	fixed++;

	hwerrs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus);
	ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);

	ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
		dd->ipath_errormask);

	if ((hwerrs & dd->ipath_hwerrmask) ||
		(ctrl & INFINIPATH_C_FREEZEMODE)) {
		/* force re-interrupt of pending events, just in case */
		ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
		ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, 0ULL);
		ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
		dev_info(&dd->pcidev->dev,
			"errormask fixed(%u) %lx -> %lx, ctrl %x hwerr %lx\n",
			fixed, errormask, (unsigned long)dd->ipath_errormask,
			ctrl, hwerrs);
	} else
		ipath_dbg("errormask fixed(%u) %lx -> %lx, no freeze\n",
			fixed, errormask,
			(unsigned long)dd->ipath_errormask);
}


/**
 * ipath_get_faststats - get word counters from chip before they overflow
 * @opaque - contains a pointer to the infinipath device ipath_devdata
 *
 * called from add_timer
 */
void ipath_get_faststats(unsigned long opaque)
{
	struct ipath_devdata *dd = (struct ipath_devdata *) opaque;
	int i;
	static unsigned cnt;
	unsigned long flags;
	u64 traffic_wds;

	/*
	 * don't access the chip while running diags, or memory diags can
	 * fail
	 */
	if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_INITTED) ||
	    ipath_diag_inuse)
		/* but re-arm the timer, for diags case; won't hurt other */
		goto done;

	/*
	 * We now try to maintain a "active timer", based on traffic
	 * exceeding a threshold, so we need to check the word-counts
	 * even if they are 64-bit.
	 */
	traffic_wds = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt) +
		ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
	spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
	traffic_wds -= dd->ipath_traffic_wds;
	dd->ipath_traffic_wds += traffic_wds;
	if (traffic_wds  >= IPATH_TRAFFIC_ACTIVE_THRESHOLD)
		atomic_add(5, &dd->ipath_active_time); /* S/B #define */
	spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);

	if (dd->ipath_flags & IPATH_32BITCOUNTERS) {
		ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
		ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
	}

	ipath_qcheck(dd);

	/*
	 * deal with repeat error suppression.  Doesn't really matter if
	 * last error was almost a full interval ago, or just a few usecs
	 * ago; still won't get more than 2 per interval.  We may want
	 * longer intervals for this eventually, could do with mod, counter
	 * or separate timer.  Also see code in ipath_handle_errors() and
	 * ipath_handle_hwerrors().
	 */

	if (dd->ipath_lasterror)
		dd->ipath_lasterror = 0;
	if (dd->ipath_lasthwerror)
		dd->ipath_lasthwerror = 0;
	if (dd->ipath_maskederrs
	    && time_after(jiffies, dd->ipath_unmasktime)) {
		char ebuf[256];
		int iserr;
		iserr = ipath_decode_err(ebuf, sizeof ebuf,
			dd->ipath_maskederrs);
		if (dd->ipath_maskederrs &
		    ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL |
		      INFINIPATH_E_PKTERRS))
			ipath_dev_err(dd, "Re-enabling masked errors "
				      "(%s)\n", ebuf);
		else {
			/*
			 * rcvegrfull and rcvhdrqfull are "normal", for some
			 * types of processes (mostly benchmarks) that send
			 * huge numbers of messages, while not processing
			 * them.  So only complain about these at debug
			 * level.
			 */
			if (iserr)
				ipath_dbg(
					"Re-enabling queue full errors (%s)\n",
					ebuf);
			else
				ipath_cdbg(ERRPKT, "Re-enabling packet"
					" problem interrupt (%s)\n", ebuf);
		}

		/* re-enable masked errors */
		dd->ipath_errormask |= dd->ipath_maskederrs;
		ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
				 dd->ipath_errormask);
		dd->ipath_maskederrs = 0;
	}

	/* limit qfull messages to ~one per minute per port */
	if ((++cnt & 0x10)) {
		for (i = (int) dd->ipath_cfgports; --i >= 0; ) {
			struct ipath_portdata *pd = dd->ipath_pd[i];

			if (pd && pd->port_lastrcvhdrqtail != -1)
				pd->port_lastrcvhdrqtail = -1;
		}
	}

	ipath_chk_errormask(dd);
done:
	mod_timer(&dd->ipath_stats_timer, jiffies + HZ * 5);
}
Commit	Line	Data
108ecf0d	1	/*
87427da5	2	* Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
108ecf0d BS	3	* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*/
	33
108ecf0d BS	34	#include "ipath_kernel.h"
	35
	36	struct infinipath_stats ipath_stats;
	37
	38	/**
	39	* ipath_snap_cntr - snapshot a chip counter
	40	* @dd: the infinipath device
	41	* @creg: the counter to snapshot
	42	*
	43	* called from add_timer and user counter read calls, to deal with
	44	* counters that wrap in "human time". The words sent and received, and
	45	* the packets sent and received are all that we worry about. For now,
	46	* at least, we don't worry about error counters, because if they wrap
	47	* that quickly, we probably don't care. We may eventually just make this
	48	* handle all the counters. word counters can wrap in about 20 seconds
	49	* of full bandwidth traffic, packet counters in a few hours.
	50	*/
	51
	52	u64 ipath_snap_cntr(struct ipath_devdata *dd, ipath_creg creg)
	53	{
	54	u32 val, reg64 = 0;
	55	u64 val64;
	56	unsigned long t0, t1;
	57	u64 ret;
	58
	59	t0 = jiffies;
	60	/* If fast increment counters are only 32 bits, snapshot them,
	61	* and maintain them as 64bit values in the driver */
	62	if (!(dd->ipath_flags & IPATH_32BITCOUNTERS) &&
	63	(creg == dd->ipath_cregs->cr_wordsendcnt \|\|
	64	creg == dd->ipath_cregs->cr_wordrcvcnt \|\|
	65	creg == dd->ipath_cregs->cr_pktsendcnt \|\|
	66	creg == dd->ipath_cregs->cr_pktrcvcnt)) {
	67	val64 = ipath_read_creg(dd, creg);
	68	val = val64 == ~0ULL ? ~0U : 0;
	69	reg64 = 1;
	70	} else /* val64 just to keep gcc quiet... */
	71	val64 = val = ipath_read_creg32(dd, creg);
	72	/*
	73	* See if a second has passed. This is just a way to detect things
	74	* that are quite broken. Normally this should take just a few
	75	* cycles (the check is for long enough that we don't care if we get
	76	* pre-empted.) An Opteron HT O read timeout is 4 seconds with
	77	* normal NB values
	78	*/
	79	t1 = jiffies;
	80	if (time_before(t0 + HZ, t1) && val == -1) {
	81	ipath_dev_err(dd, "Error! Read counter 0x%x timed out\n",
	82	creg);
	83	ret = 0ULL;
	84	goto bail;
	85	}
	86	if (reg64) {
	87	ret = val64;
	88	goto bail;
	89	}
	90
	91	if (creg == dd->ipath_cregs->cr_wordsendcnt) {
	92	if (val != dd->ipath_lastsword) {
	93	dd->ipath_sword += val - dd->ipath_lastsword;
	94	dd->ipath_lastsword = val;
	95	}
	96	val64 = dd->ipath_sword;
	97	} else if (creg == dd->ipath_cregs->cr_wordrcvcnt) {
98	if (val != dd->ipath_lastrword) {
99	dd->ipath_rword += val - dd->ipath_lastrword;
100	dd->ipath_lastrword = val;
101	}
102	val64 = dd->ipath_rword;
103	} else if (creg == dd->ipath_cregs->cr_pktsendcnt) {
104	if (val != dd->ipath_lastspkts) {
105	dd->ipath_spkts += val - dd->ipath_lastspkts;
106	dd->ipath_lastspkts = val;
107	}
108	val64 = dd->ipath_spkts;
109	} else if (creg == dd->ipath_cregs->cr_pktrcvcnt) {
110	if (val != dd->ipath_lastrpkts) {
111	dd->ipath_rpkts += val - dd->ipath_lastrpkts;
112	dd->ipath_lastrpkts = val;
113	}
114	val64 = dd->ipath_rpkts;
115	} else
116	val64 = (u64) val;
117
118	ret = val64;
119
120	bail:
121	return ret;
122	}
123
124	/**
125	* ipath_qcheck - print delta of egrfull/hdrqfull errors for kernel ports
126	* @dd: the infinipath device
127	*
128	* print the delta of egrfull/hdrqfull errors for kernel ports no more than
129	* every 5 seconds. User processes are printed at close, but kernel doesn't
130	* close, so... Separate routine so may call from other places someday, and
131	* so function name when printed by _IPATH_INFO is meaningfull
132	*/
133	static void ipath_qcheck(struct ipath_devdata *dd)
134	{
135	static u64 last_tot_hdrqfull;
c59a80ac	136	struct ipath_portdata *pd = dd->ipath_pd[0];
108ecf0d BS	137	size_t blen = 0;
108ecf0d BS	138	char buf[128];
9355fb6a	139	u32 hdrqtail;
108ecf0d BS	140
108ecf0d BS	141	*buf = 0;
c59a80ac	142	if (pd->port_hdrqfull != dd->ipath_p0_hdrqfull) {
108ecf0d	143	blen = snprintf(buf, sizeof buf, "port 0 hdrqfull %u",
c59a80ac	144	pd->port_hdrqfull -
108ecf0d	145	dd->ipath_p0_hdrqfull);
c59a80ac	146	dd->ipath_p0_hdrqfull = pd->port_hdrqfull;
108ecf0d BS	147	}
	148	if (ipath_stats.sps_etidfull != dd->ipath_last_tidfull) {
	149	blen += snprintf(buf + blen, sizeof buf - blen,
	150	"%srcvegrfull %llu",
	151	blen ? ", " : "",
	152	(unsigned long long)
	153	(ipath_stats.sps_etidfull -
	154	dd->ipath_last_tidfull));
	155	dd->ipath_last_tidfull = ipath_stats.sps_etidfull;
	156	}
	157
	158	/*
	159	* this is actually the number of hdrq full interrupts, not actual
	160	* events, but at the moment that's mostly what I'm interested in.
	161	* Actual count, etc. is in the counters, if needed. For production
	162	* users this won't ordinarily be printed.
	163	*/
	164
	165	if ((ipath_debug & (__IPATH_PKTDBG \| __IPATH_DBG)) &&
	166	ipath_stats.sps_hdrqfull != last_tot_hdrqfull) {
	167	blen += snprintf(buf + blen, sizeof buf - blen,
	168	"%shdrqfull %llu (all ports)",
	169	blen ? ", " : "",
	170	(unsigned long long)
	171	(ipath_stats.sps_hdrqfull -
	172	last_tot_hdrqfull));
	173	last_tot_hdrqfull = ipath_stats.sps_hdrqfull;
	174	}
	175	if (blen)
	176	ipath_dbg("%s\n", buf);
	177
9355fb6a RC	178	hdrqtail = ipath_get_hdrqtail(pd);
9355fb6a RC	179	if (pd->port_head != hdrqtail) {
108ecf0d BS	180	if (dd->ipath_lastport0rcv_cnt ==
	181	ipath_stats.sps_port0pkts) {
	182	ipath_cdbg(PKT, "missing rcv interrupts? "
9355fb6a RC	183	"port0 hd=%x tl=%x; port0pkts %llx; write"
	184	" hd (w/intr)\n",
	185	pd->port_head, hdrqtail,
108ecf0d BS	186	(unsigned long long)
108ecf0d BS	187	ipath_stats.sps_port0pkts);
9355fb6a RC	188	ipath_write_ureg(dd, ur_rcvhdrhead, hdrqtail \|
9355fb6a RC	189	dd->ipath_rhdrhead_intr_off, pd->port_port);
108ecf0d BS	190	}
	191	dd->ipath_lastport0rcv_cnt = ipath_stats.sps_port0pkts;
	192	}
	193	}
	194
78d1e02f DO	195	static void ipath_chk_errormask(struct ipath_devdata *dd)
	196	{
	197	static u32 fixed;
	198	u32 ctrl;
	199	unsigned long errormask;
	200	unsigned long hwerrs;
	201
	202	if (!dd->ipath_errormask \|\| !(dd->ipath_flags & IPATH_INITTED))
	203	return;
	204
	205	errormask = ipath_read_kreg64(dd, dd->ipath_kregs->kr_errormask);
	206
	207	if (errormask == dd->ipath_errormask)
	208	return;
	209	fixed++;
	210
	211	hwerrs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus);
	212	ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
	213
	214	ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
	215	dd->ipath_errormask);
	216
	217	if ((hwerrs & dd->ipath_hwerrmask) \|\|
	218	(ctrl & INFINIPATH_C_FREEZEMODE)) {
	219	/* force re-interrupt of pending events, just in case */
	220	ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
	221	ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, 0ULL);
	222	ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
	223	dev_info(&dd->pcidev->dev,
	224	"errormask fixed(%u) %lx -> %lx, ctrl %x hwerr %lx\n",
	225	fixed, errormask, (unsigned long)dd->ipath_errormask,
	226	ctrl, hwerrs);
	227	} else
	228	ipath_dbg("errormask fixed(%u) %lx -> %lx, no freeze\n",
	229	fixed, errormask,
	230	(unsigned long)dd->ipath_errormask);
	231	}
	232
	233
108ecf0d BS	234	/**
	235	* ipath_get_faststats - get word counters from chip before they overflow
	236	* @opaque - contains a pointer to the infinipath device ipath_devdata
	237	*
	238	* called from add_timer
	239	*/
	240	void ipath_get_faststats(unsigned long opaque)
	241	{
	242	struct ipath_devdata dd = (struct ipath_devdata ) opaque;
755807a2	243	int i;
108ecf0d	244	static unsigned cnt;
aecd3b5a	245	unsigned long flags;
192594d5	246	u64 traffic_wds;
108ecf0d BS	247
	248	/*
	249	* don't access the chip while running diags, or memory diags can
	250	* fail
	251	*/
27b044a8	252	if (!dd->ipath_kregbase \|\| !(dd->ipath_flags & IPATH_INITTED) \|\|
108ecf0d BS	253	ipath_diag_inuse)
	254	/* but re-arm the timer, for diags case; won't hurt other */
	255	goto done;
	256
aecd3b5a MA	257	/*
	258	* We now try to maintain a "active timer", based on traffic
	259	* exceeding a threshold, so we need to check the word-counts
	260	* even if they are 64-bit.
	261	*/
192594d5 MA	262	traffic_wds = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt) +
192594d5 MA	263	ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
aecd3b5a	264	spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
192594d5 MA	265	traffic_wds -= dd->ipath_traffic_wds;
	266	dd->ipath_traffic_wds += traffic_wds;
	267	if (traffic_wds >= IPATH_TRAFFIC_ACTIVE_THRESHOLD)
aecd3b5a	268	atomic_add(5, &dd->ipath_active_time); /* S/B #define */
aecd3b5a MA	269	spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
aecd3b5a MA	270
108ecf0d	271	if (dd->ipath_flags & IPATH_32BITCOUNTERS) {
108ecf0d BS	272	ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
	273	ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
	274	}
	275
	276	ipath_qcheck(dd);
	277
	278	/*
	279	* deal with repeat error suppression. Doesn't really matter if
	280	* last error was almost a full interval ago, or just a few usecs
	281	* ago; still won't get more than 2 per interval. We may want
	282	* longer intervals for this eventually, could do with mod, counter
	283	* or separate timer. Also see code in ipath_handle_errors() and
	284	* ipath_handle_hwerrors().
	285	*/
	286
	287	if (dd->ipath_lasterror)
	288	dd->ipath_lasterror = 0;
	289	if (dd->ipath_lasthwerror)
	290	dd->ipath_lasthwerror = 0;
78d1e02f	291	if (dd->ipath_maskederrs
108ecf0d BS	292	&& time_after(jiffies, dd->ipath_unmasktime)) {
108ecf0d BS	293	char ebuf[256];
8ec1077b BS	294	int iserr;
8ec1077b BS	295	iserr = ipath_decode_err(ebuf, sizeof ebuf,
78d1e02f DO	296	dd->ipath_maskederrs);
78d1e02f DO	297	if (dd->ipath_maskederrs &
2ba3f56e RC	298	~(INFINIPATH_E_RRCVEGRFULL \| INFINIPATH_E_RRCVHDRFULL \|
2ba3f56e RC	299	INFINIPATH_E_PKTERRS))
108ecf0d BS	300	ipath_dev_err(dd, "Re-enabling masked errors "
	301	"(%s)\n", ebuf);
	302	else {
	303	/*
	304	* rcvegrfull and rcvhdrqfull are "normal", for some
	305	* types of processes (mostly benchmarks) that send
	306	* huge numbers of messages, while not processing
	307	* them. So only complain about these at debug
	308	* level.
	309	*/
8ec1077b	310	if (iserr)
2ba3f56e RC	311	ipath_dbg(
	312	"Re-enabling queue full errors (%s)\n",
	313	ebuf);
8ec1077b BS	314	else
8ec1077b BS	315	ipath_cdbg(ERRPKT, "Re-enabling packet"
2ba3f56e	316	" problem interrupt (%s)\n", ebuf);
108ecf0d	317	}
78d1e02f DO	318
	319	/* re-enable masked errors */
	320	dd->ipath_errormask \|= dd->ipath_maskederrs;
108ecf0d	321	ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2ba3f56e	322	dd->ipath_errormask);
78d1e02f	323	dd->ipath_maskederrs = 0;
108ecf0d BS	324	}
	325
	326	/* limit qfull messages to ~one per minute per port */
	327	if ((++cnt & 0x10)) {
755807a2 DO	328	for (i = (int) dd->ipath_cfgports; --i >= 0; ) {
	329	struct ipath_portdata *pd = dd->ipath_pd[i];
	330
	331	if (pd && pd->port_lastrcvhdrqtail != -1)
	332	pd->port_lastrcvhdrqtail = -1;
108ecf0d BS	333	}
	334	}
	335
78d1e02f	336	ipath_chk_errormask(dd);
108ecf0d BS	337	done:
	338	mod_timer(&dd->ipath_stats_timer, jiffies + HZ * 5);
	339	}