[net-next-2.6.git] / drivers / ide / qd65xx.c

/*
 *  Copyright (C) 1996-2001  Linus Torvalds & author (see below)
 */

/*
 *  Version 0.03	Cleaned auto-tune, added probe
 *  Version 0.04	Added second channel tuning
 *  Version 0.05	Enhanced tuning ; added qd6500 support
 *  Version 0.06	Added dos driver's list
 *  Version 0.07	Second channel bug fix 
 *
 * QDI QD6500/QD6580 EIDE controller fast support
 *
 * To activate controller support, use "ide0=qd65xx"
 */

/*
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@fnac.net>
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <asm/system.h>
#include <asm/io.h>

#define DRV_NAME "qd65xx"

#include "qd65xx.h"

/*
 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
 *            or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
 *	-- qd6500 is a single IDE interface
 *	-- qd6580 is a dual IDE interface
 *
 * More research on qd6580 being done by willmore@cig.mot.com (David)
 * More Information given by Petr Soucek (petr@ryston.cz)
 * http://www.ryston.cz/petr/vlb
 */

/*
 * base: Timer1
 *
 *
 * base+0x01: Config (R/O)
 *
 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
 * bit 3: qd6500: 1 = disabled, 0 = enabled
 *        qd6580: 1
 * upper nibble:
 *        qd6500: 1100
 *        qd6580: either 1010 or 0101
 *
 *
 * base+0x02: Timer2 (qd6580 only)
 *
 *
 * base+0x03: Control (qd6580 only)
 *
 * bits 0-3 must always be set 1
 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
 *         0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
 *                                                   channel 1 for hdc & hdd
 * bit 1 : 1 = only disks on primary port
 *         0 = disks & ATAPI devices on primary port
 * bit 2-4 : always 0
 * bit 5 : status, but of what ?
 * bit 6 : always set 1 by dos driver
 * bit 7 : set 1 for non-ATAPI devices on primary port
 *	(maybe read-ahead and post-write buffer ?)
 */

static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */

/*
 * qd65xx_select:
 *
 * This routine is invoked to prepare for access to a given drive.
 */

static void qd65xx_select(ide_drive_t *drive)
{
	u8 index = ((	(QD_TIMREG(drive)) & 0x80 ) >> 7) |
			(QD_TIMREG(drive) & 0x02);

	if (timings[index] != QD_TIMING(drive))
		outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
}

/*
 * qd6500_compute_timing
 *
 * computes the timing value where
 *	lower nibble represents active time,   in count of VLB clocks
 *	upper nibble represents recovery time, in count of VLB clocks
 */

static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
{
	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
	u8 act_cyc, rec_cyc;

	if (clk <= 33) {
		act_cyc =  9 - IDE_IN(active_time   * clk / 1000 + 1, 2,  9);
		rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
	} else {
		act_cyc =  8 - IDE_IN(active_time   * clk / 1000 + 1, 1,  8);
		rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
	}

	return (rec_cyc << 4) | 0x08 | act_cyc;
}

/*
 * qd6580_compute_timing
 *
 * idem for qd6580
 */

static u8 qd6580_compute_timing (int active_time, int recovery_time)
{
	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
	u8 act_cyc, rec_cyc;

	act_cyc = 17 - IDE_IN(active_time   * clk / 1000 + 1, 2, 17);
	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);

	return (rec_cyc << 4) | act_cyc;
}

/*
 * qd_find_disk_type
 *
 * tries to find timing from dos driver's table
 */

static int qd_find_disk_type (ide_drive_t *drive,
		int *active_time, int *recovery_time)
{
	struct qd65xx_timing_s *p;
	char *m = (char *)&drive->id[ATA_ID_PROD];
	char model[ATA_ID_PROD_LEN];

	if (*m == 0)
		return 0;

	strncpy(model, m, ATA_ID_PROD_LEN);
	ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */

	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
		if (!strncmp(p->model, model+p->offset, 4)) {
			printk(KERN_DEBUG "%s: listed !\n", drive->name);
			*active_time = p->active;
			*recovery_time = p->recovery;
			return 1;
		}
	}
	return 0;
}

/*
 * qd_set_timing:
 *
 * records the timing
 */

static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
	drive->drive_data &= 0xff00;
	drive->drive_data |= timing;

	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}

static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	u16 *id = drive->id;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	/*
	 * FIXME: use "pio" value
	 */
	if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
	    (id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
	    id[ATA_ID_EIDE_PIO] >= 240) {
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
			id[ATA_ID_OLD_PIO_MODES] & 0xff);
		active_time = 110;
		recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
	}

	qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
				active_time, recovery_time));
}

static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	unsigned int cycle_time;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */
	u8 base = (hwif->config_data & 0xff00) >> 8;

	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
		cycle_time = ide_pio_cycle_time(drive, pio);

		switch (pio) {
			case 0: break;
			case 3:
				if (cycle_time >= 110) {
					active_time = 86;
					recovery_time = cycle_time - 102;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			case 4:
				if (cycle_time >= 69) {
					active_time = 70;
					recovery_time = cycle_time - 61;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			default:
				if (cycle_time >= 180) {
					active_time = 110;
					recovery_time = cycle_time - 120;
				} else {
					active_time = t->active;
					recovery_time = cycle_time - active_time;
				}
		}
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	}

	if (!hwif->channel && drive->media != ide_disk) {
		outb(0x5f, QD_CONTROL_PORT);
		printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
			"and post-write buffer on %s.\n",
			drive->name, hwif->name);
	}

	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
}

/*
 * qd_testreg
 *
 * tests if the given port is a register
 */

static int __init qd_testreg(int port)
{
	unsigned long flags;
	u8 savereg, readreg;

	local_irq_save(flags);
	savereg = inb_p(port);
	outb_p(QD_TESTVAL, port);	/* safe value */
	readreg = inb_p(port);
	outb(savereg, port);
	local_irq_restore(flags);

	if (savereg == QD_TESTVAL) {
		printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
		printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
		printk(KERN_ERR "Assuming qd65xx is not present.\n");
		return 1;
	}

	return (readreg != QD_TESTVAL);
}

static void __init qd6500_init_dev(ide_drive_t *drive)
{
	ide_hwif_t *hwif = drive->hwif;
	u8 base = (hwif->config_data & 0xff00) >> 8;
	u8 config = QD_CONFIG(hwif);

	drive->drive_data = QD6500_DEF_DATA;
}

static void __init qd6580_init_dev(ide_drive_t *drive)
{
	ide_hwif_t *hwif = drive->hwif;
	u16 t1, t2;
	u8 base = (hwif->config_data & 0xff00) >> 8;
	u8 config = QD_CONFIG(hwif);

	if (hwif->host_flags & IDE_HFLAG_SINGLE) {
		t1 = QD6580_DEF_DATA;
		t2 = QD6580_DEF_DATA2;
	} else
		t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;

	drive->drive_data = (drive->dn & 1) ? t2 : t1;
}

static const struct ide_port_ops qd6500_port_ops = {
	.init_dev		= qd6500_init_dev,
	.set_pio_mode		= qd6500_set_pio_mode,
	.selectproc		= qd65xx_select,
};

static const struct ide_port_ops qd6580_port_ops = {
	.init_dev		= qd6580_init_dev,
	.set_pio_mode		= qd6580_set_pio_mode,
	.selectproc		= qd65xx_select,
};

static const struct ide_port_info qd65xx_port_info __initdata = {
	.name			= DRV_NAME,
	.chipset		= ide_qd65xx,
	.host_flags		= IDE_HFLAG_IO_32BIT |
				  IDE_HFLAG_NO_DMA,
	.pio_mask		= ATA_PIO4,
};

/*
 * qd_probe:
 *
 * looks at the specified baseport, and if qd found, registers & initialises it
 * return 1 if another qd may be probed
 */

static int __init qd_probe(int base)
{
	int rc;
	u8 config, unit, control;
	struct ide_port_info d = qd65xx_port_info;

	config = inb(QD_CONFIG_PORT);

	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
		return -ENODEV;

	unit = ! (config & QD_CONFIG_IDE_BASEPORT);

	if (unit)
		d.host_flags |= IDE_HFLAG_QD_2ND_PORT;

	switch (config & 0xf0) {
	case QD_CONFIG_QD6500:
		if (qd_testreg(base))
			 return -ENODEV;	/* bad register */

		if (config & QD_CONFIG_DISABLED) {
			printk(KERN_WARNING "qd6500 is disabled !\n");
			return -ENODEV;
		}

		printk(KERN_NOTICE "qd6500 at %#x\n", base);
		printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
			config, QD_ID3);

		d.port_ops = &qd6500_port_ops;
		d.host_flags |= IDE_HFLAG_SINGLE;
		break;
	case QD_CONFIG_QD6580_A:
	case QD_CONFIG_QD6580_B:
		if (qd_testreg(base) || qd_testreg(base + 0x02))
			return -ENODEV;	/* bad registers */

		control = inb(QD_CONTROL_PORT);

		printk(KERN_NOTICE "qd6580 at %#x\n", base);
		printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
			config, control, QD_ID3);

		outb(QD_DEF_CONTR, QD_CONTROL_PORT);

		d.port_ops = &qd6580_port_ops;
		if (control & QD_CONTR_SEC_DISABLED)
			d.host_flags |= IDE_HFLAG_SINGLE;

		printk(KERN_INFO "qd6580: %s IDE board\n",
			(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
		break;
	default:
		return -ENODEV;
	}

	rc = ide_legacy_device_add(&d, (base << 8) | config);

	if (d.host_flags & IDE_HFLAG_SINGLE)
		return (rc == 0) ? 1 : rc;

	return rc;
}

static int probe_qd65xx;

module_param_named(probe, probe_qd65xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");

static int __init qd65xx_init(void)
{
	int rc1, rc2 = -ENODEV;

	if (probe_qd65xx == 0)
		return -ENODEV;

	rc1 = qd_probe(0x30);
	if (rc1)
		rc2 = qd_probe(0xb0);

	if (rc1 < 0 && rc2 < 0)
		return -ENODEV;

	return 0;
}

module_init(qd65xx_init);

MODULE_AUTHOR("Samuel Thibault");
MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
	3	*/
	4
	5	/*
	6	* Version 0.03 Cleaned auto-tune, added probe
	7	* Version 0.04 Added second channel tuning
	8	* Version 0.05 Enhanced tuning ; added qd6500 support
	9	* Version 0.06 Added dos driver's list
	10	* Version 0.07 Second channel bug fix
	11	*
	12	* QDI QD6500/QD6580 EIDE controller fast support
	13	*
1da177e4	14	* To activate controller support, use "ide0=qd65xx"
1da177e4 LT	15	*/
	16
	17	/*
	18	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
	19	* Samuel Thibault <samuel.thibault@fnac.net>
	20	*/
	21
1da177e4	22	#include <linux/module.h>
1da177e4 LT	23	#include <linux/types.h>
	24	#include <linux/kernel.h>
	25	#include <linux/delay.h>
	26	#include <linux/timer.h>
	27	#include <linux/mm.h>
	28	#include <linux/ioport.h>
	29	#include <linux/blkdev.h>
1da177e4 LT	30	#include <linux/ide.h>
	31	#include <linux/init.h>
	32	#include <asm/system.h>
	33	#include <asm/io.h>
	34
d92f1a28 BZ	35	#define DRV_NAME "qd65xx"
d92f1a28 BZ	36
1da177e4 LT	37	#include "qd65xx.h"
	38
	39	/*
	40	* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
	41	* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
	42	* -- qd6500 is a single IDE interface
	43	* -- qd6580 is a dual IDE interface
	44	*
	45	* More research on qd6580 being done by willmore@cig.mot.com (David)
	46	* More Information given by Petr Soucek (petr@ryston.cz)
	47	* http://www.ryston.cz/petr/vlb
	48	*/
	49
	50	/*
	51	* base: Timer1
	52	*
	53	*
	54	* base+0x01: Config (R/O)
	55	*
	56	* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
	57	* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
	58	* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
	59	* bit 3: qd6500: 1 = disabled, 0 = enabled
	60	* qd6580: 1
	61	* upper nibble:
	62	* qd6500: 1100
	63	* qd6580: either 1010 or 0101
	64	*
	65	*
	66	* base+0x02: Timer2 (qd6580 only)
	67	*
	68	*
	69	* base+0x03: Control (qd6580 only)
	70	*
	71	* bits 0-3 must always be set 1
	72	* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
	73	* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
	74	* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
	75	* channel 1 for hdc & hdd
	76	* bit 1 : 1 = only disks on primary port
	77	* 0 = disks & ATAPI devices on primary port
	78	* bit 2-4 : always 0
	79	* bit 5 : status, but of what ?
	80	* bit 6 : always set 1 by dos driver
	81	* bit 7 : set 1 for non-ATAPI devices on primary port
	82	* (maybe read-ahead and post-write buffer ?)
	83	*/
	84
	85	static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
	86
1da177e4	87	/*
d07616f1	88	* qd65xx_select:
1da177e4	89	*
d07616f1	90	* This routine is invoked to prepare for access to a given drive.
1da177e4 LT	91	*/
1da177e4 LT	92
d07616f1	93	static void qd65xx_select(ide_drive_t *drive)
1da177e4 LT	94	{
	95	u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) \|
	96	(QD_TIMREG(drive) & 0x02);
	97
	98	if (timings[index] != QD_TIMING(drive))
c196567a	99	outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
1da177e4 LT	100	}
	101
	102	/*
	103	* qd6500_compute_timing
	104	*
	105	* computes the timing value where
	106	* lower nibble represents active time, in count of VLB clocks
	107	* upper nibble represents recovery time, in count of VLB clocks
	108	*/
	109
	110	static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
	111	{
30e5ee4d	112	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
ebae41a5	113	u8 act_cyc, rec_cyc;
1da177e4	114
ebae41a5 BZ	115	if (clk <= 33) {
	116	act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
	117	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
1da177e4	118	} else {
ebae41a5 BZ	119	act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
ebae41a5 BZ	120	rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
1da177e4 LT	121	}
1da177e4 LT	122
ebae41a5	123	return (rec_cyc << 4) \| 0x08 \| act_cyc;
1da177e4 LT	124	}
	125
	126	/*
	127	* qd6580_compute_timing
	128	*
	129	* idem for qd6580
	130	*/
	131
	132	static u8 qd6580_compute_timing (int active_time, int recovery_time)
	133	{
30e5ee4d	134	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
ebae41a5	135	u8 act_cyc, rec_cyc;
1da177e4	136
ebae41a5 BZ	137	act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
	138	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
	139
	140	return (rec_cyc << 4) \| act_cyc;
1da177e4 LT	141	}
	142
	143	/*
	144	* qd_find_disk_type
	145	*
	146	* tries to find timing from dos driver's table
	147	*/
	148
	149	static int qd_find_disk_type (ide_drive_t *drive,
	150	int active_time, int recovery_time)
	151	{
	152	struct qd65xx_timing_s *p;
4dde4492 BZ	153	char m = (char )&drive->id[ATA_ID_PROD];
4dde4492 BZ	154	char model[ATA_ID_PROD_LEN];
1da177e4	155
4dde4492 BZ	156	if (*m == 0)
4dde4492 BZ	157	return 0;
1da177e4	158
4dde4492 BZ	159	strncpy(model, m, ATA_ID_PROD_LEN);
4dde4492 BZ	160	ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */
1da177e4 LT	161
	162	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
	163	if (!strncmp(p->model, model+p->offset, 4)) {
	164	printk(KERN_DEBUG "%s: listed !\n", drive->name);
	165	*active_time = p->active;
	166	*recovery_time = p->recovery;
	167	return 1;
	168	}
	169	}
	170	return 0;
	171	}
	172
1da177e4 LT	173	/*
	174	* qd_set_timing:
	175	*
d07616f1	176	* records the timing
1da177e4 LT	177	*/
	178
	179	static void qd_set_timing (ide_drive_t *drive, u8 timing)
	180	{
1da177e4 LT	181	drive->drive_data &= 0xff00;
1da177e4 LT	182	drive->drive_data \|= timing;
1da177e4 LT	183
	184	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
	185	}
	186
26bcb879	187	static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4	188	{
4dde4492	189	u16 *id = drive->id;
1da177e4 LT	190	int active_time = 175;
	191	int recovery_time = 415; /* worst case values from the dos driver */
	192
26bcb879 BZ	193	/*
	194	* FIXME: use "pio" value
	195	*/
4dde4492	196	if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
48fb2688	197	(id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
4dde4492	198	id[ATA_ID_EIDE_PIO] >= 240) {
1da177e4	199	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
48fb2688	200	id[ATA_ID_OLD_PIO_MODES] & 0xff);
1da177e4	201	active_time = 110;
4dde4492	202	recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
1da177e4 LT	203	}
1da177e4 LT	204
898ec223 BZ	205	qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
898ec223 BZ	206	active_time, recovery_time));
1da177e4 LT	207	}
1da177e4 LT	208
26bcb879	209	static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4	210	{
79472b6e	211	ide_hwif_t *hwif = drive->hwif;
2feecfac	212	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
7dd00083	213	unsigned int cycle_time;
1da177e4 LT	214	int active_time = 175;
1da177e4 LT	215	int recovery_time = 415; /* worst case values from the dos driver */
79472b6e	216	u8 base = (hwif->config_data & 0xff00) >> 8;
1da177e4 LT	217
1da177e4 LT	218	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
7dd00083	219	cycle_time = ide_pio_cycle_time(drive, pio);
1da177e4 LT	220
	221	switch (pio) {
	222	case 0: break;
	223	case 3:
7dd00083	224	if (cycle_time >= 110) {
1da177e4	225	active_time = 86;
7dd00083	226	recovery_time = cycle_time - 102;
1da177e4 LT	227	} else
	228	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	229	break;
	230	case 4:
7dd00083	231	if (cycle_time >= 69) {
1da177e4	232	active_time = 70;
7dd00083	233	recovery_time = cycle_time - 61;
1da177e4 LT	234	} else
	235	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	236	break;
	237	default:
7dd00083	238	if (cycle_time >= 180) {
1da177e4	239	active_time = 110;
7dd00083	240	recovery_time = cycle_time - 120;
1da177e4	241	} else {
2feecfac	242	active_time = t->active;
7dd00083	243	recovery_time = cycle_time - active_time;
1da177e4 LT	244	}
	245	}
	246	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	247	}
	248
898ec223	249	if (!hwif->channel && drive->media != ide_disk) {
c196567a	250	outb(0x5f, QD_CONTROL_PORT);
1da177e4 LT	251	printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
1da177e4 LT	252	"and post-write buffer on %s.\n",
898ec223	253	drive->name, hwif->name);
1da177e4 LT	254	}
	255
	256	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
	257	}
	258
	259	/*
	260	* qd_testreg
	261	*
	262	* tests if the given port is a register
	263	*/
	264
	265	static int __init qd_testreg(int port)
	266	{
1da177e4	267	unsigned long flags;
f949820d	268	u8 savereg, readreg;
1da177e4	269
c196567a	270	local_irq_save(flags);
1da177e4 LT	271	savereg = inb_p(port);
	272	outb_p(QD_TESTVAL, port); /* safe value */
	273	readreg = inb_p(port);
	274	outb(savereg, port);
c196567a	275	local_irq_restore(flags);
1da177e4 LT	276
	277	if (savereg == QD_TESTVAL) {
	278	printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
	279	printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
	280	printk(KERN_ERR "Assuming qd65xx is not present.\n");
	281	return 1;
	282	}
	283
	284	return (readreg != QD_TESTVAL);
	285	}
	286
e6d95bd1	287	static void __init qd6500_init_dev(ide_drive_t *drive)
1f2cf8b0	288	{
e6d95bd1	289	ide_hwif_t *hwif = drive->hwif;
79472b6e BZ	290	u8 base = (hwif->config_data & 0xff00) >> 8;
79472b6e BZ	291	u8 config = QD_CONFIG(hwif);
1f2cf8b0	292
e6d95bd1	293	drive->drive_data = QD6500_DEF_DATA;
1f2cf8b0 BZ	294	}
1f2cf8b0 BZ	295
e6d95bd1	296	static void __init qd6580_init_dev(ide_drive_t *drive)
1f2cf8b0	297	{
e6d95bd1	298	ide_hwif_t *hwif = drive->hwif;
1f2cf8b0	299	u16 t1, t2;
79472b6e BZ	300	u8 base = (hwif->config_data & 0xff00) >> 8;
79472b6e BZ	301	u8 config = QD_CONFIG(hwif);
1f2cf8b0	302
79472b6e	303	if (hwif->host_flags & IDE_HFLAG_SINGLE) {
1f2cf8b0 BZ	304	t1 = QD6580_DEF_DATA;
	305	t2 = QD6580_DEF_DATA2;
	306	} else
	307	t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
	308
123995b9	309	drive->drive_data = (drive->dn & 1) ? t2 : t1;
1da177e4 LT	310	}
1da177e4 LT	311
ac95beed	312	static const struct ide_port_ops qd6500_port_ops = {
e6d95bd1	313	.init_dev = qd6500_init_dev,
ac95beed BZ	314	.set_pio_mode = qd6500_set_pio_mode,
	315	.selectproc = qd65xx_select,
	316	};
	317
	318	static const struct ide_port_ops qd6580_port_ops = {
e6d95bd1	319	.init_dev = qd6580_init_dev,
ac95beed BZ	320	.set_pio_mode = qd6580_set_pio_mode,
	321	.selectproc = qd65xx_select,
	322	};
	323
c413b9b9	324	static const struct ide_port_info qd65xx_port_info __initdata = {
d92f1a28	325	.name = DRV_NAME,
c413b9b9 BZ	326	.chipset = ide_qd65xx,
c413b9b9 BZ	327	.host_flags = IDE_HFLAG_IO_32BIT \|
0d28ec7f	328	IDE_HFLAG_NO_DMA,
c413b9b9 BZ	329	.pio_mask = ATA_PIO4,
	330	};
	331
1da177e4 LT	332	/*
	333	* qd_probe:
	334	*
	335	* looks at the specified baseport, and if qd found, registers & initialises it
	336	* return 1 if another qd may be probed
	337	*/
	338
	339	static int __init qd_probe(int base)
	340	{
0bfeee7d	341	int rc;
7a2199f3	342	u8 config, unit, control;
e277f91f	343	struct ide_port_info d = qd65xx_port_info;
1da177e4	344
c196567a	345	config = inb(QD_CONFIG_PORT);
1da177e4 LT	346
1da177e4 LT	347	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
7daf66dd	348	return -ENODEV;
1da177e4 LT	349
	350	unit = ! (config & QD_CONFIG_IDE_BASEPORT);
	351
e277f91f BZ	352	if (unit)
	353	d.host_flags \|= IDE_HFLAG_QD_2ND_PORT;
	354
7a2199f3 BZ	355	switch (config & 0xf0) {
7a2199f3 BZ	356	case QD_CONFIG_QD6500:
7daf66dd BZ	357	if (qd_testreg(base))
7daf66dd BZ	358	return -ENODEV; /* bad register */
1da177e4	359
1da177e4 LT	360	if (config & QD_CONFIG_DISABLED) {
1da177e4 LT	361	printk(KERN_WARNING "qd6500 is disabled !\n");
7daf66dd	362	return -ENODEV;
1da177e4 LT	363	}
1da177e4 LT	364
e277f91f BZ	365	printk(KERN_NOTICE "qd6500 at %#x\n", base);
	366	printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
	367	config, QD_ID3);
	368
ac95beed	369	d.port_ops = &qd6500_port_ops;
79472b6e	370	d.host_flags \|= IDE_HFLAG_SINGLE;
7a2199f3 BZ	371	break;
	372	case QD_CONFIG_QD6580_A:
	373	case QD_CONFIG_QD6580_B:
7daf66dd BZ	374	if (qd_testreg(base) \|\| qd_testreg(base + 0x02))
7daf66dd BZ	375	return -ENODEV; /* bad registers */
1da177e4	376
c196567a	377	control = inb(QD_CONTROL_PORT);
1da177e4 LT	378
	379	printk(KERN_NOTICE "qd6580 at %#x\n", base);
	380	printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
	381	config, control, QD_ID3);
	382
788d6697 BZ	383	outb(QD_DEF_CONTR, QD_CONTROL_PORT);
788d6697 BZ	384
ac95beed	385	d.port_ops = &qd6580_port_ops;
7a2199f3	386	if (control & QD_CONTR_SEC_DISABLED)
79472b6e BZ	387	d.host_flags \|= IDE_HFLAG_SINGLE;
79472b6e BZ	388
7a2199f3 BZ	389	printk(KERN_INFO "qd6580: %s IDE board\n",
	390	(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
	391	break;
	392	default:
	393	return -ENODEV;
	394	}
26bcb879	395
7a2199f3	396	rc = ide_legacy_device_add(&d, (base << 8) \| config);
e277f91f	397
7a2199f3 BZ	398	if (d.host_flags & IDE_HFLAG_SINGLE)
7a2199f3 BZ	399	return (rc == 0) ? 1 : rc;
1da177e4	400
7a2199f3	401	return rc;
1da177e4 LT	402	}
1da177e4 LT	403
ef87f8d0	404	static int probe_qd65xx;
84913882 BZ	405
	406	module_param_named(probe, probe_qd65xx, bool, 0);
	407	MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
	408
ade2daf9	409	static int __init qd65xx_init(void)
1da177e4	410	{
7daf66dd BZ	411	int rc1, rc2 = -ENODEV;
7daf66dd BZ	412
84913882 BZ	413	if (probe_qd65xx == 0)
	414	return -ENODEV;
	415
7daf66dd BZ	416	rc1 = qd_probe(0x30);
	417	if (rc1)
	418	rc2 = qd_probe(0xb0);
	419
	420	if (rc1 < 0 && rc2 < 0)
1da177e4	421	return -ENODEV;
7daf66dd	422
1da177e4 LT	423	return 0;
	424	}
	425
1da177e4	426	module_init(qd65xx_init);
1da177e4 LT	427
	428	MODULE_AUTHOR("Samuel Thibault");
	429	MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
	430	MODULE_LICENSE("GPL");