[net-next-2.6.git] / drivers / ide / legacy / qd65xx.c

/*
 *  Copyright (C) 1996-2001  Linus Torvalds & author (see below)
 */

/*
 *  Version 0.03	Cleaned auto-tune, added probe
 *  Version 0.04	Added second channel tuning
 *  Version 0.05	Enhanced tuning ; added qd6500 support
 *  Version 0.06	Added dos driver's list
 *  Version 0.07	Second channel bug fix 
 *
 * QDI QD6500/QD6580 EIDE controller fast support
 *
 * Please set local bus speed using kernel parameter idebus
 * 	for example, "idebus=33" stands for 33Mhz VLbus
 * To activate controller support, use "ide0=qd65xx"
 * To enable tuning, use "hda=autotune hdb=autotune"
 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
 */

/*
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@fnac.net>
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <asm/system.h>
#include <asm/io.h>

#include "qd65xx.h"

/*
 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
 *            or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
 *	-- qd6500 is a single IDE interface
 *	-- qd6580 is a dual IDE interface
 *
 * More research on qd6580 being done by willmore@cig.mot.com (David)
 * More Information given by Petr Soucek (petr@ryston.cz)
 * http://www.ryston.cz/petr/vlb
 */

/*
 * base: Timer1
 *
 *
 * base+0x01: Config (R/O)
 *
 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
 * bit 3: qd6500: 1 = disabled, 0 = enabled
 *        qd6580: 1
 * upper nibble:
 *        qd6500: 1100
 *        qd6580: either 1010 or 0101
 *
 *
 * base+0x02: Timer2 (qd6580 only)
 *
 *
 * base+0x03: Control (qd6580 only)
 *
 * bits 0-3 must always be set 1
 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
 *         0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
 *                                                   channel 1 for hdc & hdd
 * bit 1 : 1 = only disks on primary port
 *         0 = disks & ATAPI devices on primary port
 * bit 2-4 : always 0
 * bit 5 : status, but of what ?
 * bit 6 : always set 1 by dos driver
 * bit 7 : set 1 for non-ATAPI devices on primary port
 *	(maybe read-ahead and post-write buffer ?)
 */

static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */

/*
 * qd65xx_select:
 *
 * This routine is invoked to prepare for access to a given drive.
 */

static void qd65xx_select(ide_drive_t *drive)
{
	u8 index = ((	(QD_TIMREG(drive)) & 0x80 ) >> 7) |
			(QD_TIMREG(drive) & 0x02);

	if (timings[index] != QD_TIMING(drive))
		outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
}

/*
 * qd6500_compute_timing
 *
 * computes the timing value where
 *	lower nibble represents active time,   in count of VLB clocks
 *	upper nibble represents recovery time, in count of VLB clocks
 */

static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
{
	u8 active_cycle,recovery_cycle;

	if (system_bus_clock()<=33) {
		active_cycle =   9  - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 2, 9);
		recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
	} else {
		active_cycle =   8  - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 1, 8);
		recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
	}

	return((recovery_cycle<<4) | 0x08 | active_cycle);
}

/*
 * qd6580_compute_timing
 *
 * idem for qd6580
 */

static u8 qd6580_compute_timing (int active_time, int recovery_time)
{
	u8 active_cycle   = 17 - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 2, 17);
	u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);

	return((recovery_cycle<<4) | active_cycle);
}

/*
 * qd_find_disk_type
 *
 * tries to find timing from dos driver's table
 */

static int qd_find_disk_type (ide_drive_t *drive,
		int *active_time, int *recovery_time)
{
	struct qd65xx_timing_s *p;
	char model[40];

	if (!*drive->id->model) return 0;

	strncpy(model,drive->id->model,40);
	ide_fixstring(model,40,1); /* byte-swap */

	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
		if (!strncmp(p->model, model+p->offset, 4)) {
			printk(KERN_DEBUG "%s: listed !\n", drive->name);
			*active_time = p->active;
			*recovery_time = p->recovery;
			return 1;
		}
	}
	return 0;
}

/*
 * qd_set_timing:
 *
 * records the timing
 */

static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
	drive->drive_data &= 0xff00;
	drive->drive_data |= timing;

	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}

static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	/*
	 * FIXME: use "pio" value
	 */
	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
		&& drive->id->tPIO && (drive->id->field_valid & 0x02)
		&& drive->id->eide_pio >= 240) {

		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
				drive->id->tPIO);
		active_time = 110;
		recovery_time = drive->id->eide_pio - 120;
	}

	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
}

static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	int base = HWIF(drive)->select_data;
	unsigned int cycle_time;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
		cycle_time = ide_pio_cycle_time(drive, pio);

		switch (pio) {
			case 0: break;
			case 3:
				if (cycle_time >= 110) {
					active_time = 86;
					recovery_time = cycle_time - 102;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			case 4:
				if (cycle_time >= 69) {
					active_time = 70;
					recovery_time = cycle_time - 61;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			default:
				if (cycle_time >= 180) {
					active_time = 110;
					recovery_time = cycle_time - 120;
				} else {
					active_time = ide_pio_timings[pio].active_time;
					recovery_time = cycle_time - active_time;
				}
		}
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	}

	if (!HWIF(drive)->channel && drive->media != ide_disk) {
		outb(0x5f, QD_CONTROL_PORT);
		printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
			"and post-write buffer on %s.\n",
			drive->name, HWIF(drive)->name);
	}

	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
}

/*
 * qd_testreg
 *
 * tests if the given port is a register
 */

static int __init qd_testreg(int port)
{
	unsigned long flags;
	u8 savereg, readreg;

	local_irq_save(flags);
	savereg = inb_p(port);
	outb_p(QD_TESTVAL, port);	/* safe value */
	readreg = inb_p(port);
	outb(savereg, port);
	local_irq_restore(flags);

	if (savereg == QD_TESTVAL) {
		printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
		printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
		printk(KERN_ERR "Assuming qd65xx is not present.\n");
		return 1;
	}

	return (readreg != QD_TESTVAL);
}

/*
 * qd_setup:
 *
 * called to setup an ata channel : adjusts attributes & links for tuning
 */

static void __init qd_setup(ide_hwif_t *hwif, int base, int config)
{
	hwif->select_data = base;
	hwif->config_data = config;
}

static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
{
	u8 base = hwif->select_data, config = QD_CONFIG(hwif);

	hwif->drives[0].drive_data = QD6500_DEF_DATA;
	hwif->drives[1].drive_data = QD6500_DEF_DATA;
}

static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
{
	u16 t1, t2;
	u8 base = hwif->select_data, config = QD_CONFIG(hwif);

	if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
		t1 = QD6580_DEF_DATA;
		t2 = QD6580_DEF_DATA2;
	} else
		t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;

	hwif->drives[0].drive_data = t1;
	hwif->drives[1].drive_data = t2;
}

static const struct ide_port_info qd65xx_port_info __initdata = {
	.chipset		= ide_qd65xx,
	.host_flags		= IDE_HFLAG_IO_32BIT |
				  IDE_HFLAG_NO_DMA |
				  IDE_HFLAG_NO_AUTOTUNE,
	.pio_mask		= ATA_PIO4,
};

/*
 * qd_probe:
 *
 * looks at the specified baseport, and if qd found, registers & initialises it
 * return 1 if another qd may be probed
 */

static int __init qd_probe(int base)
{
	ide_hwif_t *hwif;
	u8 config, unit;
	u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
	hw_regs_t hw[2];
	struct ide_port_info d = qd65xx_port_info;

	config = inb(QD_CONFIG_PORT);

	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
		return -ENODEV;

	unit = ! (config & QD_CONFIG_IDE_BASEPORT);

	if (unit)
		d.host_flags |= IDE_HFLAG_QD_2ND_PORT;

	memset(&hw, 0, sizeof(hw));

	ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
	hw[0].irq = 14;

	ide_std_init_ports(&hw[1], 0x170, 0x376);
	hw[1].irq = 15;

	if ((config & 0xf0) == QD_CONFIG_QD6500) {

		if (qd_testreg(base))
			 return -ENODEV;	/* bad register */

		/* qd6500 found */

		if (config & QD_CONFIG_DISABLED) {
			printk(KERN_WARNING "qd6500 is disabled !\n");
			return -ENODEV;
		}

		printk(KERN_NOTICE "qd6500 at %#x\n", base);
		printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
			config, QD_ID3);

		hwif = ide_find_port_slot(&d);
		if (hwif == NULL)
			return -ENOENT;

		ide_init_port_hw(hwif, &hw[unit]);

		qd_setup(hwif, base, config);

		hwif->port_init_devs = qd6500_port_init_devs;
		hwif->set_pio_mode   = qd6500_set_pio_mode;
		hwif->selectproc     = qd65xx_select;

		idx[unit] = hwif->index;

		ide_device_add(idx, &d);

		return 1;
	}

	if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
	    ((config & 0xf0) == QD_CONFIG_QD6580_B)) {

		u8 control;

		if (qd_testreg(base) || qd_testreg(base + 0x02))
			return -ENODEV;	/* bad registers */

		/* qd6580 found */

		control = inb(QD_CONTROL_PORT);

		printk(KERN_NOTICE "qd6580 at %#x\n", base);
		printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
			config, control, QD_ID3);

		outb(QD_DEF_CONTR, QD_CONTROL_PORT);

		if (control & QD_CONTR_SEC_DISABLED) {
			/* secondary disabled */

			printk(KERN_INFO "qd6580: single IDE board\n");

			hwif = ide_find_port_slot(&d);
			if (hwif == NULL)
				return -ENOENT;

			ide_init_port_hw(hwif, &hw[unit]);

			qd_setup(hwif, base, config | (control << 8));

			hwif->port_init_devs = qd6580_port_init_devs;
			hwif->set_pio_mode   = qd6580_set_pio_mode;
			hwif->selectproc     = qd65xx_select;

			idx[unit] = hwif->index;

			ide_device_add(idx, &d);

			return 1;
		} else {
			ide_hwif_t *mate;

			/* secondary enabled */
			printk(KERN_INFO "qd6580: dual IDE board\n");

			hwif = ide_find_port();
			if (hwif) {
				ide_init_port_hw(hwif, &hw[0]);
				qd_setup(hwif, base, config | (control << 8));
				hwif->port_init_devs = qd6580_port_init_devs;
				hwif->set_pio_mode   = qd6580_set_pio_mode;
				hwif->selectproc     = qd65xx_select;
				idx[0] = hwif->index;
			}

			mate = ide_find_port();
			if (mate) {
				ide_init_port_hw(mate, &hw[1]);
				qd_setup(mate, base, config | (control << 8));
				mate->port_init_devs = qd6580_port_init_devs;
				mate->set_pio_mode   = qd6580_set_pio_mode;
				mate->selectproc     = qd65xx_select;
				idx[1] = mate->index;
			}

			ide_device_add(idx, &qd65xx_port_info);

			return 0; /* no other qd65xx possible */
		}
	}
	/* no qd65xx found */
	return -ENODEV;
}

int probe_qd65xx = 0;

module_param_named(probe, probe_qd65xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");

static int __init qd65xx_init(void)
{
	int rc1, rc2 = -ENODEV;

	if (probe_qd65xx == 0)
		return -ENODEV;

	rc1 = qd_probe(0x30);
	if (rc1)
		rc2 = qd_probe(0xb0);

	if (rc1 < 0 && rc2 < 0)
		return -ENODEV;

	return 0;
}

module_init(qd65xx_init);

MODULE_AUTHOR("Samuel Thibault");
MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
	3	*/
	4
	5	/*
	6	* Version 0.03 Cleaned auto-tune, added probe
	7	* Version 0.04 Added second channel tuning
	8	* Version 0.05 Enhanced tuning ; added qd6500 support
	9	* Version 0.06 Added dos driver's list
	10	* Version 0.07 Second channel bug fix
	11	*
	12	* QDI QD6500/QD6580 EIDE controller fast support
	13	*
	14	* Please set local bus speed using kernel parameter idebus
	15	* for example, "idebus=33" stands for 33Mhz VLbus
	16	* To activate controller support, use "ide0=qd65xx"
b6209a90 BZ	17	* To enable tuning, use "hda=autotune hdb=autotune"
b6209a90 BZ	18	* To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
1da177e4 LT	19	*/
	20
	21	/*
	22	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
	23	* Samuel Thibault <samuel.thibault@fnac.net>
	24	*/
	25
1da177e4	26	#include <linux/module.h>
1da177e4 LT	27	#include <linux/types.h>
	28	#include <linux/kernel.h>
	29	#include <linux/delay.h>
	30	#include <linux/timer.h>
	31	#include <linux/mm.h>
	32	#include <linux/ioport.h>
	33	#include <linux/blkdev.h>
	34	#include <linux/hdreg.h>
	35	#include <linux/ide.h>
	36	#include <linux/init.h>
	37	#include <asm/system.h>
	38	#include <asm/io.h>
	39
	40	#include "qd65xx.h"
	41
	42	/*
	43	* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
	44	* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
	45	* -- qd6500 is a single IDE interface
	46	* -- qd6580 is a dual IDE interface
	47	*
	48	* More research on qd6580 being done by willmore@cig.mot.com (David)
	49	* More Information given by Petr Soucek (petr@ryston.cz)
	50	* http://www.ryston.cz/petr/vlb
	51	*/
	52
	53	/*
	54	* base: Timer1
	55	*
	56	*
	57	* base+0x01: Config (R/O)
	58	*
	59	* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
	60	* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
	61	* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
	62	* bit 3: qd6500: 1 = disabled, 0 = enabled
	63	* qd6580: 1
	64	* upper nibble:
	65	* qd6500: 1100
	66	* qd6580: either 1010 or 0101
	67	*
	68	*
	69	* base+0x02: Timer2 (qd6580 only)
	70	*
	71	*
	72	* base+0x03: Control (qd6580 only)
	73	*
	74	* bits 0-3 must always be set 1
	75	* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
	76	* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
	77	* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
	78	* channel 1 for hdc & hdd
	79	* bit 1 : 1 = only disks on primary port
	80	* 0 = disks & ATAPI devices on primary port
	81	* bit 2-4 : always 0
	82	* bit 5 : status, but of what ?
	83	* bit 6 : always set 1 by dos driver
	84	* bit 7 : set 1 for non-ATAPI devices on primary port
	85	* (maybe read-ahead and post-write buffer ?)
	86	*/
	87
	88	static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
	89
1da177e4	90	/*
d07616f1	91	* qd65xx_select:
1da177e4	92	*
d07616f1	93	* This routine is invoked to prepare for access to a given drive.
1da177e4 LT	94	*/
1da177e4 LT	95
d07616f1	96	static void qd65xx_select(ide_drive_t *drive)
1da177e4 LT	97	{
	98	u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) \|
	99	(QD_TIMREG(drive) & 0x02);
	100
	101	if (timings[index] != QD_TIMING(drive))
c196567a	102	outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
1da177e4 LT	103	}
	104
	105	/*
	106	* qd6500_compute_timing
	107	*
	108	* computes the timing value where
	109	* lower nibble represents active time, in count of VLB clocks
	110	* upper nibble represents recovery time, in count of VLB clocks
	111	*/
	112
	113	static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
	114	{
	115	u8 active_cycle,recovery_cycle;
	116
	117	if (system_bus_clock()<=33) {
	118	active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
	119	recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
	120	} else {
	121	active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
	122	recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
	123	}
	124
	125	return((recovery_cycle<<4) \| 0x08 \| active_cycle);
	126	}
	127
	128	/*
	129	* qd6580_compute_timing
	130	*
	131	* idem for qd6580
	132	*/
	133
	134	static u8 qd6580_compute_timing (int active_time, int recovery_time)
	135	{
	136	u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
	137	u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
	138
	139	return((recovery_cycle<<4) \| active_cycle);
	140	}
	141
	142	/*
	143	* qd_find_disk_type
	144	*
	145	* tries to find timing from dos driver's table
	146	*/
	147
	148	static int qd_find_disk_type (ide_drive_t *drive,
	149	int active_time, int recovery_time)
	150	{
	151	struct qd65xx_timing_s *p;
	152	char model[40];
	153
	154	if (!*drive->id->model) return 0;
	155
	156	strncpy(model,drive->id->model,40);
	157	ide_fixstring(model,40,1); /* byte-swap */
	158
	159	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
	160	if (!strncmp(p->model, model+p->offset, 4)) {
	161	printk(KERN_DEBUG "%s: listed !\n", drive->name);
	162	*active_time = p->active;
	163	*recovery_time = p->recovery;
	164	return 1;
	165	}
	166	}
167	return 0;
168	}
169
1da177e4 LT	170	/*
	171	* qd_set_timing:
	172	*
d07616f1	173	* records the timing
1da177e4 LT	174	*/
	175
	176	static void qd_set_timing (ide_drive_t *drive, u8 timing)
	177	{
1da177e4 LT	178	drive->drive_data &= 0xff00;
1da177e4 LT	179	drive->drive_data \|= timing;
1da177e4 LT	180
	181	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
	182	}
	183
26bcb879	184	static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4 LT	185	{
	186	int active_time = 175;
	187	int recovery_time = 415; /* worst case values from the dos driver */
	188
26bcb879 BZ	189	/*
	190	* FIXME: use "pio" value
	191	*/
1da177e4 LT	192	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
	193	&& drive->id->tPIO && (drive->id->field_valid & 0x02)
	194	&& drive->id->eide_pio >= 240) {
	195
	196	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
	197	drive->id->tPIO);
	198	active_time = 110;
	199	recovery_time = drive->id->eide_pio - 120;
	200	}
	201
	202	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
	203	}
	204
26bcb879	205	static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4	206	{
1da177e4	207	int base = HWIF(drive)->select_data;
7dd00083	208	unsigned int cycle_time;
1da177e4 LT	209	int active_time = 175;
	210	int recovery_time = 415; /* worst case values from the dos driver */
	211
	212	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
7dd00083	213	cycle_time = ide_pio_cycle_time(drive, pio);
1da177e4 LT	214
	215	switch (pio) {
	216	case 0: break;
	217	case 3:
7dd00083	218	if (cycle_time >= 110) {
1da177e4	219	active_time = 86;
7dd00083	220	recovery_time = cycle_time - 102;
1da177e4 LT	221	} else
	222	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	223	break;
	224	case 4:
7dd00083	225	if (cycle_time >= 69) {
1da177e4	226	active_time = 70;
7dd00083	227	recovery_time = cycle_time - 61;
1da177e4 LT	228	} else
	229	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	230	break;
	231	default:
7dd00083	232	if (cycle_time >= 180) {
1da177e4	233	active_time = 110;
7dd00083	234	recovery_time = cycle_time - 120;
1da177e4 LT	235	} else {
1da177e4 LT	236	active_time = ide_pio_timings[pio].active_time;
7dd00083	237	recovery_time = cycle_time - active_time;
1da177e4 LT	238	}
	239	}
	240	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	241	}
	242
	243	if (!HWIF(drive)->channel && drive->media != ide_disk) {
c196567a	244	outb(0x5f, QD_CONTROL_PORT);
1da177e4 LT	245	printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
	246	"and post-write buffer on %s.\n",
	247	drive->name, HWIF(drive)->name);
	248	}
	249
	250	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
	251	}
	252
	253	/*
	254	* qd_testreg
	255	*
	256	* tests if the given port is a register
	257	*/
	258
	259	static int __init qd_testreg(int port)
	260	{
1da177e4	261	unsigned long flags;
f949820d	262	u8 savereg, readreg;
1da177e4	263
c196567a	264	local_irq_save(flags);
1da177e4 LT	265	savereg = inb_p(port);
	266	outb_p(QD_TESTVAL, port); /* safe value */
	267	readreg = inb_p(port);
	268	outb(savereg, port);
c196567a	269	local_irq_restore(flags);
1da177e4 LT	270
	271	if (savereg == QD_TESTVAL) {
	272	printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
	273	printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
	274	printk(KERN_ERR "Assuming qd65xx is not present.\n");
	275	return 1;
	276	}
	277
	278	return (readreg != QD_TESTVAL);
	279	}
	280
	281	/*
	282	* qd_setup:
	283	*
	284	* called to setup an ata channel : adjusts attributes & links for tuning
	285	*/
	286
1f2cf8b0	287	static void __init qd_setup(ide_hwif_t *hwif, int base, int config)
1da177e4	288	{
1da177e4 LT	289	hwif->select_data = base;
1da177e4 LT	290	hwif->config_data = config;
1f2cf8b0 BZ	291	}
	292
	293	static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
	294	{
	295	u8 base = hwif->select_data, config = QD_CONFIG(hwif);
	296
	297	hwif->drives[0].drive_data = QD6500_DEF_DATA;
	298	hwif->drives[1].drive_data = QD6500_DEF_DATA;
	299	}
	300
	301	static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
	302	{
	303	u16 t1, t2;
	304	u8 base = hwif->select_data, config = QD_CONFIG(hwif);
	305
	306	if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
	307	t1 = QD6580_DEF_DATA;
	308	t2 = QD6580_DEF_DATA2;
	309	} else
	310	t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
	311
	312	hwif->drives[0].drive_data = t1;
	313	hwif->drives[1].drive_data = t2;
1da177e4 LT	314	}
1da177e4 LT	315
c413b9b9 BZ	316	static const struct ide_port_info qd65xx_port_info __initdata = {
	317	.chipset = ide_qd65xx,
	318	.host_flags = IDE_HFLAG_IO_32BIT \|
	319	IDE_HFLAG_NO_DMA \|
	320	IDE_HFLAG_NO_AUTOTUNE,
	321	.pio_mask = ATA_PIO4,
	322	};
	323
1da177e4 LT	324	/*
	325	* qd_probe:
	326	*
	327	* looks at the specified baseport, and if qd found, registers & initialises it
	328	* return 1 if another qd may be probed
	329	*/
	330
	331	static int __init qd_probe(int base)
	332	{
	333	ide_hwif_t *hwif;
dfd87842	334	u8 config, unit;
8447d9d5	335	u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
dfd87842	336	hw_regs_t hw[2];
e277f91f	337	struct ide_port_info d = qd65xx_port_info;
1da177e4	338
c196567a	339	config = inb(QD_CONFIG_PORT);
1da177e4 LT	340
1da177e4 LT	341	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
7daf66dd	342	return -ENODEV;
1da177e4 LT	343
	344	unit = ! (config & QD_CONFIG_IDE_BASEPORT);
	345
e277f91f BZ	346	if (unit)
	347	d.host_flags \|= IDE_HFLAG_QD_2ND_PORT;
	348
dfd87842 BZ	349	memset(&hw, 0, sizeof(hw));
	350
	351	ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
	352	hw[0].irq = 14;
	353
	354	ide_std_init_ports(&hw[1], 0x170, 0x376);
	355	hw[1].irq = 15;
	356
1da177e4 LT	357	if ((config & 0xf0) == QD_CONFIG_QD6500) {
1da177e4 LT	358
7daf66dd BZ	359	if (qd_testreg(base))
7daf66dd BZ	360	return -ENODEV; /* bad register */
1da177e4 LT	361
	362	/* qd6500 found */
	363
1da177e4 LT	364	if (config & QD_CONFIG_DISABLED) {
1da177e4 LT	365	printk(KERN_WARNING "qd6500 is disabled !\n");
7daf66dd	366	return -ENODEV;
1da177e4 LT	367	}
1da177e4 LT	368
e277f91f BZ	369	printk(KERN_NOTICE "qd6500 at %#x\n", base);
	370	printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
	371	config, QD_ID3);
	372
	373	hwif = ide_find_port_slot(&d);
	374	if (hwif == NULL)
	375	return -ENOENT;
	376
dfd87842 BZ	377	ide_init_port_hw(hwif, &hw[unit]);
dfd87842 BZ	378
1f2cf8b0	379	qd_setup(hwif, base, config);
26bcb879	380
1f2cf8b0	381	hwif->port_init_devs = qd6500_port_init_devs;
d07616f1 BZ	382	hwif->set_pio_mode = qd6500_set_pio_mode;
d07616f1 BZ	383	hwif->selectproc = qd65xx_select;
26bcb879	384
e277f91f	385	idx[unit] = hwif->index;
1da177e4	386
e277f91f	387	ide_device_add(idx, &d);
1da177e4 LT	388
	389	return 1;
	390	}
	391
	392	if (((config & 0xf0) == QD_CONFIG_QD6580_A) \|\|
	393	((config & 0xf0) == QD_CONFIG_QD6580_B)) {
	394
	395	u8 control;
	396
7daf66dd BZ	397	if (qd_testreg(base) \|\| qd_testreg(base + 0x02))
7daf66dd BZ	398	return -ENODEV; /* bad registers */
1da177e4 LT	399
	400	/* qd6580 found */
	401
c196567a	402	control = inb(QD_CONTROL_PORT);
1da177e4 LT	403
	404	printk(KERN_NOTICE "qd6580 at %#x\n", base);
	405	printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
	406	config, control, QD_ID3);
	407
788d6697 BZ	408	outb(QD_DEF_CONTR, QD_CONTROL_PORT);
788d6697 BZ	409
1da177e4 LT	410	if (control & QD_CONTR_SEC_DISABLED) {
	411	/* secondary disabled */
	412
e277f91f BZ	413	printk(KERN_INFO "qd6580: single IDE board\n");
	414
	415	hwif = ide_find_port_slot(&d);
	416	if (hwif == NULL)
	417	return -ENOENT;
26bcb879	418
dfd87842 BZ	419	ide_init_port_hw(hwif, &hw[unit]);
dfd87842 BZ	420
1f2cf8b0 BZ	421	qd_setup(hwif, base, config \| (control << 8));
	422
	423	hwif->port_init_devs = qd6580_port_init_devs;
d07616f1 BZ	424	hwif->set_pio_mode = qd6580_set_pio_mode;
d07616f1 BZ	425	hwif->selectproc = qd65xx_select;
26bcb879	426
e277f91f	427	idx[unit] = hwif->index;
26bcb879	428
e277f91f	429	ide_device_add(idx, &d);
1da177e4	430
1da177e4 LT	431	return 1;
	432	} else {
	433	ide_hwif_t *mate;
	434
1da177e4	435	/* secondary enabled */
e277f91f BZ	436	printk(KERN_INFO "qd6580: dual IDE board\n");
	437
	438	hwif = ide_find_port();
	439	if (hwif) {
	440	ide_init_port_hw(hwif, &hw[0]);
	441	qd_setup(hwif, base, config \| (control << 8));
	442	hwif->port_init_devs = qd6580_port_init_devs;
	443	hwif->set_pio_mode = qd6580_set_pio_mode;
d07616f1	444	hwif->selectproc = qd65xx_select;
e277f91f BZ	445	idx[0] = hwif->index;
	446	}
	447
	448	mate = ide_find_port();
	449	if (mate) {
	450	ide_init_port_hw(mate, &hw[1]);
	451	qd_setup(mate, base, config \| (control << 8));
	452	mate->port_init_devs = qd6580_port_init_devs;
	453	mate->set_pio_mode = qd6580_set_pio_mode;
d07616f1	454	mate->selectproc = qd65xx_select;
e277f91f BZ	455	idx[1] = mate->index;
e277f91f BZ	456	}
26bcb879	457
c413b9b9	458	ide_device_add(idx, &qd65xx_port_info);
1da177e4	459
1da177e4 LT	460	return 0; /* no other qd65xx possible */
	461	}
	462	}
	463	/* no qd65xx found */
7daf66dd	464	return -ENODEV;
1da177e4 LT	465	}
1da177e4 LT	466
84913882 BZ	467	int probe_qd65xx = 0;
	468
	469	module_param_named(probe, probe_qd65xx, bool, 0);
	470	MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
	471
ade2daf9	472	static int __init qd65xx_init(void)
1da177e4	473	{
7daf66dd BZ	474	int rc1, rc2 = -ENODEV;
7daf66dd BZ	475
84913882 BZ	476	if (probe_qd65xx == 0)
	477	return -ENODEV;
	478
7daf66dd BZ	479	rc1 = qd_probe(0x30);
	480	if (rc1)
	481	rc2 = qd_probe(0xb0);
	482
	483	if (rc1 < 0 && rc2 < 0)
1da177e4	484	return -ENODEV;
7daf66dd	485
1da177e4 LT	486	return 0;
	487	}
	488
1da177e4	489	module_init(qd65xx_init);
1da177e4 LT	490
	491	MODULE_AUTHOR("Samuel Thibault");
	492	MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
	493	MODULE_LICENSE("GPL");