[net-next-2.6.git] / drivers / ide / legacy / qd65xx.c

/*
 *  Copyright (C) 1996-2001  Linus Torvalds & author (see below)
 */

/*
 *  Version 0.03	Cleaned auto-tune, added probe
 *  Version 0.04	Added second channel tuning
 *  Version 0.05	Enhanced tuning ; added qd6500 support
 *  Version 0.06	Added dos driver's list
 *  Version 0.07	Second channel bug fix 
 *
 * QDI QD6500/QD6580 EIDE controller fast support
 *
 * Please set local bus speed using kernel parameter idebus
 * 	for example, "idebus=33" stands for 33Mhz VLbus
 * To activate controller support, use "ide0=qd65xx"
 * To enable tuning, use "hda=autotune hdb=autotune"
 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
 */

/*
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@fnac.net>
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <asm/system.h>
#include <asm/io.h>

#include "qd65xx.h"

/*
 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
 *            or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
 *	-- qd6500 is a single IDE interface
 *	-- qd6580 is a dual IDE interface
 *
 * More research on qd6580 being done by willmore@cig.mot.com (David)
 * More Information given by Petr Soucek (petr@ryston.cz)
 * http://www.ryston.cz/petr/vlb
 */

/*
 * base: Timer1
 *
 *
 * base+0x01: Config (R/O)
 *
 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
 * bit 3: qd6500: 1 = disabled, 0 = enabled
 *        qd6580: 1
 * upper nibble:
 *        qd6500: 1100
 *        qd6580: either 1010 or 0101
 *
 *
 * base+0x02: Timer2 (qd6580 only)
 *
 *
 * base+0x03: Control (qd6580 only)
 *
 * bits 0-3 must always be set 1
 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
 *         0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
 *                                                   channel 1 for hdc & hdd
 * bit 1 : 1 = only disks on primary port
 *         0 = disks & ATAPI devices on primary port
 * bit 2-4 : always 0
 * bit 5 : status, but of what ?
 * bit 6 : always set 1 by dos driver
 * bit 7 : set 1 for non-ATAPI devices on primary port
 *	(maybe read-ahead and post-write buffer ?)
 */

static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */

/*
 * qd_select:
 *
 * This routine is invoked from ide.c to prepare for access to a given drive.
 */

static void qd_select (ide_drive_t *drive)
{
	u8 index = ((	(QD_TIMREG(drive)) & 0x80 ) >> 7) |
			(QD_TIMREG(drive) & 0x02);

	if (timings[index] != QD_TIMING(drive))
		outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
}

/*
 * qd6500_compute_timing
 *
 * computes the timing value where
 *	lower nibble represents active time,   in count of VLB clocks
 *	upper nibble represents recovery time, in count of VLB clocks
 */

static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
{
	u8 active_cycle,recovery_cycle;

	if (system_bus_clock()<=33) {
		active_cycle =   9  - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 2, 9);
		recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
	} else {
		active_cycle =   8  - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 1, 8);
		recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
	}

	return((recovery_cycle<<4) | 0x08 | active_cycle);
}

/*
 * qd6580_compute_timing
 *
 * idem for qd6580
 */

static u8 qd6580_compute_timing (int active_time, int recovery_time)
{
	u8 active_cycle   = 17 - IDE_IN(active_time   * system_bus_clock() / 1000 + 1, 2, 17);
	u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);

	return((recovery_cycle<<4) | active_cycle);
}

/*
 * qd_find_disk_type
 *
 * tries to find timing from dos driver's table
 */

static int qd_find_disk_type (ide_drive_t *drive,
		int *active_time, int *recovery_time)
{
	struct qd65xx_timing_s *p;
	char model[40];

	if (!*drive->id->model) return 0;

	strncpy(model,drive->id->model,40);
	ide_fixstring(model,40,1); /* byte-swap */

	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
		if (!strncmp(p->model, model+p->offset, 4)) {
			printk(KERN_DEBUG "%s: listed !\n", drive->name);
			*active_time = p->active;
			*recovery_time = p->recovery;
			return 1;
		}
	}
	return 0;
}

/*
 * qd_timing_ok:
 *
 * check whether timings don't conflict
 */

static int qd_timing_ok (ide_drive_t drives[])
{
	return (IDE_IMPLY(drives[0].present && drives[1].present,
			IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
			          QD_TIMING(drives) == QD_TIMING(drives+1))));
	/* if same timing register, must be same timing */
}

/*
 * qd_set_timing:
 *
 * records the timing, and enables selectproc as needed
 */

static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
	ide_hwif_t *hwif = HWIF(drive);

	drive->drive_data &= 0xff00;
	drive->drive_data |= timing;
	if (qd_timing_ok(hwif->drives)) {
		qd_select(drive); /* selects once */
		hwif->selectproc = NULL;
	} else
		hwif->selectproc = &qd_select;

	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}

static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	/*
	 * FIXME: use "pio" value
	 */
	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
		&& drive->id->tPIO && (drive->id->field_valid & 0x02)
		&& drive->id->eide_pio >= 240) {

		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
				drive->id->tPIO);
		active_time = 110;
		recovery_time = drive->id->eide_pio - 120;
	}

	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
}

static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	int base = HWIF(drive)->select_data;
	unsigned int cycle_time;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
		cycle_time = ide_pio_cycle_time(drive, pio);

		switch (pio) {
			case 0: break;
			case 3:
				if (cycle_time >= 110) {
					active_time = 86;
					recovery_time = cycle_time - 102;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			case 4:
				if (cycle_time >= 69) {
					active_time = 70;
					recovery_time = cycle_time - 61;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			default:
				if (cycle_time >= 180) {
					active_time = 110;
					recovery_time = cycle_time - 120;
				} else {
					active_time = ide_pio_timings[pio].active_time;
					recovery_time = cycle_time - active_time;
				}
		}
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	}

	if (!HWIF(drive)->channel && drive->media != ide_disk) {
		outb(0x5f, QD_CONTROL_PORT);
		printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
			"and post-write buffer on %s.\n",
			drive->name, HWIF(drive)->name);
	}

	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
}

/*
 * qd_testreg
 *
 * tests if the given port is a register
 */

static int __init qd_testreg(int port)
{
	unsigned long flags;
	u8 savereg, readreg;

	local_irq_save(flags);
	savereg = inb_p(port);
	outb_p(QD_TESTVAL, port);	/* safe value */
	readreg = inb_p(port);
	outb(savereg, port);
	local_irq_restore(flags);

	if (savereg == QD_TESTVAL) {
		printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
		printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
		printk(KERN_ERR "Assuming qd65xx is not present.\n");
		return 1;
	}

	return (readreg != QD_TESTVAL);
}

/*
 * qd_setup:
 *
 * called to setup an ata channel : adjusts attributes & links for tuning
 */

static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
			    unsigned int data0, unsigned int data1)
{
	hwif->chipset = ide_qd65xx;
	hwif->channel = hwif->index;
	hwif->select_data = base;
	hwif->config_data = config;
	hwif->drives[0].drive_data = data0;
	hwif->drives[1].drive_data = data1;
	hwif->drives[0].io_32bit =
	hwif->drives[1].io_32bit = 1;
	hwif->pio_mask = ATA_PIO4;
}

/*
 * qd_unsetup:
 *
 * called to unsetup an ata channel : back to default values, unlinks tuning
 */
/*
static void __exit qd_unsetup(ide_hwif_t *hwif)
{
	u8 config = hwif->config_data;
	int base = hwif->select_data;
	void *set_pio_mode = (void *)hwif->set_pio_mode;

	if (hwif->chipset != ide_qd65xx)
		return;

	printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);

	hwif->selectproc = NULL;
	hwif->set_pio_mode = NULL;

	if (set_pio_mode == (void *)qd6500_set_pio_mode) {
		// will do it for both
		outb(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
	} else if (set_pio_mode == (void *)qd6580_set_pio_mode) {
		if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
			outb(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
			outb(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
		} else {
			outb(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
		}
	} else {
		printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
		printk(KERN_WARNING "keeping settings !\n");
	}
}
*/

/*
 * qd_probe:
 *
 * looks at the specified baseport, and if qd found, registers & initialises it
 * return 1 if another qd may be probed
 */

static int __init qd_probe(int base)
{
	ide_hwif_t *hwif;
	u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
	u8 config;
	u8 unit;

	config = inb(QD_CONFIG_PORT);

	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
		return 1;

	unit = ! (config & QD_CONFIG_IDE_BASEPORT);

	if ((config & 0xf0) == QD_CONFIG_QD6500) {

		if (qd_testreg(base)) return 1;		/* bad register */

		/* qd6500 found */

		hwif = &ide_hwifs[unit];
		printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
		printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
			config, QD_ID3);
		
		if (config & QD_CONFIG_DISABLED) {
			printk(KERN_WARNING "qd6500 is disabled !\n");
			return 1;
		}

		qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA);

		hwif->set_pio_mode = &qd6500_set_pio_mode;

		idx[0] = unit;

		ide_device_add(idx);

		return 1;
	}

	if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
	    ((config & 0xf0) == QD_CONFIG_QD6580_B)) {

		u8 control;

		if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
			/* bad registers */

		/* qd6580 found */

		control = inb(QD_CONTROL_PORT);

		printk(KERN_NOTICE "qd6580 at %#x\n", base);
		printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
			config, control, QD_ID3);

		if (control & QD_CONTR_SEC_DISABLED) {
			/* secondary disabled */

			hwif = &ide_hwifs[unit];
			printk(KERN_INFO "%s: qd6580: single IDE board\n",
					 hwif->name);
			qd_setup(hwif, base, config | (control << 8),
				 QD6580_DEF_DATA, QD6580_DEF_DATA2);

			hwif->set_pio_mode = &qd6580_set_pio_mode;

			idx[0] = unit;

			ide_device_add(idx);

			outb(QD_DEF_CONTR, QD_CONTROL_PORT);

			return 1;
		} else {
			ide_hwif_t *mate;

			hwif = &ide_hwifs[0];
			mate = &ide_hwifs[1];
			/* secondary enabled */
			printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
					hwif->name, mate->name);

			qd_setup(hwif, base, config | (control << 8),
				 QD6580_DEF_DATA, QD6580_DEF_DATA);

			hwif->set_pio_mode = &qd6580_set_pio_mode;

			qd_setup(mate, base, config | (control << 8),
				 QD6580_DEF_DATA2, QD6580_DEF_DATA2);

			mate->set_pio_mode = &qd6580_set_pio_mode;

			idx[0] = 0;
			idx[1] = 1;

			ide_device_add(idx);

			outb(QD_DEF_CONTR, QD_CONTROL_PORT);

			return 0; /* no other qd65xx possible */
		}
	}
	/* no qd65xx found */
	return 1;
}

int probe_qd65xx = 0;

module_param_named(probe, probe_qd65xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");

static int __init qd65xx_init(void)
{
	if (probe_qd65xx == 0)
		return -ENODEV;

	if (qd_probe(0x30))
		qd_probe(0xb0);
	if (ide_hwifs[0].chipset != ide_qd65xx &&
	    ide_hwifs[1].chipset != ide_qd65xx)
		return -ENODEV;
	return 0;
}

module_init(qd65xx_init);

MODULE_AUTHOR("Samuel Thibault");
MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
	3	*/
	4
	5	/*
	6	* Version 0.03 Cleaned auto-tune, added probe
	7	* Version 0.04 Added second channel tuning
	8	* Version 0.05 Enhanced tuning ; added qd6500 support
	9	* Version 0.06 Added dos driver's list
	10	* Version 0.07 Second channel bug fix
	11	*
	12	* QDI QD6500/QD6580 EIDE controller fast support
	13	*
	14	* Please set local bus speed using kernel parameter idebus
	15	* for example, "idebus=33" stands for 33Mhz VLbus
	16	* To activate controller support, use "ide0=qd65xx"
b6209a90 BZ	17	* To enable tuning, use "hda=autotune hdb=autotune"
b6209a90 BZ	18	* To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
1da177e4 LT	19	*/
	20
	21	/*
	22	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
	23	* Samuel Thibault <samuel.thibault@fnac.net>
	24	*/
	25
1da177e4	26	#include <linux/module.h>
1da177e4 LT	27	#include <linux/types.h>
	28	#include <linux/kernel.h>
	29	#include <linux/delay.h>
	30	#include <linux/timer.h>
	31	#include <linux/mm.h>
	32	#include <linux/ioport.h>
	33	#include <linux/blkdev.h>
	34	#include <linux/hdreg.h>
	35	#include <linux/ide.h>
	36	#include <linux/init.h>
	37	#include <asm/system.h>
	38	#include <asm/io.h>
	39
	40	#include "qd65xx.h"
	41
	42	/*
	43	* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
	44	* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
	45	* -- qd6500 is a single IDE interface
	46	* -- qd6580 is a dual IDE interface
	47	*
	48	* More research on qd6580 being done by willmore@cig.mot.com (David)
	49	* More Information given by Petr Soucek (petr@ryston.cz)
	50	* http://www.ryston.cz/petr/vlb
	51	*/
	52
	53	/*
	54	* base: Timer1
	55	*
	56	*
	57	* base+0x01: Config (R/O)
	58	*
	59	* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
	60	* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
	61	* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
	62	* bit 3: qd6500: 1 = disabled, 0 = enabled
	63	* qd6580: 1
	64	* upper nibble:
	65	* qd6500: 1100
	66	* qd6580: either 1010 or 0101
	67	*
	68	*
	69	* base+0x02: Timer2 (qd6580 only)
	70	*
	71	*
	72	* base+0x03: Control (qd6580 only)
	73	*
	74	* bits 0-3 must always be set 1
	75	* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
	76	* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
	77	* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
	78	* channel 1 for hdc & hdd
	79	* bit 1 : 1 = only disks on primary port
	80	* 0 = disks & ATAPI devices on primary port
	81	* bit 2-4 : always 0
	82	* bit 5 : status, but of what ?
	83	* bit 6 : always set 1 by dos driver
	84	* bit 7 : set 1 for non-ATAPI devices on primary port
	85	* (maybe read-ahead and post-write buffer ?)
	86	*/
	87
	88	static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
	89
1da177e4 LT	90	/*
	91	* qd_select:
	92	*
	93	* This routine is invoked from ide.c to prepare for access to a given drive.
	94	*/
	95
	96	static void qd_select (ide_drive_t *drive)
	97	{
	98	u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) \|
	99	(QD_TIMREG(drive) & 0x02);
	100
	101	if (timings[index] != QD_TIMING(drive))
c196567a	102	outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
1da177e4 LT	103	}
	104
	105	/*
	106	* qd6500_compute_timing
	107	*
	108	* computes the timing value where
	109	* lower nibble represents active time, in count of VLB clocks
	110	* upper nibble represents recovery time, in count of VLB clocks
	111	*/
	112
	113	static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
	114	{
	115	u8 active_cycle,recovery_cycle;
	116
	117	if (system_bus_clock()<=33) {
	118	active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
	119	recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
	120	} else {
	121	active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
	122	recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
	123	}
	124
	125	return((recovery_cycle<<4) \| 0x08 \| active_cycle);
	126	}
	127
	128	/*
	129	* qd6580_compute_timing
	130	*
	131	* idem for qd6580
	132	*/
	133
	134	static u8 qd6580_compute_timing (int active_time, int recovery_time)
	135	{
	136	u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
	137	u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
	138
	139	return((recovery_cycle<<4) \| active_cycle);
	140	}
	141
	142	/*
	143	* qd_find_disk_type
	144	*
	145	* tries to find timing from dos driver's table
	146	*/
	147
	148	static int qd_find_disk_type (ide_drive_t *drive,
	149	int active_time, int recovery_time)
	150	{
	151	struct qd65xx_timing_s *p;
	152	char model[40];
	153
	154	if (!*drive->id->model) return 0;
	155
	156	strncpy(model,drive->id->model,40);
	157	ide_fixstring(model,40,1); /* byte-swap */
	158
	159	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
	160	if (!strncmp(p->model, model+p->offset, 4)) {
	161	printk(KERN_DEBUG "%s: listed !\n", drive->name);
	162	*active_time = p->active;
	163	*recovery_time = p->recovery;
	164	return 1;
	165	}
	166	}
167	return 0;
168	}
169
170	/*
171	* qd_timing_ok:
172	*
173	* check whether timings don't conflict
174	*/
175
176	static int qd_timing_ok (ide_drive_t drives[])
177	{
178	return (IDE_IMPLY(drives[0].present && drives[1].present,
179	IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
180	QD_TIMING(drives) == QD_TIMING(drives+1))));
181	/* if same timing register, must be same timing */
182	}
183
184	/*
185	* qd_set_timing:
186	*
187	* records the timing, and enables selectproc as needed
188	*/
189
190	static void qd_set_timing (ide_drive_t *drive, u8 timing)
191	{
192	ide_hwif_t *hwif = HWIF(drive);
193
194	drive->drive_data &= 0xff00;
195	drive->drive_data \|= timing;
196	if (qd_timing_ok(hwif->drives)) {
197	qd_select(drive); /* selects once */
198	hwif->selectproc = NULL;
199	} else
200	hwif->selectproc = &qd_select;
201
202	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
203	}
204
26bcb879	205	static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4 LT	206	{
	207	int active_time = 175;
	208	int recovery_time = 415; /* worst case values from the dos driver */
	209
26bcb879 BZ	210	/*
	211	* FIXME: use "pio" value
	212	*/
1da177e4 LT	213	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
	214	&& drive->id->tPIO && (drive->id->field_valid & 0x02)
	215	&& drive->id->eide_pio >= 240) {
	216
	217	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
	218	drive->id->tPIO);
	219	active_time = 110;
	220	recovery_time = drive->id->eide_pio - 120;
	221	}
	222
	223	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
	224	}
	225
26bcb879	226	static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4	227	{
1da177e4	228	int base = HWIF(drive)->select_data;
7dd00083	229	unsigned int cycle_time;
1da177e4 LT	230	int active_time = 175;
	231	int recovery_time = 415; /* worst case values from the dos driver */
	232
	233	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
7dd00083	234	cycle_time = ide_pio_cycle_time(drive, pio);
1da177e4 LT	235
	236	switch (pio) {
	237	case 0: break;
	238	case 3:
7dd00083	239	if (cycle_time >= 110) {
1da177e4	240	active_time = 86;
7dd00083	241	recovery_time = cycle_time - 102;
1da177e4 LT	242	} else
	243	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	244	break;
	245	case 4:
7dd00083	246	if (cycle_time >= 69) {
1da177e4	247	active_time = 70;
7dd00083	248	recovery_time = cycle_time - 61;
1da177e4 LT	249	} else
	250	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	251	break;
	252	default:
7dd00083	253	if (cycle_time >= 180) {
1da177e4	254	active_time = 110;
7dd00083	255	recovery_time = cycle_time - 120;
1da177e4 LT	256	} else {
1da177e4 LT	257	active_time = ide_pio_timings[pio].active_time;
7dd00083	258	recovery_time = cycle_time - active_time;
1da177e4 LT	259	}
	260	}
	261	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	262	}
	263
	264	if (!HWIF(drive)->channel && drive->media != ide_disk) {
c196567a	265	outb(0x5f, QD_CONTROL_PORT);
1da177e4 LT	266	printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
	267	"and post-write buffer on %s.\n",
	268	drive->name, HWIF(drive)->name);
	269	}
	270
	271	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
	272	}
	273
	274	/*
	275	* qd_testreg
	276	*
	277	* tests if the given port is a register
	278	*/
	279
	280	static int __init qd_testreg(int port)
	281	{
1da177e4	282	unsigned long flags;
f949820d	283	u8 savereg, readreg;
1da177e4	284
c196567a	285	local_irq_save(flags);
1da177e4 LT	286	savereg = inb_p(port);
	287	outb_p(QD_TESTVAL, port); /* safe value */
	288	readreg = inb_p(port);
	289	outb(savereg, port);
c196567a	290	local_irq_restore(flags);
1da177e4 LT	291
	292	if (savereg == QD_TESTVAL) {
	293	printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
	294	printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
	295	printk(KERN_ERR "Assuming qd65xx is not present.\n");
	296	return 1;
	297	}
	298
	299	return (readreg != QD_TESTVAL);
	300	}
	301
	302	/*
	303	* qd_setup:
	304	*
	305	* called to setup an ata channel : adjusts attributes & links for tuning
	306	*/
	307
	308	static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
26bcb879	309	unsigned int data0, unsigned int data1)
1da177e4 LT	310	{
	311	hwif->chipset = ide_qd65xx;
	312	hwif->channel = hwif->index;
	313	hwif->select_data = base;
	314	hwif->config_data = config;
	315	hwif->drives[0].drive_data = data0;
	316	hwif->drives[1].drive_data = data1;
	317	hwif->drives[0].io_32bit =
	318	hwif->drives[1].io_32bit = 1;
4099d143	319	hwif->pio_mask = ATA_PIO4;
1da177e4 LT	320	}
	321
	322	/*
	323	* qd_unsetup:
	324	*
	325	* called to unsetup an ata channel : back to default values, unlinks tuning
	326	*/
	327	/*
	328	static void __exit qd_unsetup(ide_hwif_t *hwif)
	329	{
	330	u8 config = hwif->config_data;
	331	int base = hwif->select_data;
26bcb879	332	void set_pio_mode = (void )hwif->set_pio_mode;
1da177e4 LT	333
	334	if (hwif->chipset != ide_qd65xx)
	335	return;
	336
	337	printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
	338
	339	hwif->selectproc = NULL;
26bcb879	340	hwif->set_pio_mode = NULL;
1da177e4	341
26bcb879	342	if (set_pio_mode == (void *)qd6500_set_pio_mode) {
1da177e4	343	// will do it for both
c196567a	344	outb(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
26bcb879	345	} else if (set_pio_mode == (void *)qd6580_set_pio_mode) {
1da177e4	346	if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
c196567a BZ	347	outb(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
c196567a BZ	348	outb(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
1da177e4	349	} else {
c196567a	350	outb(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
1da177e4 LT	351	}
	352	} else {
	353	printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
	354	printk(KERN_WARNING "keeping settings !\n");
	355	}
	356	}
	357	*/
	358
	359	/*
	360	* qd_probe:
	361	*
	362	* looks at the specified baseport, and if qd found, registers & initialises it
	363	* return 1 if another qd may be probed
	364	*/
	365
	366	static int __init qd_probe(int base)
	367	{
	368	ide_hwif_t *hwif;
8447d9d5	369	u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
1da177e4 LT	370	u8 config;
	371	u8 unit;
	372
c196567a	373	config = inb(QD_CONFIG_PORT);
1da177e4 LT	374
	375	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
	376	return 1;
	377
	378	unit = ! (config & QD_CONFIG_IDE_BASEPORT);
	379
	380	if ((config & 0xf0) == QD_CONFIG_QD6500) {
	381
	382	if (qd_testreg(base)) return 1; /* bad register */
	383
	384	/* qd6500 found */
	385
	386	hwif = &ide_hwifs[unit];
	387	printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
	388	printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
	389	config, QD_ID3);
	390
	391	if (config & QD_CONFIG_DISABLED) {
	392	printk(KERN_WARNING "qd6500 is disabled !\n");
	393	return 1;
	394	}
	395
26bcb879 BZ	396	qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA);
	397
	398	hwif->set_pio_mode = &qd6500_set_pio_mode;
	399
8447d9d5	400	idx[0] = unit;
1da177e4	401
8447d9d5	402	ide_device_add(idx);
1da177e4 LT	403
	404	return 1;
	405	}
	406
	407	if (((config & 0xf0) == QD_CONFIG_QD6580_A) \|\|
	408	((config & 0xf0) == QD_CONFIG_QD6580_B)) {
	409
	410	u8 control;
	411
	412	if (qd_testreg(base) \|\| qd_testreg(base+0x02)) return 1;
	413	/* bad registers */
	414
	415	/* qd6580 found */
	416
c196567a	417	control = inb(QD_CONTROL_PORT);
1da177e4 LT	418
	419	printk(KERN_NOTICE "qd6580 at %#x\n", base);
	420	printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
	421	config, control, QD_ID3);
	422
	423	if (control & QD_CONTR_SEC_DISABLED) {
	424	/* secondary disabled */
	425
	426	hwif = &ide_hwifs[unit];
	427	printk(KERN_INFO "%s: qd6580: single IDE board\n",
	428	hwif->name);
	429	qd_setup(hwif, base, config \| (control << 8),
26bcb879 BZ	430	QD6580_DEF_DATA, QD6580_DEF_DATA2);
	431
	432	hwif->set_pio_mode = &qd6580_set_pio_mode;
	433
8447d9d5	434	idx[0] = unit;
26bcb879	435
8447d9d5	436	ide_device_add(idx);
1da177e4	437
c196567a	438	outb(QD_DEF_CONTR, QD_CONTROL_PORT);
1da177e4 LT	439
	440	return 1;
	441	} else {
	442	ide_hwif_t *mate;
	443
	444	hwif = &ide_hwifs[0];
	445	mate = &ide_hwifs[1];
	446	/* secondary enabled */
	447	printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
	448	hwif->name, mate->name);
	449
	450	qd_setup(hwif, base, config \| (control << 8),
26bcb879 BZ	451	QD6580_DEF_DATA, QD6580_DEF_DATA);
	452
	453	hwif->set_pio_mode = &qd6580_set_pio_mode;
	454
1da177e4	455	qd_setup(mate, base, config \| (control << 8),
26bcb879 BZ	456	QD6580_DEF_DATA2, QD6580_DEF_DATA2);
	457
	458	mate->set_pio_mode = &qd6580_set_pio_mode;
	459
8447d9d5 BZ	460	idx[0] = 0;
8447d9d5 BZ	461	idx[1] = 1;
26bcb879	462
8447d9d5	463	ide_device_add(idx);
1da177e4	464
c196567a	465	outb(QD_DEF_CONTR, QD_CONTROL_PORT);
1da177e4 LT	466
	467	return 0; /* no other qd65xx possible */
	468	}
	469	}
	470	/* no qd65xx found */
	471	return 1;
	472	}
	473
84913882 BZ	474	int probe_qd65xx = 0;
	475
	476	module_param_named(probe, probe_qd65xx, bool, 0);
	477	MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
	478
ade2daf9	479	static int __init qd65xx_init(void)
1da177e4	480	{
84913882 BZ	481	if (probe_qd65xx == 0)
	482	return -ENODEV;
	483
1da177e4 LT	484	if (qd_probe(0x30))
	485	qd_probe(0xb0);
	486	if (ide_hwifs[0].chipset != ide_qd65xx &&
	487	ide_hwifs[1].chipset != ide_qd65xx)
	488	return -ENODEV;
	489	return 0;
	490	}
	491
1da177e4	492	module_init(qd65xx_init);
1da177e4 LT	493
	494	MODULE_AUTHOR("Samuel Thibault");
	495	MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
	496	MODULE_LICENSE("GPL");