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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[net-next-2.6.git] / drivers / i2c / busses / i2c-s3c2410.c
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1da177e4
LT		 1/* linux/drivers/i2c/busses/i2c-s3c2410.c
2 *
3 * Copyright (C) 2004,2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 I2C Controller
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21*/
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25
26#include <linux/i2c.h>
27#include <linux/i2c-id.h>
28#include <linux/init.h>
29#include <linux/time.h>
30#include <linux/interrupt.h>
31#include <linux/sched.h>
32#include <linux/delay.h>
33#include <linux/errno.h>
34#include <linux/err.h>
d052d1be 35#include <linux/platform_device.h>
f8ce2547 36#include <linux/clk.h>
1da177e4
LT		 37
38#include <asm/hardware.h>
39#include <asm/irq.h>
40#include <asm/io.h>
41
1da177e4
LT		 42#include <asm/arch/regs-gpio.h>
43#include <asm/arch/regs-iic.h>
44#include <asm/arch/iic.h>
45
46/* i2c controller state */
47
48enum s3c24xx_i2c_state {
49 STATE_IDLE,
50 STATE_START,
51 STATE_READ,
52 STATE_WRITE,
53 STATE_STOP
54};
55
56struct s3c24xx_i2c {
57 spinlock_t lock;
58 wait_queue_head_t wait;
59
60 struct i2c_msg *msg;
61 unsigned int msg_num;
62 unsigned int msg_idx;
63 unsigned int msg_ptr;
64
65 enum s3c24xx_i2c_state state;
66
67 void __iomem *regs;
68 struct clk *clk;
69 struct device *dev;
70 struct resource *irq;
71 struct resource *ioarea;
72 struct i2c_adapter adap;
73};
74
75/* default platform data to use if not supplied in the platform_device
76*/
77
78static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {
79 .flags = 0,
80 .slave_addr = 0x10,
81 .bus_freq = 100*1000,
82 .max_freq = 400*1000,
83 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
84};
85
86/* s3c24xx_i2c_is2440()
87 *
88 * return true is this is an s3c2440
89*/
90
91static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
92{
93 struct platform_device *pdev = to_platform_device(i2c->dev);
94
95 return !strcmp(pdev->name, "s3c2440-i2c");
96}
97
98
99/* s3c24xx_i2c_get_platformdata
100 *
101 * get the platform data associated with the given device, or return
102 * the default if there is none
103*/
104
105static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)
106{
107 if (dev->platform_data != NULL)
108 return (struct s3c2410_platform_i2c *)dev->platform_data;
109
110 return &s3c24xx_i2c_default_platform;
111}
112
113/* s3c24xx_i2c_master_complete
114 *
115 * complete the message and wake up the caller, using the given return code,
116 * or zero to mean ok.
117*/
118
119static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
120{
121 dev_dbg(i2c->dev, "master_complete %d\n", ret);
122
123 i2c->msg_ptr = 0;
124 i2c->msg = NULL;
125 i2c->msg_idx ++;
126 i2c->msg_num = 0;
127 if (ret)
128 i2c->msg_idx = ret;
129
130 wake_up(&i2c->wait);
131}
132
133static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
134{
135 unsigned long tmp;
136
137 tmp = readl(i2c->regs + S3C2410_IICCON);
138 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
139
140}
141
142static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
143{
144 unsigned long tmp;
145
146 tmp = readl(i2c->regs + S3C2410_IICCON);
147 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
148
149}
150
151/* irq enable/disable functions */
152
153static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
154{
155 unsigned long tmp;
156
157 tmp = readl(i2c->regs + S3C2410_IICCON);
158 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
159}
160
161static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
162{
163 unsigned long tmp;
164
165 tmp = readl(i2c->regs + S3C2410_IICCON);
166 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
167}
168
169
170/* s3c24xx_i2c_message_start
171 *
172 * put the start of a message onto the bus
173*/
174
175static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
176 struct i2c_msg *msg)
177{
178 unsigned int addr = (msg->addr & 0x7f) << 1;
179 unsigned long stat;
180 unsigned long iiccon;
181
182 stat = 0;
183 stat |= S3C2410_IICSTAT_TXRXEN;
184
185 if (msg->flags & I2C_M_RD) {
186 stat |= S3C2410_IICSTAT_MASTER_RX;
187 addr |= 1;
188 } else
189 stat |= S3C2410_IICSTAT_MASTER_TX;
190
191 if (msg->flags & I2C_M_REV_DIR_ADDR)
192 addr ^= 1;
193
194 // todo - check for wether ack wanted or not
195 s3c24xx_i2c_enable_ack(i2c);
196
197 iiccon = readl(i2c->regs + S3C2410_IICCON);
198 writel(stat, i2c->regs + S3C2410_IICSTAT);
199
200 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
201 writeb(addr, i2c->regs + S3C2410_IICDS);
202
203 // delay a bit and reset iiccon before setting start (per samsung)
204 udelay(1);
205 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
206 writel(iiccon, i2c->regs + S3C2410_IICCON);
207
208 stat |= S3C2410_IICSTAT_START;
209 writel(stat, i2c->regs + S3C2410_IICSTAT);
210}
211
212static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
213{
214 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
215
216 dev_dbg(i2c->dev, "STOP\n");
217
218 /* stop the transfer */
219 iicstat &= ~ S3C2410_IICSTAT_START;
220 writel(iicstat, i2c->regs + S3C2410_IICSTAT);
221
222 i2c->state = STATE_STOP;
223
224 s3c24xx_i2c_master_complete(i2c, ret);
225 s3c24xx_i2c_disable_irq(i2c);
226}
227
228/* helper functions to determine the current state in the set of
229 * messages we are sending */
230
231/* is_lastmsg()
232 *
233 * returns TRUE if the current message is the last in the set
234*/
235
236static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
237{
238 return i2c->msg_idx >= (i2c->msg_num - 1);
239}
240
241/* is_msglast
242 *
243 * returns TRUE if we this is the last byte in the current message
244*/
245
246static inline int is_msglast(struct s3c24xx_i2c *i2c)
247{
248 return i2c->msg_ptr == i2c->msg->len-1;
249}
250
251/* is_msgend
252 *
253 * returns TRUE if we reached the end of the current message
254*/
255
256static inline int is_msgend(struct s3c24xx_i2c *i2c)
257{
258 return i2c->msg_ptr >= i2c->msg->len;
259}
260
261/* i2s_s3c_irq_nextbyte
262 *
263 * process an interrupt and work out what to do
264 */
265
266static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
267{
268 unsigned long tmp;
269 unsigned char byte;
270 int ret = 0;
271
272 switch (i2c->state) {
273
274 case STATE_IDLE:
275 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);
276 goto out;
277 break;
278
279 case STATE_STOP:
280 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
281 s3c24xx_i2c_disable_irq(i2c);
282 goto out_ack;
283
284 case STATE_START:
285 /* last thing we did was send a start condition on the
286 * bus, or started a new i2c message
287 */
288
289 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
290 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
291 /* ack was not received... */
292
293 dev_dbg(i2c->dev, "ack was not received\n");
294 s3c24xx_i2c_stop(i2c, -EREMOTEIO);
295 goto out_ack;
296 }
297
298 if (i2c->msg->flags & I2C_M_RD)
299 i2c->state = STATE_READ;
300 else
301 i2c->state = STATE_WRITE;
302
303 /* terminate the transfer if there is nothing to do
304 * (used by the i2c probe to find devices */
305
306 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
307 s3c24xx_i2c_stop(i2c, 0);
308 goto out_ack;
309 }
310
311 if (i2c->state == STATE_READ)
312 goto prepare_read;
313
314 /* fall through to the write state, as we will need to
315 * send a byte as well */
316
317 case STATE_WRITE:
318 /* we are writing data to the device... check for the
319 * end of the message, and if so, work out what to do
320 */
321
322 retry_write:
323 if (!is_msgend(i2c)) {
324 byte = i2c->msg->buf[i2c->msg_ptr++];
325 writeb(byte, i2c->regs + S3C2410_IICDS);
326
327 } else if (!is_lastmsg(i2c)) {
328 /* we need to go to the next i2c message */
329
330 dev_dbg(i2c->dev, "WRITE: Next Message\n");
331
332 i2c->msg_ptr = 0;
333 i2c->msg_idx ++;
334 i2c->msg++;
335
336 /* check to see if we need to do another message */
337 if (i2c->msg->flags & I2C_M_NOSTART) {
338
339 if (i2c->msg->flags & I2C_M_RD) {
340 /* cannot do this, the controller
341 * forces us to send a new START
342 * when we change direction */
343
344 s3c24xx_i2c_stop(i2c, -EINVAL);
345 }
346
347 goto retry_write;
348 } else {
349
350 /* send the new start */
351 s3c24xx_i2c_message_start(i2c, i2c->msg);
352 i2c->state = STATE_START;
353 }
354
355 } else {
356 /* send stop */
357
358 s3c24xx_i2c_stop(i2c, 0);
359 }
360 break;
361
362 case STATE_READ:
363 /* we have a byte of data in the data register, do
364 * something with it, and then work out wether we are
365 * going to do any more read/write
366 */
367
368 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&
369 !(is_msglast(i2c) && is_lastmsg(i2c))) {
370
371 if (iicstat & S3C2410_IICSTAT_LASTBIT) {
372 dev_dbg(i2c->dev, "READ: No Ack\n");
373
374 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
375 goto out_ack;
376 }
377 }
378
379 byte = readb(i2c->regs + S3C2410_IICDS);
380 i2c->msg->buf[i2c->msg_ptr++] = byte;
381
382 prepare_read:
383 if (is_msglast(i2c)) {
384 /* last byte of buffer */
385
386 if (is_lastmsg(i2c))
387 s3c24xx_i2c_disable_ack(i2c);
388
389 } else if (is_msgend(i2c)) {
390 /* ok, we've read the entire buffer, see if there
391 * is anything else we need to do */
392
393 if (is_lastmsg(i2c)) {
394 /* last message, send stop and complete */
395 dev_dbg(i2c->dev, "READ: Send Stop\n");
396
397 s3c24xx_i2c_stop(i2c, 0);
398 } else {
399 /* go to the next transfer */
400 dev_dbg(i2c->dev, "READ: Next Transfer\n");
401
402 i2c->msg_ptr = 0;
403 i2c->msg_idx++;
404 i2c->msg++;
405 }
406 }
407
408 break;
409 }
410
411 /* acknowlegde the IRQ and get back on with the work */
412
413 out_ack:
414 tmp = readl(i2c->regs + S3C2410_IICCON);
415 tmp &= ~S3C2410_IICCON_IRQPEND;
416 writel(tmp, i2c->regs + S3C2410_IICCON);
417 out:
418 return ret;
419}
420
421/* s3c24xx_i2c_irq
422 *
423 * top level IRQ servicing routine
424*/
425
7d12e780 426static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
1da177e4
LT		 427{
428 struct s3c24xx_i2c *i2c = dev_id;
429 unsigned long status;
430 unsigned long tmp;
431
432 status = readl(i2c->regs + S3C2410_IICSTAT);
433
434 if (status & S3C2410_IICSTAT_ARBITR) {
435 // deal with arbitration loss
436 dev_err(i2c->dev, "deal with arbitration loss\n");
437 }
438
439 if (i2c->state == STATE_IDLE) {
440 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
441
442 tmp = readl(i2c->regs + S3C2410_IICCON);
443 tmp &= ~S3C2410_IICCON_IRQPEND;
444 writel(tmp, i2c->regs + S3C2410_IICCON);
445 goto out;
446 }
447
448 /* pretty much this leaves us with the fact that we've
449 * transmitted or received whatever byte we last sent */
450
451 i2s_s3c_irq_nextbyte(i2c, status);
452
453 out:
454 return IRQ_HANDLED;
455}
456
457
458/* s3c24xx_i2c_set_master
459 *
460 * get the i2c bus for a master transaction
461*/
462
463static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
464{
465 unsigned long iicstat;
466 int timeout = 400;
467
468 while (timeout-- > 0) {
469 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
470
471 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
472 return 0;
473
474 msleep(1);
475 }
476
477 dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",
478 __raw_readl(S3C2410_GPEDAT));
479
480 return -ETIMEDOUT;
481}
482
483/* s3c24xx_i2c_doxfer
484 *
485 * this starts an i2c transfer
486*/
487
488static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)
489{
490 unsigned long timeout;
491 int ret;
492
493 ret = s3c24xx_i2c_set_master(i2c);
494 if (ret != 0) {
495 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
496 ret = -EAGAIN;
497 goto out;
498 }
499
500 spin_lock_irq(&i2c->lock);
501
502 i2c->msg = msgs;
503 i2c->msg_num = num;
504 i2c->msg_ptr = 0;
505 i2c->msg_idx = 0;
506 i2c->state = STATE_START;
507
508 s3c24xx_i2c_enable_irq(i2c);
509 s3c24xx_i2c_message_start(i2c, msgs);
510 spin_unlock_irq(&i2c->lock);
511
512 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
513
514 ret = i2c->msg_idx;
515
516 /* having these next two as dev_err() makes life very
517 * noisy when doing an i2cdetect */
518
519 if (timeout == 0)
520 dev_dbg(i2c->dev, "timeout\n");
521 else if (ret != num)
522 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
523
524 /* ensure the stop has been through the bus */
525
526 msleep(1);
527
528 out:
529 return ret;
530}
531
532/* s3c24xx_i2c_xfer
533 *
534 * first port of call from the i2c bus code when an message needs
44bbe87e 535 * transferring across the i2c bus.
1da177e4
LT		 536*/
537
538static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
539 struct i2c_msg *msgs, int num)
540{
541 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
542 int retry;
543 int ret;
544
545 for (retry = 0; retry < adap->retries; retry++) {
546
547 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
548
549 if (ret != -EAGAIN)
550 return ret;
551
552 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
553
554 udelay(100);
555 }
556
557 return -EREMOTEIO;
558}
559
560/* declare our i2c functionality */
561static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
562{
563 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
564}
565
566/* i2c bus registration info */
567
8f9082c5 568static const struct i2c_algorithm s3c24xx_i2c_algorithm = {
1da177e4
LT		 569 .master_xfer = s3c24xx_i2c_xfer,
570 .functionality = s3c24xx_i2c_func,
571};
572
573static struct s3c24xx_i2c s3c24xx_i2c = {
574 .lock = SPIN_LOCK_UNLOCKED,
575 .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),
576 .adap = {
577 .name = "s3c2410-i2c",
578 .owner = THIS_MODULE,
579 .algo = &s3c24xx_i2c_algorithm,
580 .retries = 2,
581 .class = I2C_CLASS_HWMON,
582 },
583};
584
585/* s3c24xx_i2c_calcdivisor
586 *
587 * return the divisor settings for a given frequency
588*/
589
590static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
591 unsigned int *div1, unsigned int *divs)
592{
593 unsigned int calc_divs = clkin / wanted;
594 unsigned int calc_div1;
595
596 if (calc_divs > (16*16))
597 calc_div1 = 512;
598 else
599 calc_div1 = 16;
600
601 calc_divs += calc_div1-1;
602 calc_divs /= calc_div1;
603
604 if (calc_divs == 0)
605 calc_divs = 1;
606 if (calc_divs > 17)
607 calc_divs = 17;
608
609 *divs = calc_divs;
610 *div1 = calc_div1;
611
612 return clkin / (calc_divs * calc_div1);
613}
614
615/* freq_acceptable
616 *
617 * test wether a frequency is within the acceptable range of error
618*/
619
620static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
621{
622 int diff = freq - wanted;
623
624 return (diff >= -2 && diff <= 2);
625}
626
627/* s3c24xx_i2c_getdivisor
628 *
629 * work out a divisor for the user requested frequency setting,
630 * either by the requested frequency, or scanning the acceptable
631 * range of frequencies until something is found
632*/
633
634static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
635 struct s3c2410_platform_i2c *pdata,
636 unsigned long *iicon,
637 unsigned int *got)
638{
639 unsigned long clkin = clk_get_rate(i2c->clk);
640
641 unsigned int divs, div1;
642 int freq;
643 int start, end;
644
645 clkin /= 1000; /* clkin now in KHz */
646
647 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
648 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
649
650 if (pdata->bus_freq != 0) {
651 freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
652 &div1, &divs);
653 if (freq_acceptable(freq, pdata->bus_freq/1000))
654 goto found;
655 }
656
657 /* ok, we may have to search for something suitable... */
658
659 start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
660 end = pdata->min_freq;
661
662 start /= 1000;
663 end /= 1000;
664
665 /* search loop... */
666
667 for (; start > end; start--) {
668 freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
669 if (freq_acceptable(freq, start))
670 goto found;
671 }
672
673 /* cannot find frequency spec */
674
675 return -EINVAL;
676
677 found:
678 *got = freq;
679 *iicon |= (divs-1);
680 *iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
681 return 0;
682}
683
684/* s3c24xx_i2c_init
685 *
686 * initialise the controller, set the IO lines and frequency
687*/
688
689static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
690{
691 unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
692 struct s3c2410_platform_i2c *pdata;
693 unsigned int freq;
694
695 /* get the plafrom data */
696
697 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
698
699 /* inititalise the gpio */
700
701 s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
702 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
703
704 /* write slave address */
705
706 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
707
708 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
709
710 /* we need to work out the divisors for the clock... */
711
712 if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
713 dev_err(i2c->dev, "cannot meet bus frequency required\n");
714 return -EINVAL;
715 }
716
717 /* todo - check that the i2c lines aren't being dragged anywhere */
718
719 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
720 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
721
722 writel(iicon, i2c->regs + S3C2410_IICCON);
723
724 /* check for s3c2440 i2c controller */
725
726 if (s3c24xx_i2c_is2440(i2c)) {
727 dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
728
729 writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
730 }
731
732 return 0;
733}
734
735static void s3c24xx_i2c_free(struct s3c24xx_i2c *i2c)
736{
737 if (i2c->clk != NULL && !IS_ERR(i2c->clk)) {
738 clk_disable(i2c->clk);
1da177e4
LT		 739 clk_put(i2c->clk);
740 i2c->clk = NULL;
741 }
742
743 if (i2c->regs != NULL) {
744 iounmap(i2c->regs);
745 i2c->regs = NULL;
746 }
747
748 if (i2c->ioarea != NULL) {
749 release_resource(i2c->ioarea);
750 kfree(i2c->ioarea);
751 i2c->ioarea = NULL;
752 }
753}
754
755/* s3c24xx_i2c_probe
756 *
757 * called by the bus driver when a suitable device is found
758*/
759
3ae5eaec 760static int s3c24xx_i2c_probe(struct platform_device *pdev)
1da177e4 761{
1da177e4
LT		 762 struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
763 struct resource *res;
764 int ret;
765
766 /* find the clock and enable it */
767
3ae5eaec
RK		 768 i2c->dev = &pdev->dev;
769 i2c->clk = clk_get(&pdev->dev, "i2c");
1da177e4 770 if (IS_ERR(i2c->clk)) {
3ae5eaec 771 dev_err(&pdev->dev, "cannot get clock\n");
1da177e4
LT		 772 ret = -ENOENT;
773 goto out;
774 }
775
3ae5eaec 776 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
1da177e4 777
1da177e4
LT		 778 clk_enable(i2c->clk);
779
780 /* map the registers */
781
782 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
783 if (res == NULL) {
3ae5eaec 784 dev_err(&pdev->dev, "cannot find IO resource\n");
1da177e4
LT		 785 ret = -ENOENT;
786 goto out;
787 }
788
789 i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
790 pdev->name);
791
792 if (i2c->ioarea == NULL) {
3ae5eaec 793 dev_err(&pdev->dev, "cannot request IO\n");
1da177e4
LT		 794 ret = -ENXIO;
795 goto out;
796 }
797
798 i2c->regs = ioremap(res->start, (res->end-res->start)+1);
799
800 if (i2c->regs == NULL) {
3ae5eaec 801 dev_err(&pdev->dev, "cannot map IO\n");
1da177e4
LT		 802 ret = -ENXIO;
803 goto out;
804 }
805
3ae5eaec 806 dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);
1da177e4
LT		 807
808 /* setup info block for the i2c core */
809
810 i2c->adap.algo_data = i2c;
3ae5eaec 811 i2c->adap.dev.parent = &pdev->dev;
1da177e4
LT		 812
813 /* initialise the i2c controller */
814
815 ret = s3c24xx_i2c_init(i2c);
816 if (ret != 0)
817 goto out;
818
819 /* find the IRQ for this unit (note, this relies on the init call to
820 * ensure no current IRQs pending
821 */
822
823 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
824 if (res == NULL) {
3ae5eaec 825 dev_err(&pdev->dev, "cannot find IRQ\n");
1da177e4
LT		 826 ret = -ENOENT;
827 goto out;
828 }
829
dace1453 830 ret = request_irq(res->start, s3c24xx_i2c_irq, IRQF_DISABLED,
1da177e4
LT		 831 pdev->name, i2c);
832
833 if (ret != 0) {
3ae5eaec 834 dev_err(&pdev->dev, "cannot claim IRQ\n");
1da177e4
LT		 835 goto out;
836 }
837
838 i2c->irq = res;
839
3ae5eaec 840 dev_dbg(&pdev->dev, "irq resource %p (%ld)\n", res, res->start);
1da177e4
LT		 841
842 ret = i2c_add_adapter(&i2c->adap);
843 if (ret < 0) {
3ae5eaec 844 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
1da177e4
LT		 845 goto out;
846 }
847
3ae5eaec 848 platform_set_drvdata(pdev, i2c);
1da177e4 849
3ae5eaec 850 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
1da177e4
LT		 851
852 out:
853 if (ret < 0)
854 s3c24xx_i2c_free(i2c);
855
856 return ret;
857}
858
859/* s3c24xx_i2c_remove
860 *
861 * called when device is removed from the bus
862*/
863
3ae5eaec 864static int s3c24xx_i2c_remove(struct platform_device *pdev)
1da177e4 865{
3ae5eaec 866 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1da177e4
LT		 867
868 if (i2c != NULL) {
869 s3c24xx_i2c_free(i2c);
3ae5eaec 870 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 871 }
872
873 return 0;
874}
875
876#ifdef CONFIG_PM
3ae5eaec 877static int s3c24xx_i2c_resume(struct platform_device *dev)
1da177e4 878{
3ae5eaec 879 struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
9480e307
RK		 880
881 if (i2c != NULL)
1da177e4 882 s3c24xx_i2c_init(i2c);
1da177e4
LT		 883
884 return 0;
885}
886
887#else
888#define s3c24xx_i2c_resume NULL
889#endif
890
891/* device driver for platform bus bits */
892
3ae5eaec 893static struct platform_driver s3c2410_i2c_driver = {
1da177e4
LT		 894 .probe = s3c24xx_i2c_probe,
895 .remove = s3c24xx_i2c_remove,
896 .resume = s3c24xx_i2c_resume,
3ae5eaec
RK		 897 .driver = {
898 .owner = THIS_MODULE,
899 .name = "s3c2410-i2c",
900 },
1da177e4
LT		 901};
902
3ae5eaec 903static struct platform_driver s3c2440_i2c_driver = {
1da177e4
LT		 904 .probe = s3c24xx_i2c_probe,
905 .remove = s3c24xx_i2c_remove,
906 .resume = s3c24xx_i2c_resume,
3ae5eaec
RK		 907 .driver = {
908 .owner = THIS_MODULE,
909 .name = "s3c2440-i2c",
910 },
1da177e4
LT		 911};
912
913static int __init i2c_adap_s3c_init(void)
914{
915 int ret;
916
3ae5eaec 917 ret = platform_driver_register(&s3c2410_i2c_driver);
e32e28ed 918 if (ret == 0) {
3ae5eaec 919 ret = platform_driver_register(&s3c2440_i2c_driver);
e32e28ed 920 if (ret)
3ae5eaec 921 platform_driver_unregister(&s3c2410_i2c_driver);
e32e28ed 922 }
1da177e4
LT		 923
924 return ret;
925}
926
927static void __exit i2c_adap_s3c_exit(void)
928{
3ae5eaec
RK		 929 platform_driver_unregister(&s3c2410_i2c_driver);
930 platform_driver_unregister(&s3c2440_i2c_driver);
1da177e4
LT		 931}
932
933module_init(i2c_adap_s3c_init);
934module_exit(i2c_adap_s3c_exit);
935
936MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
937MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
938MODULE_LICENSE("GPL");
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