[net-next-2.6.git] / drivers / i2c / busses / i2c-nforce2.c

/*
    SMBus driver for nVidia nForce2 MCP

    Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
    Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
    Based on
    SMBus 2.0 driver for AMD-8111 IO-Hub
    Copyright (c) 2002 Vojtech Pavlik

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    SUPPORTED DEVICES		PCI ID
    nForce2 MCP			0064
    nForce2 Ultra 400 MCP	0084
    nForce3 Pro150 MCP		00D4
    nForce3 250Gb MCP		00E4
    nForce4 MCP			0052
    nForce4 MCP-04		0034
    nForce MCP51		0264
    nForce MCP55		0368
    nForce MCP61		03EB
    nForce MCP65		0446
    nForce MCP67		0542
    nForce MCP73		07D8
    nForce MCP78S		0752
    nForce MCP79		0AA2

    This driver supports the 2 SMBuses that are included in the MCP of the
    nForce2/3/4/5xx chipsets.
*/

/* Note: we assume there can only be one nForce2, with two SMBus interfaces */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
#include <linux/slab.h>
#include <asm/io.h>

MODULE_LICENSE("GPL");
MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");


struct nforce2_smbus {
	struct i2c_adapter adapter;
	int base;
	int size;
	int blockops;
	int can_abort;
};


/*
 * nVidia nForce2 SMBus control register definitions
 * (Newer incarnations use standard BARs 4 and 5 instead)
 */
#define NFORCE_PCI_SMB1	0x50
#define NFORCE_PCI_SMB2	0x54


/*
 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
 */
#define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
#define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
#define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
#define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
#define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */
#define NVIDIA_SMB_BCNT		(smbus->base + 0x24)	/* number of data
							   bytes */
#define NVIDIA_SMB_STATUS_ABRT	(smbus->base + 0x3c)	/* register used to
							   check the status of
							   the abort command */
#define NVIDIA_SMB_CTRL		(smbus->base + 0x3e)	/* control register */

#define NVIDIA_SMB_STATUS_ABRT_STS	0x01		/* Bit to notify that
							   abort succeeded */
#define NVIDIA_SMB_CTRL_ABORT	0x20
#define NVIDIA_SMB_STS_DONE	0x80
#define NVIDIA_SMB_STS_ALRM	0x40
#define NVIDIA_SMB_STS_RES	0x20
#define NVIDIA_SMB_STS_STATUS	0x1f

#define NVIDIA_SMB_PRTCL_WRITE			0x00
#define NVIDIA_SMB_PRTCL_READ			0x01
#define NVIDIA_SMB_PRTCL_QUICK			0x02
#define NVIDIA_SMB_PRTCL_BYTE			0x04
#define NVIDIA_SMB_PRTCL_BYTE_DATA		0x06
#define NVIDIA_SMB_PRTCL_WORD_DATA		0x08
#define NVIDIA_SMB_PRTCL_BLOCK_DATA		0x0a
#define NVIDIA_SMB_PRTCL_PEC			0x80

/* Misc definitions */
#define MAX_TIMEOUT	100

/* We disable the second SMBus channel on these boards */
static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = {
	{
		.ident = "DFI Lanparty NF4 Expert",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
			DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
		},
	},
	{ }
};

static struct pci_driver nforce2_driver;

/* For multiplexing support, we need a global reference to the 1st
   SMBus channel */
#if defined CONFIG_I2C_NFORCE2_S4985 || defined CONFIG_I2C_NFORCE2_S4985_MODULE
struct i2c_adapter *nforce2_smbus;
EXPORT_SYMBOL_GPL(nforce2_smbus);

static void nforce2_set_reference(struct i2c_adapter *adap)
{
	nforce2_smbus = adap;
}
#else
static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
#endif

static void nforce2_abort(struct i2c_adapter *adap)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	int timeout = 0;
	unsigned char temp;

	dev_dbg(&adap->dev, "Aborting current transaction\n");

	outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
	do {
		msleep(1);
		temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
	} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
			(timeout++ < MAX_TIMEOUT));
	if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
		dev_err(&adap->dev, "Can't reset the smbus\n");
	outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
}

static int nforce2_check_status(struct i2c_adapter *adap)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	int timeout = 0;
	unsigned char temp;

	do {
		msleep(1);
		temp = inb_p(NVIDIA_SMB_STS);
	} while ((!temp) && (timeout++ < MAX_TIMEOUT));

	if (timeout > MAX_TIMEOUT) {
		dev_dbg(&adap->dev, "SMBus Timeout!\n");
		if (smbus->can_abort)
			nforce2_abort(adap);
		return -ETIMEDOUT;
	}
	if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
		dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
		return -EIO;
	}
	return 0;
}

/* Return negative errno on error */
static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
		unsigned short flags, char read_write,
		u8 command, int size, union i2c_smbus_data * data)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	unsigned char protocol, pec;
	u8 len;
	int i, status;

	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
		NVIDIA_SMB_PRTCL_WRITE;
	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;

	switch (size) {

		case I2C_SMBUS_QUICK:
			protocol |= NVIDIA_SMB_PRTCL_QUICK;
			read_write = I2C_SMBUS_WRITE;
			break;

		case I2C_SMBUS_BYTE:
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(command, NVIDIA_SMB_CMD);
			protocol |= NVIDIA_SMB_PRTCL_BYTE;
			break;

		case I2C_SMBUS_BYTE_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(data->byte, NVIDIA_SMB_DATA);
			protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
			break;

		case I2C_SMBUS_WORD_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE) {
				 outb_p(data->word, NVIDIA_SMB_DATA);
				 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
			}
			protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
			break;

		case I2C_SMBUS_BLOCK_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE) {
				len = data->block[0];
				if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
					dev_err(&adap->dev,
						"Transaction failed "
						"(requested block size: %d)\n",
						len);
					return -EINVAL;
				}
				outb_p(len, NVIDIA_SMB_BCNT);
				for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
					outb_p(data->block[i + 1],
					       NVIDIA_SMB_DATA+i);
			}
			protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
			break;

		default:
			dev_err(&adap->dev, "Unsupported transaction %d\n", size);
			return -EOPNOTSUPP;
	}

	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	outb_p(protocol, NVIDIA_SMB_PRTCL);

	status = nforce2_check_status(adap);
	if (status)
		return status;

	if (read_write == I2C_SMBUS_WRITE)
		return 0;

	switch (size) {

		case I2C_SMBUS_BYTE:
		case I2C_SMBUS_BYTE_DATA:
			data->byte = inb_p(NVIDIA_SMB_DATA);
			break;

		case I2C_SMBUS_WORD_DATA:
			data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
			break;

		case I2C_SMBUS_BLOCK_DATA:
			len = inb_p(NVIDIA_SMB_BCNT);
			if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
				dev_err(&adap->dev, "Transaction failed "
					"(received block size: 0x%02x)\n",
					len);
				return -EPROTO;
			}
			for (i = 0; i < len; i++)
				data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
			data->block[0] = len;
			break;
	}

	return 0;
}


static u32 nforce2_func(struct i2c_adapter *adapter)
{
	/* other functionality might be possible, but is not tested */
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	       I2C_FUNC_SMBUS_PEC |
	       (((struct nforce2_smbus*)adapter->algo_data)->blockops ?
		I2C_FUNC_SMBUS_BLOCK_DATA : 0);
}

static struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= nforce2_access,
	.functionality	= nforce2_func,
};


static const struct pci_device_id nforce2_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
	{ 0 }
};

MODULE_DEVICE_TABLE (pci, nforce2_ids);


static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
	int alt_reg, struct nforce2_smbus *smbus, const char *name)
{
	int error;

	smbus->base = pci_resource_start(dev, bar);
	if (smbus->base) {
		smbus->size = pci_resource_len(dev, bar);
	} else {
		/* Older incarnations of the device used non-standard BARs */
		u16 iobase;

		if (pci_read_config_word(dev, alt_reg, &iobase)
		    != PCIBIOS_SUCCESSFUL) {
			dev_err(&dev->dev, "Error reading PCI config for %s\n",
				name);
			return -EIO;
		}

		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
		smbus->size = 64;
	}

	error = acpi_check_region(smbus->base, smbus->size,
				  nforce2_driver.name);
	if (error)
		return -1;

	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
		dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
			smbus->base, smbus->base+smbus->size-1, name);
		return -EBUSY;
	}
	smbus->adapter.owner = THIS_MODULE;
	smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
	smbus->adapter.algo = &smbus_algorithm;
	smbus->adapter.algo_data = smbus;
	smbus->adapter.dev.parent = &dev->dev;
	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
		"SMBus nForce2 adapter at %04x", smbus->base);

	error = i2c_add_adapter(&smbus->adapter);
	if (error) {
		dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
		release_region(smbus->base, smbus->size);
		return error;
	}
	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	return 0;
}


static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct nforce2_smbus *smbuses;
	int res1, res2;

	/* we support 2 SMBus adapters */
	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
		return -ENOMEM;
	pci_set_drvdata(dev, smbuses);

	switch(dev->device) {
	case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
		smbuses[0].blockops = 1;
		smbuses[1].blockops = 1;
		smbuses[0].can_abort = 1;
		smbuses[1].can_abort = 1;
	}

	/* SMBus adapter 1 */
	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
	if (res1 < 0) {
		dev_err(&dev->dev, "Error probing SMB1.\n");
		smbuses[0].base = 0;	/* to have a check value */
	}
	/* SMBus adapter 2 */
	if (dmi_check_system(nforce2_dmi_blacklist2)) {
		dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
		res2 = -EPERM;
		smbuses[1].base = 0;
	} else {
		res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
					 "SMB2");
		if (res2 < 0) {
			dev_err(&dev->dev, "Error probing SMB2.\n");
			smbuses[1].base = 0;	/* to have a check value */
		}
	}
	if ((res1 < 0) && (res2 < 0)) {
		/* we did not find even one of the SMBuses, so we give up */
		kfree(smbuses);
		return -ENODEV;
	}

	nforce2_set_reference(&smbuses[0].adapter);
	return 0;
}


static void __devexit nforce2_remove(struct pci_dev *dev)
{
	struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);

	nforce2_set_reference(NULL);
	if (smbuses[0].base) {
		i2c_del_adapter(&smbuses[0].adapter);
		release_region(smbuses[0].base, smbuses[0].size);
	}
	if (smbuses[1].base) {
		i2c_del_adapter(&smbuses[1].adapter);
		release_region(smbuses[1].base, smbuses[1].size);
	}
	kfree(smbuses);
}

static struct pci_driver nforce2_driver = {
	.name		= "nForce2_smbus",
	.id_table	= nforce2_ids,
	.probe		= nforce2_probe,
	.remove		= __devexit_p(nforce2_remove),
};

static int __init nforce2_init(void)
{
	return pci_register_driver(&nforce2_driver);
}

static void __exit nforce2_exit(void)
{
	pci_unregister_driver(&nforce2_driver);
}

module_init(nforce2_init);
module_exit(nforce2_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	SMBus driver for nVidia nForce2 MCP
	3
	4	Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
	5	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
	6	Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
	7	Based on
	8	SMBus 2.0 driver for AMD-8111 IO-Hub
	9	Copyright (c) 2002 Vojtech Pavlik
	10
	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2 of the License, or
	14	(at your option) any later version.
	15
	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
	20
	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
	26	/*
	27	SUPPORTED DEVICES PCI ID
	28	nForce2 MCP 0064
	29	nForce2 Ultra 400 MCP 0084
	30	nForce3 Pro150 MCP 00D4
	31	nForce3 250Gb MCP 00E4
	32	nForce4 MCP 0052
7c72ccf0	33	nForce4 MCP-04 0034
d2dd14ac JD	34	nForce MCP51 0264
d2dd14ac JD	35	nForce MCP55 0368
f75803de JD	36	nForce MCP61 03EB
f75803de JD	37	nForce MCP65 0446
d2dd14ac JD	38	nForce MCP67 0542
	39	nForce MCP73 07D8
	40	nForce MCP78S 0752
	41	nForce MCP79 0AA2
1da177e4 LT	42
1da177e4 LT	43	This driver supports the 2 SMBuses that are included in the MCP of the
ad04d5c3	44	nForce2/3/4/5xx chipsets.
1da177e4 LT	45	*/
	46
	47	/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
	48
1da177e4 LT	49	#include <linux/module.h>
	50	#include <linux/pci.h>
	51	#include <linux/kernel.h>
	52	#include <linux/stddef.h>
1da177e4 LT	53	#include <linux/ioport.h>
	54	#include <linux/init.h>
	55	#include <linux/i2c.h>
	56	#include <linux/delay.h>
08851d6e	57	#include <linux/dmi.h>
54fb4a05	58	#include <linux/acpi.h>
5a0e3ad6	59	#include <linux/slab.h>
1da177e4 LT	60	#include <asm/io.h>
	61
	62	MODULE_LICENSE("GPL");
ad04d5c3 HFV	63	MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
ad04d5c3 HFV	64	MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
1da177e4 LT	65
	66
	67	struct nforce2_smbus {
1da177e4 LT	68	struct i2c_adapter adapter;
	69	int base;
	70	int size;
b53c8221	71	int blockops;
d49584c4	72	int can_abort;
1da177e4 LT	73	};
	74
	75
	76	/*
	77	* nVidia nForce2 SMBus control register definitions
5c7ae658	78	* (Newer incarnations use standard BARs 4 and 5 instead)
1da177e4 LT	79	*/
	80	#define NFORCE_PCI_SMB1 0x50
	81	#define NFORCE_PCI_SMB2 0x54
	82
	83
	84	/*
	85	* ACPI 2.0 chapter 13 SMBus 2.0 EC register model
	86	*/
	87	#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
	88	#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
	89	#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
	90	#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
	91	#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
b53c8221 OR	92	#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
b53c8221 OR	93	bytes */
d49584c4 OR	94	#define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
	95	check the status of
	96	the abort command */
	97	#define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
	98
	99	#define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that
	100	abort succeeded */
	101	#define NVIDIA_SMB_CTRL_ABORT 0x20
1da177e4 LT	102	#define NVIDIA_SMB_STS_DONE 0x80
	103	#define NVIDIA_SMB_STS_ALRM 0x40
	104	#define NVIDIA_SMB_STS_RES 0x20
	105	#define NVIDIA_SMB_STS_STATUS 0x1f
	106
	107	#define NVIDIA_SMB_PRTCL_WRITE 0x00
	108	#define NVIDIA_SMB_PRTCL_READ 0x01
	109	#define NVIDIA_SMB_PRTCL_QUICK 0x02
	110	#define NVIDIA_SMB_PRTCL_BYTE 0x04
	111	#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
	112	#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
b53c8221	113	#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
1da177e4 LT	114	#define NVIDIA_SMB_PRTCL_PEC 0x80
1da177e4 LT	115
41535497 OR	116	/* Misc definitions */
	117	#define MAX_TIMEOUT 100
	118
08851d6e JD	119	/* We disable the second SMBus channel on these boards */
	120	static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = {
	121	{
	122	.ident = "DFI Lanparty NF4 Expert",
	123	.matches = {
	124	DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
	125	DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
	126	},
	127	},
	128	{ }
	129	};
	130
d6072f84	131	static struct pci_driver nforce2_driver;
1da177e4	132
279e9024 JD	133	/* For multiplexing support, we need a global reference to the 1st
	134	SMBus channel */
	135	#if defined CONFIG_I2C_NFORCE2_S4985 \|\| defined CONFIG_I2C_NFORCE2_S4985_MODULE
	136	struct i2c_adapter *nforce2_smbus;
	137	EXPORT_SYMBOL_GPL(nforce2_smbus);
	138
	139	static void nforce2_set_reference(struct i2c_adapter *adap)
	140	{
	141	nforce2_smbus = adap;
	142	}
	143	#else
	144	static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
	145	#endif
	146
d49584c4 OR	147	static void nforce2_abort(struct i2c_adapter *adap)
	148	{
	149	struct nforce2_smbus *smbus = adap->algo_data;
	150	int timeout = 0;
	151	unsigned char temp;
	152
	153	dev_dbg(&adap->dev, "Aborting current transaction\n");
	154
	155	outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
	156	do {
	157	msleep(1);
	158	temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
	159	} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
	160	(timeout++ < MAX_TIMEOUT));
	161	if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
	162	dev_err(&adap->dev, "Can't reset the smbus\n");
	163	outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
	164	}
	165
41535497 OR	166	static int nforce2_check_status(struct i2c_adapter *adap)
	167	{
	168	struct nforce2_smbus *smbus = adap->algo_data;
	169	int timeout = 0;
	170	unsigned char temp;
	171
	172	do {
	173	msleep(1);
	174	temp = inb_p(NVIDIA_SMB_STS);
	175	} while ((!temp) && (timeout++ < MAX_TIMEOUT));
	176
4ccc28f7	177	if (timeout > MAX_TIMEOUT) {
41535497	178	dev_dbg(&adap->dev, "SMBus Timeout!\n");
d49584c4 OR	179	if (smbus->can_abort)
d49584c4 OR	180	nforce2_abort(adap);
97140342	181	return -ETIMEDOUT;
41535497 OR	182	}
	183	if (!(temp & NVIDIA_SMB_STS_DONE) \|\| (temp & NVIDIA_SMB_STS_STATUS)) {
	184	dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
97140342	185	return -EIO;
41535497 OR	186	}
	187	return 0;
	188	}
	189
97140342	190	/* Return negative errno on error */
1da177e4 LT	191	static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
	192	unsigned short flags, char read_write,
	193	u8 command, int size, union i2c_smbus_data * data)
	194	{
	195	struct nforce2_smbus *smbus = adap->algo_data;
41535497	196	unsigned char protocol, pec;
b53c8221	197	u8 len;
97140342	198	int i, status;
1da177e4 LT	199
	200	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
	201	NVIDIA_SMB_PRTCL_WRITE;
	202	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
	203
	204	switch (size) {
	205
	206	case I2C_SMBUS_QUICK:
	207	protocol \|= NVIDIA_SMB_PRTCL_QUICK;
	208	read_write = I2C_SMBUS_WRITE;
	209	break;
	210
	211	case I2C_SMBUS_BYTE:
	212	if (read_write == I2C_SMBUS_WRITE)
	213	outb_p(command, NVIDIA_SMB_CMD);
	214	protocol \|= NVIDIA_SMB_PRTCL_BYTE;
	215	break;
	216
	217	case I2C_SMBUS_BYTE_DATA:
	218	outb_p(command, NVIDIA_SMB_CMD);
	219	if (read_write == I2C_SMBUS_WRITE)
	220	outb_p(data->byte, NVIDIA_SMB_DATA);
	221	protocol \|= NVIDIA_SMB_PRTCL_BYTE_DATA;
	222	break;
	223
	224	case I2C_SMBUS_WORD_DATA:
	225	outb_p(command, NVIDIA_SMB_CMD);
	226	if (read_write == I2C_SMBUS_WRITE) {
	227	outb_p(data->word, NVIDIA_SMB_DATA);
	228	outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
	229	}
	230	protocol \|= NVIDIA_SMB_PRTCL_WORD_DATA \| pec;
	231	break;
	232
b53c8221 OR	233	case I2C_SMBUS_BLOCK_DATA:
	234	outb_p(command, NVIDIA_SMB_CMD);
	235	if (read_write == I2C_SMBUS_WRITE) {
	236	len = data->block[0];
	237	if ((len == 0) \|\| (len > I2C_SMBUS_BLOCK_MAX)) {
	238	dev_err(&adap->dev,
	239	"Transaction failed "
	240	"(requested block size: %d)\n",
	241	len);
97140342	242	return -EINVAL;
b53c8221 OR	243	}
	244	outb_p(len, NVIDIA_SMB_BCNT);
	245	for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
	246	outb_p(data->block[i + 1],
	247	NVIDIA_SMB_DATA+i);
	248	}
	249	protocol \|= NVIDIA_SMB_PRTCL_BLOCK_DATA \| pec;
	250	break;
	251
1da177e4 LT	252	default:
1da177e4 LT	253	dev_err(&adap->dev, "Unsupported transaction %d\n", size);
97140342	254	return -EOPNOTSUPP;
1da177e4 LT	255	}
	256
	257	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	258	outb_p(protocol, NVIDIA_SMB_PRTCL);
	259
97140342 DB	260	status = nforce2_check_status(adap);
	261	if (status)
	262	return status;
1da177e4 LT	263
	264	if (read_write == I2C_SMBUS_WRITE)
	265	return 0;
	266
	267	switch (size) {
	268
	269	case I2C_SMBUS_BYTE:
	270	case I2C_SMBUS_BYTE_DATA:
	271	data->byte = inb_p(NVIDIA_SMB_DATA);
	272	break;
	273
	274	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	275	data->word = inb_p(NVIDIA_SMB_DATA) \| (inb_p(NVIDIA_SMB_DATA+1) << 8);
1da177e4 LT	276	break;
b53c8221 OR	277
	278	case I2C_SMBUS_BLOCK_DATA:
	279	len = inb_p(NVIDIA_SMB_BCNT);
41535497 OR	280	if ((len <= 0) \|\| (len > I2C_SMBUS_BLOCK_MAX)) {
	281	dev_err(&adap->dev, "Transaction failed "
	282	"(received block size: 0x%02x)\n",
	283	len);
97140342	284	return -EPROTO;
41535497	285	}
b53c8221 OR	286	for (i = 0; i < len; i++)
	287	data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
	288	data->block[0] = len;
	289	break;
1da177e4 LT	290	}
	291
	292	return 0;
	293	}
	294
	295
	296	static u32 nforce2_func(struct i2c_adapter *adapter)
	297	{
	298	/* other functionality might be possible, but is not tested */
	299	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
b53c8221	300	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
ac3f5753	301	I2C_FUNC_SMBUS_PEC \|
b53c8221 OR	302	(((struct nforce2_smbus*)adapter->algo_data)->blockops ?
b53c8221 OR	303	I2C_FUNC_SMBUS_BLOCK_DATA : 0);
1da177e4 LT	304	}
1da177e4 LT	305
ad04d5c3 HFV	306	static struct i2c_algorithm smbus_algorithm = {
	307	.smbus_xfer = nforce2_access,
	308	.functionality = nforce2_func,
	309	};
	310
1da177e4	311
4111ecd2	312	static const struct pci_device_id nforce2_ids[] = {
1da177e4 LT	313	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	314	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	315	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	316	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	317	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
7c72ccf0	318	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
5c7ae658 JD	319	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
5c7ae658 JD	320	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
f75803de JD	321	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
f75803de JD	322	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
d2dd14ac JD	323	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
	324	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
	325	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
	326	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
1da177e4 LT	327	{ 0 }
	328	};
	329
1da177e4 LT	330	MODULE_DEVICE_TABLE (pci, nforce2_ids);
	331
	332
5c7ae658 JD	333	static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
5c7ae658 JD	334	int alt_reg, struct nforce2_smbus smbus, const char name)
1da177e4	335	{
1da177e4 LT	336	int error;
1da177e4 LT	337
5c7ae658 JD	338	smbus->base = pci_resource_start(dev, bar);
	339	if (smbus->base) {
	340	smbus->size = pci_resource_len(dev, bar);
	341	} else {
	342	/* Older incarnations of the device used non-standard BARs */
	343	u16 iobase;
	344
	345	if (pci_read_config_word(dev, alt_reg, &iobase)
	346	!= PCIBIOS_SUCCESSFUL) {
	347	dev_err(&dev->dev, "Error reading PCI config for %s\n",
	348	name);
97140342	349	return -EIO;
5c7ae658 JD	350	}
	351
	352	smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
ad04d5c3	353	smbus->size = 64;
1da177e4	354	}
1da177e4	355
54fb4a05 JD	356	error = acpi_check_region(smbus->base, smbus->size,
	357	nforce2_driver.name);
	358	if (error)
	359	return -1;
	360
d6072f84	361	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
1da177e4 LT	362	dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
1da177e4 LT	363	smbus->base, smbus->base+smbus->size-1, name);
97140342	364	return -EBUSY;
1da177e4	365	}
ad04d5c3	366	smbus->adapter.owner = THIS_MODULE;
3401b2ff	367	smbus->adapter.class = I2C_CLASS_HWMON \| I2C_CLASS_SPD;
ad04d5c3	368	smbus->adapter.algo = &smbus_algorithm;
1da177e4 LT	369	smbus->adapter.algo_data = smbus;
1da177e4 LT	370	smbus->adapter.dev.parent = &dev->dev;
2096b956	371	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
1da177e4 LT	372	"SMBus nForce2 adapter at %04x", smbus->base);
	373
	374	error = i2c_add_adapter(&smbus->adapter);
	375	if (error) {
	376	dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
	377	release_region(smbus->base, smbus->size);
97140342	378	return error;
1da177e4 LT	379	}
	380	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	381	return 0;
	382	}
	383
	384
	385	static int __devinit nforce2_probe(struct pci_dev dev, const struct pci_device_id id)
	386	{
	387	struct nforce2_smbus *smbuses;
	388	int res1, res2;
	389
	390	/* we support 2 SMBus adapters */
078d9fe4	391	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
1da177e4	392	return -ENOMEM;
1da177e4 LT	393	pci_set_drvdata(dev, smbuses);
1da177e4 LT	394
b53c8221	395	switch(dev->device) {
541b6a7a	396	case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
b53c8221 OR	397	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
	398	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
	399	smbuses[0].blockops = 1;
	400	smbuses[1].blockops = 1;
d49584c4 OR	401	smbuses[0].can_abort = 1;
d49584c4 OR	402	smbuses[1].can_abort = 1;
b53c8221 OR	403	}
b53c8221 OR	404
1da177e4	405	/* SMBus adapter 1 */
5c7ae658	406	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
1da177e4 LT	407	if (res1 < 0) {
	408	dev_err(&dev->dev, "Error probing SMB1.\n");
	409	smbuses[0].base = 0; /* to have a check value */
	410	}
5c7ae658	411	/* SMBus adapter 2 */
08851d6e JD	412	if (dmi_check_system(nforce2_dmi_blacklist2)) {
	413	dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
	414	res2 = -EPERM;
	415	smbuses[1].base = 0;
	416	} else {
	417	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
	418	"SMB2");
	419	if (res2 < 0) {
	420	dev_err(&dev->dev, "Error probing SMB2.\n");
	421	smbuses[1].base = 0; /* to have a check value */
	422	}
1da177e4 LT	423	}
	424	if ((res1 < 0) && (res2 < 0)) {
	425	/* we did not find even one of the SMBuses, so we give up */
	426	kfree(smbuses);
	427	return -ENODEV;
	428	}
	429
279e9024	430	nforce2_set_reference(&smbuses[0].adapter);
1da177e4 LT	431	return 0;
	432	}
	433
	434
	435	static void __devexit nforce2_remove(struct pci_dev *dev)
	436	{
	437	struct nforce2_smbus smbuses = (void) pci_get_drvdata(dev);
	438
279e9024	439	nforce2_set_reference(NULL);
1da177e4 LT	440	if (smbuses[0].base) {
	441	i2c_del_adapter(&smbuses[0].adapter);
	442	release_region(smbuses[0].base, smbuses[0].size);
	443	}
	444	if (smbuses[1].base) {
	445	i2c_del_adapter(&smbuses[1].adapter);
	446	release_region(smbuses[1].base, smbuses[1].size);
	447	}
	448	kfree(smbuses);
	449	}
	450
	451	static struct pci_driver nforce2_driver = {
	452	.name = "nForce2_smbus",
	453	.id_table = nforce2_ids,
	454	.probe = nforce2_probe,
	455	.remove = __devexit_p(nforce2_remove),
	456	};
	457
	458	static int __init nforce2_init(void)
	459	{
	460	return pci_register_driver(&nforce2_driver);
	461	}
	462
	463	static void __exit nforce2_exit(void)
	464	{
	465	pci_unregister_driver(&nforce2_driver);
	466	}
	467
	468	module_init(nforce2_init);
	469	module_exit(nforce2_exit);
	470