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[net-next-2.6.git] / drivers / hwmon / w83795.c
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792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
e3760b43 5 * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
792d376b
WS		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation - version 2.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301 USA.
20 *
21 * Supports following chips:
22 *
23 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
24 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
25 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/i2c.h>
33#include <linux/hwmon.h>
34#include <linux/hwmon-sysfs.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <linux/delay.h>
38
39/* Addresses to scan */
86ef4d2f
JD		 40static const unsigned short normal_i2c[] = {
41 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
42};
792d376b 43
792d376b
WS		 44
45static int reset;
46module_param(reset, bool, 0);
47MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
48
49
50#define W83795_REG_BANKSEL 0x00
51#define W83795_REG_VENDORID 0xfd
52#define W83795_REG_CHIPID 0xfe
53#define W83795_REG_DEVICEID 0xfb
2be381de 54#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 55
56#define W83795_REG_I2C_ADDR 0xfc
57#define W83795_REG_CONFIG 0x01
58#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 59#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 60
61/* Multi-Function Pin Ctrl Registers */
62#define W83795_REG_VOLT_CTRL1 0x02
63#define W83795_REG_VOLT_CTRL2 0x03
64#define W83795_REG_TEMP_CTRL1 0x04
65#define W83795_REG_TEMP_CTRL2 0x05
66#define W83795_REG_FANIN_CTRL1 0x06
67#define W83795_REG_FANIN_CTRL2 0x07
68#define W83795_REG_VMIGB_CTRL 0x08
69
792d376b
WS		 70#define TEMP_READ 0
71#define TEMP_CRIT 1
72#define TEMP_CRIT_HYST 2
73#define TEMP_WARN 3
74#define TEMP_WARN_HYST 4
75/* only crit and crit_hyst affect real-time alarm status
76 * current crit crit_hyst warn warn_hyst */
86ef4d2f 77static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 78 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
79 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
80 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
81 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
82 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
83 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
84};
85
86#define IN_READ 0
87#define IN_MAX 1
88#define IN_LOW 2
89static const u16 W83795_REG_IN[][3] = {
90 /* Current, HL, LL */
91 {0x10, 0x70, 0x71}, /* VSEN1 */
92 {0x11, 0x72, 0x73}, /* VSEN2 */
93 {0x12, 0x74, 0x75}, /* VSEN3 */
94 {0x13, 0x76, 0x77}, /* VSEN4 */
95 {0x14, 0x78, 0x79}, /* VSEN5 */
96 {0x15, 0x7a, 0x7b}, /* VSEN6 */
97 {0x16, 0x7c, 0x7d}, /* VSEN7 */
98 {0x17, 0x7e, 0x7f}, /* VSEN8 */
99 {0x18, 0x80, 0x81}, /* VSEN9 */
100 {0x19, 0x82, 0x83}, /* VSEN10 */
101 {0x1A, 0x84, 0x85}, /* VSEN11 */
102 {0x1B, 0x86, 0x87}, /* VTT */
103 {0x1C, 0x88, 0x89}, /* 3VDD */
104 {0x1D, 0x8a, 0x8b}, /* 3VSB */
105 {0x1E, 0x8c, 0x8d}, /* VBAT */
106 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
107 {0x20, 0xaa, 0xab}, /* VSEN13 */
108 {0x21, 0x96, 0x97}, /* VSEN14 */
109 {0x22, 0x9a, 0x9b}, /* VSEN15 */
110 {0x23, 0x9e, 0x9f}, /* VSEN16 */
111 {0x24, 0xa2, 0xa3}, /* VSEN17 */
112};
113#define W83795_REG_VRLSB 0x3C
792d376b
WS		 114
115static const u8 W83795_REG_IN_HL_LSB[] = {
116 0x8e, /* VSEN1-4 */
117 0x90, /* VSEN5-8 */
118 0x92, /* VSEN9-11 */
119 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
120 0xa8, /* VSEN12 */
121 0xac, /* VSEN13 */
122 0x98, /* VSEN14 */
123 0x9c, /* VSEN15 */
124 0xa0, /* VSEN16 */
125 0xa4, /* VSEN17 */
126};
127
128#define IN_LSB_REG(index, type) \
129 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
130 : (W83795_REG_IN_HL_LSB[(index)] + 1))
131
792d376b
WS		 132#define IN_LSB_SHIFT 0
133#define IN_LSB_IDX 1
134static const u8 IN_LSB_SHIFT_IDX[][2] = {
135 /* High/Low LSB shift, LSB No. */
136 {0x00, 0x00}, /* VSEN1 */
137 {0x02, 0x00}, /* VSEN2 */
138 {0x04, 0x00}, /* VSEN3 */
139 {0x06, 0x00}, /* VSEN4 */
140 {0x00, 0x01}, /* VSEN5 */
141 {0x02, 0x01}, /* VSEN6 */
142 {0x04, 0x01}, /* VSEN7 */
143 {0x06, 0x01}, /* VSEN8 */
144 {0x00, 0x02}, /* VSEN9 */
145 {0x02, 0x02}, /* VSEN10 */
146 {0x04, 0x02}, /* VSEN11 */
147 {0x00, 0x03}, /* VTT */
148 {0x02, 0x03}, /* 3VDD */
149 {0x04, 0x03}, /* 3VSB */
150 {0x06, 0x03}, /* VBAT */
151 {0x06, 0x04}, /* VSEN12 */
152 {0x06, 0x05}, /* VSEN13 */
153 {0x06, 0x06}, /* VSEN14 */
154 {0x06, 0x07}, /* VSEN15 */
155 {0x06, 0x08}, /* VSEN16 */
156 {0x06, 0x09}, /* VSEN17 */
157};
158
159
792d376b
WS		 160#define W83795_REG_FAN(index) (0x2E + (index))
161#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
162#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
163#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 164 (((index) & 1) ? 4 : 0)
792d376b
WS		 165
166#define W83795_REG_VID_CTRL 0x6A
167
792d376b
WS		 168#define W83795_REG_ALARM(index) (0x41 + (index))
169#define W83795_REG_BEEP(index) (0x50 + (index))
170
171#define W83795_REG_CLR_CHASSIS 0x4D
172
173
792d376b
WS		 174#define W83795_REG_FCMS1 0x201
175#define W83795_REG_FCMS2 0x208
176#define W83795_REG_TFMR(index) (0x202 + (index))
177#define W83795_REG_FOMC 0x20F
792d376b
WS		 178
179#define W83795_REG_TSS(index) (0x209 + (index))
180
181#define PWM_OUTPUT 0
fd7f82b8
JD		 182#define PWM_FREQ 1
183#define PWM_START 2
184#define PWM_NONSTOP 3
185#define PWM_STOP_TIME 4
186#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
792d376b 187
792d376b
WS		 188#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
189#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
190#define W83795_REG_TFTS 0x250
191
192#define TEMP_PWM_TTTI 0
193#define TEMP_PWM_CTFS 1
194#define TEMP_PWM_HCT 2
195#define TEMP_PWM_HOT 3
196#define W83795_REG_TTTI(index) (0x260 + (index))
197#define W83795_REG_CTFS(index) (0x268 + (index))
198#define W83795_REG_HT(index) (0x270 + (index))
199
200#define SF4_TEMP 0
201#define SF4_PWM 1
202#define W83795_REG_SF4_TEMP(temp_num, index) \
203 (0x280 + 0x10 * (temp_num) + (index))
204#define W83795_REG_SF4_PWM(temp_num, index) \
205 (0x288 + 0x10 * (temp_num) + (index))
206
207#define W83795_REG_DTSC 0x301
208#define W83795_REG_DTSE 0x302
209#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 210#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 211
212#define DTS_CRIT 0
213#define DTS_CRIT_HYST 1
214#define DTS_WARN 2
215#define DTS_WARN_HYST 3
216#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
217
218#define SETUP_PWM_DEFAULT 0
219#define SETUP_PWM_UPTIME 1
220#define SETUP_PWM_DOWNTIME 2
221#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
222
223static inline u16 in_from_reg(u8 index, u16 val)
224{
49c7347a
JD		 225 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
226 if (index >= 12 && index <= 14)
792d376b
WS		 227 return val * 6;
228 else
229 return val * 2;
230}
231
232static inline u16 in_to_reg(u8 index, u16 val)
233{
49c7347a 234 if (index >= 12 && index <= 14)
792d376b
WS		 235 return val / 6;
236 else
237 return val / 2;
238}
239
240static inline unsigned long fan_from_reg(u16 val)
241{
6c82b2f3 242 if ((val == 0xfff) || (val == 0))
792d376b
WS		 243 return 0;
244 return 1350000UL / val;
245}
246
247static inline u16 fan_to_reg(long rpm)
248{
249 if (rpm <= 0)
250 return 0x0fff;
251 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
252}
253
254static inline unsigned long time_from_reg(u8 reg)
255{
256 return reg * 100;
257}
258
259static inline u8 time_to_reg(unsigned long val)
260{
261 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
262}
263
264static inline long temp_from_reg(s8 reg)
265{
266 return reg * 1000;
267}
268
269static inline s8 temp_to_reg(long val, s8 min, s8 max)
270{
dd127f5c 271 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 272}
273
01879a85
JD		 274static const u16 pwm_freq_cksel0[16] = {
275 1024, 512, 341, 256, 205, 171, 146, 128,
276 85, 64, 32, 16, 8, 4, 2, 1
277};
278
279static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
280{
281 unsigned long base_clock;
282
283 if (reg & 0x80) {
284 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
285 return base_clock / ((reg & 0x7f) + 1);
286 } else
287 return pwm_freq_cksel0[reg & 0x0f];
288}
289
290static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
291{
292 unsigned long base_clock;
293 u8 reg0, reg1;
294 unsigned long best0, best1;
295
296 /* Best fit for cksel = 0 */
297 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
298 if (val > (pwm_freq_cksel0[reg0] +
299 pwm_freq_cksel0[reg0 + 1]) / 2)
300 break;
301 }
302 if (val < 375) /* cksel = 1 can't beat this */
303 return reg0;
304 best0 = pwm_freq_cksel0[reg0];
305
306 /* Best fit for cksel = 1 */
307 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
308 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
309 best1 = base_clock / reg1;
310 reg1 = 0x80 | (reg1 - 1);
311
312 /* Choose the closest one */
313 if (abs(val - best0) > abs(val - best1))
314 return reg1;
315 else
316 return reg0;
317}
792d376b
WS		 318
319enum chip_types {w83795g, w83795adg};
320
321struct w83795_data {
322 struct device *hwmon_dev;
323 struct mutex update_lock;
324 unsigned long last_updated; /* In jiffies */
325 enum chip_types chip_type;
326
327 u8 bank;
328
329 u32 has_in; /* Enable monitor VIN or not */
0e256018 330 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 331 u16 in[21][3]; /* Register value, read/high/low */
332 u8 in_lsb[10][3]; /* LSB Register value, high/low */
333 u8 has_gain; /* has gain: in17-20 * 8 */
334
335 u16 has_fan; /* Enable fan14-1 or not */
336 u16 fan[14]; /* Register value combine */
337 u16 fan_min[14]; /* Register value combine */
338
339 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 340 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b 341 u8 temp_read_vrlsb[6];
39deb699 342 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
792d376b
WS		 343 u8 temp_src[3]; /* Register value */
344
345 u8 enable_dts; /* Enable PECI and SB-TSI,
346 * bit 0: =1 enable, =0 disable,
347 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
348 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 349 s8 dts[8]; /* Register value */
792d376b 350 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 351 s8 dts_ext[4]; /* Register value */
792d376b
WS		 352
353 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
354 * no config register, only affected by chip
355 * type */
fd7f82b8
JD		 356 u8 pwm[8][5]; /* Register value, output, freq, start,
357 * non stop, stop time */
01879a85 358 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 359 u8 pwm_fcms[2]; /* Register value */
360 u8 pwm_tfmr[6]; /* Register value */
361 u8 pwm_fomc; /* Register value */
362
363 u16 target_speed[8]; /* Register value, target speed for speed
364 * cruise */
365 u8 tol_speed; /* tolerance of target speed */
366 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
367 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
368
369 u8 setup_pwm[3]; /* Register value */
370
371 u8 alarms[6]; /* Register value */
372 u8 beeps[6]; /* Register value */
792d376b
WS		 373
374 char valid;
2ae61de9 375 char valid_limits;
1bb3450c 376 char valid_pwm_config;
792d376b
WS		 377};
378
379/*
380 * Hardware access
b2469f42 381 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 382 */
383
b2469f42
JD		 384/* Must be called with data->update_lock held, except during initialization */
385static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 386{
387 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 388 int err;
389
390 /* If the same bank is already set, nothing to do */
391 if ((data->bank & 0x07) == bank)
392 return 0;
393
394 /* Change to new bank, preserve all other bits */
395 bank |= data->bank & ~0x07;
396 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
397 if (err < 0) {
398 dev_err(&client->dev,
399 "Failed to set bank to %d, err %d\n",
400 (int)bank, err);
401 return err;
792d376b 402 }
b2469f42
JD		 403 data->bank = bank;
404
405 return 0;
792d376b
WS		 406}
407
408/* Must be called with data->update_lock held, except during initialization */
b2469f42 409static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 410{
b2469f42
JD		 411 int err;
412
413 err = w83795_set_bank(client, reg >> 8);
414 if (err < 0)
415 return 0x00; /* Arbitrary */
416
417 err = i2c_smbus_read_byte_data(client, reg & 0xff);
418 if (err < 0) {
419 dev_err(&client->dev,
420 "Failed to read from register 0x%03x, err %d\n",
421 (int)reg, err);
422 return 0x00; /* Arbitrary */
792d376b 423 }
b2469f42
JD		 424 return err;
425}
792d376b 426
b2469f42
JD		 427/* Must be called with data->update_lock held, except during initialization */
428static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
429{
430 int err;
431
432 err = w83795_set_bank(client, reg >> 8);
433 if (err < 0)
434 return err;
435
436 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
437 if (err < 0)
438 dev_err(&client->dev,
439 "Failed to write to register 0x%03x, err %d\n",
440 (int)reg, err);
441 return err;
792d376b
WS		 442}
443
0d7237bf
JD		 444static void w83795_update_limits(struct i2c_client *client)
445{
446 struct w83795_data *data = i2c_get_clientdata(client);
447 int i, limit;
448
449 /* Read the voltage limits */
450 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
451 if (!(data->has_in & (1 << i)))
452 continue;
453 data->in[i][IN_MAX] =
454 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
455 data->in[i][IN_LOW] =
456 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
457 }
458 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
459 if ((i == 2 && data->chip_type == w83795adg) ||
460 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
461 continue;
462 data->in_lsb[i][IN_MAX] =
463 w83795_read(client, IN_LSB_REG(i, IN_MAX));
464 data->in_lsb[i][IN_LOW] =
465 w83795_read(client, IN_LSB_REG(i, IN_LOW));
466 }
467
468 /* Read the fan limits */
469 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
470 u8 lsb;
471
472 /* Each register contains LSB for 2 fans, but we want to
473 * read it only once to save time */
474 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
475 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
476
477 if (!(data->has_fan & (1 << i)))
478 continue;
479 data->fan_min[i] =
480 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
481 data->fan_min[i] |=
482 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
483 }
484
485 /* Read the temperature limits */
486 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
487 if (!(data->has_temp & (1 << i)))
488 continue;
489 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
490 data->temp[i][limit] =
491 w83795_read(client, W83795_REG_TEMP[i][limit]);
492 }
493
494 /* Read the DTS limits */
eb02755a 495 if (data->enable_dts) {
0d7237bf
JD		 496 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
497 data->dts_ext[limit] =
498 w83795_read(client, W83795_REG_DTS_EXT(limit));
499 }
500
501 /* Read beep settings */
502 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
503 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2ae61de9
JD		 504
505 data->valid_limits = 1;
0d7237bf
JD		 506}
507
1bb3450c 508static struct w83795_data *w83795_update_pwm_config(struct device *dev)
0d7237bf 509{
1bb3450c 510 struct i2c_client *client = to_i2c_client(dev);
0d7237bf
JD		 511 struct w83795_data *data = i2c_get_clientdata(client);
512 int i, tmp;
513
1bb3450c
JD		 514 mutex_lock(&data->update_lock);
515
516 if (data->valid_pwm_config)
517 goto END;
518
0d7237bf
JD		 519 /* Read temperature source selection */
520 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
521 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
522
523 /* Read automatic fan speed control settings */
524 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
525 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
526 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
527 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
528 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
529 for (i = 0; i < data->has_pwm; i++) {
530 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
531 data->pwm[i][tmp] =
532 w83795_read(client, W83795_REG_PWM(i, tmp));
533 }
534 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
535 data->target_speed[i] =
536 w83795_read(client, W83795_REG_FTSH(i)) << 4;
537 data->target_speed[i] |=
538 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
539 }
540 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
541
542 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
543 data->pwm_temp[i][TEMP_PWM_TTTI] =
544 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
545 data->pwm_temp[i][TEMP_PWM_CTFS] =
546 w83795_read(client, W83795_REG_CTFS(i));
547 tmp = w83795_read(client, W83795_REG_HT(i));
eb02755a 548 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
0d7237bf
JD		 549 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
550 }
551
552 /* Read SmartFanIV trip points */
553 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
554 for (tmp = 0; tmp < 7; tmp++) {
555 data->sf4_reg[i][SF4_TEMP][tmp] =
556 w83795_read(client,
557 W83795_REG_SF4_TEMP(i, tmp));
558 data->sf4_reg[i][SF4_PWM][tmp] =
559 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
560 }
561 }
562
563 /* Read setup PWM */
564 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
565 data->setup_pwm[i] =
566 w83795_read(client, W83795_REG_SETUP_PWM(i));
1bb3450c
JD		 567
568 data->valid_pwm_config = 1;
569
570END:
571 mutex_unlock(&data->update_lock);
572 return data;
0d7237bf
JD		 573}
574
792d376b
WS		 575static struct w83795_data *w83795_update_device(struct device *dev)
576{
577 struct i2c_client *client = to_i2c_client(dev);
578 struct w83795_data *data = i2c_get_clientdata(client);
579 u16 tmp;
580 int i;
581
582 mutex_lock(&data->update_lock);
583
2ae61de9
JD		 584 if (!data->valid_limits)
585 w83795_update_limits(client);
586
792d376b
WS		 587 if (!(time_after(jiffies, data->last_updated + HZ * 2)
588 || !data->valid))
589 goto END;
590
591 /* Update the voltages value */
592 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
593 if (!(data->has_in & (1 << i)))
594 continue;
595 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 596 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 597 data->in[i][IN_READ] = tmp;
598 }
599
0e256018
JD		 600 /* in0-2 can have dynamic limits (W83795G only) */
601 if (data->has_dyn_in) {
602 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
603 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
604
605 for (i = 0; i < 3; i++) {
606 if (!(data->has_dyn_in & (1 << i)))
607 continue;
608 data->in[i][IN_MAX] =
609 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
610 data->in[i][IN_LOW] =
611 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
612 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
613 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
614 }
615 }
616
792d376b
WS		 617 /* Update fan */
618 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
619 if (!(data->has_fan & (1 << i)))
620 continue;
621 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
eb02755a 622 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
792d376b
WS		 623 }
624
625 /* Update temperature */
626 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
792d376b
WS		 627 data->temp[i][TEMP_READ] =
628 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
629 data->temp_read_vrlsb[i] =
630 w83795_read(client, W83795_REG_VRLSB);
631 }
632
633 /* Update dts temperature */
eb02755a 634 if (data->enable_dts) {
792d376b
WS		 635 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
636 if (!(data->has_dts & (1 << i)))
637 continue;
638 data->dts[i] =
639 w83795_read(client, W83795_REG_DTS(i));
640 data->dts_read_vrlsb[i] =
641 w83795_read(client, W83795_REG_VRLSB);
642 }
643 }
644
645 /* Update pwm output */
646 for (i = 0; i < data->has_pwm; i++) {
647 data->pwm[i][PWM_OUTPUT] =
648 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
649 }
650
651 /* update alarm */
cd316df5 652 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
792d376b
WS		 653 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
654
655 data->last_updated = jiffies;
656 data->valid = 1;
657
658END:
659 mutex_unlock(&data->update_lock);
660 return data;
661}
662
663/*
664 * Sysfs attributes
665 */
666
667#define ALARM_STATUS 0
668#define BEEP_ENABLE 1
669static ssize_t
670show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
671{
672 struct w83795_data *data = w83795_update_device(dev);
673 struct sensor_device_attribute_2 *sensor_attr =
674 to_sensor_dev_attr_2(attr);
675 int nr = sensor_attr->nr;
676 int index = sensor_attr->index >> 3;
677 int bit = sensor_attr->index & 0x07;
678 u8 val;
679
eb02755a
JD		 680 if (nr == ALARM_STATUS)
681 val = (data->alarms[index] >> bit) & 1;
682 else /* BEEP_ENABLE */
683 val = (data->beeps[index] >> bit) & 1;
792d376b
WS		 684
685 return sprintf(buf, "%u\n", val);
686}
687
688static ssize_t
689store_beep(struct device *dev, struct device_attribute *attr,
690 const char *buf, size_t count)
691{
692 struct i2c_client *client = to_i2c_client(dev);
693 struct w83795_data *data = i2c_get_clientdata(client);
694 struct sensor_device_attribute_2 *sensor_attr =
695 to_sensor_dev_attr_2(attr);
696 int index = sensor_attr->index >> 3;
697 int shift = sensor_attr->index & 0x07;
698 u8 beep_bit = 1 << shift;
699 unsigned long val;
700
701 if (strict_strtoul(buf, 10, &val) < 0)
702 return -EINVAL;
703 if (val != 0 && val != 1)
704 return -EINVAL;
705
706 mutex_lock(&data->update_lock);
707 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
708 data->beeps[index] &= ~beep_bit;
709 data->beeps[index] |= val << shift;
710 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
711 mutex_unlock(&data->update_lock);
712
713 return count;
714}
715
24377101 716/* Write 0 to clear chassis alarm */
792d376b
WS		 717static ssize_t
718store_chassis_clear(struct device *dev,
719 struct device_attribute *attr, const char *buf,
720 size_t count)
721{
722 struct i2c_client *client = to_i2c_client(dev);
723 struct w83795_data *data = i2c_get_clientdata(client);
24377101
JD		 724 unsigned long val;
725
726 if (strict_strtoul(buf, 10, &val) < 0 || val != 0)
727 return -EINVAL;
792d376b
WS		 728
729 mutex_lock(&data->update_lock);
730 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
731 val |= 0x80;
732 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
733 mutex_unlock(&data->update_lock);
734 return count;
735}
736
737#define FAN_INPUT 0
738#define FAN_MIN 1
739static ssize_t
740show_fan(struct device *dev, struct device_attribute *attr, char *buf)
741{
742 struct sensor_device_attribute_2 *sensor_attr =
743 to_sensor_dev_attr_2(attr);
744 int nr = sensor_attr->nr;
745 int index = sensor_attr->index;
746 struct w83795_data *data = w83795_update_device(dev);
747 u16 val;
748
eb02755a 749 if (nr == FAN_INPUT)
792d376b
WS		 750 val = data->fan[index] & 0x0fff;
751 else
752 val = data->fan_min[index] & 0x0fff;
753
754 return sprintf(buf, "%lu\n", fan_from_reg(val));
755}
756
757static ssize_t
758store_fan_min(struct device *dev, struct device_attribute *attr,
759 const char *buf, size_t count)
760{
761 struct sensor_device_attribute_2 *sensor_attr =
762 to_sensor_dev_attr_2(attr);
763 int index = sensor_attr->index;
764 struct i2c_client *client = to_i2c_client(dev);
765 struct w83795_data *data = i2c_get_clientdata(client);
766 unsigned long val;
767
768 if (strict_strtoul(buf, 10, &val))
769 return -EINVAL;
770 val = fan_to_reg(val);
771
772 mutex_lock(&data->update_lock);
773 data->fan_min[index] = val;
774 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
775 val &= 0x0f;
7eb8d508 776 if (index & 1) {
792d376b
WS		 777 val <<= 4;
778 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
779 & 0x0f;
780 } else {
781 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
782 & 0xf0;
783 }
784 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
785 mutex_unlock(&data->update_lock);
786
787 return count;
788}
789
790static ssize_t
791show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
792{
1bb3450c 793 struct w83795_data *data;
792d376b
WS		 794 struct sensor_device_attribute_2 *sensor_attr =
795 to_sensor_dev_attr_2(attr);
796 int nr = sensor_attr->nr;
797 int index = sensor_attr->index;
01879a85 798 unsigned int val;
792d376b 799
1bb3450c
JD		 800 data = nr == PWM_OUTPUT ? w83795_update_device(dev)
801 : w83795_update_pwm_config(dev);
802
792d376b
WS		 803 switch (nr) {
804 case PWM_STOP_TIME:
805 val = time_from_reg(data->pwm[index][nr]);
806 break;
01879a85
JD		 807 case PWM_FREQ:
808 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 809 break;
810 default:
811 val = data->pwm[index][nr];
812 break;
813 }
814
815 return sprintf(buf, "%u\n", val);
816}
817
818static ssize_t
819store_pwm(struct device *dev, struct device_attribute *attr,
820 const char *buf, size_t count)
821{
822 struct i2c_client *client = to_i2c_client(dev);
823 struct w83795_data *data = i2c_get_clientdata(client);
824 struct sensor_device_attribute_2 *sensor_attr =
825 to_sensor_dev_attr_2(attr);
826 int nr = sensor_attr->nr;
827 int index = sensor_attr->index;
828 unsigned long val;
792d376b
WS		 829
830 if (strict_strtoul(buf, 10, &val) < 0)
831 return -EINVAL;
832
833 mutex_lock(&data->update_lock);
834 switch (nr) {
835 case PWM_STOP_TIME:
836 val = time_to_reg(val);
837 break;
01879a85
JD		 838 case PWM_FREQ:
839 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 840 break;
841 default:
842 val = SENSORS_LIMIT(val, 0, 0xff);
843 break;
844 }
845 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 846 data->pwm[index][nr] = val;
792d376b
WS		 847 mutex_unlock(&data->update_lock);
848 return count;
792d376b
WS		 849}
850
851static ssize_t
852show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
853{
854 struct sensor_device_attribute_2 *sensor_attr =
855 to_sensor_dev_attr_2(attr);
1bb3450c 856 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 857 int index = sensor_attr->index;
858 u8 tmp;
859
860 if (1 == (data->pwm_fcms[0] & (1 << index))) {
861 tmp = 2;
862 goto out;
863 }
864 for (tmp = 0; tmp < 6; tmp++) {
865 if (data->pwm_tfmr[tmp] & (1 << index)) {
866 tmp = 3;
867 goto out;
868 }
869 }
870 if (data->pwm_fomc & (1 << index))
871 tmp = 0;
872 else
873 tmp = 1;
874
875out:
876 return sprintf(buf, "%u\n", tmp);
877}
878
879static ssize_t
880store_pwm_enable(struct device *dev, struct device_attribute *attr,
881 const char *buf, size_t count)
882{
883 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 884 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 885 struct sensor_device_attribute_2 *sensor_attr =
886 to_sensor_dev_attr_2(attr);
887 int index = sensor_attr->index;
888 unsigned long val;
889 int i;
890
891 if (strict_strtoul(buf, 10, &val) < 0)
892 return -EINVAL;
893 if (val > 2)
894 return -EINVAL;
895
896 mutex_lock(&data->update_lock);
897 switch (val) {
898 case 0:
899 case 1:
900 data->pwm_fcms[0] &= ~(1 << index);
901 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
902 for (i = 0; i < 6; i++) {
903 data->pwm_tfmr[i] &= ~(1 << index);
904 w83795_write(client, W83795_REG_TFMR(i),
905 data->pwm_tfmr[i]);
906 }
907 data->pwm_fomc |= 1 << index;
908 data->pwm_fomc ^= val << index;
909 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
910 break;
911 case 2:
912 data->pwm_fcms[0] |= (1 << index);
913 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
914 break;
915 }
916 mutex_unlock(&data->update_lock);
917 return count;
792d376b
WS		 918}
919
920static ssize_t
921show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
922{
923 struct sensor_device_attribute_2 *sensor_attr =
924 to_sensor_dev_attr_2(attr);
1bb3450c 925 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 926 int index = sensor_attr->index;
927 u8 val = index / 2;
928 u8 tmp = data->temp_src[val];
929
7eb8d508 930 if (index & 1)
792d376b
WS		 931 val = 4;
932 else
933 val = 0;
934 tmp >>= val;
935 tmp &= 0x0f;
936
937 return sprintf(buf, "%u\n", tmp);
938}
939
940static ssize_t
941store_temp_src(struct device *dev, struct device_attribute *attr,
942 const char *buf, size_t count)
943{
944 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 945 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 946 struct sensor_device_attribute_2 *sensor_attr =
947 to_sensor_dev_attr_2(attr);
948 int index = sensor_attr->index;
949 unsigned long tmp;
950 u8 val = index / 2;
951
952 if (strict_strtoul(buf, 10, &tmp) < 0)
953 return -EINVAL;
954 tmp = SENSORS_LIMIT(tmp, 0, 15);
955
956 mutex_lock(&data->update_lock);
7eb8d508 957 if (index & 1) {
792d376b
WS		 958 tmp <<= 4;
959 data->temp_src[val] &= 0x0f;
960 } else {
961 data->temp_src[val] &= 0xf0;
962 }
963 data->temp_src[val] |= tmp;
964 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
965 mutex_unlock(&data->update_lock);
966
967 return count;
968}
969
970#define TEMP_PWM_ENABLE 0
971#define TEMP_PWM_FAN_MAP 1
972static ssize_t
973show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
974 char *buf)
975{
1bb3450c 976 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 977 struct sensor_device_attribute_2 *sensor_attr =
978 to_sensor_dev_attr_2(attr);
979 int nr = sensor_attr->nr;
980 int index = sensor_attr->index;
981 u8 tmp = 0xff;
982
983 switch (nr) {
984 case TEMP_PWM_ENABLE:
985 tmp = (data->pwm_fcms[1] >> index) & 1;
986 if (tmp)
987 tmp = 4;
988 else
989 tmp = 3;
990 break;
991 case TEMP_PWM_FAN_MAP:
992 tmp = data->pwm_tfmr[index];
993 break;
994 }
995
996 return sprintf(buf, "%u\n", tmp);
997}
998
999static ssize_t
1000store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1001 const char *buf, size_t count)
1002{
1003 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 1004 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1005 struct sensor_device_attribute_2 *sensor_attr =
1006 to_sensor_dev_attr_2(attr);
1007 int nr = sensor_attr->nr;
1008 int index = sensor_attr->index;
1009 unsigned long tmp;
1010
1011 if (strict_strtoul(buf, 10, &tmp) < 0)
1012 return -EINVAL;
1013
1014 switch (nr) {
1015 case TEMP_PWM_ENABLE:
eb02755a 1016 if (tmp != 3 && tmp != 4)
792d376b
WS		 1017 return -EINVAL;
1018 tmp -= 3;
1019 mutex_lock(&data->update_lock);
1020 data->pwm_fcms[1] &= ~(1 << index);
1021 data->pwm_fcms[1] |= tmp << index;
1022 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1023 mutex_unlock(&data->update_lock);
1024 break;
1025 case TEMP_PWM_FAN_MAP:
1026 mutex_lock(&data->update_lock);
1027 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1028 w83795_write(client, W83795_REG_TFMR(index), tmp);
1029 data->pwm_tfmr[index] = tmp;
1030 mutex_unlock(&data->update_lock);
1031 break;
1032 }
1033 return count;
1034}
1035
1036#define FANIN_TARGET 0
1037#define FANIN_TOL 1
1038static ssize_t
1039show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1040{
1bb3450c 1041 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1042 struct sensor_device_attribute_2 *sensor_attr =
1043 to_sensor_dev_attr_2(attr);
1044 int nr = sensor_attr->nr;
1045 int index = sensor_attr->index;
1046 u16 tmp = 0;
1047
1048 switch (nr) {
1049 case FANIN_TARGET:
1050 tmp = fan_from_reg(data->target_speed[index]);
1051 break;
1052 case FANIN_TOL:
1053 tmp = data->tol_speed;
1054 break;
1055 }
1056
1057 return sprintf(buf, "%u\n", tmp);
1058}
1059
1060static ssize_t
1061store_fanin(struct device *dev, struct device_attribute *attr,
1062 const char *buf, size_t count)
1063{
1064 struct i2c_client *client = to_i2c_client(dev);
1065 struct w83795_data *data = i2c_get_clientdata(client);
1066 struct sensor_device_attribute_2 *sensor_attr =
1067 to_sensor_dev_attr_2(attr);
1068 int nr = sensor_attr->nr;
1069 int index = sensor_attr->index;
1070 unsigned long val;
1071
1072 if (strict_strtoul(buf, 10, &val) < 0)
1073 return -EINVAL;
1074
1075 mutex_lock(&data->update_lock);
1076 switch (nr) {
1077 case FANIN_TARGET:
1078 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
eb02755a 1079 w83795_write(client, W83795_REG_FTSH(index), val >> 4);
792d376b
WS		 1080 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1081 data->target_speed[index] = val;
1082 break;
1083 case FANIN_TOL:
1084 val = SENSORS_LIMIT(val, 0, 0x3f);
1085 w83795_write(client, W83795_REG_TFTS, val);
1086 data->tol_speed = val;
1087 break;
1088 }
1089 mutex_unlock(&data->update_lock);
1090
1091 return count;
1092}
1093
1094
1095static ssize_t
1096show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1097{
1bb3450c 1098 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1099 struct sensor_device_attribute_2 *sensor_attr =
1100 to_sensor_dev_attr_2(attr);
1101 int nr = sensor_attr->nr;
1102 int index = sensor_attr->index;
1103 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1104
1105 return sprintf(buf, "%ld\n", tmp);
1106}
1107
1108static ssize_t
1109store_temp_pwm(struct device *dev, struct device_attribute *attr,
1110 const char *buf, size_t count)
1111{
1112 struct i2c_client *client = to_i2c_client(dev);
1113 struct w83795_data *data = i2c_get_clientdata(client);
1114 struct sensor_device_attribute_2 *sensor_attr =
1115 to_sensor_dev_attr_2(attr);
1116 int nr = sensor_attr->nr;
1117 int index = sensor_attr->index;
1118 unsigned long val;
1119 u8 tmp;
1120
1121 if (strict_strtoul(buf, 10, &val) < 0)
1122 return -EINVAL;
1123 val /= 1000;
1124
1125 mutex_lock(&data->update_lock);
1126 switch (nr) {
1127 case TEMP_PWM_TTTI:
1128 val = SENSORS_LIMIT(val, 0, 0x7f);
1129 w83795_write(client, W83795_REG_TTTI(index), val);
1130 break;
1131 case TEMP_PWM_CTFS:
1132 val = SENSORS_LIMIT(val, 0, 0x7f);
1133 w83795_write(client, W83795_REG_CTFS(index), val);
1134 break;
1135 case TEMP_PWM_HCT:
1136 val = SENSORS_LIMIT(val, 0, 0x0f);
1137 tmp = w83795_read(client, W83795_REG_HT(index));
1138 tmp &= 0x0f;
1139 tmp |= (val << 4) & 0xf0;
1140 w83795_write(client, W83795_REG_HT(index), tmp);
1141 break;
1142 case TEMP_PWM_HOT:
1143 val = SENSORS_LIMIT(val, 0, 0x0f);
1144 tmp = w83795_read(client, W83795_REG_HT(index));
1145 tmp &= 0xf0;
1146 tmp |= val & 0x0f;
1147 w83795_write(client, W83795_REG_HT(index), tmp);
1148 break;
1149 }
1150 data->pwm_temp[index][nr] = val;
1151 mutex_unlock(&data->update_lock);
1152
1153 return count;
1154}
1155
1156static ssize_t
1157show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1158{
1bb3450c 1159 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1160 struct sensor_device_attribute_2 *sensor_attr =
1161 to_sensor_dev_attr_2(attr);
1162 int nr = sensor_attr->nr;
1163 int index = sensor_attr->index;
1164
1165 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1166}
1167
1168static ssize_t
1169store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1170 const char *buf, size_t count)
1171{
1172 struct i2c_client *client = to_i2c_client(dev);
1173 struct w83795_data *data = i2c_get_clientdata(client);
1174 struct sensor_device_attribute_2 *sensor_attr =
1175 to_sensor_dev_attr_2(attr);
1176 int nr = sensor_attr->nr;
1177 int index = sensor_attr->index;
1178 unsigned long val;
1179
1180 if (strict_strtoul(buf, 10, &val) < 0)
1181 return -EINVAL;
1182
1183 mutex_lock(&data->update_lock);
1184 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1185 data->sf4_reg[index][SF4_PWM][nr] = val;
1186 mutex_unlock(&data->update_lock);
1187
1188 return count;
1189}
1190
1191static ssize_t
1192show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1193{
1bb3450c 1194 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1195 struct sensor_device_attribute_2 *sensor_attr =
1196 to_sensor_dev_attr_2(attr);
1197 int nr = sensor_attr->nr;
1198 int index = sensor_attr->index;
1199
1200 return sprintf(buf, "%u\n",
1201 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1202}
1203
1204static ssize_t
1205store_sf4_temp(struct device *dev, struct device_attribute *attr,
1206 const char *buf, size_t count)
1207{
1208 struct i2c_client *client = to_i2c_client(dev);
1209 struct w83795_data *data = i2c_get_clientdata(client);
1210 struct sensor_device_attribute_2 *sensor_attr =
1211 to_sensor_dev_attr_2(attr);
1212 int nr = sensor_attr->nr;
1213 int index = sensor_attr->index;
1214 unsigned long val;
1215
1216 if (strict_strtoul(buf, 10, &val) < 0)
1217 return -EINVAL;
1218 val /= 1000;
1219
1220 mutex_lock(&data->update_lock);
1221 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1222 data->sf4_reg[index][SF4_TEMP][nr] = val;
1223 mutex_unlock(&data->update_lock);
1224
1225 return count;
1226}
1227
1228
1229static ssize_t
1230show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1231{
1232 struct sensor_device_attribute_2 *sensor_attr =
1233 to_sensor_dev_attr_2(attr);
1234 int nr = sensor_attr->nr;
1235 int index = sensor_attr->index;
1236 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1237 long temp = temp_from_reg(data->temp[index][nr]);
792d376b 1238
eb02755a 1239 if (nr == TEMP_READ)
a654b9d4 1240 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1241 return sprintf(buf, "%ld\n", temp);
1242}
1243
1244static ssize_t
1245store_temp(struct device *dev, struct device_attribute *attr,
1246 const char *buf, size_t count)
1247{
1248 struct sensor_device_attribute_2 *sensor_attr =
1249 to_sensor_dev_attr_2(attr);
1250 int nr = sensor_attr->nr;
1251 int index = sensor_attr->index;
1252 struct i2c_client *client = to_i2c_client(dev);
1253 struct w83795_data *data = i2c_get_clientdata(client);
1254 long tmp;
1255
1256 if (strict_strtol(buf, 10, &tmp) < 0)
1257 return -EINVAL;
1258
1259 mutex_lock(&data->update_lock);
1260 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1261 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1262 mutex_unlock(&data->update_lock);
1263 return count;
1264}
1265
1266
1267static ssize_t
1268show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1269{
21fc9775 1270 struct w83795_data *data = dev_get_drvdata(dev);
39deb699 1271 int tmp;
792d376b 1272
39deb699
JD		 1273 if (data->enable_dts & 2)
1274 tmp = 5;
1275 else
1276 tmp = 6;
792d376b
WS		 1277
1278 return sprintf(buf, "%d\n", tmp);
1279}
1280
1281static ssize_t
1282show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1283{
1284 struct sensor_device_attribute_2 *sensor_attr =
1285 to_sensor_dev_attr_2(attr);
1286 int index = sensor_attr->index;
1287 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1288 long temp = temp_from_reg(data->dts[index]);
792d376b 1289
a654b9d4 1290 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1291 return sprintf(buf, "%ld\n", temp);
1292}
1293
1294static ssize_t
1295show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1296{
1297 struct sensor_device_attribute_2 *sensor_attr =
1298 to_sensor_dev_attr_2(attr);
1299 int nr = sensor_attr->nr;
21fc9775 1300 struct w83795_data *data = dev_get_drvdata(dev);
dd127f5c 1301 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1302
792d376b
WS		 1303 return sprintf(buf, "%ld\n", temp);
1304}
1305
1306static ssize_t
1307store_dts_ext(struct device *dev, struct device_attribute *attr,
1308 const char *buf, size_t count)
1309{
1310 struct sensor_device_attribute_2 *sensor_attr =
1311 to_sensor_dev_attr_2(attr);
1312 int nr = sensor_attr->nr;
1313 struct i2c_client *client = to_i2c_client(dev);
1314 struct w83795_data *data = i2c_get_clientdata(client);
1315 long tmp;
1316
1317 if (strict_strtol(buf, 10, &tmp) < 0)
1318 return -EINVAL;
1319
1320 mutex_lock(&data->update_lock);
1321 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1322 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1323 mutex_unlock(&data->update_lock);
1324 return count;
1325}
1326
1327
792d376b
WS		 1328static ssize_t
1329show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1330{
21fc9775 1331 struct w83795_data *data = dev_get_drvdata(dev);
792d376b
WS		 1332 struct sensor_device_attribute_2 *sensor_attr =
1333 to_sensor_dev_attr_2(attr);
1334 int index = sensor_attr->index;
39deb699 1335 int tmp;
792d376b 1336
39deb699
JD		 1337 if (data->temp_mode & (1 << index))
1338 tmp = 3; /* Thermal diode */
1339 else
1340 tmp = 4; /* Thermistor */
792d376b
WS		 1341
1342 return sprintf(buf, "%d\n", tmp);
1343}
1344
39deb699 1345/* Only for temp1-4 (temp5-6 can only be thermistor) */
792d376b
WS		 1346static ssize_t
1347store_temp_mode(struct device *dev, struct device_attribute *attr,
1348 const char *buf, size_t count)
1349{
1350 struct i2c_client *client = to_i2c_client(dev);
1351 struct w83795_data *data = i2c_get_clientdata(client);
1352 struct sensor_device_attribute_2 *sensor_attr =
1353 to_sensor_dev_attr_2(attr);
1354 int index = sensor_attr->index;
39deb699 1355 int reg_shift;
792d376b
WS		 1356 unsigned long val;
1357 u8 tmp;
792d376b
WS		 1358
1359 if (strict_strtoul(buf, 10, &val) < 0)
1360 return -EINVAL;
1361 if ((val != 4) && (val != 3))
1362 return -EINVAL;
792d376b
WS		 1363
1364 mutex_lock(&data->update_lock);
1365 if (val == 3) {
39deb699
JD		 1366 /* Thermal diode */
1367 val = 0x01;
792d376b
WS		 1368 data->temp_mode |= 1 << index;
1369 } else if (val == 4) {
39deb699
JD		 1370 /* Thermistor */
1371 val = 0x03;
1372 data->temp_mode &= ~(1 << index);
792d376b
WS		 1373 }
1374
39deb699
JD		 1375 reg_shift = 2 * index;
1376 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1377 tmp &= ~(0x03 << reg_shift);
1378 tmp |= val << reg_shift;
1379 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
792d376b
WS		 1380
1381 mutex_unlock(&data->update_lock);
1382 return count;
1383}
1384
1385
1386/* show/store VIN */
1387static ssize_t
1388show_in(struct device *dev, struct device_attribute *attr, char *buf)
1389{
1390 struct sensor_device_attribute_2 *sensor_attr =
1391 to_sensor_dev_attr_2(attr);
1392 int nr = sensor_attr->nr;
1393 int index = sensor_attr->index;
1394 struct w83795_data *data = w83795_update_device(dev);
1395 u16 val = data->in[index][nr];
1396 u8 lsb_idx;
1397
1398 switch (nr) {
1399 case IN_READ:
1400 /* calculate this value again by sensors as sensors3.conf */
1401 if ((index >= 17) &&
6f9dfd85 1402 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1403 val *= 8;
1404 break;
1405 case IN_MAX:
1406 case IN_LOW:
1407 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1408 val <<= 2;
1409 val |= (data->in_lsb[lsb_idx][nr] >>
5d2cd958 1410 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
792d376b 1411 if ((index >= 17) &&
6f9dfd85 1412 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1413 val *= 8;
1414 break;
1415 }
1416 val = in_from_reg(index, val);
1417
1418 return sprintf(buf, "%d\n", val);
1419}
1420
1421static ssize_t
1422store_in(struct device *dev, struct device_attribute *attr,
1423 const char *buf, size_t count)
1424{
1425 struct sensor_device_attribute_2 *sensor_attr =
1426 to_sensor_dev_attr_2(attr);
1427 int nr = sensor_attr->nr;
1428 int index = sensor_attr->index;
1429 struct i2c_client *client = to_i2c_client(dev);
1430 struct w83795_data *data = i2c_get_clientdata(client);
1431 unsigned long val;
1432 u8 tmp;
1433 u8 lsb_idx;
1434
1435 if (strict_strtoul(buf, 10, &val) < 0)
1436 return -EINVAL;
1437 val = in_to_reg(index, val);
1438
1439 if ((index >= 17) &&
6f9dfd85 1440 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1441 val /= 8;
1442 val = SENSORS_LIMIT(val, 0, 0x3FF);
1443 mutex_lock(&data->update_lock);
1444
1445 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1446 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1447 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1448 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1449 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1450 data->in_lsb[lsb_idx][nr] = tmp;
1451
1452 tmp = (val >> 2) & 0xff;
1453 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1454 data->in[index][nr] = tmp;
1455
1456 mutex_unlock(&data->update_lock);
1457 return count;
1458}
1459
1460
00030af2 1461#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1462static ssize_t
1463show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1464{
1465 struct sensor_device_attribute_2 *sensor_attr =
1466 to_sensor_dev_attr_2(attr);
1467 int nr = sensor_attr->nr;
1bb3450c 1468 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1469 u16 val = data->setup_pwm[nr];
1470
1471 switch (nr) {
1472 case SETUP_PWM_UPTIME:
1473 case SETUP_PWM_DOWNTIME:
1474 val = time_from_reg(val);
1475 break;
1476 }
1477
1478 return sprintf(buf, "%d\n", val);
1479}
1480
1481static ssize_t
1482store_sf_setup(struct device *dev, struct device_attribute *attr,
1483 const char *buf, size_t count)
1484{
1485 struct sensor_device_attribute_2 *sensor_attr =
1486 to_sensor_dev_attr_2(attr);
1487 int nr = sensor_attr->nr;
1488 struct i2c_client *client = to_i2c_client(dev);
1489 struct w83795_data *data = i2c_get_clientdata(client);
1490 unsigned long val;
1491
1492 if (strict_strtoul(buf, 10, &val) < 0)
1493 return -EINVAL;
1494
1495 switch (nr) {
1496 case SETUP_PWM_DEFAULT:
1497 val = SENSORS_LIMIT(val, 0, 0xff);
1498 break;
1499 case SETUP_PWM_UPTIME:
1500 case SETUP_PWM_DOWNTIME:
1501 val = time_to_reg(val);
1502 if (val == 0)
1503 return -EINVAL;
1504 break;
1505 }
1506
1507 mutex_lock(&data->update_lock);
1508 data->setup_pwm[nr] = val;
1509 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1510 mutex_unlock(&data->update_lock);
1511 return count;
1512}
00030af2 1513#endif
792d376b
WS		 1514
1515
1516#define NOT_USED -1
1517
0e256018
JD		 1518/* Don't change the attribute order, _max and _min are accessed by index
1519 * somewhere else in the code */
87df0dad 1520#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1521 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1522 IN_READ, index), \
1523 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1524 store_in, IN_MAX, index), \
1525 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1526 store_in, IN_LOW, index), \
1527 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1528 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1529 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1530 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1531 index + ((index > 14) ? 1 : 0)) }
792d376b 1532
87df0dad 1533#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1534 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1535 NULL, FAN_INPUT, index - 1), \
1536 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1537 show_fan, store_fan_min, FAN_MIN, index - 1), \
1538 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1539 NULL, ALARM_STATUS, index + 31), \
1540 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1541 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1542
b5f6a90a 1543#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1544 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1545 store_pwm, PWM_OUTPUT, index - 1), \
1546 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1547 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1548 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1549 show_pwm, store_pwm, PWM_START, index - 1), \
1550 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1551 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1552 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1553 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1554 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e
JD		 1555 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1556 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1557 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1558
87df0dad 1559#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1560 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1561 show_dts_mode, NULL, NOT_USED, index - 7), \
1562 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1563 NULL, NOT_USED, index - 7), \
a0ce402f 1564 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1565 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1566 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1567 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1568 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1569 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1570 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1571 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1572 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1573 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1574 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1575 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1576
87df0dad 1577#define SENSOR_ATTR_TEMP(index) { \
39deb699 1578 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
792d376b
WS		 1579 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1580 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1581 NULL, TEMP_READ, index - 1), \
a0ce402f 1582 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1583 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1584 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1585 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1586 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1587 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1588 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1589 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1590 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1591 show_alarm_beep, NULL, ALARM_STATUS, \
1592 index + (index > 4 ? 11 : 17)), \
1593 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1594 show_alarm_beep, store_beep, BEEP_ENABLE, \
1595 index + (index > 4 ? 11 : 17)), \
1596 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1597 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1598 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1599 show_temp_pwm_enable, store_temp_pwm_enable, \
1600 TEMP_PWM_ENABLE, index - 1), \
1601 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1602 show_temp_pwm_enable, store_temp_pwm_enable, \
1603 TEMP_PWM_FAN_MAP, index - 1), \
1604 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1605 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1606 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1607 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1608 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1609 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1610 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1611 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1612 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1613 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1614 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1615 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1616 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1617 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1618 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1619 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1620 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1621 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1622 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1623 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1624 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1625 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1626 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1627 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1628 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1629 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1630 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1631 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1632 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1633 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1634 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1635 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1636 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1637 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1638 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1639 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1640
1641
87df0dad 1642static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1643 SENSOR_ATTR_IN(0),
1644 SENSOR_ATTR_IN(1),
1645 SENSOR_ATTR_IN(2),
1646 SENSOR_ATTR_IN(3),
1647 SENSOR_ATTR_IN(4),
1648 SENSOR_ATTR_IN(5),
1649 SENSOR_ATTR_IN(6),
1650 SENSOR_ATTR_IN(7),
1651 SENSOR_ATTR_IN(8),
1652 SENSOR_ATTR_IN(9),
1653 SENSOR_ATTR_IN(10),
1654 SENSOR_ATTR_IN(11),
1655 SENSOR_ATTR_IN(12),
1656 SENSOR_ATTR_IN(13),
1657 SENSOR_ATTR_IN(14),
1658 SENSOR_ATTR_IN(15),
1659 SENSOR_ATTR_IN(16),
1660 SENSOR_ATTR_IN(17),
1661 SENSOR_ATTR_IN(18),
1662 SENSOR_ATTR_IN(19),
1663 SENSOR_ATTR_IN(20),
1664};
1665
86ef4d2f 1666static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1667 SENSOR_ATTR_FAN(1),
1668 SENSOR_ATTR_FAN(2),
1669 SENSOR_ATTR_FAN(3),
1670 SENSOR_ATTR_FAN(4),
1671 SENSOR_ATTR_FAN(5),
1672 SENSOR_ATTR_FAN(6),
1673 SENSOR_ATTR_FAN(7),
1674 SENSOR_ATTR_FAN(8),
1675 SENSOR_ATTR_FAN(9),
1676 SENSOR_ATTR_FAN(10),
1677 SENSOR_ATTR_FAN(11),
1678 SENSOR_ATTR_FAN(12),
1679 SENSOR_ATTR_FAN(13),
1680 SENSOR_ATTR_FAN(14),
1681};
1682
86ef4d2f 1683static const struct sensor_device_attribute_2 w83795_temp[][29] = {
792d376b
WS		 1684 SENSOR_ATTR_TEMP(1),
1685 SENSOR_ATTR_TEMP(2),
1686 SENSOR_ATTR_TEMP(3),
1687 SENSOR_ATTR_TEMP(4),
1688 SENSOR_ATTR_TEMP(5),
1689 SENSOR_ATTR_TEMP(6),
1690};
1691
86ef4d2f 1692static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1693 SENSOR_ATTR_DTS(7),
1694 SENSOR_ATTR_DTS(8),
1695 SENSOR_ATTR_DTS(9),
1696 SENSOR_ATTR_DTS(10),
1697 SENSOR_ATTR_DTS(11),
1698 SENSOR_ATTR_DTS(12),
1699 SENSOR_ATTR_DTS(13),
1700 SENSOR_ATTR_DTS(14),
1701};
1702
86ef4d2f 1703static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
b5f6a90a
JD		 1704 SENSOR_ATTR_PWM(1),
1705 SENSOR_ATTR_PWM(2),
792d376b
WS		 1706 SENSOR_ATTR_PWM(3),
1707 SENSOR_ATTR_PWM(4),
1708 SENSOR_ATTR_PWM(5),
1709 SENSOR_ATTR_PWM(6),
1710 SENSOR_ATTR_PWM(7),
1711 SENSOR_ATTR_PWM(8),
1712};
1713
86ef4d2f 1714static const struct sensor_device_attribute_2 sda_single_files[] = {
24377101 1715 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
792d376b 1716 store_chassis_clear, ALARM_STATUS, 46),
24377101
JD		 1717 SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
1718 store_beep, BEEP_ENABLE, 46),
02728ffe
JD		 1719 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1720 store_beep, BEEP_ENABLE, 47),
00030af2 1721#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1722 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1723 store_fanin, FANIN_TOL, NOT_USED),
1724 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1725 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1726 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1727 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1728 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1729 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
00030af2 1730#endif
792d376b
WS		 1731};
1732
1733/*
1734 * Driver interface
1735 */
1736
1737static void w83795_init_client(struct i2c_client *client)
1738{
01879a85
JD		 1739 struct w83795_data *data = i2c_get_clientdata(client);
1740 static const u16 clkin[4] = { /* in kHz */
1741 14318, 24000, 33333, 48000
1742 };
80646b95
JD		 1743 u8 config;
1744
792d376b
WS		 1745 if (reset)
1746 w83795_write(client, W83795_REG_CONFIG, 0x80);
1747
80646b95
JD		 1748 /* Start monitoring if needed */
1749 config = w83795_read(client, W83795_REG_CONFIG);
1750 if (!(config & W83795_REG_CONFIG_START)) {
1751 dev_info(&client->dev, "Enabling monitoring operations\n");
1752 w83795_write(client, W83795_REG_CONFIG,
1753 config | W83795_REG_CONFIG_START);
1754 }
01879a85
JD		 1755
1756 data->clkin = clkin[(config >> 3) & 0x3];
1757 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1758}
1759
2be381de
JD		 1760static int w83795_get_device_id(struct i2c_client *client)
1761{
1762 int device_id;
1763
1764 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1765
1766 /* Special case for rev. A chips; can't be checked first because later
1767 revisions emulate this for compatibility */
1768 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1769 int alt_id;
1770
1771 alt_id = i2c_smbus_read_byte_data(client,
1772 W83795_REG_DEVICEID_A);
1773 if (alt_id == 0x50)
1774 device_id = alt_id;
1775 }
1776
1777 return device_id;
1778}
1779
792d376b
WS		 1780/* Return 0 if detection is successful, -ENODEV otherwise */
1781static int w83795_detect(struct i2c_client *client,
1782 struct i2c_board_info *info)
1783{
2be381de 1784 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1785 struct i2c_adapter *adapter = client->adapter;
1786 unsigned short address = client->addr;
093d1a47 1787 const char *chip_name;
792d376b
WS		 1788
1789 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1790 return -ENODEV;
1791 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1792 if (bank < 0 || (bank & 0x7c)) {
1793 dev_dbg(&adapter->dev,
1794 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1795 address, "bank");
1796 return -ENODEV;
1797 }
792d376b 1798
792d376b 1799 /* Check Nuvoton vendor ID */
2be381de
JD		 1800 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1801 expected = bank & 0x80 ? 0x5c : 0xa3;
1802 if (vendor_id != expected) {
1803 dev_dbg(&adapter->dev,
1804 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1805 address, "vendor id");
792d376b
WS		 1806 return -ENODEV;
1807 }
1808
2be381de
JD		 1809 /* Check device ID */
1810 device_id = w83795_get_device_id(client) |
1811 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1812 if ((device_id >> 4) != 0x795) {
1813 dev_dbg(&adapter->dev,
1814 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1815 address, "device id\n");
792d376b
WS		 1816 return -ENODEV;
1817 }
1818
2be381de
JD		 1819 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1820 should match */
1821 if ((bank & 0x07) == 0) {
1822 i2c_addr = i2c_smbus_read_byte_data(client,
1823 W83795_REG_I2C_ADDR);
1824 if ((i2c_addr & 0x7f) != address) {
1825 dev_dbg(&adapter->dev,
1826 "w83795: Detection failed at addr 0x%02hx, "
1827 "check %s\n", address, "i2c addr");
1828 return -ENODEV;
1829 }
792d376b
WS		 1830 }
1831
093d1a47
JD		 1832 /* Check 795 chip type: 795G or 795ADG
1833 Usually we don't write to chips during detection, but here we don't
1834 quite have the choice; hopefully it's OK, we are about to return
1835 success anyway */
1836 if ((bank & 0x07) != 0)
1837 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1838 bank & ~0x07);
2be381de
JD		 1839 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1840 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1841 chip_name = "w83795adg";
2be381de 1842 else
093d1a47 1843 chip_name = "w83795g";
792d376b 1844
093d1a47 1845 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1846 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1847 'A' + (device_id & 0xf), address);
792d376b
WS		 1848
1849 return 0;
1850}
1851
6f3dcde9
JD		 1852static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1853 const struct device_attribute *))
892514a6
JD		 1854{
1855 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1856 int err, i, j;
892514a6
JD		 1857
1858 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1859 if (!(data->has_in & (1 << i)))
892514a6 1860 continue;
87df0dad
JD		 1861 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1862 err = fn(dev, &w83795_in[i][j].dev_attr);
1863 if (err)
1864 return err;
1865 }
892514a6
JD		 1866 }
1867
1868 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1869 if (!(data->has_fan & (1 << i)))
892514a6 1870 continue;
87df0dad
JD		 1871 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1872 err = fn(dev, &w83795_fan[i][j].dev_attr);
1873 if (err)
1874 return err;
1875 }
892514a6
JD		 1876 }
1877
1878 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1879 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1880 if (err)
1881 return err;
1882 }
1883
00030af2 1884#ifdef CONFIG_SENSORS_W83795_FANCTRL
b5f6a90a
JD		 1885 for (i = 0; i < data->has_pwm; i++) {
1886 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1887 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1888 if (err)
1889 return err;
1890 }
1891 }
00030af2 1892#endif
892514a6
JD		 1893
1894 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1895 if (!(data->has_temp & (1 << i)))
892514a6 1896 continue;
00030af2 1897#ifdef CONFIG_SENSORS_W83795_FANCTRL
87df0dad 1898 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
00030af2
JD		 1899#else
1900 for (j = 0; j < 8; j++) {
1901#endif
87df0dad
JD		 1902 err = fn(dev, &w83795_temp[i][j].dev_attr);
1903 if (err)
1904 return err;
1905 }
892514a6
JD		 1906 }
1907
eb02755a 1908 if (data->enable_dts) {
892514a6 1909 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 1910 if (!(data->has_dts & (1 << i)))
892514a6 1911 continue;
87df0dad
JD		 1912 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1913 err = fn(dev, &w83795_dts[i][j].dev_attr);
1914 if (err)
1915 return err;
1916 }
892514a6
JD		 1917 }
1918 }
1919
892514a6
JD		 1920 return 0;
1921}
1922
6f3dcde9
JD		 1923/* We need a wrapper that fits in w83795_handle_files */
1924static int device_remove_file_wrapper(struct device *dev,
1925 const struct device_attribute *attr)
2fa09878 1926{
6f3dcde9
JD		 1927 device_remove_file(dev, attr);
1928 return 0;
2fa09878
JD		 1929}
1930
0e256018
JD		 1931static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1932{
1933 struct w83795_data *data = i2c_get_clientdata(client);
1934 u8 vid_ctl;
1935 int i, err_max, err_min;
1936
1937 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1938
1939 /* Return immediately if VRM isn't configured */
1940 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1941 return;
1942
1943 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1944 for (i = 0; i < 2; i++) {
1945 if (!(data->has_dyn_in & (1 << i)))
1946 continue;
1947
1948 /* Voltage limits in dynamic mode, switch to read-only */
1949 err_max = sysfs_chmod_file(&client->dev.kobj,
1950 &w83795_in[i][2].dev_attr.attr,
1951 S_IRUGO);
1952 err_min = sysfs_chmod_file(&client->dev.kobj,
1953 &w83795_in[i][3].dev_attr.attr,
1954 S_IRUGO);
1955 if (err_max || err_min)
1956 dev_warn(&client->dev, "Failed to set in%d limits "
1957 "read-only (%d, %d)\n", i, err_max, err_min);
1958 else
1959 dev_info(&client->dev, "in%d limits set dynamically "
1960 "from VID\n", i);
1961 }
1962}
1963
71caf46f
JD		 1964/* Check pins that can be used for either temperature or voltage monitoring */
1965static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1966 int temp_chan, int in_chan)
1967{
1968 /* config is a 2-bit value */
1969 switch (config) {
1970 case 0x2: /* Voltage monitoring */
1971 data->has_in |= 1 << in_chan;
1972 break;
1973 case 0x1: /* Thermal diode */
1974 if (temp_chan >= 4)
1975 break;
1976 data->temp_mode |= 1 << temp_chan;
1977 /* fall through */
1978 case 0x3: /* Thermistor */
1979 data->has_temp |= 1 << temp_chan;
1980 break;
1981 }
1982}
1983
792d376b
WS		 1984static int w83795_probe(struct i2c_client *client,
1985 const struct i2c_device_id *id)
1986{
1987 int i;
1988 u8 tmp;
1989 struct device *dev = &client->dev;
1990 struct w83795_data *data;
71caf46f 1991 int err;
792d376b
WS		 1992
1993 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1994 if (!data) {
1995 err = -ENOMEM;
1996 goto exit;
1997 }
1998
1999 i2c_set_clientdata(client, data);
093d1a47 2000 data->chip_type = id->driver_data;
792d376b
WS		 2001 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2002 mutex_init(&data->update_lock);
2003
2004 /* Initialize the chip */
2005 w83795_init_client(client);
2006
71caf46f
JD		 2007 /* Check which voltages and fans are present */
2008 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
2009 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
2010 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
2011 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 2012
71caf46f 2013 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 2014 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2015 if (tmp & 0x20)
2016 data->enable_dts = 1;
71caf46f
JD		 2017 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2018 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 2019 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 2020 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2021 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2022 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2023 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 2024
2025 /* Check DTS enable status */
71caf46f 2026 if (data->enable_dts) {
792d376b
WS		 2027 if (1 & w83795_read(client, W83795_REG_DTSC))
2028 data->enable_dts |= 2;
2029 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2030 }
2031
54891a3c
JD		 2032 /* Report PECI Tbase values */
2033 if (data->enable_dts == 1) {
2034 for (i = 0; i < 8; i++) {
2035 if (!(data->has_dts & (1 << i)))
2036 continue;
2037 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2038 dev_info(&client->dev,
2039 "PECI agent %d Tbase temperature: %u\n",
2040 i + 1, (unsigned int)tmp & 0x7f);
2041 }
2042 }
2043
792d376b 2044 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
792d376b
WS		 2045
2046 /* pwm and smart fan */
2047 if (data->chip_type == w83795g)
2048 data->has_pwm = 8;
2049 else
2050 data->has_pwm = 2;
792d376b 2051
6f3dcde9 2052 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2053 if (err)
2054 goto exit_remove;
792d376b 2055
0e256018
JD		 2056 if (data->chip_type == w83795g)
2057 w83795_check_dynamic_in_limits(client);
2058
792d376b
WS		 2059 data->hwmon_dev = hwmon_device_register(dev);
2060 if (IS_ERR(data->hwmon_dev)) {
2061 err = PTR_ERR(data->hwmon_dev);
2062 goto exit_remove;
2063 }
2064
2065 return 0;
2066
792d376b 2067exit_remove:
6f3dcde9 2068 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2069 kfree(data);
2070exit:
2071 return err;
2072}
2073
2074static int w83795_remove(struct i2c_client *client)
2075{
2076 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2077
2078 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2079 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2080 kfree(data);
2081
2082 return 0;
2083}
2084
2085
2086static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2087 { "w83795g", w83795g },
2088 { "w83795adg", w83795adg },
792d376b
WS		 2089 { }
2090};
2091MODULE_DEVICE_TABLE(i2c, w83795_id);
2092
2093static struct i2c_driver w83795_driver = {
2094 .driver = {
2095 .name = "w83795",
2096 },
2097 .probe = w83795_probe,
2098 .remove = w83795_remove,
2099 .id_table = w83795_id,
2100
2101 .class = I2C_CLASS_HWMON,
2102 .detect = w83795_detect,
2103 .address_list = normal_i2c,
2104};
2105
2106static int __init sensors_w83795_init(void)
2107{
2108 return i2c_add_driver(&w83795_driver);
2109}
2110
2111static void __exit sensors_w83795_exit(void)
2112{
2113 i2c_del_driver(&w83795_driver);
2114}
2115
e3760b43 2116MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
315bacfd 2117MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2118MODULE_LICENSE("GPL");
2119
2120module_init(sensors_w83795_init);
2121module_exit(sensors_w83795_exit);
Clone of davem's net-next-2.6 tree