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[net-next-2.6.git] / drivers / hwmon / w83793.c
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6800c3d0
RM		 1/*
2 w83793.c - Linux kernel driver for hardware monitoring
3 Copyright (C) 2006 Winbond Electronics Corp.
4 Yuan Mu
5 Rudolf Marek <r.marek@assembler.cz>
5852f960
SA		 6 Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG.
7 Watchdog driver part
8 (Based partially on fschmd driver,
9 Copyright 2007-2008 by Hans de Goede)
6800c3d0
RM		 10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation - version 2.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 02110-1301 USA.
24*/
25
26/*
27 Supports following chips:
28
29 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
30 w83793 10 12 8 6 0x7b 0x5ca3 yes no
31*/
32
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/i2c.h>
37#include <linux/hwmon.h>
38#include <linux/hwmon-vid.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
41#include <linux/mutex.h>
5852f960
SA		 42#include <linux/fs.h>
43#include <linux/watchdog.h>
44#include <linux/miscdevice.h>
45#include <linux/uaccess.h>
46#include <linux/kref.h>
47#include <linux/notifier.h>
48#include <linux/reboot.h>
49
50/* Default values */
51#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 52
53/* Addresses to scan */
613655fa 54static DEFINE_MUTEX(watchdog_mutex);
25e9c86d
MH		 55static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
56 I2C_CLIENT_END };
6800c3d0
RM		 57
58/* Insmod parameters */
3aed198c
JD		 59
60static unsigned short force_subclients[4];
61module_param_array(force_subclients, short, NULL, 0);
62MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
6800c3d0
RM		 63 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
64
65static int reset;
66module_param(reset, bool, 0);
67MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
68
5852f960
SA		 69static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
70module_param(timeout, int, 0);
71MODULE_PARM_DESC(timeout,
72 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
73 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
74
75static int nowayout = WATCHDOG_NOWAYOUT;
76module_param(nowayout, int, 0);
77MODULE_PARM_DESC(nowayout,
78 "Watchdog cannot be stopped once started (default="
79 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
80
6800c3d0
RM		 81/*
82 Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
83 as ID, Bank Select registers
84*/
85#define W83793_REG_BANKSEL 0x00
86#define W83793_REG_VENDORID 0x0d
87#define W83793_REG_CHIPID 0x0e
88#define W83793_REG_DEVICEID 0x0f
89
90#define W83793_REG_CONFIG 0x40
91#define W83793_REG_MFC 0x58
92#define W83793_REG_FANIN_CTRL 0x5c
93#define W83793_REG_FANIN_SEL 0x5d
94#define W83793_REG_I2C_ADDR 0x0b
95#define W83793_REG_I2C_SUBADDR 0x0c
96#define W83793_REG_VID_INA 0x05
97#define W83793_REG_VID_INB 0x06
98#define W83793_REG_VID_LATCHA 0x07
99#define W83793_REG_VID_LATCHB 0x08
100#define W83793_REG_VID_CTRL 0x59
101
5852f960
SA		 102#define W83793_REG_WDT_LOCK 0x01
103#define W83793_REG_WDT_ENABLE 0x02
104#define W83793_REG_WDT_STATUS 0x03
105#define W83793_REG_WDT_TIMEOUT 0x04
106
6800c3d0
RM		 107static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
108
109#define TEMP_READ 0
110#define TEMP_CRIT 1
111#define TEMP_CRIT_HYST 2
112#define TEMP_WARN 3
113#define TEMP_WARN_HYST 4
114/* only crit and crit_hyst affect real-time alarm status
115 current crit crit_hyst warn warn_hyst */
116static u16 W83793_REG_TEMP[][5] = {
117 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
118 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
119 {0x1e, 0x80, 0x81, 0x82, 0x83},
120 {0x1f, 0x84, 0x85, 0x86, 0x87},
121 {0x20, 0x88, 0x89, 0x8a, 0x8b},
122 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
123};
124
125#define W83793_REG_TEMP_LOW_BITS 0x22
126
127#define W83793_REG_BEEP(index) (0x53 + (index))
128#define W83793_REG_ALARM(index) (0x4b + (index))
129
130#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
131#define W83793_REG_IRQ_CTRL 0x50
132#define W83793_REG_OVT_CTRL 0x51
133#define W83793_REG_OVT_BEEP 0x52
134
135#define IN_READ 0
136#define IN_MAX 1
137#define IN_LOW 2
138static const u16 W83793_REG_IN[][3] = {
139 /* Current, High, Low */
140 {0x10, 0x60, 0x61}, /* Vcore A */
141 {0x11, 0x62, 0x63}, /* Vcore B */
142 {0x12, 0x64, 0x65}, /* Vtt */
143 {0x14, 0x6a, 0x6b}, /* VSEN1 */
144 {0x15, 0x6c, 0x6d}, /* VSEN2 */
145 {0x16, 0x6e, 0x6f}, /* +3VSEN */
146 {0x17, 0x70, 0x71}, /* +12VSEN */
147 {0x18, 0x72, 0x73}, /* 5VDD */
148 {0x19, 0x74, 0x75}, /* 5VSB */
149 {0x1a, 0x76, 0x77}, /* VBAT */
150};
151
152/* Low Bits of Vcore A/B Vtt Read/High/Low */
153static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
154static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 155static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 156
157#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
158#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
159
160#define W83793_REG_PWM_DEFAULT 0xb2
161#define W83793_REG_PWM_ENABLE 0x207
162#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
163#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
164#define W83793_REG_TEMP_CRITICAL 0xc5
165
166#define PWM_DUTY 0
167#define PWM_START 1
168#define PWM_NONSTOP 2
5aebefb0 169#define PWM_STOP_TIME 3
6800c3d0
RM		 170#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
171 (nr) == 1 ? 0x220 : 0x218) + (index))
172
173/* bit field, fan1 is bit0, fan2 is bit1 ... */
174#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
175#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
176#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
177#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
178#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
179#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
180
181static inline unsigned long FAN_FROM_REG(u16 val)
182{
183 if ((val >= 0xfff) || (val == 0))
184 return 0;
185 return (1350000UL / val);
186}
187
188static inline u16 FAN_TO_REG(long rpm)
189{
190 if (rpm <= 0)
191 return 0x0fff;
192 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
193}
194
195static inline unsigned long TIME_FROM_REG(u8 reg)
196{
197 return (reg * 100);
198}
199
200static inline u8 TIME_TO_REG(unsigned long val)
201{
202 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
203}
204
205static inline long TEMP_FROM_REG(s8 reg)
206{
207 return (reg * 1000);
208}
209
210static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
211{
212 return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max);
213}
214
215struct w83793_data {
6800c3d0 216 struct i2c_client *lm75[2];
1beeffe4 217 struct device *hwmon_dev;
6800c3d0
RM		 218 struct mutex update_lock;
219 char valid; /* !=0 if following fields are valid */
220 unsigned long last_updated; /* In jiffies */
221 unsigned long last_nonvolatile; /* In jiffies, last time we update the
222 nonvolatile registers */
223
224 u8 bank;
225 u8 vrm;
226 u8 vid[2];
227 u8 in[10][3]; /* Register value, read/high/low */
228 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
229
230 u16 has_fan; /* Only fan1- fan5 has own pins */
231 u16 fan[12]; /* Register value combine */
232 u16 fan_min[12]; /* Register value combine */
233
234 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
235 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
236 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
237 byte 1: Temp R1,R2 mode, each has 1 bit */
238 u8 temp_critical; /* If reached all fan will be at full speed */
239 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
240
241 u8 has_pwm;
46bed4df 242 u8 has_temp;
c70a8c34 243 u8 has_vid;
6800c3d0
RM		 244 u8 pwm_enable; /* Register value, each Temp has 1 bit */
245 u8 pwm_uptime; /* Register value */
246 u8 pwm_downtime; /* Register value */
247 u8 pwm_default; /* All fan default pwm, next poweron valid */
248 u8 pwm[8][3]; /* Register value */
249 u8 pwm_stop_time[8];
250 u8 temp_cruise[6];
251
252 u8 alarms[5]; /* realtime status registers */
253 u8 beeps[5];
254 u8 beep_enable;
255 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
256 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
257 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 258
259 /* watchdog */
260 struct i2c_client *client;
261 struct mutex watchdog_lock;
262 struct list_head list; /* member of the watchdog_data_list */
263 struct kref kref;
264 struct miscdevice watchdog_miscdev;
265 unsigned long watchdog_is_open;
266 char watchdog_expect_close;
267 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
268 unsigned int watchdog_caused_reboot;
269 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 270};
271
5852f960
SA		 272/* Somewhat ugly :( global data pointer list with all devices, so that
273 we can find our device data as when using misc_register. There is no
274 other method to get to one's device data from the open file-op and
275 for usage in the reboot notifier callback. */
276static LIST_HEAD(watchdog_data_list);
277
278/* Note this lock not only protect list access, but also data.kref access */
279static DEFINE_MUTEX(watchdog_data_mutex);
280
281/* Release our data struct when we're detached from the i2c client *and* all
282 references to our watchdog device are released */
283static void w83793_release_resources(struct kref *ref)
284{
285 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
286 kfree(data);
287}
288
6800c3d0
RM		 289static u8 w83793_read_value(struct i2c_client *client, u16 reg);
290static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 291static int w83793_probe(struct i2c_client *client,
292 const struct i2c_device_id *id);
310ec792 293static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 294 struct i2c_board_info *info);
295static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 296static void w83793_init_client(struct i2c_client *client);
297static void w83793_update_nonvolatile(struct device *dev);
298static struct w83793_data *w83793_update_device(struct device *dev);
299
a7f13a6e 300static const struct i2c_device_id w83793_id[] = {
1f86df49 301 { "w83793", 0 },
a7f13a6e
JD		 302 { }
303};
304MODULE_DEVICE_TABLE(i2c, w83793_id);
305
6800c3d0 306static struct i2c_driver w83793_driver = {
a7f13a6e 307 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 308 .driver = {
309 .name = "w83793",
310 },
a7f13a6e
JD		 311 .probe = w83793_probe,
312 .remove = w83793_remove,
313 .id_table = w83793_id,
314 .detect = w83793_detect,
c3813d6a 315 .address_list = normal_i2c,
6800c3d0
RM		 316};
317
318static ssize_t
319show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
320{
8f74efe8 321 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 322 return sprintf(buf, "%d\n", data->vrm);
323}
324
325static ssize_t
326show_vid(struct device *dev, struct device_attribute *attr, char *buf)
327{
328 struct w83793_data *data = w83793_update_device(dev);
329 struct sensor_device_attribute_2 *sensor_attr =
330 to_sensor_dev_attr_2(attr);
331 int index = sensor_attr->index;
332
333 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
334}
335
336static ssize_t
337store_vrm(struct device *dev, struct device_attribute *attr,
338 const char *buf, size_t count)
339{
8f74efe8 340 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 341 data->vrm = simple_strtoul(buf, NULL, 10);
342 return count;
343}
344
345#define ALARM_STATUS 0
346#define BEEP_ENABLE 1
347static ssize_t
348show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
349{
350 struct w83793_data *data = w83793_update_device(dev);
351 struct sensor_device_attribute_2 *sensor_attr =
352 to_sensor_dev_attr_2(attr);
353 int nr = sensor_attr->nr;
354 int index = sensor_attr->index >> 3;
355 int bit = sensor_attr->index & 0x07;
356 u8 val;
357
358 if (ALARM_STATUS == nr) {
359 val = (data->alarms[index] >> (bit)) & 1;
360 } else { /* BEEP_ENABLE */
361 val = (data->beeps[index] >> (bit)) & 1;
362 }
363
364 return sprintf(buf, "%u\n", val);
365}
366
367static ssize_t
368store_beep(struct device *dev, struct device_attribute *attr,
369 const char *buf, size_t count)
370{
371 struct i2c_client *client = to_i2c_client(dev);
372 struct w83793_data *data = i2c_get_clientdata(client);
373 struct sensor_device_attribute_2 *sensor_attr =
374 to_sensor_dev_attr_2(attr);
375 int index = sensor_attr->index >> 3;
376 int shift = sensor_attr->index & 0x07;
377 u8 beep_bit = 1 << shift;
378 u8 val;
379
380 val = simple_strtoul(buf, NULL, 10);
381 if (val != 0 && val != 1)
382 return -EINVAL;
383
384 mutex_lock(&data->update_lock);
385 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
386 data->beeps[index] &= ~beep_bit;
387 data->beeps[index] |= val << shift;
388 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
389 mutex_unlock(&data->update_lock);
390
391 return count;
392}
393
394static ssize_t
395show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
396{
397 struct w83793_data *data = w83793_update_device(dev);
398 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
399}
400
401static ssize_t
402store_beep_enable(struct device *dev, struct device_attribute *attr,
403 const char *buf, size_t count)
404{
405 struct i2c_client *client = to_i2c_client(dev);
406 struct w83793_data *data = i2c_get_clientdata(client);
407 u8 val = simple_strtoul(buf, NULL, 10);
408
409 if (val != 0 && val != 1)
410 return -EINVAL;
411
412 mutex_lock(&data->update_lock);
413 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
414 & 0xfd;
415 data->beep_enable |= val << 1;
416 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
417 mutex_unlock(&data->update_lock);
418
419 return count;
420}
421
422/* Write any value to clear chassis alarm */
423static ssize_t
424store_chassis_clear(struct device *dev,
425 struct device_attribute *attr, const char *buf,
426 size_t count)
427{
428 struct i2c_client *client = to_i2c_client(dev);
429 struct w83793_data *data = i2c_get_clientdata(client);
430 u8 val;
431
432 mutex_lock(&data->update_lock);
433 val = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
434 val |= 0x80;
435 w83793_write_value(client, W83793_REG_CLR_CHASSIS, val);
436 mutex_unlock(&data->update_lock);
437 return count;
438}
439
440#define FAN_INPUT 0
441#define FAN_MIN 1
442static ssize_t
443show_fan(struct device *dev, struct device_attribute *attr, char *buf)
444{
445 struct sensor_device_attribute_2 *sensor_attr =
446 to_sensor_dev_attr_2(attr);
447 int nr = sensor_attr->nr;
448 int index = sensor_attr->index;
449 struct w83793_data *data = w83793_update_device(dev);
450 u16 val;
451
452 if (FAN_INPUT == nr) {
453 val = data->fan[index] & 0x0fff;
454 } else {
455 val = data->fan_min[index] & 0x0fff;
456 }
457
458 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
459}
460
461static ssize_t
462store_fan_min(struct device *dev, struct device_attribute *attr,
463 const char *buf, size_t count)
464{
465 struct sensor_device_attribute_2 *sensor_attr =
466 to_sensor_dev_attr_2(attr);
467 int index = sensor_attr->index;
468 struct i2c_client *client = to_i2c_client(dev);
469 struct w83793_data *data = i2c_get_clientdata(client);
470 u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10));
471
472 mutex_lock(&data->update_lock);
473 data->fan_min[index] = val;
474 w83793_write_value(client, W83793_REG_FAN_MIN(index),
475 (val >> 8) & 0xff);
476 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
477 mutex_unlock(&data->update_lock);
478
479 return count;
480}
481
6800c3d0
RM		 482static ssize_t
483show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
484{
485 struct sensor_device_attribute_2 *sensor_attr =
486 to_sensor_dev_attr_2(attr);
487 struct w83793_data *data = w83793_update_device(dev);
488 u16 val;
489 int nr = sensor_attr->nr;
490 int index = sensor_attr->index;
491
492 if (PWM_STOP_TIME == nr)
493 val = TIME_FROM_REG(data->pwm_stop_time[index]);
494 else
495 val = (data->pwm[index][nr] & 0x3f) << 2;
496
497 return sprintf(buf, "%d\n", val);
498}
499
500static ssize_t
501store_pwm(struct device *dev, struct device_attribute *attr,
502 const char *buf, size_t count)
503{
504 struct i2c_client *client = to_i2c_client(dev);
505 struct w83793_data *data = i2c_get_clientdata(client);
506 struct sensor_device_attribute_2 *sensor_attr =
507 to_sensor_dev_attr_2(attr);
508 int nr = sensor_attr->nr;
509 int index = sensor_attr->index;
510 u8 val;
511
512 mutex_lock(&data->update_lock);
513 if (PWM_STOP_TIME == nr) {
514 val = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
515 data->pwm_stop_time[index] = val;
516 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
517 val);
518 } else {
519 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff)
520 >> 2;
521 data->pwm[index][nr] =
522 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
523 data->pwm[index][nr] |= val;
524 w83793_write_value(client, W83793_REG_PWM(index, nr),
525 data->pwm[index][nr]);
526 }
527
528 mutex_unlock(&data->update_lock);
529 return count;
530}
531
532static ssize_t
533show_temp(struct device *dev, struct device_attribute *attr, char *buf)
534{
535 struct sensor_device_attribute_2 *sensor_attr =
536 to_sensor_dev_attr_2(attr);
537 int nr = sensor_attr->nr;
538 int index = sensor_attr->index;
539 struct w83793_data *data = w83793_update_device(dev);
540 long temp = TEMP_FROM_REG(data->temp[index][nr]);
541
542 if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */
543 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
544 temp += temp > 0 ? low : -low;
545 }
546 return sprintf(buf, "%ld\n", temp);
547}
548
549static ssize_t
550store_temp(struct device *dev, struct device_attribute *attr,
551 const char *buf, size_t count)
552{
553 struct sensor_device_attribute_2 *sensor_attr =
554 to_sensor_dev_attr_2(attr);
555 int nr = sensor_attr->nr;
556 int index = sensor_attr->index;
557 struct i2c_client *client = to_i2c_client(dev);
558 struct w83793_data *data = i2c_get_clientdata(client);
559 long tmp = simple_strtol(buf, NULL, 10);
560
561 mutex_lock(&data->update_lock);
562 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
563 w83793_write_value(client, W83793_REG_TEMP[index][nr],
564 data->temp[index][nr]);
565 mutex_unlock(&data->update_lock);
566 return count;
567}
568
569/*
570 TD1-TD4
571 each has 4 mode:(2 bits)
572 0: Stop monitor
573 1: Use internal temp sensor(default)
ddca933b 574 2: Reserved
6800c3d0
RM		 575 3: Use sensor in Intel CPU and get result by PECI
576
577 TR1-TR2
578 each has 2 mode:(1 bit)
579 0: Disable temp sensor monitor
580 1: To enable temp sensors monitor
581*/
582
ddca933b
GJ		 583/* 0 disable, 6 PECI */
584static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 585
586static ssize_t
587show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
588{
589 struct w83793_data *data = w83793_update_device(dev);
590 struct sensor_device_attribute_2 *sensor_attr =
591 to_sensor_dev_attr_2(attr);
592 int index = sensor_attr->index;
593 u8 mask = (index < 4) ? 0x03 : 0x01;
594 u8 shift = (index < 4) ? (2 * index) : (index - 4);
595 u8 tmp;
596 index = (index < 4) ? 0 : 1;
597
598 tmp = (data->temp_mode[index] >> shift) & mask;
599
600 /* for the internal sensor, found out if diode or thermistor */
601 if (tmp == 1) {
602 tmp = index == 0 ? 3 : 4;
603 } else {
604 tmp = TO_TEMP_MODE[tmp];
605 }
606
607 return sprintf(buf, "%d\n", tmp);
608}
609
610static ssize_t
611store_temp_mode(struct device *dev, struct device_attribute *attr,
612 const char *buf, size_t count)
613{
614 struct i2c_client *client = to_i2c_client(dev);
615 struct w83793_data *data = i2c_get_clientdata(client);
616 struct sensor_device_attribute_2 *sensor_attr =
617 to_sensor_dev_attr_2(attr);
618 int index = sensor_attr->index;
619 u8 mask = (index < 4) ? 0x03 : 0x01;
620 u8 shift = (index < 4) ? (2 * index) : (index - 4);
621 u8 val = simple_strtoul(buf, NULL, 10);
622
623 /* transform the sysfs interface values into table above */
ddca933b 624 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 625 val -= 3;
626 } else if ((val == 3 && index < 4)
46bed4df 627 || (val == 4 && index >= 4)) {
6800c3d0
RM		 628 /* transform diode or thermistor into internal enable */
629 val = !!val;
630 } else {
631 return -EINVAL;
632 }
633
634 index = (index < 4) ? 0 : 1;
635 mutex_lock(&data->update_lock);
636 data->temp_mode[index] =
637 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
638 data->temp_mode[index] &= ~(mask << shift);
639 data->temp_mode[index] |= val << shift;
640 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
641 data->temp_mode[index]);
642 mutex_unlock(&data->update_lock);
643
644 return count;
645}
646
647#define SETUP_PWM_DEFAULT 0
648#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
649#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
650#define SETUP_TEMP_CRITICAL 3
651static ssize_t
652show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
653{
654 struct sensor_device_attribute_2 *sensor_attr =
655 to_sensor_dev_attr_2(attr);
656 int nr = sensor_attr->nr;
657 struct w83793_data *data = w83793_update_device(dev);
658 u32 val = 0;
659
660 if (SETUP_PWM_DEFAULT == nr) {
661 val = (data->pwm_default & 0x3f) << 2;
662 } else if (SETUP_PWM_UPTIME == nr) {
663 val = TIME_FROM_REG(data->pwm_uptime);
664 } else if (SETUP_PWM_DOWNTIME == nr) {
665 val = TIME_FROM_REG(data->pwm_downtime);
666 } else if (SETUP_TEMP_CRITICAL == nr) {
667 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
668 }
669
670 return sprintf(buf, "%d\n", val);
671}
672
673static ssize_t
674store_sf_setup(struct device *dev, struct device_attribute *attr,
675 const char *buf, size_t count)
676{
677 struct sensor_device_attribute_2 *sensor_attr =
678 to_sensor_dev_attr_2(attr);
679 int nr = sensor_attr->nr;
680 struct i2c_client *client = to_i2c_client(dev);
681 struct w83793_data *data = i2c_get_clientdata(client);
682
683 mutex_lock(&data->update_lock);
684 if (SETUP_PWM_DEFAULT == nr) {
685 data->pwm_default =
686 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
687 data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL,
688 10),
689 0, 0xff) >> 2;
690 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
691 data->pwm_default);
692 } else if (SETUP_PWM_UPTIME == nr) {
693 data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
694 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
695 w83793_write_value(client, W83793_REG_PWM_UPTIME,
696 data->pwm_uptime);
697 } else if (SETUP_PWM_DOWNTIME == nr) {
698 data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
699 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
700 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
701 data->pwm_downtime);
702 } else { /* SETUP_TEMP_CRITICAL */
703 data->temp_critical =
704 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
705 data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10),
706 0, 0x7f);
707 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
708 data->temp_critical);
709 }
710
711 mutex_unlock(&data->update_lock);
712 return count;
713}
714
715/*
716 Temp SmartFan control
717 TEMP_FAN_MAP
718 Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
719 It's possible two or more temp channels control the same fan, w83793
720 always prefers to pick the most critical request and applies it to
721 the related Fan.
722 It's possible one fan is not in any mapping of 6 temp channels, this
723 means the fan is manual mode
724
725 TEMP_PWM_ENABLE
726 Each temp channel has its own SmartFan mode, and temp channel
727 control fans that are set by TEMP_FAN_MAP
728 0: SmartFanII mode
729 1: Thermal Cruise Mode
730
731 TEMP_CRUISE
732 Target temperature in thermal cruise mode, w83793 will try to turn
733 fan speed to keep the temperature of target device around this
734 temperature.
735
736 TEMP_TOLERANCE
737 If Temp higher or lower than target with this tolerance, w83793
738 will take actions to speed up or slow down the fan to keep the
739 temperature within the tolerance range.
740*/
741
742#define TEMP_FAN_MAP 0
743#define TEMP_PWM_ENABLE 1
744#define TEMP_CRUISE 2
745#define TEMP_TOLERANCE 3
746static ssize_t
747show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
748{
749 struct sensor_device_attribute_2 *sensor_attr =
750 to_sensor_dev_attr_2(attr);
751 int nr = sensor_attr->nr;
752 int index = sensor_attr->index;
753 struct w83793_data *data = w83793_update_device(dev);
754 u32 val;
755
756 if (TEMP_FAN_MAP == nr) {
757 val = data->temp_fan_map[index];
758 } else if (TEMP_PWM_ENABLE == nr) {
759 /* +2 to transfrom into 2 and 3 to conform with sysfs intf */
760 val = ((data->pwm_enable >> index) & 0x01) + 2;
761 } else if (TEMP_CRUISE == nr) {
762 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
763 } else { /* TEMP_TOLERANCE */
764 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
765 val = TEMP_FROM_REG(val & 0x0f);
766 }
767 return sprintf(buf, "%d\n", val);
768}
769
770static ssize_t
771store_sf_ctrl(struct device *dev, struct device_attribute *attr,
772 const char *buf, size_t count)
773{
774 struct sensor_device_attribute_2 *sensor_attr =
775 to_sensor_dev_attr_2(attr);
776 int nr = sensor_attr->nr;
777 int index = sensor_attr->index;
778 struct i2c_client *client = to_i2c_client(dev);
779 struct w83793_data *data = i2c_get_clientdata(client);
780 u32 val;
781
782 mutex_lock(&data->update_lock);
783 if (TEMP_FAN_MAP == nr) {
784 val = simple_strtoul(buf, NULL, 10) & 0xff;
785 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
786 data->temp_fan_map[index] = val;
787 } else if (TEMP_PWM_ENABLE == nr) {
788 val = simple_strtoul(buf, NULL, 10);
789 if (2 == val || 3 == val) {
790 data->pwm_enable =
791 w83793_read_value(client, W83793_REG_PWM_ENABLE);
792 if (val - 2)
793 data->pwm_enable |= 1 << index;
794 else
795 data->pwm_enable &= ~(1 << index);
796 w83793_write_value(client, W83793_REG_PWM_ENABLE,
797 data->pwm_enable);
798 } else {
799 mutex_unlock(&data->update_lock);
800 return -EINVAL;
801 }
802 } else if (TEMP_CRUISE == nr) {
803 data->temp_cruise[index] =
804 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
805 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
806 data->temp_cruise[index] &= 0x80;
807 data->temp_cruise[index] |= val;
808
809 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
810 data->temp_cruise[index]);
811 } else { /* TEMP_TOLERANCE */
812 int i = index >> 1;
813 u8 shift = (index & 0x01) ? 4 : 0;
814 data->tolerance[i] =
815 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
816
817 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f);
818 data->tolerance[i] &= ~(0x0f << shift);
819 data->tolerance[i] |= val << shift;
820 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
821 data->tolerance[i]);
822 }
823
824 mutex_unlock(&data->update_lock);
825 return count;
826}
827
828static ssize_t
829show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
830{
831 struct sensor_device_attribute_2 *sensor_attr =
832 to_sensor_dev_attr_2(attr);
833 int nr = sensor_attr->nr;
834 int index = sensor_attr->index;
835 struct w83793_data *data = w83793_update_device(dev);
836
837 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
838}
839
840static ssize_t
841store_sf2_pwm(struct device *dev, struct device_attribute *attr,
842 const char *buf, size_t count)
843{
844 struct i2c_client *client = to_i2c_client(dev);
845 struct w83793_data *data = i2c_get_clientdata(client);
846 struct sensor_device_attribute_2 *sensor_attr =
847 to_sensor_dev_attr_2(attr);
848 int nr = sensor_attr->nr;
849 int index = sensor_attr->index;
850 u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2;
851
852 mutex_lock(&data->update_lock);
853 data->sf2_pwm[index][nr] =
854 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
855 data->sf2_pwm[index][nr] |= val;
856 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
857 data->sf2_pwm[index][nr]);
858 mutex_unlock(&data->update_lock);
859 return count;
860}
861
862static ssize_t
863show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
864{
865 struct sensor_device_attribute_2 *sensor_attr =
866 to_sensor_dev_attr_2(attr);
867 int nr = sensor_attr->nr;
868 int index = sensor_attr->index;
869 struct w83793_data *data = w83793_update_device(dev);
870
871 return sprintf(buf, "%ld\n",
872 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
873}
874
875static ssize_t
876store_sf2_temp(struct device *dev, struct device_attribute *attr,
877 const char *buf, size_t count)
878{
879 struct i2c_client *client = to_i2c_client(dev);
880 struct w83793_data *data = i2c_get_clientdata(client);
881 struct sensor_device_attribute_2 *sensor_attr =
882 to_sensor_dev_attr_2(attr);
883 int nr = sensor_attr->nr;
884 int index = sensor_attr->index;
885 u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
886
887 mutex_lock(&data->update_lock);
888 data->sf2_temp[index][nr] =
889 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
890 data->sf2_temp[index][nr] |= val;
891 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
892 data->sf2_temp[index][nr]);
893 mutex_unlock(&data->update_lock);
894 return count;
895}
896
897/* only Vcore A/B and Vtt have additional 2 bits precision */
898static ssize_t
899show_in(struct device *dev, struct device_attribute *attr, char *buf)
900{
901 struct sensor_device_attribute_2 *sensor_attr =
902 to_sensor_dev_attr_2(attr);
903 int nr = sensor_attr->nr;
904 int index = sensor_attr->index;
905 struct w83793_data *data = w83793_update_device(dev);
906 u16 val = data->in[index][nr];
907
908 if (index < 3) {
909 val <<= 2;
910 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
911 }
ddca933b
GJ		 912 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
913 val = val * scale_in[index] + scale_in_add[index];
914 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 915}
916
917static ssize_t
918store_in(struct device *dev, struct device_attribute *attr,
919 const char *buf, size_t count)
920{
921 struct sensor_device_attribute_2 *sensor_attr =
922 to_sensor_dev_attr_2(attr);
923 int nr = sensor_attr->nr;
924 int index = sensor_attr->index;
925 struct i2c_client *client = to_i2c_client(dev);
926 struct w83793_data *data = i2c_get_clientdata(client);
927 u32 val;
928
929 val =
930 (simple_strtoul(buf, NULL, 10) +
931 scale_in[index] / 2) / scale_in[index];
932 mutex_lock(&data->update_lock);
933 if (index > 2) {
ddca933b
GJ		 934 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
935 if (1 == nr || 2 == nr) {
936 val -= scale_in_add[index] / scale_in[index];
937 }
6800c3d0
RM		 938 val = SENSORS_LIMIT(val, 0, 255);
939 } else {
940 val = SENSORS_LIMIT(val, 0, 0x3FF);
941 data->in_low_bits[nr] =
942 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
943 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
944 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
945 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
946 data->in_low_bits[nr]);
947 val >>= 2;
948 }
949 data->in[index][nr] = val;
950 w83793_write_value(client, W83793_REG_IN[index][nr],
951 data->in[index][nr]);
952 mutex_unlock(&data->update_lock);
953 return count;
954}
955
956#define NOT_USED -1
957
958#define SENSOR_ATTR_IN(index) \
959 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
960 IN_READ, index), \
961 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
962 store_in, IN_MAX, index), \
963 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
964 store_in, IN_LOW, index), \
965 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
966 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
967 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
968 show_alarm_beep, store_beep, BEEP_ENABLE, \
969 index + ((index > 2) ? 1 : 0))
970
971#define SENSOR_ATTR_FAN(index) \
972 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
973 NULL, ALARM_STATUS, index + 17), \
974 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
975 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
976 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
977 NULL, FAN_INPUT, index - 1), \
978 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
979 show_fan, store_fan_min, FAN_MIN, index - 1)
980
981#define SENSOR_ATTR_PWM(index) \
982 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
983 store_pwm, PWM_DUTY, index - 1), \
984 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
985 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
986 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
987 show_pwm, store_pwm, PWM_START, index - 1), \
988 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
989 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
990
991#define SENSOR_ATTR_TEMP(index) \
992 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
993 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
994 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
995 NULL, TEMP_READ, index - 1), \
996 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
997 store_temp, TEMP_CRIT, index - 1), \
998 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
999 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1000 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1001 store_temp, TEMP_WARN, index - 1), \
1002 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1003 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1004 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1005 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1006 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1007 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1008 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1009 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1010 TEMP_FAN_MAP, index - 1), \
1011 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1012 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1013 index - 1), \
1014 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1015 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1016 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1017 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1018 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1019 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1020 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1021 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1022 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1023 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1024 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1025 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1026 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1027 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1028 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1029 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1030 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1031 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1032 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1033 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1034 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1035 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1036 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1037 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1038 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1039 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1040 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1041 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1042 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1043 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1044 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1045 show_sf2_temp, store_sf2_temp, 6, index - 1)
1046
1047static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1048 SENSOR_ATTR_IN(0),
1049 SENSOR_ATTR_IN(1),
1050 SENSOR_ATTR_IN(2),
1051 SENSOR_ATTR_IN(3),
1052 SENSOR_ATTR_IN(4),
1053 SENSOR_ATTR_IN(5),
1054 SENSOR_ATTR_IN(6),
1055 SENSOR_ATTR_IN(7),
1056 SENSOR_ATTR_IN(8),
1057 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1058 SENSOR_ATTR_FAN(1),
1059 SENSOR_ATTR_FAN(2),
1060 SENSOR_ATTR_FAN(3),
1061 SENSOR_ATTR_FAN(4),
1062 SENSOR_ATTR_FAN(5),
1063 SENSOR_ATTR_PWM(1),
1064 SENSOR_ATTR_PWM(2),
1065 SENSOR_ATTR_PWM(3),
1066};
1067
46bed4df
GJ		 1068static struct sensor_device_attribute_2 w83793_temp[] = {
1069 SENSOR_ATTR_TEMP(1),
1070 SENSOR_ATTR_TEMP(2),
1071 SENSOR_ATTR_TEMP(3),
1072 SENSOR_ATTR_TEMP(4),
1073 SENSOR_ATTR_TEMP(5),
1074 SENSOR_ATTR_TEMP(6),
1075};
1076
6800c3d0
RM		 1077/* Fan6-Fan12 */
1078static struct sensor_device_attribute_2 w83793_left_fan[] = {
1079 SENSOR_ATTR_FAN(6),
1080 SENSOR_ATTR_FAN(7),
1081 SENSOR_ATTR_FAN(8),
1082 SENSOR_ATTR_FAN(9),
1083 SENSOR_ATTR_FAN(10),
1084 SENSOR_ATTR_FAN(11),
1085 SENSOR_ATTR_FAN(12),
1086};
1087
1088/* Pwm4-Pwm8 */
1089static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1090 SENSOR_ATTR_PWM(4),
1091 SENSOR_ATTR_PWM(5),
1092 SENSOR_ATTR_PWM(6),
1093 SENSOR_ATTR_PWM(7),
1094 SENSOR_ATTR_PWM(8),
1095};
1096
c70a8c34 1097static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1098 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1099 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1100};
93c75a4a 1101static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
c70a8c34
GJ		 1102
1103static struct sensor_device_attribute_2 sda_single_files[] = {
6800c3d0
RM		 1104 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1105 store_chassis_clear, ALARM_STATUS, 30),
1106 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1107 store_beep_enable, NOT_USED, NOT_USED),
1108 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1109 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1110 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1111 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1112 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1113 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1114 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1115 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1116};
1117
1118static void w83793_init_client(struct i2c_client *client)
1119{
1120 if (reset) {
1121 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
1122 }
1123
1124 /* Start monitoring */
1125 w83793_write_value(client, W83793_REG_CONFIG,
1126 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1127}
1128
1129/*
1130 * Watchdog routines
1131 */
1132
1133static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1134{
1135 int ret, mtimeout;
1136
1137 mtimeout = DIV_ROUND_UP(timeout, 60);
1138
1139 if (mtimeout > 255)
1140 return -EINVAL;
1141
1142 mutex_lock(&data->watchdog_lock);
1143 if (!data->client) {
1144 ret = -ENODEV;
1145 goto leave;
1146 }
1147
1148 data->watchdog_timeout = mtimeout;
1149
1150 /* Set Timeout value (in Minutes) */
1151 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1152 data->watchdog_timeout);
1153
1154 ret = mtimeout * 60;
1155
1156leave:
1157 mutex_unlock(&data->watchdog_lock);
1158 return ret;
1159}
1160
1161static int watchdog_get_timeout(struct w83793_data *data)
1162{
1163 int timeout;
1164
1165 mutex_lock(&data->watchdog_lock);
1166 timeout = data->watchdog_timeout * 60;
1167 mutex_unlock(&data->watchdog_lock);
1168
1169 return timeout;
1170}
1171
1172static int watchdog_trigger(struct w83793_data *data)
1173{
1174 int ret = 0;
1175
1176 mutex_lock(&data->watchdog_lock);
1177 if (!data->client) {
1178 ret = -ENODEV;
1179 goto leave;
1180 }
1181
1182 /* Set Timeout value (in Minutes) */
1183 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1184 data->watchdog_timeout);
1185
1186leave:
1187 mutex_unlock(&data->watchdog_lock);
1188 return ret;
1189}
1190
1191static int watchdog_enable(struct w83793_data *data)
1192{
1193 int ret = 0;
1194
1195 mutex_lock(&data->watchdog_lock);
1196 if (!data->client) {
1197 ret = -ENODEV;
1198 goto leave;
1199 }
1200
1201 /* Set initial timeout */
1202 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1203 data->watchdog_timeout);
1204
1205 /* Enable Soft Watchdog */
1206 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1207
1208leave:
1209 mutex_unlock(&data->watchdog_lock);
1210 return ret;
1211}
1212
1213static int watchdog_disable(struct w83793_data *data)
1214{
1215 int ret = 0;
1216
1217 mutex_lock(&data->watchdog_lock);
1218 if (!data->client) {
1219 ret = -ENODEV;
1220 goto leave;
1221 }
1222
1223 /* Disable Soft Watchdog */
1224 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1225
1226leave:
1227 mutex_unlock(&data->watchdog_lock);
1228 return ret;
1229}
1230
1231static int watchdog_open(struct inode *inode, struct file *filp)
1232{
1233 struct w83793_data *pos, *data = NULL;
1234 int watchdog_is_open;
1235
1236 /* We get called from drivers/char/misc.c with misc_mtx hold, and we
1237 call misc_register() from w83793_probe() with watchdog_data_mutex
1238 hold, as misc_register() takes the misc_mtx lock, this is a possible
1239 deadlock, so we use mutex_trylock here. */
1240 if (!mutex_trylock(&watchdog_data_mutex))
1241 return -ERESTARTSYS;
1242 list_for_each_entry(pos, &watchdog_data_list, list) {
1243 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1244 data = pos;
1245 break;
1246 }
1247 }
1248
1249 /* Check, if device is already open */
1250 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1251
1252 /* Increase data reference counter (if not already done).
1253 Note we can never not have found data, so we don't check for this */
1254 if (!watchdog_is_open)
1255 kref_get(&data->kref);
1256
1257 mutex_unlock(&watchdog_data_mutex);
1258
1259 /* Check, if device is already open and possibly issue error */
1260 if (watchdog_is_open)
1261 return -EBUSY;
1262
1263 /* Enable Soft Watchdog */
1264 watchdog_enable(data);
1265
1266 /* Store pointer to data into filp's private data */
1267 filp->private_data = data;
1268
1269 return nonseekable_open(inode, filp);
1270}
1271
1272static int watchdog_close(struct inode *inode, struct file *filp)
1273{
1274 struct w83793_data *data = filp->private_data;
6800c3d0 1275
5852f960
SA		 1276 if (data->watchdog_expect_close) {
1277 watchdog_disable(data);
1278 data->watchdog_expect_close = 0;
1279 } else {
1280 watchdog_trigger(data);
1281 dev_crit(&data->client->dev,
1282 "unexpected close, not stopping watchdog!\n");
1283 }
1284
1285 clear_bit(0, &data->watchdog_is_open);
1286
1287 /* Decrease data reference counter */
1288 mutex_lock(&watchdog_data_mutex);
1289 kref_put(&data->kref, w83793_release_resources);
1290 mutex_unlock(&watchdog_data_mutex);
1291
1292 return 0;
1293}
1294
1295static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1296 size_t count, loff_t *offset)
1297{
3f7cd7ea 1298 ssize_t ret;
5852f960
SA		 1299 struct w83793_data *data = filp->private_data;
1300
1301 if (count) {
1302 if (!nowayout) {
1303 size_t i;
1304
1305 /* Clear it in case it was set with a previous write */
1306 data->watchdog_expect_close = 0;
1307
1308 for (i = 0; i != count; i++) {
1309 char c;
1310 if (get_user(c, buf + i))
1311 return -EFAULT;
1312 if (c == 'V')
1313 data->watchdog_expect_close = 1;
1314 }
1315 }
1316 ret = watchdog_trigger(data);
1317 if (ret < 0)
1318 return ret;
1319 }
1320 return count;
1321}
1322
55929332
AB		 1323static long watchdog_ioctl(struct file *filp, unsigned int cmd,
1324 unsigned long arg)
5852f960
SA		 1325{
1326 static struct watchdog_info ident = {
1327 .options = WDIOF_KEEPALIVEPING |
1328 WDIOF_SETTIMEOUT |
1329 WDIOF_CARDRESET,
1330 .identity = "w83793 watchdog"
1331 };
1332
1333 int val, ret = 0;
1334 struct w83793_data *data = filp->private_data;
1335
613655fa 1336 mutex_lock(&watchdog_mutex);
5852f960
SA		 1337 switch (cmd) {
1338 case WDIOC_GETSUPPORT:
1339 if (!nowayout)
1340 ident.options |= WDIOF_MAGICCLOSE;
1341 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1342 ret = -EFAULT;
1343 break;
1344
1345 case WDIOC_GETSTATUS:
1346 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1347 ret = put_user(val, (int __user *)arg);
1348 break;
1349
1350 case WDIOC_GETBOOTSTATUS:
1351 ret = put_user(0, (int __user *)arg);
1352 break;
1353
1354 case WDIOC_KEEPALIVE:
1355 ret = watchdog_trigger(data);
1356 break;
1357
1358 case WDIOC_GETTIMEOUT:
1359 val = watchdog_get_timeout(data);
1360 ret = put_user(val, (int __user *)arg);
1361 break;
1362
1363 case WDIOC_SETTIMEOUT:
1364 if (get_user(val, (int __user *)arg)) {
1365 ret = -EFAULT;
1366 break;
1367 }
1368 ret = watchdog_set_timeout(data, val);
1369 if (ret > 0)
1370 ret = put_user(ret, (int __user *)arg);
1371 break;
1372
1373 case WDIOC_SETOPTIONS:
1374 if (get_user(val, (int __user *)arg)) {
1375 ret = -EFAULT;
1376 break;
1377 }
1378
1379 if (val & WDIOS_DISABLECARD)
1380 ret = watchdog_disable(data);
1381 else if (val & WDIOS_ENABLECARD)
1382 ret = watchdog_enable(data);
1383 else
1384 ret = -EINVAL;
1385
1386 break;
1387 default:
1388 ret = -ENOTTY;
1389 }
613655fa 1390 mutex_unlock(&watchdog_mutex);
5852f960
SA		 1391 return ret;
1392}
1393
1394static const struct file_operations watchdog_fops = {
1395 .owner = THIS_MODULE,
1396 .llseek = no_llseek,
1397 .open = watchdog_open,
1398 .release = watchdog_close,
1399 .write = watchdog_write,
55929332 1400 .unlocked_ioctl = watchdog_ioctl,
5852f960
SA		 1401};
1402
1403/*
1404 * Notifier for system down
1405 */
1406
1407static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1408 void *unused)
1409{
1410 struct w83793_data *data = NULL;
1411
1412 if (code == SYS_DOWN || code == SYS_HALT) {
1413
1414 /* Disable each registered watchdog */
1415 mutex_lock(&watchdog_data_mutex);
1416 list_for_each_entry(data, &watchdog_data_list, list) {
1417 if (data->watchdog_miscdev.minor)
1418 watchdog_disable(data);
1419 }
1420 mutex_unlock(&watchdog_data_mutex);
1421 }
1422
1423 return NOTIFY_DONE;
6800c3d0
RM		 1424}
1425
5852f960
SA		 1426/*
1427 * The WDT needs to learn about soft shutdowns in order to
1428 * turn the timebomb registers off.
1429 */
1430
1431static struct notifier_block watchdog_notifier = {
1432 .notifier_call = watchdog_notify_sys,
1433};
1434
1435/*
1436 * Init / remove routines
1437 */
1438
a7f13a6e 1439static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1440{
1441 struct w83793_data *data = i2c_get_clientdata(client);
1442 struct device *dev = &client->dev;
5852f960
SA		 1443 int i, tmp;
1444
1445 /* Unregister the watchdog (if registered) */
1446 if (data->watchdog_miscdev.minor) {
1447 misc_deregister(&data->watchdog_miscdev);
1448
1449 if (data->watchdog_is_open) {
1450 dev_warn(&client->dev,
1451 "i2c client detached with watchdog open! "
1452 "Stopping watchdog.\n");
1453 watchdog_disable(data);
1454 }
1455
1456 mutex_lock(&watchdog_data_mutex);
1457 list_del(&data->list);
1458 mutex_unlock(&watchdog_data_mutex);
1459
1460 /* Tell the watchdog code the client is gone */
1461 mutex_lock(&data->watchdog_lock);
1462 data->client = NULL;
1463 mutex_unlock(&data->watchdog_lock);
1464 }
1465
1466 /* Reset Configuration Register to Disable Watch Dog Registers */
1467 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1468 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1469
1470 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1471
a7f13a6e 1472 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1473
a7f13a6e
JD		 1474 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1475 device_remove_file(dev,
1476 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1477
a7f13a6e
JD		 1478 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1479 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1480
a7f13a6e
JD		 1481 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1482 device_remove_file(dev, &w83793_vid[i].dev_attr);
1483 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1484
a7f13a6e
JD		 1485 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1486 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1487
a7f13a6e
JD		 1488 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1489 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1490
a7f13a6e
JD		 1491 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1492 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1493
a7f13a6e
JD		 1494 if (data->lm75[0] != NULL)
1495 i2c_unregister_device(data->lm75[0]);
1496 if (data->lm75[1] != NULL)
1497 i2c_unregister_device(data->lm75[1]);
6800c3d0 1498
5852f960
SA		 1499 /* Decrease data reference counter */
1500 mutex_lock(&watchdog_data_mutex);
1501 kref_put(&data->kref, w83793_release_resources);
1502 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1503
1504 return 0;
1505}
1506
1507static int
a7f13a6e 1508w83793_detect_subclients(struct i2c_client *client)
6800c3d0
RM		 1509{
1510 int i, id, err;
a7f13a6e 1511 int address = client->addr;
6800c3d0 1512 u8 tmp;
a7f13a6e 1513 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1514 struct w83793_data *data = i2c_get_clientdata(client);
1515
1516 id = i2c_adapter_id(adapter);
1517 if (force_subclients[0] == id && force_subclients[1] == address) {
1518 for (i = 2; i <= 3; i++) {
1519 if (force_subclients[i] < 0x48
1520 || force_subclients[i] > 0x4f) {
1521 dev_err(&client->dev,
1522 "invalid subclient "
1523 "address %d; must be 0x48-0x4f\n",
1524 force_subclients[i]);
1525 err = -EINVAL;
1526 goto ERROR_SC_0;
1527 }
1528 }
1529 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1530 (force_subclients[2] & 0x07) |
1531 ((force_subclients[3] & 0x07) << 4));
1532 }
1533
1534 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
1535 if (!(tmp & 0x08)) {
a7f13a6e 1536 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
6800c3d0
RM		 1537 }
1538 if (!(tmp & 0x80)) {
1539 if ((data->lm75[0] != NULL)
1540 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1541 dev_err(&client->dev,
1542 "duplicate addresses 0x%x, "
1543 "use force_subclients\n", data->lm75[0]->addr);
1544 err = -ENODEV;
1545 goto ERROR_SC_1;
1546 }
a7f13a6e
JD		 1547 data->lm75[1] = i2c_new_dummy(adapter,
1548 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1549 }
1550
1551 return 0;
1552
1553 /* Undo inits in case of errors */
1554
1555ERROR_SC_1:
a7f13a6e
JD		 1556 if (data->lm75[0] != NULL)
1557 i2c_unregister_device(data->lm75[0]);
6800c3d0
RM		 1558ERROR_SC_0:
1559 return err;
1560}
1561
a7f13a6e 1562/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1563static int w83793_detect(struct i2c_client *client,
a7f13a6e 1564 struct i2c_board_info *info)
6800c3d0 1565{
52df6440 1566 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1567 struct i2c_adapter *adapter = client->adapter;
1568 unsigned short address = client->addr;
6800c3d0
RM		 1569
1570 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
a7f13a6e 1571 return -ENODEV;
6800c3d0
RM		 1572 }
1573
a7f13a6e 1574 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1575
52df6440
JD		 1576 tmp = bank & 0x80 ? 0x5c : 0xa3;
1577 /* Check Winbond vendor ID */
1578 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1579 pr_debug("w83793: Detection failed at check vendor id\n");
1580 return -ENODEV;
6800c3d0
RM		 1581 }
1582
52df6440
JD		 1583 /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1584 should match */
1585 if ((bank & 0x07) == 0
1586 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1587 (address << 1)) {
1588 pr_debug("w83793: Detection failed at check i2c addr\n");
1589 return -ENODEV;
6800c3d0
RM		 1590 }
1591
52df6440
JD		 1592 /* Determine the chip type now */
1593 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1594 if (chip_id != 0x7b)
1595 return -ENODEV;
1596
a7f13a6e
JD		 1597 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1598
1599 return 0;
1600}
6800c3d0 1601
a7f13a6e
JD		 1602static int w83793_probe(struct i2c_client *client,
1603 const struct i2c_device_id *id)
1604{
1605 struct device *dev = &client->dev;
5852f960 1606 const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
a7f13a6e
JD		 1607 struct w83793_data *data;
1608 int i, tmp, val, err;
1609 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1610 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1611 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1612
1613 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1614 if (!data) {
1615 err = -ENOMEM;
1616 goto exit;
1617 }
1618
1619 i2c_set_clientdata(client, data);
1620 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1621 mutex_init(&data->update_lock);
5852f960
SA		 1622 mutex_init(&data->watchdog_lock);
1623 INIT_LIST_HEAD(&data->list);
1624 kref_init(&data->kref);
1625
1626 /* Store client pointer in our data struct for watchdog usage
1627 (where the client is found through a data ptr instead of the
1628 otherway around) */
1629 data->client = client;
6800c3d0 1630
a7f13a6e
JD		 1631 err = w83793_detect_subclients(client);
1632 if (err)
6800c3d0
RM		 1633 goto free_mem;
1634
6800c3d0
RM		 1635 /* Initialize the chip */
1636 w83793_init_client(client);
1637
6800c3d0
RM		 1638 /*
1639 Only fan 1-5 has their own input pins,
1640 Pwm 1-3 has their own pins
1641 */
1642 data->has_fan = 0x1f;
1643 data->has_pwm = 0x07;
1644 tmp = w83793_read_value(client, W83793_REG_MFC);
1645 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1646
1647 /* check the function of pins 49-56 */
93c75a4a
JD		 1648 if (tmp & 0x80) {
1649 data->has_vid |= 0x2; /* has VIDB */
1650 } else {
6800c3d0
RM		 1651 data->has_pwm |= 0x18; /* pwm 4,5 */
1652 if (val & 0x01) { /* fan 6 */
1653 data->has_fan |= 0x20;
1654 data->has_pwm |= 0x20;
1655 }
1656 if (val & 0x02) { /* fan 7 */
1657 data->has_fan |= 0x40;
1658 data->has_pwm |= 0x40;
1659 }
1660 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1661 data->has_fan |= 0x80;
1662 data->has_pwm |= 0x80;
1663 }
1664 }
1665
93c75a4a
JD		 1666 /* check the function of pins 37-40 */
1667 if (!(tmp & 0x29))
1668 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1669 if (0x08 == (tmp & 0x0c)) {
1670 if (val & 0x08) /* fan 9 */
1671 data->has_fan |= 0x100;
1672 if (val & 0x10) /* fan 10 */
1673 data->has_fan |= 0x200;
1674 }
6800c3d0
RM		 1675 if (0x20 == (tmp & 0x30)) {
1676 if (val & 0x20) /* fan 11 */
1677 data->has_fan |= 0x400;
1678 if (val & 0x40) /* fan 12 */
1679 data->has_fan |= 0x800;
1680 }
1681
1682 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1683 data->has_fan |= 0x80;
1684 data->has_pwm |= 0x80;
1685 }
1686
c9294315
RM		 1687 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1688 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1689 data->has_fan |= 0x100;
1690 }
1691 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1692 data->has_fan |= 0x200;
1693 }
1694 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1695 data->has_fan |= 0x400;
1696 }
1697 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1698 data->has_fan |= 0x800;
1699 }
1700
46bed4df
GJ		 1701 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
1702 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]);
1703 if (tmp & 0x01)
1704 data->has_temp |= 0x01;
1705 if (tmp & 0x04)
1706 data->has_temp |= 0x02;
1707 if (tmp & 0x10)
1708 data->has_temp |= 0x04;
1709 if (tmp & 0x40)
1710 data->has_temp |= 0x08;
1711
1712 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]);
1713 if (tmp & 0x01)
1714 data->has_temp |= 0x10;
1715 if (tmp & 0x02)
1716 data->has_temp |= 0x20;
1717
6800c3d0
RM		 1718 /* Register sysfs hooks */
1719 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1720 err = device_create_file(dev,
1721 &w83793_sensor_attr_2[i].dev_attr);
1722 if (err)
1723 goto exit_remove;
1724 }
1725
c70a8c34
GJ		 1726 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1727 if (!(data->has_vid & (1 << i)))
1728 continue;
1729 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1730 if (err)
1731 goto exit_remove;
1732 }
93c75a4a
JD		 1733 if (data->has_vid) {
1734 data->vrm = vid_which_vrm();
1735 err = device_create_file(dev, &dev_attr_vrm);
1736 if (err)
1737 goto exit_remove;
1738 }
c70a8c34 1739
6800c3d0
RM		 1740 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1741 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1742 if (err)
1743 goto exit_remove;
1744
1745 }
1746
46bed4df
GJ		 1747 for (i = 0; i < 6; i++) {
1748 int j;
1749 if (!(data->has_temp & (1 << i)))
1750 continue;
1751 for (j = 0; j < files_temp; j++) {
1752 err = device_create_file(dev,
1753 &w83793_temp[(i) * files_temp
1754 + j].dev_attr);
1755 if (err)
1756 goto exit_remove;
1757 }
1758 }
1759
6800c3d0
RM		 1760 for (i = 5; i < 12; i++) {
1761 int j;
1762 if (!(data->has_fan & (1 << i)))
1763 continue;
1764 for (j = 0; j < files_fan; j++) {
1765 err = device_create_file(dev,
1766 &w83793_left_fan[(i - 5) * files_fan
1767 + j].dev_attr);
1768 if (err)
1769 goto exit_remove;
1770 }
1771 }
1772
1773 for (i = 3; i < 8; i++) {
1774 int j;
1775 if (!(data->has_pwm & (1 << i)))
1776 continue;
1777 for (j = 0; j < files_pwm; j++) {
1778 err = device_create_file(dev,
1779 &w83793_left_pwm[(i - 3) * files_pwm
1780 + j].dev_attr);
1781 if (err)
1782 goto exit_remove;
1783 }
1784 }
1785
1beeffe4
TJ		 1786 data->hwmon_dev = hwmon_device_register(dev);
1787 if (IS_ERR(data->hwmon_dev)) {
1788 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1789 goto exit_remove;
1790 }
1791
5852f960
SA		 1792 /* Watchdog initialization */
1793
1794 /* Register boot notifier */
1795 err = register_reboot_notifier(&watchdog_notifier);
1796 if (err != 0) {
1797 dev_err(&client->dev,
1798 "cannot register reboot notifier (err=%d)\n", err);
1799 goto exit_devunreg;
1800 }
1801
1802 /* Enable Watchdog registers.
1803 Set Configuration Register to Enable Watch Dog Registers
1804 (Bit 2) = XXXX, X1XX. */
1805 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1806 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1807
1808 /* Set the default watchdog timeout */
1809 data->watchdog_timeout = timeout;
1810
1811 /* Check, if last reboot was caused by watchdog */
1812 data->watchdog_caused_reboot =
1813 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1814
1815 /* Disable Soft Watchdog during initialiation */
1816 watchdog_disable(data);
1817
1818 /* We take the data_mutex lock early so that watchdog_open() cannot
1819 run when misc_register() has completed, but we've not yet added
1820 our data to the watchdog_data_list (and set the default timeout) */
1821 mutex_lock(&watchdog_data_mutex);
1822 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1823 /* Register our watchdog part */
1824 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1825 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1826 data->watchdog_miscdev.name = data->watchdog_name;
1827 data->watchdog_miscdev.fops = &watchdog_fops;
1828 data->watchdog_miscdev.minor = watchdog_minors[i];
1829
1830 err = misc_register(&data->watchdog_miscdev);
1831 if (err == -EBUSY)
1832 continue;
1833 if (err) {
1834 data->watchdog_miscdev.minor = 0;
1835 dev_err(&client->dev,
1836 "Registering watchdog chardev: %d\n", err);
1837 break;
1838 }
1839
1840 list_add(&data->list, &watchdog_data_list);
1841
1842 dev_info(&client->dev,
1843 "Registered watchdog chardev major 10, minor: %d\n",
1844 watchdog_minors[i]);
1845 break;
1846 }
1847 if (i == ARRAY_SIZE(watchdog_minors)) {
1848 data->watchdog_miscdev.minor = 0;
1849 dev_warn(&client->dev, "Couldn't register watchdog chardev "
1850 "(due to no free minor)\n");
1851 }
1852
1853 mutex_unlock(&watchdog_data_mutex);
1854
6800c3d0
RM		 1855 return 0;
1856
5852f960
SA		 1857 /* Unregister hwmon device */
1858
1859exit_devunreg:
1860
1861 hwmon_device_unregister(data->hwmon_dev);
1862
6800c3d0
RM		 1863 /* Unregister sysfs hooks */
1864
1865exit_remove:
1866 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1867 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1868
1869 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1870 device_remove_file(dev, &sda_single_files[i].dev_attr);
1871
c70a8c34
GJ		 1872 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1873 device_remove_file(dev, &w83793_vid[i].dev_attr);
1874
6800c3d0
RM		 1875 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1876 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1877
1878 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1879 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1880
46bed4df
GJ		 1881 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1882 device_remove_file(dev, &w83793_temp[i].dev_attr);
1883
a7f13a6e
JD		 1884 if (data->lm75[0] != NULL)
1885 i2c_unregister_device(data->lm75[0]);
1886 if (data->lm75[1] != NULL)
1887 i2c_unregister_device(data->lm75[1]);
6800c3d0
RM		 1888free_mem:
1889 kfree(data);
1890exit:
1891 return err;
1892}
1893
1894static void w83793_update_nonvolatile(struct device *dev)
1895{
1896 struct i2c_client *client = to_i2c_client(dev);
1897 struct w83793_data *data = i2c_get_clientdata(client);
1898 int i, j;
1899 /*
1900 They are somewhat "stable" registers, and to update them everytime
1901 takes so much time, it's just not worthy. Update them in a long
1902 interval to avoid exception.
1903 */
1904 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1905 || !data->valid))
1906 return;
1907 /* update voltage limits */
1908 for (i = 1; i < 3; i++) {
1909 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1910 data->in[j][i] =
1911 w83793_read_value(client, W83793_REG_IN[j][i]);
1912 }
1913 data->in_low_bits[i] =
1914 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1915 }
1916
1917 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1918 /* Update the Fan measured value and limits */
1919 if (!(data->has_fan & (1 << i))) {
1920 continue;
1921 }
1922 data->fan_min[i] =
1923 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
1924 data->fan_min[i] |=
1925 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
1926 }
1927
1928 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 1929 if (!(data->has_temp & (1 << i)))
1930 continue;
6800c3d0
RM		 1931 data->temp_fan_map[i] =
1932 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
1933 for (j = 1; j < 5; j++) {
1934 data->temp[i][j] =
1935 w83793_read_value(client, W83793_REG_TEMP[i][j]);
1936 }
1937 data->temp_cruise[i] =
1938 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
1939 for (j = 0; j < 7; j++) {
1940 data->sf2_pwm[i][j] =
1941 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
1942 data->sf2_temp[i][j] =
1943 w83793_read_value(client,
1944 W83793_REG_SF2_TEMP(i, j));
1945 }
1946 }
1947
1948 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
1949 data->temp_mode[i] =
1950 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
1951
1952 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
1953 data->tolerance[i] =
1954 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
1955 }
1956
1957 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
1958 if (!(data->has_pwm & (1 << i)))
1959 continue;
1960 data->pwm[i][PWM_NONSTOP] =
1961 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
1962 data->pwm[i][PWM_START] =
1963 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
1964 data->pwm_stop_time[i] =
1965 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
1966 }
1967
1968 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
1969 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
1970 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
1971 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
1972 data->temp_critical =
1973 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
1974 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
1975
1976 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) {
1977 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
1978 }
1979
1980 data->last_nonvolatile = jiffies;
1981}
1982
1983static struct w83793_data *w83793_update_device(struct device *dev)
1984{
1985 struct i2c_client *client = to_i2c_client(dev);
1986 struct w83793_data *data = i2c_get_clientdata(client);
1987 int i;
1988
1989 mutex_lock(&data->update_lock);
1990
1991 if (!(time_after(jiffies, data->last_updated + HZ * 2)
1992 || !data->valid))
1993 goto END;
1994
1995 /* Update the voltages measured value and limits */
1996 for (i = 0; i < ARRAY_SIZE(data->in); i++)
1997 data->in[i][IN_READ] =
1998 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
1999
2000 data->in_low_bits[IN_READ] =
2001 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2002
2003 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
2004 if (!(data->has_fan & (1 << i))) {
2005 continue;
2006 }
2007 data->fan[i] =
2008 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2009 data->fan[i] |=
2010 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2011 }
2012
46bed4df
GJ		 2013 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2014 if (!(data->has_temp & (1 << i)))
2015 continue;
6800c3d0
RM		 2016 data->temp[i][TEMP_READ] =
2017 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2018 }
6800c3d0
RM		 2019
2020 data->temp_low_bits =
2021 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2022
2023 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2024 if (data->has_pwm & (1 << i))
2025 data->pwm[i][PWM_DUTY] =
2026 w83793_read_value(client,
2027 W83793_REG_PWM(i, PWM_DUTY));
2028 }
2029
2030 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2031 data->alarms[i] =
2032 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2033 if (data->has_vid & 0x01)
2034 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2035 if (data->has_vid & 0x02)
2036 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2037 w83793_update_nonvolatile(dev);
2038 data->last_updated = jiffies;
2039 data->valid = 1;
2040
2041END:
2042 mutex_unlock(&data->update_lock);
2043 return data;
2044}
2045
2046/* Ignore the possibility that somebody change bank outside the driver
2047 Must be called with data->update_lock held, except during initialization */
2048static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2049{
2050 struct w83793_data *data = i2c_get_clientdata(client);
2051 u8 res = 0xff;
2052 u8 new_bank = reg >> 8;
2053
2054 new_bank |= data->bank & 0xfc;
2055 if (data->bank != new_bank) {
2056 if (i2c_smbus_write_byte_data
2057 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2058 data->bank = new_bank;
2059 else {
2060 dev_err(&client->dev,
2061 "set bank to %d failed, fall back "
2062 "to bank %d, read reg 0x%x error\n",
2063 new_bank, data->bank, reg);
2064 res = 0x0; /* read 0x0 from the chip */
2065 goto END;
2066 }
2067 }
2068 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2069END:
2070 return res;
2071}
2072
2073/* Must be called with data->update_lock held, except during initialization */
2074static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2075{
2076 struct w83793_data *data = i2c_get_clientdata(client);
2077 int res;
2078 u8 new_bank = reg >> 8;
2079
2080 new_bank |= data->bank & 0xfc;
2081 if (data->bank != new_bank) {
2082 if ((res = i2c_smbus_write_byte_data
2083 (client, W83793_REG_BANKSEL, new_bank)) >= 0)
2084 data->bank = new_bank;
2085 else {
2086 dev_err(&client->dev,
2087 "set bank to %d failed, fall back "
2088 "to bank %d, write reg 0x%x error\n",
2089 new_bank, data->bank, reg);
2090 goto END;
2091 }
2092 }
2093
2094 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2095END:
2096 return res;
2097}
2098
2099static int __init sensors_w83793_init(void)
2100{
2101 return i2c_add_driver(&w83793_driver);
2102}
2103
2104static void __exit sensors_w83793_exit(void)
2105{
2106 i2c_del_driver(&w83793_driver);
2107}
2108
5852f960 2109MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2110MODULE_DESCRIPTION("w83793 driver");
2111MODULE_LICENSE("GPL");
2112
2113module_init(sensors_w83793_init);
2114module_exit(sensors_w83793_exit);
Clone of davem's net-next-2.6 tree