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Merge branch 'ebt_config_compat_v4' of git://git.breakpoint.cc/fw/nf-next-2.6
[net-next-2.6.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT		 1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
7666c13c
JD		 5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
360782dd 7 Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
1da177e4
LT		 8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
1da177e4
LT		 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT		 33
34*/
35
1da177e4
LT		 36#include <linux/module.h>
37#include <linux/init.h>
38#include <linux/slab.h>
39#include <linux/jiffies.h>
40#include <linux/i2c.h>
943b0830 41#include <linux/hwmon.h>
303760b4 42#include <linux/hwmon-vid.h>
34875337 43#include <linux/hwmon-sysfs.h>
311ce2ef 44#include <linux/sysfs.h>
943b0830 45#include <linux/err.h>
9a61bf63 46#include <linux/mutex.h>
443850ce
WG		 47
48#ifdef CONFIG_ISA
49#include <linux/platform_device.h>
50#include <linux/ioport.h>
6055fae8 51#include <linux/io.h>
443850ce 52#endif
1da177e4 53
443850ce 54#include "lm75.h"
7666c13c 55
1da177e4 56/* Addresses to scan */
25e9c86d
MH		 57static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
58 0x2e, 0x2f, I2C_CLIENT_END };
3aed198c 59
e5e9f44c
JD		 60enum chips { w83781d, w83782d, w83783s, as99127f };
61
62/* Insmod parameters */
3aed198c
JD		 63static unsigned short force_subclients[4];
64module_param_array(force_subclients, short, NULL, 0);
65MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
1da177e4
LT		 66 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
67
fabddcd4
JD		 68static int reset;
69module_param(reset, bool, 0);
70MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
71
1da177e4
LT		 72static int init = 1;
73module_param(init, bool, 0);
74MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
75
76/* Constants specified below */
77
78/* Length of ISA address segment */
79#define W83781D_EXTENT 8
80
81/* Where are the ISA address/data registers relative to the base address */
82#define W83781D_ADDR_REG_OFFSET 5
83#define W83781D_DATA_REG_OFFSET 6
84
34875337
JD		 85/* The device registers */
86/* in nr from 0 to 8 */
1da177e4
LT		 87#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
88 (0x554 + (((nr) - 7) * 2)))
89#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
90 (0x555 + (((nr) - 7) * 2)))
91#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
92 (0x550 + (nr) - 7))
93
34875337
JD		 94/* fan nr from 0 to 2 */
95#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
96#define W83781D_REG_FAN(nr) (0x28 + (nr))
1da177e4
LT		 97
98#define W83781D_REG_BANK 0x4E
99#define W83781D_REG_TEMP2_CONFIG 0x152
100#define W83781D_REG_TEMP3_CONFIG 0x252
34875337 101/* temp nr from 1 to 3 */
1da177e4
LT		 102#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
103 ((nr == 2) ? (0x0150) : \
104 (0x27)))
105#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
106 ((nr == 2) ? (0x153) : \
107 (0x3A)))
108#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
109 ((nr == 2) ? (0x155) : \
110 (0x39)))
111
112#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD		 113
114/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT		 115#define W83781D_REG_ALARM1 0x41
116#define W83781D_REG_ALARM2 0x42
1da177e4 117
05663368 118/* Real-time status (W83782D, W83783S) */
c7f5d7ed
JD		 119#define W83782D_REG_ALARM1 0x459
120#define W83782D_REG_ALARM2 0x45A
121#define W83782D_REG_ALARM3 0x45B
122
1da177e4
LT		 123#define W83781D_REG_BEEP_CONFIG 0x4D
124#define W83781D_REG_BEEP_INTS1 0x56
125#define W83781D_REG_BEEP_INTS2 0x57
126#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
127
128#define W83781D_REG_VID_FANDIV 0x47
129
130#define W83781D_REG_CHIPID 0x49
131#define W83781D_REG_WCHIPID 0x58
132#define W83781D_REG_CHIPMAN 0x4F
133#define W83781D_REG_PIN 0x4B
134
135/* 782D/783S only */
136#define W83781D_REG_VBAT 0x5D
137
138/* PWM 782D (1-4) and 783S (1-2) only */
34875337 139static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
1da177e4
LT		 140#define W83781D_REG_PWMCLK12 0x5C
141#define W83781D_REG_PWMCLK34 0x45C
1da177e4
LT		 142
143#define W83781D_REG_I2C_ADDR 0x48
144#define W83781D_REG_I2C_SUBADDR 0x4A
145
146/* The following are undocumented in the data sheets however we
147 received the information in an email from Winbond tech support */
148/* Sensor selection - not on 781d */
149#define W83781D_REG_SCFG1 0x5D
150static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
151
152#define W83781D_REG_SCFG2 0x59
153static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
154
155#define W83781D_DEFAULT_BETA 3435
156
474d00a8
JD		 157/* Conversions */
158#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
159#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT		 160
161static inline u8
162FAN_TO_REG(long rpm, int div)
163{
164 if (rpm == 0)
165 return 255;
166 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
167 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
168}
169
474d00a8
JD		 170static inline long
171FAN_FROM_REG(u8 val, int div)
172{
173 if (val == 0)
174 return -1;
175 if (val == 255)
176 return 0;
177 return 1350000 / (val * div);
178}
1da177e4 179
474d00a8
JD		 180#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
181#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 182
1da177e4 183#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
2fbbbf14 184 (~(val)) & 0x7fff : (val) & 0xff7fff)
1da177e4 185#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
2fbbbf14 186 (~(val)) & 0x7fff : (val) & 0xff7fff)
1da177e4 187
1da177e4
LT		 188#define DIV_FROM_REG(val) (1 << (val))
189
190static inline u8
191DIV_TO_REG(long val, enum chips type)
192{
193 int i;
194 val = SENSORS_LIMIT(val, 1,
195 ((type == w83781d
196 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 197 for (i = 0; i < 7; i++) {
1da177e4
LT		 198 if (val == 0)
199 break;
200 val >>= 1;
201 }
474d00a8 202 return i;
1da177e4
LT		 203}
204
1da177e4 205struct w83781d_data {
0217eae3 206 struct i2c_client *client;
1beeffe4 207 struct device *hwmon_dev;
9a61bf63 208 struct mutex lock;
1da177e4
LT		 209 enum chips type;
210
360782dd
JD		 211 /* For ISA device only */
212 const char *name;
213 int isa_addr;
214
9a61bf63 215 struct mutex update_lock;
1da177e4
LT		 216 char valid; /* !=0 if following fields are valid */
217 unsigned long last_updated; /* In jiffies */
218
219 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
220 /* array of 2 pointers to subclients */
221
222 u8 in[9]; /* Register value - 8 & 9 for 782D only */
223 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
224 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
225 u8 fan[3]; /* Register value */
226 u8 fan_min[3]; /* Register value */
474d00a8
JD		 227 s8 temp; /* Register value */
228 s8 temp_max; /* Register value */
229 s8 temp_max_hyst; /* Register value */
1da177e4
LT		 230 u16 temp_add[2]; /* Register value */
231 u16 temp_max_add[2]; /* Register value */
232 u16 temp_max_hyst_add[2]; /* Register value */
233 u8 fan_div[3]; /* Register encoding, shifted right */
234 u8 vid; /* Register encoding, combined */
235 u32 alarms; /* Register encoding, combined */
236 u32 beep_mask; /* Register encoding, combined */
1da177e4 237 u8 pwm[4]; /* Register value */
34875337 238 u8 pwm2_enable; /* Boolean */
1da177e4
LT		 239 u16 sens[3]; /* 782D/783S only.
240 1 = pentium diode; 2 = 3904 diode;
b26f9330 241 4 = thermistor */
1da177e4
LT		 242 u8 vrm;
243};
244
443850ce
WG		 245static struct w83781d_data *w83781d_data_if_isa(void);
246static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
247
31b8dc4d
JD		 248static int w83781d_read_value(struct w83781d_data *data, u16 reg);
249static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
1da177e4 250static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 251static void w83781d_init_device(struct device *dev);
1da177e4 252
1da177e4
LT		 253/* following are the sysfs callback functions */
254#define show_in_reg(reg) \
34875337
JD		 255static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
256 char *buf) \
1da177e4 257{ \
34875337 258 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 259 struct w83781d_data *data = w83781d_update_device(dev); \
34875337
JD		 260 return sprintf(buf, "%ld\n", \
261 (long)IN_FROM_REG(data->reg[attr->index])); \
1da177e4
LT		 262}
263show_in_reg(in);
264show_in_reg(in_min);
265show_in_reg(in_max);
266
267#define store_in_reg(REG, reg) \
34875337
JD		 268static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
269 *da, const char *buf, size_t count) \
1da177e4 270{ \
34875337 271 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 272 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 273 int nr = attr->index; \
1da177e4
LT		 274 u32 val; \
275 \
474d00a8 276 val = simple_strtoul(buf, NULL, 10); \
1da177e4 277 \
9a61bf63 278 mutex_lock(&data->update_lock); \
1da177e4 279 data->in_##reg[nr] = IN_TO_REG(val); \
31b8dc4d 280 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
1da177e4 281 \
9a61bf63 282 mutex_unlock(&data->update_lock); \
1da177e4
LT		 283 return count; \
284}
285store_in_reg(MIN, min);
286store_in_reg(MAX, max);
287
1da177e4 288#define sysfs_in_offsets(offset) \
34875337
JD		 289static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
290 show_in, NULL, offset); \
291static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
292 show_in_min, store_in_min, offset); \
293static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
294 show_in_max, store_in_max, offset)
1da177e4
LT		 295
296sysfs_in_offsets(0);
297sysfs_in_offsets(1);
298sysfs_in_offsets(2);
299sysfs_in_offsets(3);
300sysfs_in_offsets(4);
301sysfs_in_offsets(5);
302sysfs_in_offsets(6);
303sysfs_in_offsets(7);
304sysfs_in_offsets(8);
305
1da177e4 306#define show_fan_reg(reg) \
34875337
JD		 307static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
308 char *buf) \
1da177e4 309{ \
34875337 310 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4
LT		 311 struct w83781d_data *data = w83781d_update_device(dev); \
312 return sprintf(buf,"%ld\n", \
34875337
JD		 313 FAN_FROM_REG(data->reg[attr->index], \
314 DIV_FROM_REG(data->fan_div[attr->index]))); \
1da177e4
LT		 315}
316show_fan_reg(fan);
317show_fan_reg(fan_min);
318
319static ssize_t
34875337
JD		 320store_fan_min(struct device *dev, struct device_attribute *da,
321 const char *buf, size_t count)
1da177e4 322{
34875337 323 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 324 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 325 int nr = attr->index;
1da177e4
LT		 326 u32 val;
327
328 val = simple_strtoul(buf, NULL, 10);
329
9a61bf63 330 mutex_lock(&data->update_lock);
34875337
JD		 331 data->fan_min[nr] =
332 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
31b8dc4d 333 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
34875337 334 data->fan_min[nr]);
1da177e4 335
9a61bf63 336 mutex_unlock(&data->update_lock);
1da177e4
LT		 337 return count;
338}
339
34875337
JD		 340static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
341static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
342 show_fan_min, store_fan_min, 0);
343static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
344static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
345 show_fan_min, store_fan_min, 1);
346static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
347static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
348 show_fan_min, store_fan_min, 2);
1da177e4 349
1da177e4 350#define show_temp_reg(reg) \
34875337
JD		 351static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
352 char *buf) \
1da177e4 353{ \
34875337 354 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 355 struct w83781d_data *data = w83781d_update_device(dev); \
34875337 356 int nr = attr->index; \
1da177e4
LT		 357 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
358 return sprintf(buf,"%d\n", \
359 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
360 } else { /* TEMP1 */ \
361 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
362 } \
363}
364show_temp_reg(temp);
365show_temp_reg(temp_max);
366show_temp_reg(temp_max_hyst);
367
368#define store_temp_reg(REG, reg) \
34875337
JD		 369static ssize_t store_temp_##reg (struct device *dev, \
370 struct device_attribute *da, const char *buf, size_t count) \
1da177e4 371{ \
34875337 372 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 373 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 374 int nr = attr->index; \
5bfedac0 375 long val; \
1da177e4
LT		 376 \
377 val = simple_strtol(buf, NULL, 10); \
378 \
9a61bf63 379 mutex_lock(&data->update_lock); \
1da177e4
LT		 380 \
381 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
382 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
31b8dc4d 383 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 384 data->temp_##reg##_add[nr-2]); \
385 } else { /* TEMP1 */ \
386 data->temp_##reg = TEMP_TO_REG(val); \
31b8dc4d 387 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT		 388 data->temp_##reg); \
389 } \
390 \
9a61bf63 391 mutex_unlock(&data->update_lock); \
1da177e4
LT		 392 return count; \
393}
394store_temp_reg(OVER, max);
395store_temp_reg(HYST, max_hyst);
396
1da177e4 397#define sysfs_temp_offsets(offset) \
34875337
JD		 398static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
399 show_temp, NULL, offset); \
400static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
401 show_temp_max, store_temp_max, offset); \
402static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
403 show_temp_max_hyst, store_temp_max_hyst, offset);
1da177e4
LT		 404
405sysfs_temp_offsets(1);
406sysfs_temp_offsets(2);
407sysfs_temp_offsets(3);
408
1da177e4 409static ssize_t
e404e274 410show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 411{
412 struct w83781d_data *data = w83781d_update_device(dev);
413 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
414}
415
311ce2ef
JC		 416static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
417
1da177e4 418static ssize_t
e404e274 419show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 420{
90d6619a 421 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 422 return sprintf(buf, "%ld\n", (long) data->vrm);
423}
424
425static ssize_t
e404e274 426store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 427{
7666c13c 428 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 429 u32 val;
430
431 val = simple_strtoul(buf, NULL, 10);
432 data->vrm = val;
433
434 return count;
435}
436
311ce2ef
JC		 437static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
438
1da177e4 439static ssize_t
e404e274 440show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 441{
442 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 443 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT		 444}
445
311ce2ef
JC		 446static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
447
7d4a1374
JD		 448static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
449 char *buf)
450{
451 struct w83781d_data *data = w83781d_update_device(dev);
452 int bitnr = to_sensor_dev_attr(attr)->index;
453 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
454}
455
456/* The W83781D has a single alarm bit for temp2 and temp3 */
457static ssize_t show_temp3_alarm(struct device *dev,
458 struct device_attribute *attr, char *buf)
459{
460 struct w83781d_data *data = w83781d_update_device(dev);
461 int bitnr = (data->type == w83781d) ? 5 : 13;
462 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
463}
464
465static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
466static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
467static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
468static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
469static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
470static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
471static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
472static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
473static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
474static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
475static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
476static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
477static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
478static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
479static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
480
e404e274 481static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 482{
483 struct w83781d_data *data = w83781d_update_device(dev);
484 return sprintf(buf, "%ld\n",
485 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
486}
1da177e4 487
1da177e4 488static ssize_t
34875337
JD		 489store_beep_mask(struct device *dev, struct device_attribute *attr,
490 const char *buf, size_t count)
1da177e4 491{
7666c13c 492 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 493 u32 val;
1da177e4
LT		 494
495 val = simple_strtoul(buf, NULL, 10);
496
9a61bf63 497 mutex_lock(&data->update_lock);
2fbbbf14
JD		 498 data->beep_mask &= 0x8000; /* preserve beep enable */
499 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
34875337
JD		 500 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
501 data->beep_mask & 0xff);
502 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
2fbbbf14 503 (data->beep_mask >> 8) & 0xff);
34875337
JD		 504 if (data->type != w83781d && data->type != as99127f) {
505 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
506 ((data->beep_mask) >> 16) & 0xff);
507 }
508 mutex_unlock(&data->update_lock);
1da177e4 509
34875337
JD		 510 return count;
511}
1da177e4 512
34875337
JD		 513static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
514 show_beep_mask, store_beep_mask);
1da177e4 515
7d4a1374
JD		 516static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
517 char *buf)
518{
519 struct w83781d_data *data = w83781d_update_device(dev);
520 int bitnr = to_sensor_dev_attr(attr)->index;
521 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
522}
523
524static ssize_t
525store_beep(struct device *dev, struct device_attribute *attr,
526 const char *buf, size_t count)
527{
528 struct w83781d_data *data = dev_get_drvdata(dev);
529 int bitnr = to_sensor_dev_attr(attr)->index;
530 unsigned long bit;
531 u8 reg;
532
533 bit = simple_strtoul(buf, NULL, 10);
534 if (bit & ~1)
535 return -EINVAL;
536
537 mutex_lock(&data->update_lock);
538 if (bit)
539 data->beep_mask |= (1 << bitnr);
540 else
541 data->beep_mask &= ~(1 << bitnr);
542
543 if (bitnr < 8) {
544 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
545 if (bit)
546 reg |= (1 << bitnr);
547 else
548 reg &= ~(1 << bitnr);
549 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
550 } else if (bitnr < 16) {
551 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
552 if (bit)
553 reg |= (1 << (bitnr - 8));
554 else
555 reg &= ~(1 << (bitnr - 8));
556 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
557 } else {
558 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
559 if (bit)
560 reg |= (1 << (bitnr - 16));
561 else
562 reg &= ~(1 << (bitnr - 16));
563 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
564 }
565 mutex_unlock(&data->update_lock);
566
567 return count;
568}
569
570/* The W83781D has a single beep bit for temp2 and temp3 */
571static ssize_t show_temp3_beep(struct device *dev,
572 struct device_attribute *attr, char *buf)
573{
574 struct w83781d_data *data = w83781d_update_device(dev);
575 int bitnr = (data->type == w83781d) ? 5 : 13;
576 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
577}
578
579static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
580 show_beep, store_beep, 0);
581static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
582 show_beep, store_beep, 1);
583static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
584 show_beep, store_beep, 2);
585static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
586 show_beep, store_beep, 3);
587static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
588 show_beep, store_beep, 8);
589static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
590 show_beep, store_beep, 9);
591static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
592 show_beep, store_beep, 10);
593static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
594 show_beep, store_beep, 16);
595static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
596 show_beep, store_beep, 17);
597static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
598 show_beep, store_beep, 6);
599static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
600 show_beep, store_beep, 7);
601static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
602 show_beep, store_beep, 11);
603static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
604 show_beep, store_beep, 4);
605static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
606 show_beep, store_beep, 5);
607static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
608 show_temp3_beep, store_beep, 13);
2fbbbf14
JD		 609static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
610 show_beep, store_beep, 15);
7d4a1374 611
1da177e4 612static ssize_t
34875337 613show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 614{
34875337 615 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4
LT		 616 struct w83781d_data *data = w83781d_update_device(dev);
617 return sprintf(buf, "%ld\n",
34875337 618 (long) DIV_FROM_REG(data->fan_div[attr->index]));
1da177e4
LT		 619}
620
621/* Note: we save and restore the fan minimum here, because its value is
622 determined in part by the fan divisor. This follows the principle of
d6e05edc 623 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT		 624 because the divisor changed. */
625static ssize_t
34875337
JD		 626store_fan_div(struct device *dev, struct device_attribute *da,
627 const char *buf, size_t count)
1da177e4 628{
34875337 629 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 630 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4 631 unsigned long min;
34875337 632 int nr = attr->index;
1da177e4
LT		 633 u8 reg;
634 unsigned long val = simple_strtoul(buf, NULL, 10);
635
9a61bf63 636 mutex_lock(&data->update_lock);
293c0997 637
1da177e4
LT		 638 /* Save fan_min */
639 min = FAN_FROM_REG(data->fan_min[nr],
640 DIV_FROM_REG(data->fan_div[nr]));
641
642 data->fan_div[nr] = DIV_TO_REG(val, data->type);
643
31b8dc4d 644 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT		 645 & (nr==0 ? 0xcf : 0x3f))
646 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
31b8dc4d 647 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4
LT		 648
649 /* w83781d and as99127f don't have extended divisor bits */
650 if (data->type != w83781d && data->type != as99127f) {
31b8dc4d 651 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
1da177e4
LT		 652 & ~(1 << (5 + nr)))
653 | ((data->fan_div[nr] & 0x04) << (3 + nr));
31b8dc4d 654 w83781d_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT		 655 }
656
657 /* Restore fan_min */
658 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
34875337 659 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 660
9a61bf63 661 mutex_unlock(&data->update_lock);
1da177e4
LT		 662 return count;
663}
664
34875337
JD		 665static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
666 show_fan_div, store_fan_div, 0);
667static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
668 show_fan_div, store_fan_div, 1);
669static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
670 show_fan_div, store_fan_div, 2);
1da177e4 671
1da177e4 672static ssize_t
34875337 673show_pwm(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 674{
34875337 675 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 676 struct w83781d_data *data = w83781d_update_device(dev);
34875337 677 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
1da177e4
LT		 678}
679
680static ssize_t
34875337 681show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
1da177e4
LT		 682{
683 struct w83781d_data *data = w83781d_update_device(dev);
34875337 684 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
1da177e4
LT		 685}
686
687static ssize_t
34875337
JD		 688store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
689 size_t count)
1da177e4 690{
34875337 691 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 692 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 693 int nr = attr->index;
1da177e4
LT		 694 u32 val;
695
696 val = simple_strtoul(buf, NULL, 10);
697
9a61bf63 698 mutex_lock(&data->update_lock);
34875337
JD		 699 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
700 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
9a61bf63 701 mutex_unlock(&data->update_lock);
1da177e4
LT		 702 return count;
703}
704
705static ssize_t
34875337
JD		 706store_pwm2_enable(struct device *dev, struct device_attribute *da,
707 const char *buf, size_t count)
1da177e4 708{
7666c13c 709 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 710 u32 val, reg;
711
712 val = simple_strtoul(buf, NULL, 10);
713
9a61bf63 714 mutex_lock(&data->update_lock);
1da177e4
LT		 715
716 switch (val) {
717 case 0:
718 case 1:
31b8dc4d
JD		 719 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
720 w83781d_write_value(data, W83781D_REG_PWMCLK12,
1da177e4
LT		 721 (reg & 0xf7) | (val << 3));
722
31b8dc4d
JD		 723 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
724 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
1da177e4
LT		 725 (reg & 0xef) | (!val << 4));
726
34875337 727 data->pwm2_enable = val;
1da177e4
LT		 728 break;
729
730 default:
9a61bf63 731 mutex_unlock(&data->update_lock);
1da177e4
LT		 732 return -EINVAL;
733 }
734
9a61bf63 735 mutex_unlock(&data->update_lock);
1da177e4
LT		 736 return count;
737}
738
34875337
JD		 739static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
740static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
741static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
742static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
743/* only PWM2 can be enabled/disabled */
744static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
745 show_pwm2_enable, store_pwm2_enable);
1da177e4 746
1da177e4 747static ssize_t
34875337 748show_sensor(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 749{
34875337 750 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 751 struct w83781d_data *data = w83781d_update_device(dev);
34875337 752 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
1da177e4
LT		 753}
754
755static ssize_t
34875337
JD		 756store_sensor(struct device *dev, struct device_attribute *da,
757 const char *buf, size_t count)
1da177e4 758{
34875337 759 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 760 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 761 int nr = attr->index;
1da177e4
LT		 762 u32 val, tmp;
763
764 val = simple_strtoul(buf, NULL, 10);
765
9a61bf63 766 mutex_lock(&data->update_lock);
1da177e4
LT		 767
768 switch (val) {
769 case 1: /* PII/Celeron diode */
31b8dc4d
JD		 770 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
771 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 772 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 773 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
774 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 775 tmp | BIT_SCFG2[nr]);
776 data->sens[nr] = val;
1da177e4
LT		 777 break;
778 case 2: /* 3904 */
31b8dc4d
JD		 779 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
780 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 781 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD		 782 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
783 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD		 784 tmp & ~BIT_SCFG2[nr]);
785 data->sens[nr] = val;
1da177e4 786 break;
b26f9330
JD		 787 case W83781D_DEFAULT_BETA:
788 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
789 "instead\n", W83781D_DEFAULT_BETA);
790 /* fall through */
791 case 4: /* thermistor */
31b8dc4d
JD		 792 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
793 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337
JD		 794 tmp & ~BIT_SCFG1[nr]);
795 data->sens[nr] = val;
1da177e4
LT		 796 break;
797 default:
b26f9330
JD		 798 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
799 (long) val);
1da177e4
LT		 800 break;
801 }
802
9a61bf63 803 mutex_unlock(&data->update_lock);
1da177e4
LT		 804 return count;
805}
806
34875337
JD		 807static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
808 show_sensor, store_sensor, 0);
809static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
393cdad6 810 show_sensor, store_sensor, 1);
34875337 811static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
393cdad6 812 show_sensor, store_sensor, 2);
1da177e4 813
1da177e4
LT		 814/* Assumes that adapter is of I2C, not ISA variety.
815 * OTHERWISE DON'T CALL THIS
816 */
817static int
0217eae3 818w83781d_detect_subclients(struct i2c_client *new_client)
1da177e4
LT		 819{
820 int i, val1 = 0, id;
821 int err;
0217eae3
WG		 822 int address = new_client->addr;
823 unsigned short sc_addr[2];
824 struct i2c_adapter *adapter = new_client->adapter;
1da177e4 825 struct w83781d_data *data = i2c_get_clientdata(new_client);
0217eae3 826 enum chips kind = data->type;
1da177e4
LT		 827
828 id = i2c_adapter_id(adapter);
829
830 if (force_subclients[0] == id && force_subclients[1] == address) {
831 for (i = 2; i <= 3; i++) {
832 if (force_subclients[i] < 0x48 ||
833 force_subclients[i] > 0x4f) {
834 dev_err(&new_client->dev, "Invalid subclient "
835 "address %d; must be 0x48-0x4f\n",
836 force_subclients[i]);
837 err = -EINVAL;
838 goto ERROR_SC_1;
839 }
840 }
31b8dc4d 841 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1da177e4
LT		 842 (force_subclients[2] & 0x07) |
843 ((force_subclients[3] & 0x07) << 4));
0217eae3 844 sc_addr[0] = force_subclients[2];
1da177e4 845 } else {
31b8dc4d 846 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
0217eae3 847 sc_addr[0] = 0x48 + (val1 & 0x07);
1da177e4
LT		 848 }
849
850 if (kind != w83783s) {
1da177e4
LT		 851 if (force_subclients[0] == id &&
852 force_subclients[1] == address) {
0217eae3 853 sc_addr[1] = force_subclients[3];
1da177e4 854 } else {
0217eae3 855 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
1da177e4 856 }
0217eae3 857 if (sc_addr[0] == sc_addr[1]) {
1da177e4
LT		 858 dev_err(&new_client->dev,
859 "Duplicate addresses 0x%x for subclients.\n",
0217eae3 860 sc_addr[0]);
1da177e4
LT		 861 err = -EBUSY;
862 goto ERROR_SC_2;
863 }
864 }
865
1da177e4 866 for (i = 0; i <= 1; i++) {
0217eae3
WG		 867 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
868 if (!data->lm75[i]) {
1da177e4
LT		 869 dev_err(&new_client->dev, "Subclient %d "
870 "registration at address 0x%x "
0217eae3
WG		 871 "failed.\n", i, sc_addr[i]);
872 err = -ENOMEM;
1da177e4
LT		 873 if (i == 1)
874 goto ERROR_SC_3;
875 goto ERROR_SC_2;
876 }
877 if (kind == w83783s)
878 break;
879 }
880
881 return 0;
882
883/* Undo inits in case of errors */
884ERROR_SC_3:
0217eae3 885 i2c_unregister_device(data->lm75[0]);
1da177e4 886ERROR_SC_2:
1da177e4 887ERROR_SC_1:
1da177e4
LT		 888 return err;
889}
890
34875337
JD		 891#define IN_UNIT_ATTRS(X) \
892 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
893 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
293c0997 894 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
7d4a1374
JD		 895 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
896 &sensor_dev_attr_in##X##_beep.dev_attr.attr
311ce2ef 897
34875337
JD		 898#define FAN_UNIT_ATTRS(X) \
899 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
900 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
7d4a1374
JD		 901 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
902 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
903 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
311ce2ef 904
34875337
JD		 905#define TEMP_UNIT_ATTRS(X) \
906 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
907 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
7d4a1374
JD		 908 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
909 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
910 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
311ce2ef
JC		 911
912static struct attribute* w83781d_attributes[] = {
913 IN_UNIT_ATTRS(0),
914 IN_UNIT_ATTRS(2),
915 IN_UNIT_ATTRS(3),
916 IN_UNIT_ATTRS(4),
917 IN_UNIT_ATTRS(5),
918 IN_UNIT_ATTRS(6),
919 FAN_UNIT_ATTRS(1),
920 FAN_UNIT_ATTRS(2),
921 FAN_UNIT_ATTRS(3),
922 TEMP_UNIT_ATTRS(1),
923 TEMP_UNIT_ATTRS(2),
924 &dev_attr_cpu0_vid.attr,
925 &dev_attr_vrm.attr,
926 &dev_attr_alarms.attr,
927 &dev_attr_beep_mask.attr,
2fbbbf14 928 &sensor_dev_attr_beep_enable.dev_attr.attr,
311ce2ef
JC		 929 NULL
930};
931static const struct attribute_group w83781d_group = {
932 .attrs = w83781d_attributes,
933};
934
935static struct attribute *w83781d_attributes_opt[] = {
936 IN_UNIT_ATTRS(1),
937 IN_UNIT_ATTRS(7),
938 IN_UNIT_ATTRS(8),
939 TEMP_UNIT_ATTRS(3),
34875337
JD		 940 &sensor_dev_attr_pwm1.dev_attr.attr,
941 &sensor_dev_attr_pwm2.dev_attr.attr,
942 &sensor_dev_attr_pwm3.dev_attr.attr,
943 &sensor_dev_attr_pwm4.dev_attr.attr,
311ce2ef 944 &dev_attr_pwm2_enable.attr,
34875337
JD		 945 &sensor_dev_attr_temp1_type.dev_attr.attr,
946 &sensor_dev_attr_temp2_type.dev_attr.attr,
947 &sensor_dev_attr_temp3_type.dev_attr.attr,
311ce2ef
JC		 948 NULL
949};
950static const struct attribute_group w83781d_group_opt = {
951 .attrs = w83781d_attributes_opt,
952};
953
7666c13c 954/* No clean up is done on error, it's up to the caller */
1da177e4 955static int
7666c13c 956w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 957{
1da177e4 958 int err;
1da177e4 959
7666c13c
JD		 960 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
961 return err;
962
963 if (kind != w83783s) {
34875337
JD		 964 if ((err = device_create_file(dev,
965 &sensor_dev_attr_in1_input.dev_attr))
966 || (err = device_create_file(dev,
967 &sensor_dev_attr_in1_min.dev_attr))
968 || (err = device_create_file(dev,
7d4a1374
JD		 969 &sensor_dev_attr_in1_max.dev_attr))
970 || (err = device_create_file(dev,
971 &sensor_dev_attr_in1_alarm.dev_attr))
972 || (err = device_create_file(dev,
973 &sensor_dev_attr_in1_beep.dev_attr)))
7666c13c
JD		 974 return err;
975 }
976 if (kind != as99127f && kind != w83781d && kind != w83783s) {
34875337
JD		 977 if ((err = device_create_file(dev,
978 &sensor_dev_attr_in7_input.dev_attr))
979 || (err = device_create_file(dev,
980 &sensor_dev_attr_in7_min.dev_attr))
981 || (err = device_create_file(dev,
982 &sensor_dev_attr_in7_max.dev_attr))
7d4a1374
JD		 983 || (err = device_create_file(dev,
984 &sensor_dev_attr_in7_alarm.dev_attr))
985 || (err = device_create_file(dev,
986 &sensor_dev_attr_in7_beep.dev_attr))
34875337
JD		 987 || (err = device_create_file(dev,
988 &sensor_dev_attr_in8_input.dev_attr))
989 || (err = device_create_file(dev,
990 &sensor_dev_attr_in8_min.dev_attr))
991 || (err = device_create_file(dev,
7d4a1374
JD		 992 &sensor_dev_attr_in8_max.dev_attr))
993 || (err = device_create_file(dev,
994 &sensor_dev_attr_in8_alarm.dev_attr))
995 || (err = device_create_file(dev,
996 &sensor_dev_attr_in8_beep.dev_attr)))
7666c13c
JD		 997 return err;
998 }
999 if (kind != w83783s) {
34875337
JD		 1000 if ((err = device_create_file(dev,
1001 &sensor_dev_attr_temp3_input.dev_attr))
1002 || (err = device_create_file(dev,
1003 &sensor_dev_attr_temp3_max.dev_attr))
7666c13c 1004 || (err = device_create_file(dev,
7d4a1374
JD		 1005 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1006 || (err = device_create_file(dev,
1007 &sensor_dev_attr_temp3_alarm.dev_attr))
1008 || (err = device_create_file(dev,
1009 &sensor_dev_attr_temp3_beep.dev_attr)))
7666c13c 1010 return err;
7d4a1374 1011
7768aa76 1012 if (kind != w83781d) {
7d4a1374
JD		 1013 err = sysfs_chmod_file(&dev->kobj,
1014 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1015 S_IRUGO | S_IWUSR);
1016 if (err)
1017 return err;
7768aa76 1018 }
1da177e4
LT		 1019 }
1020
7666c13c 1021 if (kind != w83781d && kind != as99127f) {
34875337
JD		 1022 if ((err = device_create_file(dev,
1023 &sensor_dev_attr_pwm1.dev_attr))
1024 || (err = device_create_file(dev,
1025 &sensor_dev_attr_pwm2.dev_attr))
7666c13c
JD		 1026 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1027 return err;
1da177e4 1028 }
7666c13c 1029 if (kind == w83782d && !is_isa) {
34875337
JD		 1030 if ((err = device_create_file(dev,
1031 &sensor_dev_attr_pwm3.dev_attr))
1032 || (err = device_create_file(dev,
1033 &sensor_dev_attr_pwm4.dev_attr)))
7666c13c
JD		 1034 return err;
1035 }
1036
1037 if (kind != as99127f && kind != w83781d) {
34875337
JD		 1038 if ((err = device_create_file(dev,
1039 &sensor_dev_attr_temp1_type.dev_attr))
7666c13c 1040 || (err = device_create_file(dev,
34875337 1041 &sensor_dev_attr_temp2_type.dev_attr)))
7666c13c
JD		 1042 return err;
1043 if (kind != w83783s) {
1044 if ((err = device_create_file(dev,
34875337 1045 &sensor_dev_attr_temp3_type.dev_attr)))
7666c13c 1046 return err;
1da177e4 1047 }
7666c13c 1048 }
1da177e4 1049
7666c13c
JD		 1050 return 0;
1051}
1da177e4 1052
0217eae3 1053/* Return 0 if detection is successful, -ENODEV otherwise */
7666c13c 1054static int
310ec792 1055w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
7666c13c 1056{
bab2bf44 1057 int val1, val2;
0217eae3
WG		 1058 struct w83781d_data *isa = w83781d_data_if_isa();
1059 struct i2c_adapter *adapter = client->adapter;
1060 int address = client->addr;
bab2bf44 1061 const char *client_name;
7666c13c
JD		 1062 enum vendor { winbond, asus } vendid;
1063
0217eae3
WG		 1064 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1065 return -ENODEV;
1da177e4 1066
0217eae3
WG		 1067 /* We block updates of the ISA device to minimize the risk of
1068 concurrent access to the same W83781D chip through different
1069 interfaces. */
1070 if (isa)
1071 mutex_lock(&isa->update_lock);
1da177e4 1072
bab2bf44
JD		 1073 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1074 dev_dbg(&adapter->dev,
1075 "Detection of w83781d chip failed at step 3\n");
1076 goto err_nodev;
1077 }
1078
1079 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1080 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1081 /* Check for Winbond or Asus ID if in bank 0 */
1082 if (!(val1 & 0x07) &&
1083 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1084 ( (val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1085 dev_dbg(&adapter->dev,
1086 "Detection of w83781d chip failed at step 4\n");
1087 goto err_nodev;
1088 }
1089 /* If Winbond SMBus, check address at 0x48.
1090 Asus doesn't support, except for as99127f rev.2 */
1091 if ((!(val1 & 0x80) && val2 == 0xa3) ||
1092 ( (val1 & 0x80) && val2 == 0x5c)) {
1093 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1094 != address) {
1095 dev_dbg(&adapter->dev,
1096 "Detection of w83781d chip failed at step 5\n");
0217eae3 1097 goto err_nodev;
1da177e4 1098 }
1da177e4
LT		 1099 }
1100
bab2bf44 1101 /* Put it now into bank 0 and Vendor ID High Byte */
0217eae3
WG		 1102 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1103 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1104 & 0x78) | 0x80);
1da177e4 1105
bab2bf44
JD		 1106 /* Get the vendor ID */
1107 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1108 if (val2 == 0x5c)
1109 vendid = winbond;
1110 else if (val2 == 0x12)
1111 vendid = asus;
1112 else {
1113 dev_dbg(&adapter->dev,
1114 "w83781d chip vendor is neither Winbond nor Asus\n");
1115 goto err_nodev;
1da177e4
LT		 1116 }
1117
bab2bf44
JD		 1118 /* Determine the chip type. */
1119 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1120 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1da177e4 1121 client_name = "w83781d";
bab2bf44 1122 else if (val1 == 0x30 && vendid == winbond)
1da177e4 1123 client_name = "w83782d";
bab2bf44 1124 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1125 client_name = "w83783s";
bab2bf44 1126 else if (val1 == 0x31)
1da177e4 1127 client_name = "as99127f";
bab2bf44
JD		 1128 else
1129 goto err_nodev;
1130
1131 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1132 dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
1133 "be the same as ISA device\n", address);
1134 goto err_nodev;
1da177e4
LT		 1135 }
1136
bab2bf44
JD		 1137 if (isa)
1138 mutex_unlock(&isa->update_lock);
1139
0217eae3
WG		 1140 strlcpy(info->type, client_name, I2C_NAME_SIZE);
1141
1142 return 0;
1143
1144 err_nodev:
1145 if (isa)
1146 mutex_unlock(&isa->update_lock);
1147 return -ENODEV;
1148}
1149
1150static int
1151w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1152{
1153 struct device *dev = &client->dev;
1154 struct w83781d_data *data;
1155 int err;
1156
1157 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1158 if (!data) {
1159 err = -ENOMEM;
1160 goto ERROR1;
1161 }
1162
1163 i2c_set_clientdata(client, data);
1164 mutex_init(&data->lock);
1165 mutex_init(&data->update_lock);
1da177e4 1166
0217eae3
WG		 1167 data->type = id->driver_data;
1168 data->client = client;
1da177e4
LT		 1169
1170 /* attach secondary i2c lm75-like clients */
0217eae3
WG		 1171 err = w83781d_detect_subclients(client);
1172 if (err)
7666c13c 1173 goto ERROR3;
1da177e4
LT		 1174
1175 /* Initialize the chip */
7666c13c 1176 w83781d_init_device(dev);
1da177e4
LT		 1177
1178 /* Register sysfs hooks */
0217eae3 1179 err = w83781d_create_files(dev, data->type, 0);
7666c13c 1180 if (err)
943b0830 1181 goto ERROR4;
943b0830 1182
1beeffe4
TJ		 1183 data->hwmon_dev = hwmon_device_register(dev);
1184 if (IS_ERR(data->hwmon_dev)) {
1185 err = PTR_ERR(data->hwmon_dev);
311ce2ef 1186 goto ERROR4;
1da177e4
LT		 1187 }
1188
1189 return 0;
1190
943b0830 1191ERROR4:
311ce2ef
JC		 1192 sysfs_remove_group(&dev->kobj, &w83781d_group);
1193 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1194
0217eae3
WG		 1195 if (data->lm75[0])
1196 i2c_unregister_device(data->lm75[0]);
1197 if (data->lm75[1])
1198 i2c_unregister_device(data->lm75[1]);
1da177e4 1199ERROR3:
0217eae3 1200 i2c_set_clientdata(client, NULL);
1da177e4
LT		 1201 kfree(data);
1202ERROR1:
1da177e4
LT		 1203 return err;
1204}
1205
1206static int
0217eae3 1207w83781d_remove(struct i2c_client *client)
1da177e4 1208{
943b0830 1209 struct w83781d_data *data = i2c_get_clientdata(client);
0217eae3 1210 struct device *dev = &client->dev;
1da177e4 1211
0217eae3 1212 hwmon_device_unregister(data->hwmon_dev);
1da177e4 1213
0217eae3
WG		 1214 sysfs_remove_group(&dev->kobj, &w83781d_group);
1215 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1da177e4 1216
0217eae3
WG		 1217 if (data->lm75[0])
1218 i2c_unregister_device(data->lm75[0]);
1219 if (data->lm75[1])
1220 i2c_unregister_device(data->lm75[1]);
943b0830 1221
0217eae3
WG		 1222 i2c_set_clientdata(client, NULL);
1223 kfree(data);
1da177e4
LT		 1224
1225 return 0;
1226}
1227
1da177e4 1228static int
443850ce 1229w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1da177e4 1230{
0217eae3 1231 struct i2c_client *client = data->client;
443850ce 1232 int res, bank;
1da177e4
LT		 1233 struct i2c_client *cl;
1234
443850ce
WG		 1235 bank = (reg >> 8) & 0x0f;
1236 if (bank > 2)
1237 /* switch banks */
1238 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1239 bank);
1240 if (bank == 0 || bank > 2) {
1241 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1da177e4 1242 } else {
443850ce
WG		 1243 /* switch to subclient */
1244 cl = data->lm75[bank - 1];
1245 /* convert from ISA to LM75 I2C addresses */
1246 switch (reg & 0xff) {
1247 case 0x50: /* TEMP */
1248 res = swab16(i2c_smbus_read_word_data(cl, 0));
1249 break;
1250 case 0x52: /* CONFIG */
1251 res = i2c_smbus_read_byte_data(cl, 1);
1252 break;
1253 case 0x53: /* HYST */
1254 res = swab16(i2c_smbus_read_word_data(cl, 2));
1255 break;
1256 case 0x55: /* OVER */
1257 default:
1258 res = swab16(i2c_smbus_read_word_data(cl, 3));
1259 break;
1da177e4 1260 }
1da177e4 1261 }
443850ce
WG		 1262 if (bank > 2)
1263 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1264
1da177e4
LT		 1265 return res;
1266}
1267
1268static int
443850ce 1269w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1da177e4 1270{
0217eae3 1271 struct i2c_client *client = data->client;
443850ce 1272 int bank;
1da177e4
LT		 1273 struct i2c_client *cl;
1274
443850ce
WG		 1275 bank = (reg >> 8) & 0x0f;
1276 if (bank > 2)
1277 /* switch banks */
1278 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1279 bank);
1280 if (bank == 0 || bank > 2) {
1281 i2c_smbus_write_byte_data(client, reg & 0xff,
1282 value & 0xff);
1da177e4 1283 } else {
443850ce
WG		 1284 /* switch to subclient */
1285 cl = data->lm75[bank - 1];
1286 /* convert from ISA to LM75 I2C addresses */
1287 switch (reg & 0xff) {
1288 case 0x52: /* CONFIG */
1289 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1290 break;
1291 case 0x53: /* HYST */
1292 i2c_smbus_write_word_data(cl, 2, swab16(value));
1293 break;
1294 case 0x55: /* OVER */
1295 i2c_smbus_write_word_data(cl, 3, swab16(value));
1296 break;
1da177e4 1297 }
1da177e4 1298 }
443850ce
WG		 1299 if (bank > 2)
1300 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1301
1da177e4
LT		 1302 return 0;
1303}
1304
1da177e4 1305static void
7666c13c 1306w83781d_init_device(struct device *dev)
1da177e4 1307{
7666c13c 1308 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1309 int i, p;
1310 int type = data->type;
1311 u8 tmp;
1312
fabddcd4 1313 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1314 documentation for on the as99127f */
fabddcd4
JD		 1315 /* Resetting the chip has been the default for a long time,
1316 but it causes the BIOS initializations (fan clock dividers,
1317 thermal sensor types...) to be lost, so it is now optional.
1318 It might even go away if nobody reports it as being useful,
1319 as I see very little reason why this would be needed at
1320 all. */
7666c13c 1321 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD		 1322 "having, please report!\n");
1323
1da177e4 1324 /* save these registers */
31b8dc4d
JD		 1325 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1326 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1da177e4
LT		 1327 /* Reset all except Watchdog values and last conversion values
1328 This sets fan-divs to 2, among others */
31b8dc4d 1329 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1da177e4
LT		 1330 /* Restore the registers and disable power-on abnormal beep.
1331 This saves FAN 1/2/3 input/output values set by BIOS. */
31b8dc4d
JD		 1332 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1333 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1da177e4
LT		 1334 /* Disable master beep-enable (reset turns it on).
1335 Individual beep_mask should be reset to off but for some reason
1336 disabling this bit helps some people not get beeped */
31b8dc4d 1337 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1da177e4
LT		 1338 }
1339
fabddcd4
JD		 1340 /* Disable power-on abnormal beep, as advised by the datasheet.
1341 Already done if reset=1. */
1342 if (init && !reset && type != as99127f) {
31b8dc4d
JD		 1343 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1344 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
fabddcd4
JD		 1345 }
1346
303760b4 1347 data->vrm = vid_which_vrm();
1da177e4
LT		 1348
1349 if ((type != w83781d) && (type != as99127f)) {
31b8dc4d 1350 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT		 1351 for (i = 1; i <= 3; i++) {
1352 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1353 data->sens[i - 1] = 4;
1da177e4
LT		 1354 } else {
1355 if (w83781d_read_value
31b8dc4d 1356 (data,
1da177e4
LT		 1357 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1358 data->sens[i - 1] = 1;
1359 else
1360 data->sens[i - 1] = 2;
1361 }
7c7a5304 1362 if (type == w83783s && i == 2)
1da177e4
LT		 1363 break;
1364 }
1365 }
1366
1367 if (init && type != as99127f) {
1368 /* Enable temp2 */
31b8dc4d 1369 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1da177e4 1370 if (tmp & 0x01) {
7666c13c 1371 dev_warn(dev, "Enabling temp2, readings "
1da177e4 1372 "might not make sense\n");
31b8dc4d 1373 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1da177e4
LT		 1374 tmp & 0xfe);
1375 }
1376
1377 /* Enable temp3 */
7c7a5304 1378 if (type != w83783s) {
31b8dc4d 1379 tmp = w83781d_read_value(data,
1da177e4
LT		 1380 W83781D_REG_TEMP3_CONFIG);
1381 if (tmp & 0x01) {
7666c13c 1382 dev_warn(dev, "Enabling temp3, "
1da177e4 1383 "readings might not make sense\n");
31b8dc4d 1384 w83781d_write_value(data,
1da177e4
LT		 1385 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1386 }
1387 }
1da177e4
LT		 1388 }
1389
1390 /* Start monitoring */
31b8dc4d
JD		 1391 w83781d_write_value(data, W83781D_REG_CONFIG,
1392 (w83781d_read_value(data,
1da177e4
LT		 1393 W83781D_REG_CONFIG) & 0xf7)
1394 | 0x01);
7666c13c
JD		 1395
1396 /* A few vars need to be filled upon startup */
34875337
JD		 1397 for (i = 0; i < 3; i++) {
1398 data->fan_min[i] = w83781d_read_value(data,
7666c13c
JD		 1399 W83781D_REG_FAN_MIN(i));
1400 }
7666c13c
JD		 1401
1402 mutex_init(&data->update_lock);
1da177e4
LT		 1403}
1404
1405static struct w83781d_data *w83781d_update_device(struct device *dev)
1406{
7666c13c 1407 struct w83781d_data *data = dev_get_drvdata(dev);
0217eae3 1408 struct i2c_client *client = data->client;
1da177e4
LT		 1409 int i;
1410
9a61bf63 1411 mutex_lock(&data->update_lock);
1da177e4
LT		 1412
1413 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1414 || !data->valid) {
1415 dev_dbg(dev, "Starting device update\n");
1416
1417 for (i = 0; i <= 8; i++) {
7c7a5304 1418 if (data->type == w83783s && i == 1)
1da177e4
LT		 1419 continue; /* 783S has no in1 */
1420 data->in[i] =
31b8dc4d 1421 w83781d_read_value(data, W83781D_REG_IN(i));
1da177e4 1422 data->in_min[i] =
31b8dc4d 1423 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1da177e4 1424 data->in_max[i] =
31b8dc4d 1425 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
05663368 1426 if ((data->type != w83782d) && (i == 6))
1da177e4
LT		 1427 break;
1428 }
34875337
JD		 1429 for (i = 0; i < 3; i++) {
1430 data->fan[i] =
31b8dc4d 1431 w83781d_read_value(data, W83781D_REG_FAN(i));
34875337 1432 data->fan_min[i] =
31b8dc4d 1433 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1da177e4
LT		 1434 }
1435 if (data->type != w83781d && data->type != as99127f) {
34875337
JD		 1436 for (i = 0; i < 4; i++) {
1437 data->pwm[i] =
31b8dc4d 1438 w83781d_read_value(data,
34875337 1439 W83781D_REG_PWM[i]);
848ddf11
JD		 1440 /* Only W83782D on SMBus has PWM3 and PWM4 */
1441 if ((data->type != w83782d || !client)
34875337 1442 && i == 1)
1da177e4
LT		 1443 break;
1444 }
1445 /* Only PWM2 can be disabled */
34875337 1446 data->pwm2_enable = (w83781d_read_value(data,
1da177e4
LT		 1447 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1448 }
1449
31b8dc4d 1450 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1da177e4 1451 data->temp_max =
31b8dc4d 1452 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1da177e4 1453 data->temp_max_hyst =
31b8dc4d 1454 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1da177e4 1455 data->temp_add[0] =
31b8dc4d 1456 w83781d_read_value(data, W83781D_REG_TEMP(2));
1da177e4 1457 data->temp_max_add[0] =
31b8dc4d 1458 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1da177e4 1459 data->temp_max_hyst_add[0] =
31b8dc4d 1460 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
7c7a5304 1461 if (data->type != w83783s) {
1da177e4 1462 data->temp_add[1] =
31b8dc4d 1463 w83781d_read_value(data, W83781D_REG_TEMP(3));
1da177e4 1464 data->temp_max_add[1] =
31b8dc4d 1465 w83781d_read_value(data,
1da177e4
LT		 1466 W83781D_REG_TEMP_OVER(3));
1467 data->temp_max_hyst_add[1] =
31b8dc4d 1468 w83781d_read_value(data,
1da177e4
LT		 1469 W83781D_REG_TEMP_HYST(3));
1470 }
31b8dc4d 1471 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
7c7a5304 1472 data->vid = i & 0x0f;
31b8dc4d 1473 data->vid |= (w83781d_read_value(data,
7c7a5304 1474 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT		 1475 data->fan_div[0] = (i >> 4) & 0x03;
1476 data->fan_div[1] = (i >> 6) & 0x03;
31b8dc4d 1477 data->fan_div[2] = (w83781d_read_value(data,
7c7a5304 1478 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4 1479 if ((data->type != w83781d) && (data->type != as99127f)) {
31b8dc4d 1480 i = w83781d_read_value(data, W83781D_REG_VBAT);
1da177e4
LT		 1481 data->fan_div[0] |= (i >> 3) & 0x04;
1482 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1483 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1484 }
05663368 1485 if (data->type == w83782d) {
31b8dc4d 1486 data->alarms = w83781d_read_value(data,
c7f5d7ed 1487 W83782D_REG_ALARM1)
31b8dc4d 1488 | (w83781d_read_value(data,
c7f5d7ed 1489 W83782D_REG_ALARM2) << 8)
31b8dc4d 1490 | (w83781d_read_value(data,
c7f5d7ed
JD		 1491 W83782D_REG_ALARM3) << 16);
1492 } else if (data->type == w83783s) {
31b8dc4d 1493 data->alarms = w83781d_read_value(data,
c7f5d7ed 1494 W83782D_REG_ALARM1)
31b8dc4d 1495 | (w83781d_read_value(data,
c7f5d7ed
JD		 1496 W83782D_REG_ALARM2) << 8);
1497 } else {
1498 /* No real-time status registers, fall back to
1499 interrupt status registers */
31b8dc4d 1500 data->alarms = w83781d_read_value(data,
c7f5d7ed 1501 W83781D_REG_ALARM1)
31b8dc4d 1502 | (w83781d_read_value(data,
c7f5d7ed 1503 W83781D_REG_ALARM2) << 8);
1da177e4 1504 }
31b8dc4d 1505 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
2fbbbf14 1506 data->beep_mask = (i << 8) +
31b8dc4d 1507 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1da177e4
LT		 1508 if ((data->type != w83781d) && (data->type != as99127f)) {
1509 data->beep_mask |=
31b8dc4d 1510 w83781d_read_value(data,
1da177e4
LT		 1511 W83781D_REG_BEEP_INTS3) << 16;
1512 }
1513 data->last_updated = jiffies;
1514 data->valid = 1;
1515 }
1516
9a61bf63 1517 mutex_unlock(&data->update_lock);
1da177e4
LT		 1518
1519 return data;
1520}
1521
0217eae3
WG		 1522static const struct i2c_device_id w83781d_ids[] = {
1523 { "w83781d", w83781d, },
1524 { "w83782d", w83782d, },
1525 { "w83783s", w83783s, },
1526 { "as99127f", as99127f },
1527 { /* LIST END */ }
1528};
1529MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1530
1531static struct i2c_driver w83781d_driver = {
1532 .class = I2C_CLASS_HWMON,
1533 .driver = {
1534 .name = "w83781d",
1535 },
1536 .probe = w83781d_probe,
1537 .remove = w83781d_remove,
1538 .id_table = w83781d_ids,
1539 .detect = w83781d_detect,
c3813d6a 1540 .address_list = normal_i2c,
0217eae3
WG		 1541};
1542
1543/*
1544 * ISA related code
1545 */
443850ce
WG		 1546#ifdef CONFIG_ISA
1547
1548/* ISA device, if found */
1549static struct platform_device *pdev;
1550
1551static unsigned short isa_address = 0x290;
1552
1553/* I2C devices get this name attribute automatically, but for ISA devices
1554 we must create it by ourselves. */
1555static ssize_t
1556show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1557{
1558 struct w83781d_data *data = dev_get_drvdata(dev);
360782dd 1559 return sprintf(buf, "%s\n", data->name);
443850ce
WG		 1560}
1561static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1562
1563static struct w83781d_data *w83781d_data_if_isa(void)
1564{
1565 return pdev ? platform_get_drvdata(pdev) : NULL;
1566}
1567
1568/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1569static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1570{
0217eae3 1571 struct w83781d_data *isa;
443850ce
WG		 1572 int i;
1573
1574 if (!pdev) /* No ISA chip */
1575 return 0;
1576
443850ce
WG		 1577 isa = platform_get_drvdata(pdev);
1578
1579 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1580 return 0; /* Address doesn't match */
1581 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1582 return 0; /* Chip type doesn't match */
1583
1584 /* We compare all the limit registers, the config register and the
1585 * interrupt mask registers */
1586 for (i = 0x2b; i <= 0x3d; i++) {
0217eae3
WG		 1587 if (w83781d_read_value(isa, i) !=
1588 i2c_smbus_read_byte_data(client, i))
443850ce
WG		 1589 return 0;
1590 }
1591 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
0217eae3 1592 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
443850ce
WG		 1593 return 0;
1594 for (i = 0x43; i <= 0x46; i++) {
0217eae3
WG		 1595 if (w83781d_read_value(isa, i) !=
1596 i2c_smbus_read_byte_data(client, i))
443850ce
WG		 1597 return 0;
1598 }
1599
1600 return 1;
1601}
1602
1603static int
1604w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1605{
443850ce
WG		 1606 int word_sized, res;
1607
1608 word_sized = (((reg & 0xff00) == 0x100)
1609 || ((reg & 0xff00) == 0x200))
1610 && (((reg & 0x00ff) == 0x50)
1611 || ((reg & 0x00ff) == 0x53)
1612 || ((reg & 0x00ff) == 0x55));
1613 if (reg & 0xff00) {
1614 outb_p(W83781D_REG_BANK,
360782dd 1615 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1616 outb_p(reg >> 8,
360782dd 1617 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1618 }
360782dd
JD		 1619 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1620 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1621 if (word_sized) {
1622 outb_p((reg & 0xff) + 1,
360782dd 1623 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1624 res =
360782dd 1625 (res << 8) + inb_p(data->isa_addr +
443850ce
WG		 1626 W83781D_DATA_REG_OFFSET);
1627 }
1628 if (reg & 0xff00) {
1629 outb_p(W83781D_REG_BANK,
360782dd
JD		 1630 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1631 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1632 }
1633 return res;
1634}
1635
1636static void
1637w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1638{
443850ce
WG		 1639 int word_sized;
1640
1641 word_sized = (((reg & 0xff00) == 0x100)
1642 || ((reg & 0xff00) == 0x200))
1643 && (((reg & 0x00ff) == 0x53)
1644 || ((reg & 0x00ff) == 0x55));
1645 if (reg & 0xff00) {
1646 outb_p(W83781D_REG_BANK,
360782dd 1647 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1648 outb_p(reg >> 8,
360782dd 1649 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1650 }
360782dd 1651 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce
WG		 1652 if (word_sized) {
1653 outb_p(value >> 8,
360782dd 1654 data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce 1655 outb_p((reg & 0xff) + 1,
360782dd 1656 data->isa_addr + W83781D_ADDR_REG_OFFSET);
443850ce 1657 }
360782dd 1658 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1659 if (reg & 0xff00) {
1660 outb_p(W83781D_REG_BANK,
360782dd
JD		 1661 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1662 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
443850ce
WG		 1663 }
1664}
1665
1666/* The SMBus locks itself, usually, but nothing may access the Winbond between
1667 bank switches. ISA access must always be locked explicitly!
1668 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1669 would slow down the W83781D access and should not be necessary.
1670 There are some ugly typecasts here, but the good news is - they should
1671 nowhere else be necessary! */
1672static int
1673w83781d_read_value(struct w83781d_data *data, u16 reg)
1674{
0217eae3 1675 struct i2c_client *client = data->client;
443850ce
WG		 1676 int res;
1677
1678 mutex_lock(&data->lock);
0217eae3 1679 if (client)
443850ce
WG		 1680 res = w83781d_read_value_i2c(data, reg);
1681 else
1682 res = w83781d_read_value_isa(data, reg);
1683 mutex_unlock(&data->lock);
1684 return res;
1685}
1686
1687static int
1688w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1689{
0217eae3 1690 struct i2c_client *client = data->client;
443850ce
WG		 1691
1692 mutex_lock(&data->lock);
0217eae3 1693 if (client)
443850ce
WG		 1694 w83781d_write_value_i2c(data, reg, value);
1695 else
1696 w83781d_write_value_isa(data, reg, value);
1697 mutex_unlock(&data->lock);
1698 return 0;
1699}
1700
1701static int __devinit
1702w83781d_isa_probe(struct platform_device *pdev)
1703{
1704 int err, reg;
1705 struct w83781d_data *data;
1706 struct resource *res;
443850ce
WG		 1707
1708 /* Reserve the ISA region */
1709 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1710 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1711 "w83781d")) {
1712 err = -EBUSY;
1713 goto exit;
1714 }
1715
1716 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1717 if (!data) {
1718 err = -ENOMEM;
1719 goto exit_release_region;
1720 }
1721 mutex_init(&data->lock);
360782dd 1722 data->isa_addr = res->start;
443850ce
WG		 1723 platform_set_drvdata(pdev, data);
1724
1725 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1726 switch (reg) {
1727 case 0x30:
1728 data->type = w83782d;
360782dd 1729 data->name = "w83782d";
443850ce
WG		 1730 break;
1731 default:
1732 data->type = w83781d;
360782dd 1733 data->name = "w83781d";
443850ce 1734 }
443850ce
WG		 1735
1736 /* Initialize the W83781D chip */
1737 w83781d_init_device(&pdev->dev);
1738
1739 /* Register sysfs hooks */
1740 err = w83781d_create_files(&pdev->dev, data->type, 1);
1741 if (err)
1742 goto exit_remove_files;
1743
1744 err = device_create_file(&pdev->dev, &dev_attr_name);
1745 if (err)
1746 goto exit_remove_files;
1747
1748 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1749 if (IS_ERR(data->hwmon_dev)) {
1750 err = PTR_ERR(data->hwmon_dev);
1751 goto exit_remove_files;
1752 }
1753
1754 return 0;
1755
1756 exit_remove_files:
1757 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1758 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1759 device_remove_file(&pdev->dev, &dev_attr_name);
1760 kfree(data);
1761 exit_release_region:
1762 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1763 exit:
1764 return err;
1765}
1766
1767static int __devexit
1768w83781d_isa_remove(struct platform_device *pdev)
1769{
1770 struct w83781d_data *data = platform_get_drvdata(pdev);
1771
1772 hwmon_device_unregister(data->hwmon_dev);
1773 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1774 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1775 device_remove_file(&pdev->dev, &dev_attr_name);
360782dd 1776 release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
443850ce
WG		 1777 kfree(data);
1778
1779 return 0;
1780}
1781
1782static struct platform_driver w83781d_isa_driver = {
1783 .driver = {
1784 .owner = THIS_MODULE,
1785 .name = "w83781d",
1786 },
1787 .probe = w83781d_isa_probe,
1788 .remove = __devexit_p(w83781d_isa_remove),
1789};
1790
7666c13c
JD		 1791/* return 1 if a supported chip is found, 0 otherwise */
1792static int __init
1793w83781d_isa_found(unsigned short address)
1794{
1795 int val, save, found = 0;
b0bcdd3c
JD		 1796 int port;
1797
1798 /* Some boards declare base+0 to base+7 as a PNP device, some base+4
1799 * to base+7 and some base+5 to base+6. So we better request each port
1800 * individually for the probing phase. */
1801 for (port = address; port < address + W83781D_EXTENT; port++) {
1802 if (!request_region(port, 1, "w83781d")) {
1803 pr_debug("w83781d: Failed to request port 0x%x\n",
1804 port);
1805 goto release;
1806 }
2961cb22 1807 }
7666c13c
JD		 1808
1809#define REALLY_SLOW_IO
1810 /* We need the timeouts for at least some W83781D-like
1811 chips. But only if we read 'undefined' registers. */
1812 val = inb_p(address + 1);
1813 if (inb_p(address + 2) != val
1814 || inb_p(address + 3) != val
1815 || inb_p(address + 7) != val) {
1816 pr_debug("w83781d: Detection failed at step 1\n");
1817 goto release;
1818 }
1819#undef REALLY_SLOW_IO
1820
1821 /* We should be able to change the 7 LSB of the address port. The
1822 MSB (busy flag) should be clear initially, set after the write. */
1823 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1824 if (save & 0x80) {
1825 pr_debug("w83781d: Detection failed at step 2\n");
1826 goto release;
1827 }
1828 val = ~save & 0x7f;
1829 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1830 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1831 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1832 pr_debug("w83781d: Detection failed at step 3\n");
1833 goto release;
1834 }
1835
1836 /* We found a device, now see if it could be a W83781D */
1837 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1838 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1839 if (val & 0x80) {
1840 pr_debug("w83781d: Detection failed at step 4\n");
1841 goto release;
1842 }
1843 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1844 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1845 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1846 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1847 if ((!(save & 0x80) && (val != 0xa3))
1848 || ((save & 0x80) && (val != 0x5c))) {
1849 pr_debug("w83781d: Detection failed at step 5\n");
1850 goto release;
1851 }
1852 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1853 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1854 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1855 pr_debug("w83781d: Detection failed at step 6\n");
1856 goto release;
1857 }
1858
1859 /* The busy flag should be clear again */
1860 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1861 pr_debug("w83781d: Detection failed at step 7\n");
1862 goto release;
1863 }
1864
1865 /* Determine the chip type */
1866 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1867 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1868 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1869 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1870 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1871 if ((val & 0xfe) == 0x10 /* W83781D */
05663368 1872 || val == 0x30) /* W83782D */
7666c13c
JD		 1873 found = 1;
1874
1875 if (found)
1876 pr_info("w83781d: Found a %s chip at %#x\n",
7666c13c
JD		 1877 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1878
1879 release:
b0bcdd3c
JD		 1880 for (port--; port >= address; port--)
1881 release_region(port, 1);
7666c13c
JD		 1882 return found;
1883}
1884
1885static int __init
1886w83781d_isa_device_add(unsigned short address)
1887{
1888 struct resource res = {
1889 .start = address,
15bde2f1 1890 .end = address + W83781D_EXTENT - 1,
7666c13c
JD		 1891 .name = "w83781d",
1892 .flags = IORESOURCE_IO,
1893 };
1894 int err;
1895
1896 pdev = platform_device_alloc("w83781d", address);
1897 if (!pdev) {
1898 err = -ENOMEM;
1899 printk(KERN_ERR "w83781d: Device allocation failed\n");
1900 goto exit;
1901 }
1902
1903 err = platform_device_add_resources(pdev, &res, 1);
1904 if (err) {
1905 printk(KERN_ERR "w83781d: Device resource addition failed "
1906 "(%d)\n", err);
1907 goto exit_device_put;
1908 }
1909
1910 err = platform_device_add(pdev);
1911 if (err) {
1912 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1913 err);
1914 goto exit_device_put;
1915 }
1916
1917 return 0;
1918
1919 exit_device_put:
1920 platform_device_put(pdev);
1921 exit:
1922 pdev = NULL;
1923 return err;
1924}
1925
1da177e4 1926static int __init
443850ce 1927w83781d_isa_register(void)
1da177e4 1928{
fde09509
JD		 1929 int res;
1930
7666c13c
JD		 1931 if (w83781d_isa_found(isa_address)) {
1932 res = platform_driver_register(&w83781d_isa_driver);
1933 if (res)
c6566206 1934 goto exit;
fde09509 1935
7666c13c
JD		 1936 /* Sets global pdev as a side effect */
1937 res = w83781d_isa_device_add(isa_address);
1938 if (res)
1939 goto exit_unreg_isa_driver;
1940 }
fde09509
JD		 1941
1942 return 0;
7666c13c 1943
443850ce 1944exit_unreg_isa_driver:
7666c13c 1945 platform_driver_unregister(&w83781d_isa_driver);
443850ce 1946exit:
7666c13c 1947 return res;
1da177e4
LT		 1948}
1949
dd56b638 1950static void
443850ce 1951w83781d_isa_unregister(void)
1da177e4 1952{
7666c13c
JD		 1953 if (pdev) {
1954 platform_device_unregister(pdev);
1955 platform_driver_unregister(&w83781d_isa_driver);
1956 }
443850ce
WG		 1957}
1958#else /* !CONFIG_ISA */
1959
1960static struct w83781d_data *w83781d_data_if_isa(void)
1961{
1962 return NULL;
1963}
1964
1965static int
1966w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1967{
1968 return 0;
1969}
1970
1971static int
1972w83781d_read_value(struct w83781d_data *data, u16 reg)
1973{
1974 int res;
1975
1976 mutex_lock(&data->lock);
1977 res = w83781d_read_value_i2c(data, reg);
1978 mutex_unlock(&data->lock);
1979
1980 return res;
1981}
1982
1983static int
1984w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1985{
1986 mutex_lock(&data->lock);
1987 w83781d_write_value_i2c(data, reg, value);
1988 mutex_unlock(&data->lock);
1989
1990 return 0;
1991}
1992
1993static int __init
1994w83781d_isa_register(void)
1995{
1996 return 0;
1997}
1998
dd56b638 1999static void
443850ce
WG		 2000w83781d_isa_unregister(void)
2001{
2002}
2003#endif /* CONFIG_ISA */
2004
2005static int __init
2006sensors_w83781d_init(void)
2007{
2008 int res;
2009
2010 /* We register the ISA device first, so that we can skip the
2011 * registration of an I2C interface to the same device. */
2012 res = w83781d_isa_register();
2013 if (res)
2014 goto exit;
2015
2016 res = i2c_add_driver(&w83781d_driver);
2017 if (res)
2018 goto exit_unreg_isa;
2019
2020 return 0;
2021
2022 exit_unreg_isa:
2023 w83781d_isa_unregister();
2024 exit:
2025 return res;
2026}
2027
2028static void __exit
2029sensors_w83781d_exit(void)
2030{
2031 w83781d_isa_unregister();
1da177e4
LT		 2032 i2c_del_driver(&w83781d_driver);
2033}
2034
2035MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2036 "Philip Edelbrock <phil@netroedge.com>, "
2037 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2038MODULE_DESCRIPTION("W83781D driver");
2039MODULE_LICENSE("GPL");
2040
2041module_init(sensors_w83781d_init);
2042module_exit(sensors_w83781d_exit);
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