]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/hwmon/w83627hf.c
[PATCH] hwmon: Fix w83627ehf/hf vs PNPACPI conflict (bug #4014)
[net-next-2.6.git] / drivers / hwmon / w83627hf.c
CommitLineData
1da177e4
LT
1/*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
31 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
32
33 For other winbond chips, and for i2c support in the above chips,
34 use w83781d.c.
35
36 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
37 supported yet.
38*/
39
40#include <linux/module.h>
41#include <linux/init.h>
42#include <linux/slab.h>
43#include <linux/jiffies.h>
44#include <linux/i2c.h>
fde09509 45#include <linux/i2c-isa.h>
943b0830 46#include <linux/hwmon.h>
303760b4 47#include <linux/hwmon-vid.h>
943b0830 48#include <linux/err.h>
1da177e4
LT
49#include <asm/io.h>
50#include "lm75.h"
51
52static u16 force_addr;
53module_param(force_addr, ushort, 0);
54MODULE_PARM_DESC(force_addr,
55 "Initialize the base address of the sensors");
56static u8 force_i2c = 0x1f;
57module_param(force_i2c, byte, 0);
58MODULE_PARM_DESC(force_i2c,
59 "Initialize the i2c address of the sensors");
60
2d8672c5
JD
61/* The actual ISA address is read from Super-I/O configuration space */
62static unsigned short address;
1da177e4
LT
63
64/* Insmod parameters */
2d8672c5 65enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
1da177e4 66
2251cf1a
JD
67static int reset;
68module_param(reset, bool, 0);
69MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
70
1da177e4
LT
71static int init = 1;
72module_param(init, bool, 0);
73MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74
75/* modified from kernel/include/traps.c */
76static int REG; /* The register to read/write */
77#define DEV 0x07 /* Register: Logical device select */
78static int VAL; /* The value to read/write */
79
80/* logical device numbers for superio_select (below) */
81#define W83627HF_LD_FDC 0x00
82#define W83627HF_LD_PRT 0x01
83#define W83627HF_LD_UART1 0x02
84#define W83627HF_LD_UART2 0x03
85#define W83627HF_LD_KBC 0x05
86#define W83627HF_LD_CIR 0x06 /* w83627hf only */
87#define W83627HF_LD_GAME 0x07
88#define W83627HF_LD_MIDI 0x07
89#define W83627HF_LD_GPIO1 0x07
90#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
91#define W83627HF_LD_GPIO2 0x08
92#define W83627HF_LD_GPIO3 0x09
93#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
94#define W83627HF_LD_ACPI 0x0a
95#define W83627HF_LD_HWM 0x0b
96
97#define DEVID 0x20 /* Register: Device ID */
98
99#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
100#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
101#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
102
103static inline void
104superio_outb(int reg, int val)
105{
106 outb(reg, REG);
107 outb(val, VAL);
108}
109
110static inline int
111superio_inb(int reg)
112{
113 outb(reg, REG);
114 return inb(VAL);
115}
116
117static inline void
118superio_select(int ld)
119{
120 outb(DEV, REG);
121 outb(ld, VAL);
122}
123
124static inline void
125superio_enter(void)
126{
127 outb(0x87, REG);
128 outb(0x87, REG);
129}
130
131static inline void
132superio_exit(void)
133{
134 outb(0xAA, REG);
135}
136
137#define W627_DEVID 0x52
138#define W627THF_DEVID 0x82
139#define W697_DEVID 0x60
140#define W637_DEVID 0x70
141#define WINB_ACT_REG 0x30
142#define WINB_BASE_REG 0x60
143/* Constants specified below */
144
ada0c2f8
PV
145/* Alignment of the base address */
146#define WINB_ALIGNMENT ~7
1da177e4 147
ada0c2f8
PV
148/* Offset & size of I/O region we are interested in */
149#define WINB_REGION_OFFSET 5
150#define WINB_REGION_SIZE 2
151
152/* Where are the sensors address/data registers relative to the base address */
1da177e4
LT
153#define W83781D_ADDR_REG_OFFSET 5
154#define W83781D_DATA_REG_OFFSET 6
155
156/* The W83781D registers */
157/* The W83782D registers for nr=7,8 are in bank 5 */
158#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
159 (0x554 + (((nr) - 7) * 2)))
160#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
161 (0x555 + (((nr) - 7) * 2)))
162#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
163 (0x550 + (nr) - 7))
164
165#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
166#define W83781D_REG_FAN(nr) (0x27 + (nr))
167
168#define W83781D_REG_TEMP2_CONFIG 0x152
169#define W83781D_REG_TEMP3_CONFIG 0x252
170#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
171 ((nr == 2) ? (0x0150) : \
172 (0x27)))
173#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
174 ((nr == 2) ? (0x153) : \
175 (0x3A)))
176#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
177 ((nr == 2) ? (0x155) : \
178 (0x39)))
179
180#define W83781D_REG_BANK 0x4E
181
182#define W83781D_REG_CONFIG 0x40
183#define W83781D_REG_ALARM1 0x41
184#define W83781D_REG_ALARM2 0x42
185#define W83781D_REG_ALARM3 0x450
186
187#define W83781D_REG_IRQ 0x4C
188#define W83781D_REG_BEEP_CONFIG 0x4D
189#define W83781D_REG_BEEP_INTS1 0x56
190#define W83781D_REG_BEEP_INTS2 0x57
191#define W83781D_REG_BEEP_INTS3 0x453
192
193#define W83781D_REG_VID_FANDIV 0x47
194
195#define W83781D_REG_CHIPID 0x49
196#define W83781D_REG_WCHIPID 0x58
197#define W83781D_REG_CHIPMAN 0x4F
198#define W83781D_REG_PIN 0x4B
199
200#define W83781D_REG_VBAT 0x5D
201
202#define W83627HF_REG_PWM1 0x5A
203#define W83627HF_REG_PWM2 0x5B
204#define W83627HF_REG_PWMCLK12 0x5C
205
206#define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */
207#define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */
208#define W83627THF_REG_PWM3 0x11 /* 637HF too */
209
210#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */
211
212static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
213static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
214 W83627THF_REG_PWM3 };
215#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
216 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
217
218#define W83781D_REG_I2C_ADDR 0x48
219#define W83781D_REG_I2C_SUBADDR 0x4A
220
221/* Sensor selection */
222#define W83781D_REG_SCFG1 0x5D
223static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
224#define W83781D_REG_SCFG2 0x59
225static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
226#define W83781D_DEFAULT_BETA 3435
227
228/* Conversions. Limit checking is only done on the TO_REG
229 variants. Note that you should be a bit careful with which arguments
230 these macros are called: arguments may be evaluated more than once.
231 Fixing this is just not worth it. */
232#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
233#define IN_FROM_REG(val) ((val) * 16)
234
235static inline u8 FAN_TO_REG(long rpm, int div)
236{
237 if (rpm == 0)
238 return 255;
239 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
240 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
241 254);
242}
243
244#define TEMP_MIN (-128000)
245#define TEMP_MAX ( 127000)
246
247/* TEMP: 0.001C/bit (-128C to +127C)
248 REG: 1C/bit, two's complement */
249static u8 TEMP_TO_REG(int temp)
250{
251 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
252 ntemp += (ntemp<0 ? -500 : 500);
253 return (u8)(ntemp / 1000);
254}
255
256static int TEMP_FROM_REG(u8 reg)
257{
258 return (s8)reg * 1000;
259}
260
261#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
262
263#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
264
265#define BEEP_MASK_FROM_REG(val) (val)
266#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
267#define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
268#define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
269
270#define DIV_FROM_REG(val) (1 << (val))
271
272static inline u8 DIV_TO_REG(long val)
273{
274 int i;
275 val = SENSORS_LIMIT(val, 1, 128) >> 1;
abc01922 276 for (i = 0; i < 7; i++) {
1da177e4
LT
277 if (val == 0)
278 break;
279 val >>= 1;
280 }
281 return ((u8) i);
282}
283
284/* For each registered chip, we need to keep some data in memory. That
285 data is pointed to by w83627hf_list[NR]->data. The structure itself is
286 dynamically allocated, at the same time when a new client is allocated. */
287struct w83627hf_data {
288 struct i2c_client client;
943b0830 289 struct class_device *class_dev;
1da177e4
LT
290 struct semaphore lock;
291 enum chips type;
292
293 struct semaphore update_lock;
294 char valid; /* !=0 if following fields are valid */
295 unsigned long last_updated; /* In jiffies */
296
297 struct i2c_client *lm75; /* for secondary I2C addresses */
298 /* pointer to array of 2 subclients */
299
300 u8 in[9]; /* Register value */
301 u8 in_max[9]; /* Register value */
302 u8 in_min[9]; /* Register value */
303 u8 fan[3]; /* Register value */
304 u8 fan_min[3]; /* Register value */
305 u8 temp;
306 u8 temp_max; /* Register value */
307 u8 temp_max_hyst; /* Register value */
308 u16 temp_add[2]; /* Register value */
309 u16 temp_max_add[2]; /* Register value */
310 u16 temp_max_hyst_add[2]; /* Register value */
311 u8 fan_div[3]; /* Register encoding, shifted right */
312 u8 vid; /* Register encoding, combined */
313 u32 alarms; /* Register encoding, combined */
314 u32 beep_mask; /* Register encoding, combined */
315 u8 beep_enable; /* Boolean */
316 u8 pwm[3]; /* Register value */
317 u16 sens[3]; /* 782D/783S only.
318 1 = pentium diode; 2 = 3904 diode;
319 3000-5000 = thermistor beta.
320 Default = 3435.
321 Other Betas unimplemented */
322 u8 vrm;
323 u8 vrm_ovt; /* Register value, 627thf & 637hf only */
324};
325
326
2d8672c5 327static int w83627hf_detect(struct i2c_adapter *adapter);
1da177e4
LT
328static int w83627hf_detach_client(struct i2c_client *client);
329
330static int w83627hf_read_value(struct i2c_client *client, u16 register);
331static int w83627hf_write_value(struct i2c_client *client, u16 register,
332 u16 value);
333static struct w83627hf_data *w83627hf_update_device(struct device *dev);
334static void w83627hf_init_client(struct i2c_client *client);
335
336static struct i2c_driver w83627hf_driver = {
337 .owner = THIS_MODULE,
338 .name = "w83627hf",
2d8672c5 339 .attach_adapter = w83627hf_detect,
1da177e4
LT
340 .detach_client = w83627hf_detach_client,
341};
342
343/* following are the sysfs callback functions */
344#define show_in_reg(reg) \
345static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
346{ \
347 struct w83627hf_data *data = w83627hf_update_device(dev); \
348 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
349}
350show_in_reg(in)
351show_in_reg(in_min)
352show_in_reg(in_max)
353
354#define store_in_reg(REG, reg) \
355static ssize_t \
356store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
357{ \
358 struct i2c_client *client = to_i2c_client(dev); \
359 struct w83627hf_data *data = i2c_get_clientdata(client); \
360 u32 val; \
361 \
362 val = simple_strtoul(buf, NULL, 10); \
363 \
364 down(&data->update_lock); \
365 data->in_##reg[nr] = IN_TO_REG(val); \
366 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
367 data->in_##reg[nr]); \
368 \
369 up(&data->update_lock); \
370 return count; \
371}
372store_in_reg(MIN, min)
373store_in_reg(MAX, max)
374
375#define sysfs_in_offset(offset) \
376static ssize_t \
a5099cfc 377show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
378{ \
379 return show_in(dev, buf, offset); \
380} \
381static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
382
383#define sysfs_in_reg_offset(reg, offset) \
a5099cfc 384static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
385{ \
386 return show_in_##reg (dev, buf, offset); \
387} \
388static ssize_t \
a5099cfc 389store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT
390 const char *buf, size_t count) \
391{ \
392 return store_in_##reg (dev, buf, count, offset); \
393} \
394static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
395 show_regs_in_##reg##offset, store_regs_in_##reg##offset);
396
397#define sysfs_in_offsets(offset) \
398sysfs_in_offset(offset) \
399sysfs_in_reg_offset(min, offset) \
400sysfs_in_reg_offset(max, offset)
401
402sysfs_in_offsets(1);
403sysfs_in_offsets(2);
404sysfs_in_offsets(3);
405sysfs_in_offsets(4);
406sysfs_in_offsets(5);
407sysfs_in_offsets(6);
408sysfs_in_offsets(7);
409sysfs_in_offsets(8);
410
411/* use a different set of functions for in0 */
412static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
413{
414 long in0;
415
416 if ((data->vrm_ovt & 0x01) &&
417 (w83627thf == data->type || w83637hf == data->type))
418
419 /* use VRM9 calculation */
420 in0 = (long)((reg * 488 + 70000 + 50) / 100);
421 else
422 /* use VRM8 (standard) calculation */
423 in0 = (long)IN_FROM_REG(reg);
424
425 return sprintf(buf,"%ld\n", in0);
426}
427
a5099cfc 428static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
429{
430 struct w83627hf_data *data = w83627hf_update_device(dev);
431 return show_in_0(data, buf, data->in[0]);
432}
433
a5099cfc 434static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
435{
436 struct w83627hf_data *data = w83627hf_update_device(dev);
437 return show_in_0(data, buf, data->in_min[0]);
438}
439
a5099cfc 440static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
441{
442 struct w83627hf_data *data = w83627hf_update_device(dev);
443 return show_in_0(data, buf, data->in_max[0]);
444}
445
a5099cfc 446static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
1da177e4
LT
447 const char *buf, size_t count)
448{
449 struct i2c_client *client = to_i2c_client(dev);
450 struct w83627hf_data *data = i2c_get_clientdata(client);
451 u32 val;
452
453 val = simple_strtoul(buf, NULL, 10);
454
455 down(&data->update_lock);
456
457 if ((data->vrm_ovt & 0x01) &&
458 (w83627thf == data->type || w83637hf == data->type))
459
460 /* use VRM9 calculation */
461 data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
462 else
463 /* use VRM8 (standard) calculation */
464 data->in_min[0] = IN_TO_REG(val);
465
466 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
467 up(&data->update_lock);
468 return count;
469}
470
a5099cfc 471static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
1da177e4
LT
472 const char *buf, size_t count)
473{
474 struct i2c_client *client = to_i2c_client(dev);
475 struct w83627hf_data *data = i2c_get_clientdata(client);
476 u32 val;
477
478 val = simple_strtoul(buf, NULL, 10);
479
480 down(&data->update_lock);
481
482 if ((data->vrm_ovt & 0x01) &&
483 (w83627thf == data->type || w83637hf == data->type))
484
485 /* use VRM9 calculation */
486 data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
487 else
488 /* use VRM8 (standard) calculation */
489 data->in_max[0] = IN_TO_REG(val);
490
491 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
492 up(&data->update_lock);
493 return count;
494}
495
496static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
497static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
498 show_regs_in_min0, store_regs_in_min0);
499static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
500 show_regs_in_max0, store_regs_in_max0);
501
502#define device_create_file_in(client, offset) \
503do { \
504device_create_file(&client->dev, &dev_attr_in##offset##_input); \
505device_create_file(&client->dev, &dev_attr_in##offset##_min); \
506device_create_file(&client->dev, &dev_attr_in##offset##_max); \
507} while (0)
508
509#define show_fan_reg(reg) \
510static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
511{ \
512 struct w83627hf_data *data = w83627hf_update_device(dev); \
513 return sprintf(buf,"%ld\n", \
514 FAN_FROM_REG(data->reg[nr-1], \
515 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
516}
517show_fan_reg(fan);
518show_fan_reg(fan_min);
519
520static ssize_t
521store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
522{
523 struct i2c_client *client = to_i2c_client(dev);
524 struct w83627hf_data *data = i2c_get_clientdata(client);
525 u32 val;
526
527 val = simple_strtoul(buf, NULL, 10);
528
529 down(&data->update_lock);
530 data->fan_min[nr - 1] =
531 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
532 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
533 data->fan_min[nr - 1]);
534
535 up(&data->update_lock);
536 return count;
537}
538
539#define sysfs_fan_offset(offset) \
a5099cfc 540static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
541{ \
542 return show_fan(dev, buf, offset); \
543} \
544static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
545
546#define sysfs_fan_min_offset(offset) \
a5099cfc 547static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
548{ \
549 return show_fan_min(dev, buf, offset); \
550} \
551static ssize_t \
a5099cfc 552store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
553{ \
554 return store_fan_min(dev, buf, count, offset); \
555} \
556static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
557 show_regs_fan_min##offset, store_regs_fan_min##offset);
558
559sysfs_fan_offset(1);
560sysfs_fan_min_offset(1);
561sysfs_fan_offset(2);
562sysfs_fan_min_offset(2);
563sysfs_fan_offset(3);
564sysfs_fan_min_offset(3);
565
566#define device_create_file_fan(client, offset) \
567do { \
568device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
569device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
570} while (0)
571
572#define show_temp_reg(reg) \
573static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
574{ \
575 struct w83627hf_data *data = w83627hf_update_device(dev); \
576 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
577 return sprintf(buf,"%ld\n", \
578 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
579 } else { /* TEMP1 */ \
580 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
581 } \
582}
583show_temp_reg(temp);
584show_temp_reg(temp_max);
585show_temp_reg(temp_max_hyst);
586
587#define store_temp_reg(REG, reg) \
588static ssize_t \
589store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
590{ \
591 struct i2c_client *client = to_i2c_client(dev); \
592 struct w83627hf_data *data = i2c_get_clientdata(client); \
593 u32 val; \
594 \
595 val = simple_strtoul(buf, NULL, 10); \
596 \
597 down(&data->update_lock); \
598 \
599 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
600 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
601 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
602 data->temp_##reg##_add[nr-2]); \
603 } else { /* TEMP1 */ \
604 data->temp_##reg = TEMP_TO_REG(val); \
605 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
606 data->temp_##reg); \
607 } \
608 \
609 up(&data->update_lock); \
610 return count; \
611}
612store_temp_reg(OVER, max);
613store_temp_reg(HYST, max_hyst);
614
615#define sysfs_temp_offset(offset) \
616static ssize_t \
a5099cfc 617show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
618{ \
619 return show_temp(dev, buf, offset); \
620} \
621static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
622
623#define sysfs_temp_reg_offset(reg, offset) \
a5099cfc 624static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
625{ \
626 return show_temp_##reg (dev, buf, offset); \
627} \
628static ssize_t \
a5099cfc 629store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT
630 const char *buf, size_t count) \
631{ \
632 return store_temp_##reg (dev, buf, count, offset); \
633} \
634static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
635 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
636
637#define sysfs_temp_offsets(offset) \
638sysfs_temp_offset(offset) \
639sysfs_temp_reg_offset(max, offset) \
640sysfs_temp_reg_offset(max_hyst, offset)
641
642sysfs_temp_offsets(1);
643sysfs_temp_offsets(2);
644sysfs_temp_offsets(3);
645
646#define device_create_file_temp(client, offset) \
647do { \
648device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
649device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
650device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
651} while (0)
652
653static ssize_t
a5099cfc 654show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
655{
656 struct w83627hf_data *data = w83627hf_update_device(dev);
657 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
658}
659static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
660#define device_create_file_vid(client) \
661device_create_file(&client->dev, &dev_attr_cpu0_vid)
662
663static ssize_t
a5099cfc 664show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
665{
666 struct w83627hf_data *data = w83627hf_update_device(dev);
667 return sprintf(buf, "%ld\n", (long) data->vrm);
668}
669static ssize_t
a5099cfc 670store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4
LT
671{
672 struct i2c_client *client = to_i2c_client(dev);
673 struct w83627hf_data *data = i2c_get_clientdata(client);
674 u32 val;
675
676 val = simple_strtoul(buf, NULL, 10);
677 data->vrm = val;
678
679 return count;
680}
681static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
682#define device_create_file_vrm(client) \
683device_create_file(&client->dev, &dev_attr_vrm)
684
685static ssize_t
a5099cfc 686show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
687{
688 struct w83627hf_data *data = w83627hf_update_device(dev);
689 return sprintf(buf, "%ld\n", (long) data->alarms);
690}
691static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
692#define device_create_file_alarms(client) \
693device_create_file(&client->dev, &dev_attr_alarms)
694
695#define show_beep_reg(REG, reg) \
a5099cfc 696static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
697{ \
698 struct w83627hf_data *data = w83627hf_update_device(dev); \
699 return sprintf(buf,"%ld\n", \
700 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
701}
702show_beep_reg(ENABLE, enable)
703show_beep_reg(MASK, mask)
704
705#define BEEP_ENABLE 0 /* Store beep_enable */
706#define BEEP_MASK 1 /* Store beep_mask */
707
708static ssize_t
709store_beep_reg(struct device *dev, const char *buf, size_t count,
710 int update_mask)
711{
712 struct i2c_client *client = to_i2c_client(dev);
713 struct w83627hf_data *data = i2c_get_clientdata(client);
714 u32 val, val2;
715
716 val = simple_strtoul(buf, NULL, 10);
717
718 down(&data->update_lock);
719
720 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
721 data->beep_mask = BEEP_MASK_TO_REG(val);
722 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
723 data->beep_mask & 0xff);
724 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
725 ((data->beep_mask) >> 16) & 0xff);
726 val2 = (data->beep_mask >> 8) & 0x7f;
727 } else { /* We are storing beep_enable */
728 val2 =
729 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
730 data->beep_enable = BEEP_ENABLE_TO_REG(val);
731 }
732
733 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
734 val2 | data->beep_enable << 7);
735
736 up(&data->update_lock);
737 return count;
738}
739
740#define sysfs_beep(REG, reg) \
a5099cfc 741static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4 742{ \
a5099cfc 743 return show_beep_##reg(dev, attr, buf); \
1da177e4
LT
744} \
745static ssize_t \
a5099cfc 746store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
747{ \
748 return store_beep_reg(dev, buf, count, BEEP_##REG); \
749} \
750static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
751 show_regs_beep_##reg, store_regs_beep_##reg);
752
753sysfs_beep(ENABLE, enable);
754sysfs_beep(MASK, mask);
755
756#define device_create_file_beep(client) \
757do { \
758device_create_file(&client->dev, &dev_attr_beep_enable); \
759device_create_file(&client->dev, &dev_attr_beep_mask); \
760} while (0)
761
762static ssize_t
763show_fan_div_reg(struct device *dev, char *buf, int nr)
764{
765 struct w83627hf_data *data = w83627hf_update_device(dev);
766 return sprintf(buf, "%ld\n",
767 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
768}
769
770/* Note: we save and restore the fan minimum here, because its value is
771 determined in part by the fan divisor. This follows the principle of
772 least suprise; the user doesn't expect the fan minimum to change just
773 because the divisor changed. */
774static ssize_t
775store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
776{
777 struct i2c_client *client = to_i2c_client(dev);
778 struct w83627hf_data *data = i2c_get_clientdata(client);
779 unsigned long min;
780 u8 reg;
781 unsigned long val = simple_strtoul(buf, NULL, 10);
782
783 down(&data->update_lock);
784
785 /* Save fan_min */
786 min = FAN_FROM_REG(data->fan_min[nr],
787 DIV_FROM_REG(data->fan_div[nr]));
788
789 data->fan_div[nr] = DIV_TO_REG(val);
790
791 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
792 & (nr==0 ? 0xcf : 0x3f))
793 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
794 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
795
796 reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
797 & ~(1 << (5 + nr)))
798 | ((data->fan_div[nr] & 0x04) << (3 + nr));
799 w83627hf_write_value(client, W83781D_REG_VBAT, reg);
800
801 /* Restore fan_min */
802 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
803 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
804
805 up(&data->update_lock);
806 return count;
807}
808
809#define sysfs_fan_div(offset) \
a5099cfc 810static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
811{ \
812 return show_fan_div_reg(dev, buf, offset); \
813} \
814static ssize_t \
a5099cfc 815store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT
816 const char *buf, size_t count) \
817{ \
818 return store_fan_div_reg(dev, buf, count, offset - 1); \
819} \
820static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
821 show_regs_fan_div_##offset, store_regs_fan_div_##offset);
822
823sysfs_fan_div(1);
824sysfs_fan_div(2);
825sysfs_fan_div(3);
826
827#define device_create_file_fan_div(client, offset) \
828do { \
829device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
830} while (0)
831
832static ssize_t
833show_pwm_reg(struct device *dev, char *buf, int nr)
834{
835 struct w83627hf_data *data = w83627hf_update_device(dev);
836 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
837}
838
839static ssize_t
840store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
841{
842 struct i2c_client *client = to_i2c_client(dev);
843 struct w83627hf_data *data = i2c_get_clientdata(client);
844 u32 val;
845
846 val = simple_strtoul(buf, NULL, 10);
847
848 down(&data->update_lock);
849
850 if (data->type == w83627thf) {
851 /* bits 0-3 are reserved in 627THF */
852 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
853 w83627hf_write_value(client,
854 W836X7HF_REG_PWM(data->type, nr),
855 data->pwm[nr - 1] |
856 (w83627hf_read_value(client,
857 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
858 } else {
859 data->pwm[nr - 1] = PWM_TO_REG(val);
860 w83627hf_write_value(client,
861 W836X7HF_REG_PWM(data->type, nr),
862 data->pwm[nr - 1]);
863 }
864
865 up(&data->update_lock);
866 return count;
867}
868
869#define sysfs_pwm(offset) \
a5099cfc 870static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
871{ \
872 return show_pwm_reg(dev, buf, offset); \
873} \
874static ssize_t \
a5099cfc 875store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
876{ \
877 return store_pwm_reg(dev, buf, count, offset); \
878} \
879static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
880 show_regs_pwm_##offset, store_regs_pwm_##offset);
881
882sysfs_pwm(1);
883sysfs_pwm(2);
884sysfs_pwm(3);
885
886#define device_create_file_pwm(client, offset) \
887do { \
888device_create_file(&client->dev, &dev_attr_pwm##offset); \
889} while (0)
890
891static ssize_t
892show_sensor_reg(struct device *dev, char *buf, int nr)
893{
894 struct w83627hf_data *data = w83627hf_update_device(dev);
895 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
896}
897
898static ssize_t
899store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
900{
901 struct i2c_client *client = to_i2c_client(dev);
902 struct w83627hf_data *data = i2c_get_clientdata(client);
903 u32 val, tmp;
904
905 val = simple_strtoul(buf, NULL, 10);
906
907 down(&data->update_lock);
908
909 switch (val) {
910 case 1: /* PII/Celeron diode */
911 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
912 w83627hf_write_value(client, W83781D_REG_SCFG1,
913 tmp | BIT_SCFG1[nr - 1]);
914 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
915 w83627hf_write_value(client, W83781D_REG_SCFG2,
916 tmp | BIT_SCFG2[nr - 1]);
917 data->sens[nr - 1] = val;
918 break;
919 case 2: /* 3904 */
920 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
921 w83627hf_write_value(client, W83781D_REG_SCFG1,
922 tmp | BIT_SCFG1[nr - 1]);
923 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
924 w83627hf_write_value(client, W83781D_REG_SCFG2,
925 tmp & ~BIT_SCFG2[nr - 1]);
926 data->sens[nr - 1] = val;
927 break;
928 case W83781D_DEFAULT_BETA: /* thermistor */
929 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
930 w83627hf_write_value(client, W83781D_REG_SCFG1,
931 tmp & ~BIT_SCFG1[nr - 1]);
932 data->sens[nr - 1] = val;
933 break;
934 default:
935 dev_err(&client->dev,
936 "Invalid sensor type %ld; must be 1, 2, or %d\n",
937 (long) val, W83781D_DEFAULT_BETA);
938 break;
939 }
940
941 up(&data->update_lock);
942 return count;
943}
944
945#define sysfs_sensor(offset) \
a5099cfc 946static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
947{ \
948 return show_sensor_reg(dev, buf, offset); \
949} \
950static ssize_t \
a5099cfc 951store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
952{ \
953 return store_sensor_reg(dev, buf, count, offset); \
954} \
955static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
956 show_regs_sensor_##offset, store_regs_sensor_##offset);
957
958sysfs_sensor(1);
959sysfs_sensor(2);
960sysfs_sensor(3);
961
962#define device_create_file_sensor(client, offset) \
963do { \
964device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
965} while (0)
966
967
e6cfb3ad 968static int __init w83627hf_find(int sioaddr, unsigned short *addr)
1da177e4
LT
969{
970 u16 val;
971
972 REG = sioaddr;
973 VAL = sioaddr + 1;
974
975 superio_enter();
976 val= superio_inb(DEVID);
977 if(val != W627_DEVID &&
978 val != W627THF_DEVID &&
979 val != W697_DEVID &&
980 val != W637_DEVID) {
981 superio_exit();
982 return -ENODEV;
983 }
984
985 superio_select(W83627HF_LD_HWM);
986 val = (superio_inb(WINB_BASE_REG) << 8) |
987 superio_inb(WINB_BASE_REG + 1);
ada0c2f8 988 *addr = val & WINB_ALIGNMENT;
2d8672c5 989 if (*addr == 0 && force_addr == 0) {
1da177e4
LT
990 superio_exit();
991 return -ENODEV;
992 }
1da177e4
LT
993
994 superio_exit();
995 return 0;
996}
997
2d8672c5 998static int w83627hf_detect(struct i2c_adapter *adapter)
1da177e4 999{
2d8672c5 1000 int val, kind;
1da177e4
LT
1001 struct i2c_client *new_client;
1002 struct w83627hf_data *data;
1003 int err = 0;
1004 const char *client_name = "";
1005
1da177e4 1006 if(force_addr)
ada0c2f8 1007 address = force_addr & WINB_ALIGNMENT;
1da177e4 1008
ada0c2f8
PV
1009 if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1010 w83627hf_driver.name)) {
1da177e4
LT
1011 err = -EBUSY;
1012 goto ERROR0;
1013 }
1014
1015 if(force_addr) {
1016 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1017 superio_enter();
1018 superio_select(W83627HF_LD_HWM);
1019 superio_outb(WINB_BASE_REG, address >> 8);
1020 superio_outb(WINB_BASE_REG+1, address & 0xff);
1021 superio_exit();
1022 }
1023
1024 superio_enter();
1025 val= superio_inb(DEVID);
1026 if(val == W627_DEVID)
1027 kind = w83627hf;
1028 else if(val == W697_DEVID)
1029 kind = w83697hf;
1030 else if(val == W627THF_DEVID)
1031 kind = w83627thf;
1032 else if(val == W637_DEVID)
1033 kind = w83637hf;
1034 else {
1035 dev_info(&adapter->dev,
1036 "Unsupported chip (dev_id=0x%02X).\n", val);
1037 goto ERROR1;
1038 }
1039
1040 superio_select(W83627HF_LD_HWM);
1041 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1042 superio_outb(WINB_ACT_REG, 1);
1043 superio_exit();
1044
1045 /* OK. For now, we presume we have a valid client. We now create the
1046 client structure, even though we cannot fill it completely yet.
1047 But it allows us to access w83627hf_{read,write}_value. */
1048
1049 if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1050 err = -ENOMEM;
1051 goto ERROR1;
1052 }
1053 memset(data, 0, sizeof(struct w83627hf_data));
1054
1055 new_client = &data->client;
1056 i2c_set_clientdata(new_client, data);
1057 new_client->addr = address;
1058 init_MUTEX(&data->lock);
1059 new_client->adapter = adapter;
1060 new_client->driver = &w83627hf_driver;
1061 new_client->flags = 0;
1062
1063
1064 if (kind == w83627hf) {
1065 client_name = "w83627hf";
1066 } else if (kind == w83627thf) {
1067 client_name = "w83627thf";
1068 } else if (kind == w83697hf) {
1069 client_name = "w83697hf";
1070 } else if (kind == w83637hf) {
1071 client_name = "w83637hf";
1072 }
1073
1074 /* Fill in the remaining client fields and put into the global list */
1075 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1076 data->type = kind;
1077 data->valid = 0;
1078 init_MUTEX(&data->update_lock);
1079
1080 /* Tell the I2C layer a new client has arrived */
1081 if ((err = i2c_attach_client(new_client)))
1082 goto ERROR2;
1083
1084 data->lm75 = NULL;
1085
1086 /* Initialize the chip */
1087 w83627hf_init_client(new_client);
1088
1089 /* A few vars need to be filled upon startup */
1090 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1091 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1092 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1093
1094 /* Register sysfs hooks */
943b0830
MH
1095 data->class_dev = hwmon_device_register(&new_client->dev);
1096 if (IS_ERR(data->class_dev)) {
1097 err = PTR_ERR(data->class_dev);
1098 goto ERROR3;
1099 }
1100
1da177e4
LT
1101 device_create_file_in(new_client, 0);
1102 if (kind != w83697hf)
1103 device_create_file_in(new_client, 1);
1104 device_create_file_in(new_client, 2);
1105 device_create_file_in(new_client, 3);
1106 device_create_file_in(new_client, 4);
1107 if (kind != w83627thf && kind != w83637hf) {
1108 device_create_file_in(new_client, 5);
1109 device_create_file_in(new_client, 6);
1110 }
1111 device_create_file_in(new_client, 7);
1112 device_create_file_in(new_client, 8);
1113
1114 device_create_file_fan(new_client, 1);
1115 device_create_file_fan(new_client, 2);
1116 if (kind != w83697hf)
1117 device_create_file_fan(new_client, 3);
1118
1119 device_create_file_temp(new_client, 1);
1120 device_create_file_temp(new_client, 2);
1121 if (kind != w83697hf)
1122 device_create_file_temp(new_client, 3);
1123
1124 if (kind != w83697hf)
1125 device_create_file_vid(new_client);
1126
1127 if (kind != w83697hf)
1128 device_create_file_vrm(new_client);
1129
1130 device_create_file_fan_div(new_client, 1);
1131 device_create_file_fan_div(new_client, 2);
1132 if (kind != w83697hf)
1133 device_create_file_fan_div(new_client, 3);
1134
1135 device_create_file_alarms(new_client);
1136
1137 device_create_file_beep(new_client);
1138
1139 device_create_file_pwm(new_client, 1);
1140 device_create_file_pwm(new_client, 2);
1141 if (kind == w83627thf || kind == w83637hf)
1142 device_create_file_pwm(new_client, 3);
1143
1144 device_create_file_sensor(new_client, 1);
1145 device_create_file_sensor(new_client, 2);
1146 if (kind != w83697hf)
1147 device_create_file_sensor(new_client, 3);
1148
1149 return 0;
1150
943b0830
MH
1151 ERROR3:
1152 i2c_detach_client(new_client);
1da177e4
LT
1153 ERROR2:
1154 kfree(data);
1155 ERROR1:
ada0c2f8 1156 release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1da177e4
LT
1157 ERROR0:
1158 return err;
1159}
1160
1161static int w83627hf_detach_client(struct i2c_client *client)
1162{
943b0830 1163 struct w83627hf_data *data = i2c_get_clientdata(client);
1da177e4
LT
1164 int err;
1165
943b0830
MH
1166 hwmon_device_unregister(data->class_dev);
1167
7bef5594 1168 if ((err = i2c_detach_client(client)))
1da177e4 1169 return err;
1da177e4 1170
ada0c2f8 1171 release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
943b0830 1172 kfree(data);
1da177e4
LT
1173
1174 return 0;
1175}
1176
1177
1178/*
1179 ISA access must always be locked explicitly!
1180 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1181 would slow down the W83781D access and should not be necessary.
1182 There are some ugly typecasts here, but the good news is - they should
1183 nowhere else be necessary! */
1184static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1185{
1186 struct w83627hf_data *data = i2c_get_clientdata(client);
1187 int res, word_sized;
1188
1189 down(&data->lock);
1190 word_sized = (((reg & 0xff00) == 0x100)
1191 || ((reg & 0xff00) == 0x200))
1192 && (((reg & 0x00ff) == 0x50)
1193 || ((reg & 0x00ff) == 0x53)
1194 || ((reg & 0x00ff) == 0x55));
1195 if (reg & 0xff00) {
1196 outb_p(W83781D_REG_BANK,
1197 client->addr + W83781D_ADDR_REG_OFFSET);
1198 outb_p(reg >> 8,
1199 client->addr + W83781D_DATA_REG_OFFSET);
1200 }
1201 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1202 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1203 if (word_sized) {
1204 outb_p((reg & 0xff) + 1,
1205 client->addr + W83781D_ADDR_REG_OFFSET);
1206 res =
1207 (res << 8) + inb_p(client->addr +
1208 W83781D_DATA_REG_OFFSET);
1209 }
1210 if (reg & 0xff00) {
1211 outb_p(W83781D_REG_BANK,
1212 client->addr + W83781D_ADDR_REG_OFFSET);
1213 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1214 }
1215 up(&data->lock);
1216 return res;
1217}
1218
1219static int w83627thf_read_gpio5(struct i2c_client *client)
1220{
1221 int res = 0xff, sel;
1222
1223 superio_enter();
1224 superio_select(W83627HF_LD_GPIO5);
1225
1226 /* Make sure these GPIO pins are enabled */
1227 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1228 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1229 goto exit;
1230 }
1231
1232 /* Make sure the pins are configured for input
1233 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1234 sel = superio_inb(W83627THF_GPIO5_IOSR);
1235 if ((sel & 0x1f) != 0x1f) {
1236 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1237 "function\n");
1238 goto exit;
1239 }
1240
1241 dev_info(&client->dev, "Reading VID from GPIO5\n");
1242 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1243
1244exit:
1245 superio_exit();
1246 return res;
1247}
1248
1249static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1250{
1251 struct w83627hf_data *data = i2c_get_clientdata(client);
1252 int word_sized;
1253
1254 down(&data->lock);
1255 word_sized = (((reg & 0xff00) == 0x100)
1256 || ((reg & 0xff00) == 0x200))
1257 && (((reg & 0x00ff) == 0x53)
1258 || ((reg & 0x00ff) == 0x55));
1259 if (reg & 0xff00) {
1260 outb_p(W83781D_REG_BANK,
1261 client->addr + W83781D_ADDR_REG_OFFSET);
1262 outb_p(reg >> 8,
1263 client->addr + W83781D_DATA_REG_OFFSET);
1264 }
1265 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1266 if (word_sized) {
1267 outb_p(value >> 8,
1268 client->addr + W83781D_DATA_REG_OFFSET);
1269 outb_p((reg & 0xff) + 1,
1270 client->addr + W83781D_ADDR_REG_OFFSET);
1271 }
1272 outb_p(value & 0xff,
1273 client->addr + W83781D_DATA_REG_OFFSET);
1274 if (reg & 0xff00) {
1275 outb_p(W83781D_REG_BANK,
1276 client->addr + W83781D_ADDR_REG_OFFSET);
1277 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1278 }
1279 up(&data->lock);
1280 return 0;
1281}
1282
1da177e4
LT
1283static void w83627hf_init_client(struct i2c_client *client)
1284{
1285 struct w83627hf_data *data = i2c_get_clientdata(client);
1286 int i;
1287 int type = data->type;
1288 u8 tmp;
1289
2251cf1a
JD
1290 if (reset) {
1291 /* Resetting the chip has been the default for a long time,
1292 but repeatedly caused problems (fans going to full
1293 speed...) so it is now optional. It might even go away if
1294 nobody reports it as being useful, as I see very little
1295 reason why this would be needed at all. */
1296 dev_info(&client->dev, "If reset=1 solved a problem you were "
1297 "having, please report!\n");
1298
1da177e4
LT
1299 /* save this register */
1300 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1301 /* Reset all except Watchdog values and last conversion values
1302 This sets fan-divs to 2, among others */
1303 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1304 /* Restore the register and disable power-on abnormal beep.
1305 This saves FAN 1/2/3 input/output values set by BIOS. */
1306 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1307 /* Disable master beep-enable (reset turns it on).
1308 Individual beeps should be reset to off but for some reason
1309 disabling this bit helps some people not get beeped */
1310 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1311 }
1312
1313 /* Minimize conflicts with other winbond i2c-only clients... */
1314 /* disable i2c subclients... how to disable main i2c client?? */
1315 /* force i2c address to relatively uncommon address */
1316 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1317 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1318
1319 /* Read VID only once */
1320 if (w83627hf == data->type || w83637hf == data->type) {
1321 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1322 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1323 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1324 } else if (w83627thf == data->type) {
1325 data->vid = w83627thf_read_gpio5(client) & 0x3f;
1326 }
1327
1328 /* Read VRM & OVT Config only once */
1329 if (w83627thf == data->type || w83637hf == data->type) {
1330 data->vrm_ovt =
1331 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1332 data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
1333 } else {
1334 /* Convert VID to voltage based on default VRM */
303760b4 1335 data->vrm = vid_which_vrm();
1da177e4
LT
1336 }
1337
1338 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1339 for (i = 1; i <= 3; i++) {
1340 if (!(tmp & BIT_SCFG1[i - 1])) {
1341 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1342 } else {
1343 if (w83627hf_read_value
1344 (client,
1345 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1346 data->sens[i - 1] = 1;
1347 else
1348 data->sens[i - 1] = 2;
1349 }
1350 if ((type == w83697hf) && (i == 2))
1351 break;
1352 }
1353
1354 if(init) {
1355 /* Enable temp2 */
1356 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1357 if (tmp & 0x01) {
1358 dev_warn(&client->dev, "Enabling temp2, readings "
1359 "might not make sense\n");
1360 w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1361 tmp & 0xfe);
1362 }
1363
1364 /* Enable temp3 */
1365 if (type != w83697hf) {
1366 tmp = w83627hf_read_value(client,
1367 W83781D_REG_TEMP3_CONFIG);
1368 if (tmp & 0x01) {
1369 dev_warn(&client->dev, "Enabling temp3, "
1370 "readings might not make sense\n");
1371 w83627hf_write_value(client,
1372 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1373 }
1374 }
1375
1376 if (type == w83627hf) {
1377 /* enable PWM2 control (can't hurt since PWM reg
1378 should have been reset to 0xff) */
1379 w83627hf_write_value(client, W83627HF_REG_PWMCLK12,
1380 0x19);
1381 }
1382 /* enable comparator mode for temp2 and temp3 so
1383 alarm indication will work correctly */
1384 i = w83627hf_read_value(client, W83781D_REG_IRQ);
1385 if (!(i & 0x40))
1386 w83627hf_write_value(client, W83781D_REG_IRQ,
1387 i | 0x40);
1388 }
1389
1390 /* Start monitoring */
1391 w83627hf_write_value(client, W83781D_REG_CONFIG,
1392 (w83627hf_read_value(client,
1393 W83781D_REG_CONFIG) & 0xf7)
1394 | 0x01);
1395}
1396
1397static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1398{
1399 struct i2c_client *client = to_i2c_client(dev);
1400 struct w83627hf_data *data = i2c_get_clientdata(client);
1401 int i;
1402
1403 down(&data->update_lock);
1404
1405 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1406 || !data->valid) {
1407 for (i = 0; i <= 8; i++) {
1408 /* skip missing sensors */
1409 if (((data->type == w83697hf) && (i == 1)) ||
1410 ((data->type == w83627thf || data->type == w83637hf)
1411 && (i == 4 || i == 5)))
1412 continue;
1413 data->in[i] =
1414 w83627hf_read_value(client, W83781D_REG_IN(i));
1415 data->in_min[i] =
1416 w83627hf_read_value(client,
1417 W83781D_REG_IN_MIN(i));
1418 data->in_max[i] =
1419 w83627hf_read_value(client,
1420 W83781D_REG_IN_MAX(i));
1421 }
1422 for (i = 1; i <= 3; i++) {
1423 data->fan[i - 1] =
1424 w83627hf_read_value(client, W83781D_REG_FAN(i));
1425 data->fan_min[i - 1] =
1426 w83627hf_read_value(client,
1427 W83781D_REG_FAN_MIN(i));
1428 }
1429 for (i = 1; i <= 3; i++) {
1430 u8 tmp = w83627hf_read_value(client,
1431 W836X7HF_REG_PWM(data->type, i));
1432 /* bits 0-3 are reserved in 627THF */
1433 if (data->type == w83627thf)
1434 tmp &= 0xf0;
1435 data->pwm[i - 1] = tmp;
1436 if(i == 2 &&
1437 (data->type == w83627hf || data->type == w83697hf))
1438 break;
1439 }
1440
1441 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1442 data->temp_max =
1443 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1444 data->temp_max_hyst =
1445 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1446 data->temp_add[0] =
1447 w83627hf_read_value(client, W83781D_REG_TEMP(2));
1448 data->temp_max_add[0] =
1449 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1450 data->temp_max_hyst_add[0] =
1451 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1452 if (data->type != w83697hf) {
1453 data->temp_add[1] =
1454 w83627hf_read_value(client, W83781D_REG_TEMP(3));
1455 data->temp_max_add[1] =
1456 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1457 data->temp_max_hyst_add[1] =
1458 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1459 }
1460
1461 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1462 data->fan_div[0] = (i >> 4) & 0x03;
1463 data->fan_div[1] = (i >> 6) & 0x03;
1464 if (data->type != w83697hf) {
1465 data->fan_div[2] = (w83627hf_read_value(client,
1466 W83781D_REG_PIN) >> 6) & 0x03;
1467 }
1468 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1469 data->fan_div[0] |= (i >> 3) & 0x04;
1470 data->fan_div[1] |= (i >> 4) & 0x04;
1471 if (data->type != w83697hf)
1472 data->fan_div[2] |= (i >> 5) & 0x04;
1473 data->alarms =
1474 w83627hf_read_value(client, W83781D_REG_ALARM1) |
1475 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1476 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1477 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1478 data->beep_enable = i >> 7;
1479 data->beep_mask = ((i & 0x7f) << 8) |
1480 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1481 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1482 data->last_updated = jiffies;
1483 data->valid = 1;
1484 }
1485
1486 up(&data->update_lock);
1487
1488 return data;
1489}
1490
1491static int __init sensors_w83627hf_init(void)
1492{
2d8672c5
JD
1493 if (w83627hf_find(0x2e, &address)
1494 && w83627hf_find(0x4e, &address)) {
1da177e4
LT
1495 return -ENODEV;
1496 }
1da177e4 1497
fde09509 1498 return i2c_isa_add_driver(&w83627hf_driver);
1da177e4
LT
1499}
1500
1501static void __exit sensors_w83627hf_exit(void)
1502{
fde09509 1503 i2c_isa_del_driver(&w83627hf_driver);
1da177e4
LT
1504}
1505
1506MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1507 "Philip Edelbrock <phil@netroedge.com>, "
1508 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1509MODULE_DESCRIPTION("W83627HF driver");
1510MODULE_LICENSE("GPL");
1511
1512module_init(sensors_w83627hf_init);
1513module_exit(sensors_w83627hf_exit);