[net-next-2.6.git] / drivers / gpu / drm / radeon / radeon_fence.c

/*
 * Copyright 2009 Jerome Glisse.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */
/*
 * Authors:
 *    Jerome Glisse <glisse@freedesktop.org>
 *    Dave Airlie
 */
#include <linux/seq_file.h>
#include <asm/atomic.h>
#include <linux/wait.h>
#include <linux/list.h>
#include <linux/kref.h>
#include <linux/slab.h>
#include "drmP.h"
#include "drm.h"
#include "radeon_reg.h"
#include "radeon.h"

int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
{
	unsigned long irq_flags;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (fence->emited) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
	if (!rdev->cp.ready) {
		/* FIXME: cp is not running assume everythings is done right
		 * away
		 */
		WREG32(rdev->fence_drv.scratch_reg, fence->seq);
	} else
		radeon_fence_ring_emit(rdev, fence);

	fence->emited = true;
	list_del(&fence->list);
	list_add_tail(&fence->list, &rdev->fence_drv.emited);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	return 0;
}

static bool radeon_fence_poll_locked(struct radeon_device *rdev)
{
	struct radeon_fence *fence;
	struct list_head *i, *n;
	uint32_t seq;
	bool wake = false;
	unsigned long cjiffies;

	seq = RREG32(rdev->fence_drv.scratch_reg);
	if (seq != rdev->fence_drv.last_seq) {
		rdev->fence_drv.last_seq = seq;
		rdev->fence_drv.last_jiffies = jiffies;
		rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	} else {
		cjiffies = jiffies;
		if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
			cjiffies -= rdev->fence_drv.last_jiffies;
			if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
				/* update the timeout */
				rdev->fence_drv.last_timeout -= cjiffies;
			} else {
				/* the 500ms timeout is elapsed we should test
				 * for GPU lockup
				 */
				rdev->fence_drv.last_timeout = 1;
			}
		} else {
			/* wrap around update last jiffies, we will just wait
			 * a little longer
			 */
			rdev->fence_drv.last_jiffies = cjiffies;
		}
		return false;
	}
	n = NULL;
	list_for_each(i, &rdev->fence_drv.emited) {
		fence = list_entry(i, struct radeon_fence, list);
		if (fence->seq == seq) {
			n = i;
			break;
		}
	}
	/* all fence previous to this one are considered as signaled */
	if (n) {
		i = n;
		do {
			n = i->prev;
			list_del(i);
			list_add_tail(i, &rdev->fence_drv.signaled);
			fence = list_entry(i, struct radeon_fence, list);
			fence->signaled = true;
			i = n;
		} while (i != &rdev->fence_drv.emited);
		wake = true;
	}
	return wake;
}

static void radeon_fence_destroy(struct kref *kref)
{
	unsigned long irq_flags;
        struct radeon_fence *fence;

	fence = container_of(kref, struct radeon_fence, kref);
	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	list_del(&fence->list);
	fence->emited = false;
	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	kfree(fence);
}

int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
{
	unsigned long irq_flags;

	*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
	if ((*fence) == NULL) {
		return -ENOMEM;
	}
	kref_init(&((*fence)->kref));
	(*fence)->rdev = rdev;
	(*fence)->emited = false;
	(*fence)->signaled = false;
	(*fence)->seq = 0;
	INIT_LIST_HEAD(&(*fence)->list);

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	return 0;
}


bool radeon_fence_signaled(struct radeon_fence *fence)
{
	unsigned long irq_flags;
	bool signaled = false;

	if (!fence)
		return true;

	if (fence->rdev->gpu_lockup)
		return true;

	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	signaled = fence->signaled;
	/* if we are shuting down report all fence as signaled */
	if (fence->rdev->shutdown) {
		signaled = true;
	}
	if (!fence->emited) {
		WARN(1, "Querying an unemited fence : %p !\n", fence);
		signaled = true;
	}
	if (!signaled) {
		radeon_fence_poll_locked(fence->rdev);
		signaled = fence->signaled;
	}
	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	return signaled;
}

int radeon_fence_wait(struct radeon_fence *fence, bool intr)
{
	struct radeon_device *rdev;
	unsigned long irq_flags, timeout;
	u32 seq;
	int r;

	if (fence == NULL) {
		WARN(1, "Querying an invalid fence : %p !\n", fence);
		return 0;
	}
	rdev = fence->rdev;
	if (radeon_fence_signaled(fence)) {
		return 0;
	}
	timeout = rdev->fence_drv.last_timeout;
retry:
	/* save current sequence used to check for GPU lockup */
	seq = rdev->fence_drv.last_seq;
	if (intr) {
		radeon_irq_kms_sw_irq_get(rdev);
		r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
				radeon_fence_signaled(fence), timeout);
		radeon_irq_kms_sw_irq_put(rdev);
		if (unlikely(r < 0)) {
			return r;
		}
	} else {
		radeon_irq_kms_sw_irq_get(rdev);
		r = wait_event_timeout(rdev->fence_drv.queue,
			 radeon_fence_signaled(fence), timeout);
		radeon_irq_kms_sw_irq_put(rdev);
	}
	if (unlikely(!radeon_fence_signaled(fence))) {
		/* we were interrupted for some reason and fence isn't
		 * isn't signaled yet, resume wait
		 */
		if (r) {
			timeout = r;
			goto retry;
		}
		/* don't protect read access to rdev->fence_drv.last_seq
		 * if we experiencing a lockup the value doesn't change
		 */
		if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
			/* good news we believe it's a lockup */
			WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n", fence->seq, seq);
			/* FIXME: what should we do ? marking everyone
			 * as signaled for now
			 */
			rdev->gpu_lockup = true;
			WREG32(rdev->fence_drv.scratch_reg, fence->seq);
			r = radeon_gpu_reset(rdev);
			if (r)
				return r;
			rdev->gpu_lockup = false;
		}
		timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
		write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
		rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
		rdev->fence_drv.last_jiffies = jiffies;
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		goto retry;
	}
	return 0;
}

int radeon_fence_wait_next(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	struct radeon_fence *fence;
	int r;

	if (rdev->gpu_lockup) {
		return 0;
	}
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (list_empty(&rdev->fence_drv.emited)) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence = list_entry(rdev->fence_drv.emited.next,
			   struct radeon_fence, list);
	radeon_fence_ref(fence);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	r = radeon_fence_wait(fence, false);
	radeon_fence_unref(&fence);
	return r;
}

int radeon_fence_wait_last(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	struct radeon_fence *fence;
	int r;

	if (rdev->gpu_lockup) {
		return 0;
	}
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	if (list_empty(&rdev->fence_drv.emited)) {
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return 0;
	}
	fence = list_entry(rdev->fence_drv.emited.prev,
			   struct radeon_fence, list);
	radeon_fence_ref(fence);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	r = radeon_fence_wait(fence, false);
	radeon_fence_unref(&fence);
	return r;
}

struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
{
	kref_get(&fence->kref);
	return fence;
}

void radeon_fence_unref(struct radeon_fence **fence)
{
	struct radeon_fence *tmp = *fence;

	*fence = NULL;
	if (tmp) {
		kref_put(&tmp->kref, &radeon_fence_destroy);
	}
}

void radeon_fence_process(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	bool wake;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	wake = radeon_fence_poll_locked(rdev);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	if (wake) {
		wake_up_all(&rdev->fence_drv.queue);
	}
}

int radeon_fence_driver_init(struct radeon_device *rdev)
{
	unsigned long irq_flags;
	int r;

	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
	if (r) {
		dev_err(rdev->dev, "fence failed to get scratch register\n");
		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
		return r;
	}
	WREG32(rdev->fence_drv.scratch_reg, 0);
	atomic_set(&rdev->fence_drv.seq, 0);
	INIT_LIST_HEAD(&rdev->fence_drv.created);
	INIT_LIST_HEAD(&rdev->fence_drv.emited);
	INIT_LIST_HEAD(&rdev->fence_drv.signaled);
	init_waitqueue_head(&rdev->fence_drv.queue);
	rdev->fence_drv.initialized = true;
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	if (radeon_debugfs_fence_init(rdev)) {
		dev_err(rdev->dev, "fence debugfs file creation failed\n");
	}
	return 0;
}

void radeon_fence_driver_fini(struct radeon_device *rdev)
{
	unsigned long irq_flags;

	if (!rdev->fence_drv.initialized)
		return;
	wake_up_all(&rdev->fence_drv.queue);
	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	rdev->fence_drv.initialized = false;
}


/*
 * Fence debugfs
 */
#if defined(CONFIG_DEBUG_FS)
static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *)m->private;
	struct drm_device *dev = node->minor->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_fence *fence;

	seq_printf(m, "Last signaled fence 0x%08X\n",
		   RREG32(rdev->fence_drv.scratch_reg));
	if (!list_empty(&rdev->fence_drv.emited)) {
		   fence = list_entry(rdev->fence_drv.emited.prev,
				      struct radeon_fence, list);
		   seq_printf(m, "Last emited fence %p with 0x%08X\n",
			      fence,  fence->seq);
	}
	return 0;
}

static struct drm_info_list radeon_debugfs_fence_list[] = {
	{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
};
#endif

int radeon_debugfs_fence_init(struct radeon_device *rdev)
{
#if defined(CONFIG_DEBUG_FS)
	return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
#else
	return 0;
#endif
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2009 Jerome Glisse.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sub license, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	15	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	16	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	17	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	18	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	19	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	20	*
	21	* The above copyright notice and this permission notice (including the
	22	* next paragraph) shall be included in all copies or substantial portions
	23	* of the Software.
	24	*
	25	*/
	26	/*
	27	* Authors:
	28	* Jerome Glisse <glisse@freedesktop.org>
	29	* Dave Airlie
	30	*/
	31	#include <linux/seq_file.h>
	32	#include <asm/atomic.h>
	33	#include <linux/wait.h>
	34	#include <linux/list.h>
	35	#include <linux/kref.h>
5a0e3ad6	36	#include <linux/slab.h>
771fe6b9 JG	37	#include "drmP.h"
	38	#include "drm.h"
	39	#include "radeon_reg.h"
	40	#include "radeon.h"
	41
	42	int radeon_fence_emit(struct radeon_device rdev, struct radeon_fence fence)
	43	{
	44	unsigned long irq_flags;
	45
	46	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	47	if (fence->emited) {
	48	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	49	return 0;
	50	}
	51	fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
	52	if (!rdev->cp.ready) {
	53	/* FIXME: cp is not running assume everythings is done right
	54	* away
	55	*/
	56	WREG32(rdev->fence_drv.scratch_reg, fence->seq);
3ce0a23d	57	} else
771fe6b9	58	radeon_fence_ring_emit(rdev, fence);
3ce0a23d	59
771fe6b9	60	fence->emited = true;
771fe6b9 JG	61	list_del(&fence->list);
	62	list_add_tail(&fence->list, &rdev->fence_drv.emited);
	63	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	64	return 0;
	65	}
	66
	67	static bool radeon_fence_poll_locked(struct radeon_device *rdev)
	68	{
	69	struct radeon_fence *fence;
	70	struct list_head i, n;
	71	uint32_t seq;
	72	bool wake = false;
225758d8	73	unsigned long cjiffies;
771fe6b9	74
771fe6b9	75	seq = RREG32(rdev->fence_drv.scratch_reg);
225758d8 JG	76	if (seq != rdev->fence_drv.last_seq) {
	77	rdev->fence_drv.last_seq = seq;
	78	rdev->fence_drv.last_jiffies = jiffies;
	79	rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	80	} else {
	81	cjiffies = jiffies;
	82	if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
	83	cjiffies -= rdev->fence_drv.last_jiffies;
	84	if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
	85	/* update the timeout */
	86	rdev->fence_drv.last_timeout -= cjiffies;
	87	} else {
	88	/* the 500ms timeout is elapsed we should test
	89	* for GPU lockup
	90	*/
	91	rdev->fence_drv.last_timeout = 1;
	92	}
	93	} else {
	94	/* wrap around update last jiffies, we will just wait
	95	* a little longer
	96	*/
	97	rdev->fence_drv.last_jiffies = cjiffies;
	98	}
	99	return false;
	100	}
771fe6b9 JG	101	n = NULL;
	102	list_for_each(i, &rdev->fence_drv.emited) {
	103	fence = list_entry(i, struct radeon_fence, list);
	104	if (fence->seq == seq) {
	105	n = i;
	106	break;
	107	}
	108	}
	109	/* all fence previous to this one are considered as signaled */
	110	if (n) {
	111	i = n;
	112	do {
	113	n = i->prev;
	114	list_del(i);
	115	list_add_tail(i, &rdev->fence_drv.signaled);
	116	fence = list_entry(i, struct radeon_fence, list);
	117	fence->signaled = true;
	118	i = n;
	119	} while (i != &rdev->fence_drv.emited);
	120	wake = true;
	121	}
	122	return wake;
	123	}
	124
	125	static void radeon_fence_destroy(struct kref *kref)
	126	{
	127	unsigned long irq_flags;
	128	struct radeon_fence *fence;
	129
	130	fence = container_of(kref, struct radeon_fence, kref);
	131	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	132	list_del(&fence->list);
	133	fence->emited = false;
	134	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	135	kfree(fence);
	136	}
	137
	138	int radeon_fence_create(struct radeon_device rdev, struct radeon_fence *fence)
	139	{
	140	unsigned long irq_flags;
	141
	142	*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
	143	if ((*fence) == NULL) {
	144	return -ENOMEM;
	145	}
	146	kref_init(&((*fence)->kref));
	147	(*fence)->rdev = rdev;
	148	(*fence)->emited = false;
	149	(*fence)->signaled = false;
	150	(*fence)->seq = 0;
	151	INIT_LIST_HEAD(&(*fence)->list);
	152
	153	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	154	list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
	155	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	156	return 0;
	157	}
	158
	159
	160	bool radeon_fence_signaled(struct radeon_fence *fence)
	161	{
771fe6b9 JG	162	unsigned long irq_flags;
	163	bool signaled = false;
	164
3655d54a	165	if (!fence)
771fe6b9	166	return true;
3655d54a DJ	167
3655d54a DJ	168	if (fence->rdev->gpu_lockup)
771fe6b9	169	return true;
3655d54a	170
771fe6b9 JG	171	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
	172	signaled = fence->signaled;
	173	/* if we are shuting down report all fence as signaled */
	174	if (fence->rdev->shutdown) {
	175	signaled = true;
	176	}
	177	if (!fence->emited) {
	178	WARN(1, "Querying an unemited fence : %p !\n", fence);
	179	signaled = true;
	180	}
	181	if (!signaled) {
	182	radeon_fence_poll_locked(fence->rdev);
	183	signaled = fence->signaled;
	184	}
	185	write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
	186	return signaled;
	187	}
	188
3ce0a23d	189	int radeon_fence_wait(struct radeon_fence *fence, bool intr)
771fe6b9 JG	190	{
771fe6b9 JG	191	struct radeon_device *rdev;
225758d8 JG	192	unsigned long irq_flags, timeout;
225758d8 JG	193	u32 seq;
771fe6b9 JG	194	int r;
771fe6b9 JG	195
771fe6b9 JG	196	if (fence == NULL) {
	197	WARN(1, "Querying an invalid fence : %p !\n", fence);
	198	return 0;
	199	}
	200	rdev = fence->rdev;
	201	if (radeon_fence_signaled(fence)) {
	202	return 0;
	203	}
225758d8	204	timeout = rdev->fence_drv.last_timeout;
771fe6b9	205	retry:
225758d8 JG	206	/* save current sequence used to check for GPU lockup */
225758d8 JG	207	seq = rdev->fence_drv.last_seq;
3ce0a23d	208	if (intr) {
1614f8b1	209	radeon_irq_kms_sw_irq_get(rdev);
771fe6b9 JG	210	r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
771fe6b9 JG	211	radeon_fence_signaled(fence), timeout);
1614f8b1	212	radeon_irq_kms_sw_irq_put(rdev);
90aca4d2	213	if (unlikely(r < 0)) {
5cc6fbab	214	return r;
90aca4d2	215	}
771fe6b9	216	} else {
1614f8b1	217	radeon_irq_kms_sw_irq_get(rdev);
771fe6b9 JG	218	r = wait_event_timeout(rdev->fence_drv.queue,
771fe6b9 JG	219	radeon_fence_signaled(fence), timeout);
1614f8b1	220	radeon_irq_kms_sw_irq_put(rdev);
771fe6b9 JG	221	}
771fe6b9 JG	222	if (unlikely(!radeon_fence_signaled(fence))) {
225758d8 JG	223	/* we were interrupted for some reason and fence isn't
	224	* isn't signaled yet, resume wait
	225	*/
	226	if (r) {
	227	timeout = r;
	228	goto retry;
771fe6b9	229	}
225758d8 JG	230	/* don't protect read access to rdev->fence_drv.last_seq
	231	* if we experiencing a lockup the value doesn't change
	232	*/
	233	if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
	234	/* good news we believe it's a lockup */
90aca4d2	235	WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n", fence->seq, seq);
225758d8 JG	236	/* FIXME: what should we do ? marking everyone
	237	* as signaled for now
	238	*/
90aca4d2	239	rdev->gpu_lockup = true;
225758d8	240	WREG32(rdev->fence_drv.scratch_reg, fence->seq);
90aca4d2 JG	241	r = radeon_gpu_reset(rdev);
	242	if (r)
	243	return r;
	244	rdev->gpu_lockup = false;
771fe6b9	245	}
225758d8 JG	246	timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	247	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	248	rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
	249	rdev->fence_drv.last_jiffies = jiffies;
	250	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
771fe6b9 JG	251	goto retry;
771fe6b9 JG	252	}
771fe6b9 JG	253	return 0;
	254	}
	255
	256	int radeon_fence_wait_next(struct radeon_device *rdev)
	257	{
	258	unsigned long irq_flags;
	259	struct radeon_fence *fence;
	260	int r;
	261
	262	if (rdev->gpu_lockup) {
	263	return 0;
	264	}
	265	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	266	if (list_empty(&rdev->fence_drv.emited)) {
	267	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	268	return 0;
	269	}
	270	fence = list_entry(rdev->fence_drv.emited.next,
	271	struct radeon_fence, list);
	272	radeon_fence_ref(fence);
	273	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	274	r = radeon_fence_wait(fence, false);
	275	radeon_fence_unref(&fence);
	276	return r;
	277	}
	278
	279	int radeon_fence_wait_last(struct radeon_device *rdev)
	280	{
	281	unsigned long irq_flags;
	282	struct radeon_fence *fence;
	283	int r;
	284
	285	if (rdev->gpu_lockup) {
	286	return 0;
	287	}
	288	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	289	if (list_empty(&rdev->fence_drv.emited)) {
	290	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	291	return 0;
	292	}
	293	fence = list_entry(rdev->fence_drv.emited.prev,
	294	struct radeon_fence, list);
	295	radeon_fence_ref(fence);
	296	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	297	r = radeon_fence_wait(fence, false);
	298	radeon_fence_unref(&fence);
	299	return r;
	300	}
	301
	302	struct radeon_fence radeon_fence_ref(struct radeon_fence fence)
	303	{
	304	kref_get(&fence->kref);
	305	return fence;
	306	}
	307
	308	void radeon_fence_unref(struct radeon_fence **fence)
	309	{
	310	struct radeon_fence tmp = fence;
	311
	312	*fence = NULL;
	313	if (tmp) {
	314	kref_put(&tmp->kref, &radeon_fence_destroy);
	315	}
	316	}
317
318	void radeon_fence_process(struct radeon_device *rdev)
319	{
320	unsigned long irq_flags;
321	bool wake;
322
323	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
324	wake = radeon_fence_poll_locked(rdev);
325	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
326	if (wake) {
327	wake_up_all(&rdev->fence_drv.queue);
328	}
329	}
330
331	int radeon_fence_driver_init(struct radeon_device *rdev)
332	{
333	unsigned long irq_flags;
334	int r;
335
336	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
337	r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
338	if (r) {
0a0c7596	339	dev_err(rdev->dev, "fence failed to get scratch register\n");
771fe6b9 JG	340	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
	341	return r;
	342	}
	343	WREG32(rdev->fence_drv.scratch_reg, 0);
	344	atomic_set(&rdev->fence_drv.seq, 0);
	345	INIT_LIST_HEAD(&rdev->fence_drv.created);
	346	INIT_LIST_HEAD(&rdev->fence_drv.emited);
	347	INIT_LIST_HEAD(&rdev->fence_drv.signaled);
771fe6b9	348	init_waitqueue_head(&rdev->fence_drv.queue);
0a0c7596	349	rdev->fence_drv.initialized = true;
771fe6b9 JG	350	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
771fe6b9 JG	351	if (radeon_debugfs_fence_init(rdev)) {
0a0c7596	352	dev_err(rdev->dev, "fence debugfs file creation failed\n");
771fe6b9 JG	353	}
	354	return 0;
	355	}
	356
	357	void radeon_fence_driver_fini(struct radeon_device *rdev)
	358	{
	359	unsigned long irq_flags;
	360
0a0c7596 JG	361	if (!rdev->fence_drv.initialized)
0a0c7596 JG	362	return;
771fe6b9 JG	363	wake_up_all(&rdev->fence_drv.queue);
	364	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
	365	radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
	366	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
0a0c7596	367	rdev->fence_drv.initialized = false;
771fe6b9 JG	368	}
	369
	370
	371	/*
	372	* Fence debugfs
	373	*/
	374	#if defined(CONFIG_DEBUG_FS)
	375	static int radeon_debugfs_fence_info(struct seq_file m, void data)
	376	{
	377	struct drm_info_node node = (struct drm_info_node )m->private;
	378	struct drm_device *dev = node->minor->dev;
	379	struct radeon_device *rdev = dev->dev_private;
	380	struct radeon_fence *fence;
	381
	382	seq_printf(m, "Last signaled fence 0x%08X\n",
	383	RREG32(rdev->fence_drv.scratch_reg));
	384	if (!list_empty(&rdev->fence_drv.emited)) {
	385	fence = list_entry(rdev->fence_drv.emited.prev,
	386	struct radeon_fence, list);
	387	seq_printf(m, "Last emited fence %p with 0x%08X\n",
	388	fence, fence->seq);
	389	}
	390	return 0;
	391	}
	392
	393	static struct drm_info_list radeon_debugfs_fence_list[] = {
	394	{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
	395	};
	396	#endif
	397
	398	int radeon_debugfs_fence_init(struct radeon_device *rdev)
	399	{
	400	#if defined(CONFIG_DEBUG_FS)
	401	return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
	402	#else
	403	return 0;
	404	#endif
	405	}