[net-next-2.6.git] / drivers / gpu / drm / radeon / radeon_drv.c

/**
 * \file radeon_drv.c
 * ATI Radeon driver
 *
 * \author Gareth Hughes <gareth@valinux.com>
 */

/*
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include "drmP.h"
#include "drm.h"
#include "radeon_drm.h"
#include "radeon_drv.h"

#include "drm_pciids.h"
#include <linux/console.h>


/*
 * KMS wrapper.
 */
#define KMS_DRIVER_MAJOR	2
#define KMS_DRIVER_MINOR	0
#define KMS_DRIVER_PATCHLEVEL	0
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
int radeon_driver_unload_kms(struct drm_device *dev);
int radeon_driver_firstopen_kms(struct drm_device *dev);
void radeon_driver_lastclose_kms(struct drm_device *dev);
int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
void radeon_driver_postclose_kms(struct drm_device *dev,
				 struct drm_file *file_priv);
void radeon_driver_preclose_kms(struct drm_device *dev,
				struct drm_file *file_priv);
int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
int radeon_resume_kms(struct drm_device *dev);
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
			 struct drm_file *file_priv);
int radeon_gem_object_init(struct drm_gem_object *obj);
void radeon_gem_object_free(struct drm_gem_object *obj);
extern struct drm_ioctl_desc radeon_ioctls_kms[];
extern int radeon_max_kms_ioctl;
int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
#if defined(CONFIG_DEBUG_FS)
int radeon_debugfs_init(struct drm_minor *minor);
void radeon_debugfs_cleanup(struct drm_minor *minor);
#endif


int radeon_no_wb;
int radeon_modeset = -1;
int radeon_dynclks = -1;
int radeon_r4xx_atom = 0;
int radeon_agpmode = 0;
int radeon_vram_limit = 0;
int radeon_gart_size = 512; /* default gart size */
int radeon_benchmarking = 0;
int radeon_testing = 0;
int radeon_connector_table = 0;
int radeon_tv = 1;
int radeon_new_pll = 1;
int radeon_audio = 1;

MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);

MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, radeon_modeset, int, 0400);

MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
module_param_named(dynclks, radeon_dynclks, int, 0444);

MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);

MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
module_param_named(vramlimit, radeon_vram_limit, int, 0600);

MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
module_param_named(agpmode, radeon_agpmode, int, 0444);

MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
module_param_named(gartsize, radeon_gart_size, int, 0600);

MODULE_PARM_DESC(benchmark, "Run benchmark");
module_param_named(benchmark, radeon_benchmarking, int, 0444);

MODULE_PARM_DESC(test, "Run tests");
module_param_named(test, radeon_testing, int, 0444);

MODULE_PARM_DESC(connector_table, "Force connector table");
module_param_named(connector_table, radeon_connector_table, int, 0444);

MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
module_param_named(tv, radeon_tv, int, 0444);

MODULE_PARM_DESC(new_pll, "Select new PLL code for AVIVO chips");
module_param_named(new_pll, radeon_new_pll, int, 0444);

MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
module_param_named(audio, radeon_audio, int, 0444);

static int radeon_suspend(struct drm_device *dev, pm_message_t state)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Disable *all* interrupts */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	return 0;
}

static int radeon_resume(struct drm_device *dev)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Restore interrupt registers */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	return 0;
}

static struct pci_device_id pciidlist[] = {
	radeon_PCI_IDS
};

#if defined(CONFIG_DRM_RADEON_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static struct drm_driver driver_old = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
	.load = radeon_driver_load,
	.firstopen = radeon_driver_firstopen,
	.open = radeon_driver_open,
	.preclose = radeon_driver_preclose,
	.postclose = radeon_driver_postclose,
	.lastclose = radeon_driver_lastclose,
	.unload = radeon_driver_unload,
	.suspend = radeon_suspend,
	.resume = radeon_resume,
	.get_vblank_counter = radeon_get_vblank_counter,
	.enable_vblank = radeon_enable_vblank,
	.disable_vblank = radeon_disable_vblank,
	.master_create = radeon_master_create,
	.master_destroy = radeon_master_destroy,
	.irq_preinstall = radeon_driver_irq_preinstall,
	.irq_postinstall = radeon_driver_irq_postinstall,
	.irq_uninstall = radeon_driver_irq_uninstall,
	.irq_handler = radeon_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.ioctls = radeon_ioctls,
	.dma_ioctl = radeon_cp_buffers,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = drm_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_compat_ioctl,
#endif
	},

	.pci_driver = {
		 .name = DRIVER_NAME,
		 .id_table = pciidlist,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static struct drm_driver kms_driver;

static int __devinit
radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_dev(pdev, ent, &kms_driver);
}

static void
radeon_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_suspend_kms(dev, state);
}

static int
radeon_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_resume_kms(dev);
}

static struct drm_driver kms_driver = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.dev_priv_size = 0,
	.load = radeon_driver_load_kms,
	.firstopen = radeon_driver_firstopen_kms,
	.open = radeon_driver_open_kms,
	.preclose = radeon_driver_preclose_kms,
	.postclose = radeon_driver_postclose_kms,
	.lastclose = radeon_driver_lastclose_kms,
	.unload = radeon_driver_unload_kms,
	.suspend = radeon_suspend_kms,
	.resume = radeon_resume_kms,
	.get_vblank_counter = radeon_get_vblank_counter_kms,
	.enable_vblank = radeon_enable_vblank_kms,
	.disable_vblank = radeon_disable_vblank_kms,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = radeon_debugfs_init,
	.debugfs_cleanup = radeon_debugfs_cleanup,
#endif
	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	.irq_handler = radeon_driver_irq_handler_kms,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.ioctls = radeon_ioctls_kms,
	.gem_init_object = radeon_gem_object_init,
	.gem_free_object = radeon_gem_object_free,
	.dma_ioctl = radeon_dma_ioctl_kms,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = radeon_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_kms_compat_ioctl,
#endif
	},

	.pci_driver = {
		 .name = DRIVER_NAME,
		 .id_table = pciidlist,
		 .probe = radeon_pci_probe,
		 .remove = radeon_pci_remove,
		 .suspend = radeon_pci_suspend,
		 .resume = radeon_pci_resume,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = KMS_DRIVER_MAJOR,
	.minor = KMS_DRIVER_MINOR,
	.patchlevel = KMS_DRIVER_PATCHLEVEL,
};

static struct drm_driver *driver;

static int __init radeon_init(void)
{
	driver = &driver_old;
	driver->num_ioctls = radeon_max_ioctl;
#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && radeon_modeset == -1) {
		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
		driver = &driver_old;
		driver->driver_features &= ~DRIVER_MODESET;
		radeon_modeset = 0;
	}
#endif
	/* if enabled by default */
	if (radeon_modeset == -1) {
#ifdef CONFIG_DRM_RADEON_KMS
		DRM_INFO("radeon defaulting to kernel modesetting.\n");
		radeon_modeset = 1;
#else
		DRM_INFO("radeon defaulting to userspace modesetting.\n");
		radeon_modeset = 0;
#endif
	}
	if (radeon_modeset == 1) {
		DRM_INFO("radeon kernel modesetting enabled.\n");
		driver = &kms_driver;
		driver->driver_features |= DRIVER_MODESET;
		driver->num_ioctls = radeon_max_kms_ioctl;
	}
	/* if the vga console setting is enabled still
	 * let modprobe override it */
	return drm_init(driver);
}

static void __exit radeon_exit(void)
{
	drm_exit(driver);
}

module_init(radeon_init);
module_exit(radeon_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/**
	2	* \file radeon_drv.c
	3	* ATI Radeon driver
	4	*
	5	* \author Gareth Hughes <gareth@valinux.com>
	6	*/
	7
	8	/*
	9	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
	10	* All Rights Reserved.
	11	*
	12	* Permission is hereby granted, free of charge, to any person obtaining a
	13	* copy of this software and associated documentation files (the "Software"),
	14	* to deal in the Software without restriction, including without limitation
	15	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	16	* and/or sell copies of the Software, and to permit persons to whom the
	17	* Software is furnished to do so, subject to the following conditions:
	18	*
	19	* The above copyright notice and this permission notice (including the next
	20	* paragraph) shall be included in all copies or substantial portions of the
	21	* Software.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	24	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	25	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	26	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	27	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	28	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	29	* OTHER DEALINGS IN THE SOFTWARE.
	30	*/
	31
1da177e4 LT	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "radeon_drm.h"
	35	#include "radeon_drv.h"
	36
	37	#include "drm_pciids.h"
771fe6b9 JG	38	#include <linux/console.h>
	39
	40
771fe6b9 JG	41	/*
	42	* KMS wrapper.
	43	*/
	44	#define KMS_DRIVER_MAJOR 2
	45	#define KMS_DRIVER_MINOR 0
	46	#define KMS_DRIVER_PATCHLEVEL 0
	47	int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
	48	int radeon_driver_unload_kms(struct drm_device *dev);
	49	int radeon_driver_firstopen_kms(struct drm_device *dev);
	50	void radeon_driver_lastclose_kms(struct drm_device *dev);
	51	int radeon_driver_open_kms(struct drm_device dev, struct drm_file file_priv);
	52	void radeon_driver_postclose_kms(struct drm_device *dev,
	53	struct drm_file *file_priv);
	54	void radeon_driver_preclose_kms(struct drm_device *dev,
	55	struct drm_file *file_priv);
	56	int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
	57	int radeon_resume_kms(struct drm_device *dev);
	58	u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
	59	int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
	60	void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
	61	void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
	62	int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
	63	void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
	64	irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9 JG	65	int radeon_dma_ioctl_kms(struct drm_device dev, void data,
	66	struct drm_file *file_priv);
	67	int radeon_gem_object_init(struct drm_gem_object *obj);
	68	void radeon_gem_object_free(struct drm_gem_object *obj);
	69	extern struct drm_ioctl_desc radeon_ioctls_kms[];
	70	extern int radeon_max_kms_ioctl;
	71	int radeon_mmap(struct file filp, struct vm_area_struct vma);
	72	#if defined(CONFIG_DEBUG_FS)
	73	int radeon_debugfs_init(struct drm_minor *minor);
	74	void radeon_debugfs_cleanup(struct drm_minor *minor);
	75	#endif
771fe6b9	76
1da177e4	77
689b9d74	78	int radeon_no_wb;
771fe6b9 JG	79	int radeon_modeset = -1;
	80	int radeon_dynclks = -1;
	81	int radeon_r4xx_atom = 0;
	82	int radeon_agpmode = 0;
	83	int radeon_vram_limit = 0;
	84	int radeon_gart_size = 512; /* default gart size */
	85	int radeon_benchmarking = 0;
ecc0b326	86	int radeon_testing = 0;
771fe6b9	87	int radeon_connector_table = 0;
4ce001ab	88	int radeon_tv = 1;
b27b6375	89	int radeon_new_pll = 1;
dafc3bd5	90	int radeon_audio = 1;
689b9d74	91
61a2d07d	92	MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74 DA	93	module_param_named(no_wb, radeon_no_wb, int, 0444);
689b9d74 DA	94
771fe6b9 JG	95	MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
	96	module_param_named(modeset, radeon_modeset, int, 0400);
	97
	98	MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
	99	module_param_named(dynclks, radeon_dynclks, int, 0444);
	100
	101	MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
	102	module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
	103
	104	MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
	105	module_param_named(vramlimit, radeon_vram_limit, int, 0600);
	106
	107	MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
	108	module_param_named(agpmode, radeon_agpmode, int, 0444);
	109
	110	MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
	111	module_param_named(gartsize, radeon_gart_size, int, 0600);
	112
	113	MODULE_PARM_DESC(benchmark, "Run benchmark");
	114	module_param_named(benchmark, radeon_benchmarking, int, 0444);
	115
ecc0b326 MD	116	MODULE_PARM_DESC(test, "Run tests");
	117	module_param_named(test, radeon_testing, int, 0444);
	118
771fe6b9 JG	119	MODULE_PARM_DESC(connector_table, "Force connector table");
771fe6b9 JG	120	module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab DA	121
	122	MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
	123	module_param_named(tv, radeon_tv, int, 0444);
771fe6b9	124
9062fa66	125	MODULE_PARM_DESC(new_pll, "Select new PLL code for AVIVO chips");
b27b6375 AD	126	module_param_named(new_pll, radeon_new_pll, int, 0444);
b27b6375 AD	127
dafc3bd5 CK	128	MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
	129	module_param_named(audio, radeon_audio, int, 0444);
	130
0a3e67a4 JB	131	static int radeon_suspend(struct drm_device *dev, pm_message_t state)
	132	{
	133	drm_radeon_private_t *dev_priv = dev->dev_private;
	134
03efb885 DA	135	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	136	return 0;
	137
0a3e67a4	138	/* Disable all interrupts */
800b6995	139	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	140	RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	141	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	142	return 0;
	143	}
	144
	145	static int radeon_resume(struct drm_device *dev)
	146	{
	147	drm_radeon_private_t *dev_priv = dev->dev_private;
	148
03efb885 DA	149	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	150	return 0;
	151
0a3e67a4	152	/* Restore interrupt registers */
800b6995	153	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	154	RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	155	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	156	return 0;
	157	}
	158
1da177e4 LT	159	static struct pci_device_id pciidlist[] = {
	160	radeon_PCI_IDS
	161	};
	162
771fe6b9 JG	163	#if defined(CONFIG_DRM_RADEON_KMS)
	164	MODULE_DEVICE_TABLE(pci, pciidlist);
	165	#endif
	166
	167	static struct drm_driver driver_old = {
b5e89ed5 DA	168	.driver_features =
b5e89ed5 DA	169	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
0a3e67a4	170	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED,
1da177e4	171	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947 DA	172	.load = radeon_driver_load,
	173	.firstopen = radeon_driver_firstopen,
	174	.open = radeon_driver_open,
	175	.preclose = radeon_driver_preclose,
	176	.postclose = radeon_driver_postclose,
	177	.lastclose = radeon_driver_lastclose,
	178	.unload = radeon_driver_unload,
0a3e67a4 JB	179	.suspend = radeon_suspend,
	180	.resume = radeon_resume,
	181	.get_vblank_counter = radeon_get_vblank_counter,
	182	.enable_vblank = radeon_enable_vblank,
	183	.disable_vblank = radeon_disable_vblank,
60f2ee0b DA	184	.master_create = radeon_master_create,
60f2ee0b DA	185	.master_destroy = radeon_master_destroy,
1da177e4 LT	186	.irq_preinstall = radeon_driver_irq_preinstall,
	187	.irq_postinstall = radeon_driver_irq_postinstall,
	188	.irq_uninstall = radeon_driver_irq_uninstall,
	189	.irq_handler = radeon_driver_irq_handler,
1da177e4 LT	190	.reclaim_buffers = drm_core_reclaim_buffers,
	191	.get_map_ofs = drm_core_get_map_ofs,
	192	.get_reg_ofs = drm_core_get_reg_ofs,
1da177e4 LT	193	.ioctls = radeon_ioctls,
	194	.dma_ioctl = radeon_cp_buffers,
	195	.fops = {
b5e89ed5 DA	196	.owner = THIS_MODULE,
	197	.open = drm_open,
	198	.release = drm_release,
ed8b6704	199	.unlocked_ioctl = drm_ioctl,
b5e89ed5 DA	200	.mmap = drm_mmap,
	201	.poll = drm_poll,
	202	.fasync = drm_fasync,
9a186645	203	#ifdef CONFIG_COMPAT
b5e89ed5	204	.compat_ioctl = radeon_compat_ioctl,
9a186645	205	#endif
22eae947 DA	206	},
22eae947 DA	207
1da177e4	208	.pci_driver = {
22eae947 DA	209	.name = DRIVER_NAME,
	210	.id_table = pciidlist,
	211	},
	212
	213	.name = DRIVER_NAME,
	214	.desc = DRIVER_DESC,
	215	.date = DRIVER_DATE,
	216	.major = DRIVER_MAJOR,
	217	.minor = DRIVER_MINOR,
	218	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	219	};
1da177e4 LT	220
771fe6b9 JG	221	static struct drm_driver kms_driver;
	222
	223	static int __devinit
	224	radeon_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	225	{
	226	return drm_get_dev(pdev, ent, &kms_driver);
	227	}
	228
	229	static void
	230	radeon_pci_remove(struct pci_dev *pdev)
	231	{
	232	struct drm_device *dev = pci_get_drvdata(pdev);
	233
	234	drm_put_dev(dev);
	235	}
	236
	237	static int
	238	radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
	239	{
	240	struct drm_device *dev = pci_get_drvdata(pdev);
	241	return radeon_suspend_kms(dev, state);
	242	}
	243
	244	static int
	245	radeon_pci_resume(struct pci_dev *pdev)
	246	{
	247	struct drm_device *dev = pci_get_drvdata(pdev);
	248	return radeon_resume_kms(dev);
	249	}
	250
	251	static struct drm_driver kms_driver = {
	252	.driver_features =
	253	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
	254	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
	255	.dev_priv_size = 0,
	256	.load = radeon_driver_load_kms,
	257	.firstopen = radeon_driver_firstopen_kms,
	258	.open = radeon_driver_open_kms,
	259	.preclose = radeon_driver_preclose_kms,
	260	.postclose = radeon_driver_postclose_kms,
	261	.lastclose = radeon_driver_lastclose_kms,
	262	.unload = radeon_driver_unload_kms,
	263	.suspend = radeon_suspend_kms,
	264	.resume = radeon_resume_kms,
	265	.get_vblank_counter = radeon_get_vblank_counter_kms,
	266	.enable_vblank = radeon_enable_vblank_kms,
	267	.disable_vblank = radeon_disable_vblank_kms,
771fe6b9 JG	268	#if defined(CONFIG_DEBUG_FS)
	269	.debugfs_init = radeon_debugfs_init,
	270	.debugfs_cleanup = radeon_debugfs_cleanup,
	271	#endif
	272	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	273	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	274	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	275	.irq_handler = radeon_driver_irq_handler_kms,
	276	.reclaim_buffers = drm_core_reclaim_buffers,
	277	.get_map_ofs = drm_core_get_map_ofs,
	278	.get_reg_ofs = drm_core_get_reg_ofs,
	279	.ioctls = radeon_ioctls_kms,
	280	.gem_init_object = radeon_gem_object_init,
	281	.gem_free_object = radeon_gem_object_free,
	282	.dma_ioctl = radeon_dma_ioctl_kms,
	283	.fops = {
	284	.owner = THIS_MODULE,
	285	.open = drm_open,
	286	.release = drm_release,
ed8b6704	287	.unlocked_ioctl = drm_ioctl,
771fe6b9 JG	288	.mmap = radeon_mmap,
	289	.poll = drm_poll,
	290	.fasync = drm_fasync,
	291	#ifdef CONFIG_COMPAT
70ba2a37	292	.compat_ioctl = radeon_kms_compat_ioctl,
771fe6b9 JG	293	#endif
	294	},
	295
	296	.pci_driver = {
	297	.name = DRIVER_NAME,
	298	.id_table = pciidlist,
	299	.probe = radeon_pci_probe,
	300	.remove = radeon_pci_remove,
	301	.suspend = radeon_pci_suspend,
	302	.resume = radeon_pci_resume,
	303	},
	304
	305	.name = DRIVER_NAME,
	306	.desc = DRIVER_DESC,
	307	.date = DRIVER_DATE,
	308	.major = KMS_DRIVER_MAJOR,
	309	.minor = KMS_DRIVER_MINOR,
	310	.patchlevel = KMS_DRIVER_PATCHLEVEL,
	311	};
771fe6b9 JG	312
	313	static struct drm_driver *driver;
	314
1da177e4 LT	315	static int __init radeon_init(void)
1da177e4 LT	316	{
771fe6b9 JG	317	driver = &driver_old;
771fe6b9 JG	318	driver->num_ioctls = radeon_max_ioctl;
de05065f DA	319	#ifdef CONFIG_VGA_CONSOLE
	320	if (vgacon_text_force() && radeon_modeset == -1) {
	321	DRM_INFO("VGACON disable radeon kernel modesetting.\n");
	322	driver = &driver_old;
	323	driver->driver_features &= ~DRIVER_MODESET;
	324	radeon_modeset = 0;
	325	}
	326	#endif
771fe6b9 JG	327	/* if enabled by default */
771fe6b9 JG	328	if (radeon_modeset == -1) {
a0cdc649 DA	329	#ifdef CONFIG_DRM_RADEON_KMS
a0cdc649 DA	330	DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9	331	radeon_modeset = 1;
a0cdc649 DA	332	#else
	333	DRM_INFO("radeon defaulting to userspace modesetting.\n");
	334	radeon_modeset = 0;
	335	#endif
771fe6b9 JG	336	}
	337	if (radeon_modeset == 1) {
	338	DRM_INFO("radeon kernel modesetting enabled.\n");
	339	driver = &kms_driver;
	340	driver->driver_features \|= DRIVER_MODESET;
	341	driver->num_ioctls = radeon_max_kms_ioctl;
	342	}
771fe6b9 JG	343	/* if the vga console setting is enabled still
771fe6b9 JG	344	* let modprobe override it */
771fe6b9	345	return drm_init(driver);
1da177e4 LT	346	}
	347
	348	static void __exit radeon_exit(void)
	349	{
771fe6b9	350	drm_exit(driver);
1da177e4 LT	351	}
1da177e4 LT	352
176f613e	353	module_init(radeon_init);
1da177e4 LT	354	module_exit(radeon_exit);
1da177e4 LT	355
b5e89ed5 DA	356	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	357	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	358	MODULE_LICENSE("GPL and additional rights");