[net-next-2.6.git] / drivers / gpu / drm / nouveau / nv50_fbcon.c

#include "drmP.h"
#include "nouveau_drv.h"
#include "nouveau_dma.h"
#include "nouveau_fbcon.h"

static void
nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
	struct nouveau_fbcon_par *par = info->par;
	struct drm_device *dev = par->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_channel *chan = dev_priv->channel;
	uint32_t color = ((uint32_t *) info->pseudo_palette)[rect->color];

	if (info->state != FBINFO_STATE_RUNNING)
		return;

	if (!(info->flags & FBINFO_HWACCEL_DISABLED) &&
	     RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) {
		NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");

		info->flags |= FBINFO_HWACCEL_DISABLED;
	}

	if (info->flags & FBINFO_HWACCEL_DISABLED) {
		cfb_fillrect(info, rect);
		return;
	}

	if (rect->rop != ROP_COPY) {
		BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
		OUT_RING(chan, 1);
	}
	BEGIN_RING(chan, NvSub2D, 0x0588, 1);
	OUT_RING(chan, color);
	BEGIN_RING(chan, NvSub2D, 0x0600, 4);
	OUT_RING(chan, rect->dx);
	OUT_RING(chan, rect->dy);
	OUT_RING(chan, rect->dx + rect->width);
	OUT_RING(chan, rect->dy + rect->height);
	if (rect->rop != ROP_COPY) {
		BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
		OUT_RING(chan, 3);
	}
	FIRE_RING(chan);
}

static void
nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
{
	struct nouveau_fbcon_par *par = info->par;
	struct drm_device *dev = par->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_channel *chan = dev_priv->channel;

	if (info->state != FBINFO_STATE_RUNNING)
		return;

	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) {
		NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");

		info->flags |= FBINFO_HWACCEL_DISABLED;
	}

	if (info->flags & FBINFO_HWACCEL_DISABLED) {
		cfb_copyarea(info, region);
		return;
	}

	BEGIN_RING(chan, NvSub2D, 0x0110, 1);
	OUT_RING(chan, 0);
	BEGIN_RING(chan, NvSub2D, 0x08b0, 4);
	OUT_RING(chan, region->dx);
	OUT_RING(chan, region->dy);
	OUT_RING(chan, region->width);
	OUT_RING(chan, region->height);
	BEGIN_RING(chan, NvSub2D, 0x08d0, 4);
	OUT_RING(chan, 0);
	OUT_RING(chan, region->sx);
	OUT_RING(chan, 0);
	OUT_RING(chan, region->sy);
	FIRE_RING(chan);
}

static void
nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
{
	struct nouveau_fbcon_par *par = info->par;
	struct drm_device *dev = par->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_channel *chan = dev_priv->channel;
	uint32_t width, dwords, *data = (uint32_t *)image->data;
	uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
	uint32_t *palette = info->pseudo_palette;

	if (info->state != FBINFO_STATE_RUNNING)
		return;

	if (image->depth != 1) {
		cfb_imageblit(info, image);
		return;
	}

	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) {
		NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
		info->flags |= FBINFO_HWACCEL_DISABLED;
	}

	if (info->flags & FBINFO_HWACCEL_DISABLED) {
		cfb_imageblit(info, image);
		return;
	}

	width = (image->width + 31) & ~31;
	dwords = (width * image->height) >> 5;

	BEGIN_RING(chan, NvSub2D, 0x0814, 2);
	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
		OUT_RING(chan, palette[image->bg_color] | mask);
		OUT_RING(chan, palette[image->fg_color] | mask);
	} else {
		OUT_RING(chan, image->bg_color);
		OUT_RING(chan, image->fg_color);
	}
	BEGIN_RING(chan, NvSub2D, 0x0838, 2);
	OUT_RING(chan, image->width);
	OUT_RING(chan, image->height);
	BEGIN_RING(chan, NvSub2D, 0x0850, 4);
	OUT_RING(chan, 0);
	OUT_RING(chan, image->dx);
	OUT_RING(chan, 0);
	OUT_RING(chan, image->dy);

	while (dwords) {
		int push = dwords > 2047 ? 2047 : dwords;

		if (RING_SPACE(chan, push + 1)) {
			NV_ERROR(dev,
				 "GPU lockup - switching to software fbcon\n");
			info->flags |= FBINFO_HWACCEL_DISABLED;
			cfb_imageblit(info, image);
			return;
		}

		dwords -= push;

		BEGIN_RING(chan, NvSub2D, 0x40000860, push);
		OUT_RINGp(chan, data, push);
		data += push;
	}

	FIRE_RING(chan);
}

int
nv50_fbcon_accel_init(struct fb_info *info)
{
	struct nouveau_fbcon_par *par = info->par;
	struct drm_device *dev = par->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_channel *chan = dev_priv->channel;
	struct nouveau_gpuobj *eng2d = NULL;
	int ret, format;

	switch (info->var.bits_per_pixel) {
	case 8:
		format = 0xf3;
		break;
	case 15:
		format = 0xf8;
		break;
	case 16:
		format = 0xe8;
		break;
	case 32:
		switch (info->var.transp.length) {
		case 0: /* depth 24 */
		case 8: /* depth 32, just use 24.. */
			format = 0xe6;
			break;
		case 2: /* depth 30 */
			format = 0xd1;
			break;
		default:
			return -EINVAL;
		}
		break;
	default:
		return -EINVAL;
	}

	ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d);
	if (ret)
		return ret;

	ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, Nv2D, eng2d, NULL);
	if (ret)
		return ret;

	ret = RING_SPACE(chan, 59);
	if (ret) {
		NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
		return ret;
	}

	BEGIN_RING(chan, NvSub2D, 0x0000, 1);
	OUT_RING(chan, Nv2D);
	BEGIN_RING(chan, NvSub2D, 0x0180, 4);
	OUT_RING(chan, NvNotify0);
	OUT_RING(chan, chan->vram_handle);
	OUT_RING(chan, chan->vram_handle);
	OUT_RING(chan, chan->vram_handle);
	BEGIN_RING(chan, NvSub2D, 0x0290, 1);
	OUT_RING(chan, 0);
	BEGIN_RING(chan, NvSub2D, 0x0888, 1);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
	OUT_RING(chan, 3);
	BEGIN_RING(chan, NvSub2D, 0x02a0, 1);
	OUT_RING(chan, 0x55);
	BEGIN_RING(chan, NvSub2D, 0x08c0, 4);
	OUT_RING(chan, 0);
	OUT_RING(chan, 1);
	OUT_RING(chan, 0);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x0580, 2);
	OUT_RING(chan, 4);
	OUT_RING(chan, format);
	BEGIN_RING(chan, NvSub2D, 0x02e8, 2);
	OUT_RING(chan, 2);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x0804, 1);
	OUT_RING(chan, format);
	BEGIN_RING(chan, NvSub2D, 0x0800, 1);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x0808, 3);
	OUT_RING(chan, 0);
	OUT_RING(chan, 0);
	OUT_RING(chan, 0);
	BEGIN_RING(chan, NvSub2D, 0x081c, 1);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x0840, 4);
	OUT_RING(chan, 0);
	OUT_RING(chan, 1);
	OUT_RING(chan, 0);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x0200, 2);
	OUT_RING(chan, format);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x0214, 5);
	OUT_RING(chan, info->fix.line_length);
	OUT_RING(chan, info->var.xres_virtual);
	OUT_RING(chan, info->var.yres_virtual);
	OUT_RING(chan, 0);
	OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys +
			 dev_priv->vm_vram_base);
	BEGIN_RING(chan, NvSub2D, 0x0230, 2);
	OUT_RING(chan, format);
	OUT_RING(chan, 1);
	BEGIN_RING(chan, NvSub2D, 0x0244, 5);
	OUT_RING(chan, info->fix.line_length);
	OUT_RING(chan, info->var.xres_virtual);
	OUT_RING(chan, info->var.yres_virtual);
	OUT_RING(chan, 0);
	OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys +
			 dev_priv->vm_vram_base);

	info->fbops->fb_fillrect = nv50_fbcon_fillrect;
	info->fbops->fb_copyarea = nv50_fbcon_copyarea;
	info->fbops->fb_imageblit = nv50_fbcon_imageblit;
	return 0;
}
Commit	Line	Data
6ee73861 BS	1	#include "drmP.h"
	2	#include "nouveau_drv.h"
	3	#include "nouveau_dma.h"
	4	#include "nouveau_fbcon.h"
	5
	6	static void
	7	nv50_fbcon_fillrect(struct fb_info info, const struct fb_fillrect rect)
	8	{
	9	struct nouveau_fbcon_par *par = info->par;
	10	struct drm_device *dev = par->dev;
	11	struct drm_nouveau_private *dev_priv = dev->dev_private;
	12	struct nouveau_channel *chan = dev_priv->channel;
e55ca7e6	13	uint32_t color = ((uint32_t *) info->pseudo_palette)[rect->color];
6ee73861 BS	14
	15	if (info->state != FBINFO_STATE_RUNNING)
	16	return;
	17
	18	if (!(info->flags & FBINFO_HWACCEL_DISABLED) &&
	19	RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) {
	20	NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
	21
	22	info->flags \|= FBINFO_HWACCEL_DISABLED;
	23	}
	24
	25	if (info->flags & FBINFO_HWACCEL_DISABLED) {
	26	cfb_fillrect(info, rect);
	27	return;
	28	}
	29
	30	if (rect->rop != ROP_COPY) {
	31	BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
	32	OUT_RING(chan, 1);
	33	}
	34	BEGIN_RING(chan, NvSub2D, 0x0588, 1);
e55ca7e6	35	OUT_RING(chan, color);
6ee73861 BS	36	BEGIN_RING(chan, NvSub2D, 0x0600, 4);
	37	OUT_RING(chan, rect->dx);
	38	OUT_RING(chan, rect->dy);
	39	OUT_RING(chan, rect->dx + rect->width);
	40	OUT_RING(chan, rect->dy + rect->height);
	41	if (rect->rop != ROP_COPY) {
	42	BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
	43	OUT_RING(chan, 3);
	44	}
	45	FIRE_RING(chan);
	46	}
	47
	48	static void
	49	nv50_fbcon_copyarea(struct fb_info info, const struct fb_copyarea region)
	50	{
	51	struct nouveau_fbcon_par *par = info->par;
	52	struct drm_device *dev = par->dev;
	53	struct drm_nouveau_private *dev_priv = dev->dev_private;
	54	struct nouveau_channel *chan = dev_priv->channel;
	55
	56	if (info->state != FBINFO_STATE_RUNNING)
	57	return;
	58
	59	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) {
	60	NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
	61
	62	info->flags \|= FBINFO_HWACCEL_DISABLED;
	63	}
	64
	65	if (info->flags & FBINFO_HWACCEL_DISABLED) {
	66	cfb_copyarea(info, region);
	67	return;
	68	}
	69
	70	BEGIN_RING(chan, NvSub2D, 0x0110, 1);
	71	OUT_RING(chan, 0);
	72	BEGIN_RING(chan, NvSub2D, 0x08b0, 4);
	73	OUT_RING(chan, region->dx);
	74	OUT_RING(chan, region->dy);
	75	OUT_RING(chan, region->width);
	76	OUT_RING(chan, region->height);
	77	BEGIN_RING(chan, NvSub2D, 0x08d0, 4);
	78	OUT_RING(chan, 0);
	79	OUT_RING(chan, region->sx);
	80	OUT_RING(chan, 0);
	81	OUT_RING(chan, region->sy);
	82	FIRE_RING(chan);
	83	}
	84
	85	static void
	86	nv50_fbcon_imageblit(struct fb_info info, const struct fb_image image)
	87	{
	88	struct nouveau_fbcon_par *par = info->par;
	89	struct drm_device *dev = par->dev;
	90	struct drm_nouveau_private *dev_priv = dev->dev_private;
	91	struct nouveau_channel *chan = dev_priv->channel;
	92	uint32_t width, dwords, data = (uint32_t )image->data;
	93	uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
	94	uint32_t *palette = info->pseudo_palette;
	95
	96	if (info->state != FBINFO_STATE_RUNNING)
	97	return;
	98
	99	if (image->depth != 1) {
100	cfb_imageblit(info, image);
101	return;
102	}
103
104	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) {
105	NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
106	info->flags \|= FBINFO_HWACCEL_DISABLED;
107	}
108
109	if (info->flags & FBINFO_HWACCEL_DISABLED) {
110	cfb_imageblit(info, image);
111	return;
112	}
113
114	width = (image->width + 31) & ~31;
115	dwords = (width * image->height) >> 5;
116
117	BEGIN_RING(chan, NvSub2D, 0x0814, 2);
118	if (info->fix.visual == FB_VISUAL_TRUECOLOR \|\|
119	info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
120	OUT_RING(chan, palette[image->bg_color] \| mask);
121	OUT_RING(chan, palette[image->fg_color] \| mask);
122	} else {
123	OUT_RING(chan, image->bg_color);
124	OUT_RING(chan, image->fg_color);
125	}
126	BEGIN_RING(chan, NvSub2D, 0x0838, 2);
127	OUT_RING(chan, image->width);
128	OUT_RING(chan, image->height);
129	BEGIN_RING(chan, NvSub2D, 0x0850, 4);
130	OUT_RING(chan, 0);
131	OUT_RING(chan, image->dx);
132	OUT_RING(chan, 0);
133	OUT_RING(chan, image->dy);
134
135	while (dwords) {
136	int push = dwords > 2047 ? 2047 : dwords;
137
138	if (RING_SPACE(chan, push + 1)) {
139	NV_ERROR(dev,
140	"GPU lockup - switching to software fbcon\n");
141	info->flags \|= FBINFO_HWACCEL_DISABLED;
142	cfb_imageblit(info, image);
143	return;
144	}
145
146	dwords -= push;
147
148	BEGIN_RING(chan, NvSub2D, 0x40000860, push);
149	OUT_RINGp(chan, data, push);
150	data += push;
151	}
152
153	FIRE_RING(chan);
154	}
155
156	int
157	nv50_fbcon_accel_init(struct fb_info *info)
158	{
159	struct nouveau_fbcon_par *par = info->par;
160	struct drm_device *dev = par->dev;
161	struct drm_nouveau_private *dev_priv = dev->dev_private;
162	struct nouveau_channel *chan = dev_priv->channel;
163	struct nouveau_gpuobj *eng2d = NULL;
164	int ret, format;
165
166	switch (info->var.bits_per_pixel) {
167	case 8:
168	format = 0xf3;
169	break;
170	case 15:
171	format = 0xf8;
172	break;
173	case 16:
174	format = 0xe8;
175	break;
176	case 32:
177	switch (info->var.transp.length) {
178	case 0: /* depth 24 */
179	case 8: /* depth 32, just use 24.. */
180	format = 0xe6;
181	break;
182	case 2: /* depth 30 */
183	format = 0xd1;
184	break;
185	default:
186	return -EINVAL;
187	}
188	break;
189	default:
190	return -EINVAL;
191	}
192
193	ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d);
194	if (ret)
195	return ret;
196
197	ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, Nv2D, eng2d, NULL);
198	if (ret)
199	return ret;
200
201	ret = RING_SPACE(chan, 59);
202	if (ret) {
203	NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
204	return ret;
205	}
206
207	BEGIN_RING(chan, NvSub2D, 0x0000, 1);
208	OUT_RING(chan, Nv2D);
209	BEGIN_RING(chan, NvSub2D, 0x0180, 4);
210	OUT_RING(chan, NvNotify0);
211	OUT_RING(chan, chan->vram_handle);
212	OUT_RING(chan, chan->vram_handle);
213	OUT_RING(chan, chan->vram_handle);
214	BEGIN_RING(chan, NvSub2D, 0x0290, 1);
215	OUT_RING(chan, 0);
216	BEGIN_RING(chan, NvSub2D, 0x0888, 1);
217	OUT_RING(chan, 1);
218	BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
219	OUT_RING(chan, 3);
220	BEGIN_RING(chan, NvSub2D, 0x02a0, 1);
221	OUT_RING(chan, 0x55);
222	BEGIN_RING(chan, NvSub2D, 0x08c0, 4);
223	OUT_RING(chan, 0);
224	OUT_RING(chan, 1);
225	OUT_RING(chan, 0);
226	OUT_RING(chan, 1);
227	BEGIN_RING(chan, NvSub2D, 0x0580, 2);
228	OUT_RING(chan, 4);
229	OUT_RING(chan, format);
230	BEGIN_RING(chan, NvSub2D, 0x02e8, 2);
231	OUT_RING(chan, 2);
232	OUT_RING(chan, 1);
233	BEGIN_RING(chan, NvSub2D, 0x0804, 1);
234	OUT_RING(chan, format);
235	BEGIN_RING(chan, NvSub2D, 0x0800, 1);
236	OUT_RING(chan, 1);
237	BEGIN_RING(chan, NvSub2D, 0x0808, 3);
238	OUT_RING(chan, 0);
239	OUT_RING(chan, 0);
240	OUT_RING(chan, 0);
241	BEGIN_RING(chan, NvSub2D, 0x081c, 1);
242	OUT_RING(chan, 1);
243	BEGIN_RING(chan, NvSub2D, 0x0840, 4);
244	OUT_RING(chan, 0);
245	OUT_RING(chan, 1);
246	OUT_RING(chan, 0);
247	OUT_RING(chan, 1);
248	BEGIN_RING(chan, NvSub2D, 0x0200, 2);
249	OUT_RING(chan, format);
250	OUT_RING(chan, 1);
251	BEGIN_RING(chan, NvSub2D, 0x0214, 5);
252	OUT_RING(chan, info->fix.line_length);
253	OUT_RING(chan, info->var.xres_virtual);
254	OUT_RING(chan, info->var.yres_virtual);
255	OUT_RING(chan, 0);
256	OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys +
257	dev_priv->vm_vram_base);
258	BEGIN_RING(chan, NvSub2D, 0x0230, 2);
259	OUT_RING(chan, format);
260	OUT_RING(chan, 1);
261	BEGIN_RING(chan, NvSub2D, 0x0244, 5);
262	OUT_RING(chan, info->fix.line_length);
263	OUT_RING(chan, info->var.xres_virtual);
264	OUT_RING(chan, info->var.yres_virtual);
265	OUT_RING(chan, 0);
266	OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys +
267	dev_priv->vm_vram_base);
268
269	info->fbops->fb_fillrect = nv50_fbcon_fillrect;
270	info->fbops->fb_copyarea = nv50_fbcon_copyarea;
271	info->fbops->fb_imageblit = nv50_fbcon_imageblit;
272	return 0;
273	}
274